1 /* RTL-based forward propagation pass for GNU compiler.
2 Copyright (C) 2005-2015 Free Software Foundation, Inc.
3 Contributed by Paolo Bonzini and Steven Bosscher.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
27 #include "sparseset.h"
30 #include "insn-config.h"
38 #include "hard-reg-set.h"
41 #include "dominance.h"
44 #include "cfgcleanup.h"
45 #include "basic-block.h"
49 #include "tree-pass.h"
55 /* This pass does simple forward propagation and simplification when an
56 operand of an insn can only come from a single def. This pass uses
57 df.c, so it is global. However, we only do limited analysis of
58 available expressions.
60 1) The pass tries to propagate the source of the def into the use,
61 and checks if the result is independent of the substituted value.
62 For example, the high word of a (zero_extend:DI (reg:SI M)) is always
63 zero, independent of the source register.
65 In particular, we propagate constants into the use site. Sometimes
66 RTL expansion did not put the constant in the same insn on purpose,
67 to satisfy a predicate, and the result will fail to be recognized;
68 but this happens rarely and in this case we can still create a
69 REG_EQUAL note. For multi-word operations, this
71 (set (subreg:SI (reg:DI 120) 0) (const_int 0))
72 (set (subreg:SI (reg:DI 120) 4) (const_int -1))
73 (set (subreg:SI (reg:DI 122) 0)
74 (ior:SI (subreg:SI (reg:DI 119) 0) (subreg:SI (reg:DI 120) 0)))
75 (set (subreg:SI (reg:DI 122) 4)
76 (ior:SI (subreg:SI (reg:DI 119) 4) (subreg:SI (reg:DI 120) 4)))
78 can be simplified to the much simpler
80 (set (subreg:SI (reg:DI 122) 0) (subreg:SI (reg:DI 119)))
81 (set (subreg:SI (reg:DI 122) 4) (const_int -1))
83 This particular propagation is also effective at putting together
84 complex addressing modes. We are more aggressive inside MEMs, in
85 that all definitions are propagated if the use is in a MEM; if the
86 result is a valid memory address we check address_cost to decide
87 whether the substitution is worthwhile.
89 2) The pass propagates register copies. This is not as effective as
90 the copy propagation done by CSE's canon_reg, which works by walking
91 the instruction chain, it can help the other transformations.
93 We should consider removing this optimization, and instead reorder the
94 RTL passes, because GCSE does this transformation too. With some luck,
95 the CSE pass at the end of rest_of_handle_gcse could also go away.
97 3) The pass looks for paradoxical subregs that are actually unnecessary.
100 (set (reg:QI 120) (subreg:QI (reg:SI 118) 0))
101 (set (reg:QI 121) (subreg:QI (reg:SI 119) 0))
102 (set (reg:SI 122) (plus:SI (subreg:SI (reg:QI 120) 0)
103 (subreg:SI (reg:QI 121) 0)))
105 are very common on machines that can only do word-sized operations.
106 For each use of a paradoxical subreg (subreg:WIDER (reg:NARROW N) 0),
107 if it has a single def and it is (subreg:NARROW (reg:WIDE M) 0),
108 we can replace the paradoxical subreg with simply (reg:WIDE M). The
109 above will simplify this to
111 (set (reg:QI 120) (subreg:QI (reg:SI 118) 0))
112 (set (reg:QI 121) (subreg:QI (reg:SI 119) 0))
113 (set (reg:SI 122) (plus:SI (reg:SI 118) (reg:SI 119)))
115 where the first two insns are now dead.
117 We used to use reaching definitions to find which uses have a
118 single reaching definition (sounds obvious...), but this is too
119 complex a problem in nasty testcases like PR33928. Now we use the
120 multiple definitions problem in df-problems.c. The similarity
121 between that problem and SSA form creation is taken further, in
122 that fwprop does a dominator walk to create its chains; however,
123 instead of creating a PHI function where multiple definitions meet
124 I just punt and record only singleton use-def chains, which is
125 all that is needed by fwprop. */
128 static int num_changes
;
130 static vec
<df_ref
> use_def_ref
;
131 static vec
<df_ref
> reg_defs
;
132 static vec
<df_ref
> reg_defs_stack
;
134 /* The MD bitmaps are trimmed to include only live registers to cut
135 memory usage on testcases like insn-recog.c. Track live registers
136 in the basic block and do not perform forward propagation if the
137 destination is a dead pseudo occurring in a note. */
138 static bitmap local_md
;
139 static bitmap local_lr
;
141 /* Return the only def in USE's use-def chain, or NULL if there is
142 more than one def in the chain. */
145 get_def_for_use (df_ref use
)
147 return use_def_ref
[DF_REF_ID (use
)];
151 /* Update the reg_defs vector with non-partial definitions in DEF_REC.
152 TOP_FLAG says which artificials uses should be used, when DEF_REC
153 is an artificial def vector. LOCAL_MD is modified as after a
154 df_md_simulate_* function; we do more or less the same processing
155 done there, so we do not use those functions. */
157 #define DF_MD_GEN_FLAGS \
158 (DF_REF_PARTIAL | DF_REF_CONDITIONAL | DF_REF_MAY_CLOBBER)
161 process_defs (df_ref def
, int top_flag
)
163 for (; def
; def
= DF_REF_NEXT_LOC (def
))
165 df_ref curr_def
= reg_defs
[DF_REF_REGNO (def
)];
168 if ((DF_REF_FLAGS (def
) & DF_REF_AT_TOP
) != top_flag
)
171 dregno
= DF_REF_REGNO (def
);
173 reg_defs_stack
.safe_push (curr_def
);
176 /* Do not store anything if "transitioning" from NULL to NULL. But
177 otherwise, push a special entry on the stack to tell the
178 leave_block callback that the entry in reg_defs was NULL. */
179 if (DF_REF_FLAGS (def
) & DF_MD_GEN_FLAGS
)
182 reg_defs_stack
.safe_push (def
);
185 if (DF_REF_FLAGS (def
) & DF_MD_GEN_FLAGS
)
187 bitmap_set_bit (local_md
, dregno
);
188 reg_defs
[dregno
] = NULL
;
192 bitmap_clear_bit (local_md
, dregno
);
193 reg_defs
[dregno
] = def
;
199 /* Fill the use_def_ref vector with values for the uses in USE_REC,
200 taking reaching definitions info from LOCAL_MD and REG_DEFS.
201 TOP_FLAG says which artificials uses should be used, when USE_REC
202 is an artificial use vector. */
205 process_uses (df_ref use
, int top_flag
)
207 for (; use
; use
= DF_REF_NEXT_LOC (use
))
208 if ((DF_REF_FLAGS (use
) & DF_REF_AT_TOP
) == top_flag
)
210 unsigned int uregno
= DF_REF_REGNO (use
);
212 && !bitmap_bit_p (local_md
, uregno
)
213 && bitmap_bit_p (local_lr
, uregno
))
214 use_def_ref
[DF_REF_ID (use
)] = reg_defs
[uregno
];
218 class single_def_use_dom_walker
: public dom_walker
221 single_def_use_dom_walker (cdi_direction direction
)
222 : dom_walker (direction
) {}
223 virtual void before_dom_children (basic_block
);
224 virtual void after_dom_children (basic_block
);
228 single_def_use_dom_walker::before_dom_children (basic_block bb
)
230 int bb_index
= bb
->index
;
231 struct df_md_bb_info
*md_bb_info
= df_md_get_bb_info (bb_index
);
232 struct df_lr_bb_info
*lr_bb_info
= df_lr_get_bb_info (bb_index
);
235 bitmap_copy (local_md
, &md_bb_info
->in
);
236 bitmap_copy (local_lr
, &lr_bb_info
->in
);
238 /* Push a marker for the leave_block callback. */
239 reg_defs_stack
.safe_push (NULL
);
241 process_uses (df_get_artificial_uses (bb_index
), DF_REF_AT_TOP
);
242 process_defs (df_get_artificial_defs (bb_index
), DF_REF_AT_TOP
);
244 /* We don't call df_simulate_initialize_forwards, as it may overestimate
245 the live registers if there are unused artificial defs. We prefer
246 liveness to be underestimated. */
248 FOR_BB_INSNS (bb
, insn
)
251 unsigned int uid
= INSN_UID (insn
);
252 process_uses (DF_INSN_UID_USES (uid
), 0);
253 process_uses (DF_INSN_UID_EQ_USES (uid
), 0);
254 process_defs (DF_INSN_UID_DEFS (uid
), 0);
255 df_simulate_one_insn_forwards (bb
, insn
, local_lr
);
258 process_uses (df_get_artificial_uses (bb_index
), 0);
259 process_defs (df_get_artificial_defs (bb_index
), 0);
262 /* Pop the definitions created in this basic block when leaving its
266 single_def_use_dom_walker::after_dom_children (basic_block bb ATTRIBUTE_UNUSED
)
269 while ((saved_def
= reg_defs_stack
.pop ()) != NULL
)
271 unsigned int dregno
= DF_REF_REGNO (saved_def
);
273 /* See also process_defs. */
274 if (saved_def
== reg_defs
[dregno
])
275 reg_defs
[dregno
] = NULL
;
277 reg_defs
[dregno
] = saved_def
;
282 /* Build a vector holding the reaching definitions of uses reached by a
283 single dominating definition. */
286 build_single_def_use_links (void)
288 /* We use the multiple definitions problem to compute our restricted
290 df_set_flags (DF_EQ_NOTES
);
291 df_md_add_problem ();
292 df_note_add_problem ();
294 df_maybe_reorganize_use_refs (DF_REF_ORDER_BY_INSN_WITH_NOTES
);
296 use_def_ref
.create (DF_USES_TABLE_SIZE ());
297 use_def_ref
.safe_grow_cleared (DF_USES_TABLE_SIZE ());
299 reg_defs
.create (max_reg_num ());
300 reg_defs
.safe_grow_cleared (max_reg_num ());
302 reg_defs_stack
.create (n_basic_blocks_for_fn (cfun
) * 10);
303 local_md
= BITMAP_ALLOC (NULL
);
304 local_lr
= BITMAP_ALLOC (NULL
);
306 /* Walk the dominator tree looking for single reaching definitions
307 dominating the uses. This is similar to how SSA form is built. */
308 single_def_use_dom_walker (CDI_DOMINATORS
)
309 .walk (cfun
->cfg
->x_entry_block_ptr
);
311 BITMAP_FREE (local_lr
);
312 BITMAP_FREE (local_md
);
314 reg_defs_stack
.release ();
318 /* Do not try to replace constant addresses or addresses of local and
319 argument slots. These MEM expressions are made only once and inserted
320 in many instructions, as well as being used to control symbol table
321 output. It is not safe to clobber them.
323 There are some uncommon cases where the address is already in a register
324 for some reason, but we cannot take advantage of that because we have
325 no easy way to unshare the MEM. In addition, looking up all stack
326 addresses is costly. */
329 can_simplify_addr (rtx addr
)
333 if (CONSTANT_ADDRESS_P (addr
))
336 if (GET_CODE (addr
) == PLUS
)
337 reg
= XEXP (addr
, 0);
342 || (REGNO (reg
) != FRAME_POINTER_REGNUM
343 && REGNO (reg
) != HARD_FRAME_POINTER_REGNUM
344 && REGNO (reg
) != ARG_POINTER_REGNUM
));
347 /* Returns a canonical version of X for the address, from the point of view,
348 that all multiplications are represented as MULT instead of the multiply
349 by a power of 2 being represented as ASHIFT.
351 Every ASHIFT we find has been made by simplify_gen_binary and was not
352 there before, so it is not shared. So we can do this in place. */
355 canonicalize_address (rtx x
)
358 switch (GET_CODE (x
))
361 if (CONST_INT_P (XEXP (x
, 1))
362 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (GET_MODE (x
))
363 && INTVAL (XEXP (x
, 1)) >= 0)
365 HOST_WIDE_INT shift
= INTVAL (XEXP (x
, 1));
367 XEXP (x
, 1) = gen_int_mode ((HOST_WIDE_INT
) 1 << shift
,
375 if (GET_CODE (XEXP (x
, 0)) == PLUS
376 || GET_CODE (XEXP (x
, 0)) == ASHIFT
377 || GET_CODE (XEXP (x
, 0)) == CONST
)
378 canonicalize_address (XEXP (x
, 0));
392 /* OLD is a memory address. Return whether it is good to use NEW instead,
393 for a memory access in the given MODE. */
396 should_replace_address (rtx old_rtx
, rtx new_rtx
, machine_mode mode
,
397 addr_space_t as
, bool speed
)
401 if (rtx_equal_p (old_rtx
, new_rtx
)
402 || !memory_address_addr_space_p (mode
, new_rtx
, as
))
405 /* Copy propagation is always ok. */
406 if (REG_P (old_rtx
) && REG_P (new_rtx
))
409 /* Prefer the new address if it is less expensive. */
410 gain
= (address_cost (old_rtx
, mode
, as
, speed
)
411 - address_cost (new_rtx
, mode
, as
, speed
));
413 /* If the addresses have equivalent cost, prefer the new address
414 if it has the highest `set_src_cost'. That has the potential of
415 eliminating the most insns without additional costs, and it
416 is the same that cse.c used to do. */
418 gain
= set_src_cost (new_rtx
, speed
) - set_src_cost (old_rtx
, speed
);
424 /* Flags for the last parameter of propagate_rtx_1. */
427 /* If PR_CAN_APPEAR is true, propagate_rtx_1 always returns true;
428 if it is false, propagate_rtx_1 returns false if, for at least
429 one occurrence OLD, it failed to collapse the result to a constant.
430 For example, (mult:M (reg:M A) (minus:M (reg:M B) (reg:M A))) may
431 collapse to zero if replacing (reg:M B) with (reg:M A).
433 PR_CAN_APPEAR is disregarded inside MEMs: in that case,
434 propagate_rtx_1 just tries to make cheaper and valid memory
438 /* If PR_HANDLE_MEM is not set, propagate_rtx_1 won't attempt any replacement
439 outside memory addresses. This is needed because propagate_rtx_1 does
440 not do any analysis on memory; thus it is very conservative and in general
441 it will fail if non-read-only MEMs are found in the source expression.
443 PR_HANDLE_MEM is set when the source of the propagation was not
444 another MEM. Then, it is safe not to treat non-read-only MEMs as
445 ``opaque'' objects. */
448 /* Set when costs should be optimized for speed. */
449 PR_OPTIMIZE_FOR_SPEED
= 4
453 /* Replace all occurrences of OLD in *PX with NEW and try to simplify the
454 resulting expression. Replace *PX with a new RTL expression if an
455 occurrence of OLD was found.
457 This is only a wrapper around simplify-rtx.c: do not add any pattern
458 matching code here. (The sole exception is the handling of LO_SUM, but
459 that is because there is no simplify_gen_* function for LO_SUM). */
462 propagate_rtx_1 (rtx
*px
, rtx old_rtx
, rtx new_rtx
, int flags
)
464 rtx x
= *px
, tem
= NULL_RTX
, op0
, op1
, op2
;
465 enum rtx_code code
= GET_CODE (x
);
466 machine_mode mode
= GET_MODE (x
);
467 machine_mode op_mode
;
468 bool can_appear
= (flags
& PR_CAN_APPEAR
) != 0;
469 bool valid_ops
= true;
471 if (!(flags
& PR_HANDLE_MEM
) && MEM_P (x
) && !MEM_READONLY_P (x
))
473 /* If unsafe, change MEMs to CLOBBERs or SCRATCHes (to preserve whether
474 they have side effects or not). */
475 *px
= (side_effects_p (x
)
476 ? gen_rtx_CLOBBER (GET_MODE (x
), const0_rtx
)
477 : gen_rtx_SCRATCH (GET_MODE (x
)));
481 /* If X is OLD_RTX, return NEW_RTX. But not if replacing only within an
482 address, and we are *not* inside one. */
489 /* If this is an expression, try recursive substitution. */
490 switch (GET_RTX_CLASS (code
))
494 op_mode
= GET_MODE (op0
);
495 valid_ops
&= propagate_rtx_1 (&op0
, old_rtx
, new_rtx
, flags
);
496 if (op0
== XEXP (x
, 0))
498 tem
= simplify_gen_unary (code
, mode
, op0
, op_mode
);
505 valid_ops
&= propagate_rtx_1 (&op0
, old_rtx
, new_rtx
, flags
);
506 valid_ops
&= propagate_rtx_1 (&op1
, old_rtx
, new_rtx
, flags
);
507 if (op0
== XEXP (x
, 0) && op1
== XEXP (x
, 1))
509 tem
= simplify_gen_binary (code
, mode
, op0
, op1
);
513 case RTX_COMM_COMPARE
:
516 op_mode
= GET_MODE (op0
) != VOIDmode
? GET_MODE (op0
) : GET_MODE (op1
);
517 valid_ops
&= propagate_rtx_1 (&op0
, old_rtx
, new_rtx
, flags
);
518 valid_ops
&= propagate_rtx_1 (&op1
, old_rtx
, new_rtx
, flags
);
519 if (op0
== XEXP (x
, 0) && op1
== XEXP (x
, 1))
521 tem
= simplify_gen_relational (code
, mode
, op_mode
, op0
, op1
);
525 case RTX_BITFIELD_OPS
:
529 op_mode
= GET_MODE (op0
);
530 valid_ops
&= propagate_rtx_1 (&op0
, old_rtx
, new_rtx
, flags
);
531 valid_ops
&= propagate_rtx_1 (&op1
, old_rtx
, new_rtx
, flags
);
532 valid_ops
&= propagate_rtx_1 (&op2
, old_rtx
, new_rtx
, flags
);
533 if (op0
== XEXP (x
, 0) && op1
== XEXP (x
, 1) && op2
== XEXP (x
, 2))
535 if (op_mode
== VOIDmode
)
536 op_mode
= GET_MODE (op0
);
537 tem
= simplify_gen_ternary (code
, mode
, op_mode
, op0
, op1
, op2
);
541 /* The only case we try to handle is a SUBREG. */
545 valid_ops
&= propagate_rtx_1 (&op0
, old_rtx
, new_rtx
, flags
);
546 if (op0
== XEXP (x
, 0))
548 tem
= simplify_gen_subreg (mode
, op0
, GET_MODE (SUBREG_REG (x
)),
554 if (code
== MEM
&& x
!= new_rtx
)
559 /* There are some addresses that we cannot work on. */
560 if (!can_simplify_addr (op0
))
563 op0
= new_op0
= targetm
.delegitimize_address (op0
);
564 valid_ops
&= propagate_rtx_1 (&new_op0
, old_rtx
, new_rtx
,
565 flags
| PR_CAN_APPEAR
);
567 /* Dismiss transformation that we do not want to carry on. */
570 || !(GET_MODE (new_op0
) == GET_MODE (op0
)
571 || GET_MODE (new_op0
) == VOIDmode
))
574 canonicalize_address (new_op0
);
576 /* Copy propagations are always ok. Otherwise check the costs. */
577 if (!(REG_P (old_rtx
) && REG_P (new_rtx
))
578 && !should_replace_address (op0
, new_op0
, GET_MODE (x
),
580 flags
& PR_OPTIMIZE_FOR_SPEED
))
583 tem
= replace_equiv_address_nv (x
, new_op0
);
586 else if (code
== LO_SUM
)
591 /* The only simplification we do attempts to remove references to op0
592 or make it constant -- in both cases, op0's invalidity will not
593 make the result invalid. */
594 propagate_rtx_1 (&op0
, old_rtx
, new_rtx
, flags
| PR_CAN_APPEAR
);
595 valid_ops
&= propagate_rtx_1 (&op1
, old_rtx
, new_rtx
, flags
);
596 if (op0
== XEXP (x
, 0) && op1
== XEXP (x
, 1))
599 /* (lo_sum (high x) x) -> x */
600 if (GET_CODE (op0
) == HIGH
&& rtx_equal_p (XEXP (op0
, 0), op1
))
603 tem
= gen_rtx_LO_SUM (mode
, op0
, op1
);
605 /* OP1 is likely not a legitimate address, otherwise there would have
606 been no LO_SUM. We want it to disappear if it is invalid, return
607 false in that case. */
608 return memory_address_p (mode
, tem
);
611 else if (code
== REG
)
613 if (rtx_equal_p (x
, old_rtx
))
625 /* No change, no trouble. */
631 /* The replacement we made so far is valid, if all of the recursive
632 replacements were valid, or we could simplify everything to
634 return valid_ops
|| can_appear
|| CONSTANT_P (tem
);
638 /* Return true if X constains a non-constant mem. */
641 varying_mem_p (const_rtx x
)
643 subrtx_iterator::array_type array
;
644 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
645 if (MEM_P (*iter
) && !MEM_READONLY_P (*iter
))
651 /* Replace all occurrences of OLD in X with NEW and try to simplify the
652 resulting expression (in mode MODE). Return a new expression if it is
653 a constant, otherwise X.
655 Simplifications where occurrences of NEW collapse to a constant are always
656 accepted. All simplifications are accepted if NEW is a pseudo too.
657 Otherwise, we accept simplifications that have a lower or equal cost. */
660 propagate_rtx (rtx x
, machine_mode mode
, rtx old_rtx
, rtx new_rtx
,
667 if (REG_P (new_rtx
) && REGNO (new_rtx
) < FIRST_PSEUDO_REGISTER
)
672 || CONSTANT_P (new_rtx
)
673 || (GET_CODE (new_rtx
) == SUBREG
674 && REG_P (SUBREG_REG (new_rtx
))
675 && (GET_MODE_SIZE (mode
)
676 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (new_rtx
))))))
677 flags
|= PR_CAN_APPEAR
;
678 if (!varying_mem_p (new_rtx
))
679 flags
|= PR_HANDLE_MEM
;
682 flags
|= PR_OPTIMIZE_FOR_SPEED
;
685 collapsed
= propagate_rtx_1 (&tem
, old_rtx
, copy_rtx (new_rtx
), flags
);
686 if (tem
== x
|| !collapsed
)
689 /* gen_lowpart_common will not be able to process VOIDmode entities other
691 if (GET_MODE (tem
) == VOIDmode
&& !CONST_INT_P (tem
))
694 if (GET_MODE (tem
) == VOIDmode
)
695 tem
= rtl_hooks
.gen_lowpart_no_emit (mode
, tem
);
697 gcc_assert (GET_MODE (tem
) == mode
);
705 /* Return true if the register from reference REF is killed
706 between FROM to (but not including) TO. */
709 local_ref_killed_between_p (df_ref ref
, rtx_insn
*from
, rtx_insn
*to
)
713 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
719 FOR_EACH_INSN_DEF (def
, insn
)
720 if (DF_REF_REGNO (ref
) == DF_REF_REGNO (def
))
727 /* Check if the given DEF is available in INSN. This would require full
728 computation of available expressions; we check only restricted conditions:
729 - if DEF is the sole definition of its register, go ahead;
730 - in the same basic block, we check for no definitions killing the
731 definition of DEF_INSN;
732 - if USE's basic block has DEF's basic block as the sole predecessor,
733 we check if the definition is killed after DEF_INSN or before
734 TARGET_INSN insn, in their respective basic blocks. */
736 use_killed_between (df_ref use
, rtx_insn
*def_insn
, rtx_insn
*target_insn
)
738 basic_block def_bb
= BLOCK_FOR_INSN (def_insn
);
739 basic_block target_bb
= BLOCK_FOR_INSN (target_insn
);
743 /* We used to have a def reaching a use that is _before_ the def,
744 with the def not dominating the use even though the use and def
745 are in the same basic block, when a register may be used
746 uninitialized in a loop. This should not happen anymore since
747 we do not use reaching definitions, but still we test for such
748 cases and assume that DEF is not available. */
749 if (def_bb
== target_bb
750 ? DF_INSN_LUID (def_insn
) >= DF_INSN_LUID (target_insn
)
751 : !dominated_by_p (CDI_DOMINATORS
, target_bb
, def_bb
))
754 /* Check if the reg in USE has only one definition. We already
755 know that this definition reaches use, or we wouldn't be here.
756 However, this is invalid for hard registers because if they are
757 live at the beginning of the function it does not mean that we
758 have an uninitialized access. */
759 regno
= DF_REF_REGNO (use
);
760 def
= DF_REG_DEF_CHAIN (regno
);
762 && DF_REF_NEXT_REG (def
) == NULL
763 && regno
>= FIRST_PSEUDO_REGISTER
)
766 /* Check locally if we are in the same basic block. */
767 if (def_bb
== target_bb
)
768 return local_ref_killed_between_p (use
, def_insn
, target_insn
);
770 /* Finally, if DEF_BB is the sole predecessor of TARGET_BB. */
771 if (single_pred_p (target_bb
)
772 && single_pred (target_bb
) == def_bb
)
776 /* See if USE is killed between DEF_INSN and the last insn in the
777 basic block containing DEF_INSN. */
778 x
= df_bb_regno_last_def_find (def_bb
, regno
);
779 if (x
&& DF_INSN_LUID (DF_REF_INSN (x
)) >= DF_INSN_LUID (def_insn
))
782 /* See if USE is killed between TARGET_INSN and the first insn in the
783 basic block containing TARGET_INSN. */
784 x
= df_bb_regno_first_def_find (target_bb
, regno
);
785 if (x
&& DF_INSN_LUID (DF_REF_INSN (x
)) < DF_INSN_LUID (target_insn
))
791 /* Otherwise assume the worst case. */
796 /* Check if all uses in DEF_INSN can be used in TARGET_INSN. This
797 would require full computation of available expressions;
798 we check only restricted conditions, see use_killed_between. */
800 all_uses_available_at (rtx_insn
*def_insn
, rtx_insn
*target_insn
)
803 struct df_insn_info
*insn_info
= DF_INSN_INFO_GET (def_insn
);
804 rtx def_set
= single_set (def_insn
);
807 gcc_assert (def_set
);
809 /* If target_insn comes right after def_insn, which is very common
810 for addresses, we can use a quicker test. Ignore debug insns
811 other than target insns for this. */
812 next
= NEXT_INSN (def_insn
);
813 while (next
&& next
!= target_insn
&& DEBUG_INSN_P (next
))
814 next
= NEXT_INSN (next
);
815 if (next
== target_insn
&& REG_P (SET_DEST (def_set
)))
817 rtx def_reg
= SET_DEST (def_set
);
819 /* If the insn uses the reg that it defines, the substitution is
821 FOR_EACH_INSN_INFO_USE (use
, insn_info
)
822 if (rtx_equal_p (DF_REF_REG (use
), def_reg
))
824 FOR_EACH_INSN_INFO_EQ_USE (use
, insn_info
)
825 if (rtx_equal_p (DF_REF_REG (use
), def_reg
))
830 rtx def_reg
= REG_P (SET_DEST (def_set
)) ? SET_DEST (def_set
) : NULL_RTX
;
832 /* Look at all the uses of DEF_INSN, and see if they are not
833 killed between DEF_INSN and TARGET_INSN. */
834 FOR_EACH_INSN_INFO_USE (use
, insn_info
)
836 if (def_reg
&& rtx_equal_p (DF_REF_REG (use
), def_reg
))
838 if (use_killed_between (use
, def_insn
, target_insn
))
841 FOR_EACH_INSN_INFO_EQ_USE (use
, insn_info
)
843 if (def_reg
&& rtx_equal_p (DF_REF_REG (use
), def_reg
))
845 if (use_killed_between (use
, def_insn
, target_insn
))
854 static df_ref
*active_defs
;
855 #ifdef ENABLE_CHECKING
856 static sparseset active_defs_check
;
859 /* Fill the ACTIVE_DEFS array with the use->def link for the registers
860 mentioned in USE_REC. Register the valid entries in ACTIVE_DEFS_CHECK
861 too, for checking purposes. */
864 register_active_defs (df_ref use
)
866 for (; use
; use
= DF_REF_NEXT_LOC (use
))
868 df_ref def
= get_def_for_use (use
);
869 int regno
= DF_REF_REGNO (use
);
871 #ifdef ENABLE_CHECKING
872 sparseset_set_bit (active_defs_check
, regno
);
874 active_defs
[regno
] = def
;
879 /* Build the use->def links that we use to update the dataflow info
880 for new uses. Note that building the links is very cheap and if
881 it were done earlier, they could be used to rule out invalid
882 propagations (in addition to what is done in all_uses_available_at).
883 I'm not doing this yet, though. */
886 update_df_init (rtx_insn
*def_insn
, rtx_insn
*insn
)
888 #ifdef ENABLE_CHECKING
889 sparseset_clear (active_defs_check
);
891 register_active_defs (DF_INSN_USES (def_insn
));
892 register_active_defs (DF_INSN_USES (insn
));
893 register_active_defs (DF_INSN_EQ_USES (insn
));
897 /* Update the USE_DEF_REF array for the given use, using the active definitions
898 in the ACTIVE_DEFS array to match pseudos to their def. */
901 update_uses (df_ref use
)
903 for (; use
; use
= DF_REF_NEXT_LOC (use
))
905 int regno
= DF_REF_REGNO (use
);
907 /* Set up the use-def chain. */
908 if (DF_REF_ID (use
) >= (int) use_def_ref
.length ())
909 use_def_ref
.safe_grow_cleared (DF_REF_ID (use
) + 1);
911 #ifdef ENABLE_CHECKING
912 gcc_assert (sparseset_bit_p (active_defs_check
, regno
));
914 use_def_ref
[DF_REF_ID (use
)] = active_defs
[regno
];
919 /* Update the USE_DEF_REF array for the uses in INSN. Only update note
920 uses if NOTES_ONLY is true. */
923 update_df (rtx_insn
*insn
, rtx note
)
925 struct df_insn_info
*insn_info
= DF_INSN_INFO_GET (insn
);
929 df_uses_create (&XEXP (note
, 0), insn
, DF_REF_IN_NOTE
);
930 df_notes_rescan (insn
);
934 df_uses_create (&PATTERN (insn
), insn
, 0);
935 df_insn_rescan (insn
);
936 update_uses (DF_INSN_INFO_USES (insn_info
));
939 update_uses (DF_INSN_INFO_EQ_USES (insn_info
));
943 /* Try substituting NEW into LOC, which originated from forward propagation
944 of USE's value from DEF_INSN. SET_REG_EQUAL says whether we are
945 substituting the whole SET_SRC, so we can set a REG_EQUAL note if the
946 new insn is not recognized. Return whether the substitution was
950 try_fwprop_subst (df_ref use
, rtx
*loc
, rtx new_rtx
, rtx_insn
*def_insn
,
953 rtx_insn
*insn
= DF_REF_INSN (use
);
954 rtx set
= single_set (insn
);
956 bool speed
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn
));
960 update_df_init (def_insn
, insn
);
962 /* forward_propagate_subreg may be operating on an instruction with
963 multiple sets. If so, assume the cost of the new instruction is
964 not greater than the old one. */
966 old_cost
= set_src_cost (SET_SRC (set
), speed
);
969 fprintf (dump_file
, "\nIn insn %d, replacing\n ", INSN_UID (insn
));
970 print_inline_rtx (dump_file
, *loc
, 2);
971 fprintf (dump_file
, "\n with ");
972 print_inline_rtx (dump_file
, new_rtx
, 2);
973 fprintf (dump_file
, "\n");
976 validate_unshare_change (insn
, loc
, new_rtx
, true);
977 if (!verify_changes (0))
980 fprintf (dump_file
, "Changes to insn %d not recognized\n",
985 else if (DF_REF_TYPE (use
) == DF_REF_REG_USE
987 && set_src_cost (SET_SRC (set
), speed
) > old_cost
)
990 fprintf (dump_file
, "Changes to insn %d not profitable\n",
998 fprintf (dump_file
, "Changed insn %d\n", INSN_UID (insn
));
1004 confirm_change_group ();
1011 /* Can also record a simplified value in a REG_EQUAL note,
1012 making a new one if one does not already exist. */
1016 fprintf (dump_file
, " Setting REG_EQUAL note\n");
1018 note
= set_unique_reg_note (insn
, REG_EQUAL
, copy_rtx (new_rtx
));
1022 if ((ok
|| note
) && !CONSTANT_P (new_rtx
))
1023 update_df (insn
, note
);
1028 /* For the given single_set INSN, containing SRC known to be a
1029 ZERO_EXTEND or SIGN_EXTEND of a register, return true if INSN
1030 is redundant due to the register being set by a LOAD_EXTEND_OP
1031 load from memory. */
1034 free_load_extend (rtx src
, rtx_insn
*insn
)
1039 reg
= XEXP (src
, 0);
1040 #ifdef LOAD_EXTEND_OP
1041 if (LOAD_EXTEND_OP (GET_MODE (reg
)) != GET_CODE (src
))
1045 FOR_EACH_INSN_USE (use
, insn
)
1046 if (!DF_REF_IS_ARTIFICIAL (use
)
1047 && DF_REF_TYPE (use
) == DF_REF_REG_USE
1048 && DF_REF_REG (use
) == reg
)
1053 def
= get_def_for_use (use
);
1057 if (DF_REF_IS_ARTIFICIAL (def
))
1060 if (NONJUMP_INSN_P (DF_REF_INSN (def
)))
1062 rtx patt
= PATTERN (DF_REF_INSN (def
));
1064 if (GET_CODE (patt
) == SET
1065 && GET_CODE (SET_SRC (patt
)) == MEM
1066 && rtx_equal_p (SET_DEST (patt
), reg
))
1072 /* If USE is a subreg, see if it can be replaced by a pseudo. */
1075 forward_propagate_subreg (df_ref use
, rtx_insn
*def_insn
, rtx def_set
)
1077 rtx use_reg
= DF_REF_REG (use
);
1081 /* Only consider subregs... */
1082 machine_mode use_mode
= GET_MODE (use_reg
);
1083 if (GET_CODE (use_reg
) != SUBREG
1084 || !REG_P (SET_DEST (def_set
)))
1087 /* If this is a paradoxical SUBREG... */
1088 if (GET_MODE_SIZE (use_mode
)
1089 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (use_reg
))))
1091 /* If this is a paradoxical SUBREG, we have no idea what value the
1092 extra bits would have. However, if the operand is equivalent to
1093 a SUBREG whose operand is the same as our mode, and all the modes
1094 are within a word, we can just use the inner operand because
1095 these SUBREGs just say how to treat the register. */
1096 use_insn
= DF_REF_INSN (use
);
1097 src
= SET_SRC (def_set
);
1098 if (GET_CODE (src
) == SUBREG
1099 && REG_P (SUBREG_REG (src
))
1100 && REGNO (SUBREG_REG (src
)) >= FIRST_PSEUDO_REGISTER
1101 && GET_MODE (SUBREG_REG (src
)) == use_mode
1102 && subreg_lowpart_p (src
)
1103 && all_uses_available_at (def_insn
, use_insn
))
1104 return try_fwprop_subst (use
, DF_REF_LOC (use
), SUBREG_REG (src
),
1108 /* If this is a SUBREG of a ZERO_EXTEND or SIGN_EXTEND, and the SUBREG
1109 is the low part of the reg being extended then just use the inner
1110 operand. Don't do this if the ZERO_EXTEND or SIGN_EXTEND insn will
1111 be removed due to it matching a LOAD_EXTEND_OP load from memory,
1112 or due to the operation being a no-op when applied to registers.
1113 For example, if we have:
1115 A: (set (reg:DI X) (sign_extend:DI (reg:SI Y)))
1116 B: (... (subreg:SI (reg:DI X)) ...)
1118 and mode_rep_extended says that Y is already sign-extended,
1119 the backend will typically allow A to be combined with the
1120 definition of Y or, failing that, allow A to be deleted after
1121 reload through register tying. Introducing more uses of Y
1122 prevents both optimisations. */
1123 else if (subreg_lowpart_p (use_reg
))
1125 use_insn
= DF_REF_INSN (use
);
1126 src
= SET_SRC (def_set
);
1127 if ((GET_CODE (src
) == ZERO_EXTEND
1128 || GET_CODE (src
) == SIGN_EXTEND
)
1129 && REG_P (XEXP (src
, 0))
1130 && REGNO (XEXP (src
, 0)) >= FIRST_PSEUDO_REGISTER
1131 && GET_MODE (XEXP (src
, 0)) == use_mode
1132 && !free_load_extend (src
, def_insn
)
1133 && (targetm
.mode_rep_extended (use_mode
, GET_MODE (src
))
1134 != (int) GET_CODE (src
))
1135 && all_uses_available_at (def_insn
, use_insn
))
1136 return try_fwprop_subst (use
, DF_REF_LOC (use
), XEXP (src
, 0),
1143 /* Try to replace USE with SRC (defined in DEF_INSN) in __asm. */
1146 forward_propagate_asm (df_ref use
, rtx_insn
*def_insn
, rtx def_set
, rtx reg
)
1148 rtx_insn
*use_insn
= DF_REF_INSN (use
);
1149 rtx src
, use_pat
, asm_operands
, new_rtx
, *loc
;
1153 gcc_assert ((DF_REF_FLAGS (use
) & DF_REF_IN_NOTE
) == 0);
1155 src
= SET_SRC (def_set
);
1156 use_pat
= PATTERN (use_insn
);
1158 /* In __asm don't replace if src might need more registers than
1159 reg, as that could increase register pressure on the __asm. */
1160 uses
= DF_INSN_USES (def_insn
);
1161 if (uses
&& DF_REF_NEXT_LOC (uses
))
1164 update_df_init (def_insn
, use_insn
);
1165 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn
));
1166 asm_operands
= NULL_RTX
;
1167 switch (GET_CODE (use_pat
))
1170 asm_operands
= use_pat
;
1173 if (MEM_P (SET_DEST (use_pat
)))
1175 loc
= &SET_DEST (use_pat
);
1176 new_rtx
= propagate_rtx (*loc
, GET_MODE (*loc
), reg
, src
, speed_p
);
1178 validate_unshare_change (use_insn
, loc
, new_rtx
, true);
1180 asm_operands
= SET_SRC (use_pat
);
1183 for (i
= 0; i
< XVECLEN (use_pat
, 0); i
++)
1184 if (GET_CODE (XVECEXP (use_pat
, 0, i
)) == SET
)
1186 if (MEM_P (SET_DEST (XVECEXP (use_pat
, 0, i
))))
1188 loc
= &SET_DEST (XVECEXP (use_pat
, 0, i
));
1189 new_rtx
= propagate_rtx (*loc
, GET_MODE (*loc
), reg
,
1192 validate_unshare_change (use_insn
, loc
, new_rtx
, true);
1194 asm_operands
= SET_SRC (XVECEXP (use_pat
, 0, i
));
1196 else if (GET_CODE (XVECEXP (use_pat
, 0, i
)) == ASM_OPERANDS
)
1197 asm_operands
= XVECEXP (use_pat
, 0, i
);
1203 gcc_assert (asm_operands
&& GET_CODE (asm_operands
) == ASM_OPERANDS
);
1204 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (asm_operands
); i
++)
1206 loc
= &ASM_OPERANDS_INPUT (asm_operands
, i
);
1207 new_rtx
= propagate_rtx (*loc
, GET_MODE (*loc
), reg
, src
, speed_p
);
1209 validate_unshare_change (use_insn
, loc
, new_rtx
, true);
1212 if (num_changes_pending () == 0 || !apply_change_group ())
1215 update_df (use_insn
, NULL
);
1220 /* Try to replace USE with SRC (defined in DEF_INSN) and simplify the
1224 forward_propagate_and_simplify (df_ref use
, rtx_insn
*def_insn
, rtx def_set
)
1226 rtx_insn
*use_insn
= DF_REF_INSN (use
);
1227 rtx use_set
= single_set (use_insn
);
1228 rtx src
, reg
, new_rtx
, *loc
;
1233 if (INSN_CODE (use_insn
) < 0)
1234 asm_use
= asm_noperands (PATTERN (use_insn
));
1236 if (!use_set
&& asm_use
< 0 && !DEBUG_INSN_P (use_insn
))
1239 /* Do not propagate into PC, CC0, etc. */
1240 if (use_set
&& GET_MODE (SET_DEST (use_set
)) == VOIDmode
)
1243 /* If def and use are subreg, check if they match. */
1244 reg
= DF_REF_REG (use
);
1245 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SET_DEST (def_set
)) == SUBREG
)
1247 if (SUBREG_BYTE (SET_DEST (def_set
)) != SUBREG_BYTE (reg
))
1250 /* Check if the def had a subreg, but the use has the whole reg. */
1251 else if (REG_P (reg
) && GET_CODE (SET_DEST (def_set
)) == SUBREG
)
1253 /* Check if the use has a subreg, but the def had the whole reg. Unlike the
1254 previous case, the optimization is possible and often useful indeed. */
1255 else if (GET_CODE (reg
) == SUBREG
&& REG_P (SET_DEST (def_set
)))
1256 reg
= SUBREG_REG (reg
);
1258 /* Make sure that we can treat REG as having the same mode as the
1259 source of DEF_SET. */
1260 if (GET_MODE (SET_DEST (def_set
)) != GET_MODE (reg
))
1263 /* Check if the substitution is valid (last, because it's the most
1264 expensive check!). */
1265 src
= SET_SRC (def_set
);
1266 if (!CONSTANT_P (src
) && !all_uses_available_at (def_insn
, use_insn
))
1269 /* Check if the def is loading something from the constant pool; in this
1270 case we would undo optimization such as compress_float_constant.
1271 Still, we can set a REG_EQUAL note. */
1272 if (MEM_P (src
) && MEM_READONLY_P (src
))
1274 rtx x
= avoid_constant_pool_reference (src
);
1275 if (x
!= src
&& use_set
)
1277 rtx note
= find_reg_note (use_insn
, REG_EQUAL
, NULL_RTX
);
1278 rtx old_rtx
= note
? XEXP (note
, 0) : SET_SRC (use_set
);
1279 rtx new_rtx
= simplify_replace_rtx (old_rtx
, src
, x
);
1280 if (old_rtx
!= new_rtx
)
1281 set_unique_reg_note (use_insn
, REG_EQUAL
, copy_rtx (new_rtx
));
1287 return forward_propagate_asm (use
, def_insn
, def_set
, reg
);
1289 /* Else try simplifying. */
1291 if (DF_REF_TYPE (use
) == DF_REF_REG_MEM_STORE
)
1293 loc
= &SET_DEST (use_set
);
1294 set_reg_equal
= false;
1298 loc
= &INSN_VAR_LOCATION_LOC (use_insn
);
1299 set_reg_equal
= false;
1303 rtx note
= find_reg_note (use_insn
, REG_EQUAL
, NULL_RTX
);
1304 if (DF_REF_FLAGS (use
) & DF_REF_IN_NOTE
)
1305 loc
= &XEXP (note
, 0);
1307 loc
= &SET_SRC (use_set
);
1309 /* Do not replace an existing REG_EQUAL note if the insn is not
1310 recognized. Either we're already replacing in the note, or we'll
1311 separately try plugging the definition in the note and simplifying.
1312 And only install a REQ_EQUAL note when the destination is a REG
1313 that isn't mentioned in USE_SET, as the note would be invalid
1314 otherwise. We also don't want to install a note if we are merely
1315 propagating a pseudo since verifying that this pseudo isn't dead
1316 is a pain; moreover such a note won't help anything. */
1317 set_reg_equal
= (note
== NULL_RTX
1318 && REG_P (SET_DEST (use_set
))
1320 && !(GET_CODE (src
) == SUBREG
1321 && REG_P (SUBREG_REG (src
)))
1322 && !reg_mentioned_p (SET_DEST (use_set
),
1323 SET_SRC (use_set
)));
1326 if (GET_MODE (*loc
) == VOIDmode
)
1327 mode
= GET_MODE (SET_DEST (use_set
));
1329 mode
= GET_MODE (*loc
);
1331 new_rtx
= propagate_rtx (*loc
, mode
, reg
, src
,
1332 optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn
)));
1337 return try_fwprop_subst (use
, loc
, new_rtx
, def_insn
, set_reg_equal
);
1341 /* Given a use USE of an insn, if it has a single reaching
1342 definition, try to forward propagate it into that insn.
1343 Return true if cfg cleanup will be needed. */
1346 forward_propagate_into (df_ref use
)
1349 rtx_insn
*def_insn
, *use_insn
;
1353 if (DF_REF_FLAGS (use
) & DF_REF_READ_WRITE
)
1355 if (DF_REF_IS_ARTIFICIAL (use
))
1358 /* Only consider uses that have a single definition. */
1359 def
= get_def_for_use (use
);
1362 if (DF_REF_FLAGS (def
) & DF_REF_READ_WRITE
)
1364 if (DF_REF_IS_ARTIFICIAL (def
))
1367 /* Do not propagate loop invariant definitions inside the loop. */
1368 if (DF_REF_BB (def
)->loop_father
!= DF_REF_BB (use
)->loop_father
)
1371 /* Check if the use is still present in the insn! */
1372 use_insn
= DF_REF_INSN (use
);
1373 if (DF_REF_FLAGS (use
) & DF_REF_IN_NOTE
)
1374 parent
= find_reg_note (use_insn
, REG_EQUAL
, NULL_RTX
);
1376 parent
= PATTERN (use_insn
);
1378 if (!reg_mentioned_p (DF_REF_REG (use
), parent
))
1381 def_insn
= DF_REF_INSN (def
);
1382 if (multiple_sets (def_insn
))
1384 def_set
= single_set (def_insn
);
1388 /* Only try one kind of propagation. If two are possible, we'll
1389 do it on the following iterations. */
1390 if (forward_propagate_and_simplify (use
, def_insn
, def_set
)
1391 || forward_propagate_subreg (use
, def_insn
, def_set
))
1393 if (cfun
->can_throw_non_call_exceptions
1394 && find_reg_note (use_insn
, REG_EH_REGION
, NULL_RTX
)
1395 && purge_dead_edges (DF_REF_BB (use
)))
1406 calculate_dominance_info (CDI_DOMINATORS
);
1408 /* We do not always want to propagate into loops, so we have to find
1409 loops and be careful about them. Avoid CFG modifications so that
1410 we don't have to update dominance information afterwards for
1411 build_single_def_use_links. */
1412 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
1414 build_single_def_use_links ();
1415 df_set_flags (DF_DEFER_INSN_RESCAN
);
1417 active_defs
= XNEWVEC (df_ref
, max_reg_num ());
1418 #ifdef ENABLE_CHECKING
1419 active_defs_check
= sparseset_alloc (max_reg_num ());
1426 loop_optimizer_finalize ();
1428 use_def_ref
.release ();
1430 #ifdef ENABLE_CHECKING
1431 sparseset_free (active_defs_check
);
1434 free_dominance_info (CDI_DOMINATORS
);
1436 delete_trivially_dead_insns (get_insns (), max_reg_num ());
1440 "\nNumber of successful forward propagations: %d\n\n",
1445 /* Main entry point. */
1450 return optimize
> 0 && flag_forward_propagate
;
1457 bool need_cleanup
= false;
1461 /* Go through all the uses. df_uses_create will create new ones at the
1462 end, and we'll go through them as well.
1464 Do not forward propagate addresses into loops until after unrolling.
1465 CSE did so because it was able to fix its own mess, but we are not. */
1467 for (i
= 0; i
< DF_USES_TABLE_SIZE (); i
++)
1469 df_ref use
= DF_USES_GET (i
);
1471 if (DF_REF_TYPE (use
) == DF_REF_REG_USE
1472 || DF_REF_BB (use
)->loop_father
== NULL
1473 /* The outer most loop is not really a loop. */
1474 || loop_outer (DF_REF_BB (use
)->loop_father
) == NULL
)
1475 need_cleanup
|= forward_propagate_into (use
);
1486 const pass_data pass_data_rtl_fwprop
=
1488 RTL_PASS
, /* type */
1489 "fwprop1", /* name */
1490 OPTGROUP_NONE
, /* optinfo_flags */
1491 TV_FWPROP
, /* tv_id */
1492 0, /* properties_required */
1493 0, /* properties_provided */
1494 0, /* properties_destroyed */
1495 0, /* todo_flags_start */
1496 TODO_df_finish
, /* todo_flags_finish */
1499 class pass_rtl_fwprop
: public rtl_opt_pass
1502 pass_rtl_fwprop (gcc::context
*ctxt
)
1503 : rtl_opt_pass (pass_data_rtl_fwprop
, ctxt
)
1506 /* opt_pass methods: */
1507 virtual bool gate (function
*) { return gate_fwprop (); }
1508 virtual unsigned int execute (function
*) { return fwprop (); }
1510 }; // class pass_rtl_fwprop
1515 make_pass_rtl_fwprop (gcc::context
*ctxt
)
1517 return new pass_rtl_fwprop (ctxt
);
1524 bool need_cleanup
= false;
1528 /* Go through all the uses. df_uses_create will create new ones at the
1529 end, and we'll go through them as well. */
1530 for (i
= 0; i
< DF_USES_TABLE_SIZE (); i
++)
1532 df_ref use
= DF_USES_GET (i
);
1534 if (DF_REF_TYPE (use
) != DF_REF_REG_USE
1535 && DF_REF_BB (use
)->loop_father
!= NULL
1536 /* The outer most loop is not really a loop. */
1537 && loop_outer (DF_REF_BB (use
)->loop_father
) != NULL
)
1538 need_cleanup
|= forward_propagate_into (use
);
1550 const pass_data pass_data_rtl_fwprop_addr
=
1552 RTL_PASS
, /* type */
1553 "fwprop2", /* name */
1554 OPTGROUP_NONE
, /* optinfo_flags */
1555 TV_FWPROP
, /* tv_id */
1556 0, /* properties_required */
1557 0, /* properties_provided */
1558 0, /* properties_destroyed */
1559 0, /* todo_flags_start */
1560 TODO_df_finish
, /* todo_flags_finish */
1563 class pass_rtl_fwprop_addr
: public rtl_opt_pass
1566 pass_rtl_fwprop_addr (gcc::context
*ctxt
)
1567 : rtl_opt_pass (pass_data_rtl_fwprop_addr
, ctxt
)
1570 /* opt_pass methods: */
1571 virtual bool gate (function
*) { return gate_fwprop (); }
1572 virtual unsigned int execute (function
*) { return fwprop_addr (); }
1574 }; // class pass_rtl_fwprop_addr
1579 make_pass_rtl_fwprop_addr (gcc::context
*ctxt
)
1581 return new pass_rtl_fwprop_addr (ctxt
);