1 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
4 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
5 Use GET_MODE_CLASS for scalar floating point.
7 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
11 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
12 Fix call of call_cgraph_insertion_hooks.
14 2018-01-18 Martin Sebor <msebor@redhat.com>
16 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
18 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
21 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
24 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
27 * common.opt: (-ffile-prefix-map): New option.
28 * opts.c (common_handle_option): Defer it.
29 * opts-global.c (handle_common_deferred_options): Handle it.
30 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
31 * file-prefix-map.h: New file.
32 (remap_debug_filename, add_debug_prefix_map): ...here.
33 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
34 * final.c (debug_prefix_map, add_debug_prefix_map
35 remap_debug_filename): Move to...
36 * file-prefix-map.c: New file.
37 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
38 generalize, get rid of alloca(), use strrchr() instead of strchr().
39 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
40 Implement in terms of add_prefix_map().
41 (remap_macro_filename, remap_debug_filename): Implement in term of
43 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
44 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
45 * dbxout.c: Include file-prefix-map.h.
47 * vmsdbgout.c: Likewise.
48 * xcoffout.c: Likewise.
49 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
50 * doc/cppopts.texi (-fmacro-prefix-map): Document.
51 * doc/invoke.texi (-ffile-prefix-map): Document.
52 (-fdebug-prefix-map): Update description.
54 2018-01-18 Martin Liska <mliska@suse.cz>
56 * config/i386/i386.c (indirect_thunk_name): Document that also
58 (output_indirect_thunk): Document why both instructions
59 (pause and lfence) are generated.
61 2018-01-18 Richard Biener <rguenther@suse.de>
63 PR tree-optimization/83887
64 * graphite-scop-detection.c
65 (scop_detection::get_nearest_dom_with_single_entry): Remove.
66 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
67 (scop_detection::merge_sese): Re-implement with a flood-fill
68 algorithm that properly finds a SESE region if it exists.
70 2018-01-18 Jakub Jelinek <jakub@redhat.com>
73 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
74 pointer_diff optimizations use view_convert instead of convert.
76 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
78 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
79 Generate different code for -mno-speculate-indirect-jumps.
80 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
81 (*call_indirect_aix<mode>): Disable for
82 -mno-speculate-indirect-jumps.
83 (*call_indirect_aix<mode>_nospec): New define_insn.
84 (*call_value_indirect_aix<mode>): Disable for
85 -mno-speculate-indirect-jumps.
86 (*call_value_indirect_aix<mode>_nospec): New define_insn.
87 (*sibcall_nonlocal_sysv<mode>): Generate different code for
88 -mno-speculate-indirect-jumps.
89 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
91 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
93 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
94 long double type, set the flags for noting the default long double
95 type, even if we don't pass or return a long double type.
97 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
100 * ipa-inline.c (flatten_function): Do not overwrite final inlining
103 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
105 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
106 support for merge[hl].
107 (fold_mergehl_helper): New helper function.
108 (tree-vector-builder.h): New #include for tree_vector_builder usage.
109 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
110 (altivec_vmrglw_direct): Add xxmrglw insn.
112 2018-01-17 Andrew Waterman <andrew@sifive.com>
114 * config/riscv/riscv.c (riscv_conditional_register_usage): If
115 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
117 2018-01-17 David Malcolm <dmalcolm@redhat.com>
120 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
121 call the lto_location_cache before reading the
122 DECL_SOURCE_LOCATION of the types.
124 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
125 Richard Sandiford <richard.sandiford@linaro.org>
127 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
128 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
129 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
130 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
131 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
133 * config/aarch64/constraints.md (aarch64_movti_operand):
135 * config/aarch64/predicates.md (Uti): Add new constraint.
137 2018-01-17 Carl Love <cel@us.ibm.com>
138 * config/rs6000/vsx.md (define_expand xl_len_r,
139 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
140 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
142 (define_expand, define_insn): Move the shift left from the
143 define_insn to the define_expand for lxvl and stxvl instructions.
144 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
145 and XL_LEN_R definitions to PURE.
147 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
149 * config/i386/i386.c (indirect_thunk_name): Declare regno
150 as unsigned int. Compare regno with INVALID_REGNUM.
151 (output_indirect_thunk): Ditto.
152 (output_indirect_thunk_function): Ditto.
153 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
154 in the call to output_indirect_thunk_function.
156 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
159 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
160 rather than the size of inner_type to determine the stack slot size
161 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
163 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
166 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
169 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
171 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
172 endian Linux systems to optionally enable multilibs for selecting
173 the long double type if the user configured an explicit type.
174 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
175 have no long double multilibs if not defined.
176 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
177 warn if the user used -mabi={ieee,ibm}longdouble and we built
178 multilibs for long double.
179 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
180 appropriate multilib option.
181 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
183 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
184 for building long double multilibs.
185 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
187 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
189 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
192 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
194 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
197 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
200 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
203 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
205 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
206 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
208 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
210 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
211 different rtl trees depending on TARGET_64BIT.
212 (rs6000_gen_lvx): Likewise.
214 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
216 * config/visium/visium.md (nop): Tweak comment.
217 (hazard_nop): Likewise.
219 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
221 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
222 -mspeculate-indirect-jumps.
223 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
224 for -mno-speculate-indirect-jumps.
225 (*call_indirect_elfv2<mode>_nospec): New define_insn.
226 (*call_value_indirect_elfv2<mode>): Disable for
227 -mno-speculate-indirect-jumps.
228 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
229 (indirect_jump): Emit different RTL for
230 -mno-speculate-indirect-jumps.
231 (*indirect_jump<mode>): Disable for
232 -mno-speculate-indirect-jumps.
233 (*indirect_jump<mode>_nospec): New define_insn.
234 (tablejump): Emit different RTL for
235 -mno-speculate-indirect-jumps.
236 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
237 (tablejumpsi_nospec): New define_expand.
238 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
239 (tablejumpdi_nospec): New define_expand.
240 (*tablejump<mode>_internal1): Disable for
241 -mno-speculate-indirect-jumps.
242 (*tablejump<mode>_internal1_nospec): New define_insn.
243 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
246 2018-01-16 Artyom Skrobov tyomitch@gmail.com
248 * caller-save.c (insert_save): Drop unnecessary parameter. All
251 2018-01-16 Jakub Jelinek <jakub@redhat.com>
252 Richard Biener <rguenth@suse.de>
255 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
256 return early, inline manually is_gimple_sizepos. Make sure if we
257 call gimplify_expr we don't end up with a gimple constant.
258 * tree.c (variably_modified_type_p): Don't return true for
259 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
260 * gimplify.h (is_gimple_sizepos): Remove.
262 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
264 PR tree-optimization/83857
265 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
266 vectorizable_live_operation for pure SLP statements.
267 (vectorizable_live_operation): Handle PHIs.
269 2018-01-16 Richard Biener <rguenther@suse.de>
271 PR tree-optimization/83867
272 * tree-vect-stmts.c (vect_transform_stmt): Precompute
273 nested_in_vect_loop_p since the scalar stmt may get invalidated.
275 2018-01-16 Jakub Jelinek <jakub@redhat.com>
278 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
279 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
280 If off is not INTEGER_CST, issue a may not be aligned warning
281 rather than isn't aligned. Use isn%'t rather than isn't.
282 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
284 <case MULT_EXPR>: Improve the case when bottom and one of the
285 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
286 operand, in that case check if the other operand is multiple of
287 bottom divided by the INTEGER_CST operand.
289 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
292 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
293 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
294 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
295 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
296 * config/pa/pa.c (pa_function_arg_advance): Likewise.
297 (pa_function_arg, pa_arg_partial_bytes): Likewise.
298 (pa_function_arg_size): New function.
300 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
302 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
303 in a separate statement.
305 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
307 PR tree-optimization/83847
308 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
309 group gathers and scatters.
311 2018-01-16 Jakub Jelinek <jakub@redhat.com>
313 PR rtl-optimization/86620
314 * params.def (max-sched-ready-insns): Bump minimum value to 1.
316 PR rtl-optimization/83213
317 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
318 to last if both are JUMP_INSNs.
320 PR tree-optimization/83843
321 * gimple-ssa-store-merging.c
322 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
323 store_immediate_info for bswap/nop orig_stores.
325 2018-01-15 Andrew Waterman <andrew@sifive.com>
327 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
329 <UDIV>: Increase cost if !TARGET_DIV.
331 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
333 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
334 (define_attr "cr_logical_3op"): New.
335 (cceq_ior_compare): Adjust.
336 (cceq_ior_compare_complement): Adjust.
337 (*cceq_rev_compare): Adjust.
338 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
339 (is_cracked_insn): Adjust.
340 (insn_must_be_first_in_group): Adjust.
341 * config/rs6000/40x.md: Adjust.
342 * config/rs6000/440.md: Adjust.
343 * config/rs6000/476.md: Adjust.
344 * config/rs6000/601.md: Adjust.
345 * config/rs6000/603.md: Adjust.
346 * config/rs6000/6xx.md: Adjust.
347 * config/rs6000/7450.md: Adjust.
348 * config/rs6000/7xx.md: Adjust.
349 * config/rs6000/8540.md: Adjust.
350 * config/rs6000/cell.md: Adjust.
351 * config/rs6000/e300c2c3.md: Adjust.
352 * config/rs6000/e500mc.md: Adjust.
353 * config/rs6000/e500mc64.md: Adjust.
354 * config/rs6000/e5500.md: Adjust.
355 * config/rs6000/e6500.md: Adjust.
356 * config/rs6000/mpc.md: Adjust.
357 * config/rs6000/power4.md: Adjust.
358 * config/rs6000/power5.md: Adjust.
359 * config/rs6000/power6.md: Adjust.
360 * config/rs6000/power7.md: Adjust.
361 * config/rs6000/power8.md: Adjust.
362 * config/rs6000/power9.md: Adjust.
363 * config/rs6000/rs64.md: Adjust.
364 * config/rs6000/titan.md: Adjust.
366 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
368 * config/i386/predicates.md (indirect_branch_operand): Rewrite
369 ix86_indirect_branch_register logic.
371 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
373 * config/i386/constraints.md (Bs): Update
374 ix86_indirect_branch_register check. Don't check
375 ix86_indirect_branch_register with GOT_memory_operand.
377 * config/i386/predicates.md (GOT_memory_operand): Don't check
378 ix86_indirect_branch_register here.
379 (GOT32_symbol_operand): Likewise.
381 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
383 * config/i386/predicates.md (constant_call_address_operand):
384 Rewrite ix86_indirect_branch_register logic.
385 (sibcall_insn_operand): Likewise.
387 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
389 * config/i386/constraints.md (Bs): Replace
390 ix86_indirect_branch_thunk_register with
391 ix86_indirect_branch_register.
393 * config/i386/i386.md (indirect_jump): Likewise.
394 (tablejump): Likewise.
395 (*sibcall_memory): Likewise.
396 (*sibcall_value_memory): Likewise.
397 Peepholes of indirect call and jump via memory: Likewise.
398 * config/i386/i386.opt: Likewise.
399 * config/i386/predicates.md (indirect_branch_operand): Likewise.
400 (GOT_memory_operand): Likewise.
401 (call_insn_operand): Likewise.
402 (sibcall_insn_operand): Likewise.
403 (GOT32_symbol_operand): Likewise.
405 2018-01-15 Jakub Jelinek <jakub@redhat.com>
408 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
409 type rather than type addr's type points to.
410 (expand_omp_atomic_mutex): Likewise.
411 (expand_omp_atomic): Likewise.
413 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
416 * config/i386/i386.c (output_indirect_thunk_function): Use
417 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
418 for __x86_return_thunk.
420 2018-01-15 Richard Biener <rguenther@suse.de>
423 * expmed.c (extract_bit_field_1): Fix typo.
425 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
428 * config/arm/iterators.md (VF): New mode iterator.
429 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
430 Remove integer-related logic from pattern.
431 (neon_vabd<mode>_3): Likewise.
433 2018-01-15 Jakub Jelinek <jakub@redhat.com>
436 * common.opt (fstrict-overflow): No longer an alias.
437 (fwrapv-pointer): New option.
438 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
439 also for pointer types based on flag_wrapv_pointer.
440 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
441 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
442 opts->x_flag_wrapv got set.
443 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
444 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
445 POINTER_TYPE_OVERFLOW_UNDEFINED.
446 * match.pd: Likewise in address comparison pattern.
447 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
449 2018-01-15 Richard Biener <rguenther@suse.de>
452 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
453 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
454 Reset type names to their identifier if their TYPE_DECL doesn't
455 have linkage (and thus is used for ODR and devirt).
456 (save_debug_info_for_decl): Remove.
457 (save_debug_info_for_type): Likewise.
458 (add_tree_to_fld_list): Adjust.
459 * tree-pretty-print.c (dump_generic_node): Make dumping of
460 type names more robust.
462 2018-01-15 Richard Biener <rguenther@suse.de>
464 * BASE-VER: Bump to 8.0.1.
466 2018-01-14 Martin Sebor <msebor@redhat.com>
469 * builtins.c (check_access): Avoid warning when the no-warning bit
472 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
474 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
475 * ira-color (allocno_hard_regs_compare): Likewise.
477 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
480 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
481 Use .pushsection/.popsection.
483 2018-01-14 Martin Sebor <msebor@redhat.com>
486 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
488 2018-01-14 Jakub Jelinek <jakub@redhat.com>
490 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
491 entry from extra_headers.
492 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
493 extra_headers, make the list bitwise identical to the i?86-*-* one.
495 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
497 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
498 -mcmodel=large with -mindirect-branch=thunk,
499 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
500 -mfunction-return=thunk-extern.
501 * doc/invoke.texi: Document -mcmodel=large is incompatible with
502 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
503 -mfunction-return=thunk and -mfunction-return=thunk-extern.
505 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
507 * config/i386/i386.c (print_reg): Print the name of the full
508 integer register without '%'.
509 (ix86_print_operand): Handle 'V'.
510 * doc/extend.texi: Document 'V' modifier.
512 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
514 * config/i386/constraints.md (Bs): Disallow memory operand for
515 -mindirect-branch-register.
517 * config/i386/predicates.md (indirect_branch_operand): Likewise.
518 (GOT_memory_operand): Likewise.
519 (call_insn_operand): Likewise.
520 (sibcall_insn_operand): Likewise.
521 (GOT32_symbol_operand): Likewise.
522 * config/i386/i386.md (indirect_jump): Call convert_memory_address
523 for -mindirect-branch-register.
524 (tablejump): Likewise.
525 (*sibcall_memory): Likewise.
526 (*sibcall_value_memory): Likewise.
527 Disallow peepholes of indirect call and jump via memory for
528 -mindirect-branch-register.
529 (*call_pop): Replace m with Bw.
530 (*call_value_pop): Likewise.
531 (*sibcall_pop_memory): Replace m with Bs.
532 * config/i386/i386.opt (mindirect-branch-register): New option.
533 * doc/invoke.texi: Document -mindirect-branch-register option.
535 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
537 * config/i386/i386-protos.h (ix86_output_function_return): New.
538 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
539 set function_return_type.
540 (indirect_thunk_name): Add ret_p to indicate thunk for function
542 (output_indirect_thunk_function): Pass false to
544 (ix86_output_indirect_branch_via_reg): Likewise.
545 (ix86_output_indirect_branch_via_push): Likewise.
546 (output_indirect_thunk_function): Create alias for function
547 return thunk if regno < 0.
548 (ix86_output_function_return): New function.
549 (ix86_handle_fndecl_attribute): Handle function_return.
550 (ix86_attribute_table): Add function_return.
551 * config/i386/i386.h (machine_function): Add
552 function_return_type.
553 * config/i386/i386.md (simple_return_internal): Use
554 ix86_output_function_return.
555 (simple_return_internal_long): Likewise.
556 * config/i386/i386.opt (mfunction-return=): New option.
557 (indirect_branch): Mention -mfunction-return=.
558 * doc/extend.texi: Document function_return function attribute.
559 * doc/invoke.texi: Document -mfunction-return= option.
561 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
563 * config/i386/i386-opts.h (indirect_branch): New.
564 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
565 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
566 with local indirect jump when converting indirect call and jump.
567 (ix86_set_indirect_branch_type): New.
568 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
569 (indirectlabelno): New.
570 (indirect_thunk_needed): Likewise.
571 (indirect_thunk_bnd_needed): Likewise.
572 (indirect_thunks_used): Likewise.
573 (indirect_thunks_bnd_used): Likewise.
574 (INDIRECT_LABEL): Likewise.
575 (indirect_thunk_name): Likewise.
576 (output_indirect_thunk): Likewise.
577 (output_indirect_thunk_function): Likewise.
578 (ix86_output_indirect_branch_via_reg): Likewise.
579 (ix86_output_indirect_branch_via_push): Likewise.
580 (ix86_output_indirect_branch): Likewise.
581 (ix86_output_indirect_jmp): Likewise.
582 (ix86_code_end): Call output_indirect_thunk_function if needed.
583 (ix86_output_call_insn): Call ix86_output_indirect_branch if
585 (ix86_handle_fndecl_attribute): Handle indirect_branch.
586 (ix86_attribute_table): Add indirect_branch.
587 * config/i386/i386.h (machine_function): Add indirect_branch_type
588 and has_local_indirect_jump.
589 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
591 (tablejump): Likewise.
592 (*indirect_jump): Use ix86_output_indirect_jmp.
593 (*tablejump_1): Likewise.
594 (simple_return_indirect_internal): Likewise.
595 * config/i386/i386.opt (mindirect-branch=): New option.
596 (indirect_branch): New.
599 (thunk-inline): Likewise.
600 (thunk-extern): Likewise.
601 * doc/extend.texi: Document indirect_branch function attribute.
602 * doc/invoke.texi: Document -mindirect-branch= option.
604 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
607 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
609 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
611 * ipa-inline.c (want_inline_small_function_p): Return false if
612 inlining has already failed with CIF_FINAL_ERROR.
613 (update_caller_keys): Call want_inline_small_function_p before
615 (update_callee_keys): Likewise.
617 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
619 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
621 (rs6000_quadword_masked_address_p): Likewise.
622 (quad_aligned_load_p): Likewise.
623 (quad_aligned_store_p): Likewise.
624 (const_load_sequence_p): Add comment to describe the outer-most loop.
625 (mimic_memory_attributes_and_flags): New function.
626 (rs6000_gen_stvx): Likewise.
627 (replace_swapped_aligned_store): Likewise.
628 (rs6000_gen_lvx): Likewise.
629 (replace_swapped_aligned_load): Likewise.
630 (replace_swapped_load_constant): Capitalize argument name in
631 comment describing this function.
632 (rs6000_analyze_swaps): Add a third pass to search for vector loads
633 and stores that access quad-word aligned addresses and replace
634 with stvx or lvx instructions when appropriate.
635 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
636 New function prototype.
637 (rs6000_quadword_masked_address_p): Likewise.
638 (rs6000_gen_lvx): Likewise.
639 (rs6000_gen_stvx): Likewise.
640 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
641 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
642 when memory address is aligned.
643 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
644 this split to select lvx instruction when memory address is aligned.
645 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
646 instruction when memory address is aligned.
647 (*vsx_le_perm_load_v16qi): Likewise.
648 (four unnamed splitters): Modify to select the stvx instruction
649 when memory is aligned.
651 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
653 * predict.c (determine_unlikely_bbs): Handle correctly BBs
654 which appears in the queue multiple times.
656 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
657 Alan Hayward <alan.hayward@arm.com>
658 David Sherwood <david.sherwood@arm.com>
660 * tree-vectorizer.h (vec_lower_bound): New structure.
661 (_loop_vec_info): Add check_nonzero and lower_bounds.
662 (LOOP_VINFO_CHECK_NONZERO): New macro.
663 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
664 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
665 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
666 fields. Make seg_len the distance travelled, not including the
668 (dr_direction_indicator): Declare.
669 (dr_zero_step_indicator): Likewise.
670 (dr_known_forward_stride_p): Likewise.
671 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
673 (runtime_alias_check_p): Allow runtime alias checks with
675 (operator ==): Compare access_size and align.
676 (prune_runtime_alias_test_list): Rework for new distinction between
677 the access_size and seg_len.
678 (create_intersect_range_checks_index): Likewise. Cope with polynomial
680 (get_segment_min_max): New function.
681 (create_intersect_range_checks): Use it.
682 (dr_step_indicator): New function.
683 (dr_direction_indicator): Likewise.
684 (dr_zero_step_indicator): Likewise.
685 (dr_known_forward_stride_p): Likewise.
686 * tree-loop-distribution.c (data_ref_segment_size): Return
687 DR_STEP * (niters - 1).
688 (compute_alias_check_pairs): Update call to the dr_with_seg_len
690 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
691 (vect_preserves_scalar_order_p): New function, split out from...
692 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
693 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
694 (vect_vfa_access_size): New function.
695 (vect_vfa_align): Likewise.
696 (vect_compile_time_alias): Take access_size_a and access_b arguments.
697 (dump_lower_bound): New function.
698 (vect_check_lower_bound): Likewise.
699 (vect_small_gap_p): Likewise.
700 (vectorizable_with_step_bound_p): Likewise.
701 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
702 depencies if the vectorization factor is 1. Convert the checks
703 for nonzero steps into checks on the bounds of DR_STEP. Try using
704 a bunds check for variable steps if the minimum required step is
705 relatively small. Update calls to the dr_with_seg_len
706 constructor and to vect_compile_time_alias.
707 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
709 (vect_loop_versioning): Call it.
710 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
712 (vect_estimate_min_profitable_iters): Account for any bounds checks.
714 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
715 Alan Hayward <alan.hayward@arm.com>
716 David Sherwood <david.sherwood@arm.com>
718 * doc/sourcebuild.texi (vect_scatter_store): Document.
719 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
721 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
723 * genopinit.c (main): Add supports_vec_scatter_store and
724 supports_vec_scatter_store_cached to target_optabs.
725 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
726 IFN_MASK_SCATTER_STORE.
727 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
729 * internal-fn.h (internal_store_fn_p): Declare.
730 (internal_fn_stored_value_index): Likewise.
731 * internal-fn.c (scatter_store_direct): New macro.
732 (expand_scatter_store_optab_fn): New function.
733 (direct_scatter_store_optab_supported_p): New macro.
734 (internal_store_fn_p): New function.
735 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
736 IFN_MASK_SCATTER_STORE.
737 (internal_fn_mask_index): Likewise.
738 (internal_fn_stored_value_index): New function.
739 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
741 * optabs-query.h (supports_vec_scatter_store_p): Declare.
742 * optabs-query.c (supports_vec_scatter_store_p): New function.
743 * tree-vectorizer.h (vect_get_store_rhs): Declare.
744 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
745 true for scatter stores.
746 (vect_gather_scatter_fn_p): Handle scatter stores too.
747 (vect_check_gather_scatter): Consider using scatter stores if
748 supports_vec_scatter_store_p.
749 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
751 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
752 internal_fn_stored_value_index.
753 (check_load_store_masking): Handle scatter stores too.
754 (vect_get_store_rhs): Make public.
755 (vectorizable_call): Use internal_store_fn_p.
756 (vectorizable_store): Handle scatter store internal functions.
757 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
758 when deciding whether the end of the group has been reached.
759 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
760 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
761 (mask_scatter_store<mode>): New insns.
763 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
764 Alan Hayward <alan.hayward@arm.com>
765 David Sherwood <david.sherwood@arm.com>
767 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
768 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
769 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
771 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
772 Use vect_truncate_gather_scatter_offset if we can't treat the
773 operation as a normal gather load or scatter store.
774 (get_group_load_store_type): Take the gather_scatter_info
775 as argument. Try using a gather load or scatter store for
776 single-element groups.
777 (get_load_store_type): Update calls to get_group_load_store_type
778 and vect_use_strided_gather_scatters_p.
780 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
781 Alan Hayward <alan.hayward@arm.com>
782 David Sherwood <david.sherwood@arm.com>
784 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
785 optional tree argument.
786 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
788 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
789 but continue to use the current value as a fallback.
790 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
791 to compare the updates.
792 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
793 (get_load_store_type): Use it when handling a strided access.
794 (vect_get_strided_load_store_ops): New function.
795 (vect_get_data_ptr_increment): Likewise.
796 (vectorizable_load): Handle strided gather loads. Always pass
797 a step to vect_create_data_ref_ptr and bump_vector_ptr.
799 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
800 Alan Hayward <alan.hayward@arm.com>
801 David Sherwood <david.sherwood@arm.com>
803 * doc/md.texi (gather_load@var{m}): Document.
804 (mask_gather_load@var{m}): Likewise.
805 * genopinit.c (main): Add supports_vec_gather_load and
806 supports_vec_gather_load_cached to target_optabs.
807 * optabs-tree.c (init_tree_optimization_optabs): Use
808 ggc_cleared_alloc to allocate target_optabs.
809 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
810 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
812 * internal-fn.h (internal_load_fn_p): Declare.
813 (internal_gather_scatter_fn_p): Likewise.
814 (internal_fn_mask_index): Likewise.
815 (internal_gather_scatter_fn_supported_p): Likewise.
816 * internal-fn.c (gather_load_direct): New macro.
817 (expand_gather_load_optab_fn): New function.
818 (direct_gather_load_optab_supported_p): New macro.
819 (direct_internal_fn_optab): New function.
820 (internal_load_fn_p): Likewise.
821 (internal_gather_scatter_fn_p): Likewise.
822 (internal_fn_mask_index): Likewise.
823 (internal_gather_scatter_fn_supported_p): Likewise.
824 * optabs-query.c (supports_at_least_one_mode_p): New function.
825 (supports_vec_gather_load_p): Likewise.
826 * optabs-query.h (supports_vec_gather_load_p): Declare.
827 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
828 and memory_type field.
829 (NUM_PATTERNS): Bump to 15.
830 * tree-vect-data-refs.c: Include internal-fn.h.
831 (vect_gather_scatter_fn_p): New function.
832 (vect_describe_gather_scatter_call): Likewise.
833 (vect_check_gather_scatter): Try using internal functions for
834 gather loads. Recognize existing calls to a gather load function.
835 (vect_analyze_data_refs): Consider using gather loads if
836 supports_vec_gather_load_p.
837 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
838 (vect_get_gather_scatter_offset_type): Likewise.
839 (vect_convert_mask_for_vectype): Likewise.
840 (vect_add_conversion_to_patterm): Likewise.
841 (vect_try_gather_scatter_pattern): Likewise.
842 (vect_recog_gather_scatter_pattern): New pattern recognizer.
843 (vect_vect_recog_func_ptrs): Add it.
844 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
845 internal_fn_mask_index and internal_gather_scatter_fn_p.
846 (check_load_store_masking): Take the gather_scatter_info as an
847 argument and handle gather loads.
848 (vect_get_gather_scatter_ops): New function.
849 (vectorizable_call): Check internal_load_fn_p.
850 (vectorizable_load): Likewise. Handle gather load internal
852 (vectorizable_store): Update call to check_load_store_masking.
853 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
854 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
855 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
856 (aarch64_gather_scale_operand_d): New predicates.
857 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
858 (mask_gather_load<mode>): New insns.
860 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
861 Alan Hayward <alan.hayward@arm.com>
862 David Sherwood <david.sherwood@arm.com>
864 * optabs.def (fold_left_plus_optab): New optab.
865 * doc/md.texi (fold_left_plus_@var{m}): Document.
866 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
867 * internal-fn.c (fold_left_direct): Define.
868 (expand_fold_left_optab_fn): Likewise.
869 (direct_fold_left_optab_supported_p): Likewise.
870 * fold-const-call.c (fold_const_fold_left): New function.
871 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
872 * tree-parloops.c (valid_reduction_p): New function.
873 (gather_scalar_reductions): Use it.
874 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
875 (vect_finish_replace_stmt): Declare.
876 * tree-vect-loop.c (fold_left_reduction_fn): New function.
877 (needs_fold_left_reduction_p): New function, split out from...
878 (vect_is_simple_reduction): ...here. Accept reductions that
879 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
880 (vect_force_simple_reduction): Also store the reduction type in
881 the assignment's STMT_VINFO_REDUC_TYPE.
882 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
883 (merge_with_identity): New function.
884 (vect_expand_fold_left): Likewise.
885 (vectorize_fold_left_reduction): Likewise.
886 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
887 scalar phi in place for it. Check for target support and reject
888 cases that would reassociate the operation. Defer the transform
889 phase to vectorize_fold_left_reduction.
890 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
891 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
892 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
894 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
896 * tree-if-conv.c (predicate_mem_writes): Remove redundant
897 call to ifc_temp_var.
899 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
900 Alan Hayward <alan.hayward@arm.com>
901 David Sherwood <david.sherwood@arm.com>
903 * target.def (legitimize_address_displacement): Take the original
904 offset as a poly_int.
905 * targhooks.h (default_legitimize_address_displacement): Update
907 * targhooks.c (default_legitimize_address_displacement): Likewise.
908 * doc/tm.texi: Regenerate.
909 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
910 as an argument, moving assert of ad->disp == ad->disp_term to...
911 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
912 Try calling targetm.legitimize_address_displacement before expanding
913 the address rather than afterwards, and adjust for the new interface.
914 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
915 Match the new hook interface. Handle SVE addresses.
916 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
919 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
921 * Makefile.in (OBJS): Add early-remat.o.
922 * target.def (select_early_remat_modes): New hook.
923 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
924 * doc/tm.texi: Regenerate.
925 * targhooks.h (default_select_early_remat_modes): Declare.
926 * targhooks.c (default_select_early_remat_modes): New function.
927 * timevar.def (TV_EARLY_REMAT): New timevar.
928 * passes.def (pass_early_remat): New pass.
929 * tree-pass.h (make_pass_early_remat): Declare.
930 * early-remat.c: New file.
931 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
933 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
935 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
936 Alan Hayward <alan.hayward@arm.com>
937 David Sherwood <david.sherwood@arm.com>
939 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
940 vfm1 with a bound_epilog parameter.
941 (vect_do_peeling): Update calls accordingly, and move the prologue
942 call earlier in the function. Treat the base bound_epilog as 0 for
943 fully-masked loops and retain vf - 1 for other loops. Add 1 to
944 this base when peeling for gaps.
945 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
946 with fully-masked loops.
947 (vect_estimate_min_profitable_iters): Handle the single peeled
948 iteration in that case.
950 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
951 Alan Hayward <alan.hayward@arm.com>
952 David Sherwood <david.sherwood@arm.com>
954 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
955 single-element interleaving even if the size is not a power of 2.
956 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
957 accesses for single-element interleaving if the group size is
960 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
961 Alan Hayward <alan.hayward@arm.com>
962 David Sherwood <david.sherwood@arm.com>
964 * doc/md.texi (fold_extract_last_@var{m}): Document.
965 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
966 * optabs.def (fold_extract_last_optab): New optab.
967 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
968 * internal-fn.c (fold_extract_direct): New macro.
969 (expand_fold_extract_optab_fn): Likewise.
970 (direct_fold_extract_optab_supported_p): Likewise.
971 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
972 * tree-vect-loop.c (vect_model_reduction_cost): Handle
973 EXTRACT_LAST_REDUCTION.
974 (get_initial_def_for_reduction): Do not create an initial vector
975 for EXTRACT_LAST_REDUCTION reductions.
976 (vectorizable_reduction): Leave the scalar phi in place for
977 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
978 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
979 epilogue code for EXTRACT_LAST_REDUCTION and defer the
980 transform phase to vectorizable_condition.
981 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
983 (vect_finish_stmt_generation): ...here.
984 (vect_finish_replace_stmt): New function.
985 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
986 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
988 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
990 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
991 Alan Hayward <alan.hayward@arm.com>
992 David Sherwood <david.sherwood@arm.com>
994 * doc/md.texi (extract_last_@var{m}): Document.
995 * optabs.def (extract_last_optab): New optab.
996 * internal-fn.def (EXTRACT_LAST): New internal function.
997 * internal-fn.c (cond_unary_direct): New macro.
998 (expand_cond_unary_optab_fn): Likewise.
999 (direct_cond_unary_optab_supported_p): Likewise.
1000 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1001 loops using EXTRACT_LAST.
1002 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1003 (extract_last_<mode>): ...this optab.
1004 (vec_extract<mode><Vel>): Update accordingly.
1006 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1007 Alan Hayward <alan.hayward@arm.com>
1008 David Sherwood <david.sherwood@arm.com>
1010 * target.def (empty_mask_is_expensive): New hook.
1011 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1012 * doc/tm.texi: Regenerate.
1013 * targhooks.h (default_empty_mask_is_expensive): Declare.
1014 * targhooks.c (default_empty_mask_is_expensive): New function.
1015 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1016 if the target says that empty masks are expensive.
1017 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1019 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1021 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1022 Alan Hayward <alan.hayward@arm.com>
1023 David Sherwood <david.sherwood@arm.com>
1025 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1026 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1027 (vect_use_loop_mask_for_alignment_p): New function.
1028 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1029 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1030 niters_skip argument. Make sure that the first niters_skip elements
1031 of the first iteration are inactive.
1032 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1033 Update call to vect_set_loop_masks_directly.
1034 (get_misalign_in_elems): New function, split out from...
1035 (vect_gen_prolog_loop_niters): ...here.
1036 (vect_update_init_of_dr): Take a code argument that specifies whether
1037 the adjustment should be added or subtracted.
1038 (vect_update_init_of_drs): Likewise.
1039 (vect_prepare_for_masked_peels): New function.
1040 (vect_do_peeling): Skip prologue peeling if we're using a mask
1041 instead. Update call to vect_update_inits_of_drs.
1042 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1044 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1045 alignment. Do not include the number of peeled iterations in
1046 the minimum threshold in that case.
1047 (vectorizable_induction): Adjust the start value down by
1048 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1049 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1050 Take the number of skipped iterations into account when calculating
1052 * tree-vect-stmts.c (vect_gen_while_not): New function.
1054 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1055 Alan Hayward <alan.hayward@arm.com>
1056 David Sherwood <david.sherwood@arm.com>
1058 * doc/sourcebuild.texi (vect_fully_masked): Document.
1059 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1061 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1063 (vect_analyze_loop_2): ...here. Don't check the vectorization
1064 factor against the number of loop iterations if the loop is
1067 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1068 Alan Hayward <alan.hayward@arm.com>
1069 David Sherwood <david.sherwood@arm.com>
1071 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1072 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1073 (dump_groups): Update accordingly.
1074 (iv_use::mem_type): New member variable.
1075 (address_p): New function.
1076 (record_use): Add a mem_type argument and initialize the new
1078 (record_group_use): Add a mem_type argument. Use address_p.
1079 Remove obsolete null checks of base_object. Update call to record_use.
1080 (find_interesting_uses_op): Update call to record_group_use.
1081 (find_interesting_uses_cond): Likewise.
1082 (find_interesting_uses_address): Likewise.
1083 (get_mem_type_for_internal_fn): New function.
1084 (find_address_like_use): Likewise.
1085 (find_interesting_uses_stmt): Try find_address_like_use before
1086 calling find_interesting_uses_op.
1087 (addr_offset_valid_p): Use the iv mem_type field as the type
1088 of the addressed memory.
1089 (add_autoinc_candidates): Likewise.
1090 (get_address_cost): Likewise.
1091 (split_small_address_groups_p): Use address_p.
1092 (split_address_groups): Likewise.
1093 (add_iv_candidate_for_use): Likewise.
1094 (autoinc_possible_for_pair): Likewise.
1095 (rewrite_groups): Likewise.
1096 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1097 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1098 (get_alias_ptr_type_for_ptr_address): New function.
1099 (rewrite_use_address): Rewrite address uses in calls that were
1100 identified by find_address_like_use.
1102 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1103 Alan Hayward <alan.hayward@arm.com>
1104 David Sherwood <david.sherwood@arm.com>
1106 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1108 * gimple-expr.h (is_gimple_addressable: Likewise.
1109 * gimple-expr.c (is_gimple_address): Likewise.
1110 * internal-fn.c (expand_call_mem_ref): New function.
1111 (expand_mask_load_optab_fn): Use it.
1112 (expand_mask_store_optab_fn): Likewise.
1114 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1115 Alan Hayward <alan.hayward@arm.com>
1116 David Sherwood <david.sherwood@arm.com>
1118 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1119 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1120 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1121 (cond_umax@var{mode}): Document.
1122 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1123 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1124 (cond_umin_optab, cond_umax_optab): New optabs.
1125 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1126 (COND_IOR, COND_XOR): New internal functions.
1127 * internal-fn.h (get_conditional_internal_fn): Declare.
1128 * internal-fn.c (cond_binary_direct): New macro.
1129 (expand_cond_binary_optab_fn): Likewise.
1130 (direct_cond_binary_optab_supported_p): Likewise.
1131 (get_conditional_internal_fn): New function.
1132 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1133 Cope with reduction statements that are vectorized as calls rather
1135 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1136 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1137 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1138 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1139 (UNSPEC_COND_EOR): New unspecs.
1140 (optab): Add mappings for them.
1141 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1142 (sve_int_op, sve_fp_op): New int attributes.
1144 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1145 Alan Hayward <alan.hayward@arm.com>
1146 David Sherwood <david.sherwood@arm.com>
1148 * optabs.def (while_ult_optab): New optab.
1149 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1150 * internal-fn.def (WHILE_ULT): New internal function.
1151 * internal-fn.h (direct_internal_fn_supported_p): New override
1152 that takes two types as argument.
1153 * internal-fn.c (while_direct): New macro.
1154 (expand_while_optab_fn): New function.
1155 (convert_optab_supported_p): Likewise.
1156 (direct_while_optab_supported_p): New macro.
1157 * wide-int.h (wi::udiv_ceil): New function.
1158 * tree-vectorizer.h (rgroup_masks): New structure.
1159 (vec_loop_masks): New typedef.
1160 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1162 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1163 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1164 (vect_max_vf): New function.
1165 (slpeel_make_loop_iterate_ntimes): Delete.
1166 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1167 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1168 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1169 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1170 internal-fn.h, stor-layout.h and optabs-query.h.
1171 (vect_set_loop_mask): New function.
1172 (add_preheader_seq): Likewise.
1173 (add_header_seq): Likewise.
1174 (interleave_supported_p): Likewise.
1175 (vect_maybe_permute_loop_masks): Likewise.
1176 (vect_set_loop_masks_directly): Likewise.
1177 (vect_set_loop_condition_masked): Likewise.
1178 (vect_set_loop_condition_unmasked): New function, split out from
1179 slpeel_make_loop_iterate_ntimes.
1180 (slpeel_make_loop_iterate_ntimes): Rename to..
1181 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1182 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1183 (vect_do_peeling): Update call accordingly.
1184 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1186 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1187 mask_compare_type, can_fully_mask_p and fully_masked_p.
1188 (release_vec_loop_masks): New function.
1189 (_loop_vec_info): Use it to free the loop masks.
1190 (can_produce_all_loop_masks_p): New function.
1191 (vect_get_max_nscalars_per_iter): Likewise.
1192 (vect_verify_full_masking): Likewise.
1193 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1194 retries, and free the mask rgroups before retrying. Check loop-wide
1195 reasons for disallowing fully-masked loops. Make the final decision
1196 about whether use a fully-masked loop or not.
1197 (vect_estimate_min_profitable_iters): Do not assume that peeling
1198 for the number of iterations will be needed for fully-masked loops.
1199 (vectorizable_reduction): Disable fully-masked loops.
1200 (vectorizable_live_operation): Likewise.
1201 (vect_halve_mask_nunits): New function.
1202 (vect_double_mask_nunits): Likewise.
1203 (vect_record_loop_mask): Likewise.
1204 (vect_get_loop_mask): Likewise.
1205 (vect_transform_loop): Handle the case in which the final loop
1206 iteration might handle a partial vector. Call vect_set_loop_condition
1207 instead of slpeel_make_loop_iterate_ntimes.
1208 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1209 (check_load_store_masking): New function.
1210 (prepare_load_store_mask): Likewise.
1211 (vectorizable_store): Handle fully-masked loops.
1212 (vectorizable_load): Likewise.
1213 (supportable_widening_operation): Use vect_halve_mask_nunits for
1215 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1216 (vect_gen_while): New function.
1217 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1218 (aarch64_uqdec<mode>): New insn.
1220 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1221 Alan Hayward <alan.hayward@arm.com>
1222 David Sherwood <david.sherwood@arm.com>
1224 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1225 (reduc_xor_scal_optab): New optabs.
1226 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1227 (reduc_xor_scal_@var{m}): Document.
1228 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1229 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1231 * fold-const-call.c (fold_const_call): Handle them.
1232 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1233 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1234 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1235 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1236 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1237 (UNSPEC_XORV): New unspecs.
1238 (optab): Add entries for them.
1239 (BITWISEV): New int iterator.
1240 (bit_reduc_op): New int attributes.
1242 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1243 Alan Hayward <alan.hayward@arm.com>
1244 David Sherwood <david.sherwood@arm.com>
1246 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1247 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1248 * optabs.def (vec_shl_insert_optab): New optab.
1249 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1250 (duplicate_and_interleave): Likewise.
1251 * tree-vect-loop.c: Include internal-fn.h.
1252 (neutral_op_for_slp_reduction): New function, split out from
1253 get_initial_defs_for_reduction.
1254 (get_initial_def_for_reduction): Handle option 2 for variable-length
1255 vectors by loading the neutral value into a vector and then shifting
1256 the initial value into element 0.
1257 (get_initial_defs_for_reduction): Replace the code argument with
1258 the neutral value calculated by neutral_op_for_slp_reduction.
1259 Use gimple_build_vector for constant-length vectors.
1260 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1261 but the first group_size elements have a neutral value.
1262 Use duplicate_and_interleave otherwise.
1263 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1264 Update call to get_initial_defs_for_reduction. Handle SLP
1265 reductions for variable-length vectors by creating one vector
1266 result for each scalar result, with the elements associated
1267 with other scalar results stubbed out with the neutral value.
1268 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1269 Require IFN_VEC_SHL_INSERT for double reductions on
1270 variable-length vectors, or SLP reductions that have
1271 a neutral value. Require can_duplicate_and_interleave_p
1272 support for variable-length unchained SLP reductions if there
1273 is no neutral value, such as for MIN/MAX reductions. Also require
1274 the number of vector elements to be a multiple of the number of
1275 SLP statements when doing variable-length unchained SLP reductions.
1276 Update call to vect_create_epilog_for_reduction.
1277 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1278 and remove initial values.
1279 (duplicate_and_interleave): Make public.
1280 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1281 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1283 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1284 Alan Hayward <alan.hayward@arm.com>
1285 David Sherwood <david.sherwood@arm.com>
1287 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1288 (can_duplicate_and_interleave_p): New function.
1289 (vect_get_and_check_slp_defs): Take the vector of statements
1290 rather than just the current one. Remove excess parentheses.
1291 Restriction rejectinon of vect_constant_def and vect_external_def
1292 for variable-length vectors to boolean types, or types for which
1293 can_duplicate_and_interleave_p is false.
1294 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1295 (duplicate_and_interleave): New function.
1296 (vect_get_constant_vectors): Use gimple_build_vector for
1297 constant-length vectors and suitable variable-length constant
1298 vectors. Use duplicate_and_interleave for other variable-length
1299 vectors. Don't defer the update when inserting new statements.
1301 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1302 Alan Hayward <alan.hayward@arm.com>
1303 David Sherwood <david.sherwood@arm.com>
1305 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1306 min_profitable_iters doesn't go negative.
1308 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1309 Alan Hayward <alan.hayward@arm.com>
1310 David Sherwood <david.sherwood@arm.com>
1312 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1313 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1314 * optabs.def (vec_mask_load_lanes_optab): New optab.
1315 (vec_mask_store_lanes_optab): Likewise.
1316 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1317 (MASK_STORE_LANES): Likewise.
1318 * internal-fn.c (mask_load_lanes_direct): New macro.
1319 (mask_store_lanes_direct): Likewise.
1320 (expand_mask_load_optab_fn): Handle masked operations.
1321 (expand_mask_load_lanes_optab_fn): New macro.
1322 (expand_mask_store_optab_fn): Handle masked operations.
1323 (expand_mask_store_lanes_optab_fn): New macro.
1324 (direct_mask_load_lanes_optab_supported_p): Likewise.
1325 (direct_mask_store_lanes_optab_supported_p): Likewise.
1326 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1328 (vect_load_lanes_supported): Likewise.
1329 * tree-vect-data-refs.c (strip_conversion): New function.
1330 (can_group_stmts_p): Likewise.
1331 (vect_analyze_data_ref_accesses): Use it instead of checking
1332 for a pair of assignments.
1333 (vect_store_lanes_supported): Take a masked_p parameter.
1334 (vect_load_lanes_supported): Likewise.
1335 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1336 vect_store_lanes_supported and vect_load_lanes_supported.
1337 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1338 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1339 parameter. Don't allow gaps for masked accesses.
1340 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1341 and vect_load_lanes_supported.
1342 (get_load_store_type): Take a masked_p parameter and update
1343 call to get_group_load_store_type.
1344 (vectorizable_store): Update call to get_load_store_type.
1345 Handle IFN_MASK_STORE_LANES.
1346 (vectorizable_load): Update call to get_load_store_type.
1347 Handle IFN_MASK_LOAD_LANES.
1349 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1350 Alan Hayward <alan.hayward@arm.com>
1351 David Sherwood <david.sherwood@arm.com>
1353 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1355 * config/aarch64/aarch64-protos.h
1356 (aarch64_sve_struct_memory_operand_p): Declare.
1357 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1358 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1359 (VPRED, vpred): Handle SVE structure modes.
1360 * config/aarch64/constraints.md (Utx): New constraint.
1361 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1362 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1363 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1364 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1365 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1366 structure modes. Split into pieces after RA.
1367 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1368 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1370 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1371 SVE structure modes.
1372 (aarch64_classify_address): Likewise.
1373 (sizetochar): Move earlier in file.
1374 (aarch64_print_operand): Handle SVE register lists.
1375 (aarch64_array_mode): New function.
1376 (aarch64_sve_struct_memory_operand_p): Likewise.
1377 (TARGET_ARRAY_MODE): Redefine.
1379 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1380 Alan Hayward <alan.hayward@arm.com>
1381 David Sherwood <david.sherwood@arm.com>
1383 * target.def (array_mode): New target hook.
1384 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1385 * doc/tm.texi: Regenerate.
1386 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1387 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1388 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1390 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1393 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1394 Alan Hayward <alan.hayward@arm.com>
1395 David Sherwood <david.sherwood@arm.com>
1397 * fold-const.c (fold_binary_loc): Check the argument types
1398 rather than the result type when testing for a vector operation.
1400 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1402 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1403 * doc/tm.texi: Regenerate.
1405 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1406 Alan Hayward <alan.hayward@arm.com>
1407 David Sherwood <david.sherwood@arm.com>
1409 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1410 (sve): Document new AArch64 extension.
1411 * doc/md.texi (w): Extend the description of the AArch64
1412 constraint to include SVE vectors.
1413 (Upl, Upa): Document new AArch64 predicate constraints.
1414 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1416 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1417 (msve-vector-bits=): New option.
1418 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1419 SVE when these are disabled.
1420 (sve): New extension.
1421 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1422 modes. Adjust their number of units based on aarch64_sve_vg.
1423 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1424 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1425 aarch64_addr_query_type.
1426 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1427 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1428 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1429 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1430 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1431 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1432 (aarch64_simd_imm_zero_p): Delete.
1433 (aarch64_check_zero_based_sve_index_immediate): Declare.
1434 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1435 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1436 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1437 (aarch64_sve_float_mul_immediate_p): Likewise.
1438 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1440 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1441 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1442 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1443 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1444 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1445 (aarch64_regmode_natural_size): Likewise.
1446 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1447 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1449 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1450 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1451 for VG and the SVE predicate registers.
1452 (V_ALIASES): Add a "z"-prefixed alias.
1453 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1454 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1455 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1456 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1457 (REG_CLASS_NAMES): Add entries for them.
1458 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1459 and the predicate registers.
1460 (aarch64_sve_vg): Declare.
1461 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1462 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1463 (REGMODE_NATURAL_SIZE): Define.
1464 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1466 * config/aarch64/aarch64.c: Include cfgrtl.h.
1467 (simd_immediate_info): Add a constructor for series vectors,
1468 and an associated step field.
1469 (aarch64_sve_vg): New variable.
1470 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1471 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1472 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1473 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1474 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1475 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1476 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1477 (aarch64_get_mask_mode): New functions.
1478 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1479 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1480 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1481 predicate modes and predicate registers. Explicitly restrict
1482 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1483 to store a vector mode if it is recognized by
1484 aarch64_classify_vector_mode.
1485 (aarch64_regmode_natural_size): New function.
1486 (aarch64_hard_regno_caller_save_mode): Return the original mode
1488 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1489 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1490 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1491 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1493 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1494 does not overlap dest if the function is frame-related. Handle
1496 (aarch64_split_add_offset): New function.
1497 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1498 them aarch64_add_offset.
1499 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1500 and update call to aarch64_sub_sp.
1501 (aarch64_add_cfa_expression): New function.
1502 (aarch64_expand_prologue): Pass extra temporary registers to the
1503 functions above. Handle the case in which we need to emit new
1504 DW_CFA_expressions for registers that were originally saved
1505 relative to the stack pointer, but now have to be expressed
1506 relative to the frame pointer.
1507 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1509 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1510 IP0 and IP1 values for SVE frames.
1511 (aarch64_expand_vec_series): New function.
1512 (aarch64_expand_sve_widened_duplicate): Likewise.
1513 (aarch64_expand_sve_const_vector): Likewise.
1514 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1515 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1516 into the register, rather than emitting a SET directly.
1517 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1518 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1519 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1520 (offset_9bit_signed_scaled_p): New functions.
1521 (aarch64_replicate_bitmask_imm): New function.
1522 (aarch64_bitmask_imm): Use it.
1523 (aarch64_cannot_force_const_mem): Reject expressions involving
1524 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1525 (aarch64_classify_index): Handle SVE indices, by requiring
1526 a plain register index with a scale that matches the element size.
1527 (aarch64_classify_address): Handle SVE addresses. Assert that
1528 the mode of the address is VOIDmode or an integer mode.
1529 Update call to aarch64_classify_symbol.
1530 (aarch64_classify_symbolic_expression): Update call to
1531 aarch64_classify_symbol.
1532 (aarch64_const_vec_all_in_range_p): New function.
1533 (aarch64_print_vector_float_operand): Likewise.
1534 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1535 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1536 and the FP immediates 1.0 and 0.5.
1537 (aarch64_print_address_internal): Handle SVE addresses.
1538 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1539 (aarch64_regno_regclass): Handle predicate registers.
1540 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1542 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1543 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1544 (aarch64_convert_sve_vector_bits): New function.
1545 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1546 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1548 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1549 Handle SVE vector and predicate modes. Accept VL-based constants
1550 that need only one temporary register, and VL offsets that require
1551 no temporary registers.
1552 (aarch64_conditional_register_usage): Mark the predicate registers
1553 as fixed if SVE isn't available.
1554 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1555 Return true for SVE vector and predicate modes.
1556 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1557 rather than an unsigned int. Handle SVE modes.
1558 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1560 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1562 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1563 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1564 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1565 (aarch64_sve_float_mul_immediate_p): New functions.
1566 (aarch64_sve_valid_immediate): New function.
1567 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1568 Explicitly reject structure modes. Check for INDEX constants.
1569 Handle PTRUE and PFALSE constants.
1570 (aarch64_check_zero_based_sve_index_immediate): New function.
1571 (aarch64_simd_imm_zero_p): Delete.
1572 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1573 vector modes. Accept constants in the range of CNT[BHWD].
1574 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1575 ask for an Advanced SIMD mode.
1576 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1577 (aarch64_simd_vector_alignment): Handle SVE predicates.
1578 (aarch64_vectorize_preferred_vector_alignment): New function.
1579 (aarch64_simd_vector_alignment_reachable): Use it instead of
1581 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1582 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1584 (MAX_VECT_LEN): Delete.
1585 (expand_vec_perm_d): Add a vec_flags field.
1586 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1587 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1588 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1590 (aarch64_evpc_rev): Rename to...
1591 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1592 (aarch64_evpc_rev_global): New function.
1593 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1594 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1596 (aarch64_evpc_sve_tbl): New function.
1597 (aarch64_expand_vec_perm_const_1): Update after rename of
1598 aarch64_evpc_rev. Handle SVE permutes too, trying
1599 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1600 than aarch64_evpc_tbl.
1601 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1602 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1603 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1604 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1605 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1606 (aarch64_expand_sve_vcond): New functions.
1607 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1608 of aarch64_vector_mode_p.
1609 (aarch64_dwarf_poly_indeterminate_value): New function.
1610 (aarch64_compute_pressure_classes): Likewise.
1611 (aarch64_can_change_mode_class): Likewise.
1612 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1613 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1614 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1615 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1616 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1617 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1618 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1619 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1621 (Dn, Dl, Dr): Accept const as well as const_vector.
1622 (Dz): Likewise. Compare against CONST0_RTX.
1623 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1624 of "vector" where appropriate.
1625 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1626 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1627 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1628 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1629 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1630 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1631 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1632 (v_int_equiv): Extend to SVE modes.
1633 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1635 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1636 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1637 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1638 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1639 (SVE_COND_FP_CMP): New int iterators.
1640 (perm_hilo): Handle the new unpack unspecs.
1641 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1643 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1644 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1645 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1646 (aarch64_equality_operator, aarch64_constant_vector_operand)
1647 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1648 (aarch64_sve_nonimmediate_operand): Likewise.
1649 (aarch64_sve_general_operand): Likewise.
1650 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1651 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1652 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1653 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1654 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1655 (aarch64_sve_float_arith_immediate): Likewise.
1656 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1657 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1658 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1659 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1660 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1661 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1662 (aarch64_sve_float_arith_operand): Likewise.
1663 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1664 (aarch64_sve_float_mul_operand): Likewise.
1665 (aarch64_sve_vec_perm_operand): Likewise.
1666 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1667 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1668 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1669 as well as const_vector.
1670 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1671 in file. Use CONST0_RTX and CONSTM1_RTX.
1672 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1673 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1674 Use aarch64_simd_imm_zero.
1675 * config/aarch64/aarch64-sve.md: New file.
1676 * config/aarch64/aarch64.md: Include it.
1677 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1678 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1679 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1680 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1681 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1682 (sve): New attribute.
1683 (enabled): Disable instructions with the sve attribute unless
1685 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1686 aarch64_expand_mov_immediate.
1687 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1688 CNT[BHSD] immediates.
1689 (movti): Split CONST_POLY_INT moves into two halves.
1690 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1691 Split additions that need a temporary here if the destination
1692 is the stack pointer.
1693 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1694 (*add<mode>3_poly_1): New instruction.
1695 (set_clobber_cc): New expander.
1697 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1699 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1700 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1701 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1702 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1703 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1704 Change innermode from fixed_mode_size to machine_mode.
1705 (simplify_subreg): Update call accordingly. Handle a constant-sized
1706 subreg of a variable-length CONST_VECTOR.
1708 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1709 Alan Hayward <alan.hayward@arm.com>
1710 David Sherwood <david.sherwood@arm.com>
1712 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1713 (add_offset_to_base): New function, split out from...
1714 (create_mem_ref): ...here. When handling a scale other than 1,
1715 check first whether the address is valid without the offset.
1716 Add it into the base if so, leaving the index and scale as-is.
1718 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1721 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1722 fold_for_warn before checking if arg2 is INTEGER_CST.
1724 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1726 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1727 (store_multiple_operation): Delete.
1728 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1729 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1730 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1731 guarded by TARGET_STRING.
1732 (rs6000_output_load_multiple): Delete.
1733 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1734 OPTION_MASK_STRING / TARGET_STRING handling.
1735 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1736 (const rs6000_opt_masks) <"string">: Change mask to 0.
1737 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1738 (MASK_STRING): Delete.
1739 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1741 (load_multiple): Delete.
1748 (store_multiple): Delete.
1755 (movmemsi_8reg): Delete.
1756 (corresponding unnamed define_insn): Delete.
1757 (movmemsi_6reg): Delete.
1758 (corresponding unnamed define_insn): Delete.
1759 (movmemsi_4reg): Delete.
1760 (corresponding unnamed define_insn): Delete.
1761 (movmemsi_2reg): Delete.
1762 (corresponding unnamed define_insn): Delete.
1763 (movmemsi_1reg): Delete.
1764 (corresponding unnamed define_insn): Delete.
1765 * config/rs6000/rs6000.opt (mno-string): New.
1766 (mstring): Replace by deprecation warning stub.
1767 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1769 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1771 * regrename.c (regrename_do_replace): If replacing the same
1772 reg multiple times, try to reuse last created gen_raw_REG.
1775 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1776 main to workaround a bug in GDB.
1778 2018-01-12 Tom de Vries <tom@codesourcery.com>
1781 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1783 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1785 PR rtl-optimization/80481
1786 * ira-color.c (get_cap_member): New function.
1787 (allocnos_conflict_by_live_ranges_p): Use it.
1788 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1789 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1791 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1794 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1795 (*saddl_se_1): Ditto.
1797 (*ssubl_se_1): Ditto.
1799 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1801 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1802 rather than wi::to_widest for DR_INITs.
1803 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1804 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1805 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1807 (vect_analyze_group_access_1): Note that here.
1809 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1811 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1812 polynomial type sizes.
1814 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1816 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1817 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1818 (gimple_add_tmp_var): Likewise.
1820 2018-01-12 Martin Liska <mliska@suse.cz>
1822 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1823 (gimple_alloc_sizes): Likewise.
1824 (dump_gimple_statistics): Use PRIu64 in printf format.
1825 * gimple.h: Change uint64_t to int.
1827 2018-01-12 Martin Liska <mliska@suse.cz>
1829 * tree-core.h: Use uint64_t instead of int.
1830 * tree.c (tree_node_counts): Likewise.
1831 (tree_node_sizes): Likewise.
1832 (dump_tree_statistics): Use PRIu64 in printf format.
1834 2018-01-12 Martin Liska <mliska@suse.cz>
1836 * Makefile.in: As qsort_chk is implemented in vec.c, add
1837 vec.o to linkage of gencfn-macros.
1838 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1839 passing the info to record_node_allocation_statistics.
1840 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1842 * ggc-common.c (struct ggc_usage): Add operator== and use
1843 it in operator< and compare function.
1844 * mem-stats.h (struct mem_usage): Likewise.
1845 * vec.c (struct vec_usage): Remove operator< and compare
1846 function. Can be simply inherited.
1848 2018-01-12 Martin Jambor <mjambor@suse.cz>
1851 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1852 * tree-ssa-math-opts.c: Include domwalk.h.
1853 (convert_mult_to_fma_1): New function.
1854 (fma_transformation_info): New type.
1855 (fma_deferring_state): Likewise.
1856 (cancel_fma_deferring): New function.
1857 (result_of_phi): Likewise.
1858 (last_fma_candidate_feeds_initial_phi): Likewise.
1859 (convert_mult_to_fma): Added deferring logic, split actual
1860 transformation to convert_mult_to_fma_1.
1861 (math_opts_dom_walker): New type.
1862 (math_opts_dom_walker::after_dom_children): New method, body moved
1863 here from pass_optimize_widening_mul::execute, added deferring logic
1865 (pass_optimize_widening_mul::execute): Moved most of code to
1866 math_opts_dom_walker::after_dom_children.
1867 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1868 * config/i386/i386.c (ix86_option_override_internal): Added
1869 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1871 2018-01-12 Richard Biener <rguenther@suse.de>
1874 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1875 inline instance vars.
1877 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1880 * config/rx/rx.c (rx_is_restricted_memory_address):
1883 2018-01-12 Richard Biener <rguenther@suse.de>
1885 PR tree-optimization/80846
1886 * target.def (split_reduction): New target hook.
1887 * targhooks.c (default_split_reduction): New function.
1888 * targhooks.h (default_split_reduction): Declare.
1889 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1890 target requests first reduce vectors by combining low and high
1892 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1893 (get_vectype_for_scalar_type_and_size): Export.
1894 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1895 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1896 * doc/tm.texi: Regenerate.
1897 * config/i386/i386.c (ix86_split_reduction): Implement
1898 TARGET_VECTORIZE_SPLIT_REDUCTION.
1900 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1903 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1904 in PIC mode except for TARGET_VXWORKS_RTP.
1905 * config/sparc/sparc.c: Include cfgrtl.h.
1906 (TARGET_INIT_PIC_REG): Define.
1907 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1908 (sparc_pic_register_p): New predicate.
1909 (sparc_legitimate_address_p): Use it.
1910 (sparc_legitimize_pic_address): Likewise.
1911 (sparc_delegitimize_address): Likewise.
1912 (sparc_mode_dependent_address_p): Likewise.
1913 (gen_load_pcrel_sym): Remove 4th parameter.
1914 (load_got_register): Adjust call to above. Remove obsolete stuff.
1915 (sparc_expand_prologue): Do not call load_got_register here.
1916 (sparc_flat_expand_prologue): Likewise.
1917 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1918 (sparc_use_pseudo_pic_reg): New function.
1919 (sparc_init_pic_reg): Likewise.
1920 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1921 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1923 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1925 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1926 Add item for branch_cost.
1928 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1930 PR rtl-optimization/83565
1931 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1932 not extend the result to a larger mode for rotate operations.
1933 (num_sign_bit_copies1): Likewise.
1935 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1938 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1940 Use values-Xc.o for -pedantic.
1941 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1943 2018-01-12 Martin Liska <mliska@suse.cz>
1946 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1948 (possible_polymorphic_call_targets): Use it.
1949 (ipa_devirt): Likewise.
1951 2018-01-12 Martin Liska <mliska@suse.cz>
1953 * profile-count.h (enum profile_quality): Use 0 as invalid
1954 enum value of profile_quality.
1956 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1958 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1959 -mext-string options.
1961 2018-01-12 Richard Biener <rguenther@suse.de>
1963 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1964 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1965 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1967 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1969 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1971 * configure.ac (--with-long-double-format): Add support for the
1972 configuration option to change the default long double format on
1974 * config.gcc (powerpc*-linux*-*): Likewise.
1975 * configure: Regenerate.
1976 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1977 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1978 used without modification.
1980 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1982 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1983 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1984 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1985 MISC_BUILTIN_SPEC_BARRIER.
1986 (rs6000_init_builtins): Likewise.
1987 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1989 (speculation_barrier): New define_insn.
1990 * doc/extend.texi: Document __builtin_speculation_barrier.
1992 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1995 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1996 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1997 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1999 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2000 integral modes instead of "ss" and "sd".
2001 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2002 vectors with 32-bit and 64-bit elements.
2003 (vecdupssescalarmodesuffix): New mode attribute.
2004 (vec_dup<mode>): Use it.
2006 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2009 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2010 frame if argument is passed on stack.
2012 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2015 * ree.c (combine_reaching_defs): Optimize also
2016 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2017 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2019 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2022 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2024 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2027 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2028 after they are computed.
2030 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2032 PR tree-optimization/83695
2033 * gimple-loop-linterchange.cc
2034 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2035 reset cached scev information after interchange.
2036 (pass_linterchange::execute): Remove call to scev_reset_htab.
2038 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2040 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2041 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2042 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2043 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2044 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2045 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2046 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2047 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2048 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2049 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2050 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2051 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2052 (V_lane_reg): Likewise.
2053 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2055 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2056 (vfmal_lane_low<mode>_intrinsic,
2057 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2058 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2059 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2060 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2061 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2062 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2064 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2066 * config/arm/arm-cpus.in (fp16fml): New feature.
2067 (ALL_SIMD): Add fp16fml.
2068 (armv8.2-a): Add fp16fml as an option.
2069 (armv8.3-a): Likewise.
2070 (armv8.4-a): Add fp16fml as part of fp16.
2071 * config/arm/arm.h (TARGET_FP16FML): Define.
2072 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2074 * config/arm/arm-modes.def (V2HF): Define.
2075 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2076 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2077 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2078 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2079 vfmsl_low, vfmsl_high): New set of builtins.
2080 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2081 (vfml_op): New code attribute.
2082 (VFMLHALVES): New int iterator.
2083 (VFML, VFMLSEL): New mode attributes.
2084 (V_reg): Define mapping for V2HF.
2085 (V_hi, V_lo): New mode attributes.
2086 (VF_constraint): Likewise.
2087 (vfml_half, vfml_half_selector): New int attributes.
2088 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2090 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2091 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2093 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2094 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2095 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2096 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2098 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2099 Document new effective target and option set.
2101 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2103 * config/arm/arm-cpus.in (armv8_4): New feature.
2104 (ARMv8_4a): New fgroup.
2105 (armv8.4-a): New arch.
2106 * config/arm/arm-tables.opt: Regenerate.
2107 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2108 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2109 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2110 Add matching rules for -march=armv8.4-a and extensions.
2111 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2113 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2116 * config/rx/rx.md (BW): New mode attribute.
2117 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2119 2018-01-11 Richard Biener <rguenther@suse.de>
2121 PR tree-optimization/83435
2122 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2123 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2124 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2126 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2127 Alan Hayward <alan.hayward@arm.com>
2128 David Sherwood <david.sherwood@arm.com>
2130 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2132 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2133 (aarch64_print_address_internal): Use it to check for a zero offset.
2135 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2136 Alan Hayward <alan.hayward@arm.com>
2137 David Sherwood <david.sherwood@arm.com>
2139 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2140 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2141 Return a poly_int64 rather than a HOST_WIDE_INT.
2142 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2143 rather than a HOST_WIDE_INT.
2144 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2145 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2146 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2147 final_offset from HOST_WIDE_INT to poly_int64.
2148 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2149 to_constant when getting the number of units in an Advanced SIMD
2151 (aarch64_builtin_vectorized_function): Check for a constant number
2153 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2155 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2156 attribute instead of GET_MODE_NUNITS.
2157 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2158 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2159 GET_MODE_SIZE for fixed-size registers.
2160 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2161 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2162 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2163 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2164 (aarch64_print_operand, aarch64_print_address_internal)
2165 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2166 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2167 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2168 Handle polynomial GET_MODE_SIZE.
2169 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2170 wider than SImode without modification.
2171 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2172 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2173 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2174 passing and returning SVE modes.
2175 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2176 rather than GEN_INT.
2177 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2178 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2179 (aarch64_allocate_and_probe_stack_space): Likewise.
2180 (aarch64_layout_frame): Cope with polynomial offsets.
2181 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2182 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2184 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2185 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2186 poly_int64 rather than a HOST_WIDE_INT.
2187 (aarch64_get_separate_components, aarch64_process_components)
2188 (aarch64_expand_prologue, aarch64_expand_epilogue)
2189 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2190 (aarch64_anchor_offset): New function, split out from...
2191 (aarch64_legitimize_address): ...here.
2192 (aarch64_builtin_vectorization_cost): Handle polynomial
2193 TYPE_VECTOR_SUBPARTS.
2194 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2196 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2197 number of elements from the PARALLEL rather than the mode.
2198 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2199 rather than GET_MODE_BITSIZE.
2200 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2201 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2202 (aarch64_expand_vec_perm_const_1): Handle polynomial
2203 d->perm.length () and d->perm elements.
2204 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2205 Apply to_constant to d->perm elements.
2206 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2207 polynomial CONST_VECTOR_NUNITS.
2208 (aarch64_move_pointer): Take amount as a poly_int64 rather
2210 (aarch64_progress_pointer): Avoid temporary variable.
2211 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2212 the mode attribute instead of GET_MODE.
2214 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2215 Alan Hayward <alan.hayward@arm.com>
2216 David Sherwood <david.sherwood@arm.com>
2218 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2219 x exists before using it.
2220 (aarch64_add_constant_internal): Rename to...
2221 (aarch64_add_offset_1): ...this. Replace regnum with separate
2222 src and dest rtxes. Handle the case in which they're different,
2223 including when the offset is zero. Replace scratchreg with an rtx.
2224 Use 2 additions if there is no spare register into which we can
2225 move a 16-bit constant.
2226 (aarch64_add_constant): Delete.
2227 (aarch64_add_offset): Replace reg with separate src and dest
2228 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2229 Use aarch64_add_offset_1.
2230 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2231 an rtx rather than an int. Take the delta as a poly_int64
2232 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2233 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2234 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2235 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2236 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2238 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2239 aarch64_add_constant.
2241 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2243 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2244 Use scalar_float_mode.
2246 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2248 * config/aarch64/aarch64-simd.md
2249 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2250 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2251 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2252 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2253 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2254 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2255 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2256 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2257 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2258 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2260 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2263 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2264 targ_options->x_arm_arch_string is non NULL.
2266 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2268 * config/aarch64/aarch64.h
2269 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2271 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2274 * expmed.c (emit_store_flag_force): Swap if const op0
2275 and change VOIDmode to mode of op0.
2277 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2279 PR rtl-optimization/83761
2280 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2281 than bytes to mode_for_size.
2283 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2286 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2287 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2290 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2293 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2294 when in layout mode.
2295 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2296 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2299 2018-01-10 Michael Collison <michael.collison@arm.com>
2301 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2302 * config/aarch64/aarch64-option-extension.def: Add
2303 AARCH64_OPT_EXTENSION of 'fp16fml'.
2304 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2305 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2306 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2307 * config/aarch64/constraints.md (Ui7): New constraint.
2308 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2309 (VFMLA_SEL_W): Ditto.
2312 (VFMLA16_LOW): New int iterator.
2313 (VFMLA16_HIGH): Ditto.
2314 (UNSPEC_FMLAL): New unspec.
2315 (UNSPEC_FMLSL): Ditto.
2316 (UNSPEC_FMLAL2): Ditto.
2317 (UNSPEC_FMLSL2): Ditto.
2318 (f16mac): New code attribute.
2319 * config/aarch64/aarch64-simd-builtins.def
2320 (aarch64_fmlal_lowv2sf): Ditto.
2321 (aarch64_fmlsl_lowv2sf): Ditto.
2322 (aarch64_fmlalq_lowv4sf): Ditto.
2323 (aarch64_fmlslq_lowv4sf): Ditto.
2324 (aarch64_fmlal_highv2sf): Ditto.
2325 (aarch64_fmlsl_highv2sf): Ditto.
2326 (aarch64_fmlalq_highv4sf): Ditto.
2327 (aarch64_fmlslq_highv4sf): Ditto.
2328 (aarch64_fmlal_lane_lowv2sf): Ditto.
2329 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2330 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2331 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2332 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2333 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2334 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2335 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2336 (aarch64_fmlal_lane_highv2sf): Ditto.
2337 (aarch64_fmlsl_lane_highv2sf): Ditto.
2338 (aarch64_fmlal_laneq_highv2sf): Ditto.
2339 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2340 (aarch64_fmlalq_lane_highv4sf): Ditto.
2341 (aarch64_fmlsl_lane_highv4sf): Ditto.
2342 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2343 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2344 * config/aarch64/aarch64-simd.md:
2345 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2346 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2347 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2348 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2349 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2350 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2351 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2352 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2353 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2354 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2355 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2356 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2357 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2358 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2359 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2360 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2361 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2362 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2363 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2364 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2365 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2366 (vfmlsl_low_u32): Ditto.
2367 (vfmlalq_low_u32): Ditto.
2368 (vfmlslq_low_u32): Ditto.
2369 (vfmlal_high_u32): Ditto.
2370 (vfmlsl_high_u32): Ditto.
2371 (vfmlalq_high_u32): Ditto.
2372 (vfmlslq_high_u32): Ditto.
2373 (vfmlal_lane_low_u32): Ditto.
2374 (vfmlsl_lane_low_u32): Ditto.
2375 (vfmlal_laneq_low_u32): Ditto.
2376 (vfmlsl_laneq_low_u32): Ditto.
2377 (vfmlalq_lane_low_u32): Ditto.
2378 (vfmlslq_lane_low_u32): Ditto.
2379 (vfmlalq_laneq_low_u32): Ditto.
2380 (vfmlslq_laneq_low_u32): Ditto.
2381 (vfmlal_lane_high_u32): Ditto.
2382 (vfmlsl_lane_high_u32): Ditto.
2383 (vfmlal_laneq_high_u32): Ditto.
2384 (vfmlsl_laneq_high_u32): Ditto.
2385 (vfmlalq_lane_high_u32): Ditto.
2386 (vfmlslq_lane_high_u32): Ditto.
2387 (vfmlalq_laneq_high_u32): Ditto.
2388 (vfmlslq_laneq_high_u32): Ditto.
2389 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2390 (AARCH64_FL_FOR_ARCH8_4): New.
2391 (AARCH64_ISA_F16FML): New ISA flag.
2392 (TARGET_F16FML): New feature flag for fp16fml.
2393 (doc/invoke.texi): Document new fp16fml option.
2395 2018-01-10 Michael Collison <michael.collison@arm.com>
2397 * config/aarch64/aarch64-builtins.c:
2398 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2399 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2400 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2401 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2402 (AARCH64_ISA_SHA3): New ISA flag.
2403 (TARGET_SHA3): New feature flag for sha3.
2404 * config/aarch64/iterators.md (sha512_op): New int attribute.
2405 (CRYPTO_SHA512): New int iterator.
2406 (UNSPEC_SHA512H): New unspec.
2407 (UNSPEC_SHA512H2): Ditto.
2408 (UNSPEC_SHA512SU0): Ditto.
2409 (UNSPEC_SHA512SU1): Ditto.
2410 * config/aarch64/aarch64-simd-builtins.def
2411 (aarch64_crypto_sha512hqv2di): New builtin.
2412 (aarch64_crypto_sha512h2qv2di): Ditto.
2413 (aarch64_crypto_sha512su0qv2di): Ditto.
2414 (aarch64_crypto_sha512su1qv2di): Ditto.
2415 (aarch64_eor3qv8hi): Ditto.
2416 (aarch64_rax1qv2di): Ditto.
2417 (aarch64_xarqv2di): Ditto.
2418 (aarch64_bcaxqv8hi): Ditto.
2419 * config/aarch64/aarch64-simd.md:
2420 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2421 (aarch64_crypto_sha512su0qv2di): Ditto.
2422 (aarch64_crypto_sha512su1qv2di): Ditto.
2423 (aarch64_eor3qv8hi): Ditto.
2424 (aarch64_rax1qv2di): Ditto.
2425 (aarch64_xarqv2di): Ditto.
2426 (aarch64_bcaxqv8hi): Ditto.
2427 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2428 (vsha512h2q_u64): Ditto.
2429 (vsha512su0q_u64): Ditto.
2430 (vsha512su1q_u64): Ditto.
2431 (veor3q_u16): Ditto.
2432 (vrax1q_u64): Ditto.
2434 (vbcaxq_u16): Ditto.
2435 * config/arm/types.md (crypto_sha512): New type attribute.
2436 (crypto_sha3): Ditto.
2437 (doc/invoke.texi): Document new sha3 option.
2439 2018-01-10 Michael Collison <michael.collison@arm.com>
2441 * config/aarch64/aarch64-builtins.c:
2442 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2443 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2444 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2445 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2446 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2447 (AARCH64_ISA_SM4): New ISA flag.
2448 (TARGET_SM4): New feature flag for sm4.
2449 * config/aarch64/aarch64-simd-builtins.def
2450 (aarch64_sm3ss1qv4si): Ditto.
2451 (aarch64_sm3tt1aq4si): Ditto.
2452 (aarch64_sm3tt1bq4si): Ditto.
2453 (aarch64_sm3tt2aq4si): Ditto.
2454 (aarch64_sm3tt2bq4si): Ditto.
2455 (aarch64_sm3partw1qv4si): Ditto.
2456 (aarch64_sm3partw2qv4si): Ditto.
2457 (aarch64_sm4eqv4si): Ditto.
2458 (aarch64_sm4ekeyqv4si): Ditto.
2459 * config/aarch64/aarch64-simd.md:
2460 (aarch64_sm3ss1qv4si): Ditto.
2461 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2462 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2463 (aarch64_sm4eqv4si): Ditto.
2464 (aarch64_sm4ekeyqv4si): Ditto.
2465 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2466 (sm3part_op): Ditto.
2467 (CRYPTO_SM3TT): Ditto.
2468 (CRYPTO_SM3PART): Ditto.
2469 (UNSPEC_SM3SS1): New unspec.
2470 (UNSPEC_SM3TT1A): Ditto.
2471 (UNSPEC_SM3TT1B): Ditto.
2472 (UNSPEC_SM3TT2A): Ditto.
2473 (UNSPEC_SM3TT2B): Ditto.
2474 (UNSPEC_SM3PARTW1): Ditto.
2475 (UNSPEC_SM3PARTW2): Ditto.
2476 (UNSPEC_SM4E): Ditto.
2477 (UNSPEC_SM4EKEY): Ditto.
2478 * config/aarch64/constraints.md (Ui2): New constraint.
2479 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2480 * config/arm/types.md (crypto_sm3): New type attribute.
2481 (crypto_sm4): Ditto.
2482 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2483 (vsm3tt1aq_u32): Ditto.
2484 (vsm3tt1bq_u32): Ditto.
2485 (vsm3tt2aq_u32): Ditto.
2486 (vsm3tt2bq_u32): Ditto.
2487 (vsm3partw1q_u32): Ditto.
2488 (vsm3partw2q_u32): Ditto.
2489 (vsm4eq_u32): Ditto.
2490 (vsm4ekeyq_u32): Ditto.
2491 (doc/invoke.texi): Document new sm4 option.
2493 2018-01-10 Michael Collison <michael.collison@arm.com>
2495 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2496 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2497 (AARCH64_FL_FOR_ARCH8_4): New.
2498 (AARCH64_FL_V8_4): New flag.
2499 (doc/invoke.texi): Document new armv8.4-a option.
2501 2018-01-10 Michael Collison <michael.collison@arm.com>
2503 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2504 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2505 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2506 * config/aarch64/aarch64-option-extension.def: Add
2507 AARCH64_OPT_EXTENSION of 'sha2'.
2508 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2509 (crypto): Disable sha2 and aes if crypto disabled.
2510 (crypto): Enable aes and sha2 if enabled.
2511 (simd): Disable sha2 and aes if simd disabled.
2512 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2514 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2515 (TARGET_SHA2): New feature flag for sha2.
2516 (TARGET_AES): New feature flag for aes.
2517 * config/aarch64/aarch64-simd.md:
2518 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2519 conditional on TARGET_AES.
2520 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2521 (aarch64_crypto_sha1hsi): Make pattern conditional
2523 (aarch64_crypto_sha1hv4si): Ditto.
2524 (aarch64_be_crypto_sha1hv4si): Ditto.
2525 (aarch64_crypto_sha1su1v4si): Ditto.
2526 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2527 (aarch64_crypto_sha1su0v4si): Ditto.
2528 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2529 (aarch64_crypto_sha256su0v4si): Ditto.
2530 (aarch64_crypto_sha256su1v4si): Ditto.
2531 (doc/invoke.texi): Document new aes and sha2 options.
2533 2018-01-10 Martin Sebor <msebor@redhat.com>
2535 PR tree-optimization/83781
2536 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2539 2018-01-11 Martin Sebor <msebor@gmail.com>
2540 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2542 PR tree-optimization/83501
2543 PR tree-optimization/81703
2545 * tree-ssa-strlen.c (get_string_cst): Rename...
2546 (get_string_len): ...to this. Handle global constants.
2547 (handle_char_store): Adjust.
2549 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2550 Jim Wilson <jimw@sifive.com>
2552 * config/riscv/riscv-protos.h (riscv_output_return): New.
2553 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2554 (riscv_attribute_table, riscv_output_return),
2555 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2556 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2557 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2559 (riscv_expand_prologue): Add early return for naked function.
2560 (riscv_expand_epilogue): Likewise.
2561 (riscv_function_ok_for_sibcall): Return false for naked function.
2562 (riscv_set_current_function): New.
2563 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2564 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2565 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2566 * doc/extend.texi (RISC-V Function Attributes): New.
2568 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2570 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2571 check for 128-bit long double before checking TCmode.
2572 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2573 128-bit long doubles before checking TFmode or TCmode.
2574 (FLOAT128_IBM_P): Likewise.
2576 2018-01-10 Martin Sebor <msebor@redhat.com>
2578 PR tree-optimization/83671
2579 * builtins.c (c_strlen): Unconditionally return zero for the empty
2581 Use -Warray-bounds for warnings.
2582 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2583 for non-constant array indices with COMPONENT_REF, arrays of
2584 arrays, and pointers to arrays.
2585 (gimple_fold_builtin_strlen): Determine and set length range for
2586 non-constant character arrays.
2588 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2591 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2594 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2596 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2598 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2601 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2602 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2603 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2604 indexed_or_indirect_operand predicate.
2605 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2606 (*vsx_le_perm_load_v8hi): Likewise.
2607 (*vsx_le_perm_load_v16qi): Likewise.
2608 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2609 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2610 (*vsx_le_perm_store_v8hi): Likewise.
2611 (*vsx_le_perm_store_v16qi): Likewise.
2612 (eight unnamed splitters): Likewise.
2614 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2616 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2617 * config/rs6000/emmintrin.h: Likewise.
2618 * config/rs6000/mmintrin.h: Likewise.
2619 * config/rs6000/xmmintrin.h: Likewise.
2621 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2624 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2626 * tree.c (tree_nop_conversion): Return true for location wrapper
2628 (maybe_wrap_with_location): New function.
2629 (selftest::check_strip_nops): New function.
2630 (selftest::test_location_wrappers): New function.
2631 (selftest::tree_c_tests): Call it.
2632 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2633 (maybe_wrap_with_location): New decl.
2634 (EXPR_LOCATION_WRAPPER_P): New macro.
2635 (location_wrapper_p): New inline function.
2636 (tree_strip_any_location_wrapper): New inline function.
2638 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2641 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2642 stack_realign_offset for the largest alignment of stack slot
2644 (ix86_find_max_used_stack_alignment): New function.
2645 (ix86_finalize_stack_frame_flags): Use it. Set
2646 max_used_stack_alignment if we don't realign stack.
2647 * config/i386/i386.h (machine_function): Add
2648 max_used_stack_alignment.
2650 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2652 * config/arm/arm.opt (-mbranch-cost): New option.
2653 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2656 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2659 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2660 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2662 2018-01-10 Richard Biener <rguenther@suse.de>
2665 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2666 early out so it also covers the case where we have a non-NULL
2669 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2671 PR tree-optimization/83753
2672 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2673 for non-strided grouped accesses if the number of elements is 1.
2675 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2678 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2679 * i386.h (TARGET_USE_GATHER): Define.
2680 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2682 2018-01-10 Martin Liska <mliska@suse.cz>
2685 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2686 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2688 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2689 CLEANUP_NO_PARTITIONING is not set.
2691 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2693 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2694 for vectors, as a partial revert of r254296.
2695 * rtl.h (const_vec_p): Delete.
2696 (const_vec_duplicate_p): Don't test for vector CONSTs.
2697 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2698 * expmed.c (make_tree): Likewise.
2701 * common.md (E, F): Use CONSTANT_P instead of checking for
2703 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2704 checking for CONST_VECTOR.
2706 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2709 * predict.c (force_edge_cold): Handle in more sane way edges
2712 2018-01-09 Carl Love <cel@us.ibm.com>
2714 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2716 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2717 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2718 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2719 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2720 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2721 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2722 * config/rs6000/rs6000-protos.h: Add extern defition for
2723 rs6000_generate_float2_double_code.
2724 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2726 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2727 (float2_v2df): Add define_expand.
2729 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2732 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2733 op_mode in the force_to_mode call.
2735 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2737 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2738 instead of checking each element individually.
2739 (aarch64_evpc_uzp): Likewise.
2740 (aarch64_evpc_zip): Likewise.
2741 (aarch64_evpc_ext): Likewise.
2742 (aarch64_evpc_rev): Likewise.
2743 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2744 instead of checking each element individually. Return true without
2746 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2747 whether all selected elements come from the same input, instead of
2748 checking each element individually. Remove calls to gen_rtx_REG,
2749 start_sequence and end_sequence and instead assert that no rtl is
2752 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2754 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2755 order of HIGH and CONST checks.
2757 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2759 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2760 if the destination isn't an SSA_NAME.
2762 2018-01-09 Richard Biener <rguenther@suse.de>
2764 PR tree-optimization/83668
2765 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2767 (canonicalize_loop_form): ... here, renamed from ...
2768 (canonicalize_loop_closed_ssa_form): ... this and amended to
2769 swap successor edges for loop exit blocks to make us use
2770 the RPO order we need for initial schedule generation.
2772 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2774 PR tree-optimization/64811
2775 * match.pd: When optimizing comparisons with Inf, avoid
2776 introducing or losing exceptions from comparisons with NaN.
2778 2018-01-09 Martin Liska <mliska@suse.cz>
2781 * asan.c (shadow_mem_size): Add gcc_assert.
2783 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2785 Don't save registers in main().
2788 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2789 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2790 * config/avr/avr.c (avr_set_current_function): Don't error if
2791 naked, OS_task or OS_main are specified at the same time.
2792 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2794 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2796 * common/config/avr/avr-common.c (avr_option_optimization_table):
2797 Switch on -mmain-is-OS_task for optimizing compilations.
2799 2018-01-09 Richard Biener <rguenther@suse.de>
2801 PR tree-optimization/83572
2802 * graphite.c: Include cfganal.h.
2803 (graphite_transform_loops): Connect infinite loops to exit
2804 and remove fake edges at the end.
2806 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2808 * ipa-inline.c (edge_badness): Revert accidental checkin.
2810 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2813 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2814 symbols; not inline clones.
2816 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2819 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2820 hard registers. Formatting fixes.
2822 PR preprocessor/83722
2823 * gcc.c (try_generate_repro): Pass
2824 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2825 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2828 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2829 Kito Cheng <kito.cheng@gmail.com>
2831 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2832 (riscv_leaf_function_p): Delete.
2833 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2835 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2837 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2839 (do_ifelse): New function.
2840 (do_isel): New function.
2841 (do_sub3): New function.
2842 (do_add3): New function.
2843 (do_load_mask_compare): New function.
2844 (do_overlap_load_compare): New function.
2845 (expand_compare_loop): New function.
2846 (expand_block_compare): Call expand_compare_loop() when appropriate.
2847 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2849 (-mblock-compare-inline-loop-limit): New option.
2851 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2854 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2855 Reverse order of second and third operands in first alternative.
2856 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2857 of first and second elements in UNSPEC_VPERMR vector.
2858 (altivec_expand_vec_perm_le): Likewise.
2860 2017-01-08 Jeff Law <law@redhat.com>
2862 PR rtl-optimizatin/81308
2863 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2864 (process_switch): If group_case_labels makes a change, then set
2866 (pass_convert_switch::execute): If a switch is converted, then
2867 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2869 PR rtl-optimization/81308
2870 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2873 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2875 PR target/83663 - Revert r255946
2876 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2877 generation for cases where splatting a value is not useful.
2878 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2879 across a vec_duplicate and a paradoxical subreg forming a vector
2880 mode to a vec_concat.
2882 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2884 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2885 -march=armv8.3-a variants.
2886 * config/arm/t-multilib: Likewise.
2887 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2889 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2891 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2893 (cceq_ior_compare_complement): Give it a name so I can use it, and
2894 change boolean_or_operator predicate to boolean_operator so it can
2895 be used to generate a crand.
2896 (eqne): New code iterator.
2897 (bd/bd_neg): New code_attrs.
2898 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2899 a single define_insn.
2900 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2901 decrement (bdnzt/bdnzf/bdzt/bdzf).
2902 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2903 with the new names of the branch decrement patterns, and added the
2904 names of the branch decrement conditional patterns.
2906 2018-01-08 Richard Biener <rguenther@suse.de>
2908 PR tree-optimization/83563
2909 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2912 2018-01-08 Richard Biener <rguenther@suse.de>
2915 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2917 2018-01-08 Richard Biener <rguenther@suse.de>
2919 PR tree-optimization/83685
2920 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2921 references to abnormals.
2923 2018-01-08 Richard Biener <rguenther@suse.de>
2926 * dwarf2out.c (output_indirect_strings): Handle empty
2927 skeleton_debug_str_hash.
2928 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2930 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2932 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2933 (emit_store_direct): Likewise.
2934 (arc_trampoline_adjust_address): Likewise.
2935 (arc_asm_trampoline_template): New function.
2936 (arc_initialize_trampoline): Use asm_trampoline_template.
2937 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2938 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2939 * config/arc/arc.md (flush_icache): Delete pattern.
2941 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2943 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2944 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2947 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2950 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2951 by not USED_FOR_TARGET.
2952 (make_pass_resolve_sw_modes): Likewise.
2954 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2956 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2959 2018-01-08 Richard Biener <rguenther@suse.de>
2962 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2964 2018-01-08 Richard Biener <rguenther@suse.de>
2967 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2969 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2972 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2973 basic blocks with a small number of successors.
2974 (convert_control_dep_chain_into_preds): Improve handling of
2976 (dump_predicates): Split apart into...
2977 (dump_pred_chain): ...here...
2978 (dump_pred_info): ...and here.
2979 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2980 (can_chain_union_be_invalidated_p): Improve check for invalidation
2982 (uninit_uses_cannot_happen): Avoid unnecessary if
2983 convert_control_dep_chain_into_preds yielded nothing.
2985 2018-01-06 Martin Sebor <msebor@redhat.com>
2987 PR tree-optimization/83640
2988 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2989 subtracting negative offset from size.
2990 (builtin_access::overlap): Adjust offset bounds of the access to fall
2991 within the size of the object if possible.
2993 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2995 PR rtl-optimization/83699
2996 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2997 extract_bit_field_as_subreg to cases in which the extracted
2998 value is also a vector.
3000 * lra-constraints.c (process_alt_operands): Test for the equivalence
3001 substitutions when detecting a possible reload cycle.
3003 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3006 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3007 by default if flag_selective_schedling{,2}. Formatting fixes.
3009 PR rtl-optimization/83682
3010 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3011 if it has non-VECTOR_MODE element mode.
3012 (vec_duplicate_p): Likewise.
3015 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3016 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3018 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3021 * config/i386/i386-builtin.def
3022 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3023 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3024 Require also OPTION_MASK_ISA_AVX512F in addition to
3025 OPTION_MASK_ISA_GFNI.
3026 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3027 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3028 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3029 to OPTION_MASK_ISA_GFNI.
3030 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3031 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3032 OPTION_MASK_ISA_AVX512BW.
3033 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3034 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3035 addition to OPTION_MASK_ISA_GFNI.
3036 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3037 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3038 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3039 to OPTION_MASK_ISA_GFNI.
3040 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3041 a requirement for all ISAs rather than any of them with a few
3043 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3045 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3046 bitmasks to be enabled with 3 exceptions, instead of requiring any
3047 enabled ISA with lots of exceptions.
3048 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3049 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3050 Change avx512bw in isa attribute to avx512f.
3051 * config/i386/sgxintrin.h: Add license boilerplate.
3052 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3053 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3054 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3055 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3057 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3058 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3059 temporarily sse2 rather than sse if not enabled already.
3062 * config/i386/sse.md (VI248_VLBW): Rename to ...
3063 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3064 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3065 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3066 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3067 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3068 mode iterator instead of VI248_VLBW.
3070 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3072 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3073 (record_modified): Skip clobbers; add debug output.
3074 (param_change_prob): Use sreal frequencies.
3076 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3078 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3079 punt for user-aligned variables.
3081 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3083 * tree-chrec.c (chrec_contains_symbols): Return true for
3086 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3089 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3090 of (x|y) == x for BICS pattern.
3092 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3094 PR tree-optimization/83605
3095 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3096 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3099 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3101 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3102 * config/epiphany/rtems.h: New file.
3104 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3105 Uros Bizjak <ubizjak@gmail.com>
3108 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3109 QIreg_operand instead of register_operand predicate.
3110 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3111 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3112 comments instead of -fmitigate[-_]rop.
3114 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3117 * cgraphunit.c (symbol_table::compile): Switch to text_section
3118 before calling assembly_start debug hook.
3119 * run-rtl-passes.c (run_rtl_passes): Likewise.
3122 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3124 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3125 range_int_cst_p rather than !symbolic_range_p before calling
3126 extract_range_from_multiplicative_op_1.
3128 2017-01-04 Jeff Law <law@redhat.com>
3130 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3131 redundant test in assertion.
3133 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3135 * doc/rtl.texi: Document machine_mode wrapper classes.
3137 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3139 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3142 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3144 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3145 the VEC_PERM_EXPR fold to fail.
3147 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3150 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3151 to switched_sections.
3153 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3156 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3159 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3162 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3163 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3165 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3168 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3169 is BLKmode and bitpos not zero or mode change is needed.
3171 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3174 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3177 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3180 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3181 instead of MULT rtx. Update all corresponding splitters.
3183 (*ssub<modesuffix>): Ditto.
3185 (*cmp_sadd_di): Update split patterns.
3186 (*cmp_sadd_si): Ditto.
3187 (*cmp_sadd_sidi): Ditto.
3188 (*cmp_ssub_di): Ditto.
3189 (*cmp_ssub_si): Ditto.
3190 (*cmp_ssub_sidi): Ditto.
3191 * config/alpha/predicates.md (const23_operand): New predicate.
3192 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3193 Look for ASHIFT, not MULT inner operand.
3194 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3196 2018-01-04 Martin Liska <mliska@suse.cz>
3198 PR gcov-profile/83669
3199 * gcov.c (output_intermediate_file): Add version to intermediate
3201 * doc/gcov.texi: Document new field 'version' in intermediate
3202 file format. Fix location of '-k' option of gcov command.
3204 2018-01-04 Martin Liska <mliska@suse.cz>
3207 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3209 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3211 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3213 2018-01-03 Martin Sebor <msebor@redhat.com>
3215 PR tree-optimization/83655
3216 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3217 checking calls with invalid arguments.
3219 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3221 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3222 (vectorizable_mask_load_store): Delete.
3223 (vectorizable_call): Return false for masked loads and stores.
3224 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3225 instead of gimple_assign_rhs1.
3226 (vectorizable_load): Handle IFN_MASK_LOAD.
3227 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3229 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3231 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3233 (vectorizable_mask_load_store): ...here.
3234 (vectorizable_load): ...and here.
3236 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3238 * tree-vect-stmts.c (vect_build_all_ones_mask)
3239 (vect_build_zero_merge_argument): New functions, split out from...
3240 (vectorizable_load): ...here.
3242 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3244 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3246 (vectorizable_mask_load_store): ...here.
3247 (vectorizable_store): ...and here.
3249 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3251 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3253 (vectorizable_mask_load_store): ...here.
3255 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3257 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3258 (vect_model_store_cost): Take a vec_load_store_type instead of a
3260 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3261 (vect_model_store_cost): Take a vec_load_store_type instead of a
3263 (vectorizable_mask_load_store): Update accordingly.
3264 (vectorizable_store): Likewise.
3265 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3267 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3269 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3270 IFN_MASK_LOAD calls here rather than...
3271 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3273 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3274 Alan Hayward <alan.hayward@arm.com>
3275 David Sherwood <david.sherwood@arm.com>
3277 * expmed.c (extract_bit_field_1): For vector extracts,
3278 fall back to extract_bit_field_as_subreg if vec_extract
3281 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3282 Alan Hayward <alan.hayward@arm.com>
3283 David Sherwood <david.sherwood@arm.com>
3285 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3286 they are variable or constant sized.
3287 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3288 slots for constant-sized data.
3290 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3291 Alan Hayward <alan.hayward@arm.com>
3292 David Sherwood <david.sherwood@arm.com>
3294 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3295 handling COND_EXPRs with boolean comparisons, try to find a better
3296 basis for the mask type than the boolean itself.
3298 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3300 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3301 is calculated and how it can be overridden.
3302 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3303 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3305 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3308 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3309 Alan Hayward <alan.hayward@arm.com>
3310 David Sherwood <david.sherwood@arm.com>
3312 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3313 Remove the mode argument.
3314 (aarch64_simd_valid_immediate): Remove the mode and inverse
3316 * config/aarch64/iterators.md (bitsize): New iterator.
3317 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3318 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3319 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3320 aarch64_simd_valid_immediate.
3321 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3322 (aarch64_reg_or_bic_imm): Likewise.
3323 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3324 with an insn_type enum and msl with a modifier_type enum.
3325 Replace element_width with a scalar_mode. Change the shift
3326 to unsigned int. Add constructors for scalar_float_mode and
3327 scalar_int_mode elements.
3328 (aarch64_vect_float_const_representable_p): Delete.
3329 (aarch64_can_const_movi_rtx_p)
3330 (aarch64_simd_scalar_immediate_valid_for_move)
3331 (aarch64_simd_make_constant): Update call to
3332 aarch64_simd_valid_immediate.
3333 (aarch64_advsimd_valid_immediate_hs): New function.
3334 (aarch64_advsimd_valid_immediate): Likewise.
3335 (aarch64_simd_valid_immediate): Remove mode and inverse
3336 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3337 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3338 and aarch64_float_const_representable_p on the result.
3339 (aarch64_output_simd_mov_immediate): Remove mode argument.
3340 Update call to aarch64_simd_valid_immediate and use of
3341 simd_immediate_info.
3342 (aarch64_output_scalar_simd_mov_immediate): Update call
3345 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3346 Alan Hayward <alan.hayward@arm.com>
3347 David Sherwood <david.sherwood@arm.com>
3349 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3350 (mode_nunits): Likewise CONST_MODE_NUNITS.
3351 * machmode.def (ADJUST_NUNITS): Document.
3352 * genmodes.c (mode_data::need_nunits_adj): New field.
3353 (blank_mode): Update accordingly.
3354 (adj_nunits): New variable.
3355 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3357 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3358 listed in adj_nunits.
3359 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3360 listed in adj_nunits. Don't emit case statements for such modes.
3361 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3362 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3363 nothing if adj_nunits is nonnull.
3364 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3365 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3366 (emit_mode_fbit): Update use of print_maybe_const_decl.
3367 (emit_move_size): Likewise. Treat the array as non-const
3369 (emit_mode_adjustments): Handle adj_nunits.
3371 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3373 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3374 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3375 (VECTOR_MODES): Use it.
3376 (make_vector_modes): Take the prefix as an argument.
3378 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3379 Alan Hayward <alan.hayward@arm.com>
3380 David Sherwood <david.sherwood@arm.com>
3382 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3383 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3384 for MODE_VECTOR_BOOL.
3385 * machmode.def (VECTOR_BOOL_MODE): Document.
3386 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3387 (make_vector_bool_mode): New function.
3388 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3390 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3391 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3393 * stor-layout.c (int_mode_for_mode): Likewise.
3394 * tree.c (build_vector_type_for_mode): Likewise.
3395 * varasm.c (output_constant_pool_2): Likewise.
3396 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3397 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3398 for MODE_VECTOR_BOOL.
3399 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3400 of mode class checks.
3401 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3402 instead of a list of mode class checks.
3403 (expand_vector_scalar_condition): Likewise.
3404 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3406 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3407 Alan Hayward <alan.hayward@arm.com>
3408 David Sherwood <david.sherwood@arm.com>
3410 * machmode.h (mode_size): Change from unsigned short to
3412 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3413 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3414 or if measurement_type is not polynomial.
3415 (fixed_size_mode::includes_p): Check for constant-sized modes.
3416 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3417 return a poly_uint16 rather than an unsigned short.
3418 (emit_mode_size): Change the type of mode_size from unsigned short
3419 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3420 (emit_mode_adjustments): Cope with polynomial vector sizes.
3421 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3423 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3425 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3426 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3427 * caller-save.c (setup_save_areas): Likewise.
3428 (replace_reg_with_saved_mem): Likewise.
3429 * calls.c (emit_library_call_value_1): Likewise.
3430 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3431 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3432 (gen_lowpart_for_combine): Likewise.
3433 * convert.c (convert_to_integer_1): Likewise.
3434 * cse.c (equiv_constant, cse_insn): Likewise.
3435 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3436 (cselib_subst_to_values): Likewise.
3437 * dce.c (word_dce_process_block): Likewise.
3438 * df-problems.c (df_word_lr_mark_ref): Likewise.
3439 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3440 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3441 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3442 (rtl_for_decl_location): Likewise.
3443 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3444 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3445 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3446 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3447 (expand_expr_real_1): Likewise.
3448 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3449 (pad_below): Likewise.
3450 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3451 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3452 * ira.c (get_subreg_tracking_sizes): Likewise.
3453 * ira-build.c (ira_create_allocno_objects): Likewise.
3454 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3455 (ira_sort_regnos_for_alter_reg): Likewise.
3456 * ira-costs.c (record_operand_costs): Likewise.
3457 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3458 (resolve_simple_move): Likewise.
3459 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3460 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3461 (lra_constraints): Likewise.
3462 (CONST_POOL_OK_P): Reject variable-sized modes.
3463 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3464 (add_pseudo_to_slot, lra_spill): Likewise.
3465 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3466 * optabs-query.c (get_best_extraction_insn): Likewise.
3467 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3468 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3469 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3470 * recog.c (offsettable_address_addr_space_p): Likewise.
3471 * regcprop.c (maybe_mode_change): Likewise.
3472 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3473 * regrename.c (build_def_use): Likewise.
3474 * regstat.c (dump_reg_info): Likewise.
3475 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3476 (find_reloads, find_reloads_subreg_address): Likewise.
3477 * reload1.c (eliminate_regs_1): Likewise.
3478 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3479 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3480 (simplify_binary_operation_1, simplify_subreg): Likewise.
3481 * targhooks.c (default_function_arg_padding): Likewise.
3482 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3483 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3484 (verify_gimple_assign_ternary): Likewise.
3485 * tree-inline.c (estimate_move_cost): Likewise.
3486 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3487 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3488 (get_address_cost_ainc): Likewise.
3489 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3490 (vect_supportable_dr_alignment): Likewise.
3491 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3492 (vectorizable_reduction): Likewise.
3493 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3494 (vectorizable_operation, vectorizable_load): Likewise.
3495 * tree.c (build_same_sized_truth_vector_type): Likewise.
3496 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3497 * var-tracking.c (emit_note_insn_var_location): Likewise.
3498 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3499 (ADDR_VEC_ALIGN): Likewise.
3501 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3502 Alan Hayward <alan.hayward@arm.com>
3503 David Sherwood <david.sherwood@arm.com>
3505 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3507 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3508 or if measurement_type is polynomial.
3509 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3510 * combine.c (make_extraction): Likewise.
3511 * dse.c (find_shift_sequence): Likewise.
3512 * dwarf2out.c (mem_loc_descriptor): Likewise.
3513 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3514 (extract_bit_field, extract_low_bits): Likewise.
3515 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3516 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3517 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3518 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3519 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3520 * reload.c (find_reloads): Likewise.
3521 * reload1.c (alter_reg): Likewise.
3522 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3523 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3524 * tree-if-conv.c (predicate_mem_writes): Likewise.
3525 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3526 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3527 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3528 * valtrack.c (dead_debug_insert_temp): Likewise.
3529 * varasm.c (mergeable_constant_section): Likewise.
3530 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3532 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3533 Alan Hayward <alan.hayward@arm.com>
3534 David Sherwood <david.sherwood@arm.com>
3536 * expr.c (expand_assignment): Cope with polynomial mode sizes
3537 when assigning to a CONCAT.
3539 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3540 Alan Hayward <alan.hayward@arm.com>
3541 David Sherwood <david.sherwood@arm.com>
3543 * machmode.h (mode_precision): Change from unsigned short to
3545 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3547 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3548 or if measurement_type is not polynomial.
3549 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3550 in which the mode is already known to be a scalar_int_mode.
3551 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3552 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3554 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3555 for GET_MODE_PRECISION.
3556 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3557 for GET_MODE_PRECISION.
3558 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3560 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3561 (expand_field_assignment, make_extraction): Likewise.
3562 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3563 (get_last_value): Likewise.
3564 * convert.c (convert_to_integer_1): Likewise.
3565 * cse.c (cse_insn): Likewise.
3566 * expr.c (expand_expr_real_1): Likewise.
3567 * lra-constraints.c (simplify_operand_subreg): Likewise.
3568 * optabs-query.c (can_atomic_load_p): Likewise.
3569 * optabs.c (expand_atomic_load): Likewise.
3570 (expand_atomic_store): Likewise.
3571 * ree.c (combine_reaching_defs): Likewise.
3572 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3573 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3574 * tree.h (type_has_mode_precision_p): Likewise.
3575 * ubsan.c (instrument_si_overflow): Likewise.
3577 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3578 Alan Hayward <alan.hayward@arm.com>
3579 David Sherwood <david.sherwood@arm.com>
3581 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3582 polynomial numbers of units.
3583 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3584 (valid_vector_subparts_p): New function.
3585 (build_vector_type): Remove temporary shim and take the number
3586 of units as a poly_uint64 rather than an int.
3587 (build_opaque_vector_type): Take the number of units as a
3588 poly_uint64 rather than an int.
3589 * tree.c (build_vector_from_ctor): Handle polynomial
3590 TYPE_VECTOR_SUBPARTS.
3591 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3592 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3593 (build_vector_from_val): If the number of units is variable,
3594 use build_vec_duplicate_cst for constant operands and
3595 VEC_DUPLICATE_EXPR otherwise.
3596 (make_vector_type): Remove temporary is_constant ().
3597 (build_vector_type, build_opaque_vector_type): Take the number of
3598 units as a poly_uint64 rather than an int.
3599 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3601 * cfgexpand.c (expand_debug_expr): Likewise.
3602 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3603 (store_constructor, expand_expr_real_1): Likewise.
3604 (const_scalar_mask_from_tree): Likewise.
3605 * fold-const-call.c (fold_const_reduction): Likewise.
3606 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3607 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3608 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3609 (fold_relational_const): Likewise.
3610 (native_interpret_vector): Likewise. Change the size from an
3611 int to an unsigned int.
3612 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3613 TYPE_VECTOR_SUBPARTS.
3614 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3615 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3616 duplicating a non-constant operand into a variable-length vector.
3617 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3618 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3619 * ipa-icf.c (sem_variable::equals): Likewise.
3620 * match.pd: Likewise.
3621 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3622 * print-tree.c (print_node): Likewise.
3623 * stor-layout.c (layout_type): Likewise.
3624 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3625 * tree-cfg.c (verify_gimple_comparison): Likewise.
3626 (verify_gimple_assign_binary): Likewise.
3627 (verify_gimple_assign_ternary): Likewise.
3628 (verify_gimple_assign_single): Likewise.
3629 * tree-pretty-print.c (dump_generic_node): Likewise.
3630 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3631 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3632 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3633 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3634 (vect_shift_permute_load_chain): Likewise.
3635 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3636 (expand_vector_condition, optimize_vector_constructor): Likewise.
3637 (lower_vec_perm, get_compute_type): Likewise.
3638 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3639 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3640 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3641 (vect_recog_mask_conversion_pattern): Likewise.
3642 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3643 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3644 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3645 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3646 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3647 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3648 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3649 (supportable_widening_operation): Likewise.
3650 (supportable_narrowing_operation): Likewise.
3651 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3653 * varasm.c (output_constant): Likewise.
3655 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3656 Alan Hayward <alan.hayward@arm.com>
3657 David Sherwood <david.sherwood@arm.com>
3659 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3660 so that both the length == 3 and length != 3 cases set up their
3661 own permute vectors. Add comments explaining why we know the
3662 number of elements is constant.
3663 (vect_permute_load_chain): Likewise.
3665 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3666 Alan Hayward <alan.hayward@arm.com>
3667 David Sherwood <david.sherwood@arm.com>
3669 * machmode.h (mode_nunits): Change from unsigned char to
3671 (ONLY_FIXED_SIZE_MODES): New macro.
3672 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3673 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3674 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3676 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3677 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3678 or if measurement_type is not polynomial.
3679 * genmodes.c (ZERO_COEFFS): New macro.
3680 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3682 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3683 Use ZERO_COEFFS when emitting initializers.
3684 * data-streamer.h (bp_pack_poly_value): New function.
3685 (bp_unpack_poly_value): Likewise.
3686 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3687 for GET_MODE_NUNITS.
3688 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3689 for GET_MODE_NUNITS.
3690 * tree.c (make_vector_type): Remove temporary shim and make
3691 the real function take the number of units as a poly_uint64
3693 (build_vector_type_for_mode): Handle polynomial nunits.
3694 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3695 * emit-rtl.c (const_vec_series_p_1): Likewise.
3696 (gen_rtx_CONST_VECTOR): Likewise.
3697 * fold-const.c (test_vec_duplicate_folding): Likewise.
3698 * genrecog.c (validate_pattern): Likewise.
3699 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3700 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3701 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3702 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3703 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3704 * rtlanal.c (subreg_get_info): Likewise.
3705 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3706 (vect_grouped_load_supported): Likewise.
3707 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3708 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3709 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3710 (simplify_const_unary_operation, simplify_binary_operation_1)
3711 (simplify_const_binary_operation, simplify_ternary_operation)
3712 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3713 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3714 instead of CONST_VECTOR_NUNITS.
3715 * varasm.c (output_constant_pool_2): Likewise.
3716 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3717 explicit-encoded elements in the XVEC for variable-length vectors.
3719 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3721 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3723 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3724 Alan Hayward <alan.hayward@arm.com>
3725 David Sherwood <david.sherwood@arm.com>
3727 * coretypes.h (fixed_size_mode): Declare.
3728 (fixed_size_mode_pod): New typedef.
3729 * builtins.h (target_builtins::x_apply_args_mode)
3730 (target_builtins::x_apply_result_mode): Change type to
3731 fixed_size_mode_pod.
3732 * builtins.c (apply_args_size, apply_result_size, result_vector)
3733 (expand_builtin_apply_args_1, expand_builtin_apply)
3734 (expand_builtin_return): Update accordingly.
3736 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3738 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3739 * cselib.c (cselib_hash_rtx): Likewise.
3740 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3741 CONST_VECTOR encoding.
3743 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3744 Jeff Law <law@redhat.com>
3747 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3748 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3749 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3750 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3753 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3754 explicitly probe *sp in a noreturn function if there were any callee
3755 register saves or frame pointer is needed.
3757 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3760 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3761 BLKmode for ternary, binary or unary expressions.
3764 * var-tracking.c (delete_vta_debug_insn): New inline function.
3765 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3766 insns from get_insns () to NULL instead of each bb separately.
3767 Use delete_vta_debug_insn. No longer static.
3768 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3769 delete_vta_debug_insns callers.
3770 * rtl.h (delete_vta_debug_insns): Declare.
3771 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3772 instead of variable_tracking_main.
3774 2018-01-03 Martin Sebor <msebor@redhat.com>
3776 PR tree-optimization/83603
3777 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3778 arguments past the endof the argument list in functions declared
3779 without a prototype.
3780 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3781 Avoid checking when arguments are null.
3783 2018-01-03 Martin Sebor <msebor@redhat.com>
3786 * doc/extend.texi (attribute const): Fix a typo.
3787 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3788 issuing -Wsuggest-attribute for void functions.
3790 2018-01-03 Martin Sebor <msebor@redhat.com>
3792 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3793 offset_int::from instead of wide_int::to_shwi.
3794 (maybe_diag_overlap): Remove assertion.
3795 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3796 * gimple-ssa-sprintf.c (format_directive): Same.
3797 (parse_directive): Same.
3798 (sprintf_dom_walker::compute_format_length): Same.
3799 (try_substitute_return_value): Same.
3801 2017-01-03 Jeff Law <law@redhat.com>
3804 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3805 non-constant residual for zero at runtime and avoid probing in
3806 that case. Reorganize code for trailing problem to mirror handling
3809 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3811 PR tree-optimization/83501
3812 * tree-ssa-strlen.c (get_string_cst): New.
3813 (handle_char_store): Call get_string_cst.
3815 2018-01-03 Martin Liska <mliska@suse.cz>
3817 PR tree-optimization/83593
3818 * tree-ssa-strlen.c: Include tree-cfg.h.
3819 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3820 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3821 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3823 (strlen_dom_walker::before_dom_children): Call
3824 gimple_purge_dead_eh_edges. Dump tranformation with details
3826 (strlen_dom_walker::before_dom_children): Update call by adding
3827 new argument cleanup_eh.
3828 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3830 2018-01-03 Martin Liska <mliska@suse.cz>
3833 * cif-code.def (VARIADIC_THUNK): New enum value.
3834 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3837 2018-01-03 Jan Beulich <jbeulich@suse.com>
3839 * sse.md (mov<mode>_internal): Tighten condition for when to use
3840 vmovdqu<ssescalarsize> for TI and OI modes.
3842 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3844 Update copyright years.
3846 2018-01-03 Martin Liska <mliska@suse.cz>
3849 * ipa-visibility.c (function_and_variable_visibility): Skip
3850 functions with noipa attribure.
3852 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3854 * gcc.c (process_command): Update copyright notice dates.
3855 * gcov-dump.c (print_version): Ditto.
3856 * gcov.c (print_version): Ditto.
3857 * gcov-tool.c (print_version): Ditto.
3858 * gengtype.c (create_file): Ditto.
3859 * doc/cpp.texi: Bump @copying's copyright year.
3860 * doc/cppinternals.texi: Ditto.
3861 * doc/gcc.texi: Ditto.
3862 * doc/gccint.texi: Ditto.
3863 * doc/gcov.texi: Ditto.
3864 * doc/install.texi: Ditto.
3865 * doc/invoke.texi: Ditto.
3867 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3869 * vector-builder.h (vector_builder::m_full_nelts): Change from
3870 unsigned int to poly_uint64.
3871 (vector_builder::full_nelts): Update prototype accordingly.
3872 (vector_builder::new_vector): Likewise.
3873 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3874 (vector_builder::operator ==): Likewise.
3875 (vector_builder::finalize): Likewise.
3876 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3877 Take the number of elements as a poly_uint64 rather than an
3879 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3880 from unsigned int to poly_uint64.
3881 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3882 (vec_perm_indices::new_vector): Likewise.
3883 (vec_perm_indices::length): Likewise.
3884 (vec_perm_indices::nelts_per_input): Likewise.
3885 (vec_perm_indices::input_nelts): Likewise.
3886 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3887 number of elements per input as a poly_uint64 rather than an
3888 unsigned int. Use the original encoding for variable-length
3889 vectors, rather than clamping each individual element.
3890 For the second and subsequent elements in each pattern,
3891 clamp the step and base before clamping their sum.
3892 (vec_perm_indices::series_p): Handle polynomial element counts.
3893 (vec_perm_indices::all_in_range_p): Likewise.
3894 (vec_perm_indices_to_tree): Likewise.
3895 (vec_perm_indices_to_rtx): Likewise.
3896 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3897 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3898 (tree_vector_builder::new_binary_operation): Handle polynomial
3899 element counts. Return false if we need to know the number
3900 of elements at compile time.
3901 * fold-const.c (fold_vec_perm): Punt if the number of elements
3902 isn't known at compile time.
3904 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3906 * vec-perm-indices.h (vec_perm_builder): Change element type
3907 from HOST_WIDE_INT to poly_int64.
3908 (vec_perm_indices::element_type): Update accordingly.
3909 (vec_perm_indices::clamp): Handle polynomial element_types.
3910 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3911 (vec_perm_indices::all_in_range_p): Likewise.
3912 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3914 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3915 polynomial vec_perm_indices element types.
3916 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3917 * fold-const.c (fold_vec_perm): Likewise.
3918 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3919 * tree-vect-generic.c (lower_vec_perm): Likewise.
3920 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3921 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3922 element type to HOST_WIDE_INT.
3924 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3925 Alan Hayward <alan.hayward@arm.com>
3926 David Sherwood <david.sherwood@arm.com>
3928 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3929 rather than an int. Use plus_constant.
3930 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3931 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3933 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3934 Alan Hayward <alan.hayward@arm.com>
3935 David Sherwood <david.sherwood@arm.com>
3937 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3938 a HOST_WIDE_INT to a poly_int64.
3940 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3941 Alan Hayward <alan.hayward@arm.com>
3942 David Sherwood <david.sherwood@arm.com>
3944 * calls.c (load_register_parameters): Cope with polynomial
3945 mode sizes. Require a constant size for BLKmode parameters
3946 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3947 forces a parameter to be padded at the lsb end in order to
3948 fill a complete number of words, require the parameter size
3949 to be ordered wrt UNITS_PER_WORD.
3951 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3952 Alan Hayward <alan.hayward@arm.com>
3953 David Sherwood <david.sherwood@arm.com>
3955 * reload1.c (spill_stack_slot_width): Change element type
3956 from unsigned int to poly_uint64_pod.
3957 (alter_reg): Treat mode sizes as polynomial.
3959 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3960 Alan Hayward <alan.hayward@arm.com>
3961 David Sherwood <david.sherwood@arm.com>
3963 * reload.c (complex_word_subreg_p): New function.
3964 (reload_inner_reg_of_subreg, push_reload): Use it.
3966 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3967 Alan Hayward <alan.hayward@arm.com>
3968 David Sherwood <david.sherwood@arm.com>
3970 * lra-constraints.c (process_alt_operands): Reject matched
3971 operands whose sizes aren't ordered.
3972 (match_reload): Refer to this check here.
3974 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3975 Alan Hayward <alan.hayward@arm.com>
3976 David Sherwood <david.sherwood@arm.com>
3978 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3979 that the mode size is in the set {1, 2, 4, 8, 16}.
3981 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3982 Alan Hayward <alan.hayward@arm.com>
3983 David Sherwood <david.sherwood@arm.com>
3985 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3986 Use plus_constant instead of gen_rtx_PLUS.
3988 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3989 Alan Hayward <alan.hayward@arm.com>
3990 David Sherwood <david.sherwood@arm.com>
3992 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3993 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3994 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3995 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3996 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3997 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3998 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3999 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4000 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4001 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4003 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4004 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4005 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4006 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4007 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4008 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4009 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4010 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4011 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4012 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4014 * expr.c (emit_move_resolve_push): Treat the input and result
4015 of PUSH_ROUNDING as a poly_int64.
4016 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4017 (emit_push_insn): Likewise.
4018 * lra-eliminations.c (mark_not_eliminable): Likewise.
4019 * recog.c (push_operand): Likewise.
4020 * reload1.c (elimination_effects): Likewise.
4021 * rtlanal.c (nonzero_bits1): Likewise.
4022 * calls.c (store_one_arg): Likewise. Require the padding to be
4023 known at compile time.
4025 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4026 Alan Hayward <alan.hayward@arm.com>
4027 David Sherwood <david.sherwood@arm.com>
4029 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4030 Use plus_constant instead of gen_rtx_PLUS.
4032 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4033 Alan Hayward <alan.hayward@arm.com>
4034 David Sherwood <david.sherwood@arm.com>
4036 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4039 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4040 Alan Hayward <alan.hayward@arm.com>
4041 David Sherwood <david.sherwood@arm.com>
4043 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4044 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4045 via stack temporaries. Treat the mode size as polynomial too.
4047 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4048 Alan Hayward <alan.hayward@arm.com>
4049 David Sherwood <david.sherwood@arm.com>
4051 * expr.c (expand_expr_real_2): When handling conversions involving
4052 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4053 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4054 as a poly_uint64 too.
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4062 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4063 Alan Hayward <alan.hayward@arm.com>
4064 David Sherwood <david.sherwood@arm.com>
4066 * combine.c (can_change_dest_mode): Handle polynomial
4067 REGMODE_NATURAL_SIZE.
4068 * expmed.c (store_bit_field_1): Likewise.
4069 * expr.c (store_constructor): Likewise.
4070 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4071 and polynomial REGMODE_NATURAL_SIZE.
4072 (gen_lowpart_common): Likewise.
4073 * reginfo.c (record_subregs_of_mode): Likewise.
4074 * rtlanal.c (read_modify_subreg_p): Likewise.
4076 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4077 Alan Hayward <alan.hayward@arm.com>
4078 David Sherwood <david.sherwood@arm.com>
4080 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4081 numbers of elements.
4083 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4084 Alan Hayward <alan.hayward@arm.com>
4085 David Sherwood <david.sherwood@arm.com>
4087 * match.pd: Cope with polynomial numbers of vector elements.
4089 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4090 Alan Hayward <alan.hayward@arm.com>
4091 David Sherwood <david.sherwood@arm.com>
4093 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4094 in a POINTER_PLUS_EXPR.
4096 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4097 Alan Hayward <alan.hayward@arm.com>
4098 David Sherwood <david.sherwood@arm.com>
4100 * omp-simd-clone.c (simd_clone_subparts): New function.
4101 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4102 (ipa_simd_modify_function_body): Likewise.
4104 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4105 Alan Hayward <alan.hayward@arm.com>
4106 David Sherwood <david.sherwood@arm.com>
4108 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4109 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4110 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4111 (expand_vector_condition, vector_element): Likewise.
4112 (subparts_gt): New function.
4113 (get_compute_type): Use subparts_gt.
4114 (count_type_subparts): Delete.
4115 (expand_vector_operations_1): Use subparts_gt instead of
4116 count_type_subparts.
4118 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4119 Alan Hayward <alan.hayward@arm.com>
4120 David Sherwood <david.sherwood@arm.com>
4122 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4123 (vect_compile_time_alias): ...this new function. Do the calculation
4124 on poly_ints rather than trees.
4125 (vect_prune_runtime_alias_test_list): Update call accordingly.
4127 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4128 Alan Hayward <alan.hayward@arm.com>
4129 David Sherwood <david.sherwood@arm.com>
4131 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4133 (vect_schedule_slp_instance): Likewise.
4135 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4136 Alan Hayward <alan.hayward@arm.com>
4137 David Sherwood <david.sherwood@arm.com>
4139 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4140 constant and extern definitions for variable-length vectors.
4141 (vect_get_constant_vectors): Note that the number of units
4142 is known to be constant.
4144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4145 Alan Hayward <alan.hayward@arm.com>
4146 David Sherwood <david.sherwood@arm.com>
4148 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4149 of units as polynomial. Choose between WIDE and NARROW based
4152 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4153 Alan Hayward <alan.hayward@arm.com>
4154 David Sherwood <david.sherwood@arm.com>
4156 * tree-vect-stmts.c (simd_clone_subparts): New function.
4157 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4160 Alan Hayward <alan.hayward@arm.com>
4161 David Sherwood <david.sherwood@arm.com>
4163 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4164 vectors as polynomial. Use build_index_vector for
4167 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4168 Alan Hayward <alan.hayward@arm.com>
4169 David Sherwood <david.sherwood@arm.com>
4171 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4172 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4173 for variable-length vectors.
4174 (vectorizable_mask_load_store): Treat the number of units as
4175 polynomial, asserting that it is constant if the condition has
4176 already been enforced.
4177 (vectorizable_store, vectorizable_load): Likewise.
4179 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4180 Alan Hayward <alan.hayward@arm.com>
4181 David Sherwood <david.sherwood@arm.com>
4183 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4184 of units as polynomial. Punt if we can't tell at compile time
4185 which vector contains the final result.
4187 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4188 Alan Hayward <alan.hayward@arm.com>
4189 David Sherwood <david.sherwood@arm.com>
4191 * tree-vect-loop.c (vectorizable_induction): Treat the number
4192 of units as polynomial. Punt on SLP inductions. Use an integer
4193 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4194 cast of such a series for variable-length floating-point
4197 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4198 Alan Hayward <alan.hayward@arm.com>
4199 David Sherwood <david.sherwood@arm.com>
4201 * tree.h (build_index_vector): Declare.
4202 * tree.c (build_index_vector): New function.
4203 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4204 of units as polynomial, forcibly converting it to a constant if
4205 vectorizable_reduction has already enforced the condition.
4206 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4207 to create a {1,2,3,...} vector.
4208 (vectorizable_reduction): Treat the number of units as polynomial.
4209 Choose vectype_in based on the largest scalar element size rather
4210 than the smallest number of units. Enforce the restrictions
4213 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4214 Alan Hayward <alan.hayward@arm.com>
4215 David Sherwood <david.sherwood@arm.com>
4217 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4218 number of units as polynomial.
4220 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4221 Alan Hayward <alan.hayward@arm.com>
4222 David Sherwood <david.sherwood@arm.com>
4224 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4225 * target.def (autovectorize_vector_sizes): Return the vector sizes
4226 by pointer, using vector_sizes rather than a bitmask.
4227 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4228 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4229 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4231 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4232 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4233 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4234 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4235 * omp-general.c (omp_max_vf): Likewise.
4236 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4237 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4238 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4239 * tree-vect-slp.c (vect_slp_bb): Likewise.
4240 * doc/tm.texi: Regenerate.
4241 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4243 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4244 the vector size as a poly_uint64 rather than an unsigned int.
4245 (current_vector_size): Change from an unsigned int to a poly_uint64.
4246 (get_vectype_for_scalar_type): Update accordingly.
4247 * tree.h (build_truth_vector_type): Take the size and number of
4248 units as a poly_uint64 rather than an unsigned int.
4249 (build_vector_type): Add a temporary overload that takes
4250 the number of units as a poly_uint64 rather than an unsigned int.
4251 * tree.c (make_vector_type): Likewise.
4252 (build_truth_vector_type): Take the number of units as a poly_uint64
4253 rather than an unsigned int.
4255 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4256 Alan Hayward <alan.hayward@arm.com>
4257 David Sherwood <david.sherwood@arm.com>
4259 * target.def (get_mask_mode): Take the number of units and length
4260 as poly_uint64s rather than unsigned ints.
4261 * targhooks.h (default_get_mask_mode): Update accordingly.
4262 * targhooks.c (default_get_mask_mode): Likewise.
4263 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4264 * doc/tm.texi: Regenerate.
4266 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4267 Alan Hayward <alan.hayward@arm.com>
4268 David Sherwood <david.sherwood@arm.com>
4270 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4271 * omp-general.c (omp_max_vf): Likewise.
4272 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4273 (expand_omp_simd): Handle polynomial safelen.
4274 * omp-low.c (omplow_simd_context): Add a default constructor.
4275 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4276 (lower_rec_simd_input_clauses): Update accordingly.
4277 (lower_rec_input_clauses): Likewise.
4279 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4280 Alan Hayward <alan.hayward@arm.com>
4281 David Sherwood <david.sherwood@arm.com>
4283 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4284 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4285 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4286 (vect_analyze_slp_cost): Likewise.
4287 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4288 (vect_model_load_cost): Likewise.
4290 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4291 Alan Hayward <alan.hayward@arm.com>
4292 David Sherwood <david.sherwood@arm.com>
4294 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4295 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4296 from an unsigned int * to a poly_uint64_pod *.
4297 (calculate_unrolling_factor): New function.
4298 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4300 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4301 Alan Hayward <alan.hayward@arm.com>
4302 David Sherwood <david.sherwood@arm.com>
4304 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4305 from an unsigned int to a poly_uint64.
4306 (_loop_vec_info::slp_unrolling_factor): Likewise.
4307 (_loop_vec_info::vectorization_factor): Change from an int
4309 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4310 (vect_get_num_vectors): New function.
4311 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4312 (vect_get_num_copies): Use vect_get_num_vectors.
4313 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4314 to an unsigned int *.
4315 (vect_analyze_data_refs): Change min_vf from an int * to a
4317 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4318 than an unsigned HOST_WIDE_INT.
4319 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4320 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4321 to an unsigned int *.
4322 (vect_analyze_data_ref_dependences): Likewise.
4323 (vect_compute_data_ref_alignment): Handle polynomial vf.
4324 (vect_enhance_data_refs_alignment): Likewise.
4325 (vect_prune_runtime_alias_test_list): Likewise.
4326 (vect_shift_permute_load_chain): Likewise.
4327 (vect_supportable_dr_alignment): Likewise.
4328 (dependence_distance_ge_vf): Take the vectorization factor as a
4329 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4330 (vect_analyze_data_refs): Change min_vf from an int * to a
4332 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4333 vfm1 as a poly_uint64 rather than an int. Make the same change
4334 for the returned bound_scalar.
4335 (vect_gen_vector_loop_niters): Handle polynomial vf.
4336 (vect_do_peeling): Likewise. Update call to
4337 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4338 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4340 * tree-vect-loop.c (vect_determine_vectorization_factor)
4341 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4342 (vect_get_known_peeling_cost): Likewise.
4343 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4344 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4345 (vect_transform_loop): Likewise. Use the lowest possible VF when
4346 updating the upper bounds of the loop.
4347 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4349 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4350 polynomial unroll factors.
4351 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4352 (vect_make_slp_decision): Likewise.
4353 (vect_supported_load_permutation_p): Likewise, and polynomial
4355 (vect_analyze_slp_cost): Handle polynomial vf.
4356 (vect_slp_analyze_node_operations): Likewise.
4357 (vect_slp_analyze_bb_1): Likewise.
4358 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4359 than an unsigned HOST_WIDE_INT.
4360 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4361 (vectorizable_load): Handle polynomial vf.
4362 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4364 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4366 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4367 Alan Hayward <alan.hayward@arm.com>
4368 David Sherwood <david.sherwood@arm.com>
4370 * match.pd: Handle bit operations involving three constants
4371 and try to fold one pair.
4373 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4375 * tree-vect-loop-manip.c: Include gimple-fold.h.
4376 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4377 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4378 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4379 Add a path that uses a step of VF instead of 1, but disable it
4381 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4382 and niters_no_overflow parameters. Update calls to
4383 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4384 Create a new SSA name if the latter choses to use a ste other
4385 than zero, and return it via niters_vector_mult_vf_var.
4386 * tree-vect-loop.c (vect_transform_loop): Update calls to
4387 vect_do_peeling, vect_gen_vector_loop_niters and
4388 slpeel_make_loop_iterate_ntimes.
4389 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4390 (vect_gen_vector_loop_niters): Update declarations after above changes.
4392 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4394 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4395 128-bit round to integer instructions.
4396 (ceil<mode>2): Likewise.
4397 (btrunc<mode>2): Likewise.
4398 (round<mode>2): Likewise.
4400 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4402 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4403 unaligned VSX load/store on P8/P9.
4404 (expand_block_clear): Allow the use of unaligned VSX
4405 load/store on P8/P9.
4407 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4409 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4411 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4412 swap associated with both a load and a store.
4414 2018-01-02 Andrew Waterman <andrew@sifive.com>
4416 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4417 * config/riscv/riscv.md (clear_cache): Use it.
4419 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4421 * web.c: Remove out-of-date comment.
4423 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4425 * expr.c (fixup_args_size_notes): Check that any existing
4426 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4427 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4428 (emit_single_push_insn): ...here.
4430 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4432 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4433 (const_vector_encoded_nelts): New function.
4434 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4435 (const_vector_int_elt, const_vector_elt): Declare.
4436 * emit-rtl.c (const_vector_int_elt_1): New function.
4437 (const_vector_elt): Likewise.
4438 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4439 of CONST_VECTOR_ELT.
4441 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4443 * expr.c: Include rtx-vector-builder.h.
4444 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4445 directly on the tree encoding.
4446 (const_vector_from_tree): Likewise.
4447 * optabs.c: Include rtx-vector-builder.h.
4448 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4449 sequence of "u" values.
4450 * vec-perm-indices.c: Include rtx-vector-builder.h.
4451 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4452 directly on the vec_perm_indices encoding.
4454 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4456 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4457 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4458 * rtx-vector-builder.h: New file.
4459 * rtx-vector-builder.c: Likewise.
4460 * rtl.h (rtx_def::u2): Add a const_vector field.
4461 (CONST_VECTOR_NPATTERNS): New macro.
4462 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4463 (CONST_VECTOR_DUPLICATE_P): Likewise.
4464 (CONST_VECTOR_STEPPED_P): Likewise.
4465 (CONST_VECTOR_ENCODED_ELT): Likewise.
4466 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4467 (unwrap_const_vec_duplicate): Likewise.
4468 (const_vec_series_p): Check for a non-duplicated vector encoding.
4469 Say that the function only returns true for integer vectors.
4470 * emit-rtl.c: Include rtx-vector-builder.h.
4471 (gen_const_vec_duplicate_1): Delete.
4472 (gen_const_vector): Call gen_const_vec_duplicate instead of
4473 gen_const_vec_duplicate_1.
4474 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4475 (gen_const_vec_duplicate): Use rtx_vector_builder.
4476 (gen_const_vec_series): Likewise.
4477 (gen_rtx_CONST_VECTOR): Likewise.
4478 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4479 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4480 Build a new vector rather than modifying a CONST_VECTOR in-place.
4481 (handle_special_swappables): Update call accordingly.
4482 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4483 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4484 Build a new vector rather than modifying a CONST_VECTOR in-place.
4485 (handle_special_swappables): Update call accordingly.
4487 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4489 * simplify-rtx.c (simplify_const_binary_operation): Use
4490 CONST_VECTOR_ELT instead of XVECEXP.
4492 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4494 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4495 the selector elements to be different from the data elements
4496 if the selector is a VECTOR_CST.
4497 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4498 ssizetype for the selector.
4500 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4502 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4503 before testing each element individually.
4504 * tree-vect-generic.c (lower_vec_perm): Likewise.
4506 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4508 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4509 * selftest-run-tests.c (selftest::run_tests): Call it.
4510 * vector-builder.h (vector_builder::operator ==): New function.
4511 (vector_builder::operator !=): Likewise.
4512 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4513 (vec_perm_indices::all_from_input_p): New function.
4514 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4515 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4516 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4517 instead of reading the VECTOR_CST directly. Detect whether both
4518 vector inputs are the same before constructing the vec_perm_indices,
4519 and update the number of inputs argument accordingly. Use the
4520 utility functions added above. Only construct sel2 if we need to.
4522 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4524 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4525 the broadcast of the low byte.
4526 (expand_mult_highpart): Use an explicit encoding for the permutes.
4527 * optabs-query.c (can_mult_highpart_p): Likewise.
4528 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4529 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4530 (vectorizable_bswap): Likewise.
4531 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4532 explicit encoding for the power-of-2 permutes.
4533 (vect_permute_store_chain): Likewise.
4534 (vect_grouped_load_supported): Likewise.
4535 (vect_permute_load_chain): Likewise.
4537 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4539 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4540 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4541 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4542 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4543 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4544 (vect_gen_perm_mask_any): Likewise.
4546 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4548 * int-vector-builder.h: New file.
4549 * vec-perm-indices.h: Include int-vector-builder.h.
4550 (vec_perm_indices): Redefine as an int_vector_builder.
4551 (auto_vec_perm_indices): Delete.
4552 (vec_perm_builder): Redefine as a stand-alone class.
4553 (vec_perm_indices::vec_perm_indices): New function.
4554 (vec_perm_indices::clamp): Likewise.
4555 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4556 (vec_perm_indices::new_vector): New function.
4557 (vec_perm_indices::new_expanded_vector): Update for new
4558 vec_perm_indices class.
4559 (vec_perm_indices::rotate_inputs): New function.
4560 (vec_perm_indices::all_in_range_p): Operate directly on the
4561 encoded form, without computing elided elements.
4562 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4563 encoding. Update for new vec_perm_indices class.
4564 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4565 the given vec_perm_builder.
4566 (expand_vec_perm_var): Update vec_perm_builder constructor.
4567 (expand_mult_highpart): Use vec_perm_builder instead of
4568 auto_vec_perm_indices.
4569 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4570 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4571 or double series encoding as appropriate.
4572 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4573 vec_perm_indices instead of auto_vec_perm_indices.
4574 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4575 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4576 (vect_permute_store_chain): Likewise.
4577 (vect_grouped_load_supported): Likewise.
4578 (vect_permute_load_chain): Likewise.
4579 (vect_shift_permute_load_chain): Likewise.
4580 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4581 (vect_transform_slp_perm_load): Likewise.
4582 (vect_schedule_slp_instance): Likewise.
4583 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4584 (vectorizable_mask_load_store): Likewise.
4585 (vectorizable_bswap): Likewise.
4586 (vectorizable_store): Likewise.
4587 (vectorizable_load): Likewise.
4588 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4589 vec_perm_indices instead of auto_vec_perm_indices. Use
4590 tree_to_vec_perm_builder to read the vector from a tree.
4591 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4592 vec_perm_builder instead of a vec_perm_indices.
4593 (have_whole_vector_shift): Use vec_perm_builder and
4594 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4595 truncation to calc_vec_perm_mask_for_shift.
4596 (vect_create_epilog_for_reduction): Likewise.
4597 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4598 from auto_vec_perm_indices to vec_perm_indices.
4599 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4600 instead of changing individual elements.
4601 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4602 the vector in d.perm.
4603 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4604 from auto_vec_perm_indices to vec_perm_indices.
4605 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4606 instead of changing individual elements.
4607 (arm_vectorize_vec_perm_const): Use new_vector to install
4608 the vector in d.perm.
4609 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4610 Update vec_perm_builder constructor.
4611 (rs6000_expand_interleave): Likewise.
4612 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4613 (rs6000_expand_interleave): Likewise.
4615 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4617 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4618 to qimode could truncate the indices.
4619 * optabs.c (expand_vec_perm_var): Likewise.
4621 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4623 * Makefile.in (OBJS): Add vec-perm-indices.o.
4624 * vec-perm-indices.h: New file.
4625 * vec-perm-indices.c: Likewise.
4626 * target.h (vec_perm_indices): Replace with a forward class
4628 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4629 * optabs.h: Include vec-perm-indices.h.
4630 (expand_vec_perm): Delete.
4631 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4632 (expand_vec_perm_const): Declare.
4633 * target.def (vec_perm_const_ok): Replace with...
4634 (vec_perm_const): ...this new hook.
4635 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4636 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4637 * doc/tm.texi: Regenerate.
4638 * optabs.def (vec_perm_const): Delete.
4639 * doc/md.texi (vec_perm_const): Likewise.
4640 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4641 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4642 expand_vec_perm for constant permutation vectors. Assert that
4643 the mode of variable permutation vectors is the integer equivalent
4644 of the mode that is being permuted.
4645 * optabs-query.h (selector_fits_mode_p): Declare.
4646 * optabs-query.c: Include vec-perm-indices.h.
4647 (selector_fits_mode_p): New function.
4648 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4649 is defined, instead of checking whether the vec_perm_const_optab
4650 exists. Use targetm.vectorize.vec_perm_const instead of
4651 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4652 fit in the vector mode before using a variable permute.
4653 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4654 vec_perm_indices instead of an rtx.
4655 (expand_vec_perm): Replace with...
4656 (expand_vec_perm_const): ...this new function. Take the selector
4657 as a vec_perm_indices rather than an rtx. Also take the mode of
4658 the selector. Update call to shift_amt_for_vec_perm_mask.
4659 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4660 Use vec_perm_indices::new_expanded_vector to expand the original
4661 selector into bytes. Check whether the indices fit in the vector
4662 mode before using a variable permute.
4663 (expand_vec_perm_var): Make global.
4664 (expand_mult_highpart): Use expand_vec_perm_const.
4665 * fold-const.c: Includes vec-perm-indices.h.
4666 * tree-ssa-forwprop.c: Likewise.
4667 * tree-vect-data-refs.c: Likewise.
4668 * tree-vect-generic.c: Likewise.
4669 * tree-vect-loop.c: Likewise.
4670 * tree-vect-slp.c: Likewise.
4671 * tree-vect-stmts.c: Likewise.
4672 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4674 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4675 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4676 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4677 (aarch64_vectorize_vec_perm_const): ...this new function.
4678 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4679 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4680 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4681 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4682 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4683 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4684 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4686 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4687 check for NEON modes.
4688 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4689 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4690 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4691 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4693 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4694 the old VEC_PERM_CONST conditions.
4695 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4696 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4697 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4698 (ia64_vectorize_vec_perm_const_ok): Merge into...
4699 (ia64_vectorize_vec_perm_const): ...this new function.
4700 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4701 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4702 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4703 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4704 * config/mips/mips.c (mips_expand_vec_perm_const)
4705 (mips_vectorize_vec_perm_const_ok): Merge into...
4706 (mips_vectorize_vec_perm_const): ...this new function.
4707 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4708 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4709 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4710 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4711 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4712 (rs6000_expand_vec_perm_const): Delete.
4713 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4715 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4716 (altivec_expand_vec_perm_const_le): Take each operand individually.
4717 Operate on constant selectors rather than rtxes.
4718 (altivec_expand_vec_perm_const): Likewise. Update call to
4719 altivec_expand_vec_perm_const_le.
4720 (rs6000_expand_vec_perm_const): Delete.
4721 (rs6000_vectorize_vec_perm_const_ok): Delete.
4722 (rs6000_vectorize_vec_perm_const): New function.
4723 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4724 an element count and rtx array.
4725 (rs6000_expand_extract_even): Update call accordingly.
4726 (rs6000_expand_interleave): Likewise.
4727 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4728 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4729 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4730 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4731 (rs6000_expand_vec_perm_const): Delete.
4732 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4733 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4734 (altivec_expand_vec_perm_const_le): Take each operand individually.
4735 Operate on constant selectors rather than rtxes.
4736 (altivec_expand_vec_perm_const): Likewise. Update call to
4737 altivec_expand_vec_perm_const_le.
4738 (rs6000_expand_vec_perm_const): Delete.
4739 (rs6000_vectorize_vec_perm_const_ok): Delete.
4740 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4741 reference to the SPE evmerge intructions.
4742 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4743 an element count and rtx array.
4744 (rs6000_expand_extract_even): Update call accordingly.
4745 (rs6000_expand_interleave): Likewise.
4746 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4747 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4749 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4751 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4753 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4754 vector mode and that that mode matches the mode of the data
4756 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4757 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4758 directly using expand_vec_perm_1 when forcing selectors into
4760 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4762 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4764 * optabs-query.h (can_vec_perm_p): Delete.
4765 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4766 * optabs-query.c (can_vec_perm_p): Split into...
4767 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4768 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4769 particular selector is valid.
4770 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4771 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4772 (vect_grouped_load_supported): Likewise.
4773 (vect_shift_permute_load_chain): Likewise.
4774 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4775 (vect_transform_slp_perm_load): Likewise.
4776 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4777 (vectorizable_bswap): Likewise.
4778 (vect_gen_perm_mask_checked): Likewise.
4779 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4780 implementations of variable permutation vectors into account
4781 when deciding which selector to use.
4782 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4783 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4784 with a false third argument.
4785 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4786 to test whether the constant selector is valid and can_vec_perm_var_p
4787 to test whether a variable selector is valid.
4789 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4791 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4792 * optabs-query.c (can_vec_perm_p): Likewise.
4793 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4794 instead of vec_perm_indices.
4795 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4796 (vect_gen_perm_mask_checked): Likewise,
4797 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4798 (vect_gen_perm_mask_checked): Likewise,
4800 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4802 * optabs-query.h (qimode_for_vec_perm): Declare.
4803 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4804 (qimode_for_vec_perm): ...this new function.
4805 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4807 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4809 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4810 does not have a conditional at the top.
4812 2018-01-02 Richard Biener <rguenther@suse.de>
4814 * ipa-inline.c (big_speedup_p): Fix expression.
4816 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4819 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4822 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4826 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4827 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4828 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4829 cond_taken_branch_cost 3->4.
4831 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4833 PR tree-optimization/83581
4834 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4835 TODO_cleanup_cfg if any changes have been made.
4838 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4839 convert_modes if target mode has the right side, but different mode
4843 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4844 last argument when extracting from CONCAT. If either from_real or
4845 from_imag is NULL, use expansion through memory. If result is not
4846 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4847 the parts directly to inner mode, if even that fails, use expansion
4851 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4852 check for bswap in mode rather than HImode and use that in expand_unop
4855 Copyright (C) 2018 Free Software Foundation, Inc.
4857 Copying and distribution of this file, with or without modification,
4858 are permitted in any medium without royalty provided the copyright
4859 notice and this notice are preserved.