* decl.c (cplus_expand_expr_stmt): Don't call break_out_cleanups
[official-gcc.git] / gcc / cse.c
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "flags.h"
32 #include "real.h"
33 #include "insn-config.h"
34 #include "recog.h"
35 #include "function.h"
36 #include "expr.h"
37 #include "toplev.h"
38 #include "output.h"
39 #include "hashtab.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and several vectors together
59 with "quantity numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
85 variables should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. `qty_first_reg', `qty_last_reg',
89 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with `qty_mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate element of qty_const. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate element
116 of qty_const.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and `qty_first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of vectors indexed by quantity number.
209 We know in advance we will not need a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Indexed by quantity number, gives the first (or last) register
219 in the chain of registers that currently contain this quantity. */
221 static int *qty_first_reg;
222 static int *qty_last_reg;
224 /* Index by quantity number, gives the mode of the quantity. */
226 static enum machine_mode *qty_mode;
228 /* Indexed by quantity number, gives the rtx of the constant value of the
229 quantity, or zero if it does not have a known value.
230 A sum of the frame pointer (or arg pointer) plus a constant
231 can also be entered here. */
233 static rtx *qty_const;
235 /* Indexed by qty number, gives the insn that stored the constant value
236 recorded in `qty_const'. */
238 static rtx *qty_const_insn;
240 /* The next three variables are used to track when a comparison between a
241 quantity and some constant or register has been passed. In that case, we
242 know the results of the comparison in case we see it again. These variables
243 record a comparison that is known to be true. */
245 /* Indexed by qty number, gives the rtx code of a comparison with a known
246 result involving this quantity. If none, it is UNKNOWN. */
247 static enum rtx_code *qty_comparison_code;
249 /* Indexed by qty number, gives the constant being compared against in a
250 comparison of known result. If no such comparison, it is undefined.
251 If the comparison is not with a constant, it is zero. */
253 static rtx *qty_comparison_const;
255 /* Indexed by qty number, gives the quantity being compared against in a
256 comparison of known result. If no such comparison, if it undefined.
257 If the comparison is not with a register, it is -1. */
259 static int *qty_comparison_qty;
261 #ifdef HAVE_cc0
262 /* For machines that have a CC0, we do not record its value in the hash
263 table since its use is guaranteed to be the insn immediately following
264 its definition and any other insn is presumed to invalidate it.
266 Instead, we store below the value last assigned to CC0. If it should
267 happen to be a constant, it is stored in preference to the actual
268 assigned value. In case it is a constant, we store the mode in which
269 the constant should be interpreted. */
271 static rtx prev_insn_cc0;
272 static enum machine_mode prev_insn_cc0_mode;
273 #endif
275 /* Previous actual insn. 0 if at first insn of basic block. */
277 static rtx prev_insn;
279 /* Insn being scanned. */
281 static rtx this_insn;
283 /* Index by register number, gives the number of the next (or
284 previous) register in the chain of registers sharing the same
285 value.
287 Or -1 if this register is at the end of the chain.
289 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
291 static int *reg_next_eqv;
292 static int *reg_prev_eqv;
294 struct cse_reg_info
296 /* The number of times the register has been altered in the current
297 basic block. */
298 int reg_tick;
300 /* The next cse_reg_info structure in the free or used list. */
301 struct cse_reg_info *next;
303 /* The REG_TICK value at which rtx's containing this register are
304 valid in the hash table. If this does not equal the current
305 reg_tick value, such expressions existing in the hash table are
306 invalid. */
307 int reg_in_table;
309 /* The quantity number of the register's current contents. */
310 int reg_qty;
312 /* Search key */
313 int regno;
316 /* A free list of cse_reg_info entries. */
317 static struct cse_reg_info *cse_reg_info_free_list;
319 /* A used list of cse_reg_info entries. */
320 static struct cse_reg_info *cse_reg_info_used_list;
321 static struct cse_reg_info *cse_reg_info_used_list_end;
323 /* A mapping from registers to cse_reg_info data structures. */
324 static hash_table_t cse_reg_info_tree;
326 /* The last lookup we did into the cse_reg_info_tree. This allows us
327 to cache repeated lookups. */
328 static int cached_regno;
329 static struct cse_reg_info *cached_cse_reg_info;
331 /* A HARD_REG_SET containing all the hard registers for which there is
332 currently a REG expression in the hash table. Note the difference
333 from the above variables, which indicate if the REG is mentioned in some
334 expression in the table. */
336 static HARD_REG_SET hard_regs_in_table;
338 /* A HARD_REG_SET containing all the hard registers that are invalidated
339 by a CALL_INSN. */
341 static HARD_REG_SET regs_invalidated_by_call;
343 /* CUID of insn that starts the basic block currently being cse-processed. */
345 static int cse_basic_block_start;
347 /* CUID of insn that ends the basic block currently being cse-processed. */
349 static int cse_basic_block_end;
351 /* Vector mapping INSN_UIDs to cuids.
352 The cuids are like uids but increase monotonically always.
353 We use them to see whether a reg is used outside a given basic block. */
355 static int *uid_cuid;
357 /* Highest UID in UID_CUID. */
358 static int max_uid;
360 /* Get the cuid of an insn. */
362 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
364 /* Nonzero if cse has altered conditional jump insns
365 in such a way that jump optimization should be redone. */
367 static int cse_jumps_altered;
369 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
370 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
371 to put in the note. */
372 static int recorded_label_ref;
374 /* canon_hash stores 1 in do_not_record
375 if it notices a reference to CC0, PC, or some other volatile
376 subexpression. */
378 static int do_not_record;
380 #ifdef LOAD_EXTEND_OP
382 /* Scratch rtl used when looking for load-extended copy of a MEM. */
383 static rtx memory_extend_rtx;
384 #endif
386 /* canon_hash stores 1 in hash_arg_in_memory
387 if it notices a reference to memory within the expression being hashed. */
389 static int hash_arg_in_memory;
391 /* The hash table contains buckets which are chains of `struct table_elt's,
392 each recording one expression's information.
393 That expression is in the `exp' field.
395 Those elements with the same hash code are chained in both directions
396 through the `next_same_hash' and `prev_same_hash' fields.
398 Each set of expressions with equivalent values
399 are on a two-way chain through the `next_same_value'
400 and `prev_same_value' fields, and all point with
401 the `first_same_value' field at the first element in
402 that chain. The chain is in order of increasing cost.
403 Each element's cost value is in its `cost' field.
405 The `in_memory' field is nonzero for elements that
406 involve any reference to memory. These elements are removed
407 whenever a write is done to an unidentified location in memory.
408 To be safe, we assume that a memory address is unidentified unless
409 the address is either a symbol constant or a constant plus
410 the frame pointer or argument pointer.
412 The `related_value' field is used to connect related expressions
413 (that differ by adding an integer).
414 The related expressions are chained in a circular fashion.
415 `related_value' is zero for expressions for which this
416 chain is not useful.
418 The `cost' field stores the cost of this element's expression.
420 The `is_const' flag is set if the element is a constant (including
421 a fixed address).
423 The `flag' field is used as a temporary during some search routines.
425 The `mode' field is usually the same as GET_MODE (`exp'), but
426 if `exp' is a CONST_INT and has no machine mode then the `mode'
427 field is the mode it was being used as. Each constant is
428 recorded separately for each mode it is used with. */
431 struct table_elt
433 rtx exp;
434 struct table_elt *next_same_hash;
435 struct table_elt *prev_same_hash;
436 struct table_elt *next_same_value;
437 struct table_elt *prev_same_value;
438 struct table_elt *first_same_value;
439 struct table_elt *related_value;
440 int cost;
441 enum machine_mode mode;
442 char in_memory;
443 char is_const;
444 char flag;
447 /* We don't want a lot of buckets, because we rarely have very many
448 things stored in the hash table, and a lot of buckets slows
449 down a lot of loops that happen frequently. */
450 #define NBUCKETS 31
452 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
453 register (hard registers may require `do_not_record' to be set). */
455 #define HASH(X, M) \
456 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
457 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
458 : canon_hash (X, M) % NBUCKETS)
460 /* Determine whether register number N is considered a fixed register for CSE.
461 It is desirable to replace other regs with fixed regs, to reduce need for
462 non-fixed hard regs.
463 A reg wins if it is either the frame pointer or designated as fixed,
464 but not if it is an overlapping register. */
465 #ifdef OVERLAPPING_REGNO_P
466 #define FIXED_REGNO_P(N) \
467 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
468 || fixed_regs[N] || global_regs[N]) \
469 && ! OVERLAPPING_REGNO_P ((N)))
470 #else
471 #define FIXED_REGNO_P(N) \
472 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
473 || fixed_regs[N] || global_regs[N])
474 #endif
476 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
477 hard registers and pointers into the frame are the cheapest with a cost
478 of 0. Next come pseudos with a cost of one and other hard registers with
479 a cost of 2. Aside from these special cases, call `rtx_cost'. */
481 #define CHEAP_REGNO(N) \
482 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
483 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
484 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
485 || ((N) < FIRST_PSEUDO_REGISTER \
486 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
488 /* A register is cheap if it is a user variable assigned to the register
489 or if its register number always corresponds to a cheap register. */
491 #define CHEAP_REG(N) \
492 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
493 || CHEAP_REGNO (REGNO (N)))
495 #define COST(X) \
496 (GET_CODE (X) == REG \
497 ? (CHEAP_REG (X) ? 0 \
498 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
499 : 2) \
500 : notreg_cost(X))
502 /* Get the info associated with register N. */
504 #define GET_CSE_REG_INFO(N) \
505 (((N) == cached_regno && cached_cse_reg_info) \
506 ? cached_cse_reg_info : get_cse_reg_info ((N)))
508 /* Get the number of times this register has been updated in this
509 basic block. */
511 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
513 /* Get the point at which REG was recorded in the table. */
515 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
517 /* Get the quantity number for REG. */
519 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
521 /* Determine if the quantity number for register X represents a valid index
522 into the `qty_...' variables. */
524 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
526 #ifdef ADDRESS_COST
527 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
528 during CSE, such nodes are present. Using an ADDRESSOF node which
529 refers to the address of a REG is a good thing because we can then
530 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
531 #define CSE_ADDRESS_COST(RTX) \
532 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
533 ? -1 : ADDRESS_COST(RTX))
534 #endif
536 static struct table_elt *table[NBUCKETS];
538 /* Chain of `struct table_elt's made so far for this function
539 but currently removed from the table. */
541 static struct table_elt *free_element_chain;
543 /* Number of `struct table_elt' structures made so far for this function. */
545 static int n_elements_made;
547 /* Maximum value `n_elements_made' has had so far in this compilation
548 for functions previously processed. */
550 static int max_elements_made;
552 /* Surviving equivalence class when two equivalence classes are merged
553 by recording the effects of a jump in the last insn. Zero if the
554 last insn was not a conditional jump. */
556 static struct table_elt *last_jump_equiv_class;
558 /* Set to the cost of a constant pool reference if one was found for a
559 symbolic constant. If this was found, it means we should try to
560 convert constants into constant pool entries if they don't fit in
561 the insn. */
563 static int constant_pool_entries_cost;
565 /* Define maximum length of a branch path. */
567 #define PATHLENGTH 10
569 /* This data describes a block that will be processed by cse_basic_block. */
571 struct cse_basic_block_data
573 /* Lowest CUID value of insns in block. */
574 int low_cuid;
575 /* Highest CUID value of insns in block. */
576 int high_cuid;
577 /* Total number of SETs in block. */
578 int nsets;
579 /* Last insn in the block. */
580 rtx last;
581 /* Size of current branch path, if any. */
582 int path_size;
583 /* Current branch path, indicating which branches will be taken. */
584 struct branch_path
586 /* The branch insn. */
587 rtx branch;
588 /* Whether it should be taken or not. AROUND is the same as taken
589 except that it is used when the destination label is not preceded
590 by a BARRIER. */
591 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
592 } path[PATHLENGTH];
595 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
596 virtual regs here because the simplify_*_operation routines are called
597 by integrate.c, which is called before virtual register instantiation.
599 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
600 a header file so that their definitions can be shared with the
601 simplification routines in simplify-rtx.c. Until then, do not
602 change these macros without also changing the copy in simplify-rtx.c. */
604 #define FIXED_BASE_PLUS_P(X) \
605 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
606 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
607 || (X) == virtual_stack_vars_rtx \
608 || (X) == virtual_incoming_args_rtx \
609 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
610 && (XEXP (X, 0) == frame_pointer_rtx \
611 || XEXP (X, 0) == hard_frame_pointer_rtx \
612 || ((X) == arg_pointer_rtx \
613 && fixed_regs[ARG_POINTER_REGNUM]) \
614 || XEXP (X, 0) == virtual_stack_vars_rtx \
615 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
616 || GET_CODE (X) == ADDRESSOF)
618 /* Similar, but also allows reference to the stack pointer.
620 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
621 arg_pointer_rtx by itself is nonzero, because on at least one machine,
622 the i960, the arg pointer is zero when it is unused. */
624 #define NONZERO_BASE_PLUS_P(X) \
625 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
626 || (X) == virtual_stack_vars_rtx \
627 || (X) == virtual_incoming_args_rtx \
628 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
629 && (XEXP (X, 0) == frame_pointer_rtx \
630 || XEXP (X, 0) == hard_frame_pointer_rtx \
631 || ((X) == arg_pointer_rtx \
632 && fixed_regs[ARG_POINTER_REGNUM]) \
633 || XEXP (X, 0) == virtual_stack_vars_rtx \
634 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
635 || (X) == stack_pointer_rtx \
636 || (X) == virtual_stack_dynamic_rtx \
637 || (X) == virtual_outgoing_args_rtx \
638 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
639 && (XEXP (X, 0) == stack_pointer_rtx \
640 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
641 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
642 || GET_CODE (X) == ADDRESSOF)
644 static int notreg_cost PROTO((rtx));
645 static void new_basic_block PROTO((void));
646 static void make_new_qty PROTO((int));
647 static void make_regs_eqv PROTO((int, int));
648 static void delete_reg_equiv PROTO((int));
649 static int mention_regs PROTO((rtx));
650 static int insert_regs PROTO((rtx, struct table_elt *, int));
651 static void free_element PROTO((struct table_elt *));
652 static void remove_from_table PROTO((struct table_elt *, unsigned));
653 static struct table_elt *get_element PROTO((void));
654 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
655 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
656 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
657 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
658 enum machine_mode));
659 static void merge_equiv_classes PROTO((struct table_elt *,
660 struct table_elt *));
661 static void invalidate PROTO((rtx, enum machine_mode));
662 static int cse_rtx_varies_p PROTO((rtx));
663 static void remove_invalid_refs PROTO((int));
664 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
665 static void rehash_using_reg PROTO((rtx));
666 static void invalidate_memory PROTO((void));
667 static void invalidate_for_call PROTO((void));
668 static rtx use_related_value PROTO((rtx, struct table_elt *));
669 static unsigned canon_hash PROTO((rtx, enum machine_mode));
670 static unsigned safe_hash PROTO((rtx, enum machine_mode));
671 static int exp_equiv_p PROTO((rtx, rtx, int, int));
672 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
673 HOST_WIDE_INT *,
674 HOST_WIDE_INT *));
675 static int refers_to_p PROTO((rtx, rtx));
676 static rtx canon_reg PROTO((rtx, rtx));
677 static void find_best_addr PROTO((rtx, rtx *));
678 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
679 enum machine_mode *,
680 enum machine_mode *));
681 static rtx fold_rtx PROTO((rtx, rtx));
682 static rtx equiv_constant PROTO((rtx));
683 static void record_jump_equiv PROTO((rtx, int));
684 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
685 rtx, rtx, int));
686 static void cse_insn PROTO((rtx, rtx));
687 #ifdef AUTO_INC_DEC
688 static int addr_affects_sp_p PROTO((rtx));
689 #endif
690 static void invalidate_from_clobbers PROTO((rtx));
691 static rtx cse_process_notes PROTO((rtx, rtx));
692 static void cse_around_loop PROTO((rtx));
693 static void invalidate_skipped_set PROTO((rtx, rtx, void *));
694 static void invalidate_skipped_block PROTO((rtx));
695 static void cse_check_loop_start PROTO((rtx, rtx, void *));
696 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
697 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
698 static void count_reg_usage PROTO((rtx, int *, rtx, int));
699 extern void dump_class PROTO((struct table_elt*));
700 static struct cse_reg_info* get_cse_reg_info PROTO((int));
701 static unsigned int hash_cse_reg_info PROTO((hash_table_entry_t));
702 static int cse_reg_info_equal_p PROTO((hash_table_entry_t,
703 hash_table_entry_t));
705 static void flush_hash_table PROTO((void));
707 /* Dump the expressions in the equivalence class indicated by CLASSP.
708 This function is used only for debugging. */
709 void
710 dump_class (classp)
711 struct table_elt *classp;
713 struct table_elt *elt;
715 fprintf (stderr, "Equivalence chain for ");
716 print_rtl (stderr, classp->exp);
717 fprintf (stderr, ": \n");
719 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
721 print_rtl (stderr, elt->exp);
722 fprintf (stderr, "\n");
726 /* Return an estimate of the cost of computing rtx X.
727 One use is in cse, to decide which expression to keep in the hash table.
728 Another is in rtl generation, to pick the cheapest way to multiply.
729 Other uses like the latter are expected in the future. */
731 /* Internal function, to compute cost when X is not a register; called
732 from COST macro to keep it simple. */
734 static int
735 notreg_cost (x)
736 rtx x;
738 return ((GET_CODE (x) == SUBREG
739 && GET_CODE (SUBREG_REG (x)) == REG
740 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
741 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
742 && (GET_MODE_SIZE (GET_MODE (x))
743 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
744 && subreg_lowpart_p (x)
745 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
746 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
747 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
748 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
749 : 2))
750 : rtx_cost (x, SET) * 2);
753 /* Return the right cost to give to an operation
754 to make the cost of the corresponding register-to-register instruction
755 N times that of a fast register-to-register instruction. */
757 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
760 rtx_cost (x, outer_code)
761 rtx x;
762 enum rtx_code outer_code ATTRIBUTE_UNUSED;
764 register int i, j;
765 register enum rtx_code code;
766 register const char *fmt;
767 register int total;
769 if (x == 0)
770 return 0;
772 /* Compute the default costs of certain things.
773 Note that RTX_COSTS can override the defaults. */
775 code = GET_CODE (x);
776 switch (code)
778 case MULT:
779 /* Count multiplication by 2**n as a shift,
780 because if we are considering it, we would output it as a shift. */
781 if (GET_CODE (XEXP (x, 1)) == CONST_INT
782 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
783 total = 2;
784 else
785 total = COSTS_N_INSNS (5);
786 break;
787 case DIV:
788 case UDIV:
789 case MOD:
790 case UMOD:
791 total = COSTS_N_INSNS (7);
792 break;
793 case USE:
794 /* Used in loop.c and combine.c as a marker. */
795 total = 0;
796 break;
797 case ASM_OPERANDS:
798 /* We don't want these to be used in substitutions because
799 we have no way of validating the resulting insn. So assign
800 anything containing an ASM_OPERANDS a very high cost. */
801 total = 1000;
802 break;
803 default:
804 total = 2;
807 switch (code)
809 case REG:
810 return ! CHEAP_REG (x);
812 case SUBREG:
813 /* If we can't tie these modes, make this expensive. The larger
814 the mode, the more expensive it is. */
815 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
816 return COSTS_N_INSNS (2
817 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
818 return 2;
819 #ifdef RTX_COSTS
820 RTX_COSTS (x, code, outer_code);
821 #endif
822 #ifdef CONST_COSTS
823 CONST_COSTS (x, code, outer_code);
824 #endif
826 default:
827 #ifdef DEFAULT_RTX_COSTS
828 DEFAULT_RTX_COSTS(x, code, outer_code);
829 #endif
830 break;
833 /* Sum the costs of the sub-rtx's, plus cost of this operation,
834 which is already in total. */
836 fmt = GET_RTX_FORMAT (code);
837 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
838 if (fmt[i] == 'e')
839 total += rtx_cost (XEXP (x, i), code);
840 else if (fmt[i] == 'E')
841 for (j = 0; j < XVECLEN (x, i); j++)
842 total += rtx_cost (XVECEXP (x, i, j), code);
844 return total;
847 static struct cse_reg_info *
848 get_cse_reg_info (regno)
849 int regno;
851 struct cse_reg_info *cri;
852 struct cse_reg_info **entry;
853 struct cse_reg_info temp;
855 /* See if we already have this entry. */
856 temp.regno = regno;
857 entry = (struct cse_reg_info **) find_hash_table_entry (cse_reg_info_tree,
858 &temp, TRUE);
860 if (*entry)
861 cri = *entry;
862 else
864 /* Get a new cse_reg_info structure. */
865 if (cse_reg_info_free_list)
867 cri = cse_reg_info_free_list;
868 cse_reg_info_free_list = cri->next;
870 else
871 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
873 /* Initialize it. */
874 cri->reg_tick = 0;
875 cri->reg_in_table = -1;
876 cri->reg_qty = regno;
877 cri->regno = regno;
878 cri->next = cse_reg_info_used_list;
879 cse_reg_info_used_list = cri;
880 if (!cse_reg_info_used_list_end)
881 cse_reg_info_used_list_end = cri;
883 *entry = cri;
886 /* Cache this lookup; we tend to be looking up information about the
887 same register several times in a row. */
888 cached_regno = regno;
889 cached_cse_reg_info = cri;
891 return cri;
894 static unsigned int
895 hash_cse_reg_info (el_ptr)
896 hash_table_entry_t el_ptr;
898 return ((const struct cse_reg_info *) el_ptr)->regno;
901 static int
902 cse_reg_info_equal_p (el_ptr1, el_ptr2)
903 hash_table_entry_t el_ptr1;
904 hash_table_entry_t el_ptr2;
906 return (((const struct cse_reg_info *) el_ptr1)->regno
907 == ((const struct cse_reg_info *) el_ptr2)->regno);
910 /* Clear the hash table and initialize each register with its own quantity,
911 for a new basic block. */
913 static void
914 new_basic_block ()
916 register int i;
918 next_qty = max_reg;
920 if (cse_reg_info_tree)
922 delete_hash_table (cse_reg_info_tree);
923 if (cse_reg_info_used_list)
925 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
926 cse_reg_info_free_list = cse_reg_info_used_list;
927 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
929 cached_cse_reg_info = 0;
932 cse_reg_info_tree = create_hash_table (0, hash_cse_reg_info,
933 cse_reg_info_equal_p);
935 CLEAR_HARD_REG_SET (hard_regs_in_table);
937 /* The per-quantity values used to be initialized here, but it is
938 much faster to initialize each as it is made in `make_new_qty'. */
940 for (i = 0; i < NBUCKETS; i++)
942 register struct table_elt *this, *next;
943 for (this = table[i]; this; this = next)
945 next = this->next_same_hash;
946 free_element (this);
950 bzero ((char *) table, sizeof table);
952 prev_insn = 0;
954 #ifdef HAVE_cc0
955 prev_insn_cc0 = 0;
956 #endif
959 /* Say that register REG contains a quantity not in any register before
960 and initialize that quantity. */
962 static void
963 make_new_qty (reg)
964 register int reg;
966 register int q;
968 if (next_qty >= max_qty)
969 abort ();
971 q = REG_QTY (reg) = next_qty++;
972 qty_first_reg[q] = reg;
973 qty_last_reg[q] = reg;
974 qty_const[q] = qty_const_insn[q] = 0;
975 qty_comparison_code[q] = UNKNOWN;
977 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
980 /* Make reg NEW equivalent to reg OLD.
981 OLD is not changing; NEW is. */
983 static void
984 make_regs_eqv (new, old)
985 register int new, old;
987 register int lastr, firstr;
988 register int q = REG_QTY (old);
990 /* Nothing should become eqv until it has a "non-invalid" qty number. */
991 if (! REGNO_QTY_VALID_P (old))
992 abort ();
994 REG_QTY (new) = q;
995 firstr = qty_first_reg[q];
996 lastr = qty_last_reg[q];
998 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
999 hard regs. Among pseudos, if NEW will live longer than any other reg
1000 of the same qty, and that is beyond the current basic block,
1001 make it the new canonical replacement for this qty. */
1002 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1003 /* Certain fixed registers might be of the class NO_REGS. This means
1004 that not only can they not be allocated by the compiler, but
1005 they cannot be used in substitutions or canonicalizations
1006 either. */
1007 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1008 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1009 || (new >= FIRST_PSEUDO_REGISTER
1010 && (firstr < FIRST_PSEUDO_REGISTER
1011 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1012 || (uid_cuid[REGNO_FIRST_UID (new)]
1013 < cse_basic_block_start))
1014 && (uid_cuid[REGNO_LAST_UID (new)]
1015 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1017 reg_prev_eqv[firstr] = new;
1018 reg_next_eqv[new] = firstr;
1019 reg_prev_eqv[new] = -1;
1020 qty_first_reg[q] = new;
1022 else
1024 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1025 Otherwise, insert before any non-fixed hard regs that are at the
1026 end. Registers of class NO_REGS cannot be used as an
1027 equivalent for anything. */
1028 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1029 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1030 && new >= FIRST_PSEUDO_REGISTER)
1031 lastr = reg_prev_eqv[lastr];
1032 reg_next_eqv[new] = reg_next_eqv[lastr];
1033 if (reg_next_eqv[lastr] >= 0)
1034 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1035 else
1036 qty_last_reg[q] = new;
1037 reg_next_eqv[lastr] = new;
1038 reg_prev_eqv[new] = lastr;
1042 /* Remove REG from its equivalence class. */
1044 static void
1045 delete_reg_equiv (reg)
1046 register int reg;
1048 register int q = REG_QTY (reg);
1049 register int p, n;
1051 /* If invalid, do nothing. */
1052 if (q == reg)
1053 return;
1055 p = reg_prev_eqv[reg];
1056 n = reg_next_eqv[reg];
1058 if (n != -1)
1059 reg_prev_eqv[n] = p;
1060 else
1061 qty_last_reg[q] = p;
1062 if (p != -1)
1063 reg_next_eqv[p] = n;
1064 else
1065 qty_first_reg[q] = n;
1067 REG_QTY (reg) = reg;
1070 /* Remove any invalid expressions from the hash table
1071 that refer to any of the registers contained in expression X.
1073 Make sure that newly inserted references to those registers
1074 as subexpressions will be considered valid.
1076 mention_regs is not called when a register itself
1077 is being stored in the table.
1079 Return 1 if we have done something that may have changed the hash code
1080 of X. */
1082 static int
1083 mention_regs (x)
1084 rtx x;
1086 register enum rtx_code code;
1087 register int i, j;
1088 register const char *fmt;
1089 register int changed = 0;
1091 if (x == 0)
1092 return 0;
1094 code = GET_CODE (x);
1095 if (code == REG)
1097 register int regno = REGNO (x);
1098 register int endregno
1099 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1100 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1101 int i;
1103 for (i = regno; i < endregno; i++)
1105 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1106 remove_invalid_refs (i);
1108 REG_IN_TABLE (i) = REG_TICK (i);
1111 return 0;
1114 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1115 pseudo if they don't use overlapping words. We handle only pseudos
1116 here for simplicity. */
1117 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1118 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1120 int i = REGNO (SUBREG_REG (x));
1122 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1124 /* If reg_tick has been incremented more than once since
1125 reg_in_table was last set, that means that the entire
1126 register has been set before, so discard anything memorized
1127 for the entrire register, including all SUBREG expressions. */
1128 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1129 remove_invalid_refs (i);
1130 else
1131 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1134 REG_IN_TABLE (i) = REG_TICK (i);
1135 return 0;
1138 /* If X is a comparison or a COMPARE and either operand is a register
1139 that does not have a quantity, give it one. This is so that a later
1140 call to record_jump_equiv won't cause X to be assigned a different
1141 hash code and not found in the table after that call.
1143 It is not necessary to do this here, since rehash_using_reg can
1144 fix up the table later, but doing this here eliminates the need to
1145 call that expensive function in the most common case where the only
1146 use of the register is in the comparison. */
1148 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1150 if (GET_CODE (XEXP (x, 0)) == REG
1151 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1152 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1154 rehash_using_reg (XEXP (x, 0));
1155 changed = 1;
1158 if (GET_CODE (XEXP (x, 1)) == REG
1159 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1160 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1162 rehash_using_reg (XEXP (x, 1));
1163 changed = 1;
1167 fmt = GET_RTX_FORMAT (code);
1168 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1169 if (fmt[i] == 'e')
1170 changed |= mention_regs (XEXP (x, i));
1171 else if (fmt[i] == 'E')
1172 for (j = 0; j < XVECLEN (x, i); j++)
1173 changed |= mention_regs (XVECEXP (x, i, j));
1175 return changed;
1178 /* Update the register quantities for inserting X into the hash table
1179 with a value equivalent to CLASSP.
1180 (If the class does not contain a REG, it is irrelevant.)
1181 If MODIFIED is nonzero, X is a destination; it is being modified.
1182 Note that delete_reg_equiv should be called on a register
1183 before insert_regs is done on that register with MODIFIED != 0.
1185 Nonzero value means that elements of reg_qty have changed
1186 so X's hash code may be different. */
1188 static int
1189 insert_regs (x, classp, modified)
1190 rtx x;
1191 struct table_elt *classp;
1192 int modified;
1194 if (GET_CODE (x) == REG)
1196 register int regno = REGNO (x);
1198 /* If REGNO is in the equivalence table already but is of the
1199 wrong mode for that equivalence, don't do anything here. */
1201 if (REGNO_QTY_VALID_P (regno)
1202 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1203 return 0;
1205 if (modified || ! REGNO_QTY_VALID_P (regno))
1207 if (classp)
1208 for (classp = classp->first_same_value;
1209 classp != 0;
1210 classp = classp->next_same_value)
1211 if (GET_CODE (classp->exp) == REG
1212 && GET_MODE (classp->exp) == GET_MODE (x))
1214 make_regs_eqv (regno, REGNO (classp->exp));
1215 return 1;
1218 make_new_qty (regno);
1219 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1220 return 1;
1223 return 0;
1226 /* If X is a SUBREG, we will likely be inserting the inner register in the
1227 table. If that register doesn't have an assigned quantity number at
1228 this point but does later, the insertion that we will be doing now will
1229 not be accessible because its hash code will have changed. So assign
1230 a quantity number now. */
1232 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1233 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1235 int regno = REGNO (SUBREG_REG (x));
1237 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1238 /* Mention_regs checks if REG_TICK is exactly one larger than
1239 REG_IN_TABLE to find out if there was only a single preceding
1240 invalidation - for the SUBREG - or another one, which would be
1241 for the full register. Since we don't invalidate the SUBREG
1242 here first, we might have to bump up REG_TICK so that mention_regs
1243 will do the right thing. */
1244 if (REG_IN_TABLE (regno) >= 0
1245 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1246 REG_TICK (regno)++;
1247 mention_regs (x);
1248 return 1;
1250 else
1251 return mention_regs (x);
1254 /* Look in or update the hash table. */
1256 /* Put the element ELT on the list of free elements. */
1258 static void
1259 free_element (elt)
1260 struct table_elt *elt;
1262 elt->next_same_hash = free_element_chain;
1263 free_element_chain = elt;
1266 /* Return an element that is free for use. */
1268 static struct table_elt *
1269 get_element ()
1271 struct table_elt *elt = free_element_chain;
1272 if (elt)
1274 free_element_chain = elt->next_same_hash;
1275 return elt;
1277 n_elements_made++;
1278 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1281 /* Remove table element ELT from use in the table.
1282 HASH is its hash code, made using the HASH macro.
1283 It's an argument because often that is known in advance
1284 and we save much time not recomputing it. */
1286 static void
1287 remove_from_table (elt, hash)
1288 register struct table_elt *elt;
1289 unsigned hash;
1291 if (elt == 0)
1292 return;
1294 /* Mark this element as removed. See cse_insn. */
1295 elt->first_same_value = 0;
1297 /* Remove the table element from its equivalence class. */
1300 register struct table_elt *prev = elt->prev_same_value;
1301 register struct table_elt *next = elt->next_same_value;
1303 if (next) next->prev_same_value = prev;
1305 if (prev)
1306 prev->next_same_value = next;
1307 else
1309 register struct table_elt *newfirst = next;
1310 while (next)
1312 next->first_same_value = newfirst;
1313 next = next->next_same_value;
1318 /* Remove the table element from its hash bucket. */
1321 register struct table_elt *prev = elt->prev_same_hash;
1322 register struct table_elt *next = elt->next_same_hash;
1324 if (next) next->prev_same_hash = prev;
1326 if (prev)
1327 prev->next_same_hash = next;
1328 else if (table[hash] == elt)
1329 table[hash] = next;
1330 else
1332 /* This entry is not in the proper hash bucket. This can happen
1333 when two classes were merged by `merge_equiv_classes'. Search
1334 for the hash bucket that it heads. This happens only very
1335 rarely, so the cost is acceptable. */
1336 for (hash = 0; hash < NBUCKETS; hash++)
1337 if (table[hash] == elt)
1338 table[hash] = next;
1342 /* Remove the table element from its related-value circular chain. */
1344 if (elt->related_value != 0 && elt->related_value != elt)
1346 register struct table_elt *p = elt->related_value;
1347 while (p->related_value != elt)
1348 p = p->related_value;
1349 p->related_value = elt->related_value;
1350 if (p->related_value == p)
1351 p->related_value = 0;
1354 free_element (elt);
1357 /* Look up X in the hash table and return its table element,
1358 or 0 if X is not in the table.
1360 MODE is the machine-mode of X, or if X is an integer constant
1361 with VOIDmode then MODE is the mode with which X will be used.
1363 Here we are satisfied to find an expression whose tree structure
1364 looks like X. */
1366 static struct table_elt *
1367 lookup (x, hash, mode)
1368 rtx x;
1369 unsigned hash;
1370 enum machine_mode mode;
1372 register struct table_elt *p;
1374 for (p = table[hash]; p; p = p->next_same_hash)
1375 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1376 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1377 return p;
1379 return 0;
1382 /* Like `lookup' but don't care whether the table element uses invalid regs.
1383 Also ignore discrepancies in the machine mode of a register. */
1385 static struct table_elt *
1386 lookup_for_remove (x, hash, mode)
1387 rtx x;
1388 unsigned hash;
1389 enum machine_mode mode;
1391 register struct table_elt *p;
1393 if (GET_CODE (x) == REG)
1395 int regno = REGNO (x);
1396 /* Don't check the machine mode when comparing registers;
1397 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1398 for (p = table[hash]; p; p = p->next_same_hash)
1399 if (GET_CODE (p->exp) == REG
1400 && REGNO (p->exp) == regno)
1401 return p;
1403 else
1405 for (p = table[hash]; p; p = p->next_same_hash)
1406 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1407 return p;
1410 return 0;
1413 /* Look for an expression equivalent to X and with code CODE.
1414 If one is found, return that expression. */
1416 static rtx
1417 lookup_as_function (x, code)
1418 rtx x;
1419 enum rtx_code code;
1421 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1422 GET_MODE (x));
1423 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1424 long as we are narrowing. So if we looked in vain for a mode narrower
1425 than word_mode before, look for word_mode now. */
1426 if (p == 0 && code == CONST_INT
1427 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1429 x = copy_rtx (x);
1430 PUT_MODE (x, word_mode);
1431 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1434 if (p == 0)
1435 return 0;
1437 for (p = p->first_same_value; p; p = p->next_same_value)
1439 if (GET_CODE (p->exp) == code
1440 /* Make sure this is a valid entry in the table. */
1441 && exp_equiv_p (p->exp, p->exp, 1, 0))
1442 return p->exp;
1445 return 0;
1448 /* Insert X in the hash table, assuming HASH is its hash code
1449 and CLASSP is an element of the class it should go in
1450 (or 0 if a new class should be made).
1451 It is inserted at the proper position to keep the class in
1452 the order cheapest first.
1454 MODE is the machine-mode of X, or if X is an integer constant
1455 with VOIDmode then MODE is the mode with which X will be used.
1457 For elements of equal cheapness, the most recent one
1458 goes in front, except that the first element in the list
1459 remains first unless a cheaper element is added. The order of
1460 pseudo-registers does not matter, as canon_reg will be called to
1461 find the cheapest when a register is retrieved from the table.
1463 The in_memory field in the hash table element is set to 0.
1464 The caller must set it nonzero if appropriate.
1466 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1467 and if insert_regs returns a nonzero value
1468 you must then recompute its hash code before calling here.
1470 If necessary, update table showing constant values of quantities. */
1472 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1474 static struct table_elt *
1475 insert (x, classp, hash, mode)
1476 register rtx x;
1477 register struct table_elt *classp;
1478 unsigned hash;
1479 enum machine_mode mode;
1481 register struct table_elt *elt;
1483 /* If X is a register and we haven't made a quantity for it,
1484 something is wrong. */
1485 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1486 abort ();
1488 /* If X is a hard register, show it is being put in the table. */
1489 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1491 int regno = REGNO (x);
1492 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1493 int i;
1495 for (i = regno; i < endregno; i++)
1496 SET_HARD_REG_BIT (hard_regs_in_table, i);
1499 /* If X is a label, show we recorded it. */
1500 if (GET_CODE (x) == LABEL_REF
1501 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1502 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1503 recorded_label_ref = 1;
1505 /* Put an element for X into the right hash bucket. */
1507 elt = get_element ();
1508 elt->exp = x;
1509 elt->cost = COST (x);
1510 elt->next_same_value = 0;
1511 elt->prev_same_value = 0;
1512 elt->next_same_hash = table[hash];
1513 elt->prev_same_hash = 0;
1514 elt->related_value = 0;
1515 elt->in_memory = 0;
1516 elt->mode = mode;
1517 elt->is_const = (CONSTANT_P (x)
1518 /* GNU C++ takes advantage of this for `this'
1519 (and other const values). */
1520 || (RTX_UNCHANGING_P (x)
1521 && GET_CODE (x) == REG
1522 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1523 || FIXED_BASE_PLUS_P (x));
1525 if (table[hash])
1526 table[hash]->prev_same_hash = elt;
1527 table[hash] = elt;
1529 /* Put it into the proper value-class. */
1530 if (classp)
1532 classp = classp->first_same_value;
1533 if (CHEAPER (elt, classp))
1534 /* Insert at the head of the class */
1536 register struct table_elt *p;
1537 elt->next_same_value = classp;
1538 classp->prev_same_value = elt;
1539 elt->first_same_value = elt;
1541 for (p = classp; p; p = p->next_same_value)
1542 p->first_same_value = elt;
1544 else
1546 /* Insert not at head of the class. */
1547 /* Put it after the last element cheaper than X. */
1548 register struct table_elt *p, *next;
1549 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1550 p = next);
1551 /* Put it after P and before NEXT. */
1552 elt->next_same_value = next;
1553 if (next)
1554 next->prev_same_value = elt;
1555 elt->prev_same_value = p;
1556 p->next_same_value = elt;
1557 elt->first_same_value = classp;
1560 else
1561 elt->first_same_value = elt;
1563 /* If this is a constant being set equivalent to a register or a register
1564 being set equivalent to a constant, note the constant equivalence.
1566 If this is a constant, it cannot be equivalent to a different constant,
1567 and a constant is the only thing that can be cheaper than a register. So
1568 we know the register is the head of the class (before the constant was
1569 inserted).
1571 If this is a register that is not already known equivalent to a
1572 constant, we must check the entire class.
1574 If this is a register that is already known equivalent to an insn,
1575 update `qty_const_insn' to show that `this_insn' is the latest
1576 insn making that quantity equivalent to the constant. */
1578 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1579 && GET_CODE (x) != REG)
1581 qty_const[REG_QTY (REGNO (classp->exp))]
1582 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1583 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1586 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1587 && ! elt->is_const)
1589 register struct table_elt *p;
1591 for (p = classp; p != 0; p = p->next_same_value)
1593 if (p->is_const && GET_CODE (p->exp) != REG)
1595 qty_const[REG_QTY (REGNO (x))]
1596 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1597 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1598 break;
1603 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1604 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1605 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1607 /* If this is a constant with symbolic value,
1608 and it has a term with an explicit integer value,
1609 link it up with related expressions. */
1610 if (GET_CODE (x) == CONST)
1612 rtx subexp = get_related_value (x);
1613 unsigned subhash;
1614 struct table_elt *subelt, *subelt_prev;
1616 if (subexp != 0)
1618 /* Get the integer-free subexpression in the hash table. */
1619 subhash = safe_hash (subexp, mode) % NBUCKETS;
1620 subelt = lookup (subexp, subhash, mode);
1621 if (subelt == 0)
1622 subelt = insert (subexp, NULL_PTR, subhash, mode);
1623 /* Initialize SUBELT's circular chain if it has none. */
1624 if (subelt->related_value == 0)
1625 subelt->related_value = subelt;
1626 /* Find the element in the circular chain that precedes SUBELT. */
1627 subelt_prev = subelt;
1628 while (subelt_prev->related_value != subelt)
1629 subelt_prev = subelt_prev->related_value;
1630 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1631 This way the element that follows SUBELT is the oldest one. */
1632 elt->related_value = subelt_prev->related_value;
1633 subelt_prev->related_value = elt;
1637 return elt;
1640 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1641 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1642 the two classes equivalent.
1644 CLASS1 will be the surviving class; CLASS2 should not be used after this
1645 call.
1647 Any invalid entries in CLASS2 will not be copied. */
1649 static void
1650 merge_equiv_classes (class1, class2)
1651 struct table_elt *class1, *class2;
1653 struct table_elt *elt, *next, *new;
1655 /* Ensure we start with the head of the classes. */
1656 class1 = class1->first_same_value;
1657 class2 = class2->first_same_value;
1659 /* If they were already equal, forget it. */
1660 if (class1 == class2)
1661 return;
1663 for (elt = class2; elt; elt = next)
1665 unsigned hash;
1666 rtx exp = elt->exp;
1667 enum machine_mode mode = elt->mode;
1669 next = elt->next_same_value;
1671 /* Remove old entry, make a new one in CLASS1's class.
1672 Don't do this for invalid entries as we cannot find their
1673 hash code (it also isn't necessary). */
1674 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1676 hash_arg_in_memory = 0;
1677 hash = HASH (exp, mode);
1679 if (GET_CODE (exp) == REG)
1680 delete_reg_equiv (REGNO (exp));
1682 remove_from_table (elt, hash);
1684 if (insert_regs (exp, class1, 0))
1686 rehash_using_reg (exp);
1687 hash = HASH (exp, mode);
1689 new = insert (exp, class1, hash, mode);
1690 new->in_memory = hash_arg_in_memory;
1696 /* Flush the entire hash table. */
1698 static void
1699 flush_hash_table ()
1701 int i;
1702 struct table_elt *p;
1704 for (i = 0; i < NBUCKETS; i++)
1705 for (p = table[i]; p; p = table[i])
1707 /* Note that invalidate can remove elements
1708 after P in the current hash chain. */
1709 if (GET_CODE (p->exp) == REG)
1710 invalidate (p->exp, p->mode);
1711 else
1712 remove_from_table (p, i);
1716 /* Remove from the hash table, or mark as invalid, all expressions whose
1717 values could be altered by storing in X. X is a register, a subreg, or
1718 a memory reference with nonvarying address (because, when a memory
1719 reference with a varying address is stored in, all memory references are
1720 removed by invalidate_memory so specific invalidation is superfluous).
1721 FULL_MODE, if not VOIDmode, indicates that this much should be
1722 invalidated instead of just the amount indicated by the mode of X. This
1723 is only used for bitfield stores into memory.
1725 A nonvarying address may be just a register or just a symbol reference,
1726 or it may be either of those plus a numeric offset. */
1728 static void
1729 invalidate (x, full_mode)
1730 rtx x;
1731 enum machine_mode full_mode;
1733 register int i;
1734 register struct table_elt *p;
1736 switch (GET_CODE (x))
1738 case REG:
1740 /* If X is a register, dependencies on its contents are recorded
1741 through the qty number mechanism. Just change the qty number of
1742 the register, mark it as invalid for expressions that refer to it,
1743 and remove it itself. */
1744 register int regno = REGNO (x);
1745 register unsigned hash = HASH (x, GET_MODE (x));
1747 /* Remove REGNO from any quantity list it might be on and indicate
1748 that its value might have changed. If it is a pseudo, remove its
1749 entry from the hash table.
1751 For a hard register, we do the first two actions above for any
1752 additional hard registers corresponding to X. Then, if any of these
1753 registers are in the table, we must remove any REG entries that
1754 overlap these registers. */
1756 delete_reg_equiv (regno);
1757 REG_TICK (regno)++;
1759 if (regno >= FIRST_PSEUDO_REGISTER)
1761 /* Because a register can be referenced in more than one mode,
1762 we might have to remove more than one table entry. */
1763 struct table_elt *elt;
1765 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1766 remove_from_table (elt, hash);
1768 else
1770 HOST_WIDE_INT in_table
1771 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1772 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1773 int tregno, tendregno;
1774 register struct table_elt *p, *next;
1776 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1778 for (i = regno + 1; i < endregno; i++)
1780 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1781 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1782 delete_reg_equiv (i);
1783 REG_TICK (i)++;
1786 if (in_table)
1787 for (hash = 0; hash < NBUCKETS; hash++)
1788 for (p = table[hash]; p; p = next)
1790 next = p->next_same_hash;
1792 if (GET_CODE (p->exp) != REG
1793 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1794 continue;
1796 tregno = REGNO (p->exp);
1797 tendregno
1798 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1799 if (tendregno > regno && tregno < endregno)
1800 remove_from_table (p, hash);
1804 return;
1806 case SUBREG:
1807 invalidate (SUBREG_REG (x), VOIDmode);
1808 return;
1810 case PARALLEL:
1811 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1812 invalidate (XVECEXP (x, 0, i), VOIDmode);
1813 return;
1815 case EXPR_LIST:
1816 /* This is part of a disjoint return value; extract the location in
1817 question ignoring the offset. */
1818 invalidate (XEXP (x, 0), VOIDmode);
1819 return;
1821 case MEM:
1822 /* Remove all hash table elements that refer to overlapping pieces of
1823 memory. */
1824 if (full_mode == VOIDmode)
1825 full_mode = GET_MODE (x);
1827 for (i = 0; i < NBUCKETS; i++)
1829 register struct table_elt *next;
1831 for (p = table[i]; p; p = next)
1833 next = p->next_same_hash;
1834 if (p->in_memory
1835 && (GET_CODE (p->exp) != MEM
1836 || true_dependence (x, full_mode, p->exp,
1837 cse_rtx_varies_p)))
1838 remove_from_table (p, i);
1841 return;
1843 default:
1844 abort ();
1848 /* Remove all expressions that refer to register REGNO,
1849 since they are already invalid, and we are about to
1850 mark that register valid again and don't want the old
1851 expressions to reappear as valid. */
1853 static void
1854 remove_invalid_refs (regno)
1855 int regno;
1857 register int i;
1858 register struct table_elt *p, *next;
1860 for (i = 0; i < NBUCKETS; i++)
1861 for (p = table[i]; p; p = next)
1863 next = p->next_same_hash;
1864 if (GET_CODE (p->exp) != REG
1865 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1866 remove_from_table (p, i);
1870 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1871 static void
1872 remove_invalid_subreg_refs (regno, word, mode)
1873 int regno;
1874 int word;
1875 enum machine_mode mode;
1877 register int i;
1878 register struct table_elt *p, *next;
1879 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1881 for (i = 0; i < NBUCKETS; i++)
1882 for (p = table[i]; p; p = next)
1884 rtx exp;
1885 next = p->next_same_hash;
1887 exp = p->exp;
1888 if (GET_CODE (p->exp) != REG
1889 && (GET_CODE (exp) != SUBREG
1890 || GET_CODE (SUBREG_REG (exp)) != REG
1891 || REGNO (SUBREG_REG (exp)) != regno
1892 || (((SUBREG_WORD (exp)
1893 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1894 >= word)
1895 && SUBREG_WORD (exp) <= end))
1896 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1897 remove_from_table (p, i);
1901 /* Recompute the hash codes of any valid entries in the hash table that
1902 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1904 This is called when we make a jump equivalence. */
1906 static void
1907 rehash_using_reg (x)
1908 rtx x;
1910 unsigned int i;
1911 struct table_elt *p, *next;
1912 unsigned hash;
1914 if (GET_CODE (x) == SUBREG)
1915 x = SUBREG_REG (x);
1917 /* If X is not a register or if the register is known not to be in any
1918 valid entries in the table, we have no work to do. */
1920 if (GET_CODE (x) != REG
1921 || REG_IN_TABLE (REGNO (x)) < 0
1922 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1923 return;
1925 /* Scan all hash chains looking for valid entries that mention X.
1926 If we find one and it is in the wrong hash chain, move it. We can skip
1927 objects that are registers, since they are handled specially. */
1929 for (i = 0; i < NBUCKETS; i++)
1930 for (p = table[i]; p; p = next)
1932 next = p->next_same_hash;
1933 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1934 && exp_equiv_p (p->exp, p->exp, 1, 0)
1935 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1937 if (p->next_same_hash)
1938 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1940 if (p->prev_same_hash)
1941 p->prev_same_hash->next_same_hash = p->next_same_hash;
1942 else
1943 table[i] = p->next_same_hash;
1945 p->next_same_hash = table[hash];
1946 p->prev_same_hash = 0;
1947 if (table[hash])
1948 table[hash]->prev_same_hash = p;
1949 table[hash] = p;
1954 /* Remove from the hash table any expression that is a call-clobbered
1955 register. Also update their TICK values. */
1957 static void
1958 invalidate_for_call ()
1960 int regno, endregno;
1961 int i;
1962 unsigned hash;
1963 struct table_elt *p, *next;
1964 int in_table = 0;
1966 /* Go through all the hard registers. For each that is clobbered in
1967 a CALL_INSN, remove the register from quantity chains and update
1968 reg_tick if defined. Also see if any of these registers is currently
1969 in the table. */
1971 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1972 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1974 delete_reg_equiv (regno);
1975 if (REG_TICK (regno) >= 0)
1976 REG_TICK (regno)++;
1978 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1981 /* In the case where we have no call-clobbered hard registers in the
1982 table, we are done. Otherwise, scan the table and remove any
1983 entry that overlaps a call-clobbered register. */
1985 if (in_table)
1986 for (hash = 0; hash < NBUCKETS; hash++)
1987 for (p = table[hash]; p; p = next)
1989 next = p->next_same_hash;
1991 if (GET_CODE (p->exp) != REG
1992 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1993 continue;
1995 regno = REGNO (p->exp);
1996 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1998 for (i = regno; i < endregno; i++)
1999 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2001 remove_from_table (p, hash);
2002 break;
2007 /* Given an expression X of type CONST,
2008 and ELT which is its table entry (or 0 if it
2009 is not in the hash table),
2010 return an alternate expression for X as a register plus integer.
2011 If none can be found, return 0. */
2013 static rtx
2014 use_related_value (x, elt)
2015 rtx x;
2016 struct table_elt *elt;
2018 register struct table_elt *relt = 0;
2019 register struct table_elt *p, *q;
2020 HOST_WIDE_INT offset;
2022 /* First, is there anything related known?
2023 If we have a table element, we can tell from that.
2024 Otherwise, must look it up. */
2026 if (elt != 0 && elt->related_value != 0)
2027 relt = elt;
2028 else if (elt == 0 && GET_CODE (x) == CONST)
2030 rtx subexp = get_related_value (x);
2031 if (subexp != 0)
2032 relt = lookup (subexp,
2033 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2034 GET_MODE (subexp));
2037 if (relt == 0)
2038 return 0;
2040 /* Search all related table entries for one that has an
2041 equivalent register. */
2043 p = relt;
2044 while (1)
2046 /* This loop is strange in that it is executed in two different cases.
2047 The first is when X is already in the table. Then it is searching
2048 the RELATED_VALUE list of X's class (RELT). The second case is when
2049 X is not in the table. Then RELT points to a class for the related
2050 value.
2052 Ensure that, whatever case we are in, that we ignore classes that have
2053 the same value as X. */
2055 if (rtx_equal_p (x, p->exp))
2056 q = 0;
2057 else
2058 for (q = p->first_same_value; q; q = q->next_same_value)
2059 if (GET_CODE (q->exp) == REG)
2060 break;
2062 if (q)
2063 break;
2065 p = p->related_value;
2067 /* We went all the way around, so there is nothing to be found.
2068 Alternatively, perhaps RELT was in the table for some other reason
2069 and it has no related values recorded. */
2070 if (p == relt || p == 0)
2071 break;
2074 if (q == 0)
2075 return 0;
2077 offset = (get_integer_term (x) - get_integer_term (p->exp));
2078 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2079 return plus_constant (q->exp, offset);
2082 /* Hash an rtx. We are careful to make sure the value is never negative.
2083 Equivalent registers hash identically.
2084 MODE is used in hashing for CONST_INTs only;
2085 otherwise the mode of X is used.
2087 Store 1 in do_not_record if any subexpression is volatile.
2089 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2090 which does not have the RTX_UNCHANGING_P bit set.
2092 Note that cse_insn knows that the hash code of a MEM expression
2093 is just (int) MEM plus the hash code of the address. */
2095 static unsigned
2096 canon_hash (x, mode)
2097 rtx x;
2098 enum machine_mode mode;
2100 register int i, j;
2101 register unsigned hash = 0;
2102 register enum rtx_code code;
2103 register const char *fmt;
2105 /* repeat is used to turn tail-recursion into iteration. */
2106 repeat:
2107 if (x == 0)
2108 return hash;
2110 code = GET_CODE (x);
2111 switch (code)
2113 case REG:
2115 register int regno = REGNO (x);
2117 /* On some machines, we can't record any non-fixed hard register,
2118 because extending its life will cause reload problems. We
2119 consider ap, fp, and sp to be fixed for this purpose.
2121 We also consider CCmode registers to be fixed for this purpose;
2122 failure to do so leads to failure to simplify 0<100 type of
2123 conditionals.
2125 On all machines, we can't record any global registers. */
2127 if (regno < FIRST_PSEUDO_REGISTER
2128 && (global_regs[regno]
2129 || (SMALL_REGISTER_CLASSES
2130 && ! fixed_regs[regno]
2131 && regno != FRAME_POINTER_REGNUM
2132 && regno != HARD_FRAME_POINTER_REGNUM
2133 && regno != ARG_POINTER_REGNUM
2134 && regno != STACK_POINTER_REGNUM
2135 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2137 do_not_record = 1;
2138 return 0;
2140 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2141 return hash;
2144 /* We handle SUBREG of a REG specially because the underlying
2145 reg changes its hash value with every value change; we don't
2146 want to have to forget unrelated subregs when one subreg changes. */
2147 case SUBREG:
2149 if (GET_CODE (SUBREG_REG (x)) == REG)
2151 hash += (((unsigned) SUBREG << 7)
2152 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2153 return hash;
2155 break;
2158 case CONST_INT:
2160 unsigned HOST_WIDE_INT tem = INTVAL (x);
2161 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2162 return hash;
2165 case CONST_DOUBLE:
2166 /* This is like the general case, except that it only counts
2167 the integers representing the constant. */
2168 hash += (unsigned) code + (unsigned) GET_MODE (x);
2169 if (GET_MODE (x) != VOIDmode)
2170 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2172 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2173 hash += tem;
2175 else
2176 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2177 + (unsigned) CONST_DOUBLE_HIGH (x));
2178 return hash;
2180 /* Assume there is only one rtx object for any given label. */
2181 case LABEL_REF:
2182 hash
2183 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2184 return hash;
2186 case SYMBOL_REF:
2187 hash
2188 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2189 return hash;
2191 case MEM:
2192 /* We don't record if marked volatile or if BLKmode since we don't
2193 know the size of the move. */
2194 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2196 do_not_record = 1;
2197 return 0;
2199 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2201 hash_arg_in_memory = 1;
2203 /* Now that we have already found this special case,
2204 might as well speed it up as much as possible. */
2205 hash += (unsigned) MEM;
2206 x = XEXP (x, 0);
2207 goto repeat;
2209 case PRE_DEC:
2210 case PRE_INC:
2211 case POST_DEC:
2212 case POST_INC:
2213 case PC:
2214 case CC0:
2215 case CALL:
2216 case UNSPEC_VOLATILE:
2217 do_not_record = 1;
2218 return 0;
2220 case ASM_OPERANDS:
2221 if (MEM_VOLATILE_P (x))
2223 do_not_record = 1;
2224 return 0;
2226 break;
2228 default:
2229 break;
2232 i = GET_RTX_LENGTH (code) - 1;
2233 hash += (unsigned) code + (unsigned) GET_MODE (x);
2234 fmt = GET_RTX_FORMAT (code);
2235 for (; i >= 0; i--)
2237 if (fmt[i] == 'e')
2239 rtx tem = XEXP (x, i);
2241 /* If we are about to do the last recursive call
2242 needed at this level, change it into iteration.
2243 This function is called enough to be worth it. */
2244 if (i == 0)
2246 x = tem;
2247 goto repeat;
2249 hash += canon_hash (tem, 0);
2251 else if (fmt[i] == 'E')
2252 for (j = 0; j < XVECLEN (x, i); j++)
2253 hash += canon_hash (XVECEXP (x, i, j), 0);
2254 else if (fmt[i] == 's')
2256 register unsigned char *p = (unsigned char *) XSTR (x, i);
2257 if (p)
2258 while (*p)
2259 hash += *p++;
2261 else if (fmt[i] == 'i')
2263 register unsigned tem = XINT (x, i);
2264 hash += tem;
2266 else if (fmt[i] == '0' || fmt[i] == 't')
2267 /* unused */;
2268 else
2269 abort ();
2271 return hash;
2274 /* Like canon_hash but with no side effects. */
2276 static unsigned
2277 safe_hash (x, mode)
2278 rtx x;
2279 enum machine_mode mode;
2281 int save_do_not_record = do_not_record;
2282 int save_hash_arg_in_memory = hash_arg_in_memory;
2283 unsigned hash = canon_hash (x, mode);
2284 hash_arg_in_memory = save_hash_arg_in_memory;
2285 do_not_record = save_do_not_record;
2286 return hash;
2289 /* Return 1 iff X and Y would canonicalize into the same thing,
2290 without actually constructing the canonicalization of either one.
2291 If VALIDATE is nonzero,
2292 we assume X is an expression being processed from the rtl
2293 and Y was found in the hash table. We check register refs
2294 in Y for being marked as valid.
2296 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2297 that is known to be in the register. Ordinarily, we don't allow them
2298 to match, because letting them match would cause unpredictable results
2299 in all the places that search a hash table chain for an equivalent
2300 for a given value. A possible equivalent that has different structure
2301 has its hash code computed from different data. Whether the hash code
2302 is the same as that of the given value is pure luck. */
2304 static int
2305 exp_equiv_p (x, y, validate, equal_values)
2306 rtx x, y;
2307 int validate;
2308 int equal_values;
2310 register int i, j;
2311 register enum rtx_code code;
2312 register const char *fmt;
2314 /* Note: it is incorrect to assume an expression is equivalent to itself
2315 if VALIDATE is nonzero. */
2316 if (x == y && !validate)
2317 return 1;
2318 if (x == 0 || y == 0)
2319 return x == y;
2321 code = GET_CODE (x);
2322 if (code != GET_CODE (y))
2324 if (!equal_values)
2325 return 0;
2327 /* If X is a constant and Y is a register or vice versa, they may be
2328 equivalent. We only have to validate if Y is a register. */
2329 if (CONSTANT_P (x) && GET_CODE (y) == REG
2330 && REGNO_QTY_VALID_P (REGNO (y))
2331 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2332 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2333 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2334 return 1;
2336 if (CONSTANT_P (y) && code == REG
2337 && REGNO_QTY_VALID_P (REGNO (x))
2338 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2339 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2340 return 1;
2342 return 0;
2345 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2346 if (GET_MODE (x) != GET_MODE (y))
2347 return 0;
2349 switch (code)
2351 case PC:
2352 case CC0:
2353 return x == y;
2355 case CONST_INT:
2356 return INTVAL (x) == INTVAL (y);
2358 case LABEL_REF:
2359 return XEXP (x, 0) == XEXP (y, 0);
2361 case SYMBOL_REF:
2362 return XSTR (x, 0) == XSTR (y, 0);
2364 case REG:
2366 int regno = REGNO (y);
2367 int endregno
2368 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2369 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2370 int i;
2372 /* If the quantities are not the same, the expressions are not
2373 equivalent. If there are and we are not to validate, they
2374 are equivalent. Otherwise, ensure all regs are up-to-date. */
2376 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2377 return 0;
2379 if (! validate)
2380 return 1;
2382 for (i = regno; i < endregno; i++)
2383 if (REG_IN_TABLE (i) != REG_TICK (i))
2384 return 0;
2386 return 1;
2389 /* For commutative operations, check both orders. */
2390 case PLUS:
2391 case MULT:
2392 case AND:
2393 case IOR:
2394 case XOR:
2395 case NE:
2396 case EQ:
2397 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2398 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2399 validate, equal_values))
2400 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2401 validate, equal_values)
2402 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2403 validate, equal_values)));
2405 default:
2406 break;
2409 /* Compare the elements. If any pair of corresponding elements
2410 fail to match, return 0 for the whole things. */
2412 fmt = GET_RTX_FORMAT (code);
2413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2415 switch (fmt[i])
2417 case 'e':
2418 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2419 return 0;
2420 break;
2422 case 'E':
2423 if (XVECLEN (x, i) != XVECLEN (y, i))
2424 return 0;
2425 for (j = 0; j < XVECLEN (x, i); j++)
2426 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2427 validate, equal_values))
2428 return 0;
2429 break;
2431 case 's':
2432 if (strcmp (XSTR (x, i), XSTR (y, i)))
2433 return 0;
2434 break;
2436 case 'i':
2437 if (XINT (x, i) != XINT (y, i))
2438 return 0;
2439 break;
2441 case 'w':
2442 if (XWINT (x, i) != XWINT (y, i))
2443 return 0;
2444 break;
2446 case '0':
2447 case 't':
2448 break;
2450 default:
2451 abort ();
2455 return 1;
2458 /* Return 1 iff any subexpression of X matches Y.
2459 Here we do not require that X or Y be valid (for registers referred to)
2460 for being in the hash table. */
2462 static int
2463 refers_to_p (x, y)
2464 rtx x, y;
2466 register int i;
2467 register enum rtx_code code;
2468 register const char *fmt;
2470 repeat:
2471 if (x == y)
2472 return 1;
2473 if (x == 0 || y == 0)
2474 return 0;
2476 code = GET_CODE (x);
2477 /* If X as a whole has the same code as Y, they may match.
2478 If so, return 1. */
2479 if (code == GET_CODE (y))
2481 if (exp_equiv_p (x, y, 0, 1))
2482 return 1;
2485 /* X does not match, so try its subexpressions. */
2487 fmt = GET_RTX_FORMAT (code);
2488 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2489 if (fmt[i] == 'e')
2491 if (i == 0)
2493 x = XEXP (x, 0);
2494 goto repeat;
2496 else
2497 if (refers_to_p (XEXP (x, i), y))
2498 return 1;
2500 else if (fmt[i] == 'E')
2502 int j;
2503 for (j = 0; j < XVECLEN (x, i); j++)
2504 if (refers_to_p (XVECEXP (x, i, j), y))
2505 return 1;
2508 return 0;
2511 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2512 set PBASE, PSTART, and PEND which correspond to the base of the address,
2513 the starting offset, and ending offset respectively.
2515 ADDR is known to be a nonvarying address. */
2517 /* ??? Despite what the comments say, this function is in fact frequently
2518 passed varying addresses. This does not appear to cause any problems. */
2520 static void
2521 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2522 rtx addr;
2523 int size;
2524 rtx *pbase;
2525 HOST_WIDE_INT *pstart, *pend;
2527 rtx base;
2528 HOST_WIDE_INT start, end;
2530 base = addr;
2531 start = 0;
2532 end = 0;
2534 if (flag_pic && GET_CODE (base) == PLUS
2535 && XEXP (base, 0) == pic_offset_table_rtx)
2536 base = XEXP (base, 1);
2538 /* Registers with nonvarying addresses usually have constant equivalents;
2539 but the frame pointer register is also possible. */
2540 if (GET_CODE (base) == REG
2541 && qty_const != 0
2542 && REGNO_QTY_VALID_P (REGNO (base))
2543 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2544 && qty_const[REG_QTY (REGNO (base))] != 0)
2545 base = qty_const[REG_QTY (REGNO (base))];
2546 else if (GET_CODE (base) == PLUS
2547 && GET_CODE (XEXP (base, 1)) == CONST_INT
2548 && GET_CODE (XEXP (base, 0)) == REG
2549 && qty_const != 0
2550 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2551 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2552 == GET_MODE (XEXP (base, 0)))
2553 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2555 start = INTVAL (XEXP (base, 1));
2556 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2558 /* This can happen as the result of virtual register instantiation,
2559 if the initial offset is too large to be a valid address. */
2560 else if (GET_CODE (base) == PLUS
2561 && GET_CODE (XEXP (base, 0)) == REG
2562 && GET_CODE (XEXP (base, 1)) == REG
2563 && qty_const != 0
2564 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2565 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2566 == GET_MODE (XEXP (base, 0)))
2567 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2568 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2569 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2570 == GET_MODE (XEXP (base, 1)))
2571 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2573 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2574 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2576 /* One of the two values must be a constant. */
2577 if (GET_CODE (base) != CONST_INT)
2579 if (GET_CODE (tem) != CONST_INT)
2580 abort ();
2581 start = INTVAL (tem);
2583 else
2585 start = INTVAL (base);
2586 base = tem;
2590 /* Handle everything that we can find inside an address that has been
2591 viewed as constant. */
2593 while (1)
2595 /* If no part of this switch does a "continue", the code outside
2596 will exit this loop. */
2598 switch (GET_CODE (base))
2600 case LO_SUM:
2601 /* By definition, operand1 of a LO_SUM is the associated constant
2602 address. Use the associated constant address as the base
2603 instead. */
2604 base = XEXP (base, 1);
2605 continue;
2607 case CONST:
2608 /* Strip off CONST. */
2609 base = XEXP (base, 0);
2610 continue;
2612 case PLUS:
2613 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2615 start += INTVAL (XEXP (base, 1));
2616 base = XEXP (base, 0);
2617 continue;
2619 break;
2621 case AND:
2622 /* Handle the case of an AND which is the negative of a power of
2623 two. This is used to represent unaligned memory operations. */
2624 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2625 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2627 set_nonvarying_address_components (XEXP (base, 0), size,
2628 pbase, pstart, pend);
2630 /* Assume the worst misalignment. START is affected, but not
2631 END, so compensate but adjusting SIZE. Don't lose any
2632 constant we already had. */
2634 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2635 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2636 end += *pend;
2637 base = *pbase;
2639 break;
2641 default:
2642 break;
2645 break;
2648 if (GET_CODE (base) == CONST_INT)
2650 start += INTVAL (base);
2651 base = const0_rtx;
2654 end = start + size;
2656 /* Set the return values. */
2657 *pbase = base;
2658 *pstart = start;
2659 *pend = end;
2662 /* Return 1 if X has a value that can vary even between two
2663 executions of the program. 0 means X can be compared reliably
2664 against certain constants or near-constants. */
2666 static int
2667 cse_rtx_varies_p (x)
2668 register rtx x;
2670 /* We need not check for X and the equivalence class being of the same
2671 mode because if X is equivalent to a constant in some mode, it
2672 doesn't vary in any mode. */
2674 if (GET_CODE (x) == REG
2675 && REGNO_QTY_VALID_P (REGNO (x))
2676 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2677 && qty_const[REG_QTY (REGNO (x))] != 0)
2678 return 0;
2680 if (GET_CODE (x) == PLUS
2681 && GET_CODE (XEXP (x, 1)) == CONST_INT
2682 && GET_CODE (XEXP (x, 0)) == REG
2683 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2684 && (GET_MODE (XEXP (x, 0))
2685 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2686 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2687 return 0;
2689 /* This can happen as the result of virtual register instantiation, if
2690 the initial constant is too large to be a valid address. This gives
2691 us a three instruction sequence, load large offset into a register,
2692 load fp minus a constant into a register, then a MEM which is the
2693 sum of the two `constant' registers. */
2694 if (GET_CODE (x) == PLUS
2695 && GET_CODE (XEXP (x, 0)) == REG
2696 && GET_CODE (XEXP (x, 1)) == REG
2697 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2698 && (GET_MODE (XEXP (x, 0))
2699 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2700 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2701 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2702 && (GET_MODE (XEXP (x, 1))
2703 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2704 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2705 return 0;
2707 return rtx_varies_p (x);
2710 /* Canonicalize an expression:
2711 replace each register reference inside it
2712 with the "oldest" equivalent register.
2714 If INSN is non-zero and we are replacing a pseudo with a hard register
2715 or vice versa, validate_change is used to ensure that INSN remains valid
2716 after we make our substitution. The calls are made with IN_GROUP non-zero
2717 so apply_change_group must be called upon the outermost return from this
2718 function (unless INSN is zero). The result of apply_change_group can
2719 generally be discarded since the changes we are making are optional. */
2721 static rtx
2722 canon_reg (x, insn)
2723 rtx x;
2724 rtx insn;
2726 register int i;
2727 register enum rtx_code code;
2728 register const char *fmt;
2730 if (x == 0)
2731 return x;
2733 code = GET_CODE (x);
2734 switch (code)
2736 case PC:
2737 case CC0:
2738 case CONST:
2739 case CONST_INT:
2740 case CONST_DOUBLE:
2741 case SYMBOL_REF:
2742 case LABEL_REF:
2743 case ADDR_VEC:
2744 case ADDR_DIFF_VEC:
2745 return x;
2747 case REG:
2749 register int first;
2751 /* Never replace a hard reg, because hard regs can appear
2752 in more than one machine mode, and we must preserve the mode
2753 of each occurrence. Also, some hard regs appear in
2754 MEMs that are shared and mustn't be altered. Don't try to
2755 replace any reg that maps to a reg of class NO_REGS. */
2756 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2757 || ! REGNO_QTY_VALID_P (REGNO (x)))
2758 return x;
2760 first = qty_first_reg[REG_QTY (REGNO (x))];
2761 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2762 : REGNO_REG_CLASS (first) == NO_REGS ? x
2763 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2766 default:
2767 break;
2770 fmt = GET_RTX_FORMAT (code);
2771 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2773 register int j;
2775 if (fmt[i] == 'e')
2777 rtx new = canon_reg (XEXP (x, i), insn);
2778 int insn_code;
2780 /* If replacing pseudo with hard reg or vice versa, ensure the
2781 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2782 if (insn != 0 && new != 0
2783 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2784 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2785 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2786 || (insn_code = recog_memoized (insn)) < 0
2787 || insn_data[insn_code].n_dups > 0))
2788 validate_change (insn, &XEXP (x, i), new, 1);
2789 else
2790 XEXP (x, i) = new;
2792 else if (fmt[i] == 'E')
2793 for (j = 0; j < XVECLEN (x, i); j++)
2794 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2797 return x;
2800 /* LOC is a location within INSN that is an operand address (the contents of
2801 a MEM). Find the best equivalent address to use that is valid for this
2802 insn.
2804 On most CISC machines, complicated address modes are costly, and rtx_cost
2805 is a good approximation for that cost. However, most RISC machines have
2806 only a few (usually only one) memory reference formats. If an address is
2807 valid at all, it is often just as cheap as any other address. Hence, for
2808 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2809 costs of various addresses. For two addresses of equal cost, choose the one
2810 with the highest `rtx_cost' value as that has the potential of eliminating
2811 the most insns. For equal costs, we choose the first in the equivalence
2812 class. Note that we ignore the fact that pseudo registers are cheaper
2813 than hard registers here because we would also prefer the pseudo registers.
2816 static void
2817 find_best_addr (insn, loc)
2818 rtx insn;
2819 rtx *loc;
2821 struct table_elt *elt;
2822 rtx addr = *loc;
2823 #ifdef ADDRESS_COST
2824 struct table_elt *p;
2825 int found_better = 1;
2826 #endif
2827 int save_do_not_record = do_not_record;
2828 int save_hash_arg_in_memory = hash_arg_in_memory;
2829 int addr_volatile;
2830 int regno;
2831 unsigned hash;
2833 /* Do not try to replace constant addresses or addresses of local and
2834 argument slots. These MEM expressions are made only once and inserted
2835 in many instructions, as well as being used to control symbol table
2836 output. It is not safe to clobber them.
2838 There are some uncommon cases where the address is already in a register
2839 for some reason, but we cannot take advantage of that because we have
2840 no easy way to unshare the MEM. In addition, looking up all stack
2841 addresses is costly. */
2842 if ((GET_CODE (addr) == PLUS
2843 && GET_CODE (XEXP (addr, 0)) == REG
2844 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2845 && (regno = REGNO (XEXP (addr, 0)),
2846 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2847 || regno == ARG_POINTER_REGNUM))
2848 || (GET_CODE (addr) == REG
2849 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2850 || regno == HARD_FRAME_POINTER_REGNUM
2851 || regno == ARG_POINTER_REGNUM))
2852 || GET_CODE (addr) == ADDRESSOF
2853 || CONSTANT_ADDRESS_P (addr))
2854 return;
2856 /* If this address is not simply a register, try to fold it. This will
2857 sometimes simplify the expression. Many simplifications
2858 will not be valid, but some, usually applying the associative rule, will
2859 be valid and produce better code. */
2860 if (GET_CODE (addr) != REG)
2862 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2864 if (1
2865 #ifdef ADDRESS_COST
2866 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2867 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2868 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2869 #else
2870 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2871 #endif
2872 && validate_change (insn, loc, folded, 0))
2873 addr = folded;
2876 /* If this address is not in the hash table, we can't look for equivalences
2877 of the whole address. Also, ignore if volatile. */
2879 do_not_record = 0;
2880 hash = HASH (addr, Pmode);
2881 addr_volatile = do_not_record;
2882 do_not_record = save_do_not_record;
2883 hash_arg_in_memory = save_hash_arg_in_memory;
2885 if (addr_volatile)
2886 return;
2888 elt = lookup (addr, hash, Pmode);
2890 #ifndef ADDRESS_COST
2891 if (elt)
2893 int our_cost = elt->cost;
2895 /* Find the lowest cost below ours that works. */
2896 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2897 if (elt->cost < our_cost
2898 && (GET_CODE (elt->exp) == REG
2899 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2900 && validate_change (insn, loc,
2901 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2902 return;
2904 #else
2906 if (elt)
2908 /* We need to find the best (under the criteria documented above) entry
2909 in the class that is valid. We use the `flag' field to indicate
2910 choices that were invalid and iterate until we can't find a better
2911 one that hasn't already been tried. */
2913 for (p = elt->first_same_value; p; p = p->next_same_value)
2914 p->flag = 0;
2916 while (found_better)
2918 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2919 int best_rtx_cost = (elt->cost + 1) >> 1;
2920 struct table_elt *best_elt = elt;
2922 found_better = 0;
2923 for (p = elt->first_same_value; p; p = p->next_same_value)
2924 if (! p->flag)
2926 if ((GET_CODE (p->exp) == REG
2927 || exp_equiv_p (p->exp, p->exp, 1, 0))
2928 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2929 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2930 && (p->cost + 1) >> 1 > best_rtx_cost)))
2932 found_better = 1;
2933 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2934 best_rtx_cost = (p->cost + 1) >> 1;
2935 best_elt = p;
2939 if (found_better)
2941 if (validate_change (insn, loc,
2942 canon_reg (copy_rtx (best_elt->exp),
2943 NULL_RTX), 0))
2944 return;
2945 else
2946 best_elt->flag = 1;
2951 /* If the address is a binary operation with the first operand a register
2952 and the second a constant, do the same as above, but looking for
2953 equivalences of the register. Then try to simplify before checking for
2954 the best address to use. This catches a few cases: First is when we
2955 have REG+const and the register is another REG+const. We can often merge
2956 the constants and eliminate one insn and one register. It may also be
2957 that a machine has a cheap REG+REG+const. Finally, this improves the
2958 code on the Alpha for unaligned byte stores. */
2960 if (flag_expensive_optimizations
2961 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2962 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2963 && GET_CODE (XEXP (*loc, 0)) == REG
2964 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2966 rtx c = XEXP (*loc, 1);
2968 do_not_record = 0;
2969 hash = HASH (XEXP (*loc, 0), Pmode);
2970 do_not_record = save_do_not_record;
2971 hash_arg_in_memory = save_hash_arg_in_memory;
2973 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2974 if (elt == 0)
2975 return;
2977 /* We need to find the best (under the criteria documented above) entry
2978 in the class that is valid. We use the `flag' field to indicate
2979 choices that were invalid and iterate until we can't find a better
2980 one that hasn't already been tried. */
2982 for (p = elt->first_same_value; p; p = p->next_same_value)
2983 p->flag = 0;
2985 while (found_better)
2987 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2988 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2989 struct table_elt *best_elt = elt;
2990 rtx best_rtx = *loc;
2991 int count;
2993 /* This is at worst case an O(n^2) algorithm, so limit our search
2994 to the first 32 elements on the list. This avoids trouble
2995 compiling code with very long basic blocks that can easily
2996 call simplify_gen_binary so many times that we run out of
2997 memory. */
2999 found_better = 0;
3000 for (p = elt->first_same_value, count = 0;
3001 p && count < 32;
3002 p = p->next_same_value, count++)
3003 if (! p->flag
3004 && (GET_CODE (p->exp) == REG
3005 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3007 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3008 p->exp, c);
3010 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3011 || (CSE_ADDRESS_COST (new) == best_addr_cost
3012 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3014 found_better = 1;
3015 best_addr_cost = CSE_ADDRESS_COST (new);
3016 best_rtx_cost = (COST (new) + 1) >> 1;
3017 best_elt = p;
3018 best_rtx = new;
3022 if (found_better)
3024 if (validate_change (insn, loc,
3025 canon_reg (copy_rtx (best_rtx),
3026 NULL_RTX), 0))
3027 return;
3028 else
3029 best_elt->flag = 1;
3033 #endif
3036 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3037 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3038 what values are being compared.
3040 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3041 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3042 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3043 compared to produce cc0.
3045 The return value is the comparison operator and is either the code of
3046 A or the code corresponding to the inverse of the comparison. */
3048 static enum rtx_code
3049 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3050 enum rtx_code code;
3051 rtx *parg1, *parg2;
3052 enum machine_mode *pmode1, *pmode2;
3054 rtx arg1, arg2;
3056 arg1 = *parg1, arg2 = *parg2;
3058 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3060 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3062 /* Set non-zero when we find something of interest. */
3063 rtx x = 0;
3064 int reverse_code = 0;
3065 struct table_elt *p = 0;
3067 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3068 On machines with CC0, this is the only case that can occur, since
3069 fold_rtx will return the COMPARE or item being compared with zero
3070 when given CC0. */
3072 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3073 x = arg1;
3075 /* If ARG1 is a comparison operator and CODE is testing for
3076 STORE_FLAG_VALUE, get the inner arguments. */
3078 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3080 if (code == NE
3081 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3082 && code == LT && STORE_FLAG_VALUE == -1)
3083 #ifdef FLOAT_STORE_FLAG_VALUE
3084 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3085 && FLOAT_STORE_FLAG_VALUE < 0)
3086 #endif
3088 x = arg1;
3089 else if (code == EQ
3090 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3091 && code == GE && STORE_FLAG_VALUE == -1)
3092 #ifdef FLOAT_STORE_FLAG_VALUE
3093 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3094 && FLOAT_STORE_FLAG_VALUE < 0)
3095 #endif
3097 x = arg1, reverse_code = 1;
3100 /* ??? We could also check for
3102 (ne (and (eq (...) (const_int 1))) (const_int 0))
3104 and related forms, but let's wait until we see them occurring. */
3106 if (x == 0)
3107 /* Look up ARG1 in the hash table and see if it has an equivalence
3108 that lets us see what is being compared. */
3109 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3110 GET_MODE (arg1));
3111 if (p) p = p->first_same_value;
3113 for (; p; p = p->next_same_value)
3115 enum machine_mode inner_mode = GET_MODE (p->exp);
3117 /* If the entry isn't valid, skip it. */
3118 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3119 continue;
3121 if (GET_CODE (p->exp) == COMPARE
3122 /* Another possibility is that this machine has a compare insn
3123 that includes the comparison code. In that case, ARG1 would
3124 be equivalent to a comparison operation that would set ARG1 to
3125 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3126 ORIG_CODE is the actual comparison being done; if it is an EQ,
3127 we must reverse ORIG_CODE. On machine with a negative value
3128 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3129 || ((code == NE
3130 || (code == LT
3131 && GET_MODE_CLASS (inner_mode) == MODE_INT
3132 && (GET_MODE_BITSIZE (inner_mode)
3133 <= HOST_BITS_PER_WIDE_INT)
3134 && (STORE_FLAG_VALUE
3135 & ((HOST_WIDE_INT) 1
3136 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3137 #ifdef FLOAT_STORE_FLAG_VALUE
3138 || (code == LT
3139 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3140 && FLOAT_STORE_FLAG_VALUE < 0)
3141 #endif
3143 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3145 x = p->exp;
3146 break;
3148 else if ((code == EQ
3149 || (code == GE
3150 && GET_MODE_CLASS (inner_mode) == MODE_INT
3151 && (GET_MODE_BITSIZE (inner_mode)
3152 <= HOST_BITS_PER_WIDE_INT)
3153 && (STORE_FLAG_VALUE
3154 & ((HOST_WIDE_INT) 1
3155 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3156 #ifdef FLOAT_STORE_FLAG_VALUE
3157 || (code == GE
3158 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3159 && FLOAT_STORE_FLAG_VALUE < 0)
3160 #endif
3162 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3164 reverse_code = 1;
3165 x = p->exp;
3166 break;
3169 /* If this is fp + constant, the equivalent is a better operand since
3170 it may let us predict the value of the comparison. */
3171 else if (NONZERO_BASE_PLUS_P (p->exp))
3173 arg1 = p->exp;
3174 continue;
3178 /* If we didn't find a useful equivalence for ARG1, we are done.
3179 Otherwise, set up for the next iteration. */
3180 if (x == 0)
3181 break;
3183 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3184 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3185 code = GET_CODE (x);
3187 if (reverse_code)
3188 code = reverse_condition (code);
3191 /* Return our results. Return the modes from before fold_rtx
3192 because fold_rtx might produce const_int, and then it's too late. */
3193 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3194 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3196 return code;
3199 /* If X is a nontrivial arithmetic operation on an argument
3200 for which a constant value can be determined, return
3201 the result of operating on that value, as a constant.
3202 Otherwise, return X, possibly with one or more operands
3203 modified by recursive calls to this function.
3205 If X is a register whose contents are known, we do NOT
3206 return those contents here. equiv_constant is called to
3207 perform that task.
3209 INSN is the insn that we may be modifying. If it is 0, make a copy
3210 of X before modifying it. */
3212 static rtx
3213 fold_rtx (x, insn)
3214 rtx x;
3215 rtx insn;
3217 register enum rtx_code code;
3218 register enum machine_mode mode;
3219 register const char *fmt;
3220 register int i;
3221 rtx new = 0;
3222 int copied = 0;
3223 int must_swap = 0;
3225 /* Folded equivalents of first two operands of X. */
3226 rtx folded_arg0;
3227 rtx folded_arg1;
3229 /* Constant equivalents of first three operands of X;
3230 0 when no such equivalent is known. */
3231 rtx const_arg0;
3232 rtx const_arg1;
3233 rtx const_arg2;
3235 /* The mode of the first operand of X. We need this for sign and zero
3236 extends. */
3237 enum machine_mode mode_arg0;
3239 if (x == 0)
3240 return x;
3242 mode = GET_MODE (x);
3243 code = GET_CODE (x);
3244 switch (code)
3246 case CONST:
3247 case CONST_INT:
3248 case CONST_DOUBLE:
3249 case SYMBOL_REF:
3250 case LABEL_REF:
3251 case REG:
3252 /* No use simplifying an EXPR_LIST
3253 since they are used only for lists of args
3254 in a function call's REG_EQUAL note. */
3255 case EXPR_LIST:
3256 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3257 want to (e.g.,) make (addressof (const_int 0)) just because
3258 the location is known to be zero. */
3259 case ADDRESSOF:
3260 return x;
3262 #ifdef HAVE_cc0
3263 case CC0:
3264 return prev_insn_cc0;
3265 #endif
3267 case PC:
3268 /* If the next insn is a CODE_LABEL followed by a jump table,
3269 PC's value is a LABEL_REF pointing to that label. That
3270 lets us fold switch statements on the Vax. */
3271 if (insn && GET_CODE (insn) == JUMP_INSN)
3273 rtx next = next_nonnote_insn (insn);
3275 if (next && GET_CODE (next) == CODE_LABEL
3276 && NEXT_INSN (next) != 0
3277 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3278 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3279 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3280 return gen_rtx_LABEL_REF (Pmode, next);
3282 break;
3284 case SUBREG:
3285 /* See if we previously assigned a constant value to this SUBREG. */
3286 if ((new = lookup_as_function (x, CONST_INT)) != 0
3287 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3288 return new;
3290 /* If this is a paradoxical SUBREG, we have no idea what value the
3291 extra bits would have. However, if the operand is equivalent
3292 to a SUBREG whose operand is the same as our mode, and all the
3293 modes are within a word, we can just use the inner operand
3294 because these SUBREGs just say how to treat the register.
3296 Similarly if we find an integer constant. */
3298 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3300 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3301 struct table_elt *elt;
3303 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3304 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3305 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3306 imode)) != 0)
3307 for (elt = elt->first_same_value;
3308 elt; elt = elt->next_same_value)
3310 if (CONSTANT_P (elt->exp)
3311 && GET_MODE (elt->exp) == VOIDmode)
3312 return elt->exp;
3314 if (GET_CODE (elt->exp) == SUBREG
3315 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3316 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3317 return copy_rtx (SUBREG_REG (elt->exp));
3320 return x;
3323 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3324 We might be able to if the SUBREG is extracting a single word in an
3325 integral mode or extracting the low part. */
3327 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3328 const_arg0 = equiv_constant (folded_arg0);
3329 if (const_arg0)
3330 folded_arg0 = const_arg0;
3332 if (folded_arg0 != SUBREG_REG (x))
3334 new = 0;
3336 if (GET_MODE_CLASS (mode) == MODE_INT
3337 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3338 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3339 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3340 GET_MODE (SUBREG_REG (x)));
3341 if (new == 0 && subreg_lowpart_p (x))
3342 new = gen_lowpart_if_possible (mode, folded_arg0);
3343 if (new)
3344 return new;
3347 /* If this is a narrowing SUBREG and our operand is a REG, see if
3348 we can find an equivalence for REG that is an arithmetic operation
3349 in a wider mode where both operands are paradoxical SUBREGs
3350 from objects of our result mode. In that case, we couldn't report
3351 an equivalent value for that operation, since we don't know what the
3352 extra bits will be. But we can find an equivalence for this SUBREG
3353 by folding that operation is the narrow mode. This allows us to
3354 fold arithmetic in narrow modes when the machine only supports
3355 word-sized arithmetic.
3357 Also look for a case where we have a SUBREG whose operand is the
3358 same as our result. If both modes are smaller than a word, we
3359 are simply interpreting a register in different modes and we
3360 can use the inner value. */
3362 if (GET_CODE (folded_arg0) == REG
3363 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3364 && subreg_lowpart_p (x))
3366 struct table_elt *elt;
3368 /* We can use HASH here since we know that canon_hash won't be
3369 called. */
3370 elt = lookup (folded_arg0,
3371 HASH (folded_arg0, GET_MODE (folded_arg0)),
3372 GET_MODE (folded_arg0));
3374 if (elt)
3375 elt = elt->first_same_value;
3377 for (; elt; elt = elt->next_same_value)
3379 enum rtx_code eltcode = GET_CODE (elt->exp);
3381 /* Just check for unary and binary operations. */
3382 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3383 && GET_CODE (elt->exp) != SIGN_EXTEND
3384 && GET_CODE (elt->exp) != ZERO_EXTEND
3385 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3386 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3388 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3390 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3391 op0 = fold_rtx (op0, NULL_RTX);
3393 op0 = equiv_constant (op0);
3394 if (op0)
3395 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3396 op0, mode);
3398 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3399 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3400 && eltcode != DIV && eltcode != MOD
3401 && eltcode != UDIV && eltcode != UMOD
3402 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3403 && eltcode != ROTATE && eltcode != ROTATERT
3404 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3405 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3406 == mode))
3407 || CONSTANT_P (XEXP (elt->exp, 0)))
3408 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3409 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3410 == mode))
3411 || CONSTANT_P (XEXP (elt->exp, 1))))
3413 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3414 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3416 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3417 op0 = fold_rtx (op0, NULL_RTX);
3419 if (op0)
3420 op0 = equiv_constant (op0);
3422 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3423 op1 = fold_rtx (op1, NULL_RTX);
3425 if (op1)
3426 op1 = equiv_constant (op1);
3428 /* If we are looking for the low SImode part of
3429 (ashift:DI c (const_int 32)), it doesn't work
3430 to compute that in SImode, because a 32-bit shift
3431 in SImode is unpredictable. We know the value is 0. */
3432 if (op0 && op1
3433 && GET_CODE (elt->exp) == ASHIFT
3434 && GET_CODE (op1) == CONST_INT
3435 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3437 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3439 /* If the count fits in the inner mode's width,
3440 but exceeds the outer mode's width,
3441 the value will get truncated to 0
3442 by the subreg. */
3443 new = const0_rtx;
3444 else
3445 /* If the count exceeds even the inner mode's width,
3446 don't fold this expression. */
3447 new = 0;
3449 else if (op0 && op1)
3450 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3451 op0, op1);
3454 else if (GET_CODE (elt->exp) == SUBREG
3455 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3456 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3457 <= UNITS_PER_WORD)
3458 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3459 new = copy_rtx (SUBREG_REG (elt->exp));
3461 if (new)
3462 return new;
3466 return x;
3468 case NOT:
3469 case NEG:
3470 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3471 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3472 new = lookup_as_function (XEXP (x, 0), code);
3473 if (new)
3474 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3475 break;
3477 case MEM:
3478 /* If we are not actually processing an insn, don't try to find the
3479 best address. Not only don't we care, but we could modify the
3480 MEM in an invalid way since we have no insn to validate against. */
3481 if (insn != 0)
3482 find_best_addr (insn, &XEXP (x, 0));
3485 /* Even if we don't fold in the insn itself,
3486 we can safely do so here, in hopes of getting a constant. */
3487 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3488 rtx base = 0;
3489 HOST_WIDE_INT offset = 0;
3491 if (GET_CODE (addr) == REG
3492 && REGNO_QTY_VALID_P (REGNO (addr))
3493 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
3494 && qty_const[REG_QTY (REGNO (addr))] != 0)
3495 addr = qty_const[REG_QTY (REGNO (addr))];
3497 /* If address is constant, split it into a base and integer offset. */
3498 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3499 base = addr;
3500 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3501 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3503 base = XEXP (XEXP (addr, 0), 0);
3504 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3506 else if (GET_CODE (addr) == LO_SUM
3507 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3508 base = XEXP (addr, 1);
3509 else if (GET_CODE (addr) == ADDRESSOF)
3510 return change_address (x, VOIDmode, addr);
3512 /* If this is a constant pool reference, we can fold it into its
3513 constant to allow better value tracking. */
3514 if (base && GET_CODE (base) == SYMBOL_REF
3515 && CONSTANT_POOL_ADDRESS_P (base))
3517 rtx constant = get_pool_constant (base);
3518 enum machine_mode const_mode = get_pool_mode (base);
3519 rtx new;
3521 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3522 constant_pool_entries_cost = COST (constant);
3524 /* If we are loading the full constant, we have an equivalence. */
3525 if (offset == 0 && mode == const_mode)
3526 return constant;
3528 /* If this actually isn't a constant (weird!), we can't do
3529 anything. Otherwise, handle the two most common cases:
3530 extracting a word from a multi-word constant, and extracting
3531 the low-order bits. Other cases don't seem common enough to
3532 worry about. */
3533 if (! CONSTANT_P (constant))
3534 return x;
3536 if (GET_MODE_CLASS (mode) == MODE_INT
3537 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3538 && offset % UNITS_PER_WORD == 0
3539 && (new = operand_subword (constant,
3540 offset / UNITS_PER_WORD,
3541 0, const_mode)) != 0)
3542 return new;
3544 if (((BYTES_BIG_ENDIAN
3545 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3546 || (! BYTES_BIG_ENDIAN && offset == 0))
3547 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3548 return new;
3551 /* If this is a reference to a label at a known position in a jump
3552 table, we also know its value. */
3553 if (base && GET_CODE (base) == LABEL_REF)
3555 rtx label = XEXP (base, 0);
3556 rtx table_insn = NEXT_INSN (label);
3558 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3559 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3561 rtx table = PATTERN (table_insn);
3563 if (offset >= 0
3564 && (offset / GET_MODE_SIZE (GET_MODE (table))
3565 < XVECLEN (table, 0)))
3566 return XVECEXP (table, 0,
3567 offset / GET_MODE_SIZE (GET_MODE (table)));
3569 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3570 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3572 rtx table = PATTERN (table_insn);
3574 if (offset >= 0
3575 && (offset / GET_MODE_SIZE (GET_MODE (table))
3576 < XVECLEN (table, 1)))
3578 offset /= GET_MODE_SIZE (GET_MODE (table));
3579 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3580 XEXP (table, 0));
3582 if (GET_MODE (table) != Pmode)
3583 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3585 /* Indicate this is a constant. This isn't a
3586 valid form of CONST, but it will only be used
3587 to fold the next insns and then discarded, so
3588 it should be safe.
3590 Note this expression must be explicitly discarded,
3591 by cse_insn, else it may end up in a REG_EQUAL note
3592 and "escape" to cause problems elsewhere. */
3593 return gen_rtx_CONST (GET_MODE (new), new);
3598 return x;
3601 case ASM_OPERANDS:
3602 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3603 validate_change (insn, &XVECEXP (x, 3, i),
3604 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3605 break;
3607 default:
3608 break;
3611 const_arg0 = 0;
3612 const_arg1 = 0;
3613 const_arg2 = 0;
3614 mode_arg0 = VOIDmode;
3616 /* Try folding our operands.
3617 Then see which ones have constant values known. */
3619 fmt = GET_RTX_FORMAT (code);
3620 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3621 if (fmt[i] == 'e')
3623 rtx arg = XEXP (x, i);
3624 rtx folded_arg = arg, const_arg = 0;
3625 enum machine_mode mode_arg = GET_MODE (arg);
3626 rtx cheap_arg, expensive_arg;
3627 rtx replacements[2];
3628 int j;
3630 /* Most arguments are cheap, so handle them specially. */
3631 switch (GET_CODE (arg))
3633 case REG:
3634 /* This is the same as calling equiv_constant; it is duplicated
3635 here for speed. */
3636 if (REGNO_QTY_VALID_P (REGNO (arg))
3637 && qty_const[REG_QTY (REGNO (arg))] != 0
3638 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
3639 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
3640 const_arg
3641 = gen_lowpart_if_possible (GET_MODE (arg),
3642 qty_const[REG_QTY (REGNO (arg))]);
3643 break;
3645 case CONST:
3646 case CONST_INT:
3647 case SYMBOL_REF:
3648 case LABEL_REF:
3649 case CONST_DOUBLE:
3650 const_arg = arg;
3651 break;
3653 #ifdef HAVE_cc0
3654 case CC0:
3655 folded_arg = prev_insn_cc0;
3656 mode_arg = prev_insn_cc0_mode;
3657 const_arg = equiv_constant (folded_arg);
3658 break;
3659 #endif
3661 default:
3662 folded_arg = fold_rtx (arg, insn);
3663 const_arg = equiv_constant (folded_arg);
3666 /* For the first three operands, see if the operand
3667 is constant or equivalent to a constant. */
3668 switch (i)
3670 case 0:
3671 folded_arg0 = folded_arg;
3672 const_arg0 = const_arg;
3673 mode_arg0 = mode_arg;
3674 break;
3675 case 1:
3676 folded_arg1 = folded_arg;
3677 const_arg1 = const_arg;
3678 break;
3679 case 2:
3680 const_arg2 = const_arg;
3681 break;
3684 /* Pick the least expensive of the folded argument and an
3685 equivalent constant argument. */
3686 if (const_arg == 0 || const_arg == folded_arg
3687 || COST (const_arg) > COST (folded_arg))
3688 cheap_arg = folded_arg, expensive_arg = const_arg;
3689 else
3690 cheap_arg = const_arg, expensive_arg = folded_arg;
3692 /* Try to replace the operand with the cheapest of the two
3693 possibilities. If it doesn't work and this is either of the first
3694 two operands of a commutative operation, try swapping them.
3695 If THAT fails, try the more expensive, provided it is cheaper
3696 than what is already there. */
3698 if (cheap_arg == XEXP (x, i))
3699 continue;
3701 if (insn == 0 && ! copied)
3703 x = copy_rtx (x);
3704 copied = 1;
3707 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3708 for (j = 0;
3709 j < 2 && replacements[j]
3710 && COST (replacements[j]) < COST (XEXP (x, i));
3711 j++)
3713 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3714 break;
3716 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3718 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3719 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3721 if (apply_change_group ())
3723 /* Swap them back to be invalid so that this loop can
3724 continue and flag them to be swapped back later. */
3725 rtx tem;
3727 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3728 XEXP (x, 1) = tem;
3729 must_swap = 1;
3730 break;
3736 else
3738 if (fmt[i] == 'E')
3739 /* Don't try to fold inside of a vector of expressions.
3740 Doing nothing is harmless. */
3741 {;}
3744 /* If a commutative operation, place a constant integer as the second
3745 operand unless the first operand is also a constant integer. Otherwise,
3746 place any constant second unless the first operand is also a constant. */
3748 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3750 if (must_swap || (const_arg0
3751 && (const_arg1 == 0
3752 || (GET_CODE (const_arg0) == CONST_INT
3753 && GET_CODE (const_arg1) != CONST_INT))))
3755 register rtx tem = XEXP (x, 0);
3757 if (insn == 0 && ! copied)
3759 x = copy_rtx (x);
3760 copied = 1;
3763 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3764 validate_change (insn, &XEXP (x, 1), tem, 1);
3765 if (apply_change_group ())
3767 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3768 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3773 /* If X is an arithmetic operation, see if we can simplify it. */
3775 switch (GET_RTX_CLASS (code))
3777 case '1':
3779 int is_const = 0;
3781 /* We can't simplify extension ops unless we know the
3782 original mode. */
3783 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3784 && mode_arg0 == VOIDmode)
3785 break;
3787 /* If we had a CONST, strip it off and put it back later if we
3788 fold. */
3789 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3790 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3792 new = simplify_unary_operation (code, mode,
3793 const_arg0 ? const_arg0 : folded_arg0,
3794 mode_arg0);
3795 if (new != 0 && is_const)
3796 new = gen_rtx_CONST (mode, new);
3798 break;
3800 case '<':
3801 /* See what items are actually being compared and set FOLDED_ARG[01]
3802 to those values and CODE to the actual comparison code. If any are
3803 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3804 do anything if both operands are already known to be constant. */
3806 if (const_arg0 == 0 || const_arg1 == 0)
3808 struct table_elt *p0, *p1;
3809 rtx true = const_true_rtx, false = const0_rtx;
3810 enum machine_mode mode_arg1;
3812 #ifdef FLOAT_STORE_FLAG_VALUE
3813 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3815 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3816 mode);
3817 false = CONST0_RTX (mode);
3819 #endif
3821 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3822 &mode_arg0, &mode_arg1);
3823 const_arg0 = equiv_constant (folded_arg0);
3824 const_arg1 = equiv_constant (folded_arg1);
3826 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3827 what kinds of things are being compared, so we can't do
3828 anything with this comparison. */
3830 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3831 break;
3833 /* If we do not now have two constants being compared, see
3834 if we can nevertheless deduce some things about the
3835 comparison. */
3836 if (const_arg0 == 0 || const_arg1 == 0)
3838 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3839 non-explicit constant? These aren't zero, but we
3840 don't know their sign. */
3841 if (const_arg1 == const0_rtx
3842 && (NONZERO_BASE_PLUS_P (folded_arg0)
3843 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3844 come out as 0. */
3845 || GET_CODE (folded_arg0) == SYMBOL_REF
3846 #endif
3847 || GET_CODE (folded_arg0) == LABEL_REF
3848 || GET_CODE (folded_arg0) == CONST))
3850 if (code == EQ)
3851 return false;
3852 else if (code == NE)
3853 return true;
3856 /* See if the two operands are the same. We don't do this
3857 for IEEE floating-point since we can't assume x == x
3858 since x might be a NaN. */
3860 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3861 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3862 && (folded_arg0 == folded_arg1
3863 || (GET_CODE (folded_arg0) == REG
3864 && GET_CODE (folded_arg1) == REG
3865 && (REG_QTY (REGNO (folded_arg0))
3866 == REG_QTY (REGNO (folded_arg1))))
3867 || ((p0 = lookup (folded_arg0,
3868 (safe_hash (folded_arg0, mode_arg0)
3869 % NBUCKETS), mode_arg0))
3870 && (p1 = lookup (folded_arg1,
3871 (safe_hash (folded_arg1, mode_arg0)
3872 % NBUCKETS), mode_arg0))
3873 && p0->first_same_value == p1->first_same_value)))
3874 return ((code == EQ || code == LE || code == GE
3875 || code == LEU || code == GEU)
3876 ? true : false);
3878 /* If FOLDED_ARG0 is a register, see if the comparison we are
3879 doing now is either the same as we did before or the reverse
3880 (we only check the reverse if not floating-point). */
3881 else if (GET_CODE (folded_arg0) == REG)
3883 int qty = REG_QTY (REGNO (folded_arg0));
3885 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
3886 && (comparison_dominates_p (qty_comparison_code[qty], code)
3887 || (comparison_dominates_p (qty_comparison_code[qty],
3888 reverse_condition (code))
3889 && ! FLOAT_MODE_P (mode_arg0)))
3890 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
3891 || (const_arg1
3892 && rtx_equal_p (qty_comparison_const[qty],
3893 const_arg1))
3894 || (GET_CODE (folded_arg1) == REG
3895 && (REG_QTY (REGNO (folded_arg1))
3896 == qty_comparison_qty[qty]))))
3897 return (comparison_dominates_p (qty_comparison_code[qty],
3898 code)
3899 ? true : false);
3904 /* If we are comparing against zero, see if the first operand is
3905 equivalent to an IOR with a constant. If so, we may be able to
3906 determine the result of this comparison. */
3908 if (const_arg1 == const0_rtx)
3910 rtx y = lookup_as_function (folded_arg0, IOR);
3911 rtx inner_const;
3913 if (y != 0
3914 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3915 && GET_CODE (inner_const) == CONST_INT
3916 && INTVAL (inner_const) != 0)
3918 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3919 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3920 && (INTVAL (inner_const)
3921 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3922 rtx true = const_true_rtx, false = const0_rtx;
3924 #ifdef FLOAT_STORE_FLAG_VALUE
3925 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3927 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3928 mode);
3929 false = CONST0_RTX (mode);
3931 #endif
3933 switch (code)
3935 case EQ:
3936 return false;
3937 case NE:
3938 return true;
3939 case LT: case LE:
3940 if (has_sign)
3941 return true;
3942 break;
3943 case GT: case GE:
3944 if (has_sign)
3945 return false;
3946 break;
3947 default:
3948 break;
3953 new = simplify_relational_operation (code, mode_arg0,
3954 const_arg0 ? const_arg0 : folded_arg0,
3955 const_arg1 ? const_arg1 : folded_arg1);
3956 #ifdef FLOAT_STORE_FLAG_VALUE
3957 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3958 new = ((new == const0_rtx) ? CONST0_RTX (mode)
3959 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
3960 #endif
3961 break;
3963 case '2':
3964 case 'c':
3965 switch (code)
3967 case PLUS:
3968 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3969 with that LABEL_REF as its second operand. If so, the result is
3970 the first operand of that MINUS. This handles switches with an
3971 ADDR_DIFF_VEC table. */
3972 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3974 rtx y
3975 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3976 : lookup_as_function (folded_arg0, MINUS);
3978 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3979 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3980 return XEXP (y, 0);
3982 /* Now try for a CONST of a MINUS like the above. */
3983 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3984 : lookup_as_function (folded_arg0, CONST))) != 0
3985 && GET_CODE (XEXP (y, 0)) == MINUS
3986 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3987 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
3988 return XEXP (XEXP (y, 0), 0);
3991 /* Likewise if the operands are in the other order. */
3992 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3994 rtx y
3995 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3996 : lookup_as_function (folded_arg1, MINUS);
3998 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3999 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4000 return XEXP (y, 0);
4002 /* Now try for a CONST of a MINUS like the above. */
4003 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4004 : lookup_as_function (folded_arg1, CONST))) != 0
4005 && GET_CODE (XEXP (y, 0)) == MINUS
4006 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4007 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
4008 return XEXP (XEXP (y, 0), 0);
4011 /* If second operand is a register equivalent to a negative
4012 CONST_INT, see if we can find a register equivalent to the
4013 positive constant. Make a MINUS if so. Don't do this for
4014 a non-negative constant since we might then alternate between
4015 chosing positive and negative constants. Having the positive
4016 constant previously-used is the more common case. Be sure
4017 the resulting constant is non-negative; if const_arg1 were
4018 the smallest negative number this would overflow: depending
4019 on the mode, this would either just be the same value (and
4020 hence not save anything) or be incorrect. */
4021 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4022 && INTVAL (const_arg1) < 0
4023 /* This used to test
4025 - INTVAL (const_arg1) >= 0
4027 But The Sun V5.0 compilers mis-compiled that test. So
4028 instead we test for the problematic value in a more direct
4029 manner and hope the Sun compilers get it correct. */
4030 && INTVAL (const_arg1) !=
4031 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4032 && GET_CODE (folded_arg1) == REG)
4034 rtx new_const = GEN_INT (- INTVAL (const_arg1));
4035 struct table_elt *p
4036 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
4037 mode);
4039 if (p)
4040 for (p = p->first_same_value; p; p = p->next_same_value)
4041 if (GET_CODE (p->exp) == REG)
4042 return simplify_gen_binary (MINUS, mode, folded_arg0,
4043 canon_reg (p->exp, NULL_RTX));
4045 goto from_plus;
4047 case MINUS:
4048 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4049 If so, produce (PLUS Z C2-C). */
4050 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4052 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4053 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4054 return fold_rtx (plus_constant (copy_rtx (y),
4055 -INTVAL (const_arg1)),
4056 NULL_RTX);
4059 /* ... fall through ... */
4061 from_plus:
4062 case SMIN: case SMAX: case UMIN: case UMAX:
4063 case IOR: case AND: case XOR:
4064 case MULT: case DIV: case UDIV:
4065 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4066 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4067 is known to be of similar form, we may be able to replace the
4068 operation with a combined operation. This may eliminate the
4069 intermediate operation if every use is simplified in this way.
4070 Note that the similar optimization done by combine.c only works
4071 if the intermediate operation's result has only one reference. */
4073 if (GET_CODE (folded_arg0) == REG
4074 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4076 int is_shift
4077 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4078 rtx y = lookup_as_function (folded_arg0, code);
4079 rtx inner_const;
4080 enum rtx_code associate_code;
4081 rtx new_const;
4083 if (y == 0
4084 || 0 == (inner_const
4085 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4086 || GET_CODE (inner_const) != CONST_INT
4087 /* If we have compiled a statement like
4088 "if (x == (x & mask1))", and now are looking at
4089 "x & mask2", we will have a case where the first operand
4090 of Y is the same as our first operand. Unless we detect
4091 this case, an infinite loop will result. */
4092 || XEXP (y, 0) == folded_arg0)
4093 break;
4095 /* Don't associate these operations if they are a PLUS with the
4096 same constant and it is a power of two. These might be doable
4097 with a pre- or post-increment. Similarly for two subtracts of
4098 identical powers of two with post decrement. */
4100 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4101 && ((HAVE_PRE_INCREMENT
4102 && exact_log2 (INTVAL (const_arg1)) >= 0)
4103 || (HAVE_POST_INCREMENT
4104 && exact_log2 (INTVAL (const_arg1)) >= 0)
4105 || (HAVE_PRE_DECREMENT
4106 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4107 || (HAVE_POST_DECREMENT
4108 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4109 break;
4111 /* Compute the code used to compose the constants. For example,
4112 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4114 associate_code
4115 = (code == MULT || code == DIV || code == UDIV ? MULT
4116 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4118 new_const = simplify_binary_operation (associate_code, mode,
4119 const_arg1, inner_const);
4121 if (new_const == 0)
4122 break;
4124 /* If we are associating shift operations, don't let this
4125 produce a shift of the size of the object or larger.
4126 This could occur when we follow a sign-extend by a right
4127 shift on a machine that does a sign-extend as a pair
4128 of shifts. */
4130 if (is_shift && GET_CODE (new_const) == CONST_INT
4131 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4133 /* As an exception, we can turn an ASHIFTRT of this
4134 form into a shift of the number of bits - 1. */
4135 if (code == ASHIFTRT)
4136 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4137 else
4138 break;
4141 y = copy_rtx (XEXP (y, 0));
4143 /* If Y contains our first operand (the most common way this
4144 can happen is if Y is a MEM), we would do into an infinite
4145 loop if we tried to fold it. So don't in that case. */
4147 if (! reg_mentioned_p (folded_arg0, y))
4148 y = fold_rtx (y, insn);
4150 return simplify_gen_binary (code, mode, y, new_const);
4152 break;
4154 default:
4155 break;
4158 new = simplify_binary_operation (code, mode,
4159 const_arg0 ? const_arg0 : folded_arg0,
4160 const_arg1 ? const_arg1 : folded_arg1);
4161 break;
4163 case 'o':
4164 /* (lo_sum (high X) X) is simply X. */
4165 if (code == LO_SUM && const_arg0 != 0
4166 && GET_CODE (const_arg0) == HIGH
4167 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4168 return const_arg1;
4169 break;
4171 case '3':
4172 case 'b':
4173 new = simplify_ternary_operation (code, mode, mode_arg0,
4174 const_arg0 ? const_arg0 : folded_arg0,
4175 const_arg1 ? const_arg1 : folded_arg1,
4176 const_arg2 ? const_arg2 : XEXP (x, 2));
4177 break;
4179 case 'x':
4180 /* Always eliminate CONSTANT_P_RTX at this stage. */
4181 if (code == CONSTANT_P_RTX)
4182 return (const_arg0 ? const1_rtx : const0_rtx);
4183 break;
4186 return new ? new : x;
4189 /* Return a constant value currently equivalent to X.
4190 Return 0 if we don't know one. */
4192 static rtx
4193 equiv_constant (x)
4194 rtx x;
4196 if (GET_CODE (x) == REG
4197 && REGNO_QTY_VALID_P (REGNO (x))
4198 && qty_const[REG_QTY (REGNO (x))])
4199 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
4201 if (x == 0 || CONSTANT_P (x))
4202 return x;
4204 /* If X is a MEM, try to fold it outside the context of any insn to see if
4205 it might be equivalent to a constant. That handles the case where it
4206 is a constant-pool reference. Then try to look it up in the hash table
4207 in case it is something whose value we have seen before. */
4209 if (GET_CODE (x) == MEM)
4211 struct table_elt *elt;
4213 x = fold_rtx (x, NULL_RTX);
4214 if (CONSTANT_P (x))
4215 return x;
4217 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
4218 if (elt == 0)
4219 return 0;
4221 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4222 if (elt->is_const && CONSTANT_P (elt->exp))
4223 return elt->exp;
4226 return 0;
4229 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4230 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4231 least-significant part of X.
4232 MODE specifies how big a part of X to return.
4234 If the requested operation cannot be done, 0 is returned.
4236 This is similar to gen_lowpart in emit-rtl.c. */
4239 gen_lowpart_if_possible (mode, x)
4240 enum machine_mode mode;
4241 register rtx x;
4243 rtx result = gen_lowpart_common (mode, x);
4245 if (result)
4246 return result;
4247 else if (GET_CODE (x) == MEM)
4249 /* This is the only other case we handle. */
4250 register int offset = 0;
4251 rtx new;
4253 if (WORDS_BIG_ENDIAN)
4254 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4255 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4256 if (BYTES_BIG_ENDIAN)
4257 /* Adjust the address so that the address-after-the-data is
4258 unchanged. */
4259 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4260 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4261 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4262 if (! memory_address_p (mode, XEXP (new, 0)))
4263 return 0;
4264 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4265 MEM_COPY_ATTRIBUTES (new, x);
4266 return new;
4268 else
4269 return 0;
4272 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4273 branch. It will be zero if not.
4275 In certain cases, this can cause us to add an equivalence. For example,
4276 if we are following the taken case of
4277 if (i == 2)
4278 we can add the fact that `i' and '2' are now equivalent.
4280 In any case, we can record that this comparison was passed. If the same
4281 comparison is seen later, we will know its value. */
4283 static void
4284 record_jump_equiv (insn, taken)
4285 rtx insn;
4286 int taken;
4288 int cond_known_true;
4289 rtx op0, op1;
4290 enum machine_mode mode, mode0, mode1;
4291 int reversed_nonequality = 0;
4292 enum rtx_code code;
4294 /* Ensure this is the right kind of insn. */
4295 if (! condjump_p (insn) || simplejump_p (insn))
4296 return;
4298 /* See if this jump condition is known true or false. */
4299 if (taken)
4300 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4301 else
4302 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4304 /* Get the type of comparison being done and the operands being compared.
4305 If we had to reverse a non-equality condition, record that fact so we
4306 know that it isn't valid for floating-point. */
4307 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4308 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4309 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4311 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4312 if (! cond_known_true)
4314 reversed_nonequality = (code != EQ && code != NE);
4315 code = reverse_condition (code);
4318 /* The mode is the mode of the non-constant. */
4319 mode = mode0;
4320 if (mode1 != VOIDmode)
4321 mode = mode1;
4323 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4326 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4327 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4328 Make any useful entries we can with that information. Called from
4329 above function and called recursively. */
4331 static void
4332 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4333 enum rtx_code code;
4334 enum machine_mode mode;
4335 rtx op0, op1;
4336 int reversed_nonequality;
4338 unsigned op0_hash, op1_hash;
4339 int op0_in_memory, op1_in_memory;
4340 struct table_elt *op0_elt, *op1_elt;
4342 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4343 we know that they are also equal in the smaller mode (this is also
4344 true for all smaller modes whether or not there is a SUBREG, but
4345 is not worth testing for with no SUBREG). */
4347 /* Note that GET_MODE (op0) may not equal MODE. */
4348 if (code == EQ && GET_CODE (op0) == SUBREG
4349 && (GET_MODE_SIZE (GET_MODE (op0))
4350 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4352 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4353 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4355 record_jump_cond (code, mode, SUBREG_REG (op0),
4356 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4357 reversed_nonequality);
4360 if (code == EQ && GET_CODE (op1) == SUBREG
4361 && (GET_MODE_SIZE (GET_MODE (op1))
4362 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4364 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4365 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4367 record_jump_cond (code, mode, SUBREG_REG (op1),
4368 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4369 reversed_nonequality);
4372 /* Similarly, if this is an NE comparison, and either is a SUBREG
4373 making a smaller mode, we know the whole thing is also NE. */
4375 /* Note that GET_MODE (op0) may not equal MODE;
4376 if we test MODE instead, we can get an infinite recursion
4377 alternating between two modes each wider than MODE. */
4379 if (code == NE && GET_CODE (op0) == SUBREG
4380 && subreg_lowpart_p (op0)
4381 && (GET_MODE_SIZE (GET_MODE (op0))
4382 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4384 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4385 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4387 record_jump_cond (code, mode, SUBREG_REG (op0),
4388 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4389 reversed_nonequality);
4392 if (code == NE && GET_CODE (op1) == SUBREG
4393 && subreg_lowpart_p (op1)
4394 && (GET_MODE_SIZE (GET_MODE (op1))
4395 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4397 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4398 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4400 record_jump_cond (code, mode, SUBREG_REG (op1),
4401 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4402 reversed_nonequality);
4405 /* Hash both operands. */
4407 do_not_record = 0;
4408 hash_arg_in_memory = 0;
4409 op0_hash = HASH (op0, mode);
4410 op0_in_memory = hash_arg_in_memory;
4412 if (do_not_record)
4413 return;
4415 do_not_record = 0;
4416 hash_arg_in_memory = 0;
4417 op1_hash = HASH (op1, mode);
4418 op1_in_memory = hash_arg_in_memory;
4420 if (do_not_record)
4421 return;
4423 /* Look up both operands. */
4424 op0_elt = lookup (op0, op0_hash, mode);
4425 op1_elt = lookup (op1, op1_hash, mode);
4427 /* If both operands are already equivalent or if they are not in the
4428 table but are identical, do nothing. */
4429 if ((op0_elt != 0 && op1_elt != 0
4430 && op0_elt->first_same_value == op1_elt->first_same_value)
4431 || op0 == op1 || rtx_equal_p (op0, op1))
4432 return;
4434 /* If we aren't setting two things equal all we can do is save this
4435 comparison. Similarly if this is floating-point. In the latter
4436 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4437 If we record the equality, we might inadvertently delete code
4438 whose intent was to change -0 to +0. */
4440 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4442 /* If we reversed a floating-point comparison, if OP0 is not a
4443 register, or if OP1 is neither a register or constant, we can't
4444 do anything. */
4446 if (GET_CODE (op1) != REG)
4447 op1 = equiv_constant (op1);
4449 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4450 || GET_CODE (op0) != REG || op1 == 0)
4451 return;
4453 /* Put OP0 in the hash table if it isn't already. This gives it a
4454 new quantity number. */
4455 if (op0_elt == 0)
4457 if (insert_regs (op0, NULL_PTR, 0))
4459 rehash_using_reg (op0);
4460 op0_hash = HASH (op0, mode);
4462 /* If OP0 is contained in OP1, this changes its hash code
4463 as well. Faster to rehash than to check, except
4464 for the simple case of a constant. */
4465 if (! CONSTANT_P (op1))
4466 op1_hash = HASH (op1,mode);
4469 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4470 op0_elt->in_memory = op0_in_memory;
4473 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
4474 if (GET_CODE (op1) == REG)
4476 /* Look it up again--in case op0 and op1 are the same. */
4477 op1_elt = lookup (op1, op1_hash, mode);
4479 /* Put OP1 in the hash table so it gets a new quantity number. */
4480 if (op1_elt == 0)
4482 if (insert_regs (op1, NULL_PTR, 0))
4484 rehash_using_reg (op1);
4485 op1_hash = HASH (op1, mode);
4488 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4489 op1_elt->in_memory = op1_in_memory;
4492 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
4493 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
4495 else
4497 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
4498 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
4501 return;
4504 /* If either side is still missing an equivalence, make it now,
4505 then merge the equivalences. */
4507 if (op0_elt == 0)
4509 if (insert_regs (op0, NULL_PTR, 0))
4511 rehash_using_reg (op0);
4512 op0_hash = HASH (op0, mode);
4515 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4516 op0_elt->in_memory = op0_in_memory;
4519 if (op1_elt == 0)
4521 if (insert_regs (op1, NULL_PTR, 0))
4523 rehash_using_reg (op1);
4524 op1_hash = HASH (op1, mode);
4527 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4528 op1_elt->in_memory = op1_in_memory;
4531 merge_equiv_classes (op0_elt, op1_elt);
4532 last_jump_equiv_class = op0_elt;
4535 /* CSE processing for one instruction.
4536 First simplify sources and addresses of all assignments
4537 in the instruction, using previously-computed equivalents values.
4538 Then install the new sources and destinations in the table
4539 of available values.
4541 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4542 the insn. It means that INSN is inside libcall block. In this
4543 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4545 /* Data on one SET contained in the instruction. */
4547 struct set
4549 /* The SET rtx itself. */
4550 rtx rtl;
4551 /* The SET_SRC of the rtx (the original value, if it is changing). */
4552 rtx src;
4553 /* The hash-table element for the SET_SRC of the SET. */
4554 struct table_elt *src_elt;
4555 /* Hash value for the SET_SRC. */
4556 unsigned src_hash;
4557 /* Hash value for the SET_DEST. */
4558 unsigned dest_hash;
4559 /* The SET_DEST, with SUBREG, etc., stripped. */
4560 rtx inner_dest;
4561 /* Nonzero if the SET_SRC is in memory. */
4562 char src_in_memory;
4563 /* Nonzero if the SET_SRC contains something
4564 whose value cannot be predicted and understood. */
4565 char src_volatile;
4566 /* Original machine mode, in case it becomes a CONST_INT. */
4567 enum machine_mode mode;
4568 /* A constant equivalent for SET_SRC, if any. */
4569 rtx src_const;
4570 /* Hash value of constant equivalent for SET_SRC. */
4571 unsigned src_const_hash;
4572 /* Table entry for constant equivalent for SET_SRC, if any. */
4573 struct table_elt *src_const_elt;
4576 static void
4577 cse_insn (insn, libcall_insn)
4578 rtx insn;
4579 rtx libcall_insn;
4581 register rtx x = PATTERN (insn);
4582 register int i;
4583 rtx tem;
4584 register int n_sets = 0;
4586 #ifdef HAVE_cc0
4587 /* Records what this insn does to set CC0. */
4588 rtx this_insn_cc0 = 0;
4589 enum machine_mode this_insn_cc0_mode = VOIDmode;
4590 #endif
4592 rtx src_eqv = 0;
4593 struct table_elt *src_eqv_elt = 0;
4594 int src_eqv_volatile = 0;
4595 int src_eqv_in_memory = 0;
4596 unsigned src_eqv_hash = 0;
4598 struct set *sets = NULL_PTR;
4600 this_insn = insn;
4602 /* Find all the SETs and CLOBBERs in this instruction.
4603 Record all the SETs in the array `set' and count them.
4604 Also determine whether there is a CLOBBER that invalidates
4605 all memory references, or all references at varying addresses. */
4607 if (GET_CODE (insn) == CALL_INSN)
4609 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4610 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4611 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4614 if (GET_CODE (x) == SET)
4616 sets = (struct set *) alloca (sizeof (struct set));
4617 sets[0].rtl = x;
4619 /* Ignore SETs that are unconditional jumps.
4620 They never need cse processing, so this does not hurt.
4621 The reason is not efficiency but rather
4622 so that we can test at the end for instructions
4623 that have been simplified to unconditional jumps
4624 and not be misled by unchanged instructions
4625 that were unconditional jumps to begin with. */
4626 if (SET_DEST (x) == pc_rtx
4627 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4630 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4631 The hard function value register is used only once, to copy to
4632 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4633 Ensure we invalidate the destination register. On the 80386 no
4634 other code would invalidate it since it is a fixed_reg.
4635 We need not check the return of apply_change_group; see canon_reg. */
4637 else if (GET_CODE (SET_SRC (x)) == CALL)
4639 canon_reg (SET_SRC (x), insn);
4640 apply_change_group ();
4641 fold_rtx (SET_SRC (x), insn);
4642 invalidate (SET_DEST (x), VOIDmode);
4644 else
4645 n_sets = 1;
4647 else if (GET_CODE (x) == PARALLEL)
4649 register int lim = XVECLEN (x, 0);
4651 sets = (struct set *) alloca (lim * sizeof (struct set));
4653 /* Find all regs explicitly clobbered in this insn,
4654 and ensure they are not replaced with any other regs
4655 elsewhere in this insn.
4656 When a reg that is clobbered is also used for input,
4657 we should presume that that is for a reason,
4658 and we should not substitute some other register
4659 which is not supposed to be clobbered.
4660 Therefore, this loop cannot be merged into the one below
4661 because a CALL may precede a CLOBBER and refer to the
4662 value clobbered. We must not let a canonicalization do
4663 anything in that case. */
4664 for (i = 0; i < lim; i++)
4666 register rtx y = XVECEXP (x, 0, i);
4667 if (GET_CODE (y) == CLOBBER)
4669 rtx clobbered = XEXP (y, 0);
4671 if (GET_CODE (clobbered) == REG
4672 || GET_CODE (clobbered) == SUBREG)
4673 invalidate (clobbered, VOIDmode);
4674 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4675 || GET_CODE (clobbered) == ZERO_EXTRACT)
4676 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4680 for (i = 0; i < lim; i++)
4682 register rtx y = XVECEXP (x, 0, i);
4683 if (GET_CODE (y) == SET)
4685 /* As above, we ignore unconditional jumps and call-insns and
4686 ignore the result of apply_change_group. */
4687 if (GET_CODE (SET_SRC (y)) == CALL)
4689 canon_reg (SET_SRC (y), insn);
4690 apply_change_group ();
4691 fold_rtx (SET_SRC (y), insn);
4692 invalidate (SET_DEST (y), VOIDmode);
4694 else if (SET_DEST (y) == pc_rtx
4695 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4697 else
4698 sets[n_sets++].rtl = y;
4700 else if (GET_CODE (y) == CLOBBER)
4702 /* If we clobber memory, canon the address.
4703 This does nothing when a register is clobbered
4704 because we have already invalidated the reg. */
4705 if (GET_CODE (XEXP (y, 0)) == MEM)
4706 canon_reg (XEXP (y, 0), NULL_RTX);
4708 else if (GET_CODE (y) == USE
4709 && ! (GET_CODE (XEXP (y, 0)) == REG
4710 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4711 canon_reg (y, NULL_RTX);
4712 else if (GET_CODE (y) == CALL)
4714 /* The result of apply_change_group can be ignored; see
4715 canon_reg. */
4716 canon_reg (y, insn);
4717 apply_change_group ();
4718 fold_rtx (y, insn);
4722 else if (GET_CODE (x) == CLOBBER)
4724 if (GET_CODE (XEXP (x, 0)) == MEM)
4725 canon_reg (XEXP (x, 0), NULL_RTX);
4728 /* Canonicalize a USE of a pseudo register or memory location. */
4729 else if (GET_CODE (x) == USE
4730 && ! (GET_CODE (XEXP (x, 0)) == REG
4731 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4732 canon_reg (XEXP (x, 0), NULL_RTX);
4733 else if (GET_CODE (x) == CALL)
4735 /* The result of apply_change_group can be ignored; see canon_reg. */
4736 canon_reg (x, insn);
4737 apply_change_group ();
4738 fold_rtx (x, insn);
4741 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4742 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4743 is handled specially for this case, and if it isn't set, then there will
4744 be no equivalence for the destination. */
4745 if (n_sets == 1 && REG_NOTES (insn) != 0
4746 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4747 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4748 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4749 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4751 /* Canonicalize sources and addresses of destinations.
4752 We do this in a separate pass to avoid problems when a MATCH_DUP is
4753 present in the insn pattern. In that case, we want to ensure that
4754 we don't break the duplicate nature of the pattern. So we will replace
4755 both operands at the same time. Otherwise, we would fail to find an
4756 equivalent substitution in the loop calling validate_change below.
4758 We used to suppress canonicalization of DEST if it appears in SRC,
4759 but we don't do this any more. */
4761 for (i = 0; i < n_sets; i++)
4763 rtx dest = SET_DEST (sets[i].rtl);
4764 rtx src = SET_SRC (sets[i].rtl);
4765 rtx new = canon_reg (src, insn);
4766 int insn_code;
4768 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4769 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4770 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4771 || (insn_code = recog_memoized (insn)) < 0
4772 || insn_data[insn_code].n_dups > 0)
4773 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4774 else
4775 SET_SRC (sets[i].rtl) = new;
4777 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4779 validate_change (insn, &XEXP (dest, 1),
4780 canon_reg (XEXP (dest, 1), insn), 1);
4781 validate_change (insn, &XEXP (dest, 2),
4782 canon_reg (XEXP (dest, 2), insn), 1);
4785 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4786 || GET_CODE (dest) == ZERO_EXTRACT
4787 || GET_CODE (dest) == SIGN_EXTRACT)
4788 dest = XEXP (dest, 0);
4790 if (GET_CODE (dest) == MEM)
4791 canon_reg (dest, insn);
4794 /* Now that we have done all the replacements, we can apply the change
4795 group and see if they all work. Note that this will cause some
4796 canonicalizations that would have worked individually not to be applied
4797 because some other canonicalization didn't work, but this should not
4798 occur often.
4800 The result of apply_change_group can be ignored; see canon_reg. */
4802 apply_change_group ();
4804 /* Set sets[i].src_elt to the class each source belongs to.
4805 Detect assignments from or to volatile things
4806 and set set[i] to zero so they will be ignored
4807 in the rest of this function.
4809 Nothing in this loop changes the hash table or the register chains. */
4811 for (i = 0; i < n_sets; i++)
4813 register rtx src, dest;
4814 register rtx src_folded;
4815 register struct table_elt *elt = 0, *p;
4816 enum machine_mode mode;
4817 rtx src_eqv_here;
4818 rtx src_const = 0;
4819 rtx src_related = 0;
4820 struct table_elt *src_const_elt = 0;
4821 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4822 int src_related_cost = 10000, src_elt_cost = 10000;
4823 /* Set non-zero if we need to call force_const_mem on with the
4824 contents of src_folded before using it. */
4825 int src_folded_force_flag = 0;
4827 dest = SET_DEST (sets[i].rtl);
4828 src = SET_SRC (sets[i].rtl);
4830 /* If SRC is a constant that has no machine mode,
4831 hash it with the destination's machine mode.
4832 This way we can keep different modes separate. */
4834 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4835 sets[i].mode = mode;
4837 if (src_eqv)
4839 enum machine_mode eqvmode = mode;
4840 if (GET_CODE (dest) == STRICT_LOW_PART)
4841 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4842 do_not_record = 0;
4843 hash_arg_in_memory = 0;
4844 src_eqv = fold_rtx (src_eqv, insn);
4845 src_eqv_hash = HASH (src_eqv, eqvmode);
4847 /* Find the equivalence class for the equivalent expression. */
4849 if (!do_not_record)
4850 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4852 src_eqv_volatile = do_not_record;
4853 src_eqv_in_memory = hash_arg_in_memory;
4856 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4857 value of the INNER register, not the destination. So it is not
4858 a valid substitution for the source. But save it for later. */
4859 if (GET_CODE (dest) == STRICT_LOW_PART)
4860 src_eqv_here = 0;
4861 else
4862 src_eqv_here = src_eqv;
4864 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4865 simplified result, which may not necessarily be valid. */
4866 src_folded = fold_rtx (src, insn);
4868 #if 0
4869 /* ??? This caused bad code to be generated for the m68k port with -O2.
4870 Suppose src is (CONST_INT -1), and that after truncation src_folded
4871 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4872 At the end we will add src and src_const to the same equivalence
4873 class. We now have 3 and -1 on the same equivalence class. This
4874 causes later instructions to be mis-optimized. */
4875 /* If storing a constant in a bitfield, pre-truncate the constant
4876 so we will be able to record it later. */
4877 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4878 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4880 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4882 if (GET_CODE (src) == CONST_INT
4883 && GET_CODE (width) == CONST_INT
4884 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4885 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4886 src_folded
4887 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4888 << INTVAL (width)) - 1));
4890 #endif
4892 /* Compute SRC's hash code, and also notice if it
4893 should not be recorded at all. In that case,
4894 prevent any further processing of this assignment. */
4895 do_not_record = 0;
4896 hash_arg_in_memory = 0;
4898 sets[i].src = src;
4899 sets[i].src_hash = HASH (src, mode);
4900 sets[i].src_volatile = do_not_record;
4901 sets[i].src_in_memory = hash_arg_in_memory;
4903 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4904 a pseudo that is set more than once, do not record SRC. Using
4905 SRC as a replacement for anything else will be incorrect in that
4906 situation. Note that this usually occurs only for stack slots,
4907 in which case all the RTL would be referring to SRC, so we don't
4908 lose any optimization opportunities by not having SRC in the
4909 hash table. */
4911 if (GET_CODE (src) == MEM
4912 && find_reg_note (insn, REG_EQUIV, src) != 0
4913 && GET_CODE (dest) == REG
4914 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4915 && REG_N_SETS (REGNO (dest)) != 1)
4916 sets[i].src_volatile = 1;
4918 #if 0
4919 /* It is no longer clear why we used to do this, but it doesn't
4920 appear to still be needed. So let's try without it since this
4921 code hurts cse'ing widened ops. */
4922 /* If source is a perverse subreg (such as QI treated as an SI),
4923 treat it as volatile. It may do the work of an SI in one context
4924 where the extra bits are not being used, but cannot replace an SI
4925 in general. */
4926 if (GET_CODE (src) == SUBREG
4927 && (GET_MODE_SIZE (GET_MODE (src))
4928 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4929 sets[i].src_volatile = 1;
4930 #endif
4932 /* Locate all possible equivalent forms for SRC. Try to replace
4933 SRC in the insn with each cheaper equivalent.
4935 We have the following types of equivalents: SRC itself, a folded
4936 version, a value given in a REG_EQUAL note, or a value related
4937 to a constant.
4939 Each of these equivalents may be part of an additional class
4940 of equivalents (if more than one is in the table, they must be in
4941 the same class; we check for this).
4943 If the source is volatile, we don't do any table lookups.
4945 We note any constant equivalent for possible later use in a
4946 REG_NOTE. */
4948 if (!sets[i].src_volatile)
4949 elt = lookup (src, sets[i].src_hash, mode);
4951 sets[i].src_elt = elt;
4953 if (elt && src_eqv_here && src_eqv_elt)
4955 if (elt->first_same_value != src_eqv_elt->first_same_value)
4957 /* The REG_EQUAL is indicating that two formerly distinct
4958 classes are now equivalent. So merge them. */
4959 merge_equiv_classes (elt, src_eqv_elt);
4960 src_eqv_hash = HASH (src_eqv, elt->mode);
4961 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4964 src_eqv_here = 0;
4967 else if (src_eqv_elt)
4968 elt = src_eqv_elt;
4970 /* Try to find a constant somewhere and record it in `src_const'.
4971 Record its table element, if any, in `src_const_elt'. Look in
4972 any known equivalences first. (If the constant is not in the
4973 table, also set `sets[i].src_const_hash'). */
4974 if (elt)
4975 for (p = elt->first_same_value; p; p = p->next_same_value)
4976 if (p->is_const)
4978 src_const = p->exp;
4979 src_const_elt = elt;
4980 break;
4983 if (src_const == 0
4984 && (CONSTANT_P (src_folded)
4985 /* Consider (minus (label_ref L1) (label_ref L2)) as
4986 "constant" here so we will record it. This allows us
4987 to fold switch statements when an ADDR_DIFF_VEC is used. */
4988 || (GET_CODE (src_folded) == MINUS
4989 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4990 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4991 src_const = src_folded, src_const_elt = elt;
4992 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4993 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4995 /* If we don't know if the constant is in the table, get its
4996 hash code and look it up. */
4997 if (src_const && src_const_elt == 0)
4999 sets[i].src_const_hash = HASH (src_const, mode);
5000 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5003 sets[i].src_const = src_const;
5004 sets[i].src_const_elt = src_const_elt;
5006 /* If the constant and our source are both in the table, mark them as
5007 equivalent. Otherwise, if a constant is in the table but the source
5008 isn't, set ELT to it. */
5009 if (src_const_elt && elt
5010 && src_const_elt->first_same_value != elt->first_same_value)
5011 merge_equiv_classes (elt, src_const_elt);
5012 else if (src_const_elt && elt == 0)
5013 elt = src_const_elt;
5015 /* See if there is a register linearly related to a constant
5016 equivalent of SRC. */
5017 if (src_const
5018 && (GET_CODE (src_const) == CONST
5019 || (src_const_elt && src_const_elt->related_value != 0)))
5021 src_related = use_related_value (src_const, src_const_elt);
5022 if (src_related)
5024 struct table_elt *src_related_elt
5025 = lookup (src_related, HASH (src_related, mode), mode);
5026 if (src_related_elt && elt)
5028 if (elt->first_same_value
5029 != src_related_elt->first_same_value)
5030 /* This can occur when we previously saw a CONST
5031 involving a SYMBOL_REF and then see the SYMBOL_REF
5032 twice. Merge the involved classes. */
5033 merge_equiv_classes (elt, src_related_elt);
5035 src_related = 0;
5036 src_related_elt = 0;
5038 else if (src_related_elt && elt == 0)
5039 elt = src_related_elt;
5043 /* See if we have a CONST_INT that is already in a register in a
5044 wider mode. */
5046 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5047 && GET_MODE_CLASS (mode) == MODE_INT
5048 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5050 enum machine_mode wider_mode;
5052 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5053 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5054 && src_related == 0;
5055 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5057 struct table_elt *const_elt
5058 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5060 if (const_elt == 0)
5061 continue;
5063 for (const_elt = const_elt->first_same_value;
5064 const_elt; const_elt = const_elt->next_same_value)
5065 if (GET_CODE (const_elt->exp) == REG)
5067 src_related = gen_lowpart_if_possible (mode,
5068 const_elt->exp);
5069 break;
5074 /* Another possibility is that we have an AND with a constant in
5075 a mode narrower than a word. If so, it might have been generated
5076 as part of an "if" which would narrow the AND. If we already
5077 have done the AND in a wider mode, we can use a SUBREG of that
5078 value. */
5080 if (flag_expensive_optimizations && ! src_related
5081 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5082 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5084 enum machine_mode tmode;
5085 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5087 for (tmode = GET_MODE_WIDER_MODE (mode);
5088 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5089 tmode = GET_MODE_WIDER_MODE (tmode))
5091 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5092 struct table_elt *larger_elt;
5094 if (inner)
5096 PUT_MODE (new_and, tmode);
5097 XEXP (new_and, 0) = inner;
5098 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5099 if (larger_elt == 0)
5100 continue;
5102 for (larger_elt = larger_elt->first_same_value;
5103 larger_elt; larger_elt = larger_elt->next_same_value)
5104 if (GET_CODE (larger_elt->exp) == REG)
5106 src_related
5107 = gen_lowpart_if_possible (mode, larger_elt->exp);
5108 break;
5111 if (src_related)
5112 break;
5117 #ifdef LOAD_EXTEND_OP
5118 /* See if a MEM has already been loaded with a widening operation;
5119 if it has, we can use a subreg of that. Many CISC machines
5120 also have such operations, but this is only likely to be
5121 beneficial these machines. */
5123 if (flag_expensive_optimizations && src_related == 0
5124 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5125 && GET_MODE_CLASS (mode) == MODE_INT
5126 && GET_CODE (src) == MEM && ! do_not_record
5127 && LOAD_EXTEND_OP (mode) != NIL)
5129 enum machine_mode tmode;
5131 /* Set what we are trying to extend and the operation it might
5132 have been extended with. */
5133 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5134 XEXP (memory_extend_rtx, 0) = src;
5136 for (tmode = GET_MODE_WIDER_MODE (mode);
5137 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5138 tmode = GET_MODE_WIDER_MODE (tmode))
5140 struct table_elt *larger_elt;
5142 PUT_MODE (memory_extend_rtx, tmode);
5143 larger_elt = lookup (memory_extend_rtx,
5144 HASH (memory_extend_rtx, tmode), tmode);
5145 if (larger_elt == 0)
5146 continue;
5148 for (larger_elt = larger_elt->first_same_value;
5149 larger_elt; larger_elt = larger_elt->next_same_value)
5150 if (GET_CODE (larger_elt->exp) == REG)
5152 src_related = gen_lowpart_if_possible (mode,
5153 larger_elt->exp);
5154 break;
5157 if (src_related)
5158 break;
5161 #endif /* LOAD_EXTEND_OP */
5163 if (src == src_folded)
5164 src_folded = 0;
5166 /* At this point, ELT, if non-zero, points to a class of expressions
5167 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5168 and SRC_RELATED, if non-zero, each contain additional equivalent
5169 expressions. Prune these latter expressions by deleting expressions
5170 already in the equivalence class.
5172 Check for an equivalent identical to the destination. If found,
5173 this is the preferred equivalent since it will likely lead to
5174 elimination of the insn. Indicate this by placing it in
5175 `src_related'. */
5177 if (elt) elt = elt->first_same_value;
5178 for (p = elt; p; p = p->next_same_value)
5180 enum rtx_code code = GET_CODE (p->exp);
5182 /* If the expression is not valid, ignore it. Then we do not
5183 have to check for validity below. In most cases, we can use
5184 `rtx_equal_p', since canonicalization has already been done. */
5185 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5186 continue;
5188 /* Also skip paradoxical subregs, unless that's what we're
5189 looking for. */
5190 if (code == SUBREG
5191 && (GET_MODE_SIZE (GET_MODE (p->exp))
5192 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5193 && ! (src != 0
5194 && GET_CODE (src) == SUBREG
5195 && GET_MODE (src) == GET_MODE (p->exp)
5196 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5197 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5198 continue;
5200 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5201 src = 0;
5202 else if (src_folded && GET_CODE (src_folded) == code
5203 && rtx_equal_p (src_folded, p->exp))
5204 src_folded = 0;
5205 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5206 && rtx_equal_p (src_eqv_here, p->exp))
5207 src_eqv_here = 0;
5208 else if (src_related && GET_CODE (src_related) == code
5209 && rtx_equal_p (src_related, p->exp))
5210 src_related = 0;
5212 /* This is the same as the destination of the insns, we want
5213 to prefer it. Copy it to src_related. The code below will
5214 then give it a negative cost. */
5215 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5216 src_related = dest;
5220 /* Find the cheapest valid equivalent, trying all the available
5221 possibilities. Prefer items not in the hash table to ones
5222 that are when they are equal cost. Note that we can never
5223 worsen an insn as the current contents will also succeed.
5224 If we find an equivalent identical to the destination, use it as best,
5225 since this insn will probably be eliminated in that case. */
5226 if (src)
5228 if (rtx_equal_p (src, dest))
5229 src_cost = -1;
5230 else
5231 src_cost = COST (src);
5234 if (src_eqv_here)
5236 if (rtx_equal_p (src_eqv_here, dest))
5237 src_eqv_cost = -1;
5238 else
5239 src_eqv_cost = COST (src_eqv_here);
5242 if (src_folded)
5244 if (rtx_equal_p (src_folded, dest))
5245 src_folded_cost = -1;
5246 else
5247 src_folded_cost = COST (src_folded);
5250 if (src_related)
5252 if (rtx_equal_p (src_related, dest))
5253 src_related_cost = -1;
5254 else
5255 src_related_cost = COST (src_related);
5258 /* If this was an indirect jump insn, a known label will really be
5259 cheaper even though it looks more expensive. */
5260 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5261 src_folded = src_const, src_folded_cost = -1;
5263 /* Terminate loop when replacement made. This must terminate since
5264 the current contents will be tested and will always be valid. */
5265 while (1)
5267 rtx trial, old_src;
5269 /* Skip invalid entries. */
5270 while (elt && GET_CODE (elt->exp) != REG
5271 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5272 elt = elt->next_same_value;
5274 /* A paradoxical subreg would be bad here: it'll be the right
5275 size, but later may be adjusted so that the upper bits aren't
5276 what we want. So reject it. */
5277 if (elt != 0
5278 && GET_CODE (elt->exp) == SUBREG
5279 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5280 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5281 /* It is okay, though, if the rtx we're trying to match
5282 will ignore any of the bits we can't predict. */
5283 && ! (src != 0
5284 && GET_CODE (src) == SUBREG
5285 && GET_MODE (src) == GET_MODE (elt->exp)
5286 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5287 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5289 elt = elt->next_same_value;
5290 continue;
5293 if (elt) src_elt_cost = elt->cost;
5295 /* Find cheapest and skip it for the next time. For items
5296 of equal cost, use this order:
5297 src_folded, src, src_eqv, src_related and hash table entry. */
5298 if (src_folded_cost <= src_cost
5299 && src_folded_cost <= src_eqv_cost
5300 && src_folded_cost <= src_related_cost
5301 && src_folded_cost <= src_elt_cost)
5303 trial = src_folded, src_folded_cost = 10000;
5304 if (src_folded_force_flag)
5305 trial = force_const_mem (mode, trial);
5307 else if (src_cost <= src_eqv_cost
5308 && src_cost <= src_related_cost
5309 && src_cost <= src_elt_cost)
5310 trial = src, src_cost = 10000;
5311 else if (src_eqv_cost <= src_related_cost
5312 && src_eqv_cost <= src_elt_cost)
5313 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5314 else if (src_related_cost <= src_elt_cost)
5315 trial = copy_rtx (src_related), src_related_cost = 10000;
5316 else
5318 trial = copy_rtx (elt->exp);
5319 elt = elt->next_same_value;
5320 src_elt_cost = 10000;
5323 /* We don't normally have an insn matching (set (pc) (pc)), so
5324 check for this separately here. We will delete such an
5325 insn below.
5327 Tablejump insns contain a USE of the table, so simply replacing
5328 the operand with the constant won't match. This is simply an
5329 unconditional branch, however, and is therefore valid. Just
5330 insert the substitution here and we will delete and re-emit
5331 the insn later. */
5333 /* Keep track of the original SET_SRC so that we can fix notes
5334 on libcall instructions. */
5335 old_src = SET_SRC (sets[i].rtl);
5337 if (n_sets == 1 && dest == pc_rtx
5338 && (trial == pc_rtx
5339 || (GET_CODE (trial) == LABEL_REF
5340 && ! condjump_p (insn))))
5342 /* If TRIAL is a label in front of a jump table, we are
5343 really falling through the switch (this is how casesi
5344 insns work), so we must branch around the table. */
5345 if (GET_CODE (trial) == CODE_LABEL
5346 && NEXT_INSN (trial) != 0
5347 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
5348 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
5349 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
5351 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
5353 SET_SRC (sets[i].rtl) = trial;
5354 cse_jumps_altered = 1;
5355 break;
5358 /* Look for a substitution that makes a valid insn. */
5359 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5361 /* If we just made a substitution inside a libcall, then we
5362 need to make the same substitution in any notes attached
5363 to the RETVAL insn. */
5364 if (libcall_insn
5365 && (GET_CODE (old_src) == REG
5366 || GET_CODE (old_src) == SUBREG
5367 || GET_CODE (old_src) == MEM))
5368 replace_rtx (REG_NOTES (libcall_insn), old_src,
5369 canon_reg (SET_SRC (sets[i].rtl), insn));
5371 /* The result of apply_change_group can be ignored; see
5372 canon_reg. */
5374 validate_change (insn, &SET_SRC (sets[i].rtl),
5375 canon_reg (SET_SRC (sets[i].rtl), insn),
5377 apply_change_group ();
5378 break;
5381 /* If we previously found constant pool entries for
5382 constants and this is a constant, try making a
5383 pool entry. Put it in src_folded unless we already have done
5384 this since that is where it likely came from. */
5386 else if (constant_pool_entries_cost
5387 && CONSTANT_P (trial)
5388 && ! (GET_CODE (trial) == CONST
5389 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5390 && (src_folded == 0
5391 || (GET_CODE (src_folded) != MEM
5392 && ! src_folded_force_flag))
5393 && GET_MODE_CLASS (mode) != MODE_CC
5394 && mode != VOIDmode)
5396 src_folded_force_flag = 1;
5397 src_folded = trial;
5398 src_folded_cost = constant_pool_entries_cost;
5402 src = SET_SRC (sets[i].rtl);
5404 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5405 However, there is an important exception: If both are registers
5406 that are not the head of their equivalence class, replace SET_SRC
5407 with the head of the class. If we do not do this, we will have
5408 both registers live over a portion of the basic block. This way,
5409 their lifetimes will likely abut instead of overlapping. */
5410 if (GET_CODE (dest) == REG
5411 && REGNO_QTY_VALID_P (REGNO (dest))
5412 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
5413 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
5414 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5415 /* Don't do this if the original insn had a hard reg as
5416 SET_SRC or SET_DEST. */
5417 && (GET_CODE (sets[i].src) != REG
5418 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5419 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5420 /* We can't call canon_reg here because it won't do anything if
5421 SRC is a hard register. */
5423 int first = qty_first_reg[REG_QTY (REGNO (src))];
5424 rtx new_src
5425 = (first >= FIRST_PSEUDO_REGISTER
5426 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5428 /* We must use validate-change even for this, because this
5429 might be a special no-op instruction, suitable only to
5430 tag notes onto. */
5431 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5433 src = new_src;
5434 /* If we had a constant that is cheaper than what we are now
5435 setting SRC to, use that constant. We ignored it when we
5436 thought we could make this into a no-op. */
5437 if (src_const && COST (src_const) < COST (src)
5438 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5440 src = src_const;
5444 /* If we made a change, recompute SRC values. */
5445 if (src != sets[i].src)
5447 do_not_record = 0;
5448 hash_arg_in_memory = 0;
5449 sets[i].src = src;
5450 sets[i].src_hash = HASH (src, mode);
5451 sets[i].src_volatile = do_not_record;
5452 sets[i].src_in_memory = hash_arg_in_memory;
5453 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5456 /* If this is a single SET, we are setting a register, and we have an
5457 equivalent constant, we want to add a REG_NOTE. We don't want
5458 to write a REG_EQUAL note for a constant pseudo since verifying that
5459 that pseudo hasn't been eliminated is a pain. Such a note also
5460 won't help anything.
5462 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5463 which can be created for a reference to a compile time computable
5464 entry in a jump table. */
5466 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5467 && GET_CODE (src_const) != REG
5468 && ! (GET_CODE (src_const) == CONST
5469 && GET_CODE (XEXP (src_const, 0)) == MINUS
5470 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5471 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5473 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5475 /* Make sure that the rtx is not shared with any other insn. */
5476 src_const = copy_rtx (src_const);
5478 /* Record the actual constant value in a REG_EQUAL note, making
5479 a new one if one does not already exist. */
5480 if (tem)
5481 XEXP (tem, 0) = src_const;
5482 else
5483 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5484 src_const, REG_NOTES (insn));
5486 /* If storing a constant value in a register that
5487 previously held the constant value 0,
5488 record this fact with a REG_WAS_0 note on this insn.
5490 Note that the *register* is required to have previously held 0,
5491 not just any register in the quantity and we must point to the
5492 insn that set that register to zero.
5494 Rather than track each register individually, we just see if
5495 the last set for this quantity was for this register. */
5497 if (REGNO_QTY_VALID_P (REGNO (dest))
5498 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
5500 /* See if we previously had a REG_WAS_0 note. */
5501 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5502 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
5504 if ((tem = single_set (const_insn)) != 0
5505 && rtx_equal_p (SET_DEST (tem), dest))
5507 if (note)
5508 XEXP (note, 0) = const_insn;
5509 else
5510 REG_NOTES (insn)
5511 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5512 REG_NOTES (insn));
5517 /* Now deal with the destination. */
5518 do_not_record = 0;
5520 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5521 to the MEM or REG within it. */
5522 while (GET_CODE (dest) == SIGN_EXTRACT
5523 || GET_CODE (dest) == ZERO_EXTRACT
5524 || GET_CODE (dest) == SUBREG
5525 || GET_CODE (dest) == STRICT_LOW_PART)
5526 dest = XEXP (dest, 0);
5528 sets[i].inner_dest = dest;
5530 if (GET_CODE (dest) == MEM)
5532 #ifdef PUSH_ROUNDING
5533 /* Stack pushes invalidate the stack pointer. */
5534 rtx addr = XEXP (dest, 0);
5535 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5536 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5537 && XEXP (addr, 0) == stack_pointer_rtx)
5538 invalidate (stack_pointer_rtx, Pmode);
5539 #endif
5540 dest = fold_rtx (dest, insn);
5543 /* Compute the hash code of the destination now,
5544 before the effects of this instruction are recorded,
5545 since the register values used in the address computation
5546 are those before this instruction. */
5547 sets[i].dest_hash = HASH (dest, mode);
5549 /* Don't enter a bit-field in the hash table
5550 because the value in it after the store
5551 may not equal what was stored, due to truncation. */
5553 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5554 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5556 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5558 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5559 && GET_CODE (width) == CONST_INT
5560 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5561 && ! (INTVAL (src_const)
5562 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5563 /* Exception: if the value is constant,
5564 and it won't be truncated, record it. */
5566 else
5568 /* This is chosen so that the destination will be invalidated
5569 but no new value will be recorded.
5570 We must invalidate because sometimes constant
5571 values can be recorded for bitfields. */
5572 sets[i].src_elt = 0;
5573 sets[i].src_volatile = 1;
5574 src_eqv = 0;
5575 src_eqv_elt = 0;
5579 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5580 the insn. */
5581 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5583 /* One less use of the label this insn used to jump to. */
5584 if (JUMP_LABEL (insn) != 0)
5585 --LABEL_NUSES (JUMP_LABEL (insn));
5586 PUT_CODE (insn, NOTE);
5587 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5588 NOTE_SOURCE_FILE (insn) = 0;
5589 cse_jumps_altered = 1;
5590 /* No more processing for this set. */
5591 sets[i].rtl = 0;
5594 /* If this SET is now setting PC to a label, we know it used to
5595 be a conditional or computed branch. So we see if we can follow
5596 it. If it was a computed branch, delete it and re-emit. */
5597 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5599 /* If this is not in the format for a simple branch and
5600 we are the only SET in it, re-emit it. */
5601 if (! simplejump_p (insn) && n_sets == 1)
5603 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5604 JUMP_LABEL (new) = XEXP (src, 0);
5605 LABEL_NUSES (XEXP (src, 0))++;
5606 insn = new;
5608 else
5609 /* Otherwise, force rerecognition, since it probably had
5610 a different pattern before.
5611 This shouldn't really be necessary, since whatever
5612 changed the source value above should have done this.
5613 Until the right place is found, might as well do this here. */
5614 INSN_CODE (insn) = -1;
5616 never_reached_warning (insn);
5618 /* Now emit a BARRIER after the unconditional jump. Do not bother
5619 deleting any unreachable code, let jump/flow do that. */
5620 if (NEXT_INSN (insn) != 0
5621 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5622 emit_barrier_after (insn);
5624 cse_jumps_altered = 1;
5625 sets[i].rtl = 0;
5628 /* If destination is volatile, invalidate it and then do no further
5629 processing for this assignment. */
5631 else if (do_not_record)
5633 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5634 || GET_CODE (dest) == MEM)
5635 invalidate (dest, VOIDmode);
5636 else if (GET_CODE (dest) == STRICT_LOW_PART
5637 || GET_CODE (dest) == ZERO_EXTRACT)
5638 invalidate (XEXP (dest, 0), GET_MODE (dest));
5639 sets[i].rtl = 0;
5642 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5643 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5645 #ifdef HAVE_cc0
5646 /* If setting CC0, record what it was set to, or a constant, if it
5647 is equivalent to a constant. If it is being set to a floating-point
5648 value, make a COMPARE with the appropriate constant of 0. If we
5649 don't do this, later code can interpret this as a test against
5650 const0_rtx, which can cause problems if we try to put it into an
5651 insn as a floating-point operand. */
5652 if (dest == cc0_rtx)
5654 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5655 this_insn_cc0_mode = mode;
5656 if (FLOAT_MODE_P (mode))
5657 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5658 CONST0_RTX (mode));
5660 #endif
5663 /* Now enter all non-volatile source expressions in the hash table
5664 if they are not already present.
5665 Record their equivalence classes in src_elt.
5666 This way we can insert the corresponding destinations into
5667 the same classes even if the actual sources are no longer in them
5668 (having been invalidated). */
5670 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5671 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5673 register struct table_elt *elt;
5674 register struct table_elt *classp = sets[0].src_elt;
5675 rtx dest = SET_DEST (sets[0].rtl);
5676 enum machine_mode eqvmode = GET_MODE (dest);
5678 if (GET_CODE (dest) == STRICT_LOW_PART)
5680 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5681 classp = 0;
5683 if (insert_regs (src_eqv, classp, 0))
5685 rehash_using_reg (src_eqv);
5686 src_eqv_hash = HASH (src_eqv, eqvmode);
5688 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5689 elt->in_memory = src_eqv_in_memory;
5690 src_eqv_elt = elt;
5692 /* Check to see if src_eqv_elt is the same as a set source which
5693 does not yet have an elt, and if so set the elt of the set source
5694 to src_eqv_elt. */
5695 for (i = 0; i < n_sets; i++)
5696 if (sets[i].rtl && sets[i].src_elt == 0
5697 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5698 sets[i].src_elt = src_eqv_elt;
5701 for (i = 0; i < n_sets; i++)
5702 if (sets[i].rtl && ! sets[i].src_volatile
5703 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5705 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5707 /* REG_EQUAL in setting a STRICT_LOW_PART
5708 gives an equivalent for the entire destination register,
5709 not just for the subreg being stored in now.
5710 This is a more interesting equivalence, so we arrange later
5711 to treat the entire reg as the destination. */
5712 sets[i].src_elt = src_eqv_elt;
5713 sets[i].src_hash = src_eqv_hash;
5715 else
5717 /* Insert source and constant equivalent into hash table, if not
5718 already present. */
5719 register struct table_elt *classp = src_eqv_elt;
5720 register rtx src = sets[i].src;
5721 register rtx dest = SET_DEST (sets[i].rtl);
5722 enum machine_mode mode
5723 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5725 if (sets[i].src_elt == 0)
5727 /* Don't put a hard register source into the table if this is
5728 the last insn of a libcall. In this case, we only need
5729 to put src_eqv_elt in src_elt. */
5730 if (GET_CODE (src) != REG
5731 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5732 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5734 register struct table_elt *elt;
5736 /* Note that these insert_regs calls cannot remove
5737 any of the src_elt's, because they would have failed to
5738 match if not still valid. */
5739 if (insert_regs (src, classp, 0))
5741 rehash_using_reg (src);
5742 sets[i].src_hash = HASH (src, mode);
5744 elt = insert (src, classp, sets[i].src_hash, mode);
5745 elt->in_memory = sets[i].src_in_memory;
5746 sets[i].src_elt = classp = elt;
5748 else
5749 sets[i].src_elt = classp;
5751 if (sets[i].src_const && sets[i].src_const_elt == 0
5752 && src != sets[i].src_const
5753 && ! rtx_equal_p (sets[i].src_const, src))
5754 sets[i].src_elt = insert (sets[i].src_const, classp,
5755 sets[i].src_const_hash, mode);
5758 else if (sets[i].src_elt == 0)
5759 /* If we did not insert the source into the hash table (e.g., it was
5760 volatile), note the equivalence class for the REG_EQUAL value, if any,
5761 so that the destination goes into that class. */
5762 sets[i].src_elt = src_eqv_elt;
5764 invalidate_from_clobbers (x);
5766 /* Some registers are invalidated by subroutine calls. Memory is
5767 invalidated by non-constant calls. */
5769 if (GET_CODE (insn) == CALL_INSN)
5771 if (! CONST_CALL_P (insn))
5772 invalidate_memory ();
5773 invalidate_for_call ();
5776 /* Now invalidate everything set by this instruction.
5777 If a SUBREG or other funny destination is being set,
5778 sets[i].rtl is still nonzero, so here we invalidate the reg
5779 a part of which is being set. */
5781 for (i = 0; i < n_sets; i++)
5782 if (sets[i].rtl)
5784 /* We can't use the inner dest, because the mode associated with
5785 a ZERO_EXTRACT is significant. */
5786 register rtx dest = SET_DEST (sets[i].rtl);
5788 /* Needed for registers to remove the register from its
5789 previous quantity's chain.
5790 Needed for memory if this is a nonvarying address, unless
5791 we have just done an invalidate_memory that covers even those. */
5792 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5793 || GET_CODE (dest) == MEM)
5794 invalidate (dest, VOIDmode);
5795 else if (GET_CODE (dest) == STRICT_LOW_PART
5796 || GET_CODE (dest) == ZERO_EXTRACT)
5797 invalidate (XEXP (dest, 0), GET_MODE (dest));
5800 /* A volatile ASM invalidates everything. */
5801 if (GET_CODE (insn) == INSN
5802 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5803 && MEM_VOLATILE_P (PATTERN (insn)))
5804 flush_hash_table ();
5806 /* Make sure registers mentioned in destinations
5807 are safe for use in an expression to be inserted.
5808 This removes from the hash table
5809 any invalid entry that refers to one of these registers.
5811 We don't care about the return value from mention_regs because
5812 we are going to hash the SET_DEST values unconditionally. */
5814 for (i = 0; i < n_sets; i++)
5816 if (sets[i].rtl)
5818 rtx x = SET_DEST (sets[i].rtl);
5820 if (GET_CODE (x) != REG)
5821 mention_regs (x);
5822 else
5824 /* We used to rely on all references to a register becoming
5825 inaccessible when a register changes to a new quantity,
5826 since that changes the hash code. However, that is not
5827 safe, since after NBUCKETS new quantities we get a
5828 hash 'collision' of a register with its own invalid
5829 entries. And since SUBREGs have been changed not to
5830 change their hash code with the hash code of the register,
5831 it wouldn't work any longer at all. So we have to check
5832 for any invalid references lying around now.
5833 This code is similar to the REG case in mention_regs,
5834 but it knows that reg_tick has been incremented, and
5835 it leaves reg_in_table as -1 . */
5836 register int regno = REGNO (x);
5837 register int endregno
5838 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5839 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5840 int i;
5842 for (i = regno; i < endregno; i++)
5844 if (REG_IN_TABLE (i) >= 0)
5846 remove_invalid_refs (i);
5847 REG_IN_TABLE (i) = -1;
5854 /* We may have just removed some of the src_elt's from the hash table.
5855 So replace each one with the current head of the same class. */
5857 for (i = 0; i < n_sets; i++)
5858 if (sets[i].rtl)
5860 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5861 /* If elt was removed, find current head of same class,
5862 or 0 if nothing remains of that class. */
5864 register struct table_elt *elt = sets[i].src_elt;
5866 while (elt && elt->prev_same_value)
5867 elt = elt->prev_same_value;
5869 while (elt && elt->first_same_value == 0)
5870 elt = elt->next_same_value;
5871 sets[i].src_elt = elt ? elt->first_same_value : 0;
5875 /* Now insert the destinations into their equivalence classes. */
5877 for (i = 0; i < n_sets; i++)
5878 if (sets[i].rtl)
5880 register rtx dest = SET_DEST (sets[i].rtl);
5881 rtx inner_dest = sets[i].inner_dest;
5882 register struct table_elt *elt;
5884 /* Don't record value if we are not supposed to risk allocating
5885 floating-point values in registers that might be wider than
5886 memory. */
5887 if ((flag_float_store
5888 && GET_CODE (dest) == MEM
5889 && FLOAT_MODE_P (GET_MODE (dest)))
5890 /* Don't record BLKmode values, because we don't know the
5891 size of it, and can't be sure that other BLKmode values
5892 have the same or smaller size. */
5893 || GET_MODE (dest) == BLKmode
5894 /* Don't record values of destinations set inside a libcall block
5895 since we might delete the libcall. Things should have been set
5896 up so we won't want to reuse such a value, but we play it safe
5897 here. */
5898 || libcall_insn
5899 /* If we didn't put a REG_EQUAL value or a source into the hash
5900 table, there is no point is recording DEST. */
5901 || sets[i].src_elt == 0
5902 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5903 or SIGN_EXTEND, don't record DEST since it can cause
5904 some tracking to be wrong.
5906 ??? Think about this more later. */
5907 || (GET_CODE (dest) == SUBREG
5908 && (GET_MODE_SIZE (GET_MODE (dest))
5909 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5910 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5911 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5912 continue;
5914 /* STRICT_LOW_PART isn't part of the value BEING set,
5915 and neither is the SUBREG inside it.
5916 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5917 if (GET_CODE (dest) == STRICT_LOW_PART)
5918 dest = SUBREG_REG (XEXP (dest, 0));
5920 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5921 /* Registers must also be inserted into chains for quantities. */
5922 if (insert_regs (dest, sets[i].src_elt, 1))
5924 /* If `insert_regs' changes something, the hash code must be
5925 recalculated. */
5926 rehash_using_reg (dest);
5927 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5930 if (GET_CODE (inner_dest) == MEM
5931 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5932 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5933 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5934 Consider the case in which the address of the MEM is
5935 passed to a function, which alters the MEM. Then, if we
5936 later use Y instead of the MEM we'll miss the update. */
5937 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5938 else
5939 elt = insert (dest, sets[i].src_elt,
5940 sets[i].dest_hash, GET_MODE (dest));
5942 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5943 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5944 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5945 0))));
5947 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5948 narrower than M2, and both M1 and M2 are the same number of words,
5949 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5950 make that equivalence as well.
5952 However, BAR may have equivalences for which gen_lowpart_if_possible
5953 will produce a simpler value than gen_lowpart_if_possible applied to
5954 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5955 BAR's equivalences. If we don't get a simplified form, make
5956 the SUBREG. It will not be used in an equivalence, but will
5957 cause two similar assignments to be detected.
5959 Note the loop below will find SUBREG_REG (DEST) since we have
5960 already entered SRC and DEST of the SET in the table. */
5962 if (GET_CODE (dest) == SUBREG
5963 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5964 / UNITS_PER_WORD)
5965 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
5966 && (GET_MODE_SIZE (GET_MODE (dest))
5967 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5968 && sets[i].src_elt != 0)
5970 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5971 struct table_elt *elt, *classp = 0;
5973 for (elt = sets[i].src_elt->first_same_value; elt;
5974 elt = elt->next_same_value)
5976 rtx new_src = 0;
5977 unsigned src_hash;
5978 struct table_elt *src_elt;
5980 /* Ignore invalid entries. */
5981 if (GET_CODE (elt->exp) != REG
5982 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5983 continue;
5985 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
5986 if (new_src == 0)
5987 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
5989 src_hash = HASH (new_src, new_mode);
5990 src_elt = lookup (new_src, src_hash, new_mode);
5992 /* Put the new source in the hash table is if isn't
5993 already. */
5994 if (src_elt == 0)
5996 if (insert_regs (new_src, classp, 0))
5998 rehash_using_reg (new_src);
5999 src_hash = HASH (new_src, new_mode);
6001 src_elt = insert (new_src, classp, src_hash, new_mode);
6002 src_elt->in_memory = elt->in_memory;
6004 else if (classp && classp != src_elt->first_same_value)
6005 /* Show that two things that we've seen before are
6006 actually the same. */
6007 merge_equiv_classes (src_elt, classp);
6009 classp = src_elt->first_same_value;
6010 /* Ignore invalid entries. */
6011 while (classp
6012 && GET_CODE (classp->exp) != REG
6013 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6014 classp = classp->next_same_value;
6019 /* Special handling for (set REG0 REG1)
6020 where REG0 is the "cheapest", cheaper than REG1.
6021 After cse, REG1 will probably not be used in the sequel,
6022 so (if easily done) change this insn to (set REG1 REG0) and
6023 replace REG1 with REG0 in the previous insn that computed their value.
6024 Then REG1 will become a dead store and won't cloud the situation
6025 for later optimizations.
6027 Do not make this change if REG1 is a hard register, because it will
6028 then be used in the sequel and we may be changing a two-operand insn
6029 into a three-operand insn.
6031 Also do not do this if we are operating on a copy of INSN.
6033 Also don't do this if INSN ends a libcall; this would cause an unrelated
6034 register to be set in the middle of a libcall, and we then get bad code
6035 if the libcall is deleted. */
6037 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6038 && NEXT_INSN (PREV_INSN (insn)) == insn
6039 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6040 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6041 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
6042 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
6043 == REGNO (SET_DEST (sets[0].rtl)))
6044 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6046 rtx prev = PREV_INSN (insn);
6047 while (prev && GET_CODE (prev) == NOTE)
6048 prev = PREV_INSN (prev);
6050 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
6051 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6053 rtx dest = SET_DEST (sets[0].rtl);
6054 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
6056 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
6057 validate_change (insn, & SET_DEST (sets[0].rtl),
6058 SET_SRC (sets[0].rtl), 1);
6059 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
6060 apply_change_group ();
6062 /* If REG1 was equivalent to a constant, REG0 is not. */
6063 if (note)
6064 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6066 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6067 any REG_WAS_0 note on INSN to PREV. */
6068 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6069 if (note)
6070 remove_note (prev, note);
6072 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6073 if (note)
6075 remove_note (insn, note);
6076 XEXP (note, 1) = REG_NOTES (prev);
6077 REG_NOTES (prev) = note;
6080 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
6081 then we must delete it, because the value in REG0 has changed. */
6082 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6083 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
6084 remove_note (insn, note);
6088 /* If this is a conditional jump insn, record any known equivalences due to
6089 the condition being tested. */
6091 last_jump_equiv_class = 0;
6092 if (GET_CODE (insn) == JUMP_INSN
6093 && n_sets == 1 && GET_CODE (x) == SET
6094 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6095 record_jump_equiv (insn, 0);
6097 #ifdef HAVE_cc0
6098 /* If the previous insn set CC0 and this insn no longer references CC0,
6099 delete the previous insn. Here we use the fact that nothing expects CC0
6100 to be valid over an insn, which is true until the final pass. */
6101 if (prev_insn && GET_CODE (prev_insn) == INSN
6102 && (tem = single_set (prev_insn)) != 0
6103 && SET_DEST (tem) == cc0_rtx
6104 && ! reg_mentioned_p (cc0_rtx, x))
6106 PUT_CODE (prev_insn, NOTE);
6107 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6108 NOTE_SOURCE_FILE (prev_insn) = 0;
6111 prev_insn_cc0 = this_insn_cc0;
6112 prev_insn_cc0_mode = this_insn_cc0_mode;
6113 #endif
6115 prev_insn = insn;
6118 /* Remove from the hash table all expressions that reference memory. */
6120 static void
6121 invalidate_memory ()
6123 register int i;
6124 register struct table_elt *p, *next;
6126 for (i = 0; i < NBUCKETS; i++)
6127 for (p = table[i]; p; p = next)
6129 next = p->next_same_hash;
6130 if (p->in_memory)
6131 remove_from_table (p, i);
6135 #ifdef AUTO_INC_DEC
6137 /* If ADDR is an address that implicitly affects the stack pointer, return
6138 1 and update the register tables to show the effect. Else, return 0. */
6140 static int
6141 addr_affects_sp_p (addr)
6142 register rtx addr;
6144 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6145 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6146 && GET_CODE (XEXP (addr, 0)) == REG
6147 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6149 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6150 REG_TICK (STACK_POINTER_REGNUM)++;
6152 /* This should be *very* rare. */
6153 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6154 invalidate (stack_pointer_rtx, VOIDmode);
6156 return 1;
6159 return 0;
6161 #endif
6163 /* Perform invalidation on the basis of everything about an insn
6164 except for invalidating the actual places that are SET in it.
6165 This includes the places CLOBBERed, and anything that might
6166 alias with something that is SET or CLOBBERed.
6168 X is the pattern of the insn. */
6170 static void
6171 invalidate_from_clobbers (x)
6172 rtx x;
6174 if (GET_CODE (x) == CLOBBER)
6176 rtx ref = XEXP (x, 0);
6177 if (ref)
6179 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6180 || GET_CODE (ref) == MEM)
6181 invalidate (ref, VOIDmode);
6182 else if (GET_CODE (ref) == STRICT_LOW_PART
6183 || GET_CODE (ref) == ZERO_EXTRACT)
6184 invalidate (XEXP (ref, 0), GET_MODE (ref));
6187 else if (GET_CODE (x) == PARALLEL)
6189 register int i;
6190 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6192 register rtx y = XVECEXP (x, 0, i);
6193 if (GET_CODE (y) == CLOBBER)
6195 rtx ref = XEXP (y, 0);
6196 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6197 || GET_CODE (ref) == MEM)
6198 invalidate (ref, VOIDmode);
6199 else if (GET_CODE (ref) == STRICT_LOW_PART
6200 || GET_CODE (ref) == ZERO_EXTRACT)
6201 invalidate (XEXP (ref, 0), GET_MODE (ref));
6207 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6208 and replace any registers in them with either an equivalent constant
6209 or the canonical form of the register. If we are inside an address,
6210 only do this if the address remains valid.
6212 OBJECT is 0 except when within a MEM in which case it is the MEM.
6214 Return the replacement for X. */
6216 static rtx
6217 cse_process_notes (x, object)
6218 rtx x;
6219 rtx object;
6221 enum rtx_code code = GET_CODE (x);
6222 const char *fmt = GET_RTX_FORMAT (code);
6223 int i;
6225 switch (code)
6227 case CONST_INT:
6228 case CONST:
6229 case SYMBOL_REF:
6230 case LABEL_REF:
6231 case CONST_DOUBLE:
6232 case PC:
6233 case CC0:
6234 case LO_SUM:
6235 return x;
6237 case MEM:
6238 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6239 return x;
6241 case EXPR_LIST:
6242 case INSN_LIST:
6243 if (REG_NOTE_KIND (x) == REG_EQUAL)
6244 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6245 if (XEXP (x, 1))
6246 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6247 return x;
6249 case SIGN_EXTEND:
6250 case ZERO_EXTEND:
6251 case SUBREG:
6253 rtx new = cse_process_notes (XEXP (x, 0), object);
6254 /* We don't substitute VOIDmode constants into these rtx,
6255 since they would impede folding. */
6256 if (GET_MODE (new) != VOIDmode)
6257 validate_change (object, &XEXP (x, 0), new, 0);
6258 return x;
6261 case REG:
6262 i = REG_QTY (REGNO (x));
6264 /* Return a constant or a constant register. */
6265 if (REGNO_QTY_VALID_P (REGNO (x))
6266 && qty_const[i] != 0
6267 && (CONSTANT_P (qty_const[i])
6268 || GET_CODE (qty_const[i]) == REG))
6270 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
6271 if (new)
6272 return new;
6275 /* Otherwise, canonicalize this register. */
6276 return canon_reg (x, NULL_RTX);
6278 default:
6279 break;
6282 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6283 if (fmt[i] == 'e')
6284 validate_change (object, &XEXP (x, i),
6285 cse_process_notes (XEXP (x, i), object), 0);
6287 return x;
6290 /* Find common subexpressions between the end test of a loop and the beginning
6291 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6293 Often we have a loop where an expression in the exit test is used
6294 in the body of the loop. For example "while (*p) *q++ = *p++;".
6295 Because of the way we duplicate the loop exit test in front of the loop,
6296 however, we don't detect that common subexpression. This will be caught
6297 when global cse is implemented, but this is a quite common case.
6299 This function handles the most common cases of these common expressions.
6300 It is called after we have processed the basic block ending with the
6301 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6302 jumps to a label used only once. */
6304 static void
6305 cse_around_loop (loop_start)
6306 rtx loop_start;
6308 rtx insn;
6309 int i;
6310 struct table_elt *p;
6312 /* If the jump at the end of the loop doesn't go to the start, we don't
6313 do anything. */
6314 for (insn = PREV_INSN (loop_start);
6315 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6316 insn = PREV_INSN (insn))
6319 if (insn == 0
6320 || GET_CODE (insn) != NOTE
6321 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6322 return;
6324 /* If the last insn of the loop (the end test) was an NE comparison,
6325 we will interpret it as an EQ comparison, since we fell through
6326 the loop. Any equivalences resulting from that comparison are
6327 therefore not valid and must be invalidated. */
6328 if (last_jump_equiv_class)
6329 for (p = last_jump_equiv_class->first_same_value; p;
6330 p = p->next_same_value)
6332 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6333 || (GET_CODE (p->exp) == SUBREG
6334 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6335 invalidate (p->exp, VOIDmode);
6336 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6337 || GET_CODE (p->exp) == ZERO_EXTRACT)
6338 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6341 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6342 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6344 The only thing we do with SET_DEST is invalidate entries, so we
6345 can safely process each SET in order. It is slightly less efficient
6346 to do so, but we only want to handle the most common cases.
6348 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6349 These pseudos won't have valid entries in any of the tables indexed
6350 by register number, such as reg_qty. We avoid out-of-range array
6351 accesses by not processing any instructions created after cse started. */
6353 for (insn = NEXT_INSN (loop_start);
6354 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6355 && INSN_UID (insn) < max_insn_uid
6356 && ! (GET_CODE (insn) == NOTE
6357 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6358 insn = NEXT_INSN (insn))
6360 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6361 && (GET_CODE (PATTERN (insn)) == SET
6362 || GET_CODE (PATTERN (insn)) == CLOBBER))
6363 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6364 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6365 && GET_CODE (PATTERN (insn)) == PARALLEL)
6366 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6367 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6368 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6369 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6370 loop_start);
6374 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6375 since they are done elsewhere. This function is called via note_stores. */
6377 static void
6378 invalidate_skipped_set (dest, set, data)
6379 rtx set;
6380 rtx dest;
6381 void *data ATTRIBUTE_UNUSED;
6383 enum rtx_code code = GET_CODE (dest);
6385 if (code == MEM
6386 #ifdef AUTO_INC_DEC
6387 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6388 #endif
6389 /* There are times when an address can appear varying and be a PLUS
6390 during this scan when it would be a fixed address were we to know
6391 the proper equivalences. So invalidate all memory if there is
6392 a BLKmode or nonscalar memory reference or a reference to a
6393 variable address. */
6394 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6395 || cse_rtx_varies_p (XEXP (dest, 0))))
6397 invalidate_memory ();
6398 return;
6401 if (GET_CODE (set) == CLOBBER
6402 #ifdef HAVE_cc0
6403 || dest == cc0_rtx
6404 #endif
6405 || dest == pc_rtx)
6406 return;
6408 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6409 invalidate (XEXP (dest, 0), GET_MODE (dest));
6410 else if (code == REG || code == SUBREG || code == MEM)
6411 invalidate (dest, VOIDmode);
6414 /* Invalidate all insns from START up to the end of the function or the
6415 next label. This called when we wish to CSE around a block that is
6416 conditionally executed. */
6418 static void
6419 invalidate_skipped_block (start)
6420 rtx start;
6422 rtx insn;
6424 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6425 insn = NEXT_INSN (insn))
6427 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6428 continue;
6430 if (GET_CODE (insn) == CALL_INSN)
6432 if (! CONST_CALL_P (insn))
6433 invalidate_memory ();
6434 invalidate_for_call ();
6437 invalidate_from_clobbers (PATTERN (insn));
6438 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6442 /* If modifying X will modify the value in *DATA (which is really an
6443 `rtx *'), indicate that fact by setting the pointed to value to
6444 NULL_RTX. */
6446 static void
6447 cse_check_loop_start (x, set, data)
6448 rtx x;
6449 rtx set ATTRIBUTE_UNUSED;
6450 void *data;
6452 rtx *cse_check_loop_start_value = (rtx *) data;
6454 if (*cse_check_loop_start_value == NULL_RTX
6455 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6456 return;
6458 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6459 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6460 *cse_check_loop_start_value = NULL_RTX;
6463 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6464 a loop that starts with the label at LOOP_START.
6466 If X is a SET, we see if its SET_SRC is currently in our hash table.
6467 If so, we see if it has a value equal to some register used only in the
6468 loop exit code (as marked by jump.c).
6470 If those two conditions are true, we search backwards from the start of
6471 the loop to see if that same value was loaded into a register that still
6472 retains its value at the start of the loop.
6474 If so, we insert an insn after the load to copy the destination of that
6475 load into the equivalent register and (try to) replace our SET_SRC with that
6476 register.
6478 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6480 static void
6481 cse_set_around_loop (x, insn, loop_start)
6482 rtx x;
6483 rtx insn;
6484 rtx loop_start;
6486 struct table_elt *src_elt;
6488 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6489 are setting PC or CC0 or whose SET_SRC is already a register. */
6490 if (GET_CODE (x) == SET
6491 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6492 && GET_CODE (SET_SRC (x)) != REG)
6494 src_elt = lookup (SET_SRC (x),
6495 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6496 GET_MODE (SET_DEST (x)));
6498 if (src_elt)
6499 for (src_elt = src_elt->first_same_value; src_elt;
6500 src_elt = src_elt->next_same_value)
6501 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6502 && COST (src_elt->exp) < COST (SET_SRC (x)))
6504 rtx p, set;
6506 /* Look for an insn in front of LOOP_START that sets
6507 something in the desired mode to SET_SRC (x) before we hit
6508 a label or CALL_INSN. */
6510 for (p = prev_nonnote_insn (loop_start);
6511 p && GET_CODE (p) != CALL_INSN
6512 && GET_CODE (p) != CODE_LABEL;
6513 p = prev_nonnote_insn (p))
6514 if ((set = single_set (p)) != 0
6515 && GET_CODE (SET_DEST (set)) == REG
6516 && GET_MODE (SET_DEST (set)) == src_elt->mode
6517 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6519 /* We now have to ensure that nothing between P
6520 and LOOP_START modified anything referenced in
6521 SET_SRC (x). We know that nothing within the loop
6522 can modify it, or we would have invalidated it in
6523 the hash table. */
6524 rtx q;
6525 rtx cse_check_loop_start_value = SET_SRC (x);
6526 for (q = p; q != loop_start; q = NEXT_INSN (q))
6527 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6528 note_stores (PATTERN (q),
6529 cse_check_loop_start,
6530 &cse_check_loop_start_value);
6532 /* If nothing was changed and we can replace our
6533 SET_SRC, add an insn after P to copy its destination
6534 to what we will be replacing SET_SRC with. */
6535 if (cse_check_loop_start_value
6536 && validate_change (insn, &SET_SRC (x),
6537 src_elt->exp, 0))
6539 /* If this creates new pseudos, this is unsafe,
6540 because the regno of new pseudo is unsuitable
6541 to index into reg_qty when cse_insn processes
6542 the new insn. Therefore, if a new pseudo was
6543 created, discard this optimization. */
6544 int nregs = max_reg_num ();
6545 rtx move
6546 = gen_move_insn (src_elt->exp, SET_DEST (set));
6547 if (nregs != max_reg_num ())
6549 if (! validate_change (insn, &SET_SRC (x),
6550 SET_SRC (set), 0))
6551 abort ();
6553 else
6554 emit_insn_after (move, p);
6556 break;
6561 #ifdef AUTO_INC_DEC
6562 /* Deal with the destination of X affecting the stack pointer. */
6563 addr_affects_sp_p (SET_DEST (x));
6564 #endif
6566 /* See comment on similar code in cse_insn for explanation of these
6567 tests. */
6568 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6569 || GET_CODE (SET_DEST (x)) == MEM)
6570 invalidate (SET_DEST (x), VOIDmode);
6571 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6572 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6573 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6576 /* Find the end of INSN's basic block and return its range,
6577 the total number of SETs in all the insns of the block, the last insn of the
6578 block, and the branch path.
6580 The branch path indicates which branches should be followed. If a non-zero
6581 path size is specified, the block should be rescanned and a different set
6582 of branches will be taken. The branch path is only used if
6583 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6585 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6586 used to describe the block. It is filled in with the information about
6587 the current block. The incoming structure's branch path, if any, is used
6588 to construct the output branch path. */
6590 void
6591 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6592 rtx insn;
6593 struct cse_basic_block_data *data;
6594 int follow_jumps;
6595 int after_loop;
6596 int skip_blocks;
6598 rtx p = insn, q;
6599 int nsets = 0;
6600 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6601 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6602 int path_size = data->path_size;
6603 int path_entry = 0;
6604 int i;
6606 /* Update the previous branch path, if any. If the last branch was
6607 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6608 shorten the path by one and look at the previous branch. We know that
6609 at least one branch must have been taken if PATH_SIZE is non-zero. */
6610 while (path_size > 0)
6612 if (data->path[path_size - 1].status != NOT_TAKEN)
6614 data->path[path_size - 1].status = NOT_TAKEN;
6615 break;
6617 else
6618 path_size--;
6621 /* If the first instruction is marked with QImode, that means we've
6622 already processed this block. Our caller will look at DATA->LAST
6623 to figure out where to go next. We want to return the next block
6624 in the instruction stream, not some branched-to block somewhere
6625 else. We accomplish this by pretending our called forbid us to
6626 follow jumps, or skip blocks. */
6627 if (GET_MODE (insn) == QImode)
6628 follow_jumps = skip_blocks = 0;
6630 /* Scan to end of this basic block. */
6631 while (p && GET_CODE (p) != CODE_LABEL)
6633 /* Don't cse out the end of a loop. This makes a difference
6634 only for the unusual loops that always execute at least once;
6635 all other loops have labels there so we will stop in any case.
6636 Cse'ing out the end of the loop is dangerous because it
6637 might cause an invariant expression inside the loop
6638 to be reused after the end of the loop. This would make it
6639 hard to move the expression out of the loop in loop.c,
6640 especially if it is one of several equivalent expressions
6641 and loop.c would like to eliminate it.
6643 If we are running after loop.c has finished, we can ignore
6644 the NOTE_INSN_LOOP_END. */
6646 if (! after_loop && GET_CODE (p) == NOTE
6647 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6648 break;
6650 /* Don't cse over a call to setjmp; on some machines (eg vax)
6651 the regs restored by the longjmp come from
6652 a later time than the setjmp. */
6653 if (GET_CODE (p) == NOTE
6654 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6655 break;
6657 /* A PARALLEL can have lots of SETs in it,
6658 especially if it is really an ASM_OPERANDS. */
6659 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6660 && GET_CODE (PATTERN (p)) == PARALLEL)
6661 nsets += XVECLEN (PATTERN (p), 0);
6662 else if (GET_CODE (p) != NOTE)
6663 nsets += 1;
6665 /* Ignore insns made by CSE; they cannot affect the boundaries of
6666 the basic block. */
6668 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6669 high_cuid = INSN_CUID (p);
6670 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6671 low_cuid = INSN_CUID (p);
6673 /* See if this insn is in our branch path. If it is and we are to
6674 take it, do so. */
6675 if (path_entry < path_size && data->path[path_entry].branch == p)
6677 if (data->path[path_entry].status != NOT_TAKEN)
6678 p = JUMP_LABEL (p);
6680 /* Point to next entry in path, if any. */
6681 path_entry++;
6684 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6685 was specified, we haven't reached our maximum path length, there are
6686 insns following the target of the jump, this is the only use of the
6687 jump label, and the target label is preceded by a BARRIER.
6689 Alternatively, we can follow the jump if it branches around a
6690 block of code and there are no other branches into the block.
6691 In this case invalidate_skipped_block will be called to invalidate any
6692 registers set in the block when following the jump. */
6694 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6695 && GET_CODE (p) == JUMP_INSN
6696 && GET_CODE (PATTERN (p)) == SET
6697 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6698 && JUMP_LABEL (p) != 0
6699 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6700 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6702 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6703 if ((GET_CODE (q) != NOTE
6704 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6705 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6706 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6707 break;
6709 /* If we ran into a BARRIER, this code is an extension of the
6710 basic block when the branch is taken. */
6711 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6713 /* Don't allow ourself to keep walking around an
6714 always-executed loop. */
6715 if (next_real_insn (q) == next)
6717 p = NEXT_INSN (p);
6718 continue;
6721 /* Similarly, don't put a branch in our path more than once. */
6722 for (i = 0; i < path_entry; i++)
6723 if (data->path[i].branch == p)
6724 break;
6726 if (i != path_entry)
6727 break;
6729 data->path[path_entry].branch = p;
6730 data->path[path_entry++].status = TAKEN;
6732 /* This branch now ends our path. It was possible that we
6733 didn't see this branch the last time around (when the
6734 insn in front of the target was a JUMP_INSN that was
6735 turned into a no-op). */
6736 path_size = path_entry;
6738 p = JUMP_LABEL (p);
6739 /* Mark block so we won't scan it again later. */
6740 PUT_MODE (NEXT_INSN (p), QImode);
6742 /* Detect a branch around a block of code. */
6743 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6745 register rtx tmp;
6747 if (next_real_insn (q) == next)
6749 p = NEXT_INSN (p);
6750 continue;
6753 for (i = 0; i < path_entry; i++)
6754 if (data->path[i].branch == p)
6755 break;
6757 if (i != path_entry)
6758 break;
6760 /* This is no_labels_between_p (p, q) with an added check for
6761 reaching the end of a function (in case Q precedes P). */
6762 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6763 if (GET_CODE (tmp) == CODE_LABEL)
6764 break;
6766 if (tmp == q)
6768 data->path[path_entry].branch = p;
6769 data->path[path_entry++].status = AROUND;
6771 path_size = path_entry;
6773 p = JUMP_LABEL (p);
6774 /* Mark block so we won't scan it again later. */
6775 PUT_MODE (NEXT_INSN (p), QImode);
6779 p = NEXT_INSN (p);
6782 data->low_cuid = low_cuid;
6783 data->high_cuid = high_cuid;
6784 data->nsets = nsets;
6785 data->last = p;
6787 /* If all jumps in the path are not taken, set our path length to zero
6788 so a rescan won't be done. */
6789 for (i = path_size - 1; i >= 0; i--)
6790 if (data->path[i].status != NOT_TAKEN)
6791 break;
6793 if (i == -1)
6794 data->path_size = 0;
6795 else
6796 data->path_size = path_size;
6798 /* End the current branch path. */
6799 data->path[path_size].branch = 0;
6802 /* Perform cse on the instructions of a function.
6803 F is the first instruction.
6804 NREGS is one plus the highest pseudo-reg number used in the instruction.
6806 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6807 (only if -frerun-cse-after-loop).
6809 Returns 1 if jump_optimize should be redone due to simplifications
6810 in conditional jump instructions. */
6813 cse_main (f, nregs, after_loop, file)
6814 rtx f;
6815 int nregs;
6816 int after_loop;
6817 FILE *file;
6819 struct cse_basic_block_data val;
6820 register rtx insn = f;
6821 register int i;
6823 cse_jumps_altered = 0;
6824 recorded_label_ref = 0;
6825 constant_pool_entries_cost = 0;
6826 val.path_size = 0;
6828 init_recog ();
6829 init_alias_analysis ();
6831 max_reg = nregs;
6833 max_insn_uid = get_max_uid ();
6835 reg_next_eqv = (int *) xmalloc (nregs * sizeof (int));
6836 reg_prev_eqv = (int *) xmalloc (nregs * sizeof (int));
6838 #ifdef LOAD_EXTEND_OP
6840 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6841 and change the code and mode as appropriate. */
6842 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6843 #endif
6845 /* Discard all the free elements of the previous function
6846 since they are allocated in the temporarily obstack. */
6847 bzero ((char *) table, sizeof table);
6848 free_element_chain = 0;
6849 n_elements_made = 0;
6851 /* Find the largest uid. */
6853 max_uid = get_max_uid ();
6854 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6856 /* Compute the mapping from uids to cuids.
6857 CUIDs are numbers assigned to insns, like uids,
6858 except that cuids increase monotonically through the code.
6859 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6860 between two insns is not affected by -g. */
6862 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6864 if (GET_CODE (insn) != NOTE
6865 || NOTE_LINE_NUMBER (insn) < 0)
6866 INSN_CUID (insn) = ++i;
6867 else
6868 /* Give a line number note the same cuid as preceding insn. */
6869 INSN_CUID (insn) = i;
6872 /* Initialize which registers are clobbered by calls. */
6874 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6876 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6877 if ((call_used_regs[i]
6878 /* Used to check !fixed_regs[i] here, but that isn't safe;
6879 fixed regs are still call-clobbered, and sched can get
6880 confused if they can "live across calls".
6882 The frame pointer is always preserved across calls. The arg
6883 pointer is if it is fixed. The stack pointer usually is, unless
6884 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6885 will be present. If we are generating PIC code, the PIC offset
6886 table register is preserved across calls. */
6888 && i != STACK_POINTER_REGNUM
6889 && i != FRAME_POINTER_REGNUM
6890 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6891 && i != HARD_FRAME_POINTER_REGNUM
6892 #endif
6893 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6894 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6895 #endif
6896 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6897 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6898 #endif
6900 || global_regs[i])
6901 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6903 if (ggc_p)
6904 ggc_push_context ();
6906 /* Loop over basic blocks.
6907 Compute the maximum number of qty's needed for each basic block
6908 (which is 2 for each SET). */
6909 insn = f;
6910 while (insn)
6912 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6913 flag_cse_skip_blocks);
6915 /* If this basic block was already processed or has no sets, skip it. */
6916 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6918 PUT_MODE (insn, VOIDmode);
6919 insn = (val.last ? NEXT_INSN (val.last) : 0);
6920 val.path_size = 0;
6921 continue;
6924 cse_basic_block_start = val.low_cuid;
6925 cse_basic_block_end = val.high_cuid;
6926 max_qty = val.nsets * 2;
6928 if (file)
6929 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6930 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6931 val.nsets);
6933 /* Make MAX_QTY bigger to give us room to optimize
6934 past the end of this basic block, if that should prove useful. */
6935 if (max_qty < 500)
6936 max_qty = 500;
6938 max_qty += max_reg;
6940 /* If this basic block is being extended by following certain jumps,
6941 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6942 Otherwise, we start after this basic block. */
6943 if (val.path_size > 0)
6944 cse_basic_block (insn, val.last, val.path, 0);
6945 else
6947 int old_cse_jumps_altered = cse_jumps_altered;
6948 rtx temp;
6950 /* When cse changes a conditional jump to an unconditional
6951 jump, we want to reprocess the block, since it will give
6952 us a new branch path to investigate. */
6953 cse_jumps_altered = 0;
6954 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6955 if (cse_jumps_altered == 0
6956 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6957 insn = temp;
6959 cse_jumps_altered |= old_cse_jumps_altered;
6962 if (ggc_p)
6963 ggc_collect ();
6965 #ifdef USE_C_ALLOCA
6966 alloca (0);
6967 #endif
6970 if (ggc_p)
6971 ggc_pop_context ();
6973 /* Tell refers_to_mem_p that qty_const info is not available. */
6974 qty_const = 0;
6976 if (max_elements_made < n_elements_made)
6977 max_elements_made = n_elements_made;
6979 /* Clean up. */
6980 end_alias_analysis ();
6981 free (uid_cuid);
6982 free (reg_next_eqv);
6983 free (reg_prev_eqv);
6985 return cse_jumps_altered || recorded_label_ref;
6988 /* Process a single basic block. FROM and TO and the limits of the basic
6989 block. NEXT_BRANCH points to the branch path when following jumps or
6990 a null path when not following jumps.
6992 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
6993 loop. This is true when we are being called for the last time on a
6994 block and this CSE pass is before loop.c. */
6996 static rtx
6997 cse_basic_block (from, to, next_branch, around_loop)
6998 register rtx from, to;
6999 struct branch_path *next_branch;
7000 int around_loop;
7002 register rtx insn;
7003 int to_usage = 0;
7004 rtx libcall_insn = NULL_RTX;
7005 int num_insns = 0;
7007 /* Each of these arrays is undefined before max_reg, so only allocate
7008 the space actually needed and adjust the start below. */
7010 qty_first_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
7011 qty_last_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
7012 qty_mode = (enum machine_mode *) xmalloc ((max_qty - max_reg)
7013 * sizeof (enum machine_mode));
7014 qty_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
7015 qty_const_insn = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
7016 qty_comparison_code
7017 = (enum rtx_code *) xmalloc ((max_qty - max_reg) * sizeof (enum rtx_code));
7018 qty_comparison_qty = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
7019 qty_comparison_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
7021 qty_first_reg -= max_reg;
7022 qty_last_reg -= max_reg;
7023 qty_mode -= max_reg;
7024 qty_const -= max_reg;
7025 qty_const_insn -= max_reg;
7026 qty_comparison_code -= max_reg;
7027 qty_comparison_qty -= max_reg;
7028 qty_comparison_const -= max_reg;
7030 new_basic_block ();
7032 /* TO might be a label. If so, protect it from being deleted. */
7033 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7034 ++LABEL_NUSES (to);
7036 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7038 register enum rtx_code code = GET_CODE (insn);
7040 /* If we have processed 1,000 insns, flush the hash table to
7041 avoid extreme quadratic behavior. We must not include NOTEs
7042 in the count since there may be more or them when generating
7043 debugging information. If we clear the table at different
7044 times, code generated with -g -O might be different than code
7045 generated with -O but not -g.
7047 ??? This is a real kludge and needs to be done some other way.
7048 Perhaps for 2.9. */
7049 if (code != NOTE && num_insns++ > 1000)
7051 flush_hash_table ();
7052 num_insns = 0;
7055 /* See if this is a branch that is part of the path. If so, and it is
7056 to be taken, do so. */
7057 if (next_branch->branch == insn)
7059 enum taken status = next_branch++->status;
7060 if (status != NOT_TAKEN)
7062 if (status == TAKEN)
7063 record_jump_equiv (insn, 1);
7064 else
7065 invalidate_skipped_block (NEXT_INSN (insn));
7067 /* Set the last insn as the jump insn; it doesn't affect cc0.
7068 Then follow this branch. */
7069 #ifdef HAVE_cc0
7070 prev_insn_cc0 = 0;
7071 #endif
7072 prev_insn = insn;
7073 insn = JUMP_LABEL (insn);
7074 continue;
7078 if (GET_MODE (insn) == QImode)
7079 PUT_MODE (insn, VOIDmode);
7081 if (GET_RTX_CLASS (code) == 'i')
7083 rtx p;
7085 /* Process notes first so we have all notes in canonical forms when
7086 looking for duplicate operations. */
7088 if (REG_NOTES (insn))
7089 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7091 /* Track when we are inside in LIBCALL block. Inside such a block,
7092 we do not want to record destinations. The last insn of a
7093 LIBCALL block is not considered to be part of the block, since
7094 its destination is the result of the block and hence should be
7095 recorded. */
7097 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7098 libcall_insn = XEXP (p, 0);
7099 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7100 libcall_insn = NULL_RTX;
7102 cse_insn (insn, libcall_insn);
7105 /* If INSN is now an unconditional jump, skip to the end of our
7106 basic block by pretending that we just did the last insn in the
7107 basic block. If we are jumping to the end of our block, show
7108 that we can have one usage of TO. */
7110 if (simplejump_p (insn))
7112 if (to == 0)
7113 return 0;
7115 if (JUMP_LABEL (insn) == to)
7116 to_usage = 1;
7118 /* Maybe TO was deleted because the jump is unconditional.
7119 If so, there is nothing left in this basic block. */
7120 /* ??? Perhaps it would be smarter to set TO
7121 to whatever follows this insn,
7122 and pretend the basic block had always ended here. */
7123 if (INSN_DELETED_P (to))
7124 break;
7126 insn = PREV_INSN (to);
7129 /* See if it is ok to keep on going past the label
7130 which used to end our basic block. Remember that we incremented
7131 the count of that label, so we decrement it here. If we made
7132 a jump unconditional, TO_USAGE will be one; in that case, we don't
7133 want to count the use in that jump. */
7135 if (to != 0 && NEXT_INSN (insn) == to
7136 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7138 struct cse_basic_block_data val;
7139 rtx prev;
7141 insn = NEXT_INSN (to);
7143 /* If TO was the last insn in the function, we are done. */
7144 if (insn == 0)
7145 return 0;
7147 /* If TO was preceded by a BARRIER we are done with this block
7148 because it has no continuation. */
7149 prev = prev_nonnote_insn (to);
7150 if (prev && GET_CODE (prev) == BARRIER)
7151 return insn;
7153 /* Find the end of the following block. Note that we won't be
7154 following branches in this case. */
7155 to_usage = 0;
7156 val.path_size = 0;
7157 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7159 /* If the tables we allocated have enough space left
7160 to handle all the SETs in the next basic block,
7161 continue through it. Otherwise, return,
7162 and that block will be scanned individually. */
7163 if (val.nsets * 2 + next_qty > max_qty)
7164 break;
7166 cse_basic_block_start = val.low_cuid;
7167 cse_basic_block_end = val.high_cuid;
7168 to = val.last;
7170 /* Prevent TO from being deleted if it is a label. */
7171 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7172 ++LABEL_NUSES (to);
7174 /* Back up so we process the first insn in the extension. */
7175 insn = PREV_INSN (insn);
7179 if (next_qty > max_qty)
7180 abort ();
7182 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7183 the previous insn is the only insn that branches to the head of a loop,
7184 we can cse into the loop. Don't do this if we changed the jump
7185 structure of a loop unless we aren't going to be following jumps. */
7187 if ((cse_jumps_altered == 0
7188 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7189 && around_loop && to != 0
7190 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7191 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7192 && JUMP_LABEL (PREV_INSN (to)) != 0
7193 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7194 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7196 free (qty_first_reg + max_reg);
7197 free (qty_last_reg + max_reg);
7198 free (qty_mode + max_reg);
7199 free (qty_const + max_reg);
7200 free (qty_const_insn + max_reg);
7201 free (qty_comparison_code + max_reg);
7202 free (qty_comparison_qty + max_reg);
7203 free (qty_comparison_const + max_reg);
7205 return to ? NEXT_INSN (to) : 0;
7208 /* Count the number of times registers are used (not set) in X.
7209 COUNTS is an array in which we accumulate the count, INCR is how much
7210 we count each register usage.
7212 Don't count a usage of DEST, which is the SET_DEST of a SET which
7213 contains X in its SET_SRC. This is because such a SET does not
7214 modify the liveness of DEST. */
7216 static void
7217 count_reg_usage (x, counts, dest, incr)
7218 rtx x;
7219 int *counts;
7220 rtx dest;
7221 int incr;
7223 enum rtx_code code;
7224 const char *fmt;
7225 int i, j;
7227 if (x == 0)
7228 return;
7230 switch (code = GET_CODE (x))
7232 case REG:
7233 if (x != dest)
7234 counts[REGNO (x)] += incr;
7235 return;
7237 case PC:
7238 case CC0:
7239 case CONST:
7240 case CONST_INT:
7241 case CONST_DOUBLE:
7242 case SYMBOL_REF:
7243 case LABEL_REF:
7244 return;
7246 case CLOBBER:
7247 /* If we are clobbering a MEM, mark any registers inside the address
7248 as being used. */
7249 if (GET_CODE (XEXP (x, 0)) == MEM)
7250 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7251 return;
7253 case SET:
7254 /* Unless we are setting a REG, count everything in SET_DEST. */
7255 if (GET_CODE (SET_DEST (x)) != REG)
7256 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7258 /* If SRC has side-effects, then we can't delete this insn, so the
7259 usage of SET_DEST inside SRC counts.
7261 ??? Strictly-speaking, we might be preserving this insn
7262 because some other SET has side-effects, but that's hard
7263 to do and can't happen now. */
7264 count_reg_usage (SET_SRC (x), counts,
7265 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7266 incr);
7267 return;
7269 case CALL_INSN:
7270 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7272 /* ... falls through ... */
7273 case INSN:
7274 case JUMP_INSN:
7275 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7277 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7278 use them. */
7280 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7281 return;
7283 case EXPR_LIST:
7284 case INSN_LIST:
7285 if (REG_NOTE_KIND (x) == REG_EQUAL
7286 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7287 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7288 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7289 return;
7291 default:
7292 break;
7295 fmt = GET_RTX_FORMAT (code);
7296 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7298 if (fmt[i] == 'e')
7299 count_reg_usage (XEXP (x, i), counts, dest, incr);
7300 else if (fmt[i] == 'E')
7301 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7302 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7306 /* Scan all the insns and delete any that are dead; i.e., they store a register
7307 that is never used or they copy a register to itself.
7309 This is used to remove insns made obviously dead by cse, loop or other
7310 optimizations. It improves the heuristics in loop since it won't try to
7311 move dead invariants out of loops or make givs for dead quantities. The
7312 remaining passes of the compilation are also sped up. */
7314 void
7315 delete_trivially_dead_insns (insns, nreg)
7316 rtx insns;
7317 int nreg;
7319 int *counts;
7320 rtx insn, prev;
7321 #ifdef HAVE_cc0
7322 rtx tem;
7323 #endif
7324 int i;
7325 int in_libcall = 0, dead_libcall = 0;
7327 /* First count the number of times each register is used. */
7328 counts = (int *) xcalloc (nreg, sizeof (int));
7329 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7330 count_reg_usage (insn, counts, NULL_RTX, 1);
7332 /* Go from the last insn to the first and delete insns that only set unused
7333 registers or copy a register to itself. As we delete an insn, remove
7334 usage counts for registers it uses.
7336 The first jump optimization pass may leave a real insn as the last
7337 insn in the function. We must not skip that insn or we may end
7338 up deleting code that is not really dead. */
7339 insn = get_last_insn ();
7340 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7341 insn = prev_real_insn (insn);
7343 for ( ; insn; insn = prev)
7345 int live_insn = 0;
7346 rtx note;
7348 prev = prev_real_insn (insn);
7350 /* Don't delete any insns that are part of a libcall block unless
7351 we can delete the whole libcall block.
7353 Flow or loop might get confused if we did that. Remember
7354 that we are scanning backwards. */
7355 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7357 in_libcall = 1;
7358 live_insn = 1;
7359 dead_libcall = 0;
7361 /* See if there's a REG_EQUAL note on this insn and try to
7362 replace the source with the REG_EQUAL expression.
7364 We assume that insns with REG_RETVALs can only be reg->reg
7365 copies at this point. */
7366 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7367 if (note)
7369 rtx set = single_set (insn);
7370 rtx new = simplify_rtx (XEXP (note, 0));
7372 if (!new)
7373 new = XEXP (note, 0);
7375 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7377 remove_note (insn,
7378 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7379 dead_libcall = 1;
7383 else if (in_libcall)
7384 live_insn = ! dead_libcall;
7385 else if (GET_CODE (PATTERN (insn)) == SET)
7387 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
7388 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
7391 #ifdef HAVE_cc0
7392 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7393 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7394 && ((tem = next_nonnote_insn (insn)) == 0
7395 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7396 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7398 #endif
7399 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7400 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7401 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7402 || side_effects_p (SET_SRC (PATTERN (insn)))
7403 /* An ADDRESSOF expression can turn into a use of the
7404 internal arg pointer, so always consider the
7405 internal arg pointer live. If it is truly dead,
7406 flow will delete the initializing insn. */
7407 || (SET_DEST (PATTERN (insn))
7408 == current_function_internal_arg_pointer))
7409 live_insn = 1;
7411 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7412 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7414 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7416 if (GET_CODE (elt) == SET)
7418 if (GET_CODE (SET_DEST (elt)) == REG
7419 && SET_DEST (elt) == SET_SRC (elt))
7422 #ifdef HAVE_cc0
7423 else if (GET_CODE (SET_DEST (elt)) == CC0
7424 && ! side_effects_p (SET_SRC (elt))
7425 && ((tem = next_nonnote_insn (insn)) == 0
7426 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7427 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7429 #endif
7430 else if (GET_CODE (SET_DEST (elt)) != REG
7431 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7432 || counts[REGNO (SET_DEST (elt))] != 0
7433 || side_effects_p (SET_SRC (elt))
7434 /* An ADDRESSOF expression can turn into a use of the
7435 internal arg pointer, so always consider the
7436 internal arg pointer live. If it is truly dead,
7437 flow will delete the initializing insn. */
7438 || (SET_DEST (elt)
7439 == current_function_internal_arg_pointer))
7440 live_insn = 1;
7442 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7443 live_insn = 1;
7445 else
7446 live_insn = 1;
7448 /* If this is a dead insn, delete it and show registers in it aren't
7449 being used. */
7451 if (! live_insn)
7453 count_reg_usage (insn, counts, NULL_RTX, -1);
7454 delete_insn (insn);
7457 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7459 in_libcall = 0;
7460 dead_libcall = 0;
7464 /* Clean up. */
7465 free (counts);