gcc-4_9-branch/gcc/ChangeLog.linaro

   1 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
   2
   3         Backport from trunk r213712.
   4         2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
   5
   6         * config/aarch64/aarch64.md (absdi2): Set simd attribute.
   7         (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
   8         (aarch64_movdi_<mode>high): Likewise.
   9         (aarch64_mov<mode>high_di): Likewise.
  10         (aarch64_movdi_<mode>low): Likewise.
  11         (aarch64_mov<mode>low_di): Likewise.
  12         (aarch64_movtilow_tilow): Likewise.
  13         Add comment explaining usage of fp,simd attributes and of
  14         TARGET_FLOAT and TARGET_SIMD.
  15
  16 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
  17
  18         Backport from trunk r214526.
  19         2014-08-26  Joseph Myers  <joseph@codesourcery.com>
  20
  21         PR target/60606
  22         PR target/61330
  23         * varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
  24         DECL_HARD_REGISTER and return for invalid register specifications.
  25         * cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
  26         DECL_HARD_REGISTER, call expand_one_error_var.
  27         * config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
  28         CC_REGNUM with non-MODE_CC modes.
  29         (arm_regno_class): Return NO_REGS for PC_REGNUM.
  30
  31 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
  32
  33         Backport from trunk r214503.
  34         2014-08-26  Evandro Menezes <e.menezes@samsung.com>
  35
  36         * config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
  37         qi cost; add di cost.
  38         (cortexa57_addrcost_table): Likewise.
  39
  40 2014-09-03  Yvan Roux  <yvan.roux@linaro.org>
  41
  42         Backport from trunk r213659.
  43         2014-08-06  Alan Lawrence  <alan.lawrence@arm.com>
  44
  45         * config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
  46         (aarch64_expand_vec_perm_const): Check for dup before zip.
  47
  48 2014-09-02  Yvan Roux  <yvan.roux@linaro.org>
  49
  50         Backport from trunk r213651.
  51         2014-08-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  52
  53         * config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and
  54         CONST_INT_P instead of GET_CODE and compare.
  55         (aarch64_select_cc_mode): Likewise.
  56         (aarch64_print_operand): Likewise.
  57         (aarch64_rtx_costs): Likewise.
  58         (aarch64_simd_valid_immediate): Likewise.
  59         (aarch64_simd_check_vect_par_cnst_half): Likewise.
  60         (aarch64_simd_emit_pair_result_insn): Likewise.
  61
  62 2014-08-29  Yvan Roux  <yvan.roux@linaro.org>
  63
  64         Backport from trunk r212978.
  65         2014-07-24  Andreas Schwab  <schwab@suse.de>
  66
  67         * lib/target-supports.exp (check_effective_target_arm_nothumb):
  68         Also check for __arm__.
  69
  70 2014-08-29  Christophe Lyon  <christophe.lyon@linaro.org>
  71
  72         Fix backport from trunk 211440:
  73         * config.gcc (aarch64*-*-*): Restore need_64bit_hwint=yes.
  74
  75         This is necessary to build aarch64* compilers on i686 host.
  76
  77 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
  78
  79         Backport from trunk r213627.
  80         2014-08-05  James Greenhalgh  <james.greenhalgh@arm.com>
  81
  82         * config/aarch64/aarch64-builtins.c
  83         (aarch64_simd_builtin_type_mode): Delete.
  84         (v8qi_UP): Remap to V8QImode.
  85         (v4hi_UP): Remap to V4HImode.
  86         (v2si_UP): Remap to V2SImode.
  87         (v2sf_UP): Remap to V2SFmode.
  88         (v1df_UP): Remap to V1DFmode.
  89         (di_UP): Remap to DImode.
  90         (df_UP): Remap to DFmode.
  91         (v16qi_UP):V16QImode.
  92         (v8hi_UP): Remap to V8HImode.
  93         (v4si_UP): Remap to V4SImode.
  94         (v4sf_UP): Remap to V4SFmode.
  95         (v2di_UP): Remap to V2DImode.
  96         (v2df_UP): Remap to V2DFmode.
  97         (ti_UP): Remap to TImode.
  98         (ei_UP): Remap to EImode.
  99         (oi_UP): Remap to OImode.
 100         (ci_UP): Map to CImode.
 101         (xi_UP): Remap to XImode.
 102         (si_UP): Remap to SImode.
 103         (sf_UP): Remap to SFmode.
 104         (hi_UP): Remap to HImode.
 105         (qi_UP): Remap to QImode.
 106         (aarch64_simd_builtin_datum): Make mode a machine_mode.
 107         (VAR1): Build builtin name.
 108         (aarch64_init_simd_builtins): Remove dead code.
 109
 110 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 111
 112         Backport from trunk r213713.
 113         2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 114
 115         * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
 116         * config/arm/types.md (f_sels, f_seld): Delete.
 117
 118 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 119
 120         Backport from trunk r213711.
 121         2014-08-07  Ian Bolton  <ian.bolton@arm.com>
 122                     Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 123
 124         * config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
 125         Use MOVN when one of the half-words is 0xffff.
 126
 127 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 128
 129         Backport from trunk r213632.
 130         2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 131
 132         * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
 133         to reservation.
 134         * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
 135
 136 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 137
 138         Backport from trunk r213630.
 139         2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 140
 141         * config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
 142         (rbitsi2): Likewise.
 143         (*arm_rev): Set predicable and predicable_short_it attributes.
 144
 145 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 146
 147         Backport from trunk r213557.
 148         2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 149                     James Greenhalgh  <james.greenhalgh@arm.com>
 150
 151         * doc/md.texi (clrsb): Document.
 152         (clz): Change reference to x into operand 1.
 153         (ctz): Likewise.
 154         (popcount): Likewise.
 155
 156 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 157
 158         Backport from trunk r213551, r213556.
 159         2014-08-04  Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
 160                     Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 161
 162         * sched-deps.c (try_group_insn): Generalise macro fusion hook usage
 163         to any two insns.  Update comment.  Rename to sched_macro_fuse_insns.
 164         (sched_analyze_insn): Update use of try_group_insn to
 165         sched_macro_fuse_insns.
 166         * config/i386/i386.c (ix86_macro_fusion_pair_p): Reject 2nd
 167         arguments that are not conditional jumps.
 168
 169 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 170
 171         Backport from trunk r213490.
 172         2014-08-01  Alan Lawrence  <alan.lawrence@arm.com>
 173
 174         * config/aarch64/aarch64-simd-builtins.def (dup_lane, get_lane): Delete.
 175
 176 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 177
 178         Backport from trunk r213488.
 179         2014-08-01  Jiong Wang <jiong.wang@arm.com>
 180
 181         * config/aarch64/aarch64.c (aarch64_classify_address): Accept all offset
 182         for frame access when strict_p is false.
 183
 184 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 185
 186         Backport from trunk r213485, r213486, r213487.
 187         2014-08-01  Renlin Li <renlin.li@arm.com>
 188                     Jiong Wang <jiong.wang@arm.com>
 189
 190         * config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
 191         aarch64_offset_7bit_signed_scaled_p, remove static and use it.
 192         * config/aarch64/aarch64-protos.h (aarch64_offset_7bit_signed_scaled_p):
 193         Declaration.
 194         * config/aarch64/predicates.md (aarch64_mem_pair_offset): Define new
 195         predicate.
 196         * config/aarch64/aarch64.md (loadwb_pair, storewb_pair): Use
 197         aarch64_mem_pair_offset.
 198
 199         2014-08-01  Jiong Wang <jiong.wang@arm.com>
 200
 201         * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Fix
 202         offset.
 203         (loadwb_pair<GPI:mode>_<P:mode>): Likewise.
 204         * config/aarch64/aarch64.c (aarch64_gen_loadwb_pair): Likewise.
 205
 206 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 207
 208         Backport from trunk r213379.
 209         2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>
 210
 211         * config/aarch64/aarch64-builtins.c
 212         (aarch64_gimple_fold_builtin): Don't fold reduction operations for
 213         BYTES_BIG_ENDIAN.
 214
 215 2014-08-26  Yvan Roux  <yvan.roux@linaro.org>
 216
 217         Backport from trunk r213378.
 218         2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>
 219
 220         * config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
 221         the generated mask based on BYTES_BIG_ENDIAN.
 222         (aarch64_simd_check_vect_par_cnst_half): New.
 223         * config/aarch64/aarch64-protos.h
 224         (aarch64_simd_check_vect_par_cnst_half): New.
 225         * config/aarch64/predicates.md (vect_par_cnst_hi_half): Refactor
 226         the check out to aarch64_simd_check_vect_par_cnst_half.
 227         (vect_par_cnst_lo_half): Likewise.
 228         * config/aarch64/aarch64-simd.md
 229         (aarch64_simd_move_hi_quad_<mode>): Always use vec_par_cnst_lo_half.
 230         (move_hi_quad_<mode>): Always generate a low mask.
 231
 232 2014-08-22  Yvan Roux  <yvan.roux@linaro.org>
 233
 234         Backport from trunk r212927, r213304.
 235         2014-07-30  Jiong Wang  <jiong.wang@arm.com>
 236
 237         * config/arm/arm.c (arm_get_frame_offsets): Adjust condition for
 238         Thumb2.
 239
 240         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 241
 242         * config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
 243         callee-saved registers are available for padding purpose
 244         and r3 is not mandatory, then prefer use those callee-saved
 245         instead of r3.
 246
 247 2014-08-22  Yvan Roux  <yvan.roux@linaro.org>
 248
 249         Backport from trunk r211717, r213692.
 250         2014-08-07  Kugan Vivekanandarajah  <kuganv@linaro.org>
 251
 252         * config/arm/arm.c (bdesc_2arg): Fix typo.
 253         (arm_atomic_assign_expand_fenv): Remove The default implementation.
 254
 255         2014-06-17  Kugan Vivekanandarajah  <kuganv@linaro.org>
 256
 257         * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
 258         default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
 259         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
 260         __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
 261         * config/arm/vfp.md (set_fpscr): Make pattern conditional on
 262         TARGET_HARD_FLOAT.
 263         (get_fpscr) : Likewise.
 264
 265 2014-08-22  Yvan Roux  <yvan.roux@linaro.org>
 266
 267         Backport from trunk r212989, r213628.
 268         2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 269
 270         * convert.c (convert_to_integer): Guard transformation to lrint by
 271         -fno-math-errno.
 272
 273         2014-07-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 274
 275         PR middle-end/61876
 276         * convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
 277         when flag_errno_math is on.
 278
 279 2014-08-15  Yvan Roux  <yvan.roux@linaro.org>
 280
 281         * LINARO-VERSION: Bump version.
 282
 283 2014-08-14  Yvan Roux  <yvan.roux@linaro.org>
 284
 285         GCC Linaro 4.9-2014.08 released.
 286         * LINARO-VERSION: Update.
 287
 288 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 289
 290         Backport from trunk r212912, r212913.
 291         2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 292
 293         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
 294         (case UNSPEC): Handle UNSPEC_RBIT.
 295
 296         2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 297
 298         * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
 299         (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
 300
 301 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 302
 303         Backport from trunk r213555.
 304         2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 305
 306         PR target/61713
 307         * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
 308         move to subtarget in serial version if result is ignored.
 309
 310 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 311
 312         Backport from trunk r213376.
 313         2014-07-31  Charles Baylis  <charles.baylis@linaro.org>
 314
 315         PR target/61948
 316         * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
 317         constraints are satisfied.
 318         (<shift>di3_neon): Likewise.
 319
 320 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 321
 322         Backport from trunk r211270, r211271, r211273, r211275, r212943,
 323         r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
 324         r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
 325         r213000.
 326         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
 327
 328         * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
 329         (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
 330
 331         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
 332
 333         * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
 334         (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
 335
 336         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
 337
 338         * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
 339         (aarch64_save_callee_saves): New parameter "skip_wb".
 340         (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
 341
 342         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
 343
 344         * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
 345         "wb_candidate2".
 346         * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
 347
 348         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
 349
 350         * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
 351         subtract outgoing area size when restoring stack_pointer_rtx.
 352
 353         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 354
 355         * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
 356         (aarch64_gen_loadwb_pair): New helper function.
 357         (aarch64_expand_epilogue): Simplify code using new helper functions.
 358         * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
 359
 360         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 361
 362         * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
 363         (aarch64_gen_storewb_pair): New helper function.
 364         (aarch64_expand_prologue): Simplify code using new helper functions.
 365         * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
 366
 367         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 368
 369         * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
 370         Rename to aarch64_save_callee_saves, remove restore code.
 371         (aarch64_restore_callee_saves): New function.
 372
 373         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 374
 375         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
 376         (aarch64_save_callee_saves): New function to handle reg save
 377         for both core and vectore regs.
 378
 379         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 380
 381         * config/aarch64/aarch64.c (aarch64_gen_load_pair)
 382         (aarch64_gen_store_pair): New helper function.
 383         (aarch64_save_or_restore_callee_save_registers)
 384         (aarch64_save_or_restore_fprs): Use new helper functions.
 385
 386         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 387
 388         * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
 389         (aarch64_save_or_restore_callee_save_registers)
 390         (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
 391
 392         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 393
 394         * config/aarch64/aarch64.c
 395         (aarch64_save_or_restore_callee_save_registers)
 396         (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
 397
 398         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 399
 400         * config/aarch64/aarch64.c
 401         (aarch64_save_or_restore_callee_save_registers)
 402         (aarch64_save_or_restore_fprs): Remove 'increment'.
 403
 404         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 405
 406         * config/aarch64/aarch64.c
 407         (aarch64_save_or_restore_callee_save_registers)
 408         (aarch64_save_or_restore_fprs): Use register offset in
 409         cfun->machine->frame.reg_offset.
 410
 411         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 412
 413         * config/aarch64/aarch64.c
 414         (aarch64_save_or_restore_callee_save_registers)
 415         (aarch64_save_or_restore_fprs): Remove base_rtx.
 416
 417         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 418
 419         * config/aarch64/aarch64.c
 420         (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
 421         to 'start_offset'.  Remove local variable 'start_offset'.
 422
 423         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 424
 425         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
 426         type to HOST_WIDE_INT.
 427
 428         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 429
 430         * config/aarch64/aarch64.c (aarch64_expand_prologue)
 431         (aarch64_save_or_restore_fprs)
 432         (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
 433
 434         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 435
 436         * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
 437         frame_size.
 438         * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
 439         aarch64_frame hard_fp_offset and frame_size.
 440         (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
 441         frame_size; remove original_frame_size.
 442         (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
 443         (aarch64_initial_elimination_offset): Remove frame_size and
 444         offset.  Use aarch64_frame frame_size.
 445
 446         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 447                     Jiong Wang  <jiong.wang@arm.com>
 448
 449         * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
 450         initialization of R30 offset.  Update offset.  Iterate core
 451         regisers upto X30.  Remove X29, X30 specific code.
 452
 453         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 454                     Jiong Wang  <jiong.wang@arm.com>
 455
 456         * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
 457         (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
 458         (aarch64_register_saved_on_entry): Adjust test.
 459
 460         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 461
 462         * config/aarch64/aarch64.h (machine_function): Move
 463         saved_varargs_size from here...
 464         (aarch64_frameGTY): ... to here.
 465
 466         * config/aarch64/aarch64.c (aarch64_expand_prologue)
 467         (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
 468         (aarch64_initial_elimination_offset)
 469         (aarch64_setup_incoming_varargs): Adjust location of
 470         saved_varargs_size.
 471
 472 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 473
 474         Backport from trunk r212753.
 475         2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 476
 477         * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
 478         (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
 479
 480 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 481
 482         Backport from trunk r212752.
 483         2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 484
 485         * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
 486         (vmlal_high_lane_s32): Likewise.
 487         (vmlal_high_lane_u16): Likewise.
 488         (vmlal_high_lane_u32): Likewise.
 489         (vmlsl_high_lane_s16): Likewise.
 490         (vmlsl_high_lane_s32): Likewise.
 491         (vmlsl_high_lane_u16): Likewise.
 492         (vmlsl_high_lane_u32): Likewise.
 493
 494 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 495
 496         Backport from trunk r212512.
 497         2014-07-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 498
 499         * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
 500         * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
 501         * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
 502         * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
 503         * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
 504         * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
 505         * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
 506
 507 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 508
 509         Backport from trunk r212358.
 510         2014-07-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 511
 512         * config/arm/arm.c (cortexa5_extra_costs): New table.
 513         (arm_cortex_a5_tune): Use cortexa5_extra_costs.
 514
 515 2014-08-11  Yvan Roux  <yvan.roux@linaro.org>
 516
 517         Backport from trunk r212296.
 518         2014-07-04  Tom de Vries  <tom@codesourcery.com>
 519
 520         * config/aarch64/aarch64-simd.md
 521         (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
 522
 523 2014-08-10  Yvan Roux  <yvan.roux@linaro.org>
 524
 525         Backport from trunk r212142, r212225.
 526         2014-07-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 527
 528         * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
 529         variable i.
 530
 531         2014-06-30  Alan Lawrence  <alan.lawrence@arm.com>
 532
 533         * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
 534         * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
 535         against bigendian and adjust indices.
 536
 537 2014-08-10  Yvan Roux  <yvan.roux@linaro.org>
 538
 539         Backport from trunk r211779.
 540         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 541
 542         * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
 543
 544 2014-07-30  Yvan Roux  <yvan.roux@linaro.org>
 545
 546         Backport from trunk r211503.
 547         2014-06-12  Alan Lawrence  <alan.lawrence@arm.com>
 548
 549         * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
 550         vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
 551         vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
 552         vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
 553         vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
 554         vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
 555         vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
 556         not in the spec.
 557
 558 2014-07-30  Yvan Roux  <yvan.roux@linaro.org>
 559
 560         Backport from trunk r211140.
 561         2014-06-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 562
 563         * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
 564
 565 2014-07-29  Yvan Roux  <yvan.roux@linaro.org>
 566
 567         * LINARO-VERSION: Bump version.
 568
 569 2014-07-24  Yvan Roux  <yvan.roux@linaro.org>
 570
 571         GCC Linaro 4.9-2014.07-1 released.
 572         * LINARO-VERSION: Update.
 573
 574 2014-07-20  Yvan Roux  <yvan.roux@linaro.org>
 575
 576         Revert:
 577         2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 578
 579         Backport from trunk r211129.
 580         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 581
 582         PR target/61154
 583         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
 584         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
 585         with immediate_operand.
 586
 587 2014-07-19  Yvan Roux  <yvan.roux@linaro.org>
 588
 589         * LINARO-VERSION: Bump version.
 590
 591 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 592
 593         GCC Linaro 4.9-2014.07 released.
 594         * LINARO-VERSION: Update.
 595
 596 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 597
 598         Backport from trunk r211887, r211899.
 599         2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
 600
 601         * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
 602         "yes" where needed.
 603
 604         2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
 605
 606         * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
 607         vector registers.
 608
 609 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 610
 611         Backport from trunk r211440.
 612         2014-06-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 613
 614         * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
 615         * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
 616         dependencies.
 617         * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
 618         (aarch64_crc_builtin_datum): New struct.
 619         (aarch64_crc_builtin_data): New.
 620         (aarch64_init_crc32_builtins): New function.
 621         (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
 622         (aarch64_crc32_expand_builtin): New.
 623         (aarch64_expand_builtin): Add CRC32 builtin expansion case.
 624         * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
 625         __ARM_FEATURE_CRC32 when appropriate.
 626         (TARGET_CRC32): Define.
 627         * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
 628         UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
 629         UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
 630         (aarch64_<crc_variant>): New pattern.
 631         * config/aarch64/arm_acle.h: New file.
 632         * config/aarch64/iterators.md (CRC): New int iterator.
 633         (crc_variant, crc_mode): New int attributes.
 634         * doc/aarch64-acle-intrinsics.texi: New file.
 635         * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
 636         Include aarch64-acle-intrinsics.texi.
 637
 638 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 639
 640         Backport from trunk r211174.
 641         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 642
 643         * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
 644         New pattern.
 645         * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
 646         (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
 647         * config/aarch64/iterators.md (REVERSE): New iterator.
 648         (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
 649         (rev_op): New int_attribute.
 650         * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
 651         vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
 652         vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
 653         vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
 654         vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
 655         vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
 656         vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
 657         Replace temporary __asm__ with __builtin_shuffle.
 658
 659 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 660
 661         Backport from trunk r210216, r210218, r210219.
 662         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 663
 664         * config/arm/arm_neon.h: Update comment.
 665         * config/arm/neon-docgen.ml: Delete.
 666         * config/arm/neon-gen.ml: Delete.
 667         * doc/arm-neon-intrinsics.texi: Update comment.
 668
 669         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 670
 671         * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
 672         and v4sf versions.
 673         (vand, vorr, veor, vorn, vbic): Remove.
 674         * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
 675         iterator.
 676         (neon_vsub_unspec): Likewise.
 677         (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
 678
 679         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 680
 681         * config/arm/arm_neon.h (vadd_s8): GNU C implementation
 682         (vadd_s16): Likewise.
 683         (vadd_s32): Likewise.
 684         (vadd_f32): Likewise.
 685         (vadd_u8): Likewise.
 686         (vadd_u16): Likewise.
 687         (vadd_u32): Likewise.
 688         (vadd_s64): Likewise.
 689         (vadd_u64): Likewise.
 690         (vaddq_s8): Likewise.
 691         (vaddq_s16): Likewise.
 692         (vaddq_s32): Likewise.
 693         (vaddq_s64): Likewise.
 694         (vaddq_f32): Likewise.
 695         (vaddq_u8): Likewise.
 696         (vaddq_u16): Likewise.
 697         (vaddq_u32): Likewise.
 698         (vaddq_u64): Likewise.
 699         (vmul_s8): Likewise.
 700         (vmul_s16): Likewise.
 701         (vmul_s32): Likewise.
 702         (vmul_f32): Likewise.
 703         (vmul_u8): Likewise.
 704         (vmul_u16): Likewise.
 705         (vmul_u32): Likewise.
 706         (vmul_p8): Likewise.
 707         (vmulq_s8): Likewise.
 708         (vmulq_s16): Likewise.
 709         (vmulq_s32): Likewise.
 710         (vmulq_f32): Likewise.
 711         (vmulq_u8): Likewise.
 712         (vmulq_u16): Likewise.
 713         (vmulq_u32): Likewise.
 714         (vsub_s8): Likewise.
 715         (vsub_s16): Likewise.
 716         (vsub_s32): Likewise.
 717         (vsub_f32): Likewise.
 718         (vsub_u8): Likewise.
 719         (vsub_u16): Likewise.
 720         (vsub_u32): Likewise.
 721         (vsub_s64): Likewise.
 722         (vsub_u64): Likewise.
 723         (vsubq_s8): Likewise.
 724         (vsubq_s16): Likewise.
 725         (vsubq_s32): Likewise.
 726         (vsubq_s64): Likewise.
 727         (vsubq_f32): Likewise.
 728         (vsubq_u8): Likewise.
 729         (vsubq_u16): Likewise.
 730         (vsubq_u32): Likewise.
 731         (vsubq_u64): Likewise.
 732         (vand_s8): Likewise.
 733         (vand_s16): Likewise.
 734         (vand_s32): Likewise.
 735         (vand_u8): Likewise.
 736         (vand_u16): Likewise.
 737         (vand_u32): Likewise.
 738         (vand_s64): Likewise.
 739         (vand_u64): Likewise.
 740         (vandq_s8): Likewise.
 741         (vandq_s16): Likewise.
 742         (vandq_s32): Likewise.
 743         (vandq_s64): Likewise.
 744         (vandq_u8): Likewise.
 745         (vandq_u16): Likewise.
 746         (vandq_u32): Likewise.
 747         (vandq_u64): Likewise.
 748         (vorr_s8): Likewise.
 749         (vorr_s16): Likewise.
 750         (vorr_s32): Likewise.
 751         (vorr_u8): Likewise.
 752         (vorr_u16): Likewise.
 753         (vorr_u32): Likewise.
 754         (vorr_s64): Likewise.
 755         (vorr_u64): Likewise.
 756         (vorrq_s8): Likewise.
 757         (vorrq_s16): Likewise.
 758         (vorrq_s32): Likewise.
 759         (vorrq_s64): Likewise.
 760         (vorrq_u8): Likewise.
 761         (vorrq_u16): Likewise.
 762         (vorrq_u32): Likewise.
 763         (vorrq_u64): Likewise.
 764         (veor_s8): Likewise.
 765         (veor_s16): Likewise.
 766         (veor_s32): Likewise.
 767         (veor_u8): Likewise.
 768         (veor_u16): Likewise.
 769         (veor_u32): Likewise.
 770         (veor_s64): Likewise.
 771         (veor_u64): Likewise.
 772         (veorq_s8): Likewise.
 773         (veorq_s16): Likewise.
 774         (veorq_s32): Likewise.
 775         (veorq_s64): Likewise.
 776         (veorq_u8): Likewise.
 777         (veorq_u16): Likewise.
 778         (veorq_u32): Likewise.
 779         (veorq_u64): Likewise.
 780         (vbic_s8): Likewise.
 781         (vbic_s16): Likewise.
 782         (vbic_s32): Likewise.
 783         (vbic_u8): Likewise.
 784         (vbic_u16): Likewise.
 785         (vbic_u32): Likewise.
 786         (vbic_s64): Likewise.
 787         (vbic_u64): Likewise.
 788         (vbicq_s8): Likewise.
 789         (vbicq_s16): Likewise.
 790         (vbicq_s32): Likewise.
 791         (vbicq_s64): Likewise.
 792         (vbicq_u8): Likewise.
 793         (vbicq_u16): Likewise.
 794         (vbicq_u32): Likewise.
 795         (vbicq_u64): Likewise.
 796         (vorn_s8): Likewise.
 797         (vorn_s16): Likewise.
 798         (vorn_s32): Likewise.
 799         (vorn_u8): Likewise.
 800         (vorn_u16): Likewise.
 801         (vorn_u32): Likewise.
 802         (vorn_s64): Likewise.
 803         (vorn_u64): Likewise.
 804         (vornq_s8): Likewise.
 805         (vornq_s16): Likewise.
 806         (vornq_s32): Likewise.
 807         (vornq_s64): Likewise.
 808         (vornq_u8): Likewise.
 809         (vornq_u16): Likewise.
 810         (vornq_u32): Likewise.
 811         (vornq_u64): Likewise.
 812
 813 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 814
 815         Backport from trunk r210151.
 816         2014-05-07  Alan Lawrence  <alan.lawrence@arm.com>
 817
 818         * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
 819         vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
 820         vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
 821         vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
 822         vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
 823         vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
 824         vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
 825         vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
 826
 827 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 828
 829         Backport from trunk r209794.
 830         2014-04-25  Marek Polacek  <polacek@redhat.com>
 831
 832         PR c/60114
 833         * c-parser.c (c_parser_initelt): Pass input_location to
 834         process_init_element.
 835         (c_parser_initval): Pass loc to process_init_element.
 836         * c-tree.h (process_init_element): Adjust declaration.
 837         * c-typeck.c (push_init_level): Pass input_location to
 838         process_init_element.
 839         (pop_init_level): Likewise.
 840         (set_designator): Likewise.
 841         (output_init_element): Add location_t parameter.  Pass loc to
 842         digest_init.
 843         (output_pending_init_elements): Pass input_location to
 844         output_init_element.
 845         (process_init_element): Add location_t parameter.  Pass loc to
 846         output_init_element.
 847
 848 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 849
 850         Backport from trunk r211771.
 851         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 852
 853         * genattrtab.c (n_bypassed): New variable.
 854         (process_bypasses): Initialise n_bypassed.
 855         Count number of bypassed reservations.
 856         (make_automaton_attrs): Allocate space for bypassed reservations
 857         rather than number of bypasses.
 858
 859 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 860
 861         Backport from trunk r210861.
 862         2014-05-23  Jiong Wang   <jiong.wang@arm.com>
 863
 864         * config/aarch64/predicates.md (aarch64_call_insn_operand): New
 865         predicate.
 866         * config/aarch64/constraints.md ("Ucs", "Usf"):  New constraints.
 867         * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
 868         Adjust for tailcalling through registers.
 869         * config/aarch64/aarch64.h (enum reg_class): New caller save
 870         register class.
 871         (REG_CLASS_NAMES): Likewise.
 872         (REG_CLASS_CONTENTS): Likewise.
 873         * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
 874         Allow tailcalling without decls.
 875
 876 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 877
 878         Backport from trunk r211314.
 879         2014-06-06  James Greenhalgh  <james.greenhalgh@arm.com>
 880
 881         * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
 882         * config/aarch64/aarch64.c (aarch64_move_pointer): New.
 883         (aarch64_progress_pointer): Likewise.
 884         (aarch64_copy_one_part_and_move_pointers): Likewise.
 885         (aarch64_expand_movmen): Likewise.
 886         * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
 887         * config/aarch64/aarch64.md (movmem<mode>): New.
 888
 889 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 890
 891         Backport from trunk r211185, 211186.
 892         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 893
 894         * gcc/config/aarch64/aarch64-builtins.c
 895         (aarch64_types_binop_uus_qualifiers,
 896         aarch64_types_shift_to_unsigned_qualifiers,
 897         aarch64_types_unsigned_shiftacc_qualifiers): Define.
 898         * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
 899         uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
 900         sqshlu_n, uqshl_n): Update qualifiers.
 901         * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
 902         vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
 903         vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
 904         vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
 905         vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
 906         vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
 907         vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
 908         vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
 909         vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
 910         vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
 911         vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
 912         vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
 913         vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
 914         vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
 915         vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
 916         vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
 917         vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
 918         vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
 919         vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
 920         vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
 921         vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
 922         vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
 923         vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
 924         vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
 925         vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
 926         vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
 927         vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
 928
 929         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 930
 931         * gcc/config/aarch64/aarch64-builtins.c
 932         (aarch64_types_binop_ssu_qualifiers): New static data.
 933         (TYPES_BINOP_SSU): Define.
 934         * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
 935         urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
 936         * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
 937         vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
 938         vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
 939         vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
 940         vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32,    52
 941         vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64,  53
 942         vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
 943         suffix to builtin function name, remove cast.   55
 944         (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
 945         vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8,  57
 946         vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
 947
 948 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 949
 950         Backport from trunk r211408, 211416.
 951         2014-06-10  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 952
 953         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
 954         REG_CFA_RESTORE mode.
 955
 956         2014-06-10  Jiong Wang  <jiong.wang@arm.com>
 957
 958         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
 959         (aarch64_save_or_restore_callee_save_registers): Fix layout.
 960
 961 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 962
 963         Backport from trunk r211418.
 964         2014-06-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 965
 966         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
 967         Change second alternative type to f_mcr.
 968         * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
 969         and 12th alternatives' types to f_mcr and f_mrc.
 970         (*movdi_aarch64): Same for 12th and 13th alternatives.
 971         (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
 972         (aarch64_movtilow_tilow): Change type to fmov.
 973
 974 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 975
 976         Backport from trunk r211371.
 977         2014-06-09  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 978
 979         * config/arm/arm-modes.def: Remove XFmode.
 980
 981 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 982
 983         Backport from trunk r211268.
 984         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 985
 986         * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
 987         layout comment.
 988
 989 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 990
 991         Backport from trunk r211129.
 992         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 993
 994         PR target/61154
 995         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
 996         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
 997         with immediate_operand.
 998
 999 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1000
1001         Backport from trunk r211073.
1002         2014-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1003
1004         * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
1005         to mov_imm.
1006         * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
1007
1008 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1009
1010         Backport from trunk r211050.
1011         2014-05-29  Richard Earnshaw <rearnsha@arm.com>
1012         Richard Sandiford  <rdsandiford@googlemail.com>
1013
1014         * arm/iterators.md (shiftable_ops): New code iterator.
1015         (t2_binop0, arith_shift_insn): New code attributes.
1016         * arm/predicates.md (shift_nomul_operator): New predicate.
1017         * arm/arm.md (insn_enabled): Delete.
1018         (enabled): Remove insn_enabled test.
1019         (*arith_shiftsi): Delete.  Replace with ...
1020         (*<arith_shift_insn>_multsi): ... new pattern.
1021         (*<arith_shift_insn>_shiftsi): ... new pattern.
1022         * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
1023
1024 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1025
1026         Backport from trunk r210996.
1027         2014-05-27  Andrew Pinski  <apinski@cavium.com>
1028
1029         * config/aarch64/aarch64.md (stack_protect_set_<mode>):
1030         Use <w> for the register in assembly template.
1031         (stack_protect_test): Use the mode of operands[0] for the
1032         result.
1033         (stack_protect_test_<mode>): Use <w> for the register
1034         in assembly template.
1035
1036 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1037
1038         Backport from trunk r210967.
1039         2014-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1040
1041         * config/arm/neon.md (neon_bswap<mode>): New pattern.
1042         * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
1043         (arm_init_neon_builtins): Handle NEON_BSWAP.
1044         Define required type nodes.
1045         (arm_expand_neon_builtin): Handle NEON_BSWAP.
1046         (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
1047         * config/arm/arm_neon_builtins.def (bswap): Define builtins.
1048         * config/arm/iterators.md (VDQHSD): New mode iterator.
1049
1050 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1051
1052         Backport from trunk r210471.
1053         2014-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1054
1055         * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
1056         enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
1057
1058 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1059
1060         Backport from trunk r210369.
1061         2014-05-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1062
1063         * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
1064         (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
1065         Remove associated type declarations and initialisations.
1066         (arm_expand_neon_builtin): Likewise.
1067         (neon_emit_pair_result_insn): Delete.
1068         * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
1069         * config/arm/neon.md (neon_vtrn<mode>): Delete.
1070         (neon_vzip<mode>): Likewise.
1071         (neon_vuzp<mode>): Likewise.
1072
1073 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1074
1075         Backport from trunk r211058, 211177.
1076         2014-05-29  Alan Lawrence  <alan.lawrence@arm.com>
1077
1078         * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
1079         TYPES_BINOPV): New static data.
1080         * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
1081         * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
1082         New patterns.
1083         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
1084         patterns for EXT.
1085         (aarch64_evpc_ext): New function.
1086
1087         * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
1088
1089         * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
1090         vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
1091         vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
1092         vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
1093         vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
1094
1095         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1096
1097         * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
1098         location == 0.
1099
1100 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1101
1102         Backport from trunk r209797.
1103         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1104
1105         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
1106         Use HOST_WIDE_INT_C for mask literal.
1107         (aarch_rev16_shleft_mask_imm_p): Likewise.
1108
1109 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1110
1111         Backport from trunk r211148.
1112         2014-06-02  Andrew Pinski  <apinski@cavium.com>
1113
1114         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
1115         /lib/ld-linux32-aarch64.so.1 is used for ILP32.
1116         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
1117         file whose name depends on -mabi= and -mbig-endian.
1118         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
1119         better and handle ilp32 too.
1120         (MULTILIB_OPTIONS): Delete.
1121         (MULTILIB_DIRNAMES): Delete.
1122
1123 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1124
1125         Backport from trunk r210828, r211103.
1126         2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>
1127
1128         * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
1129         (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
1130         (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
1131         and __builtins_arm_get_fpscr.
1132         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
1133         __builtins_arm_get_fpscr.
1134         (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
1135         __builtins_arm_ldfpscr.
1136         (arm_atomic_assign_expand_fenv): New function.
1137         * config/arm/vfp.md (set_fpscr): New pattern.
1138         (get_fpscr) : Likewise.
1139         * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
1140         VUNSPEC_SET_FPSCR.
1141         * doc/extend.texi (AARCH64 Built-in Functions) : Document
1142         __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
1143
1144         2014-05-23  Kugan Vivekanandarajah  <kuganv@linaro.org>
1145
1146         * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
1147         define.
1148         * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
1149         New function declaration.
1150         * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
1151         AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
1152         AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
1153         (aarch64_init_builtins) : Initialize builtins
1154         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
1155         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
1156         (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
1157         __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
1158         and __builtins_aarch64_set_fpsr.
1159         (aarch64_atomic_assign_expand_fenv): New function.
1160         * config/aarch64/aarch64.md (set_fpcr): New pattern.
1161         (get_fpcr) : Likewise.
1162         (set_fpsr) : Likewise.
1163         (get_fpsr) : Likewise.
1164         (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
1165          and UNSPECV_SET_FPSR.
1166         * doc/extend.texi (AARCH64 Built-in Functions) : Document
1167         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
1168         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
1169
1170 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1171
1172         Backport from trunk r210355.
1173         2014-05-13  Ian Bolton  <ian.bolton@arm.com>
1174
1175         * config/aarch64/aarch64-protos.h
1176         (aarch64_hard_regno_caller_save_mode): New prototype.
1177         * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
1178         New function.
1179         * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
1180
1181 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1182
1183         Backport from trunk r209943.
1184         2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>
1185
1186         * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
1187         vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
1188         vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
1189         vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
1190         vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
1191         vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
1192         vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
1193         vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
1194
1195 2014-06-26  Yvan Roux  <yvan.roux@linaro.org>
1196
1197         * LINARO-VERSION: Bump version.
1198
1199 2014-06-25  Yvan Roux  <yvan.roux@linaro.org>
1200
1201         GCC Linaro 4.9-2014.06-1 released.
1202         * LINARO-VERSION: Update.
1203
1204 2014-06-24  Yvan Roux  <yvan.roux@linaro.org>
1205
1206         Revert:
1207         2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1208
1209         Backport from trunk r209643.
1210         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1211
1212         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1213
1214 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
1215
1216         Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
1217         210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
1218         210508, 210509, 210510, 210512, 211205, 211206.
1219         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1220
1221         * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
1222         (cpu_addrcost_table): Use it.
1223         * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
1224         (aarch64_address_cost): Rewrite using aarch64_classify_address,
1225         move it.
1226
1227         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1228
1229         * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
1230         (cortexa57_vector_cost): Likewise.
1231         (cortexa57_tunings): Use them.
1232
1233         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1234
1235         * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
1236         (TARGET_RTX_COSTS): Call it.
1237
1238         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1239                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1240
1241         * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
1242         emit instructions, return number of instructions which would
1243         be emitted.
1244         (aarch64_add_constant): Update call to aarch64_build_constant.
1245         (aarch64_output_mi_thunk): Likewise.
1246         (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
1247         a CONST_DOUBLE.
1248
1249         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1250                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1251
1252         * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
1253         to...
1254         (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
1255         well formed.
1256         (aarch64_rtx_mult_cost): New.
1257         (aarch64_rtx_costs): Use it, refactor as appropriate.
1258
1259         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1260
1261         * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
1262
1263         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1264                     Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
1265
1266         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
1267         for SET RTX.
1268
1269         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1270                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1271
1272         * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
1273         costs when costing loads and stores to memory.
1274
1275         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1276                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1277
1278         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
1279         logical operations.
1280
1281         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1282                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1283
1284         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
1285         ZERO_EXTEND and SIGN_EXTEND better.
1286
1287         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1288                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1289
1290         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1291         rotates and shifts.
1292
1293         2014-03-16  James Greenhalgh  <james.greenhalgh@arm.com>
1294                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1295
1296         * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
1297         (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
1298
1299         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1300                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1301
1302         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1303         DIV/MOD.
1304
1305         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1306                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1307
1308         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
1309         operators.
1310
1311         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1312                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1313
1314         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
1315         FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
1316
1317         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1318                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1319
1320         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
1321
1322         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1323
1324         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
1325         HIGH, LO_SUM.
1326
1327         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1328
1329         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
1330         where we were unable to cost an RTX.
1331
1332         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1333
1334         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
1335
1336         2014-06-03  Andrew Pinski  <apinski@cavium.com>
1337
1338         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
1339         (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
1340
1341         2014-06-03  Andrew Pinski  <apinski@cavium.com>
1342
1343         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
1344         comparisons for OP0.
1345
1346 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
1347
1348         * LINARO-VERSION: Bump version.
1349
1350 2014-06-12  Yvan Roux  <yvan.roux@linaro.org>
1351
1352         GCC Linaro 4.9-2014.06 released.
1353         * LINARO-VERSION: Update.
1354
1355 2014-06-04  Yvan Roux  <yvan.roux@linaro.org>
1356
1357         Backport from trunk r211211.
1358         2014-06-04  Bin Cheng  <bin.cheng@arm.com>
1359
1360         * config/aarch64/aarch64.c (aarch64_classify_address)
1361         (aarch64_legitimize_reload_address): Support full addressing modes
1362         for vector modes.
1363         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
1364         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
1365
1366 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1367
1368         Backport from trunk r209906.
1369         2014-04-29  Alan Lawrence  <alan.lawrence@arm.com>
1370
1371         * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
1372         vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
1373         vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
1374         vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
1375         vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
1376         vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
1377         vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
1378         vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
1379
1380 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1381
1382         Backport from trunk r209897.
1383         2014-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1384
1385         * calls.c (initialize_argument_information): Always treat
1386         PUSH_ARGS_REVERSED as 1, simplify code accordingly.
1387         (expand_call): Likewise.
1388         (emit_library_call_calue_1): Likewise.
1389         * expr.c (PUSH_ARGS_REVERSED): Do not define.
1390         (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
1391         code accordingly.
1392
1393 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1394
1395         Backport from trunk r209880.
1396         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
1397
1398         * config/aarch64/aarch64-builtins.c
1399         (aarch64_types_storestruct_lane_qualifiers): New.
1400         (TYPES_STORESTRUCT_LANE): Likewise.
1401         * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
1402         (st3_lane): Likewise.
1403         (st4_lane): Likewise.
1404         * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
1405         (vec_store_lanesci_lane<mode>): Likewise.
1406         (vec_store_lanesxi_lane<mode>): Likewise.
1407                 (aarch64_st2_lane<VQ:mode>): Likewise.
1408         (aarch64_st3_lane<VQ:mode>): Likewise.
1409         (aarch64_st4_lane<VQ:mode>): Likewise.
1410         * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
1411         * config/aarch64/arm_neon.h
1412                 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
1413         use new macro arguments.
1414         (__ST3_LANE_FUNC): Likewise.
1415         (__ST4_LANE_FUNC): Likewise.
1416         * config/aarch64/iterators.md (V_TWO_ELEM): New.
1417         (V_THREE_ELEM): Likewise.
1418         (V_FOUR_ELEM): Likewise.
1419
1420 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1421
1422         Backport from trunk r209878.
1423         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
1424
1425         * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
1426         * config/aarch64/aarch64.c
1427         (aarch64_cannot_change_mode_class): Weaken conditions.
1428         (aarch64_modes_tieable_p): New.
1429         * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
1430
1431 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1432
1433         Backport from trunk r209808.
1434         2014-04-25  Jiong Wang  <jiong.wang@arm.com>
1435
1436         * config/arm/predicates.md (call_insn_operand): Add long_call check.
1437         * config/arm/arm.md (sibcall, sibcall_value): Force the address to
1438         reg for long_call.
1439         * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
1440         restriction.
1441
1442 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1443
1444         Backport from trunk r209806.
1445         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1446
1447         * config/arm/arm.c (arm_cortex_a8_tune): Initialise
1448         T16-related fields.
1449
1450 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1451
1452         Backport from trunk r209742, 209749.
1453         2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
1454
1455         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
1456
1457         2014-04-24  Tejas Belagod  <tejas.belagod@arm.com>
1458
1459         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
1460         for big-endian.
1461
1462 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1463
1464         Backport from trunk r209736.
1465         2014-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1466
1467         * config/aarch64/aarch64-builtins.c
1468         (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
1469         BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
1470         * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
1471         * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
1472         builtins.
1473         * config/aarch64/iterator.md (VDQHSD): New mode iterator.
1474         (Vrevsuff): New mode attribute.
1475
1476 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1477
1478         Backport from trunk r209712.
1479         2014-04-23 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
1480
1481         * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
1482         (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
1483         machine descriptions for Stack Smashing Protector.
1484
1485 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1486
1487         Backport from trunk r209711.
1488         2014-04-23  Richard Earnshaw  <rearnsha@arm.com>
1489
1490         * aarch64.md (<optab>_rol<mode>3): New pattern.
1491         (<optab>_rolsi3_uxtw): Likewise.
1492         * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
1493
1494 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1495
1496         Backport from trunk r209710.
1497         2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
1498
1499         * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
1500         (arm_cortex_a12_tune): Likewise.
1501
1502 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1503
1504         Backport from trunk r209706.
1505         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1506
1507         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
1508
1509 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1510
1511         Backport from trunk r209701, 209702, 209703, 209704, 209705.
1512         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1513
1514         * config/arm/arm.md (arm_rev16si2): New pattern.
1515         (arm_rev16si2_alt): Likewise.
1516         * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
1517
1518         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1519         * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
1520         (rev16<mode>2_alt): Likewise.
1521         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
1522         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
1523         (aarch_rev16_shleft_mask_imm_p): Likewise.
1524         (aarch_rev16_p_1): Likewise.
1525         (aarch_rev16_p): Likewise.
1526         * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
1527         (aarch_rev16_shright_mask_imm_p): Likewise.
1528         (aarch_rev16_shleft_mask_imm_p): Likewise.
1529
1530         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1531
1532         * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
1533         * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
1534         rev cost.
1535         (cortex_a53_extra_costs): Likewise.
1536         (cortex_a57_extra_costs): Likewise.
1537         * config/arm/arm.c (cortexa9_extra_costs): Likewise.
1538         (cortexa7_extra_costs): Likewise.
1539         (cortexa8_extra_costs): Likewise.
1540         (cortexa12_extra_costs): Likewise.
1541         (cortexa15_extra_costs): Likewise.
1542         (v7m_extra_costs): Likewise.
1543         (arm_new_rtx_costs): Handle BSWAP.
1544
1545         2013-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1546
1547         * config/arm/arm.c (cortexa8_extra_costs): New table.
1548         (arm_cortex_a8_tune): New tuning struct.
1549         * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
1550
1551         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1552
1553         * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
1554
1555 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1556
1557         Backport from trunk r209659.
1558         2014-04-22  Richard Henderson  <rth@redhat.com>
1559
1560         * config/aarch64/aarch64 (addti3, subti3): New expanders.
1561         (add<GPI>3_compare0): Remove leading * from name.
1562         (add<GPI>3_carryin): Likewise.
1563         (sub<GPI>3_compare0): Likewise.
1564         (sub<GPI>3_carryin): Likewise.
1565         (<su_optab>mulditi3): New expander.
1566         (multi3): New expander.
1567         (madd<GPI>): Remove leading * from name.
1568
1569 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1570
1571         Backport from trunk r209645.
1572         2014-04-22  Andrew Pinski  <apinski@cavium.com>
1573
1574         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1575         Handle TLS for ILP32.
1576         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
1577         (tlsie_small_<mode>): this and handle PTR.
1578         (tlsie_small_sidi): New pattern.
1579         (tlsle_small): Change to an expand to handle ILP32.
1580         (tlsle_small_<mode>): New pattern.
1581         (tlsdesc_small): Rename to ...
1582         (tlsdesc_small_<mode>): this and handle PTR.
1583
1584 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1585
1586         Backport from trunk r209643.
1587         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1588
1589         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1590
1591 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1592
1593         Backport from trunk r209641, 209642.
1594         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1595
1596         * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1597         (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
1598         (aarch64_types_signed_poly_qualifiers): Likewise.
1599         (aarch64_types_unsigned_signed_qualifiers): Likewise.
1600         (aarch64_types_poly_signed_qualifiers): Likewise.
1601         (TYPES_REINTERP_SS): Type macro added.
1602         (TYPES_REINTERP_SU): Likewise.
1603         (TYPES_REINTERP_SP): Likewise.
1604         (TYPES_REINTERP_US): Likewise.
1605         (TYPES_REINTERP_PS): Likewise.
1606         (aarch64_fold_builtin): New expression folding added.
1607         * config/aarch64/aarch64-simd-builtins.def (REINTERP):
1608         Declarations removed.
1609         (REINTERP_SS): Declarations added.
1610         (REINTERP_US): Likewise.
1611         (REINTERP_PS): Likewise.
1612         (REINTERP_SU): Likewise.
1613         (REINTERP_SP): Likewise.
1614         * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
1615         (vreinterpretq_p8_f64): Likewise.
1616         (vreinterpret_p16_f64): Likewise.
1617         (vreinterpretq_p16_f64): Likewise.
1618         (vreinterpret_f32_f64): Likewise.
1619         (vreinterpretq_f32_f64): Likewise.
1620         (vreinterpret_f64_f32): Likewise.
1621         (vreinterpret_f64_p8): Likewise.
1622         (vreinterpret_f64_p16): Likewise.
1623         (vreinterpret_f64_s8): Likewise.
1624         (vreinterpret_f64_s16): Likewise.
1625         (vreinterpret_f64_s32): Likewise.
1626         (vreinterpret_f64_s64): Likewise.
1627         (vreinterpret_f64_u8): Likewise.
1628         (vreinterpret_f64_u16): Likewise.
1629         (vreinterpret_f64_u32): Likewise.
1630         (vreinterpret_f64_u64): Likewise.
1631         (vreinterpretq_f64_f32): Likewise.
1632         (vreinterpretq_f64_p8): Likewise.
1633         (vreinterpretq_f64_p16): Likewise.
1634         (vreinterpretq_f64_s8): Likewise.
1635         (vreinterpretq_f64_s16): Likewise.
1636         (vreinterpretq_f64_s32): Likewise.
1637         (vreinterpretq_f64_s64): Likewise.
1638         (vreinterpretq_f64_u8): Likewise.
1639         (vreinterpretq_f64_u16): Likewise.
1640         (vreinterpretq_f64_u32): Likewise.
1641         (vreinterpretq_f64_u64): Likewise.
1642         (vreinterpret_s64_f64): Likewise.
1643         (vreinterpretq_s64_f64): Likewise.
1644         (vreinterpret_u64_f64): Likewise.
1645         (vreinterpretq_u64_f64): Likewise.
1646         (vreinterpret_s8_f64): Likewise.
1647         (vreinterpretq_s8_f64): Likewise.
1648         (vreinterpret_s16_f64): Likewise.
1649         (vreinterpretq_s16_f64): Likewise.
1650         (vreinterpret_s32_f64): Likewise.
1651         (vreinterpretq_s32_f64): Likewise.
1652         (vreinterpret_u8_f64): Likewise.
1653         (vreinterpretq_u8_f64): Likewise.
1654         (vreinterpret_u16_f64): Likewise.
1655         (vreinterpretq_u16_f64): Likewise.
1656         (vreinterpret_u32_f64): Likewise.
1657         (vreinterpretq_u32_f64): Likewise.
1658
1659         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1660
1661         * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1662         * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
1663         (vreinterpret_p8_s8): Likewise.
1664         * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
1665         (vreinterpret_p8_s16): Likewise.
1666         (vreinterpret_p8_s32): Likewise.
1667         (vreinterpret_p8_s64): Likewise.
1668         (vreinterpret_p8_f32): Likewise.
1669         (vreinterpret_p8_u8): Likewise.
1670         (vreinterpret_p8_u16): Likewise.
1671         (vreinterpret_p8_u32): Likewise.
1672         (vreinterpret_p8_u64): Likewise.
1673         (vreinterpret_p8_p16): Likewise.
1674         (vreinterpretq_p8_s8): Likewise.
1675         (vreinterpretq_p8_s16): Likewise.
1676         (vreinterpretq_p8_s32): Likewise.
1677         (vreinterpretq_p8_s64): Likewise.
1678         (vreinterpretq_p8_f32): Likewise.
1679         (vreinterpretq_p8_u8): Likewise.
1680         (vreinterpretq_p8_u16): Likewise.
1681         (vreinterpretq_p8_u32): Likewise.
1682         (vreinterpretq_p8_u64): Likewise.
1683         (vreinterpretq_p8_p16): Likewise.
1684         (vreinterpret_p16_s8): Likewise.
1685         (vreinterpret_p16_s16): Likewise.
1686         (vreinterpret_p16_s32): Likewise.
1687         (vreinterpret_p16_s64): Likewise.
1688         (vreinterpret_p16_f32): Likewise.
1689         (vreinterpret_p16_u8): Likewise.
1690         (vreinterpret_p16_u16): Likewise.
1691         (vreinterpret_p16_u32): Likewise.
1692         (vreinterpret_p16_u64): Likewise.
1693         (vreinterpret_p16_p8): Likewise.
1694         (vreinterpretq_p16_s8): Likewise.
1695         (vreinterpretq_p16_s16): Likewise.
1696         (vreinterpretq_p16_s32): Likewise.
1697         (vreinterpretq_p16_s64): Likewise.
1698         (vreinterpretq_p16_f32): Likewise.
1699         (vreinterpretq_p16_u8): Likewise.
1700         (vreinterpretq_p16_u16): Likewise.
1701         (vreinterpretq_p16_u32): Likewise.
1702         (vreinterpretq_p16_u64): Likewise.
1703         (vreinterpretq_p16_p8): Likewise.
1704         (vreinterpret_f32_s8): Likewise.
1705         (vreinterpret_f32_s16): Likewise.
1706         (vreinterpret_f32_s32): Likewise.
1707         (vreinterpret_f32_s64): Likewise.
1708         (vreinterpret_f32_u8): Likewise.
1709         (vreinterpret_f32_u16): Likewise.
1710         (vreinterpret_f32_u32): Likewise.
1711         (vreinterpret_f32_u64): Likewise.
1712         (vreinterpret_f32_p8): Likewise.
1713         (vreinterpret_f32_p16): Likewise.
1714         (vreinterpretq_f32_s8): Likewise.
1715         (vreinterpretq_f32_s16): Likewise.
1716         (vreinterpretq_f32_s32): Likewise.
1717         (vreinterpretq_f32_s64): Likewise.
1718         (vreinterpretq_f32_u8): Likewise.
1719         (vreinterpretq_f32_u16): Likewise.
1720         (vreinterpretq_f32_u32): Likewise.
1721         (vreinterpretq_f32_u64): Likewise.
1722         (vreinterpretq_f32_p8): Likewise.
1723         (vreinterpretq_f32_p16): Likewise.
1724         (vreinterpret_s64_s8): Likewise.
1725         (vreinterpret_s64_s16): Likewise.
1726         (vreinterpret_s64_s32): Likewise.
1727         (vreinterpret_s64_f32): Likewise.
1728         (vreinterpret_s64_u8): Likewise.
1729         (vreinterpret_s64_u16): Likewise.
1730         (vreinterpret_s64_u32): Likewise.
1731         (vreinterpret_s64_u64): Likewise.
1732         (vreinterpret_s64_p8): Likewise.
1733         (vreinterpret_s64_p16): Likewise.
1734         (vreinterpretq_s64_s8): Likewise.
1735         (vreinterpretq_s64_s16): Likewise.
1736         (vreinterpretq_s64_s32): Likewise.
1737         (vreinterpretq_s64_f32): Likewise.
1738         (vreinterpretq_s64_u8): Likewise.
1739         (vreinterpretq_s64_u16): Likewise.
1740         (vreinterpretq_s64_u32): Likewise.
1741         (vreinterpretq_s64_u64): Likewise.
1742         (vreinterpretq_s64_p8): Likewise.
1743         (vreinterpretq_s64_p16): Likewise.
1744         (vreinterpret_u64_s8): Likewise.
1745         (vreinterpret_u64_s16): Likewise.
1746         (vreinterpret_u64_s32): Likewise.
1747         (vreinterpret_u64_s64): Likewise.
1748         (vreinterpret_u64_f32): Likewise.
1749         (vreinterpret_u64_u8): Likewise.
1750         (vreinterpret_u64_u16): Likewise.
1751         (vreinterpret_u64_u32): Likewise.
1752         (vreinterpret_u64_p8): Likewise.
1753         (vreinterpret_u64_p16): Likewise.
1754         (vreinterpretq_u64_s8): Likewise.
1755         (vreinterpretq_u64_s16): Likewise.
1756         (vreinterpretq_u64_s32): Likewise.
1757         (vreinterpretq_u64_s64): Likewise.
1758         (vreinterpretq_u64_f32): Likewise.
1759         (vreinterpretq_u64_u8): Likewise.
1760         (vreinterpretq_u64_u16): Likewise.
1761         (vreinterpretq_u64_u32): Likewise.
1762         (vreinterpretq_u64_p8): Likewise.
1763         (vreinterpretq_u64_p16): Likewise.
1764         (vreinterpret_s8_s16): Likewise.
1765         (vreinterpret_s8_s32): Likewise.
1766         (vreinterpret_s8_s64): Likewise.
1767         (vreinterpret_s8_f32): Likewise.
1768         (vreinterpret_s8_u8): Likewise.
1769         (vreinterpret_s8_u16): Likewise.
1770         (vreinterpret_s8_u32): Likewise.
1771         (vreinterpret_s8_u64): Likewise.
1772         (vreinterpret_s8_p8): Likewise.
1773         (vreinterpret_s8_p16): Likewise.
1774         (vreinterpretq_s8_s16): Likewise.
1775         (vreinterpretq_s8_s32): Likewise.
1776         (vreinterpretq_s8_s64): Likewise.
1777         (vreinterpretq_s8_f32): Likewise.
1778         (vreinterpretq_s8_u8): Likewise.
1779         (vreinterpretq_s8_u16): Likewise.
1780         (vreinterpretq_s8_u32): Likewise.
1781         (vreinterpretq_s8_u64): Likewise.
1782         (vreinterpretq_s8_p8): Likewise.
1783         (vreinterpretq_s8_p16): Likewise.
1784         (vreinterpret_s16_s8): Likewise.
1785         (vreinterpret_s16_s32): Likewise.
1786         (vreinterpret_s16_s64): Likewise.
1787         (vreinterpret_s16_f32): Likewise.
1788         (vreinterpret_s16_u8): Likewise.
1789         (vreinterpret_s16_u16): Likewise.
1790         (vreinterpret_s16_u32): Likewise.
1791         (vreinterpret_s16_u64): Likewise.
1792         (vreinterpret_s16_p8): Likewise.
1793         (vreinterpret_s16_p16): Likewise.
1794         (vreinterpretq_s16_s8): Likewise.
1795         (vreinterpretq_s16_s32): Likewise.
1796         (vreinterpretq_s16_s64): Likewise.
1797         (vreinterpretq_s16_f32): Likewise.
1798         (vreinterpretq_s16_u8): Likewise.
1799         (vreinterpretq_s16_u16): Likewise.
1800         (vreinterpretq_s16_u32): Likewise.
1801         (vreinterpretq_s16_u64): Likewise.
1802         (vreinterpretq_s16_p8): Likewise.
1803         (vreinterpretq_s16_p16): Likewise.
1804         (vreinterpret_s32_s8): Likewise.
1805         (vreinterpret_s32_s16): Likewise.
1806         (vreinterpret_s32_s64): Likewise.
1807         (vreinterpret_s32_f32): Likewise.
1808         (vreinterpret_s32_u8): Likewise.
1809         (vreinterpret_s32_u16): Likewise.
1810         (vreinterpret_s32_u32): Likewise.
1811         (vreinterpret_s32_u64): Likewise.
1812         (vreinterpret_s32_p8): Likewise.
1813         (vreinterpret_s32_p16): Likewise.
1814         (vreinterpretq_s32_s8): Likewise.
1815         (vreinterpretq_s32_s16): Likewise.
1816         (vreinterpretq_s32_s64): Likewise.
1817         (vreinterpretq_s32_f32): Likewise.
1818         (vreinterpretq_s32_u8): Likewise.
1819         (vreinterpretq_s32_u16): Likewise.
1820         (vreinterpretq_s32_u32): Likewise.
1821         (vreinterpretq_s32_u64): Likewise.
1822         (vreinterpretq_s32_p8): Likewise.
1823         (vreinterpretq_s32_p16): Likewise.
1824         (vreinterpret_u8_s8): Likewise.
1825         (vreinterpret_u8_s16): Likewise.
1826         (vreinterpret_u8_s32): Likewise.
1827         (vreinterpret_u8_s64): Likewise.
1828         (vreinterpret_u8_f32): Likewise.
1829         (vreinterpret_u8_u16): Likewise.
1830         (vreinterpret_u8_u32): Likewise.
1831         (vreinterpret_u8_u64): Likewise.
1832         (vreinterpret_u8_p8): Likewise.
1833         (vreinterpret_u8_p16): Likewise.
1834         (vreinterpretq_u8_s8): Likewise.
1835         (vreinterpretq_u8_s16): Likewise.
1836         (vreinterpretq_u8_s32): Likewise.
1837         (vreinterpretq_u8_s64): Likewise.
1838         (vreinterpretq_u8_f32): Likewise.
1839         (vreinterpretq_u8_u16): Likewise.
1840         (vreinterpretq_u8_u32): Likewise.
1841         (vreinterpretq_u8_u64): Likewise.
1842         (vreinterpretq_u8_p8): Likewise.
1843         (vreinterpretq_u8_p16): Likewise.
1844         (vreinterpret_u16_s8): Likewise.
1845         (vreinterpret_u16_s16): Likewise.
1846         (vreinterpret_u16_s32): Likewise.
1847         (vreinterpret_u16_s64): Likewise.
1848         (vreinterpret_u16_f32): Likewise.
1849         (vreinterpret_u16_u8): Likewise.
1850         (vreinterpret_u16_u32): Likewise.
1851         (vreinterpret_u16_u64): Likewise.
1852         (vreinterpret_u16_p8): Likewise.
1853         (vreinterpret_u16_p16): Likewise.
1854         (vreinterpretq_u16_s8): Likewise.
1855         (vreinterpretq_u16_s16): Likewise.
1856         (vreinterpretq_u16_s32): Likewise.
1857         (vreinterpretq_u16_s64): Likewise.
1858         (vreinterpretq_u16_f32): Likewise.
1859         (vreinterpretq_u16_u8): Likewise.
1860         (vreinterpretq_u16_u32): Likewise.
1861         (vreinterpretq_u16_u64): Likewise.
1862         (vreinterpretq_u16_p8): Likewise.
1863         (vreinterpretq_u16_p16): Likewise.
1864         (vreinterpret_u32_s8): Likewise.
1865         (vreinterpret_u32_s16): Likewise.
1866         (vreinterpret_u32_s32): Likewise.
1867         (vreinterpret_u32_s64): Likewise.
1868         (vreinterpret_u32_f32): Likewise.
1869         (vreinterpret_u32_u8): Likewise.
1870         (vreinterpret_u32_u16): Likewise.
1871         (vreinterpret_u32_u64): Likewise.
1872         (vreinterpret_u32_p8): Likewise.
1873         (vreinterpret_u32_p16): Likewise.
1874         (vreinterpretq_u32_s8): Likewise.
1875         (vreinterpretq_u32_s16): Likewise.
1876         (vreinterpretq_u32_s32): Likewise.
1877         (vreinterpretq_u32_s64): Likewise.
1878         (vreinterpretq_u32_f32): Likewise.
1879         (vreinterpretq_u32_u8): Likewise.
1880         (vreinterpretq_u32_u16): Likewise.
1881         (vreinterpretq_u32_u64): Likewise.
1882         (vreinterpretq_u32_p8): Likewise.
1883         (vreinterpretq_u32_p16): Likewise.
1884
1885 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1886
1887         Backport from trunk r209640.
1888         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1889
1890         * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
1891         Pattern extended.
1892         * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
1893         extended.
1894         (sqabs): Likewise.
1895         * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
1896         (vqnegd_s64): Likewise.
1897         (vqabs_s64): Likewise.
1898         (vqabsd_s64): Likewise.
1899
1900 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1901
1902         Backport from trunk r209627, 209636.
1903         2014-04-22  Renlin  <renlin.li@arm.com>
1904                     Jiong Wang  <jiong.wang@arm.com>
1905
1906         * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
1907         * config/aarch64/aarch64.c (aarch64_layout_frame)
1908         (aarch64_initial_elimination_offset): Likewise.
1909
1910         2014-04-22  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1911
1912         * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
1913         Fix indentation.
1914
1915 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1916
1917         Backport from trunk r209618.
1918         2014-04-22  Renlin Li  <Renlin.Li@arm.com>
1919
1920         * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
1921         the output asm format.
1922
1923 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1924
1925         Backport from trunk r209617.
1926         2014-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
1927
1928         * config/aarch64/aarch64-simd.md
1929         (aarch64_cm<optab>di): Always split.
1930         (*aarch64_cm<optab>di): New.
1931         (aarch64_cmtstdi): Always split.
1932         (*aarch64_cmtstdi): New.
1933
1934 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1935
1936         Backport from trunk r209615.
1937         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1938
1939         * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
1940         restrictions on core registers for DImode values in Thumb2.
1941
1942 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1943
1944         Backport from trunk r209613, r209614.
1945         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1946
1947         * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
1948         * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
1949
1950         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1951
1952         * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
1953         (*iordi_notzesidi_di): Likewise.
1954         (*iordi_notsesidi_di): Likewise.
1955
1956 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1957
1958         Backport from trunk r209561.
1959         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1960
1961         * config/arm/arm-protos.h (tune_params): New struct members.
1962         * config/arm/arm.c: Initialise tune_params per processor.
1963         (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
1964         for speed, based on new tune_params.
1965
1966 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1967
1968         Backport from trunk r209559.
1969         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1970
1971         * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
1972         added.
1973         * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
1974         macro.
1975         * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
1976         corrected.
1977         * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
1978         * config/aarch64/arm_neon.h (vrnd_f64): Added.
1979         (vrnda_f64): Likewise.
1980         (vrndi_f64): Likewise.
1981         (vrndm_f64): Likewise.
1982         (vrndn_f64): Likewise.
1983         (vrndp_f64): Likewise.
1984         (vrndx_f64): Likewise.
1985
1986 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1987
1988         Backport from trunk r209419.
1989         2014-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1990
1991         PR rtl-optimization/60663
1992         * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
1993         avoid 0 cost.
1994
1995 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1996
1997         Backport from trunk r209457.
1998         2014-04-16  Andrew  Pinski  <apinski@cavium.com>
1999
2000         * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
2001         definition.
2002
2003 2014-05-19  Yvan Roux  <yvan.roux@linaro.org>
2004
2005         * LINARO-VERSION: Bump version.
2006
2007 2014-05-14  Yvan Roux  <yvan.roux@linaro.org>
2008
2009         GCC Linaro 4.9-2014.05 released.
2010         * LINARO-VERSION: Update.
2011
2012 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
2013
2014         Backport from trunk r209889.
2015         2014-04-29  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
2016
2017         * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
2018
2019 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
2020
2021         Backport from trunk r209556.
2022         2014-04-22  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
2023
2024         * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
2025         GET_MODE_SIZE argument is enum machine_mode.
2026
2027 2014-04-28  Yvan Roux  <yvan.roux@linaro.org>
2028
2029         * LINARO-VERSION: Bump version.
2030
2031 2014-04-22  Yvan Roux  <yvan.roux@linaro.org>
2032
2033         GCC Linaro 4.9-2014.04 released.
2034         * LINARO-VERSION: New file.
2035         * configure.ac: Add Linaro version string.