1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
66 /* If this is nonzero, we do not bother generating VOLATILE
67 around volatile memory references, and we are willing to
68 output indirect addresses. If cse is to follow, we reject
69 indirect addresses so a useful potential cse is generated;
70 if it is used only once, instruction combination will produce
71 the same indirect address eventually. */
74 static bool block_move_libcall_safe_for_call_parm (void);
75 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
76 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
);
78 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
79 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
80 static rtx_insn
*compress_float_constant (rtx
, rtx
);
81 static rtx
get_subtarget (rtx
);
82 static void store_constructor_field (rtx
, unsigned HOST_WIDE_INT
,
83 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
84 unsigned HOST_WIDE_INT
, machine_mode
,
85 tree
, int, alias_set_type
, bool);
86 static void store_constructor (tree
, rtx
, int, HOST_WIDE_INT
, bool);
87 static rtx
store_field (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
,
88 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
89 machine_mode
, tree
, alias_set_type
, bool, bool);
91 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
93 static int is_aligning_offset (const_tree
, const_tree
);
94 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
95 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
97 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
99 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
100 profile_probability
);
101 static rtx
const_vector_from_tree (tree
);
102 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
103 static tree
tree_expr_size (const_tree
);
104 static HOST_WIDE_INT
int_expr_size (tree
);
105 static void convert_mode_scalar (rtx
, rtx
, int);
108 /* This is run to set up which modes can be used
109 directly in memory and to initialize the block move optab. It is run
110 at the beginning of compilation and when the target is reinitialized. */
113 init_expr_target (void)
120 /* Try indexing by frame ptr and try by stack ptr.
121 It is known that on the Convex the stack ptr isn't a valid index.
122 With luck, one or the other is valid on any machine. */
123 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
124 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
126 /* A scratch register we can modify in-place below to avoid
127 useless RTL allocations. */
128 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
130 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
131 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
132 PATTERN (insn
) = pat
;
134 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
135 mode
= (machine_mode
) ((int) mode
+ 1))
139 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
140 PUT_MODE (mem
, mode
);
141 PUT_MODE (mem1
, mode
);
143 /* See if there is some register that can be used in this mode and
144 directly loaded or stored from memory. */
146 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
147 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
148 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
151 if (! HARD_REGNO_MODE_OK (regno
, mode
))
154 set_mode_and_regno (reg
, mode
, regno
);
157 SET_DEST (pat
) = reg
;
158 if (recog (pat
, insn
, &num_clobbers
) >= 0)
159 direct_load
[(int) mode
] = 1;
161 SET_SRC (pat
) = mem1
;
162 SET_DEST (pat
) = reg
;
163 if (recog (pat
, insn
, &num_clobbers
) >= 0)
164 direct_load
[(int) mode
] = 1;
167 SET_DEST (pat
) = mem
;
168 if (recog (pat
, insn
, &num_clobbers
) >= 0)
169 direct_store
[(int) mode
] = 1;
172 SET_DEST (pat
) = mem1
;
173 if (recog (pat
, insn
, &num_clobbers
) >= 0)
174 direct_store
[(int) mode
] = 1;
178 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
180 opt_scalar_float_mode mode_iter
;
181 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
183 scalar_float_mode mode
= mode_iter
.require ();
184 scalar_float_mode srcmode
;
185 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
189 ic
= can_extend_p (mode
, srcmode
, 0);
190 if (ic
== CODE_FOR_nothing
)
193 PUT_MODE (mem
, srcmode
);
195 if (insn_operand_matches (ic
, 1, mem
))
196 float_extend_from_mem
[mode
][srcmode
] = true;
201 /* This is run at the start of compiling a function. */
206 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
209 /* Copy data from FROM to TO, where the machine modes are not the same.
210 Both modes may be integer, or both may be floating, or both may be
212 UNSIGNEDP should be nonzero if FROM is an unsigned type.
213 This causes zero-extension instead of sign-extension. */
216 convert_move (rtx to
, rtx from
, int unsignedp
)
218 machine_mode to_mode
= GET_MODE (to
);
219 machine_mode from_mode
= GET_MODE (from
);
221 gcc_assert (to_mode
!= BLKmode
);
222 gcc_assert (from_mode
!= BLKmode
);
224 /* If the source and destination are already the same, then there's
229 /* If FROM is a SUBREG that indicates that we have already done at least
230 the required extension, strip it. We don't handle such SUBREGs as
233 scalar_int_mode to_int_mode
;
234 if (GET_CODE (from
) == SUBREG
235 && SUBREG_PROMOTED_VAR_P (from
)
236 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
237 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
238 >= GET_MODE_PRECISION (to_int_mode
))
239 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
240 from
= gen_lowpart (to_int_mode
, from
), from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 gcc_assert (GET_MODE_BITSIZE (from_mode
) == GET_MODE_BITSIZE (to_mode
));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && ! HARD_REGNO_MODE_OK (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
696 && (!HARD_REGISTER_P (x
)
697 || HARD_REGNO_MODE_OK (REGNO (x
), int_mode
))
698 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
699 return gen_lowpart (int_mode
, x
);
701 /* Converting from integer constant into mode is always equivalent to an
703 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
705 gcc_assert (GET_MODE_BITSIZE (mode
) == GET_MODE_BITSIZE (oldmode
));
706 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
709 temp
= gen_reg_rtx (mode
);
710 convert_move (temp
, x
, unsignedp
);
714 /* Return the largest alignment we can use for doing a move (or store)
715 of MAX_PIECES. ALIGN is the largest alignment we could use. */
718 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
720 scalar_int_mode tmode
721 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
723 if (align
>= GET_MODE_ALIGNMENT (tmode
))
724 align
= GET_MODE_ALIGNMENT (tmode
);
727 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
728 opt_scalar_int_mode mode_iter
;
729 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
731 tmode
= mode_iter
.require ();
732 if (GET_MODE_SIZE (tmode
) > max_pieces
733 || SLOW_UNALIGNED_ACCESS (tmode
, align
))
738 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
744 /* Return the widest integer mode that is narrower than SIZE bytes. */
746 static scalar_int_mode
747 widest_int_mode_for_size (unsigned int size
)
749 scalar_int_mode result
= NARROWEST_INT_MODE
;
751 gcc_checking_assert (size
> 1);
753 opt_scalar_int_mode tmode
;
754 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
755 if (GET_MODE_SIZE (tmode
.require ()) < size
)
756 result
= tmode
.require ();
761 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
762 and should be performed piecewise. */
765 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
766 enum by_pieces_operation op
)
768 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
769 optimize_insn_for_speed_p ());
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
777 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
779 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
782 /* Return number of insns required to perform operation OP by pieces
783 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
785 unsigned HOST_WIDE_INT
786 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
787 unsigned int max_size
, by_pieces_operation op
)
789 unsigned HOST_WIDE_INT n_insns
= 0;
791 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
793 while (max_size
> 1 && l
> 0)
795 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
796 enum insn_code icode
;
798 unsigned int modesize
= GET_MODE_SIZE (mode
);
800 icode
= optab_handler (mov_optab
, mode
);
801 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
803 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
811 case COMPARE_BY_PIECES
:
812 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
813 int batch_ops
= 4 * batch
- 1;
814 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
815 n_insns
+= full
* batch_ops
;
816 if (n_pieces
% batch
!= 0)
829 /* Used when performing piecewise block operations, holds information
830 about one of the memory objects involved. The member functions
831 can be used to generate code for loading from the object and
832 updating the address when iterating. */
836 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
839 /* The address of the object. Can differ from that seen in the
840 MEM rtx if we copied the address to a register. */
842 /* Nonzero if the address on the object has an autoincrement already,
843 signifies whether that was an increment or decrement. */
844 signed char m_addr_inc
;
845 /* Nonzero if we intend to use autoinc without the address already
846 having autoinc form. We will insert add insns around each memory
847 reference, expecting later passes to form autoinc addressing modes.
848 The only supported options are predecrement and postincrement. */
849 signed char m_explicit_inc
;
850 /* True if we have either of the two possible cases of using
853 /* True if this is an address to be used for load operations rather
857 /* Optionally, a function to obtain constants for any given offset into
858 the objects, and data associated with it. */
859 by_pieces_constfn m_constfn
;
862 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
863 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
864 void increment_address (HOST_WIDE_INT
);
865 void maybe_predec (HOST_WIDE_INT
);
866 void maybe_postinc (HOST_WIDE_INT
);
867 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
874 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
875 true if the operation to be performed on this object is a load
876 rather than a store. For stores, OBJ can be NULL, in which case we
877 assume the operation is a stack push. For loads, the optional
878 CONSTFN and its associated CFNDATA can be used in place of the
881 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
883 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
889 rtx addr
= XEXP (obj
, 0);
890 rtx_code code
= GET_CODE (addr
);
892 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
893 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
896 m_addr_inc
= dec
? -1 : 1;
898 /* While we have always looked for these codes here, the code
899 implementing the memory operation has never handled them.
900 Support could be added later if necessary or beneficial. */
901 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
909 if (STACK_GROWS_DOWNWARD
)
915 gcc_assert (constfn
!= NULL
);
919 gcc_assert (is_load
);
922 /* Decide whether to use autoinc for an address involved in a memory op.
923 MODE is the mode of the accesses, REVERSE is true if we've decided to
924 perform the operation starting from the end, and LEN is the length of
925 the operation. Don't override an earlier decision to set m_auto. */
928 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
931 if (m_auto
|| m_obj
== NULL_RTX
)
934 bool use_predec
= (m_is_load
935 ? USE_LOAD_PRE_DECREMENT (mode
)
936 : USE_STORE_PRE_DECREMENT (mode
));
937 bool use_postinc
= (m_is_load
938 ? USE_LOAD_POST_INCREMENT (mode
)
939 : USE_STORE_POST_INCREMENT (mode
));
940 machine_mode addr_mode
= get_address_mode (m_obj
);
942 if (use_predec
&& reverse
)
944 m_addr
= copy_to_mode_reg (addr_mode
,
945 plus_constant (addr_mode
,
950 else if (use_postinc
&& !reverse
)
952 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
956 else if (CONSTANT_P (m_addr
))
957 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
960 /* Adjust the address to refer to the data at OFFSET in MODE. If we
961 are using autoincrement for this address, we don't add the offset,
962 but we still modify the MEM's properties. */
965 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
968 return m_constfn (m_cfndata
, offset
, mode
);
969 if (m_obj
== NULL_RTX
)
972 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
974 return adjust_address (m_obj
, mode
, offset
);
977 /* Emit an add instruction to increment the address by SIZE. */
980 pieces_addr::increment_address (HOST_WIDE_INT size
)
982 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
983 emit_insn (gen_add2_insn (m_addr
, amount
));
986 /* If we are supposed to decrement the address after each access, emit code
987 to do so now. Increment by SIZE (which has should have the correct sign
991 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
993 if (m_explicit_inc
>= 0)
995 gcc_assert (HAVE_PRE_DECREMENT
);
996 increment_address (size
);
999 /* If we are supposed to decrement the address after each access, emit code
1000 to do so now. Increment by SIZE. */
1003 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1005 if (m_explicit_inc
<= 0)
1007 gcc_assert (HAVE_POST_INCREMENT
);
1008 increment_address (size
);
1011 /* This structure is used by do_op_by_pieces to describe the operation
1014 class op_by_pieces_d
1017 pieces_addr m_to
, m_from
;
1018 unsigned HOST_WIDE_INT m_len
;
1019 HOST_WIDE_INT m_offset
;
1020 unsigned int m_align
;
1021 unsigned int m_max_size
;
1024 /* Virtual functions, overriden by derived classes for the specific
1026 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1027 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1028 virtual void finish_mode (machine_mode
)
1033 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1034 unsigned HOST_WIDE_INT
, unsigned int);
1038 /* The constructor for an op_by_pieces_d structure. We require two
1039 objects named TO and FROM, which are identified as loads or stores
1040 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1041 and its associated FROM_CFN_DATA can be used to replace loads with
1042 constant values. LEN describes the length of the operation. */
1044 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1045 rtx from
, bool from_load
,
1046 by_pieces_constfn from_cfn
,
1047 void *from_cfn_data
,
1048 unsigned HOST_WIDE_INT len
,
1050 : m_to (to
, to_load
, NULL
, NULL
),
1051 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1052 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1054 int toi
= m_to
.get_addr_inc ();
1055 int fromi
= m_from
.get_addr_inc ();
1056 if (toi
>= 0 && fromi
>= 0)
1058 else if (toi
<= 0 && fromi
<= 0)
1063 m_offset
= m_reverse
? len
: 0;
1064 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1065 from
? MEM_ALIGN (from
) : align
);
1067 /* If copying requires more than two move insns,
1068 copy addresses to registers (to make displacements shorter)
1069 and use post-increment if available. */
1070 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1072 /* Find the mode of the largest comparison. */
1073 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1075 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1076 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1079 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1083 /* This function contains the main loop used for expanding a block
1084 operation. First move what we can in the largest integer mode,
1085 then go to successively smaller modes. For every access, call
1086 GENFUN with the two operands and the EXTRA_DATA. */
1089 op_by_pieces_d::run ()
1091 while (m_max_size
> 1 && m_len
> 0)
1093 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1095 if (prepare_mode (mode
, m_align
))
1097 unsigned int size
= GET_MODE_SIZE (mode
);
1098 rtx to1
= NULL_RTX
, from1
;
1100 while (m_len
>= size
)
1105 to1
= m_to
.adjust (mode
, m_offset
);
1106 from1
= m_from
.adjust (mode
, m_offset
);
1108 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1109 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 generate (to1
, from1
, mode
);
1113 m_to
.maybe_postinc (size
);
1114 m_from
.maybe_postinc (size
);
1125 m_max_size
= GET_MODE_SIZE (mode
);
1128 /* The code above should have handled everything. */
1129 gcc_assert (!m_len
);
1132 /* Derived class from op_by_pieces_d, providing support for block move
1135 class move_by_pieces_d
: public op_by_pieces_d
1137 insn_gen_fn m_gen_fun
;
1138 void generate (rtx
, rtx
, machine_mode
);
1139 bool prepare_mode (machine_mode
, unsigned int);
1142 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1144 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1147 rtx
finish_endp (int);
1150 /* Return true if MODE can be used for a set of copies, given an
1151 alignment ALIGN. Prepare whatever data is necessary for later
1152 calls to generate. */
1155 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1157 insn_code icode
= optab_handler (mov_optab
, mode
);
1158 m_gen_fun
= GEN_FCN (icode
);
1159 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1162 /* A callback used when iterating for a compare_by_pieces_operation.
1163 OP0 and OP1 are the values that have been loaded and should be
1164 compared in MODE. If OP0 is NULL, this means we should generate a
1165 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1166 gen function that should be used to generate the mode. */
1169 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1170 machine_mode mode ATTRIBUTE_UNUSED
)
1172 #ifdef PUSH_ROUNDING
1173 if (op0
== NULL_RTX
)
1175 emit_single_push_insn (mode
, op1
, NULL
);
1179 emit_insn (m_gen_fun (op0
, op1
));
1182 /* Perform the final adjustment at the end of a string to obtain the
1183 correct return value for the block operation. If ENDP is 1 return
1184 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1185 end minus one byte ala stpcpy. */
1188 move_by_pieces_d::finish_endp (int endp
)
1190 gcc_assert (!m_reverse
);
1193 m_to
.maybe_postinc (-1);
1196 return m_to
.adjust (QImode
, m_offset
);
1199 /* Generate several move instructions to copy LEN bytes from block FROM to
1200 block TO. (These are MEM rtx's with BLKmode).
1202 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1203 used to push FROM to the stack.
1205 ALIGN is maximum stack alignment we can assume.
1207 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1208 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1212 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1213 unsigned int align
, int endp
)
1215 #ifndef PUSH_ROUNDING
1220 move_by_pieces_d
data (to
, from
, len
, align
);
1225 return data
.finish_endp (endp
);
1230 /* Derived class from op_by_pieces_d, providing support for block move
1233 class store_by_pieces_d
: public op_by_pieces_d
1235 insn_gen_fn m_gen_fun
;
1236 void generate (rtx
, rtx
, machine_mode
);
1237 bool prepare_mode (machine_mode
, unsigned int);
1240 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1241 unsigned HOST_WIDE_INT len
, unsigned int align
)
1242 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1245 rtx
finish_endp (int);
1248 /* Return true if MODE can be used for a set of stores, given an
1249 alignment ALIGN. Prepare whatever data is necessary for later
1250 calls to generate. */
1253 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1255 insn_code icode
= optab_handler (mov_optab
, mode
);
1256 m_gen_fun
= GEN_FCN (icode
);
1257 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1260 /* A callback used when iterating for a store_by_pieces_operation.
1261 OP0 and OP1 are the values that have been loaded and should be
1262 compared in MODE. If OP0 is NULL, this means we should generate a
1263 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1264 gen function that should be used to generate the mode. */
1267 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1269 emit_insn (m_gen_fun (op0
, op1
));
1272 /* Perform the final adjustment at the end of a string to obtain the
1273 correct return value for the block operation. If ENDP is 1 return
1274 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1275 end minus one byte ala stpcpy. */
1278 store_by_pieces_d::finish_endp (int endp
)
1280 gcc_assert (!m_reverse
);
1283 m_to
.maybe_postinc (-1);
1286 return m_to
.adjust (QImode
, m_offset
);
1289 /* Determine whether the LEN bytes generated by CONSTFUN can be
1290 stored to memory using several move instructions. CONSTFUNDATA is
1291 a pointer which will be passed as argument in every CONSTFUN call.
1292 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1293 a memset operation and false if it's a copy of a constant string.
1294 Return nonzero if a call to store_by_pieces should succeed. */
1297 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1298 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1299 void *constfundata
, unsigned int align
, bool memsetp
)
1301 unsigned HOST_WIDE_INT l
;
1302 unsigned int max_size
;
1303 HOST_WIDE_INT offset
= 0;
1304 enum insn_code icode
;
1306 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1307 rtx cst ATTRIBUTE_UNUSED
;
1312 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1316 optimize_insn_for_speed_p ()))
1319 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1321 /* We would first store what we can in the largest integer mode, then go to
1322 successively smaller modes. */
1325 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1329 max_size
= STORE_MAX_PIECES
+ 1;
1330 while (max_size
> 1 && l
> 0)
1332 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1334 icode
= optab_handler (mov_optab
, mode
);
1335 if (icode
!= CODE_FOR_nothing
1336 && align
>= GET_MODE_ALIGNMENT (mode
))
1338 unsigned int size
= GET_MODE_SIZE (mode
);
1345 cst
= (*constfun
) (constfundata
, offset
, mode
);
1346 if (!targetm
.legitimate_constant_p (mode
, cst
))
1356 max_size
= GET_MODE_SIZE (mode
);
1359 /* The code above should have handled everything. */
1366 /* Generate several move instructions to store LEN bytes generated by
1367 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1368 pointer which will be passed as argument in every CONSTFUN call.
1369 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1370 a memset operation and false if it's a copy of a constant string.
1371 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1372 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1376 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1377 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1378 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1382 gcc_assert (endp
!= 2);
1386 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1388 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1389 optimize_insn_for_speed_p ()));
1391 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1395 return data
.finish_endp (endp
);
1400 /* Callback routine for clear_by_pieces.
1401 Return const0_rtx unconditionally. */
1404 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1409 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1410 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1413 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1418 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1422 /* Context used by compare_by_pieces_genfn. It stores the fail label
1423 to jump to in case of miscomparison, and for branch ratios greater than 1,
1424 it stores an accumulator and the current and maximum counts before
1425 emitting another branch. */
1427 class compare_by_pieces_d
: public op_by_pieces_d
1429 rtx_code_label
*m_fail_label
;
1431 int m_count
, m_batch
;
1433 void generate (rtx
, rtx
, machine_mode
);
1434 bool prepare_mode (machine_mode
, unsigned int);
1435 void finish_mode (machine_mode
);
1437 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1438 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1439 rtx_code_label
*fail_label
)
1440 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1442 m_fail_label
= fail_label
;
1446 /* A callback used when iterating for a compare_by_pieces_operation.
1447 OP0 and OP1 are the values that have been loaded and should be
1448 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1449 context structure. */
1452 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1456 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1457 true, OPTAB_LIB_WIDEN
);
1459 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1460 true, OPTAB_LIB_WIDEN
);
1461 m_accumulator
= temp
;
1463 if (++m_count
< m_batch
)
1467 op0
= m_accumulator
;
1469 m_accumulator
= NULL_RTX
;
1471 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1472 m_fail_label
, profile_probability::uninitialized ());
1475 /* Return true if MODE can be used for a set of moves and comparisons,
1476 given an alignment ALIGN. Prepare whatever data is necessary for
1477 later calls to generate. */
1480 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1482 insn_code icode
= optab_handler (mov_optab
, mode
);
1483 if (icode
== CODE_FOR_nothing
1484 || align
< GET_MODE_ALIGNMENT (mode
)
1485 || !can_compare_p (EQ
, mode
, ccp_jump
))
1487 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1490 m_accumulator
= NULL_RTX
;
1495 /* Called after expanding a series of comparisons in MODE. If we have
1496 accumulated results for which we haven't emitted a branch yet, do
1500 compare_by_pieces_d::finish_mode (machine_mode mode
)
1502 if (m_accumulator
!= NULL_RTX
)
1503 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1504 NULL_RTX
, NULL
, m_fail_label
,
1505 profile_probability::uninitialized ());
1508 /* Generate several move instructions to compare LEN bytes from blocks
1509 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1511 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1512 used to push FROM to the stack.
1514 ALIGN is maximum stack alignment we can assume.
1516 Optionally, the caller can pass a constfn and associated data in A1_CFN
1517 and A1_CFN_DATA. describing that the second operand being compared is a
1518 known constant and how to obtain its data. */
1521 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1522 rtx target
, unsigned int align
,
1523 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1525 rtx_code_label
*fail_label
= gen_label_rtx ();
1526 rtx_code_label
*end_label
= gen_label_rtx ();
1528 if (target
== NULL_RTX
1529 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1530 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1532 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1537 emit_move_insn (target
, const0_rtx
);
1538 emit_jump (end_label
);
1540 emit_label (fail_label
);
1541 emit_move_insn (target
, const1_rtx
);
1542 emit_label (end_label
);
1547 /* Emit code to move a block Y to a block X. This may be done with
1548 string-move instructions, with multiple scalar move instructions,
1549 or with a library call.
1551 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1552 SIZE is an rtx that says how long they are.
1553 ALIGN is the maximum alignment we can assume they have.
1554 METHOD describes what kind of copy this is, and what mechanisms may be used.
1555 MIN_SIZE is the minimal size of block to move
1556 MAX_SIZE is the maximal size of block to move, if it can not be represented
1557 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1559 Return the address of the new block, if memcpy is called and returns it,
1563 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1564 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1565 unsigned HOST_WIDE_INT min_size
,
1566 unsigned HOST_WIDE_INT max_size
,
1567 unsigned HOST_WIDE_INT probable_max_size
)
1574 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1579 case BLOCK_OP_NORMAL
:
1580 case BLOCK_OP_TAILCALL
:
1581 may_use_call
= true;
1584 case BLOCK_OP_CALL_PARM
:
1585 may_use_call
= block_move_libcall_safe_for_call_parm ();
1587 /* Make inhibit_defer_pop nonzero around the library call
1588 to force it to pop the arguments right away. */
1592 case BLOCK_OP_NO_LIBCALL
:
1593 may_use_call
= false;
1600 gcc_assert (MEM_P (x
) && MEM_P (y
));
1601 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1602 gcc_assert (align
>= BITS_PER_UNIT
);
1604 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1605 block copy is more efficient for other large modes, e.g. DCmode. */
1606 x
= adjust_address (x
, BLKmode
, 0);
1607 y
= adjust_address (y
, BLKmode
, 0);
1609 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1610 can be incorrect is coming from __builtin_memcpy. */
1611 if (CONST_INT_P (size
))
1613 x
= shallow_copy_rtx (x
);
1614 y
= shallow_copy_rtx (y
);
1615 set_mem_size (x
, INTVAL (size
));
1616 set_mem_size (y
, INTVAL (size
));
1619 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1620 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1621 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1622 expected_align
, expected_size
,
1623 min_size
, max_size
, probable_max_size
))
1625 else if (may_use_call
1626 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1627 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1629 /* Since x and y are passed to a libcall, mark the corresponding
1630 tree EXPR as addressable. */
1631 tree y_expr
= MEM_EXPR (y
);
1632 tree x_expr
= MEM_EXPR (x
);
1634 mark_addressable (y_expr
);
1636 mark_addressable (x_expr
);
1637 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1638 method
== BLOCK_OP_TAILCALL
);
1642 emit_block_move_via_loop (x
, y
, size
, align
);
1644 if (method
== BLOCK_OP_CALL_PARM
)
1651 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1653 unsigned HOST_WIDE_INT max
, min
= 0;
1654 if (GET_CODE (size
) == CONST_INT
)
1655 min
= max
= UINTVAL (size
);
1657 max
= GET_MODE_MASK (GET_MODE (size
));
1658 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1662 /* A subroutine of emit_block_move. Returns true if calling the
1663 block move libcall will not clobber any parameters which may have
1664 already been placed on the stack. */
1667 block_move_libcall_safe_for_call_parm (void)
1669 #if defined (REG_PARM_STACK_SPACE)
1673 /* If arguments are pushed on the stack, then they're safe. */
1677 /* If registers go on the stack anyway, any argument is sure to clobber
1678 an outgoing argument. */
1679 #if defined (REG_PARM_STACK_SPACE)
1680 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1681 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1682 depend on its argument. */
1684 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1685 && REG_PARM_STACK_SPACE (fn
) != 0)
1689 /* If any argument goes in memory, then it might clobber an outgoing
1692 CUMULATIVE_ARGS args_so_far_v
;
1693 cumulative_args_t args_so_far
;
1696 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1697 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1698 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1700 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1701 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1703 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1704 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1706 if (!tmp
|| !REG_P (tmp
))
1708 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1710 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1717 /* A subroutine of emit_block_move. Expand a movmem pattern;
1718 return true if successful. */
1721 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1722 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1723 unsigned HOST_WIDE_INT min_size
,
1724 unsigned HOST_WIDE_INT max_size
,
1725 unsigned HOST_WIDE_INT probable_max_size
)
1727 int save_volatile_ok
= volatile_ok
;
1729 if (expected_align
< align
)
1730 expected_align
= align
;
1731 if (expected_size
!= -1)
1733 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1734 expected_size
= probable_max_size
;
1735 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1736 expected_size
= min_size
;
1739 /* Since this is a move insn, we don't care about volatility. */
1742 /* Try the most limited insn first, because there's no point
1743 including more than one in the machine description unless
1744 the more limited one has some advantage. */
1746 opt_scalar_int_mode mode_iter
;
1747 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1749 scalar_int_mode mode
= mode_iter
.require ();
1750 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1752 if (code
!= CODE_FOR_nothing
1753 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1754 here because if SIZE is less than the mode mask, as it is
1755 returned by the macro, it will definitely be less than the
1756 actual mode mask. Since SIZE is within the Pmode address
1757 space, we limit MODE to Pmode. */
1758 && ((CONST_INT_P (size
)
1759 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1760 <= (GET_MODE_MASK (mode
) >> 1)))
1761 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1762 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1764 struct expand_operand ops
[9];
1767 /* ??? When called via emit_block_move_for_call, it'd be
1768 nice if there were some way to inform the backend, so
1769 that it doesn't fail the expansion because it thinks
1770 emitting the libcall would be more efficient. */
1771 nops
= insn_data
[(int) code
].n_generator_args
;
1772 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1774 create_fixed_operand (&ops
[0], x
);
1775 create_fixed_operand (&ops
[1], y
);
1776 /* The check above guarantees that this size conversion is valid. */
1777 create_convert_operand_to (&ops
[2], size
, mode
, true);
1778 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1781 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1782 create_integer_operand (&ops
[5], expected_size
);
1786 create_integer_operand (&ops
[6], min_size
);
1787 /* If we can not represent the maximal size,
1788 make parameter NULL. */
1789 if ((HOST_WIDE_INT
) max_size
!= -1)
1790 create_integer_operand (&ops
[7], max_size
);
1792 create_fixed_operand (&ops
[7], NULL
);
1796 /* If we can not represent the maximal size,
1797 make parameter NULL. */
1798 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1799 create_integer_operand (&ops
[8], probable_max_size
);
1801 create_fixed_operand (&ops
[8], NULL
);
1803 if (maybe_expand_insn (code
, nops
, ops
))
1805 volatile_ok
= save_volatile_ok
;
1811 volatile_ok
= save_volatile_ok
;
1815 /* A subroutine of emit_block_move. Copy the data via an explicit
1816 loop. This is used only when libcalls are forbidden. */
1817 /* ??? It'd be nice to copy in hunks larger than QImode. */
1820 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1821 unsigned int align ATTRIBUTE_UNUSED
)
1823 rtx_code_label
*cmp_label
, *top_label
;
1824 rtx iter
, x_addr
, y_addr
, tmp
;
1825 machine_mode x_addr_mode
= get_address_mode (x
);
1826 machine_mode y_addr_mode
= get_address_mode (y
);
1827 machine_mode iter_mode
;
1829 iter_mode
= GET_MODE (size
);
1830 if (iter_mode
== VOIDmode
)
1831 iter_mode
= word_mode
;
1833 top_label
= gen_label_rtx ();
1834 cmp_label
= gen_label_rtx ();
1835 iter
= gen_reg_rtx (iter_mode
);
1837 emit_move_insn (iter
, const0_rtx
);
1839 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1840 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1841 do_pending_stack_adjust ();
1843 emit_jump (cmp_label
);
1844 emit_label (top_label
);
1846 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1847 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1849 if (x_addr_mode
!= y_addr_mode
)
1850 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1851 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1853 x
= change_address (x
, QImode
, x_addr
);
1854 y
= change_address (y
, QImode
, y_addr
);
1856 emit_move_insn (x
, y
);
1858 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1859 true, OPTAB_LIB_WIDEN
);
1861 emit_move_insn (iter
, tmp
);
1863 emit_label (cmp_label
);
1865 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1867 profile_probability::guessed_always ()
1868 .apply_scale (9, 10));
1871 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1872 TAILCALL is true if this is a tail call. */
1875 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1876 rtx size
, bool tailcall
)
1878 rtx dst_addr
, src_addr
;
1879 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1880 machine_mode size_mode
;
1882 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1883 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1884 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1886 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1887 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1888 src_tree
= make_tree (ptr_type_node
, src_addr
);
1890 size_mode
= TYPE_MODE (sizetype
);
1891 size
= convert_to_mode (size_mode
, size
, 1);
1892 size
= copy_to_mode_reg (size_mode
, size
);
1893 size_tree
= make_tree (sizetype
, size
);
1895 /* It is incorrect to use the libcall calling conventions for calls to
1896 memcpy/memmove/memcmp because they can be provided by the user. */
1897 tree fn
= builtin_decl_implicit (fncode
);
1898 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1899 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1901 return expand_call (call_expr
, NULL_RTX
, false);
1904 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1905 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1906 otherwise return null. */
1909 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1910 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1911 HOST_WIDE_INT align
)
1913 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1915 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1918 struct expand_operand ops
[5];
1919 create_output_operand (&ops
[0], target
, insn_mode
);
1920 create_fixed_operand (&ops
[1], arg1_rtx
);
1921 create_fixed_operand (&ops
[2], arg2_rtx
);
1922 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1923 TYPE_UNSIGNED (arg3_type
));
1924 create_integer_operand (&ops
[4], align
);
1925 if (maybe_expand_insn (icode
, 5, ops
))
1926 return ops
[0].value
;
1930 /* Expand a block compare between X and Y with length LEN using the
1931 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1932 of the expression that was used to calculate the length. ALIGN
1933 gives the known minimum common alignment. */
1936 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1939 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1940 implementing memcmp because it will stop if it encounters two
1942 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1944 if (icode
== CODE_FOR_nothing
)
1947 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1950 /* Emit code to compare a block Y to a block X. This may be done with
1951 string-compare instructions, with multiple scalar instructions,
1952 or with a library call.
1954 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1955 they are. LEN_TYPE is the type of the expression that was used to
1958 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1959 value of a normal memcmp call, instead we can just compare for equality.
1960 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1963 Optionally, the caller can pass a constfn and associated data in Y_CFN
1964 and Y_CFN_DATA. describing that the second operand being compared is a
1965 known constant and how to obtain its data.
1966 Return the result of the comparison, or NULL_RTX if we failed to
1967 perform the operation. */
1970 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1971 bool equality_only
, by_pieces_constfn y_cfn
,
1976 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1979 gcc_assert (MEM_P (x
) && MEM_P (y
));
1980 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1981 gcc_assert (align
>= BITS_PER_UNIT
);
1983 x
= adjust_address (x
, BLKmode
, 0);
1984 y
= adjust_address (y
, BLKmode
, 0);
1987 && CONST_INT_P (len
)
1988 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1989 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1992 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
1997 /* Copy all or part of a value X into registers starting at REGNO.
1998 The number of registers to be filled is NREGS. */
2001 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2006 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2007 x
= validize_mem (force_const_mem (mode
, x
));
2009 /* See if the machine can do this with a load multiple insn. */
2010 if (targetm
.have_load_multiple ())
2012 rtx_insn
*last
= get_last_insn ();
2013 rtx first
= gen_rtx_REG (word_mode
, regno
);
2014 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2021 delete_insns_since (last
);
2024 for (int i
= 0; i
< nregs
; i
++)
2025 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2026 operand_subword_force (x
, i
, mode
));
2029 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2030 The number of registers to be filled is NREGS. */
2033 move_block_from_reg (int regno
, rtx x
, int nregs
)
2038 /* See if the machine can do this with a store multiple insn. */
2039 if (targetm
.have_store_multiple ())
2041 rtx_insn
*last
= get_last_insn ();
2042 rtx first
= gen_rtx_REG (word_mode
, regno
);
2043 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2050 delete_insns_since (last
);
2053 for (int i
= 0; i
< nregs
; i
++)
2055 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2059 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2063 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2064 ORIG, where ORIG is a non-consecutive group of registers represented by
2065 a PARALLEL. The clone is identical to the original except in that the
2066 original set of registers is replaced by a new set of pseudo registers.
2067 The new set has the same modes as the original set. */
2070 gen_group_rtx (rtx orig
)
2075 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2077 length
= XVECLEN (orig
, 0);
2078 tmps
= XALLOCAVEC (rtx
, length
);
2080 /* Skip a NULL entry in first slot. */
2081 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2086 for (; i
< length
; i
++)
2088 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2089 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2091 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2094 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2097 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2098 except that values are placed in TMPS[i], and must later be moved
2099 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2102 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
, int ssize
)
2106 machine_mode m
= GET_MODE (orig_src
);
2108 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2111 && !SCALAR_INT_MODE_P (m
)
2112 && !MEM_P (orig_src
)
2113 && GET_CODE (orig_src
) != CONCAT
)
2115 scalar_int_mode imode
;
2116 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2118 src
= gen_reg_rtx (imode
);
2119 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2123 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2124 emit_move_insn (src
, orig_src
);
2126 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2130 /* Check for a NULL entry, used to indicate that the parameter goes
2131 both on the stack and in registers. */
2132 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2137 /* Process the pieces. */
2138 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2140 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2141 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2142 unsigned int bytelen
= GET_MODE_SIZE (mode
);
2145 /* Handle trailing fragments that run over the size of the struct. */
2146 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2148 /* Arrange to shift the fragment to where it belongs.
2149 extract_bit_field loads to the lsb of the reg. */
2151 #ifdef BLOCK_REG_PADDING
2152 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2153 == (BYTES_BIG_ENDIAN
? upward
: downward
)
2158 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2159 bytelen
= ssize
- bytepos
;
2160 gcc_assert (bytelen
> 0);
2163 /* If we won't be loading directly from memory, protect the real source
2164 from strange tricks we might play; but make sure that the source can
2165 be loaded directly into the destination. */
2167 if (!MEM_P (orig_src
)
2168 && (!CONSTANT_P (orig_src
)
2169 || (GET_MODE (orig_src
) != mode
2170 && GET_MODE (orig_src
) != VOIDmode
)))
2172 if (GET_MODE (orig_src
) == VOIDmode
)
2173 src
= gen_reg_rtx (mode
);
2175 src
= gen_reg_rtx (GET_MODE (orig_src
));
2177 emit_move_insn (src
, orig_src
);
2180 /* Optimize the access just a bit. */
2182 && (! SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (src
))
2183 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2184 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2185 && bytelen
== GET_MODE_SIZE (mode
))
2187 tmps
[i
] = gen_reg_rtx (mode
);
2188 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2190 else if (COMPLEX_MODE_P (mode
)
2191 && GET_MODE (src
) == mode
2192 && bytelen
== GET_MODE_SIZE (mode
))
2193 /* Let emit_move_complex do the bulk of the work. */
2195 else if (GET_CODE (src
) == CONCAT
)
2197 unsigned int slen
= GET_MODE_SIZE (GET_MODE (src
));
2198 unsigned int slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2199 unsigned int elt
= bytepos
/ slen0
;
2200 unsigned int subpos
= bytepos
% slen0
;
2202 if (subpos
+ bytelen
<= slen0
)
2204 /* The following assumes that the concatenated objects all
2205 have the same size. In this case, a simple calculation
2206 can be used to determine the object and the bit field
2208 tmps
[i
] = XEXP (src
, elt
);
2210 || subpos
+ bytelen
!= slen0
2211 || (!CONSTANT_P (tmps
[i
])
2212 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2213 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2214 subpos
* BITS_PER_UNIT
,
2215 1, NULL_RTX
, mode
, mode
, false,
2222 gcc_assert (!bytepos
);
2223 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2224 emit_move_insn (mem
, src
);
2225 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2226 0, 1, NULL_RTX
, mode
, mode
, false,
2230 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2231 SIMD register, which is currently broken. While we get GCC
2232 to emit proper RTL for these cases, let's dump to memory. */
2233 else if (VECTOR_MODE_P (GET_MODE (dst
))
2236 int slen
= GET_MODE_SIZE (GET_MODE (src
));
2239 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2240 emit_move_insn (mem
, src
);
2241 tmps
[i
] = adjust_address (mem
, mode
, (int) bytepos
);
2243 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2244 && XVECLEN (dst
, 0) > 1)
2245 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2246 else if (CONSTANT_P (src
))
2248 HOST_WIDE_INT len
= (HOST_WIDE_INT
) bytelen
;
2256 /* TODO: const_wide_int can have sizes other than this... */
2257 gcc_assert (2 * len
== ssize
);
2258 split_double (src
, &first
, &second
);
2265 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2268 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2269 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2270 mode
, mode
, false, NULL
);
2273 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2278 /* Emit code to move a block SRC of type TYPE to a block DST,
2279 where DST is non-consecutive registers represented by a PARALLEL.
2280 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2284 emit_group_load (rtx dst
, rtx src
, tree type
, int ssize
)
2289 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2290 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2292 /* Copy the extracted pieces into the proper (probable) hard regs. */
2293 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2295 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2298 emit_move_insn (d
, tmps
[i
]);
2302 /* Similar, but load SRC into new pseudos in a format that looks like
2303 PARALLEL. This can later be fed to emit_group_move to get things
2304 in the right place. */
2307 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, int ssize
)
2312 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2313 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2315 /* Convert the vector to look just like the original PARALLEL, except
2316 with the computed values. */
2317 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2319 rtx e
= XVECEXP (parallel
, 0, i
);
2320 rtx d
= XEXP (e
, 0);
2324 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2325 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2327 RTVEC_ELT (vec
, i
) = e
;
2330 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2333 /* Emit code to move a block SRC to block DST, where SRC and DST are
2334 non-consecutive groups of registers, each represented by a PARALLEL. */
2337 emit_group_move (rtx dst
, rtx src
)
2341 gcc_assert (GET_CODE (src
) == PARALLEL
2342 && GET_CODE (dst
) == PARALLEL
2343 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2345 /* Skip first entry if NULL. */
2346 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2347 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2348 XEXP (XVECEXP (src
, 0, i
), 0));
2351 /* Move a group of registers represented by a PARALLEL into pseudos. */
2354 emit_group_move_into_temps (rtx src
)
2356 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2359 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2361 rtx e
= XVECEXP (src
, 0, i
);
2362 rtx d
= XEXP (e
, 0);
2365 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2366 RTVEC_ELT (vec
, i
) = e
;
2369 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2372 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2373 where SRC is non-consecutive registers represented by a PARALLEL.
2374 SSIZE represents the total size of block ORIG_DST, or -1 if not
2378 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
, int ssize
)
2381 int start
, finish
, i
;
2382 machine_mode m
= GET_MODE (orig_dst
);
2384 gcc_assert (GET_CODE (src
) == PARALLEL
);
2386 if (!SCALAR_INT_MODE_P (m
)
2387 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2389 scalar_int_mode imode
;
2390 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2392 dst
= gen_reg_rtx (imode
);
2393 emit_group_store (dst
, src
, type
, ssize
);
2394 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2398 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2399 emit_group_store (dst
, src
, type
, ssize
);
2401 emit_move_insn (orig_dst
, dst
);
2405 /* Check for a NULL entry, used to indicate that the parameter goes
2406 both on the stack and in registers. */
2407 if (XEXP (XVECEXP (src
, 0, 0), 0))
2411 finish
= XVECLEN (src
, 0);
2413 tmps
= XALLOCAVEC (rtx
, finish
);
2415 /* Copy the (probable) hard regs into pseudos. */
2416 for (i
= start
; i
< finish
; i
++)
2418 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2419 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2421 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2422 emit_move_insn (tmps
[i
], reg
);
2428 /* If we won't be storing directly into memory, protect the real destination
2429 from strange tricks we might play. */
2431 if (GET_CODE (dst
) == PARALLEL
)
2435 /* We can get a PARALLEL dst if there is a conditional expression in
2436 a return statement. In that case, the dst and src are the same,
2437 so no action is necessary. */
2438 if (rtx_equal_p (dst
, src
))
2441 /* It is unclear if we can ever reach here, but we may as well handle
2442 it. Allocate a temporary, and split this into a store/load to/from
2444 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2445 emit_group_store (temp
, src
, type
, ssize
);
2446 emit_group_load (dst
, temp
, type
, ssize
);
2449 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2451 machine_mode outer
= GET_MODE (dst
);
2453 HOST_WIDE_INT bytepos
;
2457 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2458 dst
= gen_reg_rtx (outer
);
2460 /* Make life a bit easier for combine. */
2461 /* If the first element of the vector is the low part
2462 of the destination mode, use a paradoxical subreg to
2463 initialize the destination. */
2466 inner
= GET_MODE (tmps
[start
]);
2467 bytepos
= subreg_lowpart_offset (inner
, outer
);
2468 if (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)) == bytepos
)
2470 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2474 emit_move_insn (dst
, temp
);
2481 /* If the first element wasn't the low part, try the last. */
2483 && start
< finish
- 1)
2485 inner
= GET_MODE (tmps
[finish
- 1]);
2486 bytepos
= subreg_lowpart_offset (inner
, outer
);
2487 if (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)) == bytepos
)
2489 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2493 emit_move_insn (dst
, temp
);
2500 /* Otherwise, simply initialize the result to zero. */
2502 emit_move_insn (dst
, CONST0_RTX (outer
));
2505 /* Process the pieces. */
2506 for (i
= start
; i
< finish
; i
++)
2508 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2509 machine_mode mode
= GET_MODE (tmps
[i
]);
2510 unsigned int bytelen
= GET_MODE_SIZE (mode
);
2511 unsigned int adj_bytelen
;
2514 /* Handle trailing fragments that run over the size of the struct. */
2515 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2516 adj_bytelen
= ssize
- bytepos
;
2518 adj_bytelen
= bytelen
;
2520 if (GET_CODE (dst
) == CONCAT
)
2522 if (bytepos
+ adj_bytelen
2523 <= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2524 dest
= XEXP (dst
, 0);
2525 else if (bytepos
>= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2527 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2528 dest
= XEXP (dst
, 1);
2532 machine_mode dest_mode
= GET_MODE (dest
);
2533 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2535 gcc_assert (bytepos
== 0 && XVECLEN (src
, 0));
2537 if (GET_MODE_ALIGNMENT (dest_mode
)
2538 >= GET_MODE_ALIGNMENT (tmp_mode
))
2540 dest
= assign_stack_temp (dest_mode
,
2541 GET_MODE_SIZE (dest_mode
));
2542 emit_move_insn (adjust_address (dest
,
2550 dest
= assign_stack_temp (tmp_mode
,
2551 GET_MODE_SIZE (tmp_mode
));
2552 emit_move_insn (dest
, tmps
[i
]);
2553 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2559 /* Handle trailing fragments that run over the size of the struct. */
2560 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2562 /* store_bit_field always takes its value from the lsb.
2563 Move the fragment to the lsb if it's not already there. */
2565 #ifdef BLOCK_REG_PADDING
2566 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2567 == (BYTES_BIG_ENDIAN
? upward
: downward
)
2573 int shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2574 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2578 /* Make sure not to write past the end of the struct. */
2579 store_bit_field (dest
,
2580 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2581 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2582 VOIDmode
, tmps
[i
], false);
2585 /* Optimize the access just a bit. */
2586 else if (MEM_P (dest
)
2587 && (!SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (dest
))
2588 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2589 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2590 && bytelen
== GET_MODE_SIZE (mode
))
2591 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2594 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2595 0, 0, mode
, tmps
[i
], false);
2598 /* Copy from the pseudo into the (probable) hard reg. */
2599 if (orig_dst
!= dst
)
2600 emit_move_insn (orig_dst
, dst
);
2603 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2604 of the value stored in X. */
2607 maybe_emit_group_store (rtx x
, tree type
)
2609 machine_mode mode
= TYPE_MODE (type
);
2610 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2611 if (GET_CODE (x
) == PARALLEL
)
2613 rtx result
= gen_reg_rtx (mode
);
2614 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2620 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2622 This is used on targets that return BLKmode values in registers. */
2625 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2627 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2628 rtx src
= NULL
, dst
= NULL
;
2629 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2630 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2631 machine_mode mode
= GET_MODE (srcreg
);
2632 machine_mode tmode
= GET_MODE (target
);
2633 machine_mode copy_mode
;
2635 /* BLKmode registers created in the back-end shouldn't have survived. */
2636 gcc_assert (mode
!= BLKmode
);
2638 /* If the structure doesn't take up a whole number of words, see whether
2639 SRCREG is padded on the left or on the right. If it's on the left,
2640 set PADDING_CORRECTION to the number of bits to skip.
2642 In most ABIs, the structure will be returned at the least end of
2643 the register, which translates to right padding on little-endian
2644 targets and left padding on big-endian targets. The opposite
2645 holds if the structure is returned at the most significant
2646 end of the register. */
2647 if (bytes
% UNITS_PER_WORD
!= 0
2648 && (targetm
.calls
.return_in_msb (type
)
2650 : BYTES_BIG_ENDIAN
))
2652 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2654 /* We can use a single move if we have an exact mode for the size. */
2655 else if (MEM_P (target
)
2656 && (!SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (target
))
2657 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2658 && bytes
== GET_MODE_SIZE (mode
))
2660 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2664 /* And if we additionally have the same mode for a register. */
2665 else if (REG_P (target
)
2666 && GET_MODE (target
) == mode
2667 && bytes
== GET_MODE_SIZE (mode
))
2669 emit_move_insn (target
, srcreg
);
2673 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2674 into a new pseudo which is a full word. */
2675 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2677 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2681 /* Copy the structure BITSIZE bits at a time. If the target lives in
2682 memory, take care of not reading/writing past its end by selecting
2683 a copy mode suited to BITSIZE. This should always be possible given
2686 If the target lives in register, make sure not to select a copy mode
2687 larger than the mode of the register.
2689 We could probably emit more efficient code for machines which do not use
2690 strict alignment, but it doesn't seem worth the effort at the current
2693 copy_mode
= word_mode
;
2696 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2697 if (mem_mode
.exists ())
2698 copy_mode
= mem_mode
.require ();
2700 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2703 for (bitpos
= 0, xbitpos
= padding_correction
;
2704 bitpos
< bytes
* BITS_PER_UNIT
;
2705 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2707 /* We need a new source operand each time xbitpos is on a
2708 word boundary and when xbitpos == padding_correction
2709 (the first time through). */
2710 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2711 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2713 /* We need a new destination operand each time bitpos is on
2715 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2717 else if (bitpos
% BITS_PER_WORD
== 0)
2718 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2720 /* Use xbitpos for the source extraction (right justified) and
2721 bitpos for the destination store (left justified). */
2722 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2723 extract_bit_field (src
, bitsize
,
2724 xbitpos
% BITS_PER_WORD
, 1,
2725 NULL_RTX
, copy_mode
, copy_mode
,
2731 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2732 register if it contains any data, otherwise return null.
2734 This is used on targets that return BLKmode values in registers. */
2737 copy_blkmode_to_reg (machine_mode mode
, tree src
)
2740 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2741 unsigned int bitsize
;
2742 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2743 machine_mode dst_mode
;
2745 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2747 x
= expand_normal (src
);
2749 bytes
= int_size_in_bytes (TREE_TYPE (src
));
2753 /* If the structure doesn't take up a whole number of words, see
2754 whether the register value should be padded on the left or on
2755 the right. Set PADDING_CORRECTION to the number of padding
2756 bits needed on the left side.
2758 In most ABIs, the structure will be returned at the least end of
2759 the register, which translates to right padding on little-endian
2760 targets and left padding on big-endian targets. The opposite
2761 holds if the structure is returned at the most significant
2762 end of the register. */
2763 if (bytes
% UNITS_PER_WORD
!= 0
2764 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2766 : BYTES_BIG_ENDIAN
))
2767 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2770 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2771 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2772 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2774 /* Copy the structure BITSIZE bits at a time. */
2775 for (bitpos
= 0, xbitpos
= padding_correction
;
2776 bitpos
< bytes
* BITS_PER_UNIT
;
2777 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2779 /* We need a new destination pseudo each time xbitpos is
2780 on a word boundary and when xbitpos == padding_correction
2781 (the first time through). */
2782 if (xbitpos
% BITS_PER_WORD
== 0
2783 || xbitpos
== padding_correction
)
2785 /* Generate an appropriate register. */
2786 dst_word
= gen_reg_rtx (word_mode
);
2787 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2789 /* Clear the destination before we move anything into it. */
2790 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2793 /* We need a new source operand each time bitpos is on a word
2795 if (bitpos
% BITS_PER_WORD
== 0)
2796 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2798 /* Use bitpos for the source extraction (left justified) and
2799 xbitpos for the destination store (right justified). */
2800 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2802 extract_bit_field (src_word
, bitsize
,
2803 bitpos
% BITS_PER_WORD
, 1,
2804 NULL_RTX
, word_mode
, word_mode
,
2809 if (mode
== BLKmode
)
2811 /* Find the smallest integer mode large enough to hold the
2812 entire structure. */
2813 opt_scalar_int_mode mode_iter
;
2814 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2815 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2818 /* A suitable mode should have been found. */
2819 mode
= mode_iter
.require ();
2822 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2823 dst_mode
= word_mode
;
2826 dst
= gen_reg_rtx (dst_mode
);
2828 for (i
= 0; i
< n_regs
; i
++)
2829 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2831 if (mode
!= dst_mode
)
2832 dst
= gen_lowpart (mode
, dst
);
2837 /* Add a USE expression for REG to the (possibly empty) list pointed
2838 to by CALL_FUSAGE. REG must denote a hard register. */
2841 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2843 gcc_assert (REG_P (reg
));
2845 if (!HARD_REGISTER_P (reg
))
2849 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2852 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2853 to by CALL_FUSAGE. REG must denote a hard register. */
2856 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2858 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2861 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2864 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2865 starting at REGNO. All of these registers must be hard registers. */
2868 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2872 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2874 for (i
= 0; i
< nregs
; i
++)
2875 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2878 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2879 PARALLEL REGS. This is for calls that pass values in multiple
2880 non-contiguous locations. The Irix 6 ABI has examples of this. */
2883 use_group_regs (rtx
*call_fusage
, rtx regs
)
2887 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2889 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2891 /* A NULL entry means the parameter goes both on the stack and in
2892 registers. This can also be a MEM for targets that pass values
2893 partially on the stack and partially in registers. */
2894 if (reg
!= 0 && REG_P (reg
))
2895 use_reg (call_fusage
, reg
);
2899 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2900 assigment and the code of the expresion on the RHS is CODE. Return
2904 get_def_for_expr (tree name
, enum tree_code code
)
2908 if (TREE_CODE (name
) != SSA_NAME
)
2911 def_stmt
= get_gimple_for_ssa_name (name
);
2913 || gimple_assign_rhs_code (def_stmt
) != code
)
2919 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2920 assigment and the class of the expresion on the RHS is CLASS. Return
2924 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2928 if (TREE_CODE (name
) != SSA_NAME
)
2931 def_stmt
= get_gimple_for_ssa_name (name
);
2933 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2939 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2940 its length in bytes. */
2943 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2944 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2945 unsigned HOST_WIDE_INT min_size
,
2946 unsigned HOST_WIDE_INT max_size
,
2947 unsigned HOST_WIDE_INT probable_max_size
)
2949 machine_mode mode
= GET_MODE (object
);
2952 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2954 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2955 just move a zero. Otherwise, do this a piece at a time. */
2957 && CONST_INT_P (size
)
2958 && INTVAL (size
) == (HOST_WIDE_INT
) GET_MODE_SIZE (mode
))
2960 rtx zero
= CONST0_RTX (mode
);
2963 emit_move_insn (object
, zero
);
2967 if (COMPLEX_MODE_P (mode
))
2969 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2972 write_complex_part (object
, zero
, 0);
2973 write_complex_part (object
, zero
, 1);
2979 if (size
== const0_rtx
)
2982 align
= MEM_ALIGN (object
);
2984 if (CONST_INT_P (size
)
2985 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
2987 optimize_insn_for_speed_p ()))
2988 clear_by_pieces (object
, INTVAL (size
), align
);
2989 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
2990 expected_align
, expected_size
,
2991 min_size
, max_size
, probable_max_size
))
2993 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
2994 return set_storage_via_libcall (object
, size
, const0_rtx
,
2995 method
== BLOCK_OP_TAILCALL
);
3003 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3005 unsigned HOST_WIDE_INT max
, min
= 0;
3006 if (GET_CODE (size
) == CONST_INT
)
3007 min
= max
= UINTVAL (size
);
3009 max
= GET_MODE_MASK (GET_MODE (size
));
3010 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3014 /* A subroutine of clear_storage. Expand a call to memset.
3015 Return the return value of memset, 0 otherwise. */
3018 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3020 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3021 machine_mode size_mode
;
3023 object
= copy_addr_to_reg (XEXP (object
, 0));
3024 object_tree
= make_tree (ptr_type_node
, object
);
3026 if (!CONST_INT_P (val
))
3027 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3028 val_tree
= make_tree (integer_type_node
, val
);
3030 size_mode
= TYPE_MODE (sizetype
);
3031 size
= convert_to_mode (size_mode
, size
, 1);
3032 size
= copy_to_mode_reg (size_mode
, size
);
3033 size_tree
= make_tree (sizetype
, size
);
3035 /* It is incorrect to use the libcall calling conventions for calls to
3036 memset because it can be provided by the user. */
3037 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3038 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3039 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3041 return expand_call (call_expr
, NULL_RTX
, false);
3044 /* Expand a setmem pattern; return true if successful. */
3047 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3048 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3049 unsigned HOST_WIDE_INT min_size
,
3050 unsigned HOST_WIDE_INT max_size
,
3051 unsigned HOST_WIDE_INT probable_max_size
)
3053 /* Try the most limited insn first, because there's no point
3054 including more than one in the machine description unless
3055 the more limited one has some advantage. */
3057 if (expected_align
< align
)
3058 expected_align
= align
;
3059 if (expected_size
!= -1)
3061 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3062 expected_size
= max_size
;
3063 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3064 expected_size
= min_size
;
3067 opt_scalar_int_mode mode_iter
;
3068 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3070 scalar_int_mode mode
= mode_iter
.require ();
3071 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3073 if (code
!= CODE_FOR_nothing
3074 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3075 here because if SIZE is less than the mode mask, as it is
3076 returned by the macro, it will definitely be less than the
3077 actual mode mask. Since SIZE is within the Pmode address
3078 space, we limit MODE to Pmode. */
3079 && ((CONST_INT_P (size
)
3080 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3081 <= (GET_MODE_MASK (mode
) >> 1)))
3082 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3083 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3085 struct expand_operand ops
[9];
3088 nops
= insn_data
[(int) code
].n_generator_args
;
3089 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3091 create_fixed_operand (&ops
[0], object
);
3092 /* The check above guarantees that this size conversion is valid. */
3093 create_convert_operand_to (&ops
[1], size
, mode
, true);
3094 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3095 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3098 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3099 create_integer_operand (&ops
[5], expected_size
);
3103 create_integer_operand (&ops
[6], min_size
);
3104 /* If we can not represent the maximal size,
3105 make parameter NULL. */
3106 if ((HOST_WIDE_INT
) max_size
!= -1)
3107 create_integer_operand (&ops
[7], max_size
);
3109 create_fixed_operand (&ops
[7], NULL
);
3113 /* If we can not represent the maximal size,
3114 make parameter NULL. */
3115 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3116 create_integer_operand (&ops
[8], probable_max_size
);
3118 create_fixed_operand (&ops
[8], NULL
);
3120 if (maybe_expand_insn (code
, nops
, ops
))
3129 /* Write to one of the components of the complex value CPLX. Write VAL to
3130 the real part if IMAG_P is false, and the imaginary part if its true. */
3133 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3139 if (GET_CODE (cplx
) == CONCAT
)
3141 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3145 cmode
= GET_MODE (cplx
);
3146 imode
= GET_MODE_INNER (cmode
);
3147 ibitsize
= GET_MODE_BITSIZE (imode
);
3149 /* For MEMs simplify_gen_subreg may generate an invalid new address
3150 because, e.g., the original address is considered mode-dependent
3151 by the target, which restricts simplify_subreg from invoking
3152 adjust_address_nv. Instead of preparing fallback support for an
3153 invalid address, we call adjust_address_nv directly. */
3156 emit_move_insn (adjust_address_nv (cplx
, imode
,
3157 imag_p
? GET_MODE_SIZE (imode
) : 0),
3162 /* If the sub-object is at least word sized, then we know that subregging
3163 will work. This special case is important, since store_bit_field
3164 wants to operate on integer modes, and there's rarely an OImode to
3165 correspond to TCmode. */
3166 if (ibitsize
>= BITS_PER_WORD
3167 /* For hard regs we have exact predicates. Assume we can split
3168 the original object if it spans an even number of hard regs.
3169 This special case is important for SCmode on 64-bit platforms
3170 where the natural size of floating-point regs is 32-bit. */
3172 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3173 && REG_NREGS (cplx
) % 2 == 0))
3175 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3176 imag_p
? GET_MODE_SIZE (imode
) : 0);
3179 emit_move_insn (part
, val
);
3183 /* simplify_gen_subreg may fail for sub-word MEMs. */
3184 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3187 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3191 /* Extract one of the components of the complex value CPLX. Extract the
3192 real part if IMAG_P is false, and the imaginary part if it's true. */
3195 read_complex_part (rtx cplx
, bool imag_p
)
3201 if (GET_CODE (cplx
) == CONCAT
)
3202 return XEXP (cplx
, imag_p
);
3204 cmode
= GET_MODE (cplx
);
3205 imode
= GET_MODE_INNER (cmode
);
3206 ibitsize
= GET_MODE_BITSIZE (imode
);
3208 /* Special case reads from complex constants that got spilled to memory. */
3209 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3211 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3212 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3214 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3215 if (CONSTANT_CLASS_P (part
))
3216 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3220 /* For MEMs simplify_gen_subreg may generate an invalid new address
3221 because, e.g., the original address is considered mode-dependent
3222 by the target, which restricts simplify_subreg from invoking
3223 adjust_address_nv. Instead of preparing fallback support for an
3224 invalid address, we call adjust_address_nv directly. */
3226 return adjust_address_nv (cplx
, imode
,
3227 imag_p
? GET_MODE_SIZE (imode
) : 0);
3229 /* If the sub-object is at least word sized, then we know that subregging
3230 will work. This special case is important, since extract_bit_field
3231 wants to operate on integer modes, and there's rarely an OImode to
3232 correspond to TCmode. */
3233 if (ibitsize
>= BITS_PER_WORD
3234 /* For hard regs we have exact predicates. Assume we can split
3235 the original object if it spans an even number of hard regs.
3236 This special case is important for SCmode on 64-bit platforms
3237 where the natural size of floating-point regs is 32-bit. */
3239 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3240 && REG_NREGS (cplx
) % 2 == 0))
3242 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3243 imag_p
? GET_MODE_SIZE (imode
) : 0);
3247 /* simplify_gen_subreg may fail for sub-word MEMs. */
3248 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3251 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3252 true, NULL_RTX
, imode
, imode
, false, NULL
);
3255 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3256 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3257 represented in NEW_MODE. If FORCE is true, this will never happen, as
3258 we'll force-create a SUBREG if needed. */
3261 emit_move_change_mode (machine_mode new_mode
,
3262 machine_mode old_mode
, rtx x
, bool force
)
3266 if (push_operand (x
, GET_MODE (x
)))
3268 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3269 MEM_COPY_ATTRIBUTES (ret
, x
);
3273 /* We don't have to worry about changing the address since the
3274 size in bytes is supposed to be the same. */
3275 if (reload_in_progress
)
3277 /* Copy the MEM to change the mode and move any
3278 substitutions from the old MEM to the new one. */
3279 ret
= adjust_address_nv (x
, new_mode
, 0);
3280 copy_replacements (x
, ret
);
3283 ret
= adjust_address (x
, new_mode
, 0);
3287 /* Note that we do want simplify_subreg's behavior of validating
3288 that the new mode is ok for a hard register. If we were to use
3289 simplify_gen_subreg, we would create the subreg, but would
3290 probably run into the target not being able to implement it. */
3291 /* Except, of course, when FORCE is true, when this is exactly what
3292 we want. Which is needed for CCmodes on some targets. */
3294 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3296 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3302 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3303 an integer mode of the same size as MODE. Returns the instruction
3304 emitted, or NULL if such a move could not be generated. */
3307 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3309 scalar_int_mode imode
;
3310 enum insn_code code
;
3312 /* There must exist a mode of the exact size we require. */
3313 if (!int_mode_for_mode (mode
).exists (&imode
))
3316 /* The target must support moves in this mode. */
3317 code
= optab_handler (mov_optab
, imode
);
3318 if (code
== CODE_FOR_nothing
)
3321 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3324 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3327 return emit_insn (GEN_FCN (code
) (x
, y
));
3330 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3331 Return an equivalent MEM that does not use an auto-increment. */
3334 emit_move_resolve_push (machine_mode mode
, rtx x
)
3336 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3337 HOST_WIDE_INT adjust
;
3340 adjust
= GET_MODE_SIZE (mode
);
3341 #ifdef PUSH_ROUNDING
3342 adjust
= PUSH_ROUNDING (adjust
);
3344 if (code
== PRE_DEC
|| code
== POST_DEC
)
3346 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3348 rtx expr
= XEXP (XEXP (x
, 0), 1);
3351 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3352 gcc_assert (CONST_INT_P (XEXP (expr
, 1)));
3353 val
= INTVAL (XEXP (expr
, 1));
3354 if (GET_CODE (expr
) == MINUS
)
3356 gcc_assert (adjust
== val
|| adjust
== -val
);
3360 /* Do not use anti_adjust_stack, since we don't want to update
3361 stack_pointer_delta. */
3362 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3363 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3364 0, OPTAB_LIB_WIDEN
);
3365 if (temp
!= stack_pointer_rtx
)
3366 emit_move_insn (stack_pointer_rtx
, temp
);
3373 temp
= stack_pointer_rtx
;
3378 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3384 return replace_equiv_address (x
, temp
);
3387 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3388 X is known to satisfy push_operand, and MODE is known to be complex.
3389 Returns the last instruction emitted. */
3392 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3394 scalar_mode submode
= GET_MODE_INNER (mode
);
3397 #ifdef PUSH_ROUNDING
3398 unsigned int submodesize
= GET_MODE_SIZE (submode
);
3400 /* In case we output to the stack, but the size is smaller than the
3401 machine can push exactly, we need to use move instructions. */
3402 if (PUSH_ROUNDING (submodesize
) != submodesize
)
3404 x
= emit_move_resolve_push (mode
, x
);
3405 return emit_move_insn (x
, y
);
3409 /* Note that the real part always precedes the imag part in memory
3410 regardless of machine's endianness. */
3411 switch (GET_CODE (XEXP (x
, 0)))
3425 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3426 read_complex_part (y
, imag_first
));
3427 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3428 read_complex_part (y
, !imag_first
));
3431 /* A subroutine of emit_move_complex. Perform the move from Y to X
3432 via two moves of the parts. Returns the last instruction emitted. */
3435 emit_move_complex_parts (rtx x
, rtx y
)
3437 /* Show the output dies here. This is necessary for SUBREGs
3438 of pseudos since we cannot track their lifetimes correctly;
3439 hard regs shouldn't appear here except as return values. */
3440 if (!reload_completed
&& !reload_in_progress
3441 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3444 write_complex_part (x
, read_complex_part (y
, false), false);
3445 write_complex_part (x
, read_complex_part (y
, true), true);
3447 return get_last_insn ();
3450 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3451 MODE is known to be complex. Returns the last instruction emitted. */
3454 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3458 /* Need to take special care for pushes, to maintain proper ordering
3459 of the data, and possibly extra padding. */
3460 if (push_operand (x
, mode
))
3461 return emit_move_complex_push (mode
, x
, y
);
3463 /* See if we can coerce the target into moving both values at once, except
3464 for floating point where we favor moving as parts if this is easy. */
3465 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3466 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3468 && HARD_REGISTER_P (x
)
3469 && REG_NREGS (x
) == 1)
3471 && HARD_REGISTER_P (y
)
3472 && REG_NREGS (y
) == 1))
3474 /* Not possible if the values are inherently not adjacent. */
3475 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3477 /* Is possible if both are registers (or subregs of registers). */
3478 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3480 /* If one of the operands is a memory, and alignment constraints
3481 are friendly enough, we may be able to do combined memory operations.
3482 We do not attempt this if Y is a constant because that combination is
3483 usually better with the by-parts thing below. */
3484 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3485 && (!STRICT_ALIGNMENT
3486 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3495 /* For memory to memory moves, optimal behavior can be had with the
3496 existing block move logic. */
3497 if (MEM_P (x
) && MEM_P (y
))
3499 emit_block_move (x
, y
, GEN_INT (GET_MODE_SIZE (mode
)),
3500 BLOCK_OP_NO_LIBCALL
);
3501 return get_last_insn ();
3504 ret
= emit_move_via_integer (mode
, x
, y
, true);
3509 return emit_move_complex_parts (x
, y
);
3512 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3513 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3516 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3520 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3523 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3524 if (code
!= CODE_FOR_nothing
)
3526 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3527 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3528 return emit_insn (GEN_FCN (code
) (x
, y
));
3532 /* Otherwise, find the MODE_INT mode of the same width. */
3533 ret
= emit_move_via_integer (mode
, x
, y
, false);
3534 gcc_assert (ret
!= NULL
);
3538 /* Return true if word I of OP lies entirely in the
3539 undefined bits of a paradoxical subreg. */
3542 undefined_operand_subword_p (const_rtx op
, int i
)
3544 machine_mode innermode
, innermostmode
;
3546 if (GET_CODE (op
) != SUBREG
)
3548 innermode
= GET_MODE (op
);
3549 innermostmode
= GET_MODE (SUBREG_REG (op
));
3550 offset
= i
* UNITS_PER_WORD
+ SUBREG_BYTE (op
);
3551 /* The SUBREG_BYTE represents offset, as if the value were stored in
3552 memory, except for a paradoxical subreg where we define
3553 SUBREG_BYTE to be 0; undo this exception as in
3555 if (SUBREG_BYTE (op
) == 0
3556 && GET_MODE_SIZE (innermostmode
) < GET_MODE_SIZE (innermode
))
3558 int difference
= (GET_MODE_SIZE (innermostmode
) - GET_MODE_SIZE (innermode
));
3559 if (WORDS_BIG_ENDIAN
)
3560 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
3561 if (BYTES_BIG_ENDIAN
)
3562 offset
+= difference
% UNITS_PER_WORD
;
3564 if (offset
>= GET_MODE_SIZE (innermostmode
)
3565 || offset
<= -GET_MODE_SIZE (word_mode
))
3570 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3571 MODE is any multi-word or full-word mode that lacks a move_insn
3572 pattern. Note that you will get better code if you define such
3573 patterns, even if they must turn into multiple assembler instructions. */
3576 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3578 rtx_insn
*last_insn
= 0;
3584 gcc_assert (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
);
3586 /* If X is a push on the stack, do the push now and replace
3587 X with a reference to the stack pointer. */
3588 if (push_operand (x
, mode
))
3589 x
= emit_move_resolve_push (mode
, x
);
3591 /* If we are in reload, see if either operand is a MEM whose address
3592 is scheduled for replacement. */
3593 if (reload_in_progress
&& MEM_P (x
)
3594 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3595 x
= replace_equiv_address_nv (x
, inner
);
3596 if (reload_in_progress
&& MEM_P (y
)
3597 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3598 y
= replace_equiv_address_nv (y
, inner
);
3602 need_clobber
= false;
3604 i
< (GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
3607 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3610 /* Do not generate code for a move if it would come entirely
3611 from the undefined bits of a paradoxical subreg. */
3612 if (undefined_operand_subword_p (y
, i
))
3615 ypart
= operand_subword (y
, i
, 1, mode
);
3617 /* If we can't get a part of Y, put Y into memory if it is a
3618 constant. Otherwise, force it into a register. Then we must
3619 be able to get a part of Y. */
3620 if (ypart
== 0 && CONSTANT_P (y
))
3622 y
= use_anchored_address (force_const_mem (mode
, y
));
3623 ypart
= operand_subword (y
, i
, 1, mode
);
3625 else if (ypart
== 0)
3626 ypart
= operand_subword_force (y
, i
, mode
);
3628 gcc_assert (xpart
&& ypart
);
3630 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3632 last_insn
= emit_move_insn (xpart
, ypart
);
3638 /* Show the output dies here. This is necessary for SUBREGs
3639 of pseudos since we cannot track their lifetimes correctly;
3640 hard regs shouldn't appear here except as return values.
3641 We never want to emit such a clobber after reload. */
3643 && ! (reload_in_progress
|| reload_completed
)
3644 && need_clobber
!= 0)
3652 /* Low level part of emit_move_insn.
3653 Called just like emit_move_insn, but assumes X and Y
3654 are basically valid. */
3657 emit_move_insn_1 (rtx x
, rtx y
)
3659 machine_mode mode
= GET_MODE (x
);
3660 enum insn_code code
;
3662 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3664 code
= optab_handler (mov_optab
, mode
);
3665 if (code
!= CODE_FOR_nothing
)
3666 return emit_insn (GEN_FCN (code
) (x
, y
));
3668 /* Expand complex moves by moving real part and imag part. */
3669 if (COMPLEX_MODE_P (mode
))
3670 return emit_move_complex (mode
, x
, y
);
3672 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3673 || ALL_FIXED_POINT_MODE_P (mode
))
3675 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3677 /* If we can't find an integer mode, use multi words. */
3681 return emit_move_multi_word (mode
, x
, y
);
3684 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3685 return emit_move_ccmode (mode
, x
, y
);
3687 /* Try using a move pattern for the corresponding integer mode. This is
3688 only safe when simplify_subreg can convert MODE constants into integer
3689 constants. At present, it can only do this reliably if the value
3690 fits within a HOST_WIDE_INT. */
3691 if (!CONSTANT_P (y
) || GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3693 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3697 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3702 return emit_move_multi_word (mode
, x
, y
);
3705 /* Generate code to copy Y into X.
3706 Both Y and X must have the same mode, except that
3707 Y can be a constant with VOIDmode.
3708 This mode cannot be BLKmode; use emit_block_move for that.
3710 Return the last instruction emitted. */
3713 emit_move_insn (rtx x
, rtx y
)
3715 machine_mode mode
= GET_MODE (x
);
3716 rtx y_cst
= NULL_RTX
;
3717 rtx_insn
*last_insn
;
3720 gcc_assert (mode
!= BLKmode
3721 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3726 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3727 && (last_insn
= compress_float_constant (x
, y
)))
3732 if (!targetm
.legitimate_constant_p (mode
, y
))
3734 y
= force_const_mem (mode
, y
);
3736 /* If the target's cannot_force_const_mem prevented the spill,
3737 assume that the target's move expanders will also take care
3738 of the non-legitimate constant. */
3742 y
= use_anchored_address (y
);
3746 /* If X or Y are memory references, verify that their addresses are valid
3749 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3751 && ! push_operand (x
, GET_MODE (x
))))
3752 x
= validize_mem (x
);
3755 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3756 MEM_ADDR_SPACE (y
)))
3757 y
= validize_mem (y
);
3759 gcc_assert (mode
!= BLKmode
);
3761 last_insn
= emit_move_insn_1 (x
, y
);
3763 if (y_cst
&& REG_P (x
)
3764 && (set
= single_set (last_insn
)) != NULL_RTX
3765 && SET_DEST (set
) == x
3766 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3767 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3772 /* Generate the body of an instruction to copy Y into X.
3773 It may be a list of insns, if one insn isn't enough. */
3776 gen_move_insn (rtx x
, rtx y
)
3781 emit_move_insn_1 (x
, y
);
3787 /* If Y is representable exactly in a narrower mode, and the target can
3788 perform the extension directly from constant or memory, then emit the
3789 move as an extension. */
3792 compress_float_constant (rtx x
, rtx y
)
3794 machine_mode dstmode
= GET_MODE (x
);
3795 machine_mode orig_srcmode
= GET_MODE (y
);
3796 machine_mode srcmode
;
3797 const REAL_VALUE_TYPE
*r
;
3798 int oldcost
, newcost
;
3799 bool speed
= optimize_insn_for_speed_p ();
3801 r
= CONST_DOUBLE_REAL_VALUE (y
);
3803 if (targetm
.legitimate_constant_p (dstmode
, y
))
3804 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3806 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3808 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3812 rtx_insn
*last_insn
;
3814 /* Skip if the target can't extend this way. */
3815 ic
= can_extend_p (dstmode
, srcmode
, 0);
3816 if (ic
== CODE_FOR_nothing
)
3819 /* Skip if the narrowed value isn't exact. */
3820 if (! exact_real_truncate (srcmode
, r
))
3823 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3825 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3827 /* Skip if the target needs extra instructions to perform
3829 if (!insn_operand_matches (ic
, 1, trunc_y
))
3831 /* This is valid, but may not be cheaper than the original. */
3832 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3834 if (oldcost
< newcost
)
3837 else if (float_extend_from_mem
[dstmode
][srcmode
])
3839 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3840 /* This is valid, but may not be cheaper than the original. */
3841 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3843 if (oldcost
< newcost
)
3845 trunc_y
= validize_mem (trunc_y
);
3850 /* For CSE's benefit, force the compressed constant pool entry
3851 into a new pseudo. This constant may be used in different modes,
3852 and if not, combine will put things back together for us. */
3853 trunc_y
= force_reg (srcmode
, trunc_y
);
3855 /* If x is a hard register, perform the extension into a pseudo,
3856 so that e.g. stack realignment code is aware of it. */
3858 if (REG_P (x
) && HARD_REGISTER_P (x
))
3859 target
= gen_reg_rtx (dstmode
);
3861 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3862 last_insn
= get_last_insn ();
3865 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3868 return emit_move_insn (x
, target
);
3875 /* Pushing data onto the stack. */
3877 /* Push a block of length SIZE (perhaps variable)
3878 and return an rtx to address the beginning of the block.
3879 The value may be virtual_outgoing_args_rtx.
3881 EXTRA is the number of bytes of padding to push in addition to SIZE.
3882 BELOW nonzero means this padding comes at low addresses;
3883 otherwise, the padding comes at high addresses. */
3886 push_block (rtx size
, int extra
, int below
)
3890 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3891 if (CONSTANT_P (size
))
3892 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3893 else if (REG_P (size
) && extra
== 0)
3894 anti_adjust_stack (size
);
3897 temp
= copy_to_mode_reg (Pmode
, size
);
3899 temp
= expand_binop (Pmode
, add_optab
, temp
,
3900 gen_int_mode (extra
, Pmode
),
3901 temp
, 0, OPTAB_LIB_WIDEN
);
3902 anti_adjust_stack (temp
);
3905 if (STACK_GROWS_DOWNWARD
)
3907 temp
= virtual_outgoing_args_rtx
;
3908 if (extra
!= 0 && below
)
3909 temp
= plus_constant (Pmode
, temp
, extra
);
3913 if (CONST_INT_P (size
))
3914 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3915 -INTVAL (size
) - (below
? 0 : extra
));
3916 else if (extra
!= 0 && !below
)
3917 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3918 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3921 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3922 negate_rtx (Pmode
, size
));
3925 return memory_address (NARROWEST_INT_MODE
, temp
);
3928 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3931 mem_autoinc_base (rtx mem
)
3935 rtx addr
= XEXP (mem
, 0);
3936 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3937 return XEXP (addr
, 0);
3942 /* A utility routine used here, in reload, and in try_split. The insns
3943 after PREV up to and including LAST are known to adjust the stack,
3944 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3945 placing notes as appropriate. PREV may be NULL, indicating the
3946 entire insn sequence prior to LAST should be scanned.
3948 The set of allowed stack pointer modifications is small:
3949 (1) One or more auto-inc style memory references (aka pushes),
3950 (2) One or more addition/subtraction with the SP as destination,
3951 (3) A single move insn with the SP as destination,
3952 (4) A call_pop insn,
3953 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3955 Insns in the sequence that do not modify the SP are ignored,
3956 except for noreturn calls.
3958 The return value is the amount of adjustment that can be trivially
3959 verified, via immediate operand or auto-inc. If the adjustment
3960 cannot be trivially extracted, the return value is INT_MIN. */
3963 find_args_size_adjust (rtx_insn
*insn
)
3968 pat
= PATTERN (insn
);
3971 /* Look for a call_pop pattern. */
3974 /* We have to allow non-call_pop patterns for the case
3975 of emit_single_push_insn of a TLS address. */
3976 if (GET_CODE (pat
) != PARALLEL
)
3979 /* All call_pop have a stack pointer adjust in the parallel.
3980 The call itself is always first, and the stack adjust is
3981 usually last, so search from the end. */
3982 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3984 set
= XVECEXP (pat
, 0, i
);
3985 if (GET_CODE (set
) != SET
)
3987 dest
= SET_DEST (set
);
3988 if (dest
== stack_pointer_rtx
)
3991 /* We'd better have found the stack pointer adjust. */
3994 /* Fall through to process the extracted SET and DEST
3995 as if it was a standalone insn. */
3997 else if (GET_CODE (pat
) == SET
)
3999 else if ((set
= single_set (insn
)) != NULL
)
4001 else if (GET_CODE (pat
) == PARALLEL
)
4003 /* ??? Some older ports use a parallel with a stack adjust
4004 and a store for a PUSH_ROUNDING pattern, rather than a
4005 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4006 /* ??? See h8300 and m68k, pushqi1. */
4007 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4009 set
= XVECEXP (pat
, 0, i
);
4010 if (GET_CODE (set
) != SET
)
4012 dest
= SET_DEST (set
);
4013 if (dest
== stack_pointer_rtx
)
4016 /* We do not expect an auto-inc of the sp in the parallel. */
4017 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4018 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4019 != stack_pointer_rtx
);
4027 dest
= SET_DEST (set
);
4029 /* Look for direct modifications of the stack pointer. */
4030 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4032 /* Look for a trivial adjustment, otherwise assume nothing. */
4033 /* Note that the SPU restore_stack_block pattern refers to
4034 the stack pointer in V4SImode. Consider that non-trivial. */
4035 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4036 && GET_CODE (SET_SRC (set
)) == PLUS
4037 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4038 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4039 return INTVAL (XEXP (SET_SRC (set
), 1));
4040 /* ??? Reload can generate no-op moves, which will be cleaned
4041 up later. Recognize it and continue searching. */
4042 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4045 return HOST_WIDE_INT_MIN
;
4051 /* Otherwise only think about autoinc patterns. */
4052 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4055 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4056 != stack_pointer_rtx
);
4058 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4059 mem
= SET_SRC (set
);
4063 addr
= XEXP (mem
, 0);
4064 switch (GET_CODE (addr
))
4068 return GET_MODE_SIZE (GET_MODE (mem
));
4071 return -GET_MODE_SIZE (GET_MODE (mem
));
4074 addr
= XEXP (addr
, 1);
4075 gcc_assert (GET_CODE (addr
) == PLUS
);
4076 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4077 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4078 return INTVAL (XEXP (addr
, 1));
4086 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
, int end_args_size
)
4088 int args_size
= end_args_size
;
4089 bool saw_unknown
= false;
4092 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4094 HOST_WIDE_INT this_delta
;
4096 if (!NONDEBUG_INSN_P (insn
))
4099 this_delta
= find_args_size_adjust (insn
);
4100 if (this_delta
== 0)
4103 || ACCUMULATE_OUTGOING_ARGS
4104 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4108 gcc_assert (!saw_unknown
);
4109 if (this_delta
== HOST_WIDE_INT_MIN
)
4112 add_reg_note (insn
, REG_ARGS_SIZE
, GEN_INT (args_size
));
4113 if (STACK_GROWS_DOWNWARD
)
4114 this_delta
= -(unsigned HOST_WIDE_INT
) this_delta
;
4116 args_size
-= this_delta
;
4119 return saw_unknown
? INT_MIN
: args_size
;
4122 #ifdef PUSH_ROUNDING
4123 /* Emit single push insn. */
4126 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4129 unsigned rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4131 enum insn_code icode
;
4133 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4134 /* If there is push pattern, use it. Otherwise try old way of throwing
4135 MEM representing push operation to move expander. */
4136 icode
= optab_handler (push_optab
, mode
);
4137 if (icode
!= CODE_FOR_nothing
)
4139 struct expand_operand ops
[1];
4141 create_input_operand (&ops
[0], x
, mode
);
4142 if (maybe_expand_insn (icode
, 1, ops
))
4145 if (GET_MODE_SIZE (mode
) == rounded_size
)
4146 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4147 /* If we are to pad downward, adjust the stack pointer first and
4148 then store X into the stack location using an offset. This is
4149 because emit_move_insn does not know how to pad; it does not have
4151 else if (FUNCTION_ARG_PADDING (mode
, type
) == downward
)
4153 unsigned padding_size
= rounded_size
- GET_MODE_SIZE (mode
);
4154 HOST_WIDE_INT offset
;
4156 emit_move_insn (stack_pointer_rtx
,
4157 expand_binop (Pmode
,
4158 STACK_GROWS_DOWNWARD
? sub_optab
4161 gen_int_mode (rounded_size
, Pmode
),
4162 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4164 offset
= (HOST_WIDE_INT
) padding_size
;
4165 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4166 /* We have already decremented the stack pointer, so get the
4168 offset
+= (HOST_WIDE_INT
) rounded_size
;
4170 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4171 /* We have already incremented the stack pointer, so get the
4173 offset
-= (HOST_WIDE_INT
) rounded_size
;
4175 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4176 gen_int_mode (offset
, Pmode
));
4180 if (STACK_GROWS_DOWNWARD
)
4181 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4182 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4183 gen_int_mode (-(HOST_WIDE_INT
) rounded_size
,
4186 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4187 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4188 gen_int_mode (rounded_size
, Pmode
));
4190 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4193 dest
= gen_rtx_MEM (mode
, dest_addr
);
4197 set_mem_attributes (dest
, type
, 1);
4199 if (cfun
->tail_call_marked
)
4200 /* Function incoming arguments may overlap with sibling call
4201 outgoing arguments and we cannot allow reordering of reads
4202 from function arguments with stores to outgoing arguments
4203 of sibling calls. */
4204 set_mem_alias_set (dest
, 0);
4206 emit_move_insn (dest
, x
);
4209 /* Emit and annotate a single push insn. */
4212 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4214 int delta
, old_delta
= stack_pointer_delta
;
4215 rtx_insn
*prev
= get_last_insn ();
4218 emit_single_push_insn_1 (mode
, x
, type
);
4220 last
= get_last_insn ();
4222 /* Notice the common case where we emitted exactly one insn. */
4223 if (PREV_INSN (last
) == prev
)
4225 add_reg_note (last
, REG_ARGS_SIZE
, GEN_INT (stack_pointer_delta
));
4229 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4230 gcc_assert (delta
== INT_MIN
|| delta
== old_delta
);
4234 /* If reading SIZE bytes from X will end up reading from
4235 Y return the number of bytes that overlap. Return -1
4236 if there is no overlap or -2 if we can't determine
4237 (for example when X and Y have different base registers). */
4240 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4242 rtx tmp
= plus_constant (Pmode
, x
, size
);
4243 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4245 if (!CONST_INT_P (sub
))
4248 HOST_WIDE_INT val
= INTVAL (sub
);
4250 return IN_RANGE (val
, 1, size
) ? val
: -1;
4253 /* Generate code to push X onto the stack, assuming it has mode MODE and
4255 MODE is redundant except when X is a CONST_INT (since they don't
4257 SIZE is an rtx for the size of data to be copied (in bytes),
4258 needed only if X is BLKmode.
4259 Return true if successful. May return false if asked to push a
4260 partial argument during a sibcall optimization (as specified by
4261 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4264 ALIGN (in bits) is maximum alignment we can assume.
4266 If PARTIAL and REG are both nonzero, then copy that many of the first
4267 bytes of X into registers starting with REG, and push the rest of X.
4268 The amount of space pushed is decreased by PARTIAL bytes.
4269 REG must be a hard register in this case.
4270 If REG is zero but PARTIAL is not, take any all others actions for an
4271 argument partially in registers, but do not actually load any
4274 EXTRA is the amount in bytes of extra space to leave next to this arg.
4275 This is ignored if an argument block has already been allocated.
4277 On a machine that lacks real push insns, ARGS_ADDR is the address of
4278 the bottom of the argument block for this call. We use indexing off there
4279 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4280 argument block has not been preallocated.
4282 ARGS_SO_FAR is the size of args previously pushed for this call.
4284 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4285 for arguments passed in registers. If nonzero, it will be the number
4286 of bytes required. */
4289 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4290 unsigned int align
, int partial
, rtx reg
, int extra
,
4291 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4292 rtx alignment_pad
, bool sibcall_p
)
4295 enum direction stack_direction
= STACK_GROWS_DOWNWARD
? downward
: upward
;
4297 /* Decide where to pad the argument: `downward' for below,
4298 `upward' for above, or `none' for don't pad it.
4299 Default is below for small data on big-endian machines; else above. */
4300 enum direction where_pad
= FUNCTION_ARG_PADDING (mode
, type
);
4302 /* Invert direction if stack is post-decrement.
4304 if (STACK_PUSH_CODE
== POST_DEC
)
4305 if (where_pad
!= none
)
4306 where_pad
= (where_pad
== downward
? upward
: downward
);
4310 int nregs
= partial
/ UNITS_PER_WORD
;
4311 rtx
*tmp_regs
= NULL
;
4312 int overlapping
= 0;
4315 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4317 /* Copy a block into the stack, entirely or partially. */
4324 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4325 used
= partial
- offset
;
4327 if (mode
!= BLKmode
)
4329 /* A value is to be stored in an insufficiently aligned
4330 stack slot; copy via a suitably aligned slot if
4332 size
= GEN_INT (GET_MODE_SIZE (mode
));
4333 if (!MEM_P (xinner
))
4335 temp
= assign_temp (type
, 1, 1);
4336 emit_move_insn (temp
, xinner
);
4343 /* USED is now the # of bytes we need not copy to the stack
4344 because registers will take care of them. */
4347 xinner
= adjust_address (xinner
, BLKmode
, used
);
4349 /* If the partial register-part of the arg counts in its stack size,
4350 skip the part of stack space corresponding to the registers.
4351 Otherwise, start copying to the beginning of the stack space,
4352 by setting SKIP to 0. */
4353 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4355 #ifdef PUSH_ROUNDING
4356 /* Do it with several push insns if that doesn't take lots of insns
4357 and if there is no difficulty with push insns that skip bytes
4358 on the stack for alignment purposes. */
4361 && CONST_INT_P (size
)
4363 && MEM_ALIGN (xinner
) >= align
4364 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4365 /* Here we avoid the case of a structure whose weak alignment
4366 forces many pushes of a small amount of data,
4367 and such small pushes do rounding that causes trouble. */
4368 && ((! SLOW_UNALIGNED_ACCESS (word_mode
, align
))
4369 || align
>= BIGGEST_ALIGNMENT
4370 || (PUSH_ROUNDING (align
/ BITS_PER_UNIT
)
4371 == (align
/ BITS_PER_UNIT
)))
4372 && (HOST_WIDE_INT
) PUSH_ROUNDING (INTVAL (size
)) == INTVAL (size
))
4374 /* Push padding now if padding above and stack grows down,
4375 or if padding below and stack grows up.
4376 But if space already allocated, this has already been done. */
4377 if (extra
&& args_addr
== 0
4378 && where_pad
!= none
&& where_pad
!= stack_direction
)
4379 anti_adjust_stack (GEN_INT (extra
));
4381 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4384 #endif /* PUSH_ROUNDING */
4388 /* Otherwise make space on the stack and copy the data
4389 to the address of that space. */
4391 /* Deduct words put into registers from the size we must copy. */
4394 if (CONST_INT_P (size
))
4395 size
= GEN_INT (INTVAL (size
) - used
);
4397 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4398 gen_int_mode (used
, GET_MODE (size
)),
4399 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4402 /* Get the address of the stack space.
4403 In this case, we do not deal with EXTRA separately.
4404 A single stack adjust will do. */
4407 temp
= push_block (size
, extra
, where_pad
== downward
);
4410 else if (CONST_INT_P (args_so_far
))
4411 temp
= memory_address (BLKmode
,
4412 plus_constant (Pmode
, args_addr
,
4413 skip
+ INTVAL (args_so_far
)));
4415 temp
= memory_address (BLKmode
,
4416 plus_constant (Pmode
,
4417 gen_rtx_PLUS (Pmode
,
4422 if (!ACCUMULATE_OUTGOING_ARGS
)
4424 /* If the source is referenced relative to the stack pointer,
4425 copy it to another register to stabilize it. We do not need
4426 to do this if we know that we won't be changing sp. */
4428 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4429 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4430 temp
= copy_to_reg (temp
);
4433 target
= gen_rtx_MEM (BLKmode
, temp
);
4435 /* We do *not* set_mem_attributes here, because incoming arguments
4436 may overlap with sibling call outgoing arguments and we cannot
4437 allow reordering of reads from function arguments with stores
4438 to outgoing arguments of sibling calls. We do, however, want
4439 to record the alignment of the stack slot. */
4440 /* ALIGN may well be better aligned than TYPE, e.g. due to
4441 PARM_BOUNDARY. Assume the caller isn't lying. */
4442 set_mem_align (target
, align
);
4444 /* If part should go in registers and pushing to that part would
4445 overwrite some of the values that need to go into regs, load the
4446 overlapping values into temporary pseudos to be moved into the hard
4447 regs at the end after the stack pushing has completed.
4448 We cannot load them directly into the hard regs here because
4449 they can be clobbered by the block move expansions.
4452 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4453 && GET_CODE (reg
) != PARALLEL
)
4455 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4456 if (overlapping
> 0)
4458 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4459 overlapping
/= UNITS_PER_WORD
;
4461 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4463 for (int i
= 0; i
< overlapping
; i
++)
4464 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4466 for (int i
= 0; i
< overlapping
; i
++)
4467 emit_move_insn (tmp_regs
[i
],
4468 operand_subword_force (target
, i
, mode
));
4470 else if (overlapping
== -1)
4472 /* Could not determine whether there is overlap.
4473 Fail the sibcall. */
4481 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4484 else if (partial
> 0)
4486 /* Scalar partly in registers. */
4488 int size
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
;
4491 /* # bytes of start of argument
4492 that we must make space for but need not store. */
4493 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4494 int args_offset
= INTVAL (args_so_far
);
4497 /* Push padding now if padding above and stack grows down,
4498 or if padding below and stack grows up.
4499 But if space already allocated, this has already been done. */
4500 if (extra
&& args_addr
== 0
4501 && where_pad
!= none
&& where_pad
!= stack_direction
)
4502 anti_adjust_stack (GEN_INT (extra
));
4504 /* If we make space by pushing it, we might as well push
4505 the real data. Otherwise, we can leave OFFSET nonzero
4506 and leave the space uninitialized. */
4510 /* Now NOT_STACK gets the number of words that we don't need to
4511 allocate on the stack. Convert OFFSET to words too. */
4512 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4513 offset
/= UNITS_PER_WORD
;
4515 /* If the partial register-part of the arg counts in its stack size,
4516 skip the part of stack space corresponding to the registers.
4517 Otherwise, start copying to the beginning of the stack space,
4518 by setting SKIP to 0. */
4519 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4521 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4522 x
= validize_mem (force_const_mem (mode
, x
));
4524 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4525 SUBREGs of such registers are not allowed. */
4526 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4527 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4528 x
= copy_to_reg (x
);
4530 /* Loop over all the words allocated on the stack for this arg. */
4531 /* We can do it by words, because any scalar bigger than a word
4532 has a size a multiple of a word. */
4533 for (i
= size
- 1; i
>= not_stack
; i
--)
4534 if (i
>= not_stack
+ offset
)
4535 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4536 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4538 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4540 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4548 /* Push padding now if padding above and stack grows down,
4549 or if padding below and stack grows up.
4550 But if space already allocated, this has already been done. */
4551 if (extra
&& args_addr
== 0
4552 && where_pad
!= none
&& where_pad
!= stack_direction
)
4553 anti_adjust_stack (GEN_INT (extra
));
4555 #ifdef PUSH_ROUNDING
4556 if (args_addr
== 0 && PUSH_ARGS
)
4557 emit_single_push_insn (mode
, x
, type
);
4561 if (CONST_INT_P (args_so_far
))
4563 = memory_address (mode
,
4564 plus_constant (Pmode
, args_addr
,
4565 INTVAL (args_so_far
)));
4567 addr
= memory_address (mode
, gen_rtx_PLUS (Pmode
, args_addr
,
4569 dest
= gen_rtx_MEM (mode
, addr
);
4571 /* We do *not* set_mem_attributes here, because incoming arguments
4572 may overlap with sibling call outgoing arguments and we cannot
4573 allow reordering of reads from function arguments with stores
4574 to outgoing arguments of sibling calls. We do, however, want
4575 to record the alignment of the stack slot. */
4576 /* ALIGN may well be better aligned than TYPE, e.g. due to
4577 PARM_BOUNDARY. Assume the caller isn't lying. */
4578 set_mem_align (dest
, align
);
4580 emit_move_insn (dest
, x
);
4584 /* Move the partial arguments into the registers and any overlapping
4585 values that we moved into the pseudos in tmp_regs. */
4586 if (partial
> 0 && reg
!= 0)
4588 /* Handle calls that pass values in multiple non-contiguous locations.
4589 The Irix 6 ABI has examples of this. */
4590 if (GET_CODE (reg
) == PARALLEL
)
4591 emit_group_load (reg
, x
, type
, -1);
4594 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4595 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4597 for (int i
= 0; i
< overlapping
; i
++)
4598 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4599 + nregs
- overlapping
+ i
),
4605 if (extra
&& args_addr
== 0 && where_pad
== stack_direction
)
4606 anti_adjust_stack (GEN_INT (extra
));
4608 if (alignment_pad
&& args_addr
== 0)
4609 anti_adjust_stack (alignment_pad
);
4614 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4618 get_subtarget (rtx x
)
4622 /* Only registers can be subtargets. */
4624 /* Don't use hard regs to avoid extending their life. */
4625 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4629 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4630 FIELD is a bitfield. Returns true if the optimization was successful,
4631 and there's nothing else to do. */
4634 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize
,
4635 unsigned HOST_WIDE_INT bitpos
,
4636 unsigned HOST_WIDE_INT bitregion_start
,
4637 unsigned HOST_WIDE_INT bitregion_end
,
4638 machine_mode mode1
, rtx str_rtx
,
4639 tree to
, tree src
, bool reverse
)
4641 machine_mode str_mode
= GET_MODE (str_rtx
);
4642 unsigned int str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4647 enum tree_code code
;
4649 if (mode1
!= VOIDmode
4650 || bitsize
>= BITS_PER_WORD
4651 || str_bitsize
> BITS_PER_WORD
4652 || TREE_SIDE_EFFECTS (to
)
4653 || TREE_THIS_VOLATILE (to
))
4657 if (TREE_CODE (src
) != SSA_NAME
)
4659 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4662 srcstmt
= get_gimple_for_ssa_name (src
);
4664 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4667 code
= gimple_assign_rhs_code (srcstmt
);
4669 op0
= gimple_assign_rhs1 (srcstmt
);
4671 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4672 to find its initialization. Hopefully the initialization will
4673 be from a bitfield load. */
4674 if (TREE_CODE (op0
) == SSA_NAME
)
4676 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4678 /* We want to eventually have OP0 be the same as TO, which
4679 should be a bitfield. */
4681 || !is_gimple_assign (op0stmt
)
4682 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4684 op0
= gimple_assign_rhs1 (op0stmt
);
4687 op1
= gimple_assign_rhs2 (srcstmt
);
4689 if (!operand_equal_p (to
, op0
, 0))
4692 if (MEM_P (str_rtx
))
4694 unsigned HOST_WIDE_INT offset1
;
4696 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4697 str_bitsize
= BITS_PER_WORD
;
4699 scalar_int_mode best_mode
;
4700 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4701 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4703 str_mode
= best_mode
;
4704 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4707 bitpos
%= str_bitsize
;
4708 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4709 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4711 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4714 gcc_assert (!reverse
);
4716 /* If the bit field covers the whole REG/MEM, store_field
4717 will likely generate better code. */
4718 if (bitsize
>= str_bitsize
)
4721 /* We can't handle fields split across multiple entities. */
4722 if (bitpos
+ bitsize
> str_bitsize
)
4725 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4726 bitpos
= str_bitsize
- bitpos
- bitsize
;
4732 /* For now, just optimize the case of the topmost bitfield
4733 where we don't need to do any masking and also
4734 1 bit bitfields where xor can be used.
4735 We might win by one instruction for the other bitfields
4736 too if insv/extv instructions aren't used, so that
4737 can be added later. */
4738 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4739 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4742 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4743 value
= convert_modes (str_mode
,
4744 TYPE_MODE (TREE_TYPE (op1
)), value
,
4745 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4747 /* We may be accessing data outside the field, which means
4748 we can alias adjacent data. */
4749 if (MEM_P (str_rtx
))
4751 str_rtx
= shallow_copy_rtx (str_rtx
);
4752 set_mem_alias_set (str_rtx
, 0);
4753 set_mem_expr (str_rtx
, 0);
4756 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4758 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4762 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4764 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4766 value
= flip_storage_order (str_mode
, value
);
4767 result
= expand_binop (str_mode
, binop
, str_rtx
,
4768 value
, str_rtx
, 1, OPTAB_WIDEN
);
4769 if (result
!= str_rtx
)
4770 emit_move_insn (str_rtx
, result
);
4775 if (TREE_CODE (op1
) != INTEGER_CST
)
4777 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4778 value
= convert_modes (str_mode
,
4779 TYPE_MODE (TREE_TYPE (op1
)), value
,
4780 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4782 /* We may be accessing data outside the field, which means
4783 we can alias adjacent data. */
4784 if (MEM_P (str_rtx
))
4786 str_rtx
= shallow_copy_rtx (str_rtx
);
4787 set_mem_alias_set (str_rtx
, 0);
4788 set_mem_expr (str_rtx
, 0);
4791 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4792 if (bitpos
+ bitsize
!= str_bitsize
)
4794 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4796 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4798 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4800 value
= flip_storage_order (str_mode
, value
);
4801 result
= expand_binop (str_mode
, binop
, str_rtx
,
4802 value
, str_rtx
, 1, OPTAB_WIDEN
);
4803 if (result
!= str_rtx
)
4804 emit_move_insn (str_rtx
, result
);
4814 /* In the C++ memory model, consecutive bit fields in a structure are
4815 considered one memory location.
4817 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4818 returns the bit range of consecutive bits in which this COMPONENT_REF
4819 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4820 and *OFFSET may be adjusted in the process.
4822 If the access does not need to be restricted, 0 is returned in both
4823 *BITSTART and *BITEND. */
4826 get_bit_range (unsigned HOST_WIDE_INT
*bitstart
,
4827 unsigned HOST_WIDE_INT
*bitend
,
4829 HOST_WIDE_INT
*bitpos
,
4832 HOST_WIDE_INT bitoffset
;
4835 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4837 field
= TREE_OPERAND (exp
, 1);
4838 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4839 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4840 need to limit the range we can access. */
4843 *bitstart
= *bitend
= 0;
4847 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4848 part of a larger bit field, then the representative does not serve any
4849 useful purpose. This can occur in Ada. */
4850 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4853 HOST_WIDE_INT rbitsize
, rbitpos
;
4855 int unsignedp
, reversep
, volatilep
= 0;
4856 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4857 &roffset
, &rmode
, &unsignedp
, &reversep
,
4859 if ((rbitpos
% BITS_PER_UNIT
) != 0)
4861 *bitstart
= *bitend
= 0;
4866 /* Compute the adjustment to bitpos from the offset of the field
4867 relative to the representative. DECL_FIELD_OFFSET of field and
4868 repr are the same by construction if they are not constants,
4869 see finish_bitfield_layout. */
4870 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field
))
4871 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr
)))
4872 bitoffset
= (tree_to_uhwi (DECL_FIELD_OFFSET (field
))
4873 - tree_to_uhwi (DECL_FIELD_OFFSET (repr
))) * BITS_PER_UNIT
;
4876 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4877 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4879 /* If the adjustment is larger than bitpos, we would have a negative bit
4880 position for the lower bound and this may wreak havoc later. Adjust
4881 offset and bitpos to make the lower bound non-negative in that case. */
4882 if (bitoffset
> *bitpos
)
4884 HOST_WIDE_INT adjust
= bitoffset
- *bitpos
;
4885 gcc_assert ((adjust
% BITS_PER_UNIT
) == 0);
4888 if (*offset
== NULL_TREE
)
4889 *offset
= size_int (-adjust
/ BITS_PER_UNIT
);
4892 = size_binop (MINUS_EXPR
, *offset
, size_int (adjust
/ BITS_PER_UNIT
));
4896 *bitstart
= *bitpos
- bitoffset
;
4898 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4901 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4902 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4903 DECL_RTL was not set yet, return NORTL. */
4906 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4908 if (TREE_CODE (addr
) != ADDR_EXPR
)
4911 tree base
= TREE_OPERAND (addr
, 0);
4914 || TREE_ADDRESSABLE (base
)
4915 || DECL_MODE (base
) == BLKmode
)
4918 if (!DECL_RTL_SET_P (base
))
4921 return (!MEM_P (DECL_RTL (base
)));
4924 /* Returns true if the MEM_REF REF refers to an object that does not
4925 reside in memory and has non-BLKmode. */
4928 mem_ref_refers_to_non_mem_p (tree ref
)
4930 tree base
= TREE_OPERAND (ref
, 0);
4931 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4934 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4935 is true, try generating a nontemporal store. */
4938 expand_assignment (tree to
, tree from
, bool nontemporal
)
4944 enum insn_code icode
;
4946 /* Don't crash if the lhs of the assignment was erroneous. */
4947 if (TREE_CODE (to
) == ERROR_MARK
)
4949 expand_normal (from
);
4953 /* Optimize away no-op moves without side-effects. */
4954 if (operand_equal_p (to
, from
, 0))
4957 /* Handle misaligned stores. */
4958 mode
= TYPE_MODE (TREE_TYPE (to
));
4959 if ((TREE_CODE (to
) == MEM_REF
4960 || TREE_CODE (to
) == TARGET_MEM_REF
)
4962 && !mem_ref_refers_to_non_mem_p (to
)
4963 && ((align
= get_object_alignment (to
))
4964 < GET_MODE_ALIGNMENT (mode
))
4965 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4966 != CODE_FOR_nothing
)
4967 || SLOW_UNALIGNED_ACCESS (mode
, align
)))
4971 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4972 reg
= force_not_mem (reg
);
4973 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4974 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4975 reg
= flip_storage_order (mode
, reg
);
4977 if (icode
!= CODE_FOR_nothing
)
4979 struct expand_operand ops
[2];
4981 create_fixed_operand (&ops
[0], mem
);
4982 create_input_operand (&ops
[1], reg
, mode
);
4983 /* The movmisalign<mode> pattern cannot fail, else the assignment
4984 would silently be omitted. */
4985 expand_insn (icode
, 2, ops
);
4988 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
4993 /* Assignment of a structure component needs special treatment
4994 if the structure component's rtx is not simply a MEM.
4995 Assignment of an array element at a constant index, and assignment of
4996 an array element in an unaligned packed structure field, has the same
4997 problem. Same for (partially) storing into a non-memory object. */
4998 if (handled_component_p (to
)
4999 || (TREE_CODE (to
) == MEM_REF
5000 && (REF_REVERSE_STORAGE_ORDER (to
)
5001 || mem_ref_refers_to_non_mem_p (to
)))
5002 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5005 HOST_WIDE_INT bitsize
, bitpos
;
5006 unsigned HOST_WIDE_INT bitregion_start
= 0;
5007 unsigned HOST_WIDE_INT bitregion_end
= 0;
5009 int unsignedp
, reversep
, volatilep
= 0;
5013 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5014 &unsignedp
, &reversep
, &volatilep
);
5016 /* Make sure bitpos is not negative, it can wreak havoc later. */
5019 gcc_assert (offset
== NULL_TREE
);
5020 offset
= size_int (bitpos
>> LOG2_BITS_PER_UNIT
);
5021 bitpos
&= BITS_PER_UNIT
- 1;
5024 if (TREE_CODE (to
) == COMPONENT_REF
5025 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5026 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5027 /* The C++ memory model naturally applies to byte-aligned fields.
5028 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5029 BITSIZE are not byte-aligned, there is no need to limit the range
5030 we can access. This can occur with packed structures in Ada. */
5031 else if (bitsize
> 0
5032 && bitsize
% BITS_PER_UNIT
== 0
5033 && bitpos
% BITS_PER_UNIT
== 0)
5035 bitregion_start
= bitpos
;
5036 bitregion_end
= bitpos
+ bitsize
- 1;
5039 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5041 /* If the field has a mode, we want to access it in the
5042 field's mode, not the computed mode.
5043 If a MEM has VOIDmode (external with incomplete type),
5044 use BLKmode for it instead. */
5047 if (mode1
!= VOIDmode
)
5048 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5049 else if (GET_MODE (to_rtx
) == VOIDmode
)
5050 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5055 machine_mode address_mode
;
5058 if (!MEM_P (to_rtx
))
5060 /* We can get constant negative offsets into arrays with broken
5061 user code. Translate this to a trap instead of ICEing. */
5062 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5063 expand_builtin_trap ();
5064 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5067 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5068 address_mode
= get_address_mode (to_rtx
);
5069 if (GET_MODE (offset_rtx
) != address_mode
)
5071 /* We cannot be sure that the RTL in offset_rtx is valid outside
5072 of a memory address context, so force it into a register
5073 before attempting to convert it to the desired mode. */
5074 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5075 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5078 /* If we have an expression in OFFSET_RTX and a non-zero
5079 byte offset in BITPOS, adding the byte offset before the
5080 OFFSET_RTX results in better intermediate code, which makes
5081 later rtl optimization passes perform better.
5083 We prefer intermediate code like this:
5085 r124:DI=r123:DI+0x18
5090 r124:DI=r123:DI+0x10
5091 [r124:DI+0x8]=r121:DI
5093 This is only done for aligned data values, as these can
5094 be expected to result in single move instructions. */
5095 if (mode1
!= VOIDmode
5098 && (bitpos
% bitsize
) == 0
5099 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
5100 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5102 to_rtx
= adjust_address (to_rtx
, mode1
, bitpos
/ BITS_PER_UNIT
);
5103 bitregion_start
= 0;
5104 if (bitregion_end
>= (unsigned HOST_WIDE_INT
) bitpos
)
5105 bitregion_end
-= bitpos
;
5109 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5110 highest_pow2_factor_for_target (to
,
5114 /* No action is needed if the target is not a memory and the field
5115 lies completely outside that target. This can occur if the source
5116 code contains an out-of-bounds access to a small array. */
5118 && GET_MODE (to_rtx
) != BLKmode
5119 && (unsigned HOST_WIDE_INT
) bitpos
5120 >= GET_MODE_PRECISION (GET_MODE (to_rtx
)))
5122 expand_normal (from
);
5125 /* Handle expand_expr of a complex value returning a CONCAT. */
5126 else if (GET_CODE (to_rtx
) == CONCAT
)
5128 unsigned short mode_bitsize
= GET_MODE_BITSIZE (GET_MODE (to_rtx
));
5129 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from
)))
5131 && bitsize
== mode_bitsize
)
5132 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5133 else if (bitsize
== mode_bitsize
/ 2
5134 && (bitpos
== 0 || bitpos
== mode_bitsize
/ 2))
5135 result
= store_expr (from
, XEXP (to_rtx
, bitpos
!= 0), false,
5136 nontemporal
, reversep
);
5137 else if (bitpos
+ bitsize
<= mode_bitsize
/ 2)
5138 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5139 bitregion_start
, bitregion_end
,
5140 mode1
, from
, get_alias_set (to
),
5141 nontemporal
, reversep
);
5142 else if (bitpos
>= mode_bitsize
/ 2)
5143 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5144 bitpos
- mode_bitsize
/ 2,
5145 bitregion_start
, bitregion_end
,
5146 mode1
, from
, get_alias_set (to
),
5147 nontemporal
, reversep
);
5148 else if (bitpos
== 0 && bitsize
== mode_bitsize
)
5151 result
= expand_normal (from
);
5152 from_rtx
= simplify_gen_subreg (GET_MODE (to_rtx
), result
,
5153 TYPE_MODE (TREE_TYPE (from
)), 0);
5154 emit_move_insn (XEXP (to_rtx
, 0),
5155 read_complex_part (from_rtx
, false));
5156 emit_move_insn (XEXP (to_rtx
, 1),
5157 read_complex_part (from_rtx
, true));
5161 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5162 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5163 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5164 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5165 result
= store_field (temp
, bitsize
, bitpos
,
5166 bitregion_start
, bitregion_end
,
5167 mode1
, from
, get_alias_set (to
),
5168 nontemporal
, reversep
);
5169 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5170 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5177 /* If the field is at offset zero, we could have been given the
5178 DECL_RTX of the parent struct. Don't munge it. */
5179 to_rtx
= shallow_copy_rtx (to_rtx
);
5180 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5182 MEM_VOLATILE_P (to_rtx
) = 1;
5185 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5186 bitregion_start
, bitregion_end
,
5187 mode1
, to_rtx
, to
, from
,
5191 result
= store_field (to_rtx
, bitsize
, bitpos
,
5192 bitregion_start
, bitregion_end
,
5193 mode1
, from
, get_alias_set (to
),
5194 nontemporal
, reversep
);
5198 preserve_temp_slots (result
);
5203 /* If the rhs is a function call and its value is not an aggregate,
5204 call the function before we start to compute the lhs.
5205 This is needed for correct code for cases such as
5206 val = setjmp (buf) on machines where reference to val
5207 requires loading up part of an address in a separate insn.
5209 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5210 since it might be a promoted variable where the zero- or sign- extension
5211 needs to be done. Handling this in the normal way is safe because no
5212 computation is done before the call. The same is true for SSA names. */
5213 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5214 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5215 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5217 || TREE_CODE (to
) == PARM_DECL
5218 || TREE_CODE (to
) == RESULT_DECL
)
5219 && REG_P (DECL_RTL (to
)))
5220 || TREE_CODE (to
) == SSA_NAME
))
5226 value
= expand_normal (from
);
5228 /* Split value and bounds to store them separately. */
5229 chkp_split_slot (value
, &value
, &bounds
);
5232 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5234 /* Handle calls that return values in multiple non-contiguous locations.
5235 The Irix 6 ABI has examples of this. */
5236 if (GET_CODE (to_rtx
) == PARALLEL
)
5238 if (GET_CODE (value
) == PARALLEL
)
5239 emit_group_move (to_rtx
, value
);
5241 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5242 int_size_in_bytes (TREE_TYPE (from
)));
5244 else if (GET_CODE (value
) == PARALLEL
)
5245 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5246 int_size_in_bytes (TREE_TYPE (from
)));
5247 else if (GET_MODE (to_rtx
) == BLKmode
)
5249 /* Handle calls that return BLKmode values in registers. */
5251 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5253 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5257 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5258 value
= convert_memory_address_addr_space
5259 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5260 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5262 emit_move_insn (to_rtx
, value
);
5265 /* Store bounds if required. */
5267 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5269 gcc_assert (MEM_P (to_rtx
));
5270 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5273 preserve_temp_slots (to_rtx
);
5278 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5279 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5281 /* Don't move directly into a return register. */
5282 if (TREE_CODE (to
) == RESULT_DECL
5283 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5289 /* If the source is itself a return value, it still is in a pseudo at
5290 this point so we can move it back to the return register directly. */
5292 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5293 && TREE_CODE (from
) != CALL_EXPR
)
5294 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5296 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5298 /* Handle calls that return values in multiple non-contiguous locations.
5299 The Irix 6 ABI has examples of this. */
5300 if (GET_CODE (to_rtx
) == PARALLEL
)
5302 if (GET_CODE (temp
) == PARALLEL
)
5303 emit_group_move (to_rtx
, temp
);
5305 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5306 int_size_in_bytes (TREE_TYPE (from
)));
5309 emit_move_insn (to_rtx
, temp
);
5311 preserve_temp_slots (to_rtx
);
5316 /* In case we are returning the contents of an object which overlaps
5317 the place the value is being stored, use a safe function when copying
5318 a value through a pointer into a structure value return block. */
5319 if (TREE_CODE (to
) == RESULT_DECL
5320 && TREE_CODE (from
) == INDIRECT_REF
5321 && ADDR_SPACE_GENERIC_P
5322 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5323 && refs_may_alias_p (to
, from
)
5324 && cfun
->returns_struct
5325 && !cfun
->returns_pcc_struct
)
5330 size
= expr_size (from
);
5331 from_rtx
= expand_normal (from
);
5333 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5335 preserve_temp_slots (to_rtx
);
5340 /* Compute FROM and store the value in the rtx we got. */
5343 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5344 preserve_temp_slots (result
);
5349 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5350 succeeded, false otherwise. */
5353 emit_storent_insn (rtx to
, rtx from
)
5355 struct expand_operand ops
[2];
5356 machine_mode mode
= GET_MODE (to
);
5357 enum insn_code code
= optab_handler (storent_optab
, mode
);
5359 if (code
== CODE_FOR_nothing
)
5362 create_fixed_operand (&ops
[0], to
);
5363 create_input_operand (&ops
[1], from
, mode
);
5364 return maybe_expand_insn (code
, 2, ops
);
5367 /* Generate code for computing expression EXP,
5368 and storing the value into TARGET.
5370 If the mode is BLKmode then we may return TARGET itself.
5371 It turns out that in BLKmode it doesn't cause a problem.
5372 because C has no operators that could combine two different
5373 assignments into the same BLKmode object with different values
5374 with no sequence point. Will other languages need this to
5377 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5378 stack, and block moves may need to be treated specially.
5380 If NONTEMPORAL is true, try using a nontemporal store instruction.
5382 If REVERSE is true, the store is to be done in reverse order.
5384 If BTARGET is not NULL then computed bounds of EXP are
5385 associated with BTARGET. */
5388 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5389 bool nontemporal
, bool reverse
, tree btarget
)
5392 rtx alt_rtl
= NULL_RTX
;
5393 location_t loc
= curr_insn_location ();
5395 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5397 /* C++ can generate ?: expressions with a throw expression in one
5398 branch and an rvalue in the other. Here, we resolve attempts to
5399 store the throw expression's nonexistent result. */
5400 gcc_assert (!call_param_p
);
5401 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5404 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5406 /* Perform first part of compound expression, then assign from second
5408 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5409 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5410 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5411 call_param_p
, nontemporal
, reverse
,
5414 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5416 /* For conditional expression, get safe form of the target. Then
5417 test the condition, doing the appropriate assignment on either
5418 side. This avoids the creation of unnecessary temporaries.
5419 For non-BLKmode, it is more efficient not to do this. */
5421 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5423 do_pending_stack_adjust ();
5425 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5426 profile_probability::uninitialized ());
5427 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5428 nontemporal
, reverse
, btarget
);
5429 emit_jump_insn (targetm
.gen_jump (lab2
));
5432 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5433 nontemporal
, reverse
, btarget
);
5439 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5440 /* If this is a scalar in a register that is stored in a wider mode
5441 than the declared mode, compute the result into its declared mode
5442 and then convert to the wider mode. Our value is the computed
5445 rtx inner_target
= 0;
5446 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5447 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5449 /* We can do the conversion inside EXP, which will often result
5450 in some optimizations. Do the conversion in two steps: first
5451 change the signedness, if needed, then the extend. But don't
5452 do this if the type of EXP is a subtype of something else
5453 since then the conversion might involve more than just
5454 converting modes. */
5455 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5456 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5457 && GET_MODE_PRECISION (outer_mode
)
5458 == TYPE_PRECISION (TREE_TYPE (exp
)))
5460 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5461 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5463 /* Some types, e.g. Fortran's logical*4, won't have a signed
5464 version, so use the mode instead. */
5466 = (signed_or_unsigned_type_for
5467 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5469 ntype
= lang_hooks
.types
.type_for_mode
5470 (TYPE_MODE (TREE_TYPE (exp
)),
5471 SUBREG_PROMOTED_SIGN (target
));
5473 exp
= fold_convert_loc (loc
, ntype
, exp
);
5476 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5477 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5480 inner_target
= SUBREG_REG (target
);
5483 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5484 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5486 /* Handle bounds returned by call. */
5487 if (TREE_CODE (exp
) == CALL_EXPR
)
5490 chkp_split_slot (temp
, &temp
, &bounds
);
5491 if (bounds
&& btarget
)
5493 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5494 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5495 chkp_set_rtl_bounds (btarget
, tmp
);
5499 /* If TEMP is a VOIDmode constant, use convert_modes to make
5500 sure that we properly convert it. */
5501 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5503 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5504 temp
, SUBREG_PROMOTED_SIGN (target
));
5505 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5506 SUBREG_PROMOTED_SIGN (target
));
5509 convert_move (SUBREG_REG (target
), temp
,
5510 SUBREG_PROMOTED_SIGN (target
));
5514 else if ((TREE_CODE (exp
) == STRING_CST
5515 || (TREE_CODE (exp
) == MEM_REF
5516 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5517 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5519 && integer_zerop (TREE_OPERAND (exp
, 1))))
5520 && !nontemporal
&& !call_param_p
5523 /* Optimize initialization of an array with a STRING_CST. */
5524 HOST_WIDE_INT exp_len
, str_copy_len
;
5526 tree str
= TREE_CODE (exp
) == STRING_CST
5527 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5529 exp_len
= int_expr_size (exp
);
5533 if (TREE_STRING_LENGTH (str
) <= 0)
5536 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5537 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5540 str_copy_len
= TREE_STRING_LENGTH (str
);
5541 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5542 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5544 str_copy_len
+= STORE_MAX_PIECES
- 1;
5545 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5547 str_copy_len
= MIN (str_copy_len
, exp_len
);
5548 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5549 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5550 MEM_ALIGN (target
), false))
5555 dest_mem
= store_by_pieces (dest_mem
,
5556 str_copy_len
, builtin_strncpy_read_str
,
5558 TREE_STRING_POINTER (str
)),
5559 MEM_ALIGN (target
), false,
5560 exp_len
> str_copy_len
? 1 : 0);
5561 if (exp_len
> str_copy_len
)
5562 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5563 GEN_INT (exp_len
- str_copy_len
),
5572 /* If we want to use a nontemporal or a reverse order store, force the
5573 value into a register first. */
5574 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5575 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5577 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5580 /* Handle bounds returned by call. */
5581 if (TREE_CODE (exp
) == CALL_EXPR
)
5584 chkp_split_slot (temp
, &temp
, &bounds
);
5585 if (bounds
&& btarget
)
5587 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5588 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5589 chkp_set_rtl_bounds (btarget
, tmp
);
5594 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5595 the same as that of TARGET, adjust the constant. This is needed, for
5596 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5597 only a word-sized value. */
5598 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5599 && TREE_CODE (exp
) != ERROR_MARK
5600 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5601 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5602 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5604 /* If value was not generated in the target, store it there.
5605 Convert the value to TARGET's type first if necessary and emit the
5606 pending incrementations that have been queued when expanding EXP.
5607 Note that we cannot emit the whole queue blindly because this will
5608 effectively disable the POST_INC optimization later.
5610 If TEMP and TARGET compare equal according to rtx_equal_p, but
5611 one or both of them are volatile memory refs, we have to distinguish
5613 - expand_expr has used TARGET. In this case, we must not generate
5614 another copy. This can be detected by TARGET being equal according
5616 - expand_expr has not used TARGET - that means that the source just
5617 happens to have the same RTX form. Since temp will have been created
5618 by expand_expr, it will compare unequal according to == .
5619 We must generate a copy in this case, to reach the correct number
5620 of volatile memory references. */
5622 if ((! rtx_equal_p (temp
, target
)
5623 || (temp
!= target
&& (side_effects_p (temp
)
5624 || side_effects_p (target
))))
5625 && TREE_CODE (exp
) != ERROR_MARK
5626 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5627 but TARGET is not valid memory reference, TEMP will differ
5628 from TARGET although it is really the same location. */
5630 && rtx_equal_p (alt_rtl
, target
)
5631 && !side_effects_p (alt_rtl
)
5632 && !side_effects_p (target
))
5633 /* If there's nothing to copy, don't bother. Don't call
5634 expr_size unless necessary, because some front-ends (C++)
5635 expr_size-hook must not be given objects that are not
5636 supposed to be bit-copied or bit-initialized. */
5637 && expr_size (exp
) != const0_rtx
)
5639 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5641 if (GET_MODE (target
) == BLKmode
)
5643 /* Handle calls that return BLKmode values in registers. */
5644 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5645 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5647 store_bit_field (target
,
5648 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5649 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5652 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5655 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5657 /* Handle copying a string constant into an array. The string
5658 constant may be shorter than the array. So copy just the string's
5659 actual length, and clear the rest. First get the size of the data
5660 type of the string, which is actually the size of the target. */
5661 rtx size
= expr_size (exp
);
5663 if (CONST_INT_P (size
)
5664 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5665 emit_block_move (target
, temp
, size
,
5667 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5670 machine_mode pointer_mode
5671 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5672 machine_mode address_mode
= get_address_mode (target
);
5674 /* Compute the size of the data to copy from the string. */
5676 = size_binop_loc (loc
, MIN_EXPR
,
5677 make_tree (sizetype
, size
),
5678 size_int (TREE_STRING_LENGTH (exp
)));
5680 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5682 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5683 rtx_code_label
*label
= 0;
5685 /* Copy that much. */
5686 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5687 TYPE_UNSIGNED (sizetype
));
5688 emit_block_move (target
, temp
, copy_size_rtx
,
5690 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5692 /* Figure out how much is left in TARGET that we have to clear.
5693 Do all calculations in pointer_mode. */
5694 if (CONST_INT_P (copy_size_rtx
))
5696 size
= plus_constant (address_mode
, size
,
5697 -INTVAL (copy_size_rtx
));
5698 target
= adjust_address (target
, BLKmode
,
5699 INTVAL (copy_size_rtx
));
5703 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5704 copy_size_rtx
, NULL_RTX
, 0,
5707 if (GET_MODE (copy_size_rtx
) != address_mode
)
5708 copy_size_rtx
= convert_to_mode (address_mode
,
5710 TYPE_UNSIGNED (sizetype
));
5712 target
= offset_address (target
, copy_size_rtx
,
5713 highest_pow2_factor (copy_size
));
5714 label
= gen_label_rtx ();
5715 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5716 GET_MODE (size
), 0, label
);
5719 if (size
!= const0_rtx
)
5720 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5726 /* Handle calls that return values in multiple non-contiguous locations.
5727 The Irix 6 ABI has examples of this. */
5728 else if (GET_CODE (target
) == PARALLEL
)
5730 if (GET_CODE (temp
) == PARALLEL
)
5731 emit_group_move (target
, temp
);
5733 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5734 int_size_in_bytes (TREE_TYPE (exp
)));
5736 else if (GET_CODE (temp
) == PARALLEL
)
5737 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5738 int_size_in_bytes (TREE_TYPE (exp
)));
5739 else if (GET_MODE (temp
) == BLKmode
)
5740 emit_block_move (target
, temp
, expr_size (exp
),
5742 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5743 /* If we emit a nontemporal store, there is nothing else to do. */
5744 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5749 temp
= flip_storage_order (GET_MODE (target
), temp
);
5750 temp
= force_operand (temp
, target
);
5752 emit_move_insn (target
, temp
);
5759 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5761 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5764 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5768 /* Return true if field F of structure TYPE is a flexible array. */
5771 flexible_array_member_p (const_tree f
, const_tree type
)
5776 return (DECL_CHAIN (f
) == NULL
5777 && TREE_CODE (tf
) == ARRAY_TYPE
5779 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5780 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5781 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5782 && int_size_in_bytes (type
) >= 0);
5785 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5786 must have in order for it to completely initialize a value of type TYPE.
5787 Return -1 if the number isn't known.
5789 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5791 static HOST_WIDE_INT
5792 count_type_elements (const_tree type
, bool for_ctor_p
)
5794 switch (TREE_CODE (type
))
5800 nelts
= array_type_nelts (type
);
5801 if (nelts
&& tree_fits_uhwi_p (nelts
))
5803 unsigned HOST_WIDE_INT n
;
5805 n
= tree_to_uhwi (nelts
) + 1;
5806 if (n
== 0 || for_ctor_p
)
5809 return n
* count_type_elements (TREE_TYPE (type
), false);
5811 return for_ctor_p
? -1 : 1;
5816 unsigned HOST_WIDE_INT n
;
5820 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5821 if (TREE_CODE (f
) == FIELD_DECL
)
5824 n
+= count_type_elements (TREE_TYPE (f
), false);
5825 else if (!flexible_array_member_p (f
, type
))
5826 /* Don't count flexible arrays, which are not supposed
5827 to be initialized. */
5835 case QUAL_UNION_TYPE
:
5840 gcc_assert (!for_ctor_p
);
5841 /* Estimate the number of scalars in each field and pick the
5842 maximum. Other estimates would do instead; the idea is simply
5843 to make sure that the estimate is not sensitive to the ordering
5846 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5847 if (TREE_CODE (f
) == FIELD_DECL
)
5849 m
= count_type_elements (TREE_TYPE (f
), false);
5850 /* If the field doesn't span the whole union, add an extra
5851 scalar for the rest. */
5852 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5853 TYPE_SIZE (type
)) != 1)
5865 return TYPE_VECTOR_SUBPARTS (type
);
5869 case FIXED_POINT_TYPE
:
5874 case REFERENCE_TYPE
:
5890 /* Helper for categorize_ctor_elements. Identical interface. */
5893 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5894 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5896 unsigned HOST_WIDE_INT idx
;
5897 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5898 tree value
, purpose
, elt_type
;
5900 /* Whether CTOR is a valid constant initializer, in accordance with what
5901 initializer_constant_valid_p does. If inferred from the constructor
5902 elements, true until proven otherwise. */
5903 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5904 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5909 elt_type
= NULL_TREE
;
5911 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5913 HOST_WIDE_INT mult
= 1;
5915 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5917 tree lo_index
= TREE_OPERAND (purpose
, 0);
5918 tree hi_index
= TREE_OPERAND (purpose
, 1);
5920 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5921 mult
= (tree_to_uhwi (hi_index
)
5922 - tree_to_uhwi (lo_index
) + 1);
5925 elt_type
= TREE_TYPE (value
);
5927 switch (TREE_CODE (value
))
5931 HOST_WIDE_INT nz
= 0, ic
= 0;
5933 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5936 nz_elts
+= mult
* nz
;
5937 init_elts
+= mult
* ic
;
5939 if (const_from_elts_p
&& const_p
)
5940 const_p
= const_elt_p
;
5947 if (!initializer_zerop (value
))
5953 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
5954 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
5958 if (!initializer_zerop (TREE_REALPART (value
)))
5960 if (!initializer_zerop (TREE_IMAGPART (value
)))
5968 for (i
= 0; i
< VECTOR_CST_NELTS (value
); ++i
)
5970 tree v
= VECTOR_CST_ELT (value
, i
);
5971 if (!initializer_zerop (v
))
5980 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
5981 nz_elts
+= mult
* tc
;
5982 init_elts
+= mult
* tc
;
5984 if (const_from_elts_p
&& const_p
)
5986 = initializer_constant_valid_p (value
,
5988 TYPE_REVERSE_STORAGE_ORDER
5996 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
5997 num_fields
, elt_type
))
5998 *p_complete
= false;
6000 *p_nz_elts
+= nz_elts
;
6001 *p_init_elts
+= init_elts
;
6006 /* Examine CTOR to discover:
6007 * how many scalar fields are set to nonzero values,
6008 and place it in *P_NZ_ELTS;
6009 * how many scalar fields in total are in CTOR,
6010 and place it in *P_ELT_COUNT.
6011 * whether the constructor is complete -- in the sense that every
6012 meaningful byte is explicitly given a value --
6013 and place it in *P_COMPLETE.
6015 Return whether or not CTOR is a valid static constant initializer, the same
6016 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6019 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6020 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6026 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6029 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6030 of which had type LAST_TYPE. Each element was itself a complete
6031 initializer, in the sense that every meaningful byte was explicitly
6032 given a value. Return true if the same is true for the constructor
6036 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6037 const_tree last_type
)
6039 if (TREE_CODE (type
) == UNION_TYPE
6040 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6045 gcc_assert (num_elts
== 1 && last_type
);
6047 /* ??? We could look at each element of the union, and find the
6048 largest element. Which would avoid comparing the size of the
6049 initialized element against any tail padding in the union.
6050 Doesn't seem worth the effort... */
6051 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6054 return count_type_elements (type
, true) == num_elts
;
6057 /* Return 1 if EXP contains mostly (3/4) zeros. */
6060 mostly_zeros_p (const_tree exp
)
6062 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6064 HOST_WIDE_INT nz_elts
, init_elts
;
6067 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6068 return !complete_p
|| nz_elts
< init_elts
/ 4;
6071 return initializer_zerop (exp
);
6074 /* Return 1 if EXP contains all zeros. */
6077 all_zeros_p (const_tree exp
)
6079 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6081 HOST_WIDE_INT nz_elts
, init_elts
;
6084 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6085 return nz_elts
== 0;
6088 return initializer_zerop (exp
);
6091 /* Helper function for store_constructor.
6092 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6093 CLEARED is as for store_constructor.
6094 ALIAS_SET is the alias set to use for any stores.
6095 If REVERSE is true, the store is to be done in reverse order.
6097 This provides a recursive shortcut back to store_constructor when it isn't
6098 necessary to go through store_field. This is so that we can pass through
6099 the cleared field to let store_constructor know that we may not have to
6100 clear a substructure if the outer structure has already been cleared. */
6103 store_constructor_field (rtx target
, unsigned HOST_WIDE_INT bitsize
,
6104 HOST_WIDE_INT bitpos
,
6105 unsigned HOST_WIDE_INT bitregion_start
,
6106 unsigned HOST_WIDE_INT bitregion_end
,
6108 tree exp
, int cleared
,
6109 alias_set_type alias_set
, bool reverse
)
6111 if (TREE_CODE (exp
) == CONSTRUCTOR
6112 /* We can only call store_constructor recursively if the size and
6113 bit position are on a byte boundary. */
6114 && bitpos
% BITS_PER_UNIT
== 0
6115 && (bitsize
> 0 && bitsize
% BITS_PER_UNIT
== 0)
6116 /* If we have a nonzero bitpos for a register target, then we just
6117 let store_field do the bitfield handling. This is unlikely to
6118 generate unnecessary clear instructions anyways. */
6119 && (bitpos
== 0 || MEM_P (target
)))
6123 = adjust_address (target
,
6124 GET_MODE (target
) == BLKmode
6126 % GET_MODE_ALIGNMENT (GET_MODE (target
)))
6127 ? BLKmode
: VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6130 /* Update the alias set, if required. */
6131 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6132 && MEM_ALIAS_SET (target
) != 0)
6134 target
= copy_rtx (target
);
6135 set_mem_alias_set (target
, alias_set
);
6138 store_constructor (exp
, target
, cleared
, bitsize
/ BITS_PER_UNIT
,
6142 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6143 exp
, alias_set
, false, reverse
);
6147 /* Returns the number of FIELD_DECLs in TYPE. */
6150 fields_length (const_tree type
)
6152 tree t
= TYPE_FIELDS (type
);
6155 for (; t
; t
= DECL_CHAIN (t
))
6156 if (TREE_CODE (t
) == FIELD_DECL
)
6163 /* Store the value of constructor EXP into the rtx TARGET.
6164 TARGET is either a REG or a MEM; we know it cannot conflict, since
6165 safe_from_p has been called.
6166 CLEARED is true if TARGET is known to have been zero'd.
6167 SIZE is the number of bytes of TARGET we are allowed to modify: this
6168 may not be the same as the size of EXP if we are assigning to a field
6169 which has been packed to exclude padding bits.
6170 If REVERSE is true, the store is to be done in reverse order. */
6173 store_constructor (tree exp
, rtx target
, int cleared
, HOST_WIDE_INT size
,
6176 tree type
= TREE_TYPE (exp
);
6177 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6178 HOST_WIDE_INT bitregion_end
= size
> 0 ? size
* BITS_PER_UNIT
- 1 : 0;
6180 switch (TREE_CODE (type
))
6184 case QUAL_UNION_TYPE
:
6186 unsigned HOST_WIDE_INT idx
;
6189 /* The storage order is specified for every aggregate type. */
6190 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6192 /* If size is zero or the target is already cleared, do nothing. */
6193 if (size
== 0 || cleared
)
6195 /* We either clear the aggregate or indicate the value is dead. */
6196 else if ((TREE_CODE (type
) == UNION_TYPE
6197 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6198 && ! CONSTRUCTOR_ELTS (exp
))
6199 /* If the constructor is empty, clear the union. */
6201 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6205 /* If we are building a static constructor into a register,
6206 set the initial value as zero so we can fold the value into
6207 a constant. But if more than one register is involved,
6208 this probably loses. */
6209 else if (REG_P (target
) && TREE_STATIC (exp
)
6210 && GET_MODE_SIZE (GET_MODE (target
)) <= UNITS_PER_WORD
)
6212 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6216 /* If the constructor has fewer fields than the structure or
6217 if we are initializing the structure to mostly zeros, clear
6218 the whole structure first. Don't do this if TARGET is a
6219 register whose mode size isn't equal to SIZE since
6220 clear_storage can't handle this case. */
6222 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6223 || mostly_zeros_p (exp
))
6225 || ((HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (target
))
6228 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6232 if (REG_P (target
) && !cleared
)
6233 emit_clobber (target
);
6235 /* Store each element of the constructor into the
6236 corresponding field of TARGET. */
6237 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6240 HOST_WIDE_INT bitsize
;
6241 HOST_WIDE_INT bitpos
= 0;
6243 rtx to_rtx
= target
;
6245 /* Just ignore missing fields. We cleared the whole
6246 structure, above, if any fields are missing. */
6250 if (cleared
&& initializer_zerop (value
))
6253 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6254 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6258 mode
= DECL_MODE (field
);
6259 if (DECL_BIT_FIELD (field
))
6262 offset
= DECL_FIELD_OFFSET (field
);
6263 if (tree_fits_shwi_p (offset
)
6264 && tree_fits_shwi_p (bit_position (field
)))
6266 bitpos
= int_bit_position (field
);
6272 /* If this initializes a field that is smaller than a
6273 word, at the start of a word, try to widen it to a full
6274 word. This special case allows us to output C++ member
6275 function initializations in a form that the optimizers
6277 if (WORD_REGISTER_OPERATIONS
6279 && bitsize
< BITS_PER_WORD
6280 && bitpos
% BITS_PER_WORD
== 0
6281 && GET_MODE_CLASS (mode
) == MODE_INT
6282 && TREE_CODE (value
) == INTEGER_CST
6284 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6286 tree type
= TREE_TYPE (value
);
6288 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6290 type
= lang_hooks
.types
.type_for_mode
6291 (word_mode
, TYPE_UNSIGNED (type
));
6292 value
= fold_convert (type
, value
);
6293 /* Make sure the bits beyond the original bitsize are zero
6294 so that we can correctly avoid extra zeroing stores in
6295 later constructor elements. */
6297 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6299 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6302 if (BYTES_BIG_ENDIAN
)
6304 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6305 build_int_cst (type
,
6306 BITS_PER_WORD
- bitsize
));
6307 bitsize
= BITS_PER_WORD
;
6311 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6312 && DECL_NONADDRESSABLE_P (field
))
6314 to_rtx
= copy_rtx (to_rtx
);
6315 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6318 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6319 0, bitregion_end
, mode
,
6321 get_alias_set (TREE_TYPE (field
)),
6329 unsigned HOST_WIDE_INT i
;
6332 tree elttype
= TREE_TYPE (type
);
6334 HOST_WIDE_INT minelt
= 0;
6335 HOST_WIDE_INT maxelt
= 0;
6337 /* The storage order is specified for every aggregate type. */
6338 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6340 domain
= TYPE_DOMAIN (type
);
6341 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6342 && TYPE_MAX_VALUE (domain
)
6343 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6344 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6346 /* If we have constant bounds for the range of the type, get them. */
6349 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6350 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6353 /* If the constructor has fewer elements than the array, clear
6354 the whole array first. Similarly if this is static
6355 constructor of a non-BLKmode object. */
6358 else if (REG_P (target
) && TREE_STATIC (exp
))
6362 unsigned HOST_WIDE_INT idx
;
6364 HOST_WIDE_INT count
= 0, zero_count
= 0;
6365 need_to_clear
= ! const_bounds_p
;
6367 /* This loop is a more accurate version of the loop in
6368 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6369 is also needed to check for missing elements. */
6370 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6372 HOST_WIDE_INT this_node_count
;
6377 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6379 tree lo_index
= TREE_OPERAND (index
, 0);
6380 tree hi_index
= TREE_OPERAND (index
, 1);
6382 if (! tree_fits_uhwi_p (lo_index
)
6383 || ! tree_fits_uhwi_p (hi_index
))
6389 this_node_count
= (tree_to_uhwi (hi_index
)
6390 - tree_to_uhwi (lo_index
) + 1);
6393 this_node_count
= 1;
6395 count
+= this_node_count
;
6396 if (mostly_zeros_p (value
))
6397 zero_count
+= this_node_count
;
6400 /* Clear the entire array first if there are any missing
6401 elements, or if the incidence of zero elements is >=
6404 && (count
< maxelt
- minelt
+ 1
6405 || 4 * zero_count
>= 3 * count
))
6409 if (need_to_clear
&& size
> 0)
6412 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6414 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6418 if (!cleared
&& REG_P (target
))
6419 /* Inform later passes that the old value is dead. */
6420 emit_clobber (target
);
6422 /* Store each element of the constructor into the
6423 corresponding element of TARGET, determined by counting the
6425 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6428 HOST_WIDE_INT bitsize
;
6429 HOST_WIDE_INT bitpos
;
6430 rtx xtarget
= target
;
6432 if (cleared
&& initializer_zerop (value
))
6435 mode
= TYPE_MODE (elttype
);
6436 if (mode
== BLKmode
)
6437 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6438 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6441 bitsize
= GET_MODE_BITSIZE (mode
);
6443 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6445 tree lo_index
= TREE_OPERAND (index
, 0);
6446 tree hi_index
= TREE_OPERAND (index
, 1);
6447 rtx index_r
, pos_rtx
;
6448 HOST_WIDE_INT lo
, hi
, count
;
6451 /* If the range is constant and "small", unroll the loop. */
6453 && tree_fits_shwi_p (lo_index
)
6454 && tree_fits_shwi_p (hi_index
)
6455 && (lo
= tree_to_shwi (lo_index
),
6456 hi
= tree_to_shwi (hi_index
),
6457 count
= hi
- lo
+ 1,
6460 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6461 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6464 lo
-= minelt
; hi
-= minelt
;
6465 for (; lo
<= hi
; lo
++)
6467 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6470 && !MEM_KEEP_ALIAS_SET_P (target
)
6471 && TREE_CODE (type
) == ARRAY_TYPE
6472 && TYPE_NONALIASED_COMPONENT (type
))
6474 target
= copy_rtx (target
);
6475 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6478 store_constructor_field
6479 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6480 mode
, value
, cleared
,
6481 get_alias_set (elttype
), reverse
);
6486 rtx_code_label
*loop_start
= gen_label_rtx ();
6487 rtx_code_label
*loop_end
= gen_label_rtx ();
6490 expand_normal (hi_index
);
6492 index
= build_decl (EXPR_LOCATION (exp
),
6493 VAR_DECL
, NULL_TREE
, domain
);
6494 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6495 SET_DECL_RTL (index
, index_r
);
6496 store_expr (lo_index
, index_r
, 0, false, reverse
);
6498 /* Build the head of the loop. */
6499 do_pending_stack_adjust ();
6500 emit_label (loop_start
);
6502 /* Assign value to element index. */
6504 fold_convert (ssizetype
,
6505 fold_build2 (MINUS_EXPR
,
6508 TYPE_MIN_VALUE (domain
)));
6511 size_binop (MULT_EXPR
, position
,
6512 fold_convert (ssizetype
,
6513 TYPE_SIZE_UNIT (elttype
)));
6515 pos_rtx
= expand_normal (position
);
6516 xtarget
= offset_address (target
, pos_rtx
,
6517 highest_pow2_factor (position
));
6518 xtarget
= adjust_address (xtarget
, mode
, 0);
6519 if (TREE_CODE (value
) == CONSTRUCTOR
)
6520 store_constructor (value
, xtarget
, cleared
,
6521 bitsize
/ BITS_PER_UNIT
, reverse
);
6523 store_expr (value
, xtarget
, 0, false, reverse
);
6525 /* Generate a conditional jump to exit the loop. */
6526 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6528 jumpif (exit_cond
, loop_end
,
6529 profile_probability::uninitialized ());
6531 /* Update the loop counter, and jump to the head of
6533 expand_assignment (index
,
6534 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6535 index
, integer_one_node
),
6538 emit_jump (loop_start
);
6540 /* Build the end of the loop. */
6541 emit_label (loop_end
);
6544 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6545 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6550 index
= ssize_int (1);
6553 index
= fold_convert (ssizetype
,
6554 fold_build2 (MINUS_EXPR
,
6557 TYPE_MIN_VALUE (domain
)));
6560 size_binop (MULT_EXPR
, index
,
6561 fold_convert (ssizetype
,
6562 TYPE_SIZE_UNIT (elttype
)));
6563 xtarget
= offset_address (target
,
6564 expand_normal (position
),
6565 highest_pow2_factor (position
));
6566 xtarget
= adjust_address (xtarget
, mode
, 0);
6567 store_expr (value
, xtarget
, 0, false, reverse
);
6572 bitpos
= ((tree_to_shwi (index
) - minelt
)
6573 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6575 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6577 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6578 && TREE_CODE (type
) == ARRAY_TYPE
6579 && TYPE_NONALIASED_COMPONENT (type
))
6581 target
= copy_rtx (target
);
6582 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6584 store_constructor_field (target
, bitsize
, bitpos
, 0,
6585 bitregion_end
, mode
, value
,
6586 cleared
, get_alias_set (elttype
),
6595 unsigned HOST_WIDE_INT idx
;
6596 constructor_elt
*ce
;
6599 int icode
= CODE_FOR_nothing
;
6600 tree elttype
= TREE_TYPE (type
);
6601 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6602 machine_mode eltmode
= TYPE_MODE (elttype
);
6603 HOST_WIDE_INT bitsize
;
6604 HOST_WIDE_INT bitpos
;
6605 rtvec vector
= NULL
;
6607 alias_set_type alias
;
6608 bool vec_vec_init_p
= false;
6610 gcc_assert (eltmode
!= BLKmode
);
6612 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6613 if (REG_P (target
) && VECTOR_MODE_P (GET_MODE (target
)))
6615 machine_mode mode
= GET_MODE (target
);
6616 machine_mode emode
= eltmode
;
6618 if (CONSTRUCTOR_NELTS (exp
)
6619 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6622 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6623 gcc_assert (CONSTRUCTOR_NELTS (exp
) * TYPE_VECTOR_SUBPARTS (etype
)
6625 emode
= TYPE_MODE (etype
);
6627 icode
= (int) convert_optab_handler (vec_init_optab
, mode
, emode
);
6628 if (icode
!= CODE_FOR_nothing
)
6630 unsigned int i
, n
= n_elts
;
6632 if (emode
!= eltmode
)
6634 n
= CONSTRUCTOR_NELTS (exp
);
6635 vec_vec_init_p
= true;
6637 vector
= rtvec_alloc (n
);
6638 for (i
= 0; i
< n
; i
++)
6639 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6643 /* If the constructor has fewer elements than the vector,
6644 clear the whole array first. Similarly if this is static
6645 constructor of a non-BLKmode object. */
6648 else if (REG_P (target
) && TREE_STATIC (exp
))
6652 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6655 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6657 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6659 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6660 TYPE_SIZE (elttype
)));
6662 count
+= n_elts_here
;
6663 if (mostly_zeros_p (value
))
6664 zero_count
+= n_elts_here
;
6667 /* Clear the entire vector first if there are any missing elements,
6668 or if the incidence of zero elements is >= 75%. */
6669 need_to_clear
= (count
< n_elts
|| 4 * zero_count
>= 3 * count
);
6672 if (need_to_clear
&& size
> 0 && !vector
)
6675 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6677 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6681 /* Inform later passes that the old value is dead. */
6682 if (!cleared
&& !vector
&& REG_P (target
))
6683 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6686 alias
= MEM_ALIAS_SET (target
);
6688 alias
= get_alias_set (elttype
);
6690 /* Store each element of the constructor into the corresponding
6691 element of TARGET, determined by counting the elements. */
6692 for (idx
= 0, i
= 0;
6693 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6694 idx
++, i
+= bitsize
/ elt_size
)
6696 HOST_WIDE_INT eltpos
;
6697 tree value
= ce
->value
;
6699 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6700 if (cleared
&& initializer_zerop (value
))
6704 eltpos
= tree_to_uhwi (ce
->index
);
6712 gcc_assert (ce
->index
== NULL_TREE
);
6713 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6717 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6718 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6722 machine_mode value_mode
6723 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6724 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6725 bitpos
= eltpos
* elt_size
;
6726 store_constructor_field (target
, bitsize
, bitpos
, 0,
6727 bitregion_end
, value_mode
,
6728 value
, cleared
, alias
, reverse
);
6733 emit_insn (GEN_FCN (icode
) (target
,
6734 gen_rtx_PARALLEL (GET_MODE (target
),
6744 /* Store the value of EXP (an expression tree)
6745 into a subfield of TARGET which has mode MODE and occupies
6746 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6747 If MODE is VOIDmode, it means that we are storing into a bit-field.
6749 BITREGION_START is bitpos of the first bitfield in this region.
6750 BITREGION_END is the bitpos of the ending bitfield in this region.
6751 These two fields are 0, if the C++ memory model does not apply,
6752 or we are not interested in keeping track of bitfield regions.
6754 Always return const0_rtx unless we have something particular to
6757 ALIAS_SET is the alias set for the destination. This value will
6758 (in general) be different from that for TARGET, since TARGET is a
6759 reference to the containing structure.
6761 If NONTEMPORAL is true, try generating a nontemporal store.
6763 If REVERSE is true, the store is to be done in reverse order. */
6766 store_field (rtx target
, HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitpos
,
6767 unsigned HOST_WIDE_INT bitregion_start
,
6768 unsigned HOST_WIDE_INT bitregion_end
,
6769 machine_mode mode
, tree exp
,
6770 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6772 if (TREE_CODE (exp
) == ERROR_MARK
)
6775 /* If we have nothing to store, do nothing unless the expression has
6778 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6780 if (GET_CODE (target
) == CONCAT
)
6782 /* We're storing into a struct containing a single __complex. */
6784 gcc_assert (!bitpos
);
6785 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6788 /* If the structure is in a register or if the component
6789 is a bit field, we cannot use addressing to access it.
6790 Use bit-field techniques or SUBREG to store in it. */
6792 if (mode
== VOIDmode
6793 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6794 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6795 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6797 || GET_CODE (target
) == SUBREG
6798 /* If the field isn't aligned enough to store as an ordinary memref,
6799 store it as a bit field. */
6801 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6802 || bitpos
% GET_MODE_ALIGNMENT (mode
))
6803 && SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (target
)))
6804 || (bitpos
% BITS_PER_UNIT
!= 0)))
6805 || (bitsize
>= 0 && mode
!= BLKmode
6806 && GET_MODE_BITSIZE (mode
) > bitsize
)
6807 /* If the RHS and field are a constant size and the size of the
6808 RHS isn't the same size as the bitfield, we must use bitfield
6811 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
6812 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)), bitsize
) != 0
6813 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6814 we will handle specially below. */
6815 && !(TREE_CODE (exp
) == CONSTRUCTOR
6816 && bitsize
% BITS_PER_UNIT
== 0)
6817 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6818 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6819 includes some extra padding. store_expr / expand_expr will in
6820 that case call get_inner_reference that will have the bitsize
6821 we check here and thus the block move will not clobber the
6822 padding that shouldn't be clobbered. In the future we could
6823 replace the TREE_ADDRESSABLE check with a check that
6824 get_base_address needs to live in memory. */
6825 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6826 || TREE_CODE (exp
) != COMPONENT_REF
6827 || TREE_CODE (DECL_SIZE (TREE_OPERAND (exp
, 1))) != INTEGER_CST
6828 || (bitsize
% BITS_PER_UNIT
!= 0)
6829 || (bitpos
% BITS_PER_UNIT
!= 0)
6830 || (compare_tree_int (DECL_SIZE (TREE_OPERAND (exp
, 1)), bitsize
)
6832 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6833 decl we must use bitfield operations. */
6835 && TREE_CODE (exp
) == MEM_REF
6836 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6837 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6838 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6839 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6844 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6845 implies a mask operation. If the precision is the same size as
6846 the field we're storing into, that mask is redundant. This is
6847 particularly common with bit field assignments generated by the
6849 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6852 tree type
= TREE_TYPE (exp
);
6853 if (INTEGRAL_TYPE_P (type
)
6854 && TYPE_PRECISION (type
) < GET_MODE_BITSIZE (TYPE_MODE (type
))
6855 && bitsize
== TYPE_PRECISION (type
))
6857 tree op
= gimple_assign_rhs1 (nop_def
);
6858 type
= TREE_TYPE (op
);
6859 if (INTEGRAL_TYPE_P (type
) && TYPE_PRECISION (type
) >= bitsize
)
6864 temp
= expand_normal (exp
);
6866 /* Handle calls that return values in multiple non-contiguous locations.
6867 The Irix 6 ABI has examples of this. */
6868 if (GET_CODE (temp
) == PARALLEL
)
6870 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6871 scalar_int_mode temp_mode
6872 = smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6873 rtx temp_target
= gen_reg_rtx (temp_mode
);
6874 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6878 /* Handle calls that return BLKmode values in registers. */
6879 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6881 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6882 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6886 /* If the value has aggregate type and an integral mode then, if BITSIZE
6887 is narrower than this mode and this is for big-endian data, we first
6888 need to put the value into the low-order bits for store_bit_field,
6889 except when MODE is BLKmode and BITSIZE larger than the word size
6890 (see the handling of fields larger than a word in store_bit_field).
6891 Moreover, the field may be not aligned on a byte boundary; in this
6892 case, if it has reverse storage order, it needs to be accessed as a
6893 scalar field with reverse storage order and we must first put the
6894 value into target order. */
6895 scalar_int_mode temp_mode
;
6896 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
6897 && is_int_mode (GET_MODE (temp
), &temp_mode
))
6899 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
6901 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
6904 temp
= flip_storage_order (temp_mode
, temp
);
6907 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
6908 && !(mode
== BLKmode
&& bitsize
> BITS_PER_WORD
))
6909 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
6910 size
- bitsize
, NULL_RTX
, 1);
6913 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6914 if (mode
!= VOIDmode
&& mode
!= BLKmode
6915 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
6916 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
6918 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
6919 and BITPOS must be aligned on a byte boundary. If so, we simply do
6920 a block copy. Likewise for a BLKmode-like TARGET. */
6921 if (GET_MODE (temp
) == BLKmode
6922 && (GET_MODE (target
) == BLKmode
6924 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
6925 && (bitpos
% BITS_PER_UNIT
) == 0
6926 && (bitsize
% BITS_PER_UNIT
) == 0)))
6928 gcc_assert (MEM_P (target
) && MEM_P (temp
)
6929 && (bitpos
% BITS_PER_UNIT
) == 0);
6931 target
= adjust_address (target
, VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6932 emit_block_move (target
, temp
,
6933 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
6940 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
6941 word size, we need to load the value (see again store_bit_field). */
6942 if (GET_MODE (temp
) == BLKmode
&& bitsize
<= BITS_PER_WORD
)
6944 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
6945 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
6946 temp_mode
, false, NULL
);
6949 /* Store the value in the bitfield. */
6950 store_bit_field (target
, bitsize
, bitpos
,
6951 bitregion_start
, bitregion_end
,
6952 mode
, temp
, reverse
);
6958 /* Now build a reference to just the desired component. */
6959 rtx to_rtx
= adjust_address (target
, mode
, bitpos
/ BITS_PER_UNIT
);
6961 if (to_rtx
== target
)
6962 to_rtx
= copy_rtx (to_rtx
);
6964 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
6965 set_mem_alias_set (to_rtx
, alias_set
);
6967 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
6968 into a target smaller than its type; handle that case now. */
6969 if (TREE_CODE (exp
) == CONSTRUCTOR
&& bitsize
>= 0)
6971 gcc_assert (bitsize
% BITS_PER_UNIT
== 0);
6972 store_constructor (exp
, to_rtx
, 0, bitsize
/ BITS_PER_UNIT
, reverse
);
6976 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
6980 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6981 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6982 codes and find the ultimate containing object, which we return.
6984 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6985 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
6986 storage order of the field.
6987 If the position of the field is variable, we store a tree
6988 giving the variable offset (in units) in *POFFSET.
6989 This offset is in addition to the bit position.
6990 If the position is not variable, we store 0 in *POFFSET.
6992 If any of the extraction expressions is volatile,
6993 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6995 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6996 Otherwise, it is a mode that can be used to access the field.
6998 If the field describes a variable-sized object, *PMODE is set to
6999 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7000 this case, but the address of the object can be found. */
7003 get_inner_reference (tree exp
, HOST_WIDE_INT
*pbitsize
,
7004 HOST_WIDE_INT
*pbitpos
, tree
*poffset
,
7005 machine_mode
*pmode
, int *punsignedp
,
7006 int *preversep
, int *pvolatilep
)
7009 machine_mode mode
= VOIDmode
;
7010 bool blkmode_bitfield
= false;
7011 tree offset
= size_zero_node
;
7012 offset_int bit_offset
= 0;
7014 /* First get the mode, signedness, storage order and size. We do this from
7015 just the outermost expression. */
7017 if (TREE_CODE (exp
) == COMPONENT_REF
)
7019 tree field
= TREE_OPERAND (exp
, 1);
7020 size_tree
= DECL_SIZE (field
);
7021 if (flag_strict_volatile_bitfields
> 0
7022 && TREE_THIS_VOLATILE (exp
)
7023 && DECL_BIT_FIELD_TYPE (field
)
7024 && DECL_MODE (field
) != BLKmode
)
7025 /* Volatile bitfields should be accessed in the mode of the
7026 field's type, not the mode computed based on the bit
7028 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7029 else if (!DECL_BIT_FIELD (field
))
7030 mode
= DECL_MODE (field
);
7031 else if (DECL_MODE (field
) == BLKmode
)
7032 blkmode_bitfield
= true;
7034 *punsignedp
= DECL_UNSIGNED (field
);
7036 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7038 size_tree
= TREE_OPERAND (exp
, 1);
7039 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7040 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7042 /* For vector types, with the correct size of access, use the mode of
7044 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7045 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7046 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7047 mode
= TYPE_MODE (TREE_TYPE (exp
));
7051 mode
= TYPE_MODE (TREE_TYPE (exp
));
7052 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7054 if (mode
== BLKmode
)
7055 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7057 *pbitsize
= GET_MODE_BITSIZE (mode
);
7062 if (! tree_fits_uhwi_p (size_tree
))
7063 mode
= BLKmode
, *pbitsize
= -1;
7065 *pbitsize
= tree_to_uhwi (size_tree
);
7068 *preversep
= reverse_storage_order_for_component_p (exp
);
7070 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7071 and find the ultimate containing object. */
7074 switch (TREE_CODE (exp
))
7077 bit_offset
+= wi::to_offset (TREE_OPERAND (exp
, 2));
7082 tree field
= TREE_OPERAND (exp
, 1);
7083 tree this_offset
= component_ref_field_offset (exp
);
7085 /* If this field hasn't been filled in yet, don't go past it.
7086 This should only happen when folding expressions made during
7087 type construction. */
7088 if (this_offset
== 0)
7091 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7092 bit_offset
+= wi::to_offset (DECL_FIELD_BIT_OFFSET (field
));
7094 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7099 case ARRAY_RANGE_REF
:
7101 tree index
= TREE_OPERAND (exp
, 1);
7102 tree low_bound
= array_ref_low_bound (exp
);
7103 tree unit_size
= array_ref_element_size (exp
);
7105 /* We assume all arrays have sizes that are a multiple of a byte.
7106 First subtract the lower bound, if any, in the type of the
7107 index, then convert to sizetype and multiply by the size of
7108 the array element. */
7109 if (! integer_zerop (low_bound
))
7110 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7113 offset
= size_binop (PLUS_EXPR
, offset
,
7114 size_binop (MULT_EXPR
,
7115 fold_convert (sizetype
, index
),
7124 bit_offset
+= *pbitsize
;
7127 case VIEW_CONVERT_EXPR
:
7131 /* Hand back the decl for MEM[&decl, off]. */
7132 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7134 tree off
= TREE_OPERAND (exp
, 1);
7135 if (!integer_zerop (off
))
7137 offset_int boff
, coff
= mem_ref_offset (exp
);
7138 boff
= coff
<< LOG2_BITS_PER_UNIT
;
7141 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7149 /* If any reference in the chain is volatile, the effect is volatile. */
7150 if (TREE_THIS_VOLATILE (exp
))
7153 exp
= TREE_OPERAND (exp
, 0);
7157 /* If OFFSET is constant, see if we can return the whole thing as a
7158 constant bit position. Make sure to handle overflow during
7160 if (TREE_CODE (offset
) == INTEGER_CST
)
7162 offset_int tem
= wi::sext (wi::to_offset (offset
),
7163 TYPE_PRECISION (sizetype
));
7164 tem
<<= LOG2_BITS_PER_UNIT
;
7166 if (wi::fits_shwi_p (tem
))
7168 *pbitpos
= tem
.to_shwi ();
7169 *poffset
= offset
= NULL_TREE
;
7173 /* Otherwise, split it up. */
7176 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7177 if (wi::neg_p (bit_offset
) || !wi::fits_shwi_p (bit_offset
))
7179 offset_int mask
= wi::mask
<offset_int
> (LOG2_BITS_PER_UNIT
, false);
7180 offset_int tem
= bit_offset
.and_not (mask
);
7181 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7182 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7184 tem
>>= LOG2_BITS_PER_UNIT
;
7185 offset
= size_binop (PLUS_EXPR
, offset
,
7186 wide_int_to_tree (sizetype
, tem
));
7189 *pbitpos
= bit_offset
.to_shwi ();
7193 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7194 if (mode
== VOIDmode
7196 && (*pbitpos
% BITS_PER_UNIT
) == 0
7197 && (*pbitsize
% BITS_PER_UNIT
) == 0)
7205 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7207 static unsigned HOST_WIDE_INT
7208 target_align (const_tree target
)
7210 /* We might have a chain of nested references with intermediate misaligning
7211 bitfields components, so need to recurse to find out. */
7213 unsigned HOST_WIDE_INT this_align
, outer_align
;
7215 switch (TREE_CODE (target
))
7221 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7222 outer_align
= target_align (TREE_OPERAND (target
, 0));
7223 return MIN (this_align
, outer_align
);
7226 case ARRAY_RANGE_REF
:
7227 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7228 outer_align
= target_align (TREE_OPERAND (target
, 0));
7229 return MIN (this_align
, outer_align
);
7232 case NON_LVALUE_EXPR
:
7233 case VIEW_CONVERT_EXPR
:
7234 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7235 outer_align
= target_align (TREE_OPERAND (target
, 0));
7236 return MAX (this_align
, outer_align
);
7239 return TYPE_ALIGN (TREE_TYPE (target
));
7244 /* Given an rtx VALUE that may contain additions and multiplications, return
7245 an equivalent value that just refers to a register, memory, or constant.
7246 This is done by generating instructions to perform the arithmetic and
7247 returning a pseudo-register containing the value.
7249 The returned value may be a REG, SUBREG, MEM or constant. */
7252 force_operand (rtx value
, rtx target
)
7255 /* Use subtarget as the target for operand 0 of a binary operation. */
7256 rtx subtarget
= get_subtarget (target
);
7257 enum rtx_code code
= GET_CODE (value
);
7259 /* Check for subreg applied to an expression produced by loop optimizer. */
7261 && !REG_P (SUBREG_REG (value
))
7262 && !MEM_P (SUBREG_REG (value
)))
7265 = simplify_gen_subreg (GET_MODE (value
),
7266 force_reg (GET_MODE (SUBREG_REG (value
)),
7267 force_operand (SUBREG_REG (value
),
7269 GET_MODE (SUBREG_REG (value
)),
7270 SUBREG_BYTE (value
));
7271 code
= GET_CODE (value
);
7274 /* Check for a PIC address load. */
7275 if ((code
== PLUS
|| code
== MINUS
)
7276 && XEXP (value
, 0) == pic_offset_table_rtx
7277 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7278 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7279 || GET_CODE (XEXP (value
, 1)) == CONST
))
7282 subtarget
= gen_reg_rtx (GET_MODE (value
));
7283 emit_move_insn (subtarget
, value
);
7287 if (ARITHMETIC_P (value
))
7289 op2
= XEXP (value
, 1);
7290 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7292 if (code
== MINUS
&& CONST_INT_P (op2
))
7295 op2
= negate_rtx (GET_MODE (value
), op2
);
7298 /* Check for an addition with OP2 a constant integer and our first
7299 operand a PLUS of a virtual register and something else. In that
7300 case, we want to emit the sum of the virtual register and the
7301 constant first and then add the other value. This allows virtual
7302 register instantiation to simply modify the constant rather than
7303 creating another one around this addition. */
7304 if (code
== PLUS
&& CONST_INT_P (op2
)
7305 && GET_CODE (XEXP (value
, 0)) == PLUS
7306 && REG_P (XEXP (XEXP (value
, 0), 0))
7307 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7308 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7310 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7311 XEXP (XEXP (value
, 0), 0), op2
,
7312 subtarget
, 0, OPTAB_LIB_WIDEN
);
7313 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7314 force_operand (XEXP (XEXP (value
,
7316 target
, 0, OPTAB_LIB_WIDEN
);
7319 op1
= force_operand (XEXP (value
, 0), subtarget
);
7320 op2
= force_operand (op2
, NULL_RTX
);
7324 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7326 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7327 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7328 target
, 1, OPTAB_LIB_WIDEN
);
7330 return expand_divmod (0,
7331 FLOAT_MODE_P (GET_MODE (value
))
7332 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7333 GET_MODE (value
), op1
, op2
, target
, 0);
7335 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7338 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7341 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7344 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7345 target
, 0, OPTAB_LIB_WIDEN
);
7347 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7348 target
, 1, OPTAB_LIB_WIDEN
);
7351 if (UNARY_P (value
))
7354 target
= gen_reg_rtx (GET_MODE (value
));
7355 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7362 case FLOAT_TRUNCATE
:
7363 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7368 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7372 case UNSIGNED_FLOAT
:
7373 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7377 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7381 #ifdef INSN_SCHEDULING
7382 /* On machines that have insn scheduling, we want all memory reference to be
7383 explicit, so we need to deal with such paradoxical SUBREGs. */
7384 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7386 = simplify_gen_subreg (GET_MODE (value
),
7387 force_reg (GET_MODE (SUBREG_REG (value
)),
7388 force_operand (SUBREG_REG (value
),
7390 GET_MODE (SUBREG_REG (value
)),
7391 SUBREG_BYTE (value
));
7397 /* Subroutine of expand_expr: return nonzero iff there is no way that
7398 EXP can reference X, which is being modified. TOP_P is nonzero if this
7399 call is going to be used to determine whether we need a temporary
7400 for EXP, as opposed to a recursive call to this function.
7402 It is always safe for this routine to return zero since it merely
7403 searches for optimization opportunities. */
7406 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7412 /* If EXP has varying size, we MUST use a target since we currently
7413 have no way of allocating temporaries of variable size
7414 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7415 So we assume here that something at a higher level has prevented a
7416 clash. This is somewhat bogus, but the best we can do. Only
7417 do this when X is BLKmode and when we are at the top level. */
7418 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7419 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7420 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7421 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7422 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7424 && GET_MODE (x
) == BLKmode
)
7425 /* If X is in the outgoing argument area, it is always safe. */
7427 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7428 || (GET_CODE (XEXP (x
, 0)) == PLUS
7429 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7432 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7433 find the underlying pseudo. */
7434 if (GET_CODE (x
) == SUBREG
)
7437 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7441 /* Now look at our tree code and possibly recurse. */
7442 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7444 case tcc_declaration
:
7445 exp_rtl
= DECL_RTL_IF_SET (exp
);
7451 case tcc_exceptional
:
7452 if (TREE_CODE (exp
) == TREE_LIST
)
7456 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7458 exp
= TREE_CHAIN (exp
);
7461 if (TREE_CODE (exp
) != TREE_LIST
)
7462 return safe_from_p (x
, exp
, 0);
7465 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7467 constructor_elt
*ce
;
7468 unsigned HOST_WIDE_INT idx
;
7470 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7471 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7472 || !safe_from_p (x
, ce
->value
, 0))
7476 else if (TREE_CODE (exp
) == ERROR_MARK
)
7477 return 1; /* An already-visited SAVE_EXPR? */
7482 /* The only case we look at here is the DECL_INITIAL inside a
7484 return (TREE_CODE (exp
) != DECL_EXPR
7485 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7486 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7487 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7490 case tcc_comparison
:
7491 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7496 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7498 case tcc_expression
:
7501 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7502 the expression. If it is set, we conflict iff we are that rtx or
7503 both are in memory. Otherwise, we check all operands of the
7504 expression recursively. */
7506 switch (TREE_CODE (exp
))
7509 /* If the operand is static or we are static, we can't conflict.
7510 Likewise if we don't conflict with the operand at all. */
7511 if (staticp (TREE_OPERAND (exp
, 0))
7512 || TREE_STATIC (exp
)
7513 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7516 /* Otherwise, the only way this can conflict is if we are taking
7517 the address of a DECL a that address if part of X, which is
7519 exp
= TREE_OPERAND (exp
, 0);
7522 if (!DECL_RTL_SET_P (exp
)
7523 || !MEM_P (DECL_RTL (exp
)))
7526 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7532 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7533 get_alias_set (exp
)))
7538 /* Assume that the call will clobber all hard registers and
7540 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7545 case WITH_CLEANUP_EXPR
:
7546 case CLEANUP_POINT_EXPR
:
7547 /* Lowered by gimplify.c. */
7551 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7557 /* If we have an rtx, we do not need to scan our operands. */
7561 nops
= TREE_OPERAND_LENGTH (exp
);
7562 for (i
= 0; i
< nops
; i
++)
7563 if (TREE_OPERAND (exp
, i
) != 0
7564 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7570 /* Should never get a type here. */
7574 /* If we have an rtl, find any enclosed object. Then see if we conflict
7578 if (GET_CODE (exp_rtl
) == SUBREG
)
7580 exp_rtl
= SUBREG_REG (exp_rtl
);
7582 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7586 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7587 are memory and they conflict. */
7588 return ! (rtx_equal_p (x
, exp_rtl
)
7589 || (MEM_P (x
) && MEM_P (exp_rtl
)
7590 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7593 /* If we reach here, it is safe. */
7598 /* Return the highest power of two that EXP is known to be a multiple of.
7599 This is used in updating alignment of MEMs in array references. */
7601 unsigned HOST_WIDE_INT
7602 highest_pow2_factor (const_tree exp
)
7604 unsigned HOST_WIDE_INT ret
;
7605 int trailing_zeros
= tree_ctz (exp
);
7606 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7607 return BIGGEST_ALIGNMENT
;
7608 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7609 if (ret
> BIGGEST_ALIGNMENT
)
7610 return BIGGEST_ALIGNMENT
;
7614 /* Similar, except that the alignment requirements of TARGET are
7615 taken into account. Assume it is at least as aligned as its
7616 type, unless it is a COMPONENT_REF in which case the layout of
7617 the structure gives the alignment. */
7619 static unsigned HOST_WIDE_INT
7620 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7622 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7623 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7625 return MAX (factor
, talign
);
7628 /* Convert the tree comparison code TCODE to the rtl one where the
7629 signedness is UNSIGNEDP. */
7631 static enum rtx_code
7632 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7644 code
= unsignedp
? LTU
: LT
;
7647 code
= unsignedp
? LEU
: LE
;
7650 code
= unsignedp
? GTU
: GT
;
7653 code
= unsignedp
? GEU
: GE
;
7655 case UNORDERED_EXPR
:
7686 /* Subroutine of expand_expr. Expand the two operands of a binary
7687 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7688 The value may be stored in TARGET if TARGET is nonzero. The
7689 MODIFIER argument is as documented by expand_expr. */
7692 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7693 enum expand_modifier modifier
)
7695 if (! safe_from_p (target
, exp1
, 1))
7697 if (operand_equal_p (exp0
, exp1
, 0))
7699 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7700 *op1
= copy_rtx (*op0
);
7704 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7705 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7710 /* Return a MEM that contains constant EXP. DEFER is as for
7711 output_constant_def and MODIFIER is as for expand_expr. */
7714 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7718 mem
= output_constant_def (exp
, defer
);
7719 if (modifier
!= EXPAND_INITIALIZER
)
7720 mem
= use_anchored_address (mem
);
7724 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7725 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7728 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7729 enum expand_modifier modifier
, addr_space_t as
)
7731 rtx result
, subtarget
;
7733 HOST_WIDE_INT bitsize
, bitpos
;
7734 int unsignedp
, reversep
, volatilep
= 0;
7737 /* If we are taking the address of a constant and are at the top level,
7738 we have to use output_constant_def since we can't call force_const_mem
7740 /* ??? This should be considered a front-end bug. We should not be
7741 generating ADDR_EXPR of something that isn't an LVALUE. The only
7742 exception here is STRING_CST. */
7743 if (CONSTANT_CLASS_P (exp
))
7745 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7746 if (modifier
< EXPAND_SUM
)
7747 result
= force_operand (result
, target
);
7751 /* Everything must be something allowed by is_gimple_addressable. */
7752 switch (TREE_CODE (exp
))
7755 /* This case will happen via recursion for &a->b. */
7756 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7760 tree tem
= TREE_OPERAND (exp
, 0);
7761 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7762 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7763 return expand_expr (tem
, target
, tmode
, modifier
);
7767 /* Expand the initializer like constants above. */
7768 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7770 if (modifier
< EXPAND_SUM
)
7771 result
= force_operand (result
, target
);
7775 /* The real part of the complex number is always first, therefore
7776 the address is the same as the address of the parent object. */
7779 inner
= TREE_OPERAND (exp
, 0);
7783 /* The imaginary part of the complex number is always second.
7784 The expression is therefore always offset by the size of the
7787 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7788 inner
= TREE_OPERAND (exp
, 0);
7791 case COMPOUND_LITERAL_EXPR
:
7792 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7793 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7794 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7795 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7796 the initializers aren't gimplified. */
7797 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7798 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7799 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7800 target
, tmode
, modifier
, as
);
7803 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7804 expand_expr, as that can have various side effects; LABEL_DECLs for
7805 example, may not have their DECL_RTL set yet. Expand the rtl of
7806 CONSTRUCTORs too, which should yield a memory reference for the
7807 constructor's contents. Assume language specific tree nodes can
7808 be expanded in some interesting way. */
7809 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7811 || TREE_CODE (exp
) == CONSTRUCTOR
7812 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7814 result
= expand_expr (exp
, target
, tmode
,
7815 modifier
== EXPAND_INITIALIZER
7816 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7818 /* If the DECL isn't in memory, then the DECL wasn't properly
7819 marked TREE_ADDRESSABLE, which will be either a front-end
7820 or a tree optimizer bug. */
7822 gcc_assert (MEM_P (result
));
7823 result
= XEXP (result
, 0);
7825 /* ??? Is this needed anymore? */
7827 TREE_USED (exp
) = 1;
7829 if (modifier
!= EXPAND_INITIALIZER
7830 && modifier
!= EXPAND_CONST_ADDRESS
7831 && modifier
!= EXPAND_SUM
)
7832 result
= force_operand (result
, target
);
7836 /* Pass FALSE as the last argument to get_inner_reference although
7837 we are expanding to RTL. The rationale is that we know how to
7838 handle "aligning nodes" here: we can just bypass them because
7839 they won't change the final object whose address will be returned
7840 (they actually exist only for that purpose). */
7841 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7842 &unsignedp
, &reversep
, &volatilep
);
7846 /* We must have made progress. */
7847 gcc_assert (inner
!= exp
);
7849 subtarget
= offset
|| bitpos
? NULL_RTX
: target
;
7850 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7851 inner alignment, force the inner to be sufficiently aligned. */
7852 if (CONSTANT_CLASS_P (inner
)
7853 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7855 inner
= copy_node (inner
);
7856 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7857 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7858 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7860 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7866 if (modifier
!= EXPAND_NORMAL
)
7867 result
= force_operand (result
, NULL
);
7868 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7869 modifier
== EXPAND_INITIALIZER
7870 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7872 /* expand_expr is allowed to return an object in a mode other
7873 than TMODE. If it did, we need to convert. */
7874 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7875 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7876 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7877 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7878 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7880 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7881 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7884 subtarget
= bitpos
? NULL_RTX
: target
;
7885 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7886 1, OPTAB_LIB_WIDEN
);
7892 /* Someone beforehand should have rejected taking the address
7893 of such an object. */
7894 gcc_assert ((bitpos
% BITS_PER_UNIT
) == 0);
7896 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7897 result
= plus_constant (tmode
, result
, bitpos
/ BITS_PER_UNIT
);
7898 if (modifier
< EXPAND_SUM
)
7899 result
= force_operand (result
, target
);
7905 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7906 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7909 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
7910 enum expand_modifier modifier
)
7912 addr_space_t as
= ADDR_SPACE_GENERIC
;
7913 scalar_int_mode address_mode
= Pmode
;
7914 scalar_int_mode pointer_mode
= ptr_mode
;
7918 /* Target mode of VOIDmode says "whatever's natural". */
7919 if (tmode
== VOIDmode
)
7920 tmode
= TYPE_MODE (TREE_TYPE (exp
));
7922 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
7924 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
7925 address_mode
= targetm
.addr_space
.address_mode (as
);
7926 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
7929 /* We can get called with some Weird Things if the user does silliness
7930 like "(short) &a". In that case, convert_memory_address won't do
7931 the right thing, so ignore the given target mode. */
7932 scalar_int_mode new_tmode
= (tmode
== pointer_mode
7936 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
7937 new_tmode
, modifier
, as
);
7939 /* Despite expand_expr claims concerning ignoring TMODE when not
7940 strictly convenient, stuff breaks if we don't honor it. Note
7941 that combined with the above, we only do this for pointer modes. */
7942 rmode
= GET_MODE (result
);
7943 if (rmode
== VOIDmode
)
7945 if (rmode
!= new_tmode
)
7946 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
7951 /* Generate code for computing CONSTRUCTOR EXP.
7952 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7953 is TRUE, instead of creating a temporary variable in memory
7954 NULL is returned and the caller needs to handle it differently. */
7957 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
7958 bool avoid_temp_mem
)
7960 tree type
= TREE_TYPE (exp
);
7961 machine_mode mode
= TYPE_MODE (type
);
7963 /* Try to avoid creating a temporary at all. This is possible
7964 if all of the initializer is zero.
7965 FIXME: try to handle all [0..255] initializers we can handle
7967 if (TREE_STATIC (exp
)
7968 && !TREE_ADDRESSABLE (exp
)
7969 && target
!= 0 && mode
== BLKmode
7970 && all_zeros_p (exp
))
7972 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7976 /* All elts simple constants => refer to a constant in memory. But
7977 if this is a non-BLKmode mode, let it store a field at a time
7978 since that should make a CONST_INT, CONST_WIDE_INT or
7979 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7980 use, it is best to store directly into the target unless the type
7981 is large enough that memcpy will be used. If we are making an
7982 initializer and all operands are constant, put it in memory as
7985 FIXME: Avoid trying to fill vector constructors piece-meal.
7986 Output them with output_constant_def below unless we're sure
7987 they're zeros. This should go away when vector initializers
7988 are treated like VECTOR_CST instead of arrays. */
7989 if ((TREE_STATIC (exp
)
7990 && ((mode
== BLKmode
7991 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
7992 || TREE_ADDRESSABLE (exp
)
7993 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
7994 && (! can_move_by_pieces
7995 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
7997 && ! mostly_zeros_p (exp
))))
7998 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
7999 && TREE_CONSTANT (exp
)))
8006 constructor
= expand_expr_constant (exp
, 1, modifier
);
8008 if (modifier
!= EXPAND_CONST_ADDRESS
8009 && modifier
!= EXPAND_INITIALIZER
8010 && modifier
!= EXPAND_SUM
)
8011 constructor
= validize_mem (constructor
);
8016 /* Handle calls that pass values in multiple non-contiguous
8017 locations. The Irix 6 ABI has examples of this. */
8018 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8019 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8024 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8027 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8032 /* expand_expr: generate code for computing expression EXP.
8033 An rtx for the computed value is returned. The value is never null.
8034 In the case of a void EXP, const0_rtx is returned.
8036 The value may be stored in TARGET if TARGET is nonzero.
8037 TARGET is just a suggestion; callers must assume that
8038 the rtx returned may not be the same as TARGET.
8040 If TARGET is CONST0_RTX, it means that the value will be ignored.
8042 If TMODE is not VOIDmode, it suggests generating the
8043 result in mode TMODE. But this is done only when convenient.
8044 Otherwise, TMODE is ignored and the value generated in its natural mode.
8045 TMODE is just a suggestion; callers must assume that
8046 the rtx returned may not have mode TMODE.
8048 Note that TARGET may have neither TMODE nor MODE. In that case, it
8049 probably will not be used.
8051 If MODIFIER is EXPAND_SUM then when EXP is an addition
8052 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8053 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8054 products as above, or REG or MEM, or constant.
8055 Ordinarily in such cases we would output mul or add instructions
8056 and then return a pseudo reg containing the sum.
8058 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8059 it also marks a label as absolutely required (it can't be dead).
8060 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8061 This is used for outputting expressions used in initializers.
8063 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8064 with a constant address even if that address is not normally legitimate.
8065 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8067 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8068 a call parameter. Such targets require special care as we haven't yet
8069 marked TARGET so that it's safe from being trashed by libcalls. We
8070 don't want to use TARGET for anything but the final result;
8071 Intermediate values must go elsewhere. Additionally, calls to
8072 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8074 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8075 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8076 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8077 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8080 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8081 In this case, we don't adjust a returned MEM rtx that wouldn't be
8082 sufficiently aligned for its mode; instead, it's up to the caller
8083 to deal with it afterwards. This is used to make sure that unaligned
8084 base objects for which out-of-bounds accesses are supported, for
8085 example record types with trailing arrays, aren't realigned behind
8086 the back of the caller.
8087 The normal operating mode is to pass FALSE for this parameter. */
8090 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8091 enum expand_modifier modifier
, rtx
*alt_rtl
,
8092 bool inner_reference_p
)
8096 /* Handle ERROR_MARK before anybody tries to access its type. */
8097 if (TREE_CODE (exp
) == ERROR_MARK
8098 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8100 ret
= CONST0_RTX (tmode
);
8101 return ret
? ret
: const0_rtx
;
8104 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8109 /* Try to expand the conditional expression which is represented by
8110 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8111 return the rtl reg which represents the result. Otherwise return
8115 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8116 tree treeop1 ATTRIBUTE_UNUSED
,
8117 tree treeop2 ATTRIBUTE_UNUSED
)
8120 rtx op00
, op01
, op1
, op2
;
8121 enum rtx_code comparison_code
;
8122 machine_mode comparison_mode
;
8125 tree type
= TREE_TYPE (treeop1
);
8126 int unsignedp
= TYPE_UNSIGNED (type
);
8127 machine_mode mode
= TYPE_MODE (type
);
8128 machine_mode orig_mode
= mode
;
8129 static bool expanding_cond_expr_using_cmove
= false;
8131 /* Conditional move expansion can end up TERing two operands which,
8132 when recursively hitting conditional expressions can result in
8133 exponential behavior if the cmove expansion ultimatively fails.
8134 It's hardly profitable to TER a cmove into a cmove so avoid doing
8135 that by failing early if we end up recursing. */
8136 if (expanding_cond_expr_using_cmove
)
8139 /* If we cannot do a conditional move on the mode, try doing it
8140 with the promoted mode. */
8141 if (!can_conditionally_move_p (mode
))
8143 mode
= promote_mode (type
, mode
, &unsignedp
);
8144 if (!can_conditionally_move_p (mode
))
8146 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8149 temp
= assign_temp (type
, 0, 1);
8151 expanding_cond_expr_using_cmove
= true;
8153 expand_operands (treeop1
, treeop2
,
8154 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8156 if (TREE_CODE (treeop0
) == SSA_NAME
8157 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8159 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8160 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8161 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8162 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8163 comparison_mode
= TYPE_MODE (type
);
8164 unsignedp
= TYPE_UNSIGNED (type
);
8165 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8167 else if (COMPARISON_CLASS_P (treeop0
))
8169 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8170 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8171 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8172 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8173 unsignedp
= TYPE_UNSIGNED (type
);
8174 comparison_mode
= TYPE_MODE (type
);
8175 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8179 op00
= expand_normal (treeop0
);
8181 comparison_code
= NE
;
8182 comparison_mode
= GET_MODE (op00
);
8183 if (comparison_mode
== VOIDmode
)
8184 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8186 expanding_cond_expr_using_cmove
= false;
8188 if (GET_MODE (op1
) != mode
)
8189 op1
= gen_lowpart (mode
, op1
);
8191 if (GET_MODE (op2
) != mode
)
8192 op2
= gen_lowpart (mode
, op2
);
8194 /* Try to emit the conditional move. */
8195 insn
= emit_conditional_move (temp
, comparison_code
,
8196 op00
, op01
, comparison_mode
,
8200 /* If we could do the conditional move, emit the sequence,
8204 rtx_insn
*seq
= get_insns ();
8207 return convert_modes (orig_mode
, mode
, temp
, 0);
8210 /* Otherwise discard the sequence and fall back to code with
8217 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8218 enum expand_modifier modifier
)
8220 rtx op0
, op1
, op2
, temp
;
8221 rtx_code_label
*lab
;
8225 scalar_int_mode int_mode
;
8226 enum tree_code code
= ops
->code
;
8228 rtx subtarget
, original_target
;
8230 bool reduce_bit_field
;
8231 location_t loc
= ops
->location
;
8232 tree treeop0
, treeop1
, treeop2
;
8233 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8234 ? reduce_to_bit_field_precision ((expr), \
8240 mode
= TYPE_MODE (type
);
8241 unsignedp
= TYPE_UNSIGNED (type
);
8247 /* We should be called only on simple (binary or unary) expressions,
8248 exactly those that are valid in gimple expressions that aren't
8249 GIMPLE_SINGLE_RHS (or invalid). */
8250 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8251 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8252 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8254 ignore
= (target
== const0_rtx
8255 || ((CONVERT_EXPR_CODE_P (code
)
8256 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8257 && TREE_CODE (type
) == VOID_TYPE
));
8259 /* We should be called only if we need the result. */
8260 gcc_assert (!ignore
);
8262 /* An operation in what may be a bit-field type needs the
8263 result to be reduced to the precision of the bit-field type,
8264 which is narrower than that of the type's mode. */
8265 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8266 && !type_has_mode_precision_p (type
));
8268 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8271 /* Use subtarget as the target for operand 0 of a binary operation. */
8272 subtarget
= get_subtarget (target
);
8273 original_target
= target
;
8277 case NON_LVALUE_EXPR
:
8280 if (treeop0
== error_mark_node
)
8283 if (TREE_CODE (type
) == UNION_TYPE
)
8285 tree valtype
= TREE_TYPE (treeop0
);
8287 /* If both input and output are BLKmode, this conversion isn't doing
8288 anything except possibly changing memory attribute. */
8289 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8291 rtx result
= expand_expr (treeop0
, target
, tmode
,
8294 result
= copy_rtx (result
);
8295 set_mem_attributes (result
, type
, 0);
8301 if (TYPE_MODE (type
) != BLKmode
)
8302 target
= gen_reg_rtx (TYPE_MODE (type
));
8304 target
= assign_temp (type
, 1, 1);
8308 /* Store data into beginning of memory target. */
8309 store_expr (treeop0
,
8310 adjust_address (target
, TYPE_MODE (valtype
), 0),
8311 modifier
== EXPAND_STACK_PARM
,
8312 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8316 gcc_assert (REG_P (target
)
8317 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8319 /* Store this field into a union of the proper type. */
8320 store_field (target
,
8321 MIN ((int_size_in_bytes (TREE_TYPE
8324 (HOST_WIDE_INT
) GET_MODE_BITSIZE (mode
)),
8325 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8329 /* Return the entire union. */
8333 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8335 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8338 /* If the signedness of the conversion differs and OP0 is
8339 a promoted SUBREG, clear that indication since we now
8340 have to do the proper extension. */
8341 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8342 && GET_CODE (op0
) == SUBREG
)
8343 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8345 return REDUCE_BIT_FIELD (op0
);
8348 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8349 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8350 if (GET_MODE (op0
) == mode
)
8353 /* If OP0 is a constant, just convert it into the proper mode. */
8354 else if (CONSTANT_P (op0
))
8356 tree inner_type
= TREE_TYPE (treeop0
);
8357 machine_mode inner_mode
= GET_MODE (op0
);
8359 if (inner_mode
== VOIDmode
)
8360 inner_mode
= TYPE_MODE (inner_type
);
8362 if (modifier
== EXPAND_INITIALIZER
)
8363 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8365 op0
= convert_modes (mode
, inner_mode
, op0
,
8366 TYPE_UNSIGNED (inner_type
));
8369 else if (modifier
== EXPAND_INITIALIZER
)
8370 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8371 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8373 else if (target
== 0)
8374 op0
= convert_to_mode (mode
, op0
,
8375 TYPE_UNSIGNED (TREE_TYPE
8379 convert_move (target
, op0
,
8380 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8384 return REDUCE_BIT_FIELD (op0
);
8386 case ADDR_SPACE_CONVERT_EXPR
:
8388 tree treeop0_type
= TREE_TYPE (treeop0
);
8390 gcc_assert (POINTER_TYPE_P (type
));
8391 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8393 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8394 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8396 /* Conversions between pointers to the same address space should
8397 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8398 gcc_assert (as_to
!= as_from
);
8400 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8402 /* Ask target code to handle conversion between pointers
8403 to overlapping address spaces. */
8404 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8405 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8407 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8411 /* For disjoint address spaces, converting anything but a null
8412 pointer invokes undefined behavior. We truncate or extend the
8413 value as if we'd converted via integers, which handles 0 as
8414 required, and all others as the programmer likely expects. */
8415 #ifndef POINTERS_EXTEND_UNSIGNED
8416 const int POINTERS_EXTEND_UNSIGNED
= 1;
8418 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8419 op0
, POINTERS_EXTEND_UNSIGNED
);
8425 case POINTER_PLUS_EXPR
:
8426 /* Even though the sizetype mode and the pointer's mode can be different
8427 expand is able to handle this correctly and get the correct result out
8428 of the PLUS_EXPR code. */
8429 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8430 if sizetype precision is smaller than pointer precision. */
8431 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8432 treeop1
= fold_convert_loc (loc
, type
,
8433 fold_convert_loc (loc
, ssizetype
,
8435 /* If sizetype precision is larger than pointer precision, truncate the
8436 offset to have matching modes. */
8437 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8438 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8442 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8443 something else, make sure we add the register to the constant and
8444 then to the other thing. This case can occur during strength
8445 reduction and doing it this way will produce better code if the
8446 frame pointer or argument pointer is eliminated.
8448 fold-const.c will ensure that the constant is always in the inner
8449 PLUS_EXPR, so the only case we need to do anything about is if
8450 sp, ap, or fp is our second argument, in which case we must swap
8451 the innermost first argument and our second argument. */
8453 if (TREE_CODE (treeop0
) == PLUS_EXPR
8454 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8456 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8457 || DECL_RTL (treeop1
) == stack_pointer_rtx
8458 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8463 /* If the result is to be ptr_mode and we are adding an integer to
8464 something, we might be forming a constant. So try to use
8465 plus_constant. If it produces a sum and we can't accept it,
8466 use force_operand. This allows P = &ARR[const] to generate
8467 efficient code on machines where a SYMBOL_REF is not a valid
8470 If this is an EXPAND_SUM call, always return the sum. */
8471 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8472 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8474 if (modifier
== EXPAND_STACK_PARM
)
8476 if (TREE_CODE (treeop0
) == INTEGER_CST
8477 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8478 && TREE_CONSTANT (treeop1
))
8482 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8484 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8486 /* Use wi::shwi to ensure that the constant is
8487 truncated according to the mode of OP1, then sign extended
8488 to a HOST_WIDE_INT. Using the constant directly can result
8489 in non-canonical RTL in a 64x32 cross compile. */
8490 wc
= TREE_INT_CST_LOW (treeop0
);
8492 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8493 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8494 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8495 op1
= force_operand (op1
, target
);
8496 return REDUCE_BIT_FIELD (op1
);
8499 else if (TREE_CODE (treeop1
) == INTEGER_CST
8500 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8501 && TREE_CONSTANT (treeop0
))
8505 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8507 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8508 (modifier
== EXPAND_INITIALIZER
8509 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8510 if (! CONSTANT_P (op0
))
8512 op1
= expand_expr (treeop1
, NULL_RTX
,
8513 VOIDmode
, modifier
);
8514 /* Return a PLUS if modifier says it's OK. */
8515 if (modifier
== EXPAND_SUM
8516 || modifier
== EXPAND_INITIALIZER
)
8517 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8520 /* Use wi::shwi to ensure that the constant is
8521 truncated according to the mode of OP1, then sign extended
8522 to a HOST_WIDE_INT. Using the constant directly can result
8523 in non-canonical RTL in a 64x32 cross compile. */
8524 wc
= TREE_INT_CST_LOW (treeop1
);
8526 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8527 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8528 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8529 op0
= force_operand (op0
, target
);
8530 return REDUCE_BIT_FIELD (op0
);
8534 /* Use TER to expand pointer addition of a negated value
8535 as pointer subtraction. */
8536 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8537 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8538 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8539 && TREE_CODE (treeop1
) == SSA_NAME
8540 && TYPE_MODE (TREE_TYPE (treeop0
))
8541 == TYPE_MODE (TREE_TYPE (treeop1
)))
8543 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8546 treeop1
= gimple_assign_rhs1 (def
);
8552 /* No sense saving up arithmetic to be done
8553 if it's all in the wrong mode to form part of an address.
8554 And force_operand won't know whether to sign-extend or
8556 if (modifier
!= EXPAND_INITIALIZER
8557 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8559 expand_operands (treeop0
, treeop1
,
8560 subtarget
, &op0
, &op1
, modifier
);
8561 if (op0
== const0_rtx
)
8563 if (op1
== const0_rtx
)
8568 expand_operands (treeop0
, treeop1
,
8569 subtarget
, &op0
, &op1
, modifier
);
8570 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8574 /* For initializers, we are allowed to return a MINUS of two
8575 symbolic constants. Here we handle all cases when both operands
8577 /* Handle difference of two symbolic constants,
8578 for the sake of an initializer. */
8579 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8580 && really_constant_p (treeop0
)
8581 && really_constant_p (treeop1
))
8583 expand_operands (treeop0
, treeop1
,
8584 NULL_RTX
, &op0
, &op1
, modifier
);
8586 /* If the last operand is a CONST_INT, use plus_constant of
8587 the negated constant. Else make the MINUS. */
8588 if (CONST_INT_P (op1
))
8589 return REDUCE_BIT_FIELD (plus_constant (mode
, op0
,
8592 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode
, op0
, op1
));
8595 /* No sense saving up arithmetic to be done
8596 if it's all in the wrong mode to form part of an address.
8597 And force_operand won't know whether to sign-extend or
8599 if (modifier
!= EXPAND_INITIALIZER
8600 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8603 expand_operands (treeop0
, treeop1
,
8604 subtarget
, &op0
, &op1
, modifier
);
8606 /* Convert A - const to A + (-const). */
8607 if (CONST_INT_P (op1
))
8609 op1
= negate_rtx (mode
, op1
);
8610 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8615 case WIDEN_MULT_PLUS_EXPR
:
8616 case WIDEN_MULT_MINUS_EXPR
:
8617 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8618 op2
= expand_normal (treeop2
);
8619 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8623 case WIDEN_MULT_EXPR
:
8624 /* If first operand is constant, swap them.
8625 Thus the following special case checks need only
8626 check the second operand. */
8627 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8628 std::swap (treeop0
, treeop1
);
8630 /* First, check if we have a multiplication of one signed and one
8631 unsigned operand. */
8632 if (TREE_CODE (treeop1
) != INTEGER_CST
8633 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8634 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8636 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8637 this_optab
= usmul_widen_optab
;
8638 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8639 != CODE_FOR_nothing
)
8641 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8642 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8645 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8647 /* op0 and op1 might still be constant, despite the above
8648 != INTEGER_CST check. Handle it. */
8649 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8651 op0
= convert_modes (innermode
, mode
, op0
, true);
8652 op1
= convert_modes (innermode
, mode
, op1
, false);
8653 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8654 target
, unsignedp
));
8659 /* Check for a multiplication with matching signedness. */
8660 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8661 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8662 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8663 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8665 tree op0type
= TREE_TYPE (treeop0
);
8666 machine_mode innermode
= TYPE_MODE (op0type
);
8667 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8668 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8669 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8671 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8673 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8674 != CODE_FOR_nothing
)
8676 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8678 /* op0 and op1 might still be constant, despite the above
8679 != INTEGER_CST check. Handle it. */
8680 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8683 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8685 = convert_modes (innermode
, mode
, op1
,
8686 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8687 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8691 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8692 unsignedp
, this_optab
);
8693 return REDUCE_BIT_FIELD (temp
);
8695 if (find_widening_optab_handler (other_optab
, mode
, innermode
, 0)
8697 && innermode
== word_mode
)
8700 op0
= expand_normal (treeop0
);
8701 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8702 op1
= convert_modes (word_mode
, mode
,
8703 expand_normal (treeop1
),
8704 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8706 op1
= expand_normal (treeop1
);
8707 /* op0 and op1 might still be constant, despite the above
8708 != INTEGER_CST check. Handle it. */
8709 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8710 goto widen_mult_const
;
8711 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8712 unsignedp
, OPTAB_LIB_WIDEN
);
8713 hipart
= gen_highpart (word_mode
, temp
);
8714 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8718 emit_move_insn (hipart
, htem
);
8719 return REDUCE_BIT_FIELD (temp
);
8723 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8724 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8725 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8726 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8730 optab opt
= fma_optab
;
8731 gimple
*def0
, *def2
;
8733 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8735 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8737 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8740 gcc_assert (fn
!= NULL_TREE
);
8741 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8742 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8745 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8746 /* The multiplication is commutative - look at its 2nd operand
8747 if the first isn't fed by a negate. */
8750 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8751 /* Swap operands if the 2nd operand is fed by a negate. */
8753 std::swap (treeop0
, treeop1
);
8755 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8760 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8763 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8764 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8767 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8770 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8773 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8776 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8780 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8782 op2
= expand_normal (treeop2
);
8783 op1
= expand_normal (treeop1
);
8785 return expand_ternary_op (TYPE_MODE (type
), opt
,
8786 op0
, op1
, op2
, target
, 0);
8790 /* If this is a fixed-point operation, then we cannot use the code
8791 below because "expand_mult" doesn't support sat/no-sat fixed-point
8793 if (ALL_FIXED_POINT_MODE_P (mode
))
8796 /* If first operand is constant, swap them.
8797 Thus the following special case checks need only
8798 check the second operand. */
8799 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8800 std::swap (treeop0
, treeop1
);
8802 /* Attempt to return something suitable for generating an
8803 indexed address, for machines that support that. */
8805 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8806 && tree_fits_shwi_p (treeop1
))
8808 tree exp1
= treeop1
;
8810 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8814 op0
= force_operand (op0
, NULL_RTX
);
8816 op0
= copy_to_mode_reg (mode
, op0
);
8818 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8819 gen_int_mode (tree_to_shwi (exp1
),
8820 TYPE_MODE (TREE_TYPE (exp1
)))));
8823 if (modifier
== EXPAND_STACK_PARM
)
8826 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8827 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8829 case TRUNC_MOD_EXPR
:
8830 case FLOOR_MOD_EXPR
:
8832 case ROUND_MOD_EXPR
:
8834 case TRUNC_DIV_EXPR
:
8835 case FLOOR_DIV_EXPR
:
8837 case ROUND_DIV_EXPR
:
8838 case EXACT_DIV_EXPR
:
8840 /* If this is a fixed-point operation, then we cannot use the code
8841 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8843 if (ALL_FIXED_POINT_MODE_P (mode
))
8846 if (modifier
== EXPAND_STACK_PARM
)
8848 /* Possible optimization: compute the dividend with EXPAND_SUM
8849 then if the divisor is constant can optimize the case
8850 where some terms of the dividend have coeffs divisible by it. */
8851 expand_operands (treeop0
, treeop1
,
8852 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8853 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8854 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8855 if (SCALAR_INT_MODE_P (mode
)
8857 && get_range_pos_neg (treeop0
) == 1
8858 && get_range_pos_neg (treeop1
) == 1)
8860 /* If both arguments are known to be positive when interpreted
8861 as signed, we can expand it as both signed and unsigned
8862 division or modulo. Choose the cheaper sequence in that case. */
8863 bool speed_p
= optimize_insn_for_speed_p ();
8864 do_pending_stack_adjust ();
8866 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8867 rtx_insn
*uns_insns
= get_insns ();
8870 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8871 rtx_insn
*sgn_insns
= get_insns ();
8873 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8874 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8876 /* If costs are the same then use as tie breaker the other
8878 if (uns_cost
== sgn_cost
)
8880 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8881 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8884 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8886 emit_insn (uns_insns
);
8889 emit_insn (sgn_insns
);
8892 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8897 case MULT_HIGHPART_EXPR
:
8898 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8899 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8903 case FIXED_CONVERT_EXPR
:
8904 op0
= expand_normal (treeop0
);
8905 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8906 target
= gen_reg_rtx (mode
);
8908 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8909 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8910 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8911 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8913 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8916 case FIX_TRUNC_EXPR
:
8917 op0
= expand_normal (treeop0
);
8918 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8919 target
= gen_reg_rtx (mode
);
8920 expand_fix (target
, op0
, unsignedp
);
8924 op0
= expand_normal (treeop0
);
8925 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8926 target
= gen_reg_rtx (mode
);
8927 /* expand_float can't figure out what to do if FROM has VOIDmode.
8928 So give it the correct mode. With -O, cse will optimize this. */
8929 if (GET_MODE (op0
) == VOIDmode
)
8930 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8932 expand_float (target
, op0
,
8933 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8937 op0
= expand_expr (treeop0
, subtarget
,
8938 VOIDmode
, EXPAND_NORMAL
);
8939 if (modifier
== EXPAND_STACK_PARM
)
8941 temp
= expand_unop (mode
,
8942 optab_for_tree_code (NEGATE_EXPR
, type
,
8946 return REDUCE_BIT_FIELD (temp
);
8949 op0
= expand_expr (treeop0
, subtarget
,
8950 VOIDmode
, EXPAND_NORMAL
);
8951 if (modifier
== EXPAND_STACK_PARM
)
8954 /* ABS_EXPR is not valid for complex arguments. */
8955 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8956 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8958 /* Unsigned abs is simply the operand. Testing here means we don't
8959 risk generating incorrect code below. */
8960 if (TYPE_UNSIGNED (type
))
8963 return expand_abs (mode
, op0
, target
, unsignedp
,
8964 safe_from_p (target
, treeop0
, 1));
8968 target
= original_target
;
8970 || modifier
== EXPAND_STACK_PARM
8971 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
8972 || GET_MODE (target
) != mode
8974 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
8975 target
= gen_reg_rtx (mode
);
8976 expand_operands (treeop0
, treeop1
,
8977 target
, &op0
, &op1
, EXPAND_NORMAL
);
8979 /* First try to do it with a special MIN or MAX instruction.
8980 If that does not win, use a conditional jump to select the proper
8982 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8983 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
8988 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
8989 and similarly for MAX <x, y>. */
8990 if (VECTOR_TYPE_P (type
))
8992 tree t0
= make_tree (type
, op0
);
8993 tree t1
= make_tree (type
, op1
);
8994 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
8996 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9000 /* At this point, a MEM target is no longer useful; we will get better
9003 if (! REG_P (target
))
9004 target
= gen_reg_rtx (mode
);
9006 /* If op1 was placed in target, swap op0 and op1. */
9007 if (target
!= op0
&& target
== op1
)
9008 std::swap (op0
, op1
);
9010 /* We generate better code and avoid problems with op1 mentioning
9011 target by forcing op1 into a pseudo if it isn't a constant. */
9012 if (! CONSTANT_P (op1
))
9013 op1
= force_reg (mode
, op1
);
9016 enum rtx_code comparison_code
;
9019 if (code
== MAX_EXPR
)
9020 comparison_code
= unsignedp
? GEU
: GE
;
9022 comparison_code
= unsignedp
? LEU
: LE
;
9024 /* Canonicalize to comparisons against 0. */
9025 if (op1
== const1_rtx
)
9027 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9028 or (a != 0 ? a : 1) for unsigned.
9029 For MIN we are safe converting (a <= 1 ? a : 1)
9030 into (a <= 0 ? a : 1) */
9031 cmpop1
= const0_rtx
;
9032 if (code
== MAX_EXPR
)
9033 comparison_code
= unsignedp
? NE
: GT
;
9035 if (op1
== constm1_rtx
&& !unsignedp
)
9037 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9038 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9039 cmpop1
= const0_rtx
;
9040 if (code
== MIN_EXPR
)
9041 comparison_code
= LT
;
9044 /* Use a conditional move if possible. */
9045 if (can_conditionally_move_p (mode
))
9051 /* Try to emit the conditional move. */
9052 insn
= emit_conditional_move (target
, comparison_code
,
9057 /* If we could do the conditional move, emit the sequence,
9061 rtx_insn
*seq
= get_insns ();
9067 /* Otherwise discard the sequence and fall back to code with
9073 emit_move_insn (target
, op0
);
9075 lab
= gen_label_rtx ();
9076 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9077 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9078 profile_probability::uninitialized ());
9080 emit_move_insn (target
, op1
);
9085 op0
= expand_expr (treeop0
, subtarget
,
9086 VOIDmode
, EXPAND_NORMAL
);
9087 if (modifier
== EXPAND_STACK_PARM
)
9089 /* In case we have to reduce the result to bitfield precision
9090 for unsigned bitfield expand this as XOR with a proper constant
9092 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9094 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9095 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9096 false, GET_MODE_PRECISION (int_mode
));
9098 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9099 immed_wide_int_const (mask
, int_mode
),
9100 target
, 1, OPTAB_LIB_WIDEN
);
9103 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9107 /* ??? Can optimize bitwise operations with one arg constant.
9108 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9109 and (a bitwise1 b) bitwise2 b (etc)
9110 but that is probably not worth while. */
9119 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9120 || type_has_mode_precision_p (type
));
9126 /* If this is a fixed-point operation, then we cannot use the code
9127 below because "expand_shift" doesn't support sat/no-sat fixed-point
9129 if (ALL_FIXED_POINT_MODE_P (mode
))
9132 if (! safe_from_p (subtarget
, treeop1
, 1))
9134 if (modifier
== EXPAND_STACK_PARM
)
9136 op0
= expand_expr (treeop0
, subtarget
,
9137 VOIDmode
, EXPAND_NORMAL
);
9139 /* Left shift optimization when shifting across word_size boundary.
9141 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9142 there isn't native instruction to support this wide mode
9143 left shift. Given below scenario:
9145 Type A = (Type) B << C
9148 | dest_high | dest_low |
9152 If the shift amount C caused we shift B to across the word
9153 size boundary, i.e part of B shifted into high half of
9154 destination register, and part of B remains in the low
9155 half, then GCC will use the following left shift expand
9158 1. Initialize dest_low to B.
9159 2. Initialize every bit of dest_high to the sign bit of B.
9160 3. Logic left shift dest_low by C bit to finalize dest_low.
9161 The value of dest_low before this shift is kept in a temp D.
9162 4. Logic left shift dest_high by C.
9163 5. Logic right shift D by (word_size - C).
9164 6. Or the result of 4 and 5 to finalize dest_high.
9166 While, by checking gimple statements, if operand B is
9167 coming from signed extension, then we can simplify above
9170 1. dest_high = src_low >> (word_size - C).
9171 2. dest_low = src_low << C.
9173 We can use one arithmetic right shift to finish all the
9174 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9175 needed from 6 into 2.
9177 The case is similar for zero extension, except that we
9178 initialize dest_high to zero rather than copies of the sign
9179 bit from B. Furthermore, we need to use a logical right shift
9182 The choice of sign-extension versus zero-extension is
9183 determined entirely by whether or not B is signed and is
9184 independent of the current setting of unsignedp. */
9187 if (code
== LSHIFT_EXPR
9190 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9192 && TREE_CONSTANT (treeop1
)
9193 && TREE_CODE (treeop0
) == SSA_NAME
)
9195 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9196 if (is_gimple_assign (def
)
9197 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9199 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9200 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9202 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9203 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9204 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9205 >= GET_MODE_BITSIZE (word_mode
)))
9207 rtx_insn
*seq
, *seq_old
;
9208 unsigned int high_off
= subreg_highpart_offset (word_mode
,
9210 bool extend_unsigned
9211 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9212 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9213 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9214 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9215 int_mode
, high_off
);
9216 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9217 - TREE_INT_CST_LOW (treeop1
));
9218 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9221 /* dest_high = src_low >> (word_size - C). */
9222 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9225 if (temp
!= dest_high
)
9226 emit_move_insn (dest_high
, temp
);
9228 /* dest_low = src_low << C. */
9229 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9230 treeop1
, dest_low
, unsignedp
);
9231 if (temp
!= dest_low
)
9232 emit_move_insn (dest_low
, temp
);
9238 if (have_insn_for (ASHIFT
, int_mode
))
9240 bool speed_p
= optimize_insn_for_speed_p ();
9242 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9247 seq_old
= get_insns ();
9249 if (seq_cost (seq
, speed_p
)
9250 >= seq_cost (seq_old
, speed_p
))
9261 if (temp
== NULL_RTX
)
9262 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9264 if (code
== LSHIFT_EXPR
)
9265 temp
= REDUCE_BIT_FIELD (temp
);
9269 /* Could determine the answer when only additive constants differ. Also,
9270 the addition of one can be handled by changing the condition. */
9277 case UNORDERED_EXPR
:
9286 temp
= do_store_flag (ops
,
9287 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9288 tmode
!= VOIDmode
? tmode
: mode
);
9292 /* Use a compare and a jump for BLKmode comparisons, or for function
9293 type comparisons is have_canonicalize_funcptr_for_compare. */
9296 || modifier
== EXPAND_STACK_PARM
9297 || ! safe_from_p (target
, treeop0
, 1)
9298 || ! safe_from_p (target
, treeop1
, 1)
9299 /* Make sure we don't have a hard reg (such as function's return
9300 value) live across basic blocks, if not optimizing. */
9301 || (!optimize
&& REG_P (target
)
9302 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9303 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9305 emit_move_insn (target
, const0_rtx
);
9307 rtx_code_label
*lab1
= gen_label_rtx ();
9308 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9309 profile_probability::uninitialized ());
9311 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9312 emit_move_insn (target
, constm1_rtx
);
9314 emit_move_insn (target
, const1_rtx
);
9320 /* Get the rtx code of the operands. */
9321 op0
= expand_normal (treeop0
);
9322 op1
= expand_normal (treeop1
);
9325 target
= gen_reg_rtx (TYPE_MODE (type
));
9327 /* If target overlaps with op1, then either we need to force
9328 op1 into a pseudo (if target also overlaps with op0),
9329 or write the complex parts in reverse order. */
9330 switch (GET_CODE (target
))
9333 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9335 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9337 complex_expr_force_op1
:
9338 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9339 emit_move_insn (temp
, op1
);
9343 complex_expr_swap_order
:
9344 /* Move the imaginary (op1) and real (op0) parts to their
9346 write_complex_part (target
, op1
, true);
9347 write_complex_part (target
, op0
, false);
9353 temp
= adjust_address_nv (target
,
9354 GET_MODE_INNER (GET_MODE (target
)), 0);
9355 if (reg_overlap_mentioned_p (temp
, op1
))
9357 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9358 temp
= adjust_address_nv (target
, imode
,
9359 GET_MODE_SIZE (imode
));
9360 if (reg_overlap_mentioned_p (temp
, op0
))
9361 goto complex_expr_force_op1
;
9362 goto complex_expr_swap_order
;
9366 if (reg_overlap_mentioned_p (target
, op1
))
9368 if (reg_overlap_mentioned_p (target
, op0
))
9369 goto complex_expr_force_op1
;
9370 goto complex_expr_swap_order
;
9375 /* Move the real (op0) and imaginary (op1) parts to their location. */
9376 write_complex_part (target
, op0
, false);
9377 write_complex_part (target
, op1
, true);
9381 case WIDEN_SUM_EXPR
:
9383 tree oprnd0
= treeop0
;
9384 tree oprnd1
= treeop1
;
9386 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9387 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9392 case REDUC_MAX_EXPR
:
9393 case REDUC_MIN_EXPR
:
9394 case REDUC_PLUS_EXPR
:
9396 op0
= expand_normal (treeop0
);
9397 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9398 machine_mode vec_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9400 struct expand_operand ops
[2];
9401 enum insn_code icode
= optab_handler (this_optab
, vec_mode
);
9403 create_output_operand (&ops
[0], target
, mode
);
9404 create_input_operand (&ops
[1], op0
, vec_mode
);
9405 expand_insn (icode
, 2, ops
);
9406 target
= ops
[0].value
;
9407 if (GET_MODE (target
) != mode
)
9408 return gen_lowpart (tmode
, target
);
9412 case VEC_UNPACK_HI_EXPR
:
9413 case VEC_UNPACK_LO_EXPR
:
9415 op0
= expand_normal (treeop0
);
9416 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9422 case VEC_UNPACK_FLOAT_HI_EXPR
:
9423 case VEC_UNPACK_FLOAT_LO_EXPR
:
9425 op0
= expand_normal (treeop0
);
9426 /* The signedness is determined from input operand. */
9427 temp
= expand_widen_pattern_expr
9428 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9429 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9435 case VEC_WIDEN_MULT_HI_EXPR
:
9436 case VEC_WIDEN_MULT_LO_EXPR
:
9437 case VEC_WIDEN_MULT_EVEN_EXPR
:
9438 case VEC_WIDEN_MULT_ODD_EXPR
:
9439 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9440 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9441 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9442 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9444 gcc_assert (target
);
9447 case VEC_PACK_TRUNC_EXPR
:
9448 case VEC_PACK_SAT_EXPR
:
9449 case VEC_PACK_FIX_TRUNC_EXPR
:
9450 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9454 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9455 op2
= expand_normal (treeop2
);
9457 /* Careful here: if the target doesn't support integral vector modes,
9458 a constant selection vector could wind up smooshed into a normal
9459 integral constant. */
9460 if (CONSTANT_P (op2
) && GET_CODE (op2
) != CONST_VECTOR
)
9462 tree sel_type
= TREE_TYPE (treeop2
);
9464 = mode_for_vector (SCALAR_TYPE_MODE (TREE_TYPE (sel_type
)),
9465 TYPE_VECTOR_SUBPARTS (sel_type
));
9466 gcc_assert (GET_MODE_CLASS (vmode
) == MODE_VECTOR_INT
);
9467 op2
= simplify_subreg (vmode
, op2
, TYPE_MODE (sel_type
), 0);
9468 gcc_assert (op2
&& GET_CODE (op2
) == CONST_VECTOR
);
9471 gcc_assert (GET_MODE_CLASS (GET_MODE (op2
)) == MODE_VECTOR_INT
);
9473 temp
= expand_vec_perm (mode
, op0
, op1
, op2
, target
);
9479 tree oprnd0
= treeop0
;
9480 tree oprnd1
= treeop1
;
9481 tree oprnd2
= treeop2
;
9484 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9485 op2
= expand_normal (oprnd2
);
9486 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9493 tree oprnd0
= treeop0
;
9494 tree oprnd1
= treeop1
;
9495 tree oprnd2
= treeop2
;
9498 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9499 op2
= expand_normal (oprnd2
);
9500 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9505 case REALIGN_LOAD_EXPR
:
9507 tree oprnd0
= treeop0
;
9508 tree oprnd1
= treeop1
;
9509 tree oprnd2
= treeop2
;
9512 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9513 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9514 op2
= expand_normal (oprnd2
);
9515 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9523 /* A COND_EXPR with its type being VOID_TYPE represents a
9524 conditional jump and is handled in
9525 expand_gimple_cond_expr. */
9526 gcc_assert (!VOID_TYPE_P (type
));
9528 /* Note that COND_EXPRs whose type is a structure or union
9529 are required to be constructed to contain assignments of
9530 a temporary variable, so that we can evaluate them here
9531 for side effect only. If type is void, we must do likewise. */
9533 gcc_assert (!TREE_ADDRESSABLE (type
)
9535 && TREE_TYPE (treeop1
) != void_type_node
9536 && TREE_TYPE (treeop2
) != void_type_node
);
9538 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9542 /* If we are not to produce a result, we have no target. Otherwise,
9543 if a target was specified use it; it will not be used as an
9544 intermediate target unless it is safe. If no target, use a
9547 if (modifier
!= EXPAND_STACK_PARM
9549 && safe_from_p (original_target
, treeop0
, 1)
9550 && GET_MODE (original_target
) == mode
9551 && !MEM_P (original_target
))
9552 temp
= original_target
;
9554 temp
= assign_temp (type
, 0, 1);
9556 do_pending_stack_adjust ();
9558 rtx_code_label
*lab0
= gen_label_rtx ();
9559 rtx_code_label
*lab1
= gen_label_rtx ();
9560 jumpifnot (treeop0
, lab0
,
9561 profile_probability::uninitialized ());
9562 store_expr (treeop1
, temp
,
9563 modifier
== EXPAND_STACK_PARM
,
9566 emit_jump_insn (targetm
.gen_jump (lab1
));
9569 store_expr (treeop2
, temp
,
9570 modifier
== EXPAND_STACK_PARM
,
9579 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9582 case BIT_INSERT_EXPR
:
9584 unsigned bitpos
= tree_to_uhwi (treeop2
);
9586 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9587 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9589 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9590 rtx op0
= expand_normal (treeop0
);
9591 rtx op1
= expand_normal (treeop1
);
9592 rtx dst
= gen_reg_rtx (mode
);
9593 emit_move_insn (dst
, op0
);
9594 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9595 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9603 /* Here to do an ordinary binary operator. */
9605 expand_operands (treeop0
, treeop1
,
9606 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9608 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9610 if (modifier
== EXPAND_STACK_PARM
)
9612 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9613 unsignedp
, OPTAB_LIB_WIDEN
);
9615 /* Bitwise operations do not need bitfield reduction as we expect their
9616 operands being properly truncated. */
9617 if (code
== BIT_XOR_EXPR
9618 || code
== BIT_AND_EXPR
9619 || code
== BIT_IOR_EXPR
)
9621 return REDUCE_BIT_FIELD (temp
);
9623 #undef REDUCE_BIT_FIELD
9626 /* Return TRUE if expression STMT is suitable for replacement.
9627 Never consider memory loads as replaceable, because those don't ever lead
9628 into constant expressions. */
9631 stmt_is_replaceable_p (gimple
*stmt
)
9633 if (ssa_is_replaceable_p (stmt
))
9635 /* Don't move around loads. */
9636 if (!gimple_assign_single_p (stmt
)
9637 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9644 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9645 enum expand_modifier modifier
, rtx
*alt_rtl
,
9646 bool inner_reference_p
)
9648 rtx op0
, op1
, temp
, decl_rtl
;
9651 machine_mode mode
, dmode
;
9652 enum tree_code code
= TREE_CODE (exp
);
9653 rtx subtarget
, original_target
;
9656 bool reduce_bit_field
;
9657 location_t loc
= EXPR_LOCATION (exp
);
9658 struct separate_ops ops
;
9659 tree treeop0
, treeop1
, treeop2
;
9660 tree ssa_name
= NULL_TREE
;
9663 type
= TREE_TYPE (exp
);
9664 mode
= TYPE_MODE (type
);
9665 unsignedp
= TYPE_UNSIGNED (type
);
9667 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9668 if (!VL_EXP_CLASS_P (exp
))
9669 switch (TREE_CODE_LENGTH (code
))
9672 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9673 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9674 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9684 ignore
= (target
== const0_rtx
9685 || ((CONVERT_EXPR_CODE_P (code
)
9686 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9687 && TREE_CODE (type
) == VOID_TYPE
));
9689 /* An operation in what may be a bit-field type needs the
9690 result to be reduced to the precision of the bit-field type,
9691 which is narrower than that of the type's mode. */
9692 reduce_bit_field
= (!ignore
9693 && INTEGRAL_TYPE_P (type
)
9694 && !type_has_mode_precision_p (type
));
9696 /* If we are going to ignore this result, we need only do something
9697 if there is a side-effect somewhere in the expression. If there
9698 is, short-circuit the most common cases here. Note that we must
9699 not call expand_expr with anything but const0_rtx in case this
9700 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9704 if (! TREE_SIDE_EFFECTS (exp
))
9707 /* Ensure we reference a volatile object even if value is ignored, but
9708 don't do this if all we are doing is taking its address. */
9709 if (TREE_THIS_VOLATILE (exp
)
9710 && TREE_CODE (exp
) != FUNCTION_DECL
9711 && mode
!= VOIDmode
&& mode
!= BLKmode
9712 && modifier
!= EXPAND_CONST_ADDRESS
)
9714 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9720 if (TREE_CODE_CLASS (code
) == tcc_unary
9721 || code
== BIT_FIELD_REF
9722 || code
== COMPONENT_REF
9723 || code
== INDIRECT_REF
)
9724 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9727 else if (TREE_CODE_CLASS (code
) == tcc_binary
9728 || TREE_CODE_CLASS (code
) == tcc_comparison
9729 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9731 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9732 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9739 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9742 /* Use subtarget as the target for operand 0 of a binary operation. */
9743 subtarget
= get_subtarget (target
);
9744 original_target
= target
;
9750 tree function
= decl_function_context (exp
);
9752 temp
= label_rtx (exp
);
9753 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9755 if (function
!= current_function_decl
9757 LABEL_REF_NONLOCAL_P (temp
) = 1;
9759 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9764 /* ??? ivopts calls expander, without any preparation from
9765 out-of-ssa. So fake instructions as if this was an access to the
9766 base variable. This unnecessarily allocates a pseudo, see how we can
9767 reuse it, if partition base vars have it set already. */
9768 if (!currently_expanding_to_rtl
)
9770 tree var
= SSA_NAME_VAR (exp
);
9771 if (var
&& DECL_RTL_SET_P (var
))
9772 return DECL_RTL (var
);
9773 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9774 LAST_VIRTUAL_REGISTER
+ 1);
9777 g
= get_gimple_for_ssa_name (exp
);
9778 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9780 && modifier
== EXPAND_INITIALIZER
9781 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9782 && (optimize
|| !SSA_NAME_VAR (exp
)
9783 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9784 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9785 g
= SSA_NAME_DEF_STMT (exp
);
9789 location_t saved_loc
= curr_insn_location ();
9790 location_t loc
= gimple_location (g
);
9791 if (loc
!= UNKNOWN_LOCATION
)
9792 set_curr_insn_location (loc
);
9793 ops
.code
= gimple_assign_rhs_code (g
);
9794 switch (get_gimple_rhs_class (ops
.code
))
9796 case GIMPLE_TERNARY_RHS
:
9797 ops
.op2
= gimple_assign_rhs3 (g
);
9799 case GIMPLE_BINARY_RHS
:
9800 ops
.op1
= gimple_assign_rhs2 (g
);
9802 /* Try to expand conditonal compare. */
9803 if (targetm
.gen_ccmp_first
)
9805 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9806 r
= expand_ccmp_expr (g
, mode
);
9811 case GIMPLE_UNARY_RHS
:
9812 ops
.op0
= gimple_assign_rhs1 (g
);
9813 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9815 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9817 case GIMPLE_SINGLE_RHS
:
9819 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9820 tmode
, modifier
, alt_rtl
,
9827 set_curr_insn_location (saved_loc
);
9828 if (REG_P (r
) && !REG_EXPR (r
))
9829 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9834 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9835 exp
= SSA_NAME_VAR (ssa_name
);
9836 goto expand_decl_rtl
;
9840 /* If a static var's type was incomplete when the decl was written,
9841 but the type is complete now, lay out the decl now. */
9842 if (DECL_SIZE (exp
) == 0
9843 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9844 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9845 layout_decl (exp
, 0);
9851 decl_rtl
= DECL_RTL (exp
);
9853 gcc_assert (decl_rtl
);
9855 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9856 settings for VECTOR_TYPE_P that might switch for the function. */
9857 if (currently_expanding_to_rtl
9858 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9859 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9860 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9862 decl_rtl
= copy_rtx (decl_rtl
);
9864 /* Record writes to register variables. */
9865 if (modifier
== EXPAND_WRITE
9867 && HARD_REGISTER_P (decl_rtl
))
9868 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9869 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9871 /* Ensure variable marked as used even if it doesn't go through
9872 a parser. If it hasn't be used yet, write out an external
9875 TREE_USED (exp
) = 1;
9877 /* Show we haven't gotten RTL for this yet. */
9880 /* Variables inherited from containing functions should have
9881 been lowered by this point. */
9883 context
= decl_function_context (exp
);
9885 || SCOPE_FILE_SCOPE_P (context
)
9886 || context
== current_function_decl
9887 || TREE_STATIC (exp
)
9888 || DECL_EXTERNAL (exp
)
9889 /* ??? C++ creates functions that are not TREE_STATIC. */
9890 || TREE_CODE (exp
) == FUNCTION_DECL
);
9892 /* This is the case of an array whose size is to be determined
9893 from its initializer, while the initializer is still being parsed.
9894 ??? We aren't parsing while expanding anymore. */
9896 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9897 temp
= validize_mem (decl_rtl
);
9899 /* If DECL_RTL is memory, we are in the normal case and the
9900 address is not valid, get the address into a register. */
9902 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9905 *alt_rtl
= decl_rtl
;
9906 decl_rtl
= use_anchored_address (decl_rtl
);
9907 if (modifier
!= EXPAND_CONST_ADDRESS
9908 && modifier
!= EXPAND_SUM
9909 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9910 : GET_MODE (decl_rtl
),
9912 MEM_ADDR_SPACE (decl_rtl
)))
9913 temp
= replace_equiv_address (decl_rtl
,
9914 copy_rtx (XEXP (decl_rtl
, 0)));
9917 /* If we got something, return it. But first, set the alignment
9918 if the address is a register. */
9921 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9922 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9928 dmode
= DECL_MODE (exp
);
9930 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9932 /* If the mode of DECL_RTL does not match that of the decl,
9933 there are two cases: we are dealing with a BLKmode value
9934 that is returned in a register, or we are dealing with
9935 a promoted value. In the latter case, return a SUBREG
9936 of the wanted mode, but mark it so that we know that it
9937 was already extended. */
9938 if (REG_P (decl_rtl
)
9940 && GET_MODE (decl_rtl
) != dmode
)
9944 /* Get the signedness to be used for this variable. Ensure we get
9945 the same mode we got when the variable was declared. */
9946 if (code
!= SSA_NAME
)
9947 pmode
= promote_decl_mode (exp
, &unsignedp
);
9948 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9949 && gimple_code (g
) == GIMPLE_CALL
9950 && !gimple_call_internal_p (g
))
9951 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9952 gimple_call_fntype (g
),
9955 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9956 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9958 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9959 SUBREG_PROMOTED_VAR_P (temp
) = 1;
9960 SUBREG_PROMOTED_SET (temp
, unsignedp
);
9968 /* Given that TYPE_PRECISION (type) is not always equal to
9969 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9970 the former to the latter according to the signedness of the
9972 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
9973 temp
= immed_wide_int_const
9974 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
9980 tree tmp
= NULL_TREE
;
9981 if (GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
9982 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
9983 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FRACT
9984 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UFRACT
9985 || GET_MODE_CLASS (mode
) == MODE_VECTOR_ACCUM
9986 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UACCUM
)
9987 return const_vector_from_tree (exp
);
9988 scalar_int_mode int_mode
;
9989 if (is_int_mode (mode
, &int_mode
))
9991 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
9992 return const_scalar_mask_from_tree (int_mode
, exp
);
9996 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
9998 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
9999 type_for_mode
, exp
);
10004 vec
<constructor_elt
, va_gc
> *v
;
10006 vec_alloc (v
, VECTOR_CST_NELTS (exp
));
10007 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
10008 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10009 tmp
= build_constructor (type
, v
);
10011 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10016 if (modifier
== EXPAND_WRITE
)
10018 /* Writing into CONST_DECL is always invalid, but handle it
10020 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10021 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10022 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10023 EXPAND_NORMAL
, as
);
10024 op0
= memory_address_addr_space (mode
, op0
, as
);
10025 temp
= gen_rtx_MEM (mode
, op0
);
10026 set_mem_addr_space (temp
, as
);
10029 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10032 /* If optimized, generate immediate CONST_DOUBLE
10033 which will be turned into memory by reload if necessary.
10035 We used to force a register so that loop.c could see it. But
10036 this does not allow gen_* patterns to perform optimizations with
10037 the constants. It also produces two insns in cases like "x = 1.0;".
10038 On most machines, floating-point constants are not permitted in
10039 many insns, so we'd end up copying it to a register in any case.
10041 Now, we do the copying in expand_binop, if appropriate. */
10042 return const_double_from_real_value (TREE_REAL_CST (exp
),
10043 TYPE_MODE (TREE_TYPE (exp
)));
10046 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10047 TYPE_MODE (TREE_TYPE (exp
)));
10050 /* Handle evaluating a complex constant in a CONCAT target. */
10051 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10053 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10056 rtarg
= XEXP (original_target
, 0);
10057 itarg
= XEXP (original_target
, 1);
10059 /* Move the real and imaginary parts separately. */
10060 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10061 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10064 emit_move_insn (rtarg
, op0
);
10066 emit_move_insn (itarg
, op1
);
10068 return original_target
;
10074 temp
= expand_expr_constant (exp
, 1, modifier
);
10076 /* temp contains a constant address.
10077 On RISC machines where a constant address isn't valid,
10078 make some insns to get that address into a register. */
10079 if (modifier
!= EXPAND_CONST_ADDRESS
10080 && modifier
!= EXPAND_INITIALIZER
10081 && modifier
!= EXPAND_SUM
10082 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10083 MEM_ADDR_SPACE (temp
)))
10084 return replace_equiv_address (temp
,
10085 copy_rtx (XEXP (temp
, 0)));
10090 tree val
= treeop0
;
10091 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10092 inner_reference_p
);
10094 if (!SAVE_EXPR_RESOLVED_P (exp
))
10096 /* We can indeed still hit this case, typically via builtin
10097 expanders calling save_expr immediately before expanding
10098 something. Assume this means that we only have to deal
10099 with non-BLKmode values. */
10100 gcc_assert (GET_MODE (ret
) != BLKmode
);
10102 val
= build_decl (curr_insn_location (),
10103 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10104 DECL_ARTIFICIAL (val
) = 1;
10105 DECL_IGNORED_P (val
) = 1;
10107 TREE_OPERAND (exp
, 0) = treeop0
;
10108 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10110 if (!CONSTANT_P (ret
))
10111 ret
= copy_to_reg (ret
);
10112 SET_DECL_RTL (val
, ret
);
10120 /* If we don't need the result, just ensure we evaluate any
10124 unsigned HOST_WIDE_INT idx
;
10127 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10128 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10133 return expand_constructor (exp
, target
, modifier
, false);
10135 case TARGET_MEM_REF
:
10138 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10139 enum insn_code icode
;
10140 unsigned int align
;
10142 op0
= addr_for_mem_ref (exp
, as
, true);
10143 op0
= memory_address_addr_space (mode
, op0
, as
);
10144 temp
= gen_rtx_MEM (mode
, op0
);
10145 set_mem_attributes (temp
, exp
, 0);
10146 set_mem_addr_space (temp
, as
);
10147 align
= get_object_alignment (exp
);
10148 if (modifier
!= EXPAND_WRITE
10149 && modifier
!= EXPAND_MEMORY
10151 && align
< GET_MODE_ALIGNMENT (mode
)
10152 /* If the target does not have special handling for unaligned
10153 loads of mode then it can use regular moves for them. */
10154 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10155 != CODE_FOR_nothing
))
10157 struct expand_operand ops
[2];
10159 /* We've already validated the memory, and we're creating a
10160 new pseudo destination. The predicates really can't fail,
10161 nor can the generator. */
10162 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10163 create_fixed_operand (&ops
[1], temp
);
10164 expand_insn (icode
, 2, ops
);
10165 temp
= ops
[0].value
;
10172 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10174 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10175 machine_mode address_mode
;
10176 tree base
= TREE_OPERAND (exp
, 0);
10178 enum insn_code icode
;
10180 /* Handle expansion of non-aliased memory with non-BLKmode. That
10181 might end up in a register. */
10182 if (mem_ref_refers_to_non_mem_p (exp
))
10184 HOST_WIDE_INT offset
= mem_ref_offset (exp
).to_short_addr ();
10185 base
= TREE_OPERAND (base
, 0);
10188 && tree_fits_uhwi_p (TYPE_SIZE (type
))
10189 && (GET_MODE_BITSIZE (DECL_MODE (base
))
10190 == tree_to_uhwi (TYPE_SIZE (type
))))
10191 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10192 target
, tmode
, modifier
);
10193 if (TYPE_MODE (type
) == BLKmode
)
10195 temp
= assign_stack_temp (DECL_MODE (base
),
10196 GET_MODE_SIZE (DECL_MODE (base
)));
10197 store_expr (base
, temp
, 0, false, false);
10198 temp
= adjust_address (temp
, BLKmode
, offset
);
10199 set_mem_size (temp
, int_size_in_bytes (type
));
10202 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10203 bitsize_int (offset
* BITS_PER_UNIT
));
10204 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10205 return expand_expr (exp
, target
, tmode
, modifier
);
10207 address_mode
= targetm
.addr_space
.address_mode (as
);
10208 base
= TREE_OPERAND (exp
, 0);
10209 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10211 tree mask
= gimple_assign_rhs2 (def_stmt
);
10212 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10213 gimple_assign_rhs1 (def_stmt
), mask
);
10214 TREE_OPERAND (exp
, 0) = base
;
10216 align
= get_object_alignment (exp
);
10217 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10218 op0
= memory_address_addr_space (mode
, op0
, as
);
10219 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10221 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10222 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10223 op0
= memory_address_addr_space (mode
, op0
, as
);
10225 temp
= gen_rtx_MEM (mode
, op0
);
10226 set_mem_attributes (temp
, exp
, 0);
10227 set_mem_addr_space (temp
, as
);
10228 if (TREE_THIS_VOLATILE (exp
))
10229 MEM_VOLATILE_P (temp
) = 1;
10230 if (modifier
!= EXPAND_WRITE
10231 && modifier
!= EXPAND_MEMORY
10232 && !inner_reference_p
10234 && align
< GET_MODE_ALIGNMENT (mode
))
10236 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10237 != CODE_FOR_nothing
)
10239 struct expand_operand ops
[2];
10241 /* We've already validated the memory, and we're creating a
10242 new pseudo destination. The predicates really can't fail,
10243 nor can the generator. */
10244 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10245 create_fixed_operand (&ops
[1], temp
);
10246 expand_insn (icode
, 2, ops
);
10247 temp
= ops
[0].value
;
10249 else if (SLOW_UNALIGNED_ACCESS (mode
, align
))
10250 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10251 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10252 (modifier
== EXPAND_STACK_PARM
10253 ? NULL_RTX
: target
),
10254 mode
, mode
, false, alt_rtl
);
10257 && modifier
!= EXPAND_MEMORY
10258 && modifier
!= EXPAND_WRITE
)
10259 temp
= flip_storage_order (mode
, temp
);
10266 tree array
= treeop0
;
10267 tree index
= treeop1
;
10270 /* Fold an expression like: "foo"[2].
10271 This is not done in fold so it won't happen inside &.
10272 Don't fold if this is for wide characters since it's too
10273 difficult to do correctly and this is a very rare case. */
10275 if (modifier
!= EXPAND_CONST_ADDRESS
10276 && modifier
!= EXPAND_INITIALIZER
10277 && modifier
!= EXPAND_MEMORY
)
10279 tree t
= fold_read_from_constant_string (exp
);
10282 return expand_expr (t
, target
, tmode
, modifier
);
10285 /* If this is a constant index into a constant array,
10286 just get the value from the array. Handle both the cases when
10287 we have an explicit constructor and when our operand is a variable
10288 that was declared const. */
10290 if (modifier
!= EXPAND_CONST_ADDRESS
10291 && modifier
!= EXPAND_INITIALIZER
10292 && modifier
!= EXPAND_MEMORY
10293 && TREE_CODE (array
) == CONSTRUCTOR
10294 && ! TREE_SIDE_EFFECTS (array
)
10295 && TREE_CODE (index
) == INTEGER_CST
)
10297 unsigned HOST_WIDE_INT ix
;
10300 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10302 if (tree_int_cst_equal (field
, index
))
10304 if (!TREE_SIDE_EFFECTS (value
))
10305 return expand_expr (fold (value
), target
, tmode
, modifier
);
10310 else if (optimize
>= 1
10311 && modifier
!= EXPAND_CONST_ADDRESS
10312 && modifier
!= EXPAND_INITIALIZER
10313 && modifier
!= EXPAND_MEMORY
10314 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10315 && TREE_CODE (index
) == INTEGER_CST
10316 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10317 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10319 if (init
== NULL_TREE
)
10321 tree value
= build_zero_cst (type
);
10322 if (TREE_CODE (value
) == CONSTRUCTOR
)
10324 /* If VALUE is a CONSTRUCTOR, this optimization is only
10325 useful if this doesn't store the CONSTRUCTOR into
10326 memory. If it does, it is more efficient to just
10327 load the data from the array directly. */
10328 rtx ret
= expand_constructor (value
, target
,
10330 if (ret
== NULL_RTX
)
10335 return expand_expr (value
, target
, tmode
, modifier
);
10337 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10339 unsigned HOST_WIDE_INT ix
;
10342 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10344 if (tree_int_cst_equal (field
, index
))
10346 if (TREE_SIDE_EFFECTS (value
))
10349 if (TREE_CODE (value
) == CONSTRUCTOR
)
10351 /* If VALUE is a CONSTRUCTOR, this
10352 optimization is only useful if
10353 this doesn't store the CONSTRUCTOR
10354 into memory. If it does, it is more
10355 efficient to just load the data from
10356 the array directly. */
10357 rtx ret
= expand_constructor (value
, target
,
10359 if (ret
== NULL_RTX
)
10364 expand_expr (fold (value
), target
, tmode
, modifier
);
10367 else if (TREE_CODE (init
) == STRING_CST
)
10369 tree low_bound
= array_ref_low_bound (exp
);
10370 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10372 /* Optimize the special case of a zero lower bound.
10374 We convert the lower bound to sizetype to avoid problems
10375 with constant folding. E.g. suppose the lower bound is
10376 1 and its mode is QI. Without the conversion
10377 (ARRAY + (INDEX - (unsigned char)1))
10379 (ARRAY + (-(unsigned char)1) + INDEX)
10381 (ARRAY + 255 + INDEX). Oops! */
10382 if (!integer_zerop (low_bound
))
10383 index1
= size_diffop_loc (loc
, index1
,
10384 fold_convert_loc (loc
, sizetype
,
10387 if (tree_fits_uhwi_p (index1
)
10388 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10390 tree type
= TREE_TYPE (TREE_TYPE (init
));
10391 scalar_int_mode mode
;
10393 if (is_int_mode (TYPE_MODE (type
), &mode
)
10394 && GET_MODE_SIZE (mode
) == 1)
10395 return gen_int_mode (TREE_STRING_POINTER (init
)
10396 [TREE_INT_CST_LOW (index1
)],
10402 goto normal_inner_ref
;
10404 case COMPONENT_REF
:
10405 /* If the operand is a CONSTRUCTOR, we can just extract the
10406 appropriate field if it is present. */
10407 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10409 unsigned HOST_WIDE_INT idx
;
10411 scalar_int_mode field_mode
;
10413 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10415 if (field
== treeop1
10416 /* We can normally use the value of the field in the
10417 CONSTRUCTOR. However, if this is a bitfield in
10418 an integral mode that we can fit in a HOST_WIDE_INT,
10419 we must mask only the number of bits in the bitfield,
10420 since this is done implicitly by the constructor. If
10421 the bitfield does not meet either of those conditions,
10422 we can't do this optimization. */
10423 && (! DECL_BIT_FIELD (field
)
10424 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10425 && (GET_MODE_PRECISION (field_mode
)
10426 <= HOST_BITS_PER_WIDE_INT
))))
10428 if (DECL_BIT_FIELD (field
)
10429 && modifier
== EXPAND_STACK_PARM
)
10431 op0
= expand_expr (value
, target
, tmode
, modifier
);
10432 if (DECL_BIT_FIELD (field
))
10434 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10435 scalar_int_mode imode
10436 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10438 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10440 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10442 op0
= expand_and (imode
, op0
, op1
, target
);
10446 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10448 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10450 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10458 goto normal_inner_ref
;
10460 case BIT_FIELD_REF
:
10461 case ARRAY_RANGE_REF
:
10464 machine_mode mode1
, mode2
;
10465 HOST_WIDE_INT bitsize
, bitpos
;
10467 int reversep
, volatilep
= 0, must_force_mem
;
10469 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10470 &unsignedp
, &reversep
, &volatilep
);
10471 rtx orig_op0
, memloc
;
10472 bool clear_mem_expr
= false;
10474 /* If we got back the original object, something is wrong. Perhaps
10475 we are evaluating an expression too early. In any event, don't
10476 infinitely recurse. */
10477 gcc_assert (tem
!= exp
);
10479 /* If TEM's type is a union of variable size, pass TARGET to the inner
10480 computation, since it will need a temporary and TARGET is known
10481 to have to do. This occurs in unchecked conversion in Ada. */
10483 = expand_expr_real (tem
,
10484 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10485 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10486 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10488 && modifier
!= EXPAND_STACK_PARM
10489 ? target
: NULL_RTX
),
10491 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10494 /* If the field has a mode, we want to access it in the
10495 field's mode, not the computed mode.
10496 If a MEM has VOIDmode (external with incomplete type),
10497 use BLKmode for it instead. */
10500 if (mode1
!= VOIDmode
)
10501 op0
= adjust_address (op0
, mode1
, 0);
10502 else if (GET_MODE (op0
) == VOIDmode
)
10503 op0
= adjust_address (op0
, BLKmode
, 0);
10507 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10509 /* If we have either an offset, a BLKmode result, or a reference
10510 outside the underlying object, we must force it to memory.
10511 Such a case can occur in Ada if we have unchecked conversion
10512 of an expression from a scalar type to an aggregate type or
10513 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10514 passed a partially uninitialized object or a view-conversion
10515 to a larger size. */
10516 must_force_mem
= (offset
10517 || mode1
== BLKmode
10518 || bitpos
+ bitsize
> GET_MODE_BITSIZE (mode2
));
10520 /* Handle CONCAT first. */
10521 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10524 && bitsize
== GET_MODE_BITSIZE (GET_MODE (op0
))
10525 && COMPLEX_MODE_P (mode1
)
10526 && COMPLEX_MODE_P (GET_MODE (op0
))
10527 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10528 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10531 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10532 if (mode1
!= GET_MODE (op0
))
10535 for (int i
= 0; i
< 2; i
++)
10537 rtx op
= read_complex_part (op0
, i
!= 0);
10538 if (GET_CODE (op
) == SUBREG
)
10539 op
= force_reg (GET_MODE (op
), op
);
10540 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10546 if (!REG_P (op
) && !MEM_P (op
))
10547 op
= force_reg (GET_MODE (op
), op
);
10548 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10552 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10557 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10560 op0
= XEXP (op0
, 0);
10561 mode2
= GET_MODE (op0
);
10563 else if (bitpos
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10564 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1)))
10568 op0
= XEXP (op0
, 1);
10570 mode2
= GET_MODE (op0
);
10573 /* Otherwise force into memory. */
10574 must_force_mem
= 1;
10577 /* If this is a constant, put it in a register if it is a legitimate
10578 constant and we don't need a memory reference. */
10579 if (CONSTANT_P (op0
)
10580 && mode2
!= BLKmode
10581 && targetm
.legitimate_constant_p (mode2
, op0
)
10582 && !must_force_mem
)
10583 op0
= force_reg (mode2
, op0
);
10585 /* Otherwise, if this is a constant, try to force it to the constant
10586 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10587 is a legitimate constant. */
10588 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10589 op0
= validize_mem (memloc
);
10591 /* Otherwise, if this is a constant or the object is not in memory
10592 and need be, put it there. */
10593 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10595 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10596 emit_move_insn (memloc
, op0
);
10598 clear_mem_expr
= true;
10603 machine_mode address_mode
;
10604 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10607 gcc_assert (MEM_P (op0
));
10609 address_mode
= get_address_mode (op0
);
10610 if (GET_MODE (offset_rtx
) != address_mode
)
10612 /* We cannot be sure that the RTL in offset_rtx is valid outside
10613 of a memory address context, so force it into a register
10614 before attempting to convert it to the desired mode. */
10615 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10616 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10619 /* See the comment in expand_assignment for the rationale. */
10620 if (mode1
!= VOIDmode
10623 && (bitpos
% bitsize
) == 0
10624 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
10625 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10627 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10631 op0
= offset_address (op0
, offset_rtx
,
10632 highest_pow2_factor (offset
));
10635 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10636 record its alignment as BIGGEST_ALIGNMENT. */
10637 if (MEM_P (op0
) && bitpos
== 0 && offset
!= 0
10638 && is_aligning_offset (offset
, tem
))
10639 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10641 /* Don't forget about volatility even if this is a bitfield. */
10642 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10644 if (op0
== orig_op0
)
10645 op0
= copy_rtx (op0
);
10647 MEM_VOLATILE_P (op0
) = 1;
10650 /* In cases where an aligned union has an unaligned object
10651 as a field, we might be extracting a BLKmode value from
10652 an integer-mode (e.g., SImode) object. Handle this case
10653 by doing the extract into an object as wide as the field
10654 (which we know to be the width of a basic mode), then
10655 storing into memory, and changing the mode to BLKmode. */
10656 if (mode1
== VOIDmode
10657 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10658 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10659 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10660 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10661 && modifier
!= EXPAND_CONST_ADDRESS
10662 && modifier
!= EXPAND_INITIALIZER
10663 && modifier
!= EXPAND_MEMORY
)
10664 /* If the bitfield is volatile and the bitsize
10665 is narrower than the access size of the bitfield,
10666 we need to extract bitfields from the access. */
10667 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10668 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10669 && mode1
!= BLKmode
10670 && bitsize
< GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
)
10671 /* If the field isn't aligned enough to fetch as a memref,
10672 fetch it as a bit field. */
10673 || (mode1
!= BLKmode
10675 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10676 || (bitpos
% GET_MODE_ALIGNMENT (mode1
) != 0)
10677 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10678 || (bitpos
% GET_MODE_ALIGNMENT (mode
) != 0))
10679 && modifier
!= EXPAND_MEMORY
10680 && ((modifier
== EXPAND_CONST_ADDRESS
10681 || modifier
== EXPAND_INITIALIZER
)
10683 : SLOW_UNALIGNED_ACCESS (mode1
, MEM_ALIGN (op0
))))
10684 || (bitpos
% BITS_PER_UNIT
!= 0)))
10685 /* If the type and the field are a constant size and the
10686 size of the type isn't the same size as the bitfield,
10687 we must use bitfield operations. */
10689 && TYPE_SIZE (TREE_TYPE (exp
))
10690 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
10691 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)),
10694 machine_mode ext_mode
= mode
;
10696 if (ext_mode
== BLKmode
10697 && ! (target
!= 0 && MEM_P (op0
)
10699 && bitpos
% BITS_PER_UNIT
== 0))
10700 ext_mode
= mode_for_size (bitsize
, MODE_INT
, 1);
10702 if (ext_mode
== BLKmode
)
10705 target
= assign_temp (type
, 1, 1);
10707 /* ??? Unlike the similar test a few lines below, this one is
10708 very likely obsolete. */
10712 /* In this case, BITPOS must start at a byte boundary and
10713 TARGET, if specified, must be a MEM. */
10714 gcc_assert (MEM_P (op0
)
10715 && (!target
|| MEM_P (target
))
10716 && !(bitpos
% BITS_PER_UNIT
));
10718 emit_block_move (target
,
10719 adjust_address (op0
, VOIDmode
,
10720 bitpos
/ BITS_PER_UNIT
),
10721 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
10723 (modifier
== EXPAND_STACK_PARM
10724 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10729 /* If we have nothing to extract, the result will be 0 for targets
10730 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10731 return 0 for the sake of consistency, as reading a zero-sized
10732 bitfield is valid in Ada and the value is fully specified. */
10736 op0
= validize_mem (op0
);
10738 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10739 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10741 /* If the result has a record type and the extraction is done in
10742 an integral mode, then the field may be not aligned on a byte
10743 boundary; in this case, if it has reverse storage order, it
10744 needs to be extracted as a scalar field with reverse storage
10745 order and put back into memory order afterwards. */
10746 if (TREE_CODE (type
) == RECORD_TYPE
10747 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10748 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10750 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10751 (modifier
== EXPAND_STACK_PARM
10752 ? NULL_RTX
: target
),
10753 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10755 /* If the result has a record type and the mode of OP0 is an
10756 integral mode then, if BITSIZE is narrower than this mode
10757 and this is for big-endian data, we must put the field
10758 into the high-order bits. And we must also put it back
10759 into memory order if it has been previously reversed. */
10760 scalar_int_mode op0_mode
;
10761 if (TREE_CODE (type
) == RECORD_TYPE
10762 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10764 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10767 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10768 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10769 size
- bitsize
, op0
, 1);
10772 op0
= flip_storage_order (op0_mode
, op0
);
10775 /* If the result type is BLKmode, store the data into a temporary
10776 of the appropriate type, but with the mode corresponding to the
10777 mode for the data we have (op0's mode). */
10778 if (mode
== BLKmode
)
10781 = assign_stack_temp_for_type (ext_mode
,
10782 GET_MODE_BITSIZE (ext_mode
),
10784 emit_move_insn (new_rtx
, op0
);
10785 op0
= copy_rtx (new_rtx
);
10786 PUT_MODE (op0
, BLKmode
);
10792 /* If the result is BLKmode, use that to access the object
10794 if (mode
== BLKmode
)
10797 /* Get a reference to just this component. */
10798 if (modifier
== EXPAND_CONST_ADDRESS
10799 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10800 op0
= adjust_address_nv (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10802 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10804 if (op0
== orig_op0
)
10805 op0
= copy_rtx (op0
);
10807 /* Don't set memory attributes if the base expression is
10808 SSA_NAME that got expanded as a MEM. In that case, we should
10809 just honor its original memory attributes. */
10810 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10811 set_mem_attributes (op0
, exp
, 0);
10813 if (REG_P (XEXP (op0
, 0)))
10814 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10816 /* If op0 is a temporary because the original expressions was forced
10817 to memory, clear MEM_EXPR so that the original expression cannot
10818 be marked as addressable through MEM_EXPR of the temporary. */
10819 if (clear_mem_expr
)
10820 set_mem_expr (op0
, NULL_TREE
);
10822 MEM_VOLATILE_P (op0
) |= volatilep
;
10825 && modifier
!= EXPAND_MEMORY
10826 && modifier
!= EXPAND_WRITE
)
10827 op0
= flip_storage_order (mode1
, op0
);
10829 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10830 || modifier
== EXPAND_CONST_ADDRESS
10831 || modifier
== EXPAND_INITIALIZER
)
10835 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10837 convert_move (target
, op0
, unsignedp
);
10842 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10845 /* All valid uses of __builtin_va_arg_pack () are removed during
10847 if (CALL_EXPR_VA_ARG_PACK (exp
))
10848 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10850 tree fndecl
= get_callee_fndecl (exp
), attr
;
10853 && (attr
= lookup_attribute ("error",
10854 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10855 error ("%Kcall to %qs declared with attribute error: %s",
10856 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10857 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10859 && (attr
= lookup_attribute ("warning",
10860 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10861 warning_at (tree_nonartificial_location (exp
),
10862 0, "%Kcall to %qs declared with attribute warning: %s",
10863 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10864 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10866 /* Check for a built-in function. */
10867 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10869 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10870 if (CALL_WITH_BOUNDS_P (exp
))
10871 return expand_builtin_with_bounds (exp
, target
, subtarget
,
10874 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10877 return expand_call (exp
, target
, ignore
);
10879 case VIEW_CONVERT_EXPR
:
10882 /* If we are converting to BLKmode, try to avoid an intermediate
10883 temporary by fetching an inner memory reference. */
10884 if (mode
== BLKmode
10885 && TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
10886 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10887 && handled_component_p (treeop0
))
10889 machine_mode mode1
;
10890 HOST_WIDE_INT bitsize
, bitpos
;
10892 int unsignedp
, reversep
, volatilep
= 0;
10894 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10895 &unsignedp
, &reversep
, &volatilep
);
10898 /* ??? We should work harder and deal with non-zero offsets. */
10900 && (bitpos
% BITS_PER_UNIT
) == 0
10903 && compare_tree_int (TYPE_SIZE (type
), bitsize
) == 0)
10905 /* See the normal_inner_ref case for the rationale. */
10907 = expand_expr_real (tem
,
10908 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10909 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10911 && modifier
!= EXPAND_STACK_PARM
10912 ? target
: NULL_RTX
),
10914 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10917 if (MEM_P (orig_op0
))
10921 /* Get a reference to just this component. */
10922 if (modifier
== EXPAND_CONST_ADDRESS
10923 || modifier
== EXPAND_SUM
10924 || modifier
== EXPAND_INITIALIZER
)
10925 op0
= adjust_address_nv (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10927 op0
= adjust_address (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10929 if (op0
== orig_op0
)
10930 op0
= copy_rtx (op0
);
10932 set_mem_attributes (op0
, treeop0
, 0);
10933 if (REG_P (XEXP (op0
, 0)))
10934 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10936 MEM_VOLATILE_P (op0
) |= volatilep
;
10942 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
10943 NULL
, inner_reference_p
);
10945 /* If the input and output modes are both the same, we are done. */
10946 if (mode
== GET_MODE (op0
))
10948 /* If neither mode is BLKmode, and both modes are the same size
10949 then we can use gen_lowpart. */
10950 else if (mode
!= BLKmode
&& GET_MODE (op0
) != BLKmode
10951 && (GET_MODE_PRECISION (mode
)
10952 == GET_MODE_PRECISION (GET_MODE (op0
)))
10953 && !COMPLEX_MODE_P (GET_MODE (op0
)))
10955 if (GET_CODE (op0
) == SUBREG
)
10956 op0
= force_reg (GET_MODE (op0
), op0
);
10957 temp
= gen_lowpart_common (mode
, op0
);
10962 if (!REG_P (op0
) && !MEM_P (op0
))
10963 op0
= force_reg (GET_MODE (op0
), op0
);
10964 op0
= gen_lowpart (mode
, op0
);
10967 /* If both types are integral, convert from one mode to the other. */
10968 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
10969 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
10970 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10971 /* If the output type is a bit-field type, do an extraction. */
10972 else if (reduce_bit_field
)
10973 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
10974 TYPE_UNSIGNED (type
), NULL_RTX
,
10975 mode
, mode
, false, NULL
);
10976 /* As a last resort, spill op0 to memory, and reload it in a
10978 else if (!MEM_P (op0
))
10980 /* If the operand is not a MEM, force it into memory. Since we
10981 are going to be changing the mode of the MEM, don't call
10982 force_const_mem for constants because we don't allow pool
10983 constants to change mode. */
10984 tree inner_type
= TREE_TYPE (treeop0
);
10986 gcc_assert (!TREE_ADDRESSABLE (exp
));
10988 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
10990 = assign_stack_temp_for_type
10991 (TYPE_MODE (inner_type
),
10992 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
10994 emit_move_insn (target
, op0
);
10998 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10999 output type is such that the operand is known to be aligned, indicate
11000 that it is. Otherwise, we need only be concerned about alignment for
11001 non-BLKmode results. */
11004 enum insn_code icode
;
11006 if (modifier
!= EXPAND_WRITE
11007 && modifier
!= EXPAND_MEMORY
11008 && !inner_reference_p
11010 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11012 /* If the target does have special handling for unaligned
11013 loads of mode then use them. */
11014 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11015 != CODE_FOR_nothing
)
11019 op0
= adjust_address (op0
, mode
, 0);
11020 /* We've already validated the memory, and we're creating a
11021 new pseudo destination. The predicates really can't
11023 reg
= gen_reg_rtx (mode
);
11025 /* Nor can the insn generator. */
11026 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11030 else if (STRICT_ALIGNMENT
)
11032 tree inner_type
= TREE_TYPE (treeop0
);
11033 HOST_WIDE_INT temp_size
11034 = MAX (int_size_in_bytes (inner_type
),
11035 (HOST_WIDE_INT
) GET_MODE_SIZE (mode
));
11037 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11038 rtx new_with_op0_mode
11039 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11041 gcc_assert (!TREE_ADDRESSABLE (exp
));
11043 if (GET_MODE (op0
) == BLKmode
)
11044 emit_block_move (new_with_op0_mode
, op0
,
11045 GEN_INT (GET_MODE_SIZE (mode
)),
11046 (modifier
== EXPAND_STACK_PARM
11047 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11049 emit_move_insn (new_with_op0_mode
, op0
);
11055 op0
= adjust_address (op0
, mode
, 0);
11062 tree lhs
= treeop0
;
11063 tree rhs
= treeop1
;
11064 gcc_assert (ignore
);
11066 /* Check for |= or &= of a bitfield of size one into another bitfield
11067 of size 1. In this case, (unless we need the result of the
11068 assignment) we can do this more efficiently with a
11069 test followed by an assignment, if necessary.
11071 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11072 things change so we do, this code should be enhanced to
11074 if (TREE_CODE (lhs
) == COMPONENT_REF
11075 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11076 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11077 && TREE_OPERAND (rhs
, 0) == lhs
11078 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11079 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11080 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11082 rtx_code_label
*label
= gen_label_rtx ();
11083 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11084 do_jump (TREE_OPERAND (rhs
, 1),
11087 profile_probability::uninitialized ());
11088 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11090 do_pending_stack_adjust ();
11091 emit_label (label
);
11095 expand_assignment (lhs
, rhs
, false);
11100 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11102 case REALPART_EXPR
:
11103 op0
= expand_normal (treeop0
);
11104 return read_complex_part (op0
, false);
11106 case IMAGPART_EXPR
:
11107 op0
= expand_normal (treeop0
);
11108 return read_complex_part (op0
, true);
11115 /* Expanded in cfgexpand.c. */
11116 gcc_unreachable ();
11118 case TRY_CATCH_EXPR
:
11120 case EH_FILTER_EXPR
:
11121 case TRY_FINALLY_EXPR
:
11122 /* Lowered by tree-eh.c. */
11123 gcc_unreachable ();
11125 case WITH_CLEANUP_EXPR
:
11126 case CLEANUP_POINT_EXPR
:
11128 case CASE_LABEL_EXPR
:
11133 case COMPOUND_EXPR
:
11134 case PREINCREMENT_EXPR
:
11135 case PREDECREMENT_EXPR
:
11136 case POSTINCREMENT_EXPR
:
11137 case POSTDECREMENT_EXPR
:
11140 case COMPOUND_LITERAL_EXPR
:
11141 /* Lowered by gimplify.c. */
11142 gcc_unreachable ();
11145 /* Function descriptors are not valid except for as
11146 initialization constants, and should not be expanded. */
11147 gcc_unreachable ();
11149 case WITH_SIZE_EXPR
:
11150 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11151 have pulled out the size to use in whatever context it needed. */
11152 return expand_expr_real (treeop0
, original_target
, tmode
,
11153 modifier
, alt_rtl
, inner_reference_p
);
11156 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11160 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11161 signedness of TYPE), possibly returning the result in TARGET.
11162 TYPE is known to be a partial integer type. */
11164 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11166 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11167 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11169 /* For constant values, reduce using build_int_cst_type. */
11170 if (CONST_INT_P (exp
))
11172 HOST_WIDE_INT value
= INTVAL (exp
);
11173 tree t
= build_int_cst_type (type
, value
);
11174 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11176 else if (TYPE_UNSIGNED (type
))
11178 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11179 rtx mask
= immed_wide_int_const
11180 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11181 return expand_and (mode
, exp
, mask
, target
);
11185 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11186 int count
= GET_MODE_PRECISION (mode
) - prec
;
11187 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11188 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11192 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11193 when applied to the address of EXP produces an address known to be
11194 aligned more than BIGGEST_ALIGNMENT. */
11197 is_aligning_offset (const_tree offset
, const_tree exp
)
11199 /* Strip off any conversions. */
11200 while (CONVERT_EXPR_P (offset
))
11201 offset
= TREE_OPERAND (offset
, 0);
11203 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11204 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11205 if (TREE_CODE (offset
) != BIT_AND_EXPR
11206 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11207 || compare_tree_int (TREE_OPERAND (offset
, 1),
11208 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11209 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11212 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11213 It must be NEGATE_EXPR. Then strip any more conversions. */
11214 offset
= TREE_OPERAND (offset
, 0);
11215 while (CONVERT_EXPR_P (offset
))
11216 offset
= TREE_OPERAND (offset
, 0);
11218 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11221 offset
= TREE_OPERAND (offset
, 0);
11222 while (CONVERT_EXPR_P (offset
))
11223 offset
= TREE_OPERAND (offset
, 0);
11225 /* This must now be the address of EXP. */
11226 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11229 /* Return the tree node if an ARG corresponds to a string constant or zero
11230 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11231 in bytes within the string that ARG is accessing. The type of the
11232 offset will be `sizetype'. */
11235 string_constant (tree arg
, tree
*ptr_offset
)
11237 tree array
, offset
, lower_bound
;
11240 if (TREE_CODE (arg
) == ADDR_EXPR
)
11242 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11244 *ptr_offset
= size_zero_node
;
11245 return TREE_OPERAND (arg
, 0);
11247 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11249 array
= TREE_OPERAND (arg
, 0);
11250 offset
= size_zero_node
;
11252 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11254 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11255 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11256 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11259 /* Check if the array has a nonzero lower bound. */
11260 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11261 if (!integer_zerop (lower_bound
))
11263 /* If the offset and base aren't both constants, return 0. */
11264 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11266 if (TREE_CODE (offset
) != INTEGER_CST
)
11268 /* Adjust offset by the lower bound. */
11269 offset
= size_diffop (fold_convert (sizetype
, offset
),
11270 fold_convert (sizetype
, lower_bound
));
11273 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11275 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11276 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11277 if (TREE_CODE (array
) != ADDR_EXPR
)
11279 array
= TREE_OPERAND (array
, 0);
11280 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11286 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11288 tree arg0
= TREE_OPERAND (arg
, 0);
11289 tree arg1
= TREE_OPERAND (arg
, 1);
11294 if (TREE_CODE (arg0
) == ADDR_EXPR
11295 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11296 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11298 array
= TREE_OPERAND (arg0
, 0);
11301 else if (TREE_CODE (arg1
) == ADDR_EXPR
11302 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11303 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11305 array
= TREE_OPERAND (arg1
, 0);
11314 if (TREE_CODE (array
) == STRING_CST
)
11316 *ptr_offset
= fold_convert (sizetype
, offset
);
11319 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11322 tree init
= ctor_for_folding (array
);
11324 /* Variables initialized to string literals can be handled too. */
11325 if (init
== error_mark_node
11327 || TREE_CODE (init
) != STRING_CST
)
11330 /* Avoid const char foo[4] = "abcde"; */
11331 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11332 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11333 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11334 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11337 /* If variable is bigger than the string literal, OFFSET must be constant
11338 and inside of the bounds of the string literal. */
11339 offset
= fold_convert (sizetype
, offset
);
11340 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11341 && (! tree_fits_uhwi_p (offset
)
11342 || compare_tree_int (offset
, length
) >= 0))
11345 *ptr_offset
= offset
;
11352 /* Generate code to calculate OPS, and exploded expression
11353 using a store-flag instruction and return an rtx for the result.
11354 OPS reflects a comparison.
11356 If TARGET is nonzero, store the result there if convenient.
11358 Return zero if there is no suitable set-flag instruction
11359 available on this machine.
11361 Once expand_expr has been called on the arguments of the comparison,
11362 we are committed to doing the store flag, since it is not safe to
11363 re-evaluate the expression. We emit the store-flag insn by calling
11364 emit_store_flag, but only expand the arguments if we have a reason
11365 to believe that emit_store_flag will be successful. If we think that
11366 it will, but it isn't, we have to simulate the store-flag with a
11367 set/jump/set sequence. */
11370 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11372 enum rtx_code code
;
11373 tree arg0
, arg1
, type
;
11374 machine_mode operand_mode
;
11377 rtx subtarget
= target
;
11378 location_t loc
= ops
->location
;
11383 /* Don't crash if the comparison was erroneous. */
11384 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11387 type
= TREE_TYPE (arg0
);
11388 operand_mode
= TYPE_MODE (type
);
11389 unsignedp
= TYPE_UNSIGNED (type
);
11391 /* We won't bother with BLKmode store-flag operations because it would mean
11392 passing a lot of information to emit_store_flag. */
11393 if (operand_mode
== BLKmode
)
11396 /* We won't bother with store-flag operations involving function pointers
11397 when function pointers must be canonicalized before comparisons. */
11398 if (targetm
.have_canonicalize_funcptr_for_compare ()
11399 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11400 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11402 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11403 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11404 == FUNCTION_TYPE
))))
11410 /* For vector typed comparisons emit code to generate the desired
11411 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11412 expander for this. */
11413 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11415 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11416 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11417 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11418 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11421 tree if_true
= constant_boolean_node (true, ops
->type
);
11422 tree if_false
= constant_boolean_node (false, ops
->type
);
11423 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11428 /* Get the rtx comparison code to use. We know that EXP is a comparison
11429 operation of some type. Some comparisons against 1 and -1 can be
11430 converted to comparisons with zero. Do so here so that the tests
11431 below will be aware that we have a comparison with zero. These
11432 tests will not catch constants in the first operand, but constants
11433 are rarely passed as the first operand. */
11444 if (integer_onep (arg1
))
11445 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11447 code
= unsignedp
? LTU
: LT
;
11450 if (! unsignedp
&& integer_all_onesp (arg1
))
11451 arg1
= integer_zero_node
, code
= LT
;
11453 code
= unsignedp
? LEU
: LE
;
11456 if (! unsignedp
&& integer_all_onesp (arg1
))
11457 arg1
= integer_zero_node
, code
= GE
;
11459 code
= unsignedp
? GTU
: GT
;
11462 if (integer_onep (arg1
))
11463 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11465 code
= unsignedp
? GEU
: GE
;
11468 case UNORDERED_EXPR
:
11494 gcc_unreachable ();
11497 /* Put a constant second. */
11498 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11499 || TREE_CODE (arg0
) == FIXED_CST
)
11501 std::swap (arg0
, arg1
);
11502 code
= swap_condition (code
);
11505 /* If this is an equality or inequality test of a single bit, we can
11506 do this by shifting the bit being tested to the low-order bit and
11507 masking the result with the constant 1. If the condition was EQ,
11508 we xor it with 1. This does not require an scc insn and is faster
11509 than an scc insn even if we have it.
11511 The code to make this transformation was moved into fold_single_bit_test,
11512 so we just call into the folder and expand its result. */
11514 if ((code
== NE
|| code
== EQ
)
11515 && integer_zerop (arg1
)
11516 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11518 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11520 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11522 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11523 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11524 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11525 gimple_assign_rhs1 (srcstmt
),
11526 gimple_assign_rhs2 (srcstmt
));
11527 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11529 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11533 if (! get_subtarget (target
)
11534 || GET_MODE (subtarget
) != operand_mode
)
11537 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11540 target
= gen_reg_rtx (mode
);
11542 /* Try a cstore if possible. */
11543 return emit_store_flag_force (target
, code
, op0
, op1
,
11544 operand_mode
, unsignedp
,
11545 (TYPE_PRECISION (ops
->type
) == 1
11546 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11549 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11550 0 otherwise (i.e. if there is no casesi instruction).
11552 DEFAULT_PROBABILITY is the probability of jumping to the default
11555 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11556 rtx table_label
, rtx default_label
, rtx fallback_label
,
11557 profile_probability default_probability
)
11559 struct expand_operand ops
[5];
11560 scalar_int_mode index_mode
= SImode
;
11561 rtx op1
, op2
, index
;
11563 if (! targetm
.have_casesi ())
11566 /* The index must be some form of integer. Convert it to SImode. */
11567 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11568 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11570 rtx rangertx
= expand_normal (range
);
11572 /* We must handle the endpoints in the original mode. */
11573 index_expr
= build2 (MINUS_EXPR
, index_type
,
11574 index_expr
, minval
);
11575 minval
= integer_zero_node
;
11576 index
= expand_normal (index_expr
);
11578 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11579 omode
, 1, default_label
,
11580 default_probability
);
11581 /* Now we can safely truncate. */
11582 index
= convert_to_mode (index_mode
, index
, 0);
11586 if (omode
!= index_mode
)
11588 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11589 index_expr
= fold_convert (index_type
, index_expr
);
11592 index
= expand_normal (index_expr
);
11595 do_pending_stack_adjust ();
11597 op1
= expand_normal (minval
);
11598 op2
= expand_normal (range
);
11600 create_input_operand (&ops
[0], index
, index_mode
);
11601 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11602 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11603 create_fixed_operand (&ops
[3], table_label
);
11604 create_fixed_operand (&ops
[4], (default_label
11606 : fallback_label
));
11607 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11611 /* Attempt to generate a tablejump instruction; same concept. */
11612 /* Subroutine of the next function.
11614 INDEX is the value being switched on, with the lowest value
11615 in the table already subtracted.
11616 MODE is its expected mode (needed if INDEX is constant).
11617 RANGE is the length of the jump table.
11618 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11620 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11621 index value is out of range.
11622 DEFAULT_PROBABILITY is the probability of jumping to
11623 the default label. */
11626 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11627 rtx default_label
, profile_probability default_probability
)
11631 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11632 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11634 /* Do an unsigned comparison (in the proper mode) between the index
11635 expression and the value which represents the length of the range.
11636 Since we just finished subtracting the lower bound of the range
11637 from the index expression, this comparison allows us to simultaneously
11638 check that the original index expression value is both greater than
11639 or equal to the minimum value of the range and less than or equal to
11640 the maximum value of the range. */
11643 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11644 default_label
, default_probability
);
11647 /* If index is in range, it must fit in Pmode.
11648 Convert to Pmode so we can index with it. */
11650 index
= convert_to_mode (Pmode
, index
, 1);
11652 /* Don't let a MEM slip through, because then INDEX that comes
11653 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11654 and break_out_memory_refs will go to work on it and mess it up. */
11655 #ifdef PIC_CASE_VECTOR_ADDRESS
11656 if (flag_pic
&& !REG_P (index
))
11657 index
= copy_to_mode_reg (Pmode
, index
);
11660 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11661 GET_MODE_SIZE, because this indicates how large insns are. The other
11662 uses should all be Pmode, because they are addresses. This code
11663 could fail if addresses and insns are not the same size. */
11664 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11665 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11667 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11668 gen_rtx_LABEL_REF (Pmode
, table_label
));
11670 #ifdef PIC_CASE_VECTOR_ADDRESS
11672 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11675 index
= memory_address (CASE_VECTOR_MODE
, index
);
11676 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11677 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11678 convert_move (temp
, vector
, 0);
11680 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11682 /* If we are generating PIC code or if the table is PC-relative, the
11683 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11684 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11689 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11690 rtx table_label
, rtx default_label
,
11691 profile_probability default_probability
)
11695 if (! targetm
.have_tablejump ())
11698 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11699 fold_convert (index_type
, index_expr
),
11700 fold_convert (index_type
, minval
));
11701 index
= expand_normal (index_expr
);
11702 do_pending_stack_adjust ();
11704 do_tablejump (index
, TYPE_MODE (index_type
),
11705 convert_modes (TYPE_MODE (index_type
),
11706 TYPE_MODE (TREE_TYPE (range
)),
11707 expand_normal (range
),
11708 TYPE_UNSIGNED (TREE_TYPE (range
))),
11709 table_label
, default_label
, default_probability
);
11713 /* Return a CONST_VECTOR rtx representing vector mask for
11714 a VECTOR_CST of booleans. */
11716 const_vector_mask_from_tree (tree exp
)
11722 machine_mode inner
, mode
;
11724 mode
= TYPE_MODE (TREE_TYPE (exp
));
11725 units
= GET_MODE_NUNITS (mode
);
11726 inner
= GET_MODE_INNER (mode
);
11728 v
= rtvec_alloc (units
);
11730 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11732 elt
= VECTOR_CST_ELT (exp
, i
);
11734 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11735 if (integer_zerop (elt
))
11736 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
11737 else if (integer_onep (elt
)
11738 || integer_minus_onep (elt
))
11739 RTVEC_ELT (v
, i
) = CONSTM1_RTX (inner
);
11741 gcc_unreachable ();
11744 return gen_rtx_CONST_VECTOR (mode
, v
);
11747 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11748 Return a constant scalar rtx of mode MODE in which bit X is set if element
11749 X of EXP is nonzero. */
11751 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11753 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11757 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11759 elt
= VECTOR_CST_ELT (exp
, i
);
11760 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11761 if (integer_all_onesp (elt
))
11762 res
= wi::set_bit (res
, i
);
11764 gcc_assert (integer_zerop (elt
));
11767 return immed_wide_int_const (res
, mode
);
11770 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11772 const_vector_from_tree (tree exp
)
11778 machine_mode inner
, mode
;
11780 mode
= TYPE_MODE (TREE_TYPE (exp
));
11782 if (initializer_zerop (exp
))
11783 return CONST0_RTX (mode
);
11785 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11786 return const_vector_mask_from_tree (exp
);
11788 units
= GET_MODE_NUNITS (mode
);
11789 inner
= GET_MODE_INNER (mode
);
11791 v
= rtvec_alloc (units
);
11793 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11795 elt
= VECTOR_CST_ELT (exp
, i
);
11797 if (TREE_CODE (elt
) == REAL_CST
)
11798 RTVEC_ELT (v
, i
) = const_double_from_real_value (TREE_REAL_CST (elt
),
11800 else if (TREE_CODE (elt
) == FIXED_CST
)
11801 RTVEC_ELT (v
, i
) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11804 RTVEC_ELT (v
, i
) = immed_wide_int_const (elt
, inner
);
11807 return gen_rtx_CONST_VECTOR (mode
, v
);
11810 /* Build a decl for a personality function given a language prefix. */
11813 build_personality_function (const char *lang
)
11815 const char *unwind_and_version
;
11819 switch (targetm_common
.except_unwind_info (&global_options
))
11824 unwind_and_version
= "_sj0";
11828 unwind_and_version
= "_v0";
11831 unwind_and_version
= "_seh0";
11834 gcc_unreachable ();
11837 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11839 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11840 long_long_unsigned_type_node
,
11841 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11842 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11843 get_identifier (name
), type
);
11844 DECL_ARTIFICIAL (decl
) = 1;
11845 DECL_EXTERNAL (decl
) = 1;
11846 TREE_PUBLIC (decl
) = 1;
11848 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11849 are the flags assigned by targetm.encode_section_info. */
11850 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11855 /* Extracts the personality function of DECL and returns the corresponding
11859 get_personality_function (tree decl
)
11861 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11862 enum eh_personality_kind pk
;
11864 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11865 if (pk
== eh_personality_none
)
11869 && pk
== eh_personality_any
)
11870 personality
= lang_hooks
.eh_personality ();
11872 if (pk
== eh_personality_lang
)
11873 gcc_assert (personality
!= NULL_TREE
);
11875 return XEXP (DECL_RTL (personality
), 0);
11878 /* Returns a tree for the size of EXP in bytes. */
11881 tree_expr_size (const_tree exp
)
11884 && DECL_SIZE_UNIT (exp
) != 0)
11885 return DECL_SIZE_UNIT (exp
);
11887 return size_in_bytes (TREE_TYPE (exp
));
11890 /* Return an rtx for the size in bytes of the value of EXP. */
11893 expr_size (tree exp
)
11897 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11898 size
= TREE_OPERAND (exp
, 1);
11901 size
= tree_expr_size (exp
);
11903 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
11906 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
11909 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11910 if the size can vary or is larger than an integer. */
11912 static HOST_WIDE_INT
11913 int_expr_size (tree exp
)
11917 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11918 size
= TREE_OPERAND (exp
, 1);
11921 size
= tree_expr_size (exp
);
11925 if (size
== 0 || !tree_fits_shwi_p (size
))
11928 return tree_to_shwi (size
);