1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This pass converts stack-like registers from the "flat register
24 file" model that gcc uses, to a stack convention that the 387 uses.
26 * The form of the input:
28 On input, the function consists of insn that have had their
29 registers fully allocated to a set of "virtual" registers. Note that
30 the word "virtual" is used differently here than elsewhere in gcc: for
31 each virtual stack reg, there is a hard reg, but the mapping between
32 them is not known until this pass is run. On output, hard register
33 numbers have been substituted, and various pop and exchange insns have
34 been emitted. The hard register numbers and the virtual register
35 numbers completely overlap - before this pass, all stack register
36 numbers are virtual, and afterward they are all hard.
38 The virtual registers can be manipulated normally by gcc, and their
39 semantics are the same as for normal registers. After the hard
40 register numbers are substituted, the semantics of an insn containing
41 stack-like regs are not the same as for an insn with normal regs: for
42 instance, it is not safe to delete an insn that appears to be a no-op
43 move. In general, no insn containing hard regs should be changed
44 after this pass is done.
46 * The form of the output:
48 After this pass, hard register numbers represent the distance from
49 the current top of stack to the desired register. A reference to
50 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
51 represents the register just below that, and so forth. Also, REG_DEAD
52 notes indicate whether or not a stack register should be popped.
54 A "swap" insn looks like a parallel of two patterns, where each
55 pattern is a SET: one sets A to B, the other B to A.
57 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
58 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
59 will replace the existing stack top, not push a new value.
61 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
62 SET_SRC is REG or MEM.
64 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
65 appears ambiguous. As a special case, the presence of a REG_DEAD note
66 for FIRST_STACK_REG differentiates between a load insn and a pop.
68 If a REG_DEAD is present, the insn represents a "pop" that discards
69 the top of the register stack. If there is no REG_DEAD note, then the
70 insn represents a "dup" or a push of the current top of stack onto the
75 Existing REG_DEAD and REG_UNUSED notes for stack registers are
76 deleted and recreated from scratch. REG_DEAD is never created for a
77 SET_DEST, only REG_UNUSED.
81 There are several rules on the usage of stack-like regs in
82 asm_operands insns. These rules apply only to the operands that are
85 1. Given a set of input regs that die in an asm_operands, it is
86 necessary to know which are implicitly popped by the asm, and
87 which must be explicitly popped by gcc.
89 An input reg that is implicitly popped by the asm must be
90 explicitly clobbered, unless it is constrained to match an
93 2. For any input reg that is implicitly popped by an asm, it is
94 necessary to know how to adjust the stack to compensate for the pop.
95 If any non-popped input is closer to the top of the reg-stack than
96 the implicitly popped reg, it would not be possible to know what the
97 stack looked like - it's not clear how the rest of the stack "slides
100 All implicitly popped input regs must be closer to the top of
101 the reg-stack than any input that is not implicitly popped.
103 3. It is possible that if an input dies in an insn, reload might
104 use the input reg for an output reload. Consider this example:
106 asm ("foo" : "=t" (a) : "f" (b));
108 This asm says that input B is not popped by the asm, and that
109 the asm pushes a result onto the reg-stack, i.e., the stack is one
110 deeper after the asm than it was before. But, it is possible that
111 reload will think that it can use the same reg for both the input and
112 the output, if input B dies in this insn.
114 If any input operand uses the "f" constraint, all output reg
115 constraints must use the "&" earlyclobber.
117 The asm above would be written as
119 asm ("foo" : "=&t" (a) : "f" (b));
121 4. Some operands need to be in particular places on the stack. All
122 output operands fall in this category - there is no other way to
123 know which regs the outputs appear in unless the user indicates
124 this in the constraints.
126 Output operands must specifically indicate which reg an output
127 appears in after an asm. "=f" is not allowed: the operand
128 constraints must select a class with a single reg.
130 5. Output operands may not be "inserted" between existing stack regs.
131 Since no 387 opcode uses a read/write operand, all output operands
132 are dead before the asm_operands, and are pushed by the asm_operands.
133 It makes no sense to push anywhere but the top of the reg-stack.
135 Output operands must start at the top of the reg-stack: output
136 operands may not "skip" a reg.
138 6. Some asm statements may need extra stack space for internal
139 calculations. This can be guaranteed by clobbering stack registers
140 unrelated to the inputs and outputs.
142 Here are a couple of reasonable asms to want to write. This asm
143 takes one input, which is internally popped, and produces two outputs.
145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
147 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
148 and replaces them with one output. The user must code the "st(1)"
149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
157 #include "coretypes.h"
162 #include "function.h"
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #include "basic-block.h"
171 #include "cfglayout.h"
176 #include "tree-pass.h"
183 /* We use this array to cache info about insns, because otherwise we
184 spend too much time in stack_regs_mentioned_p.
186 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
187 the insn uses stack registers, two indicates the insn does not use
189 static VEC(char,heap
) *stack_regs_mentioned_data
;
191 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
193 int regstack_completed
= 0;
195 /* This is the basic stack record. TOP is an index into REG[] such
196 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
198 If TOP is -2, REG[] is not yet initialized. Stack initialization
199 consists of placing each live reg in array `reg' and setting `top'
202 REG_SET indicates which registers are live. */
204 typedef struct stack_def
206 int top
; /* index to top stack element */
207 HARD_REG_SET reg_set
; /* set of live registers */
208 unsigned char reg
[REG_STACK_SIZE
];/* register - stack mapping */
211 /* This is used to carry information about basic blocks. It is
212 attached to the AUX field of the standard CFG block. */
214 typedef struct block_info_def
216 struct stack_def stack_in
; /* Input stack configuration. */
217 struct stack_def stack_out
; /* Output stack configuration. */
218 HARD_REG_SET out_reg_set
; /* Stack regs live on output. */
219 int done
; /* True if block already converted. */
220 int predecessors
; /* Number of predecessors that need
224 #define BLOCK_INFO(B) ((block_info) (B)->aux)
226 /* Passed to change_stack to indicate where to emit insns. */
233 /* The block we're currently working on. */
234 static basic_block current_block
;
236 /* In the current_block, whether we're processing the first register
237 stack or call instruction, i.e. the regstack is currently the
238 same as BLOCK_INFO(current_block)->stack_in. */
239 static bool starting_stack_p
;
241 /* This is the register file for all register after conversion. */
243 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
245 #define FP_MODE_REG(regno,mode) \
246 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
248 /* Used to initialize uninitialized registers. */
249 static rtx not_a_num
;
251 /* Forward declarations */
253 static int stack_regs_mentioned_p (rtx pat
);
254 static void pop_stack (stack
, int);
255 static rtx
*get_true_reg (rtx
*);
257 static int check_asm_stack_operands (rtx
);
258 static int get_asm_operand_n_inputs (rtx
);
259 static rtx
stack_result (tree
);
260 static void replace_reg (rtx
*, int);
261 static void remove_regno_note (rtx
, enum reg_note
, unsigned int);
262 static int get_hard_regnum (stack
, rtx
);
263 static rtx
emit_pop_insn (rtx
, stack
, rtx
, enum emit_where
);
264 static void swap_to_top(rtx
, stack
, rtx
, rtx
);
265 static bool move_for_stack_reg (rtx
, stack
, rtx
);
266 static bool move_nan_for_stack_reg (rtx
, stack
, rtx
);
267 static int swap_rtx_condition_1 (rtx
);
268 static int swap_rtx_condition (rtx
);
269 static void compare_for_stack_reg (rtx
, stack
, rtx
);
270 static bool subst_stack_regs_pat (rtx
, stack
, rtx
);
271 static void subst_asm_stack_regs (rtx
, stack
);
272 static bool subst_stack_regs (rtx
, stack
);
273 static void change_stack (rtx
, stack
, stack
, enum emit_where
);
274 static void print_stack (FILE *, stack
);
275 static rtx
next_flags_user (rtx
);
277 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
280 stack_regs_mentioned_p (rtx pat
)
285 if (STACK_REG_P (pat
))
288 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
289 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
295 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
296 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
299 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
306 /* Return nonzero if INSN mentions stacked registers, else return zero. */
309 stack_regs_mentioned (rtx insn
)
311 unsigned int uid
, max
;
314 if (! INSN_P (insn
) || !stack_regs_mentioned_data
)
317 uid
= INSN_UID (insn
);
318 max
= VEC_length (char, stack_regs_mentioned_data
);
321 /* Allocate some extra size to avoid too many reallocs, but
322 do not grow too quickly. */
323 max
= uid
+ uid
/ 20 + 1;
324 VEC_safe_grow_cleared (char, heap
, stack_regs_mentioned_data
, max
);
327 test
= VEC_index (char, stack_regs_mentioned_data
, uid
);
330 /* This insn has yet to be examined. Do so now. */
331 test
= stack_regs_mentioned_p (PATTERN (insn
)) ? 1 : 2;
332 VEC_replace (char, stack_regs_mentioned_data
, uid
, test
);
338 static rtx ix86_flags_rtx
;
341 next_flags_user (rtx insn
)
343 /* Search forward looking for the first use of this value.
344 Stop at block boundaries. */
346 while (insn
!= BB_END (current_block
))
348 insn
= NEXT_INSN (insn
);
350 if (INSN_P (insn
) && reg_mentioned_p (ix86_flags_rtx
, PATTERN (insn
)))
359 /* Reorganize the stack into ascending numbers, before this insn. */
362 straighten_stack (rtx insn
, stack regstack
)
364 struct stack_def temp_stack
;
367 /* If there is only a single register on the stack, then the stack is
368 already in increasing order and no reorganization is needed.
370 Similarly if the stack is empty. */
371 if (regstack
->top
<= 0)
374 COPY_HARD_REG_SET (temp_stack
.reg_set
, regstack
->reg_set
);
376 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
377 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
379 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
382 /* Pop a register from the stack. */
385 pop_stack (stack regstack
, int regno
)
387 int top
= regstack
->top
;
389 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
391 /* If regno was not at the top of stack then adjust stack. */
392 if (regstack
->reg
[top
] != regno
)
395 for (i
= regstack
->top
; i
>= 0; i
--)
396 if (regstack
->reg
[i
] == regno
)
399 for (j
= i
; j
< top
; j
++)
400 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
406 /* Return a pointer to the REG expression within PAT. If PAT is not a
407 REG, possible enclosed by a conversion rtx, return the inner part of
408 PAT that stopped the search. */
411 get_true_reg (rtx
*pat
)
414 switch (GET_CODE (*pat
))
417 /* Eliminate FP subregister accesses in favor of the
418 actual FP register in use. */
421 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
423 int regno_off
= subreg_regno_offset (REGNO (subreg
),
427 *pat
= FP_MODE_REG (REGNO (subreg
) + regno_off
,
435 pat
= & XEXP (*pat
, 0);
439 if (XINT (*pat
, 1) == UNSPEC_TRUNC_NOOP
)
440 pat
= & XVECEXP (*pat
, 0, 0);
444 if (!flag_unsafe_math_optimizations
)
446 pat
= & XEXP (*pat
, 0);
454 /* Set if we find any malformed asms in a block. */
455 static bool any_malformed_asm
;
457 /* There are many rules that an asm statement for stack-like regs must
458 follow. Those rules are explained at the top of this file: the rule
459 numbers below refer to that explanation. */
462 check_asm_stack_operands (rtx insn
)
466 int malformed_asm
= 0;
467 rtx body
= PATTERN (insn
);
469 char reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
470 char implicitly_dies
[FIRST_PSEUDO_REGISTER
];
473 rtx
*clobber_reg
= 0;
474 int n_inputs
, n_outputs
;
476 /* Find out what the constraints require. If no constraint
477 alternative matches, this asm is malformed. */
479 constrain_operands (1);
480 alt
= which_alternative
;
482 preprocess_constraints ();
484 n_inputs
= get_asm_operand_n_inputs (body
);
485 n_outputs
= recog_data
.n_operands
- n_inputs
;
490 /* Avoid further trouble with this insn. */
491 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
495 /* Strip SUBREGs here to make the following code simpler. */
496 for (i
= 0; i
< recog_data
.n_operands
; i
++)
497 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
498 && REG_P (SUBREG_REG (recog_data
.operand
[i
])))
499 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
501 /* Set up CLOBBER_REG. */
505 if (GET_CODE (body
) == PARALLEL
)
507 clobber_reg
= alloca (XVECLEN (body
, 0) * sizeof (rtx
));
509 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
510 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
512 rtx clobber
= XVECEXP (body
, 0, i
);
513 rtx reg
= XEXP (clobber
, 0);
515 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
516 reg
= SUBREG_REG (reg
);
518 if (STACK_REG_P (reg
))
520 clobber_reg
[n_clobbers
] = reg
;
526 /* Enforce rule #4: Output operands must specifically indicate which
527 reg an output appears in after an asm. "=f" is not allowed: the
528 operand constraints must select a class with a single reg.
530 Also enforce rule #5: Output operands must start at the top of
531 the reg-stack: output operands may not "skip" a reg. */
533 memset (reg_used_as_output
, 0, sizeof (reg_used_as_output
));
534 for (i
= 0; i
< n_outputs
; i
++)
535 if (STACK_REG_P (recog_data
.operand
[i
]))
537 if (reg_class_size
[(int) recog_op_alt
[i
][alt
].cl
] != 1)
539 error_for_asm (insn
, "output constraint %d must specify a single register", i
);
546 for (j
= 0; j
< n_clobbers
; j
++)
547 if (REGNO (recog_data
.operand
[i
]) == REGNO (clobber_reg
[j
]))
549 error_for_asm (insn
, "output constraint %d cannot be specified together with \"%s\" clobber",
550 i
, reg_names
[REGNO (clobber_reg
[j
])]);
555 reg_used_as_output
[REGNO (recog_data
.operand
[i
])] = 1;
560 /* Search for first non-popped reg. */
561 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
562 if (! reg_used_as_output
[i
])
565 /* If there are any other popped regs, that's an error. */
566 for (; i
< LAST_STACK_REG
+ 1; i
++)
567 if (reg_used_as_output
[i
])
570 if (i
!= LAST_STACK_REG
+ 1)
572 error_for_asm (insn
, "output regs must be grouped at top of stack");
576 /* Enforce rule #2: All implicitly popped input regs must be closer
577 to the top of the reg-stack than any input that is not implicitly
580 memset (implicitly_dies
, 0, sizeof (implicitly_dies
));
581 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
582 if (STACK_REG_P (recog_data
.operand
[i
]))
584 /* An input reg is implicitly popped if it is tied to an
585 output, or if there is a CLOBBER for it. */
588 for (j
= 0; j
< n_clobbers
; j
++)
589 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
592 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
593 implicitly_dies
[REGNO (recog_data
.operand
[i
])] = 1;
596 /* Search for first non-popped reg. */
597 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
598 if (! implicitly_dies
[i
])
601 /* If there are any other popped regs, that's an error. */
602 for (; i
< LAST_STACK_REG
+ 1; i
++)
603 if (implicitly_dies
[i
])
606 if (i
!= LAST_STACK_REG
+ 1)
609 "implicitly popped regs must be grouped at top of stack");
613 /* Enforce rule #3: If any input operand uses the "f" constraint, all
614 output constraints must use the "&" earlyclobber.
616 ??? Detect this more deterministically by having constrain_asm_operands
617 record any earlyclobber. */
619 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
620 if (recog_op_alt
[i
][alt
].matches
== -1)
624 for (j
= 0; j
< n_outputs
; j
++)
625 if (operands_match_p (recog_data
.operand
[j
], recog_data
.operand
[i
]))
628 "output operand %d must use %<&%> constraint", j
);
635 /* Avoid further trouble with this insn. */
636 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
637 any_malformed_asm
= true;
644 /* Calculate the number of inputs and outputs in BODY, an
645 asm_operands. N_OPERANDS is the total number of operands, and
646 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
650 get_asm_operand_n_inputs (rtx body
)
652 switch (GET_CODE (body
))
655 gcc_assert (GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
);
656 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
659 return ASM_OPERANDS_INPUT_LENGTH (body
);
662 return get_asm_operand_n_inputs (XVECEXP (body
, 0, 0));
669 /* If current function returns its result in an fp stack register,
670 return the REG. Otherwise, return 0. */
673 stack_result (tree decl
)
677 /* If the value is supposed to be returned in memory, then clearly
678 it is not returned in a stack register. */
679 if (aggregate_value_p (DECL_RESULT (decl
), decl
))
682 result
= DECL_RTL_IF_SET (DECL_RESULT (decl
));
684 result
= targetm
.calls
.function_value (TREE_TYPE (DECL_RESULT (decl
)),
687 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
692 * This section deals with stack register substitution, and forms the second
696 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
697 the desired hard REGNO. */
700 replace_reg (rtx
*reg
, int regno
)
702 gcc_assert (IN_RANGE (regno
, FIRST_STACK_REG
, LAST_STACK_REG
));
703 gcc_assert (STACK_REG_P (*reg
));
705 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg
))
706 || GET_MODE_CLASS (GET_MODE (*reg
)) == MODE_COMPLEX_FLOAT
);
708 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
711 /* Remove a note of type NOTE, which must be found, for register
712 number REGNO from INSN. Remove only one such note. */
715 remove_regno_note (rtx insn
, enum reg_note note
, unsigned int regno
)
717 rtx
*note_link
, this;
719 note_link
= ®_NOTES (insn
);
720 for (this = *note_link
; this; this = XEXP (this, 1))
721 if (REG_NOTE_KIND (this) == note
722 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
724 *note_link
= XEXP (this, 1);
728 note_link
= &XEXP (this, 1);
733 /* Find the hard register number of virtual register REG in REGSTACK.
734 The hard register number is relative to the top of the stack. -1 is
735 returned if the register is not found. */
738 get_hard_regnum (stack regstack
, rtx reg
)
742 gcc_assert (STACK_REG_P (reg
));
744 for (i
= regstack
->top
; i
>= 0; i
--)
745 if (regstack
->reg
[i
] == REGNO (reg
))
748 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
751 /* Emit an insn to pop virtual register REG before or after INSN.
752 REGSTACK is the stack state after INSN and is updated to reflect this
753 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
754 is represented as a SET whose destination is the register to be popped
755 and source is the top of stack. A death note for the top of stack
756 cases the movdf pattern to pop. */
759 emit_pop_insn (rtx insn
, stack regstack
, rtx reg
, enum emit_where where
)
761 rtx pop_insn
, pop_rtx
;
764 /* For complex types take care to pop both halves. These may survive in
765 CLOBBER and USE expressions. */
766 if (COMPLEX_MODE_P (GET_MODE (reg
)))
768 rtx reg1
= FP_MODE_REG (REGNO (reg
), DFmode
);
769 rtx reg2
= FP_MODE_REG (REGNO (reg
) + 1, DFmode
);
772 if (get_hard_regnum (regstack
, reg1
) >= 0)
773 pop_insn
= emit_pop_insn (insn
, regstack
, reg1
, where
);
774 if (get_hard_regnum (regstack
, reg2
) >= 0)
775 pop_insn
= emit_pop_insn (insn
, regstack
, reg2
, where
);
776 gcc_assert (pop_insn
);
780 hard_regno
= get_hard_regnum (regstack
, reg
);
782 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
784 pop_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
785 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
787 if (where
== EMIT_AFTER
)
788 pop_insn
= emit_insn_after (pop_rtx
, insn
);
790 pop_insn
= emit_insn_before (pop_rtx
, insn
);
793 = gen_rtx_EXPR_LIST (REG_DEAD
, FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
794 REG_NOTES (pop_insn
));
796 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
797 = regstack
->reg
[regstack
->top
];
799 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
804 /* Emit an insn before or after INSN to swap virtual register REG with
805 the top of stack. REGSTACK is the stack state before the swap, and
806 is updated to reflect the swap. A swap insn is represented as a
807 PARALLEL of two patterns: each pattern moves one reg to the other.
809 If REG is already at the top of the stack, no insn is emitted. */
812 emit_swap_insn (rtx insn
, stack regstack
, rtx reg
)
816 int tmp
, other_reg
; /* swap regno temps */
817 rtx i1
; /* the stack-reg insn prior to INSN */
818 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
820 hard_regno
= get_hard_regnum (regstack
, reg
);
822 if (hard_regno
== FIRST_STACK_REG
)
824 if (hard_regno
== -1)
826 /* Something failed if the register wasn't on the stack. If we had
827 malformed asms, we zapped the instruction itself, but that didn't
828 produce the same pattern of register sets as before. To prevent
829 further failure, adjust REGSTACK to include REG at TOP. */
830 gcc_assert (any_malformed_asm
);
831 regstack
->reg
[++regstack
->top
] = REGNO (reg
);
834 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
836 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
838 tmp
= regstack
->reg
[other_reg
];
839 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
840 regstack
->reg
[regstack
->top
] = tmp
;
842 /* Find the previous insn involving stack regs, but don't pass a
845 if (current_block
&& insn
!= BB_HEAD (current_block
))
847 rtx tmp
= PREV_INSN (insn
);
848 rtx limit
= PREV_INSN (BB_HEAD (current_block
));
853 || NOTE_INSN_BASIC_BLOCK_P (tmp
)
854 || (NONJUMP_INSN_P (tmp
)
855 && stack_regs_mentioned (tmp
)))
860 tmp
= PREV_INSN (tmp
);
865 && (i1set
= single_set (i1
)) != NULL_RTX
)
867 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
868 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
870 /* If the previous register stack push was from the reg we are to
871 swap with, omit the swap. */
873 if (REG_P (i1dest
) && REGNO (i1dest
) == FIRST_STACK_REG
875 && REGNO (i1src
) == (unsigned) hard_regno
- 1
876 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
879 /* If the previous insn wrote to the reg we are to swap with,
882 if (REG_P (i1dest
) && REGNO (i1dest
) == (unsigned) hard_regno
883 && REG_P (i1src
) && REGNO (i1src
) == FIRST_STACK_REG
884 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
888 /* Avoid emitting the swap if this is the first register stack insn
889 of the current_block. Instead update the current_block's stack_in
890 and let compensate edges take care of this for us. */
891 if (current_block
&& starting_stack_p
)
893 BLOCK_INFO (current_block
)->stack_in
= *regstack
;
894 starting_stack_p
= false;
898 swap_rtx
= gen_swapxf (FP_MODE_REG (hard_regno
, XFmode
),
899 FP_MODE_REG (FIRST_STACK_REG
, XFmode
));
902 emit_insn_after (swap_rtx
, i1
);
903 else if (current_block
)
904 emit_insn_before (swap_rtx
, BB_HEAD (current_block
));
906 emit_insn_before (swap_rtx
, insn
);
909 /* Emit an insns before INSN to swap virtual register SRC1 with
910 the top of stack and virtual register SRC2 with second stack
911 slot. REGSTACK is the stack state before the swaps, and
912 is updated to reflect the swaps. A swap insn is represented as a
913 PARALLEL of two patterns: each pattern moves one reg to the other.
915 If SRC1 and/or SRC2 are already at the right place, no swap insn
919 swap_to_top (rtx insn
, stack regstack
, rtx src1
, rtx src2
)
921 struct stack_def temp_stack
;
922 int regno
, j
, k
, temp
;
924 temp_stack
= *regstack
;
926 /* Place operand 1 at the top of stack. */
927 regno
= get_hard_regnum (&temp_stack
, src1
);
928 gcc_assert (regno
>= 0);
929 if (regno
!= FIRST_STACK_REG
)
931 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
934 temp
= temp_stack
.reg
[k
];
935 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
936 temp_stack
.reg
[j
] = temp
;
939 /* Place operand 2 next on the stack. */
940 regno
= get_hard_regnum (&temp_stack
, src2
);
941 gcc_assert (regno
>= 0);
942 if (regno
!= FIRST_STACK_REG
+ 1)
944 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
945 j
= temp_stack
.top
- 1;
947 temp
= temp_stack
.reg
[k
];
948 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
949 temp_stack
.reg
[j
] = temp
;
952 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
955 /* Handle a move to or from a stack register in PAT, which is in INSN.
956 REGSTACK is the current stack. Return whether a control flow insn
957 was deleted in the process. */
960 move_for_stack_reg (rtx insn
, stack regstack
, rtx pat
)
962 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
963 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
966 bool control_flow_insn_deleted
= false;
968 src
= *psrc
; dest
= *pdest
;
970 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
972 /* Write from one stack reg to another. If SRC dies here, then
973 just change the register mapping and delete the insn. */
975 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
980 /* If this is a no-op move, there must not be a REG_DEAD note. */
981 gcc_assert (REGNO (src
) != REGNO (dest
));
983 for (i
= regstack
->top
; i
>= 0; i
--)
984 if (regstack
->reg
[i
] == REGNO (src
))
987 /* The destination must be dead, or life analysis is borked. */
988 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
990 /* If the source is not live, this is yet another case of
991 uninitialized variables. Load up a NaN instead. */
993 return move_nan_for_stack_reg (insn
, regstack
, dest
);
995 /* It is possible that the dest is unused after this insn.
996 If so, just pop the src. */
998 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
999 emit_pop_insn (insn
, regstack
, src
, EMIT_AFTER
);
1002 regstack
->reg
[i
] = REGNO (dest
);
1003 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1004 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1007 control_flow_insn_deleted
|= control_flow_insn_p (insn
);
1009 return control_flow_insn_deleted
;
1012 /* The source reg does not die. */
1014 /* If this appears to be a no-op move, delete it, or else it
1015 will confuse the machine description output patterns. But if
1016 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1017 for REG_UNUSED will not work for deleted insns. */
1019 if (REGNO (src
) == REGNO (dest
))
1021 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1022 emit_pop_insn (insn
, regstack
, dest
, EMIT_AFTER
);
1024 control_flow_insn_deleted
|= control_flow_insn_p (insn
);
1026 return control_flow_insn_deleted
;
1029 /* The destination ought to be dead. */
1030 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
1032 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1034 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1035 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1036 replace_reg (pdest
, FIRST_STACK_REG
);
1038 else if (STACK_REG_P (src
))
1040 /* Save from a stack reg to MEM, or possibly integer reg. Since
1041 only top of stack may be saved, emit an exchange first if
1044 emit_swap_insn (insn
, regstack
, src
);
1046 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1049 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1051 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1053 else if ((GET_MODE (src
) == XFmode
)
1054 && regstack
->top
< REG_STACK_SIZE
- 1)
1056 /* A 387 cannot write an XFmode value to a MEM without
1057 clobbering the source reg. The output code can handle
1058 this by reading back the value from the MEM.
1059 But it is more efficient to use a temp register if one is
1060 available. Push the source value here if the register
1061 stack is not full, and then write the value to memory via
1064 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, GET_MODE (src
));
1066 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1067 emit_insn_before (push_rtx
, insn
);
1068 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, top_stack_reg
,
1072 replace_reg (psrc
, FIRST_STACK_REG
);
1076 rtx pat
= PATTERN (insn
);
1078 gcc_assert (STACK_REG_P (dest
));
1080 /* Load from MEM, or possibly integer REG or constant, into the
1081 stack regs. The actual target is always the top of the
1082 stack. The stack mapping is changed to reflect that DEST is
1083 now at top of stack. */
1085 /* The destination ought to be dead. However, there is a
1086 special case with i387 UNSPEC_TAN, where destination is live
1087 (an argument to fptan) but inherent load of 1.0 is modelled
1088 as a load from a constant. */
1089 if (! (GET_CODE (pat
) == PARALLEL
1090 && XVECLEN (pat
, 0) == 2
1091 && GET_CODE (XVECEXP (pat
, 0, 1)) == SET
1092 && GET_CODE (SET_SRC (XVECEXP (pat
, 0, 1))) == UNSPEC
1093 && XINT (SET_SRC (XVECEXP (pat
, 0, 1)), 1) == UNSPEC_TAN
))
1094 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
1096 gcc_assert (regstack
->top
< REG_STACK_SIZE
);
1098 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1099 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1100 replace_reg (pdest
, FIRST_STACK_REG
);
1103 return control_flow_insn_deleted
;
1106 /* A helper function which replaces INSN with a pattern that loads up
1107 a NaN into DEST, then invokes move_for_stack_reg. */
1110 move_nan_for_stack_reg (rtx insn
, stack regstack
, rtx dest
)
1114 dest
= FP_MODE_REG (REGNO (dest
), SFmode
);
1115 pat
= gen_rtx_SET (VOIDmode
, dest
, not_a_num
);
1116 PATTERN (insn
) = pat
;
1117 INSN_CODE (insn
) = -1;
1119 return move_for_stack_reg (insn
, regstack
, pat
);
1122 /* Swap the condition on a branch, if there is one. Return true if we
1123 found a condition to swap. False if the condition was not used as
1127 swap_rtx_condition_1 (rtx pat
)
1132 if (COMPARISON_P (pat
))
1134 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1139 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1140 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1146 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1147 r
|= swap_rtx_condition_1 (XVECEXP (pat
, i
, j
));
1149 else if (fmt
[i
] == 'e')
1150 r
|= swap_rtx_condition_1 (XEXP (pat
, i
));
1158 swap_rtx_condition (rtx insn
)
1160 rtx pat
= PATTERN (insn
);
1162 /* We're looking for a single set to cc0 or an HImode temporary. */
1164 if (GET_CODE (pat
) == SET
1165 && REG_P (SET_DEST (pat
))
1166 && REGNO (SET_DEST (pat
)) == FLAGS_REG
)
1168 insn
= next_flags_user (insn
);
1169 if (insn
== NULL_RTX
)
1171 pat
= PATTERN (insn
);
1174 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1175 with the cc value right now. We may be able to search for one
1178 if (GET_CODE (pat
) == SET
1179 && GET_CODE (SET_SRC (pat
)) == UNSPEC
1180 && XINT (SET_SRC (pat
), 1) == UNSPEC_FNSTSW
)
1182 rtx dest
= SET_DEST (pat
);
1184 /* Search forward looking for the first use of this value.
1185 Stop at block boundaries. */
1186 while (insn
!= BB_END (current_block
))
1188 insn
= NEXT_INSN (insn
);
1189 if (INSN_P (insn
) && reg_mentioned_p (dest
, insn
))
1195 /* We haven't found it. */
1196 if (insn
== BB_END (current_block
))
1199 /* So we've found the insn using this value. If it is anything
1200 other than sahf or the value does not die (meaning we'd have
1201 to search further), then we must give up. */
1202 pat
= PATTERN (insn
);
1203 if (GET_CODE (pat
) != SET
1204 || GET_CODE (SET_SRC (pat
)) != UNSPEC
1205 || XINT (SET_SRC (pat
), 1) != UNSPEC_SAHF
1206 || ! dead_or_set_p (insn
, dest
))
1209 /* Now we are prepared to handle this as a normal cc0 setter. */
1210 insn
= next_flags_user (insn
);
1211 if (insn
== NULL_RTX
)
1213 pat
= PATTERN (insn
);
1216 if (swap_rtx_condition_1 (pat
))
1219 INSN_CODE (insn
) = -1;
1220 if (recog_memoized (insn
) == -1)
1222 /* In case the flags don't die here, recurse to try fix
1223 following user too. */
1224 else if (! dead_or_set_p (insn
, ix86_flags_rtx
))
1226 insn
= next_flags_user (insn
);
1227 if (!insn
|| !swap_rtx_condition (insn
))
1232 swap_rtx_condition_1 (pat
);
1240 /* Handle a comparison. Special care needs to be taken to avoid
1241 causing comparisons that a 387 cannot do correctly, such as EQ.
1243 Also, a pop insn may need to be emitted. The 387 does have an
1244 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1245 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1249 compare_for_stack_reg (rtx insn
, stack regstack
, rtx pat_src
)
1252 rtx src1_note
, src2_note
;
1254 src1
= get_true_reg (&XEXP (pat_src
, 0));
1255 src2
= get_true_reg (&XEXP (pat_src
, 1));
1257 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1258 registers that die in this insn - move those to stack top first. */
1259 if ((! STACK_REG_P (*src1
)
1260 || (STACK_REG_P (*src2
)
1261 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1262 && swap_rtx_condition (insn
))
1265 temp
= XEXP (pat_src
, 0);
1266 XEXP (pat_src
, 0) = XEXP (pat_src
, 1);
1267 XEXP (pat_src
, 1) = temp
;
1269 src1
= get_true_reg (&XEXP (pat_src
, 0));
1270 src2
= get_true_reg (&XEXP (pat_src
, 1));
1272 INSN_CODE (insn
) = -1;
1275 /* We will fix any death note later. */
1277 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1279 if (STACK_REG_P (*src2
))
1280 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1282 src2_note
= NULL_RTX
;
1284 emit_swap_insn (insn
, regstack
, *src1
);
1286 replace_reg (src1
, FIRST_STACK_REG
);
1288 if (STACK_REG_P (*src2
))
1289 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1293 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
1294 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1297 /* If the second operand dies, handle that. But if the operands are
1298 the same stack register, don't bother, because only one death is
1299 needed, and it was just handled. */
1302 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1303 && REGNO (*src1
) == REGNO (*src2
)))
1305 /* As a special case, two regs may die in this insn if src2 is
1306 next to top of stack and the top of stack also dies. Since
1307 we have already popped src1, "next to top of stack" is really
1308 at top (FIRST_STACK_REG) now. */
1310 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1313 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
1314 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1318 /* The 386 can only represent death of the first operand in
1319 the case handled above. In all other cases, emit a separate
1320 pop and remove the death note from here. */
1322 /* link_cc0_insns (insn); */
1324 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1326 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1332 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1333 is the current register layout. Return whether a control flow insn
1334 was deleted in the process. */
1337 subst_stack_regs_pat (rtx insn
, stack regstack
, rtx pat
)
1340 bool control_flow_insn_deleted
= false;
1342 switch (GET_CODE (pat
))
1345 /* Deaths in USE insns can happen in non optimizing compilation.
1346 Handle them by popping the dying register. */
1347 src
= get_true_reg (&XEXP (pat
, 0));
1348 if (STACK_REG_P (*src
)
1349 && find_regno_note (insn
, REG_DEAD
, REGNO (*src
)))
1351 /* USEs are ignored for liveness information so USEs of dead
1352 register might happen. */
1353 if (TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
)))
1354 emit_pop_insn (insn
, regstack
, *src
, EMIT_AFTER
);
1355 return control_flow_insn_deleted
;
1357 /* Uninitialized USE might happen for functions returning uninitialized
1358 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1359 so it is safe to ignore the use here. This is consistent with behaviour
1360 of dataflow analyzer that ignores USE too. (This also imply that
1361 forcingly initializing the register to NaN here would lead to ICE later,
1362 since the REG_DEAD notes are not issued.) */
1369 dest
= get_true_reg (&XEXP (pat
, 0));
1370 if (STACK_REG_P (*dest
))
1372 note
= find_reg_note (insn
, REG_DEAD
, *dest
);
1374 if (pat
!= PATTERN (insn
))
1376 /* The fix_truncdi_1 pattern wants to be able to allocate
1377 its own scratch register. It does this by clobbering
1378 an fp reg so that it is assured of an empty reg-stack
1379 register. If the register is live, kill it now.
1380 Remove the DEAD/UNUSED note so we don't try to kill it
1384 emit_pop_insn (insn
, regstack
, *dest
, EMIT_BEFORE
);
1387 note
= find_reg_note (insn
, REG_UNUSED
, *dest
);
1390 remove_note (insn
, note
);
1391 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1395 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1396 indicates an uninitialized value. Because reload removed
1397 all other clobbers, this must be due to a function
1398 returning without a value. Load up a NaN. */
1403 if (COMPLEX_MODE_P (GET_MODE (t
)))
1405 rtx u
= FP_MODE_REG (REGNO (t
) + 1, SFmode
);
1406 if (get_hard_regnum (regstack
, u
) == -1)
1408 rtx pat2
= gen_rtx_CLOBBER (VOIDmode
, u
);
1409 rtx insn2
= emit_insn_before (pat2
, insn
);
1410 control_flow_insn_deleted
1411 |= move_nan_for_stack_reg (insn2
, regstack
, u
);
1414 if (get_hard_regnum (regstack
, t
) == -1)
1415 control_flow_insn_deleted
1416 |= move_nan_for_stack_reg (insn
, regstack
, t
);
1425 rtx
*src1
= (rtx
*) 0, *src2
;
1426 rtx src1_note
, src2_note
;
1429 dest
= get_true_reg (&SET_DEST (pat
));
1430 src
= get_true_reg (&SET_SRC (pat
));
1431 pat_src
= SET_SRC (pat
);
1433 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1434 if (STACK_REG_P (*src
)
1435 || (STACK_REG_P (*dest
)
1436 && (REG_P (*src
) || MEM_P (*src
)
1437 || GET_CODE (*src
) == CONST_DOUBLE
)))
1439 control_flow_insn_deleted
|= move_for_stack_reg (insn
, regstack
, pat
);
1443 switch (GET_CODE (pat_src
))
1446 compare_for_stack_reg (insn
, regstack
, pat_src
);
1452 for (count
= hard_regno_nregs
[REGNO (*dest
)][GET_MODE (*dest
)];
1455 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
1456 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
1459 replace_reg (dest
, FIRST_STACK_REG
);
1463 /* This is a `tstM2' case. */
1464 gcc_assert (*dest
== cc0_rtx
);
1469 case FLOAT_TRUNCATE
:
1473 /* These insns only operate on the top of the stack. DEST might
1474 be cc0_rtx if we're processing a tstM pattern. Also, it's
1475 possible that the tstM case results in a REG_DEAD note on the
1479 src1
= get_true_reg (&XEXP (pat_src
, 0));
1481 emit_swap_insn (insn
, regstack
, *src1
);
1483 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1485 if (STACK_REG_P (*dest
))
1486 replace_reg (dest
, FIRST_STACK_REG
);
1490 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1492 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1495 replace_reg (src1
, FIRST_STACK_REG
);
1500 /* On i386, reversed forms of subM3 and divM3 exist for
1501 MODE_FLOAT, so the same code that works for addM3 and mulM3
1505 /* These insns can accept the top of stack as a destination
1506 from a stack reg or mem, or can use the top of stack as a
1507 source and some other stack register (possibly top of stack)
1508 as a destination. */
1510 src1
= get_true_reg (&XEXP (pat_src
, 0));
1511 src2
= get_true_reg (&XEXP (pat_src
, 1));
1513 /* We will fix any death note later. */
1515 if (STACK_REG_P (*src1
))
1516 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1518 src1_note
= NULL_RTX
;
1519 if (STACK_REG_P (*src2
))
1520 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1522 src2_note
= NULL_RTX
;
1524 /* If either operand is not a stack register, then the dest
1525 must be top of stack. */
1527 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1528 emit_swap_insn (insn
, regstack
, *dest
);
1531 /* Both operands are REG. If neither operand is already
1532 at the top of stack, choose to make the one that is the dest
1533 the new top of stack. */
1535 int src1_hard_regnum
, src2_hard_regnum
;
1537 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1538 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1539 gcc_assert (src1_hard_regnum
!= -1);
1540 gcc_assert (src2_hard_regnum
!= -1);
1542 if (src1_hard_regnum
!= FIRST_STACK_REG
1543 && src2_hard_regnum
!= FIRST_STACK_REG
)
1544 emit_swap_insn (insn
, regstack
, *dest
);
1547 if (STACK_REG_P (*src1
))
1548 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1549 if (STACK_REG_P (*src2
))
1550 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1554 rtx src1_reg
= XEXP (src1_note
, 0);
1556 /* If the register that dies is at the top of stack, then
1557 the destination is somewhere else - merely substitute it.
1558 But if the reg that dies is not at top of stack, then
1559 move the top of stack to the dead reg, as though we had
1560 done the insn and then a store-with-pop. */
1562 if (REGNO (src1_reg
) == regstack
->reg
[regstack
->top
])
1564 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1565 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1569 int regno
= get_hard_regnum (regstack
, src1_reg
);
1571 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1572 replace_reg (dest
, regno
);
1574 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1575 = regstack
->reg
[regstack
->top
];
1578 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1579 REGNO (XEXP (src1_note
, 0)));
1580 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1585 rtx src2_reg
= XEXP (src2_note
, 0);
1586 if (REGNO (src2_reg
) == regstack
->reg
[regstack
->top
])
1588 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1589 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1593 int regno
= get_hard_regnum (regstack
, src2_reg
);
1595 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1596 replace_reg (dest
, regno
);
1598 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1599 = regstack
->reg
[regstack
->top
];
1602 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1603 REGNO (XEXP (src2_note
, 0)));
1604 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1609 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1610 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1613 /* Keep operand 1 matching with destination. */
1614 if (COMMUTATIVE_ARITH_P (pat_src
)
1615 && REG_P (*src1
) && REG_P (*src2
)
1616 && REGNO (*src1
) != REGNO (*dest
))
1618 int tmp
= REGNO (*src1
);
1619 replace_reg (src1
, REGNO (*src2
));
1620 replace_reg (src2
, tmp
);
1625 switch (XINT (pat_src
, 1))
1629 case UNSPEC_FIST_FLOOR
:
1630 case UNSPEC_FIST_CEIL
:
1632 /* These insns only operate on the top of the stack. */
1634 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1635 emit_swap_insn (insn
, regstack
, *src1
);
1637 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1639 if (STACK_REG_P (*dest
))
1640 replace_reg (dest
, FIRST_STACK_REG
);
1644 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1646 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1649 replace_reg (src1
, FIRST_STACK_REG
);
1654 /* This insn only operate on the top of the stack. */
1656 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1657 emit_swap_insn (insn
, regstack
, *src1
);
1659 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1661 replace_reg (src1
, FIRST_STACK_REG
);
1665 remove_regno_note (insn
, REG_DEAD
,
1666 REGNO (XEXP (src1_note
, 0)));
1667 emit_pop_insn (insn
, regstack
, XEXP (src1_note
, 0),
1675 case UNSPEC_FRNDINT
:
1678 case UNSPEC_FRNDINT_FLOOR
:
1679 case UNSPEC_FRNDINT_CEIL
:
1680 case UNSPEC_FRNDINT_TRUNC
:
1681 case UNSPEC_FRNDINT_MASK_PM
:
1683 /* Above insns operate on the top of the stack. */
1685 case UNSPEC_SINCOS_COS
:
1686 case UNSPEC_XTRACT_FRACT
:
1688 /* Above insns operate on the top two stack slots,
1689 first part of one input, double output insn. */
1691 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1693 emit_swap_insn (insn
, regstack
, *src1
);
1695 /* Input should never die, it is replaced with output. */
1696 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1697 gcc_assert (!src1_note
);
1699 if (STACK_REG_P (*dest
))
1700 replace_reg (dest
, FIRST_STACK_REG
);
1702 replace_reg (src1
, FIRST_STACK_REG
);
1705 case UNSPEC_SINCOS_SIN
:
1706 case UNSPEC_XTRACT_EXP
:
1708 /* These insns operate on the top two stack slots,
1709 second part of one input, double output insn. */
1716 /* For UNSPEC_TAN, regstack->top is already increased
1717 by inherent load of constant 1.0. */
1719 /* Output value is generated in the second stack slot.
1720 Move current value from second slot to the top. */
1721 regstack
->reg
[regstack
->top
]
1722 = regstack
->reg
[regstack
->top
- 1];
1724 gcc_assert (STACK_REG_P (*dest
));
1726 regstack
->reg
[regstack
->top
- 1] = REGNO (*dest
);
1727 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1728 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1730 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1732 replace_reg (src1
, FIRST_STACK_REG
);
1737 case UNSPEC_FYL2XP1
:
1738 /* These insns operate on the top two stack slots. */
1740 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1741 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1743 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1744 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1746 swap_to_top (insn
, regstack
, *src1
, *src2
);
1748 replace_reg (src1
, FIRST_STACK_REG
);
1749 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1752 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1754 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1756 /* Pop both input operands from the stack. */
1757 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1758 regstack
->reg
[regstack
->top
]);
1759 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1760 regstack
->reg
[regstack
->top
- 1]);
1763 /* Push the result back onto the stack. */
1764 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1765 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1766 replace_reg (dest
, FIRST_STACK_REG
);
1769 case UNSPEC_FSCALE_FRACT
:
1770 case UNSPEC_FPREM_F
:
1771 case UNSPEC_FPREM1_F
:
1772 /* These insns operate on the top two stack slots,
1773 first part of double input, double output insn. */
1775 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1776 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1778 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1779 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1781 /* Inputs should never die, they are
1782 replaced with outputs. */
1783 gcc_assert (!src1_note
);
1784 gcc_assert (!src2_note
);
1786 swap_to_top (insn
, regstack
, *src1
, *src2
);
1788 /* Push the result back onto stack. Empty stack slot
1789 will be filled in second part of insn. */
1790 if (STACK_REG_P (*dest
))
1792 regstack
->reg
[regstack
->top
] = REGNO (*dest
);
1793 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1794 replace_reg (dest
, FIRST_STACK_REG
);
1797 replace_reg (src1
, FIRST_STACK_REG
);
1798 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1801 case UNSPEC_FSCALE_EXP
:
1802 case UNSPEC_FPREM_U
:
1803 case UNSPEC_FPREM1_U
:
1804 /* These insns operate on the top two stack slots,
1805 second part of double input, double output insn. */
1807 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1808 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1810 /* Push the result back onto stack. Fill empty slot from
1811 first part of insn and fix top of stack pointer. */
1812 if (STACK_REG_P (*dest
))
1814 regstack
->reg
[regstack
->top
- 1] = REGNO (*dest
);
1815 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1816 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1819 replace_reg (src1
, FIRST_STACK_REG
);
1820 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1823 case UNSPEC_C2_FLAG
:
1824 /* This insn operates on the top two stack slots,
1825 third part of C2 setting double input insn. */
1827 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1828 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1830 replace_reg (src1
, FIRST_STACK_REG
);
1831 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1835 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1836 The combination matches the PPRO fcomi instruction. */
1838 pat_src
= XVECEXP (pat_src
, 0, 0);
1839 gcc_assert (GET_CODE (pat_src
) == UNSPEC
);
1840 gcc_assert (XINT (pat_src
, 1) == UNSPEC_FNSTSW
);
1844 /* Combined fcomp+fnstsw generated for doing well with
1845 CSE. When optimizing this would have been broken
1848 pat_src
= XVECEXP (pat_src
, 0, 0);
1849 gcc_assert (GET_CODE (pat_src
) == COMPARE
);
1851 compare_for_stack_reg (insn
, regstack
, pat_src
);
1860 /* This insn requires the top of stack to be the destination. */
1862 src1
= get_true_reg (&XEXP (pat_src
, 1));
1863 src2
= get_true_reg (&XEXP (pat_src
, 2));
1865 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1866 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1868 /* If the comparison operator is an FP comparison operator,
1869 it is handled correctly by compare_for_stack_reg () who
1870 will move the destination to the top of stack. But if the
1871 comparison operator is not an FP comparison operator, we
1872 have to handle it here. */
1873 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
1874 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
1876 /* In case one of operands is the top of stack and the operands
1877 dies, it is safe to make it the destination operand by
1878 reversing the direction of cmove and avoid fxch. */
1879 if ((REGNO (*src1
) == regstack
->reg
[regstack
->top
]
1881 || (REGNO (*src2
) == regstack
->reg
[regstack
->top
]
1884 int idx1
= (get_hard_regnum (regstack
, *src1
)
1886 int idx2
= (get_hard_regnum (regstack
, *src2
)
1889 /* Make reg-stack believe that the operands are already
1890 swapped on the stack */
1891 regstack
->reg
[regstack
->top
- idx1
] = REGNO (*src2
);
1892 regstack
->reg
[regstack
->top
- idx2
] = REGNO (*src1
);
1894 /* Reverse condition to compensate the operand swap.
1895 i386 do have comparison always reversible. */
1896 PUT_CODE (XEXP (pat_src
, 0),
1897 reversed_comparison_code (XEXP (pat_src
, 0), insn
));
1900 emit_swap_insn (insn
, regstack
, *dest
);
1908 src_note
[1] = src1_note
;
1909 src_note
[2] = src2_note
;
1911 if (STACK_REG_P (*src1
))
1912 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1913 if (STACK_REG_P (*src2
))
1914 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1916 for (i
= 1; i
<= 2; i
++)
1919 int regno
= REGNO (XEXP (src_note
[i
], 0));
1921 /* If the register that dies is not at the top of
1922 stack, then move the top of stack to the dead reg.
1923 Top of stack should never die, as it is the
1925 gcc_assert (regno
!= regstack
->reg
[regstack
->top
]);
1926 remove_regno_note (insn
, REG_DEAD
, regno
);
1927 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
1932 /* Make dest the top of stack. Add dest to regstack if
1934 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
1935 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1936 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1937 replace_reg (dest
, FIRST_STACK_REG
);
1950 return control_flow_insn_deleted
;
1953 /* Substitute hard regnums for any stack regs in INSN, which has
1954 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1955 before the insn, and is updated with changes made here.
1957 There are several requirements and assumptions about the use of
1958 stack-like regs in asm statements. These rules are enforced by
1959 record_asm_stack_regs; see comments there for details. Any
1960 asm_operands left in the RTL at this point may be assume to meet the
1961 requirements, since record_asm_stack_regs removes any problem asm. */
1964 subst_asm_stack_regs (rtx insn
, stack regstack
)
1966 rtx body
= PATTERN (insn
);
1969 rtx
*note_reg
; /* Array of note contents */
1970 rtx
**note_loc
; /* Address of REG field of each note */
1971 enum reg_note
*note_kind
; /* The type of each note */
1973 rtx
*clobber_reg
= 0;
1974 rtx
**clobber_loc
= 0;
1976 struct stack_def temp_stack
;
1981 int n_inputs
, n_outputs
;
1983 if (! check_asm_stack_operands (insn
))
1986 /* Find out what the constraints required. If no constraint
1987 alternative matches, that is a compiler bug: we should have caught
1988 such an insn in check_asm_stack_operands. */
1989 extract_insn (insn
);
1990 constrain_operands (1);
1991 alt
= which_alternative
;
1993 preprocess_constraints ();
1995 n_inputs
= get_asm_operand_n_inputs (body
);
1996 n_outputs
= recog_data
.n_operands
- n_inputs
;
1998 gcc_assert (alt
>= 0);
2000 /* Strip SUBREGs here to make the following code simpler. */
2001 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2002 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
2003 && REG_P (SUBREG_REG (recog_data
.operand
[i
])))
2005 recog_data
.operand_loc
[i
] = & SUBREG_REG (recog_data
.operand
[i
]);
2006 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
2009 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2011 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2014 note_reg
= alloca (i
* sizeof (rtx
));
2015 note_loc
= alloca (i
* sizeof (rtx
*));
2016 note_kind
= alloca (i
* sizeof (enum reg_note
));
2019 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2021 rtx reg
= XEXP (note
, 0);
2022 rtx
*loc
= & XEXP (note
, 0);
2024 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
2026 loc
= & SUBREG_REG (reg
);
2027 reg
= SUBREG_REG (reg
);
2030 if (STACK_REG_P (reg
)
2031 && (REG_NOTE_KIND (note
) == REG_DEAD
2032 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2034 note_reg
[n_notes
] = reg
;
2035 note_loc
[n_notes
] = loc
;
2036 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2041 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2045 if (GET_CODE (body
) == PARALLEL
)
2047 clobber_reg
= alloca (XVECLEN (body
, 0) * sizeof (rtx
));
2048 clobber_loc
= alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2050 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2051 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2053 rtx clobber
= XVECEXP (body
, 0, i
);
2054 rtx reg
= XEXP (clobber
, 0);
2055 rtx
*loc
= & XEXP (clobber
, 0);
2057 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
2059 loc
= & SUBREG_REG (reg
);
2060 reg
= SUBREG_REG (reg
);
2063 if (STACK_REG_P (reg
))
2065 clobber_reg
[n_clobbers
] = reg
;
2066 clobber_loc
[n_clobbers
] = loc
;
2072 temp_stack
= *regstack
;
2074 /* Put the input regs into the desired place in TEMP_STACK. */
2076 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2077 if (STACK_REG_P (recog_data
.operand
[i
])
2078 && reg_class_subset_p (recog_op_alt
[i
][alt
].cl
,
2080 && recog_op_alt
[i
][alt
].cl
!= FLOAT_REGS
)
2082 /* If an operand needs to be in a particular reg in
2083 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2084 these constraints are for single register classes, and
2085 reload guaranteed that operand[i] is already in that class,
2086 we can just use REGNO (recog_data.operand[i]) to know which
2087 actual reg this operand needs to be in. */
2089 int regno
= get_hard_regnum (&temp_stack
, recog_data
.operand
[i
]);
2091 gcc_assert (regno
>= 0);
2093 if ((unsigned int) regno
!= REGNO (recog_data
.operand
[i
]))
2095 /* recog_data.operand[i] is not in the right place. Find
2096 it and swap it with whatever is already in I's place.
2097 K is where recog_data.operand[i] is now. J is where it
2101 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2103 - (REGNO (recog_data
.operand
[i
]) - FIRST_STACK_REG
));
2105 temp
= temp_stack
.reg
[k
];
2106 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2107 temp_stack
.reg
[j
] = temp
;
2111 /* Emit insns before INSN to make sure the reg-stack is in the right
2114 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
2116 /* Make the needed input register substitutions. Do death notes and
2117 clobbers too, because these are for inputs, not outputs. */
2119 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2120 if (STACK_REG_P (recog_data
.operand
[i
]))
2122 int regnum
= get_hard_regnum (regstack
, recog_data
.operand
[i
]);
2124 gcc_assert (regnum
>= 0);
2126 replace_reg (recog_data
.operand_loc
[i
], regnum
);
2129 for (i
= 0; i
< n_notes
; i
++)
2130 if (note_kind
[i
] == REG_DEAD
)
2132 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2134 gcc_assert (regnum
>= 0);
2136 replace_reg (note_loc
[i
], regnum
);
2139 for (i
= 0; i
< n_clobbers
; i
++)
2141 /* It's OK for a CLOBBER to reference a reg that is not live.
2142 Don't try to replace it in that case. */
2143 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2147 /* Sigh - clobbers always have QImode. But replace_reg knows
2148 that these regs can't be MODE_INT and will assert. Just put
2149 the right reg there without calling replace_reg. */
2151 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
2155 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2157 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2158 if (STACK_REG_P (recog_data
.operand
[i
]))
2160 /* An input reg is implicitly popped if it is tied to an
2161 output, or if there is a CLOBBER for it. */
2164 for (j
= 0; j
< n_clobbers
; j
++)
2165 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
2168 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
2170 /* recog_data.operand[i] might not be at the top of stack.
2171 But that's OK, because all we need to do is pop the
2172 right number of regs off of the top of the reg-stack.
2173 record_asm_stack_regs guaranteed that all implicitly
2174 popped regs were grouped at the top of the reg-stack. */
2176 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2177 regstack
->reg
[regstack
->top
]);
2182 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2183 Note that there isn't any need to substitute register numbers.
2184 ??? Explain why this is true. */
2186 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2188 /* See if there is an output for this hard reg. */
2191 for (j
= 0; j
< n_outputs
; j
++)
2192 if (STACK_REG_P (recog_data
.operand
[j
])
2193 && REGNO (recog_data
.operand
[j
]) == (unsigned) i
)
2195 regstack
->reg
[++regstack
->top
] = i
;
2196 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2201 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2202 input that the asm didn't implicitly pop. If the asm didn't
2203 implicitly pop an input reg, that reg will still be live.
2205 Note that we can't use find_regno_note here: the register numbers
2206 in the death notes have already been substituted. */
2208 for (i
= 0; i
< n_outputs
; i
++)
2209 if (STACK_REG_P (recog_data
.operand
[i
]))
2213 for (j
= 0; j
< n_notes
; j
++)
2214 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2215 && note_kind
[j
] == REG_UNUSED
)
2217 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2223 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2224 if (STACK_REG_P (recog_data
.operand
[i
]))
2228 for (j
= 0; j
< n_notes
; j
++)
2229 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2230 && note_kind
[j
] == REG_DEAD
2231 && TEST_HARD_REG_BIT (regstack
->reg_set
,
2232 REGNO (recog_data
.operand
[i
])))
2234 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2241 /* Substitute stack hard reg numbers for stack virtual registers in
2242 INSN. Non-stack register numbers are not changed. REGSTACK is the
2243 current stack content. Insns may be emitted as needed to arrange the
2244 stack for the 387 based on the contents of the insn. Return whether
2245 a control flow insn was deleted in the process. */
2248 subst_stack_regs (rtx insn
, stack regstack
)
2250 rtx
*note_link
, note
;
2251 bool control_flow_insn_deleted
= false;
2256 int top
= regstack
->top
;
2258 /* If there are any floating point parameters to be passed in
2259 registers for this call, make sure they are in the right
2264 straighten_stack (insn
, regstack
);
2266 /* Now mark the arguments as dead after the call. */
2268 while (regstack
->top
>= 0)
2270 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2276 /* Do the actual substitution if any stack regs are mentioned.
2277 Since we only record whether entire insn mentions stack regs, and
2278 subst_stack_regs_pat only works for patterns that contain stack regs,
2279 we must check each pattern in a parallel here. A call_value_pop could
2282 if (stack_regs_mentioned (insn
))
2284 int n_operands
= asm_noperands (PATTERN (insn
));
2285 if (n_operands
>= 0)
2287 /* This insn is an `asm' with operands. Decode the operands,
2288 decide how many are inputs, and do register substitution.
2289 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2291 subst_asm_stack_regs (insn
, regstack
);
2292 return control_flow_insn_deleted
;
2295 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2296 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2298 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2300 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
2301 XVECEXP (PATTERN (insn
), 0, i
)
2302 = shallow_copy_rtx (XVECEXP (PATTERN (insn
), 0, i
));
2303 control_flow_insn_deleted
2304 |= subst_stack_regs_pat (insn
, regstack
,
2305 XVECEXP (PATTERN (insn
), 0, i
));
2309 control_flow_insn_deleted
2310 |= subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2313 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2314 REG_UNUSED will already have been dealt with, so just return. */
2316 if (NOTE_P (insn
) || INSN_DELETED_P (insn
))
2317 return control_flow_insn_deleted
;
2319 /* If this a noreturn call, we can't insert pop insns after it.
2320 Instead, reset the stack state to empty. */
2322 && find_reg_note (insn
, REG_NORETURN
, NULL
))
2325 CLEAR_HARD_REG_SET (regstack
->reg_set
);
2326 return control_flow_insn_deleted
;
2329 /* If there is a REG_UNUSED note on a stack register on this insn,
2330 the indicated reg must be popped. The REG_UNUSED note is removed,
2331 since the form of the newly emitted pop insn references the reg,
2332 making it no longer `unset'. */
2334 note_link
= ®_NOTES (insn
);
2335 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2336 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2338 *note_link
= XEXP (note
, 1);
2339 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), EMIT_AFTER
);
2342 note_link
= &XEXP (note
, 1);
2344 return control_flow_insn_deleted
;
2347 /* Change the organization of the stack so that it fits a new basic
2348 block. Some registers might have to be popped, but there can never be
2349 a register live in the new block that is not now live.
2351 Insert any needed insns before or after INSN, as indicated by
2352 WHERE. OLD is the original stack layout, and NEW is the desired
2353 form. OLD is updated to reflect the code emitted, i.e., it will be
2354 the same as NEW upon return.
2356 This function will not preserve block_end[]. But that information
2357 is no longer needed once this has executed. */
2360 change_stack (rtx insn
, stack old
, stack
new, enum emit_where where
)
2366 /* Stack adjustments for the first insn in a block update the
2367 current_block's stack_in instead of inserting insns directly.
2368 compensate_edges will add the necessary code later. */
2371 && where
== EMIT_BEFORE
)
2373 BLOCK_INFO (current_block
)->stack_in
= *new;
2374 starting_stack_p
= false;
2379 /* We will be inserting new insns "backwards". If we are to insert
2380 after INSN, find the next insn, and insert before it. */
2382 if (where
== EMIT_AFTER
)
2384 if (current_block
&& BB_END (current_block
) == insn
)
2386 insn
= NEXT_INSN (insn
);
2389 /* Initialize partially dead variables. */
2390 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
2391 if (TEST_HARD_REG_BIT (new->reg_set
, i
)
2392 && !TEST_HARD_REG_BIT (old
->reg_set
, i
))
2394 old
->reg
[++old
->top
] = i
;
2395 SET_HARD_REG_BIT (old
->reg_set
, i
);
2396 emit_insn_before (gen_rtx_SET (VOIDmode
,
2397 FP_MODE_REG (i
, SFmode
), not_a_num
), insn
);
2400 /* Pop any registers that are not needed in the new block. */
2402 /* If the destination block's stack already has a specified layout
2403 and contains two or more registers, use a more intelligent algorithm
2404 to pop registers that minimizes the number number of fxchs below. */
2407 bool slots
[REG_STACK_SIZE
];
2408 int pops
[REG_STACK_SIZE
];
2409 int next
, dest
, topsrc
;
2411 /* First pass to determine the free slots. */
2412 for (reg
= 0; reg
<= new->top
; reg
++)
2413 slots
[reg
] = TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]);
2415 /* Second pass to allocate preferred slots. */
2417 for (reg
= old
->top
; reg
> new->top
; reg
--)
2418 if (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2421 for (next
= 0; next
<= new->top
; next
++)
2422 if (!slots
[next
] && new->reg
[next
] == old
->reg
[reg
])
2424 /* If this is a preference for the new top of stack, record
2425 the fact by remembering it's old->reg in topsrc. */
2426 if (next
== new->top
)
2437 /* Intentionally, avoid placing the top of stack in it's correct
2438 location, if we still need to permute the stack below and we
2439 can usefully place it somewhere else. This is the case if any
2440 slot is still unallocated, in which case we should place the
2441 top of stack there. */
2443 for (reg
= 0; reg
< new->top
; reg
++)
2447 slots
[new->top
] = false;
2452 /* Third pass allocates remaining slots and emits pop insns. */
2454 for (reg
= old
->top
; reg
> new->top
; reg
--)
2459 /* Find next free slot. */
2464 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[dest
], DFmode
),
2470 /* The following loop attempts to maximize the number of times we
2471 pop the top of the stack, as this permits the use of the faster
2472 ffreep instruction on platforms that support it. */
2476 for (reg
= 0; reg
<= old
->top
; reg
++)
2477 if (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2481 while (old
->top
>= live
)
2482 if (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[old
->top
]))
2484 while (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[next
]))
2486 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[next
], DFmode
),
2490 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[old
->top
], DFmode
),
2496 /* If the new block has never been processed, then it can inherit
2497 the old stack order. */
2499 new->top
= old
->top
;
2500 memcpy (new->reg
, old
->reg
, sizeof (new->reg
));
2504 /* This block has been entered before, and we must match the
2505 previously selected stack order. */
2507 /* By now, the only difference should be the order of the stack,
2508 not their depth or liveliness. */
2510 gcc_assert (hard_reg_set_equal_p (old
->reg_set
, new->reg_set
));
2511 gcc_assert (old
->top
== new->top
);
2513 /* If the stack is not empty (new->top != -1), loop here emitting
2514 swaps until the stack is correct.
2516 The worst case number of swaps emitted is N + 2, where N is the
2517 depth of the stack. In some cases, the reg at the top of
2518 stack may be correct, but swapped anyway in order to fix
2519 other regs. But since we never swap any other reg away from
2520 its correct slot, this algorithm will converge. */
2525 /* Swap the reg at top of stack into the position it is
2526 supposed to be in, until the correct top of stack appears. */
2528 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2530 for (reg
= new->top
; reg
>= 0; reg
--)
2531 if (new->reg
[reg
] == old
->reg
[old
->top
])
2534 gcc_assert (reg
!= -1);
2536 emit_swap_insn (insn
, old
,
2537 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2540 /* See if any regs remain incorrect. If so, bring an
2541 incorrect reg to the top of stack, and let the while loop
2544 for (reg
= new->top
; reg
>= 0; reg
--)
2545 if (new->reg
[reg
] != old
->reg
[reg
])
2547 emit_swap_insn (insn
, old
,
2548 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2553 /* At this point there must be no differences. */
2555 for (reg
= old
->top
; reg
>= 0; reg
--)
2556 gcc_assert (old
->reg
[reg
] == new->reg
[reg
]);
2560 BB_END (current_block
) = PREV_INSN (insn
);
2563 /* Print stack configuration. */
2566 print_stack (FILE *file
, stack s
)
2572 fprintf (file
, "uninitialized\n");
2573 else if (s
->top
== -1)
2574 fprintf (file
, "empty\n");
2579 for (i
= 0; i
<= s
->top
; ++i
)
2580 fprintf (file
, "%d ", s
->reg
[i
]);
2581 fputs ("]\n", file
);
2585 /* This function was doing life analysis. We now let the regular live
2586 code do it's job, so we only need to check some extra invariants
2587 that reg-stack expects. Primary among these being that all registers
2588 are initialized before use.
2590 The function returns true when code was emitted to CFG edges and
2591 commit_edge_insertions needs to be called. */
2594 convert_regs_entry (void)
2600 /* Load something into each stack register live at function entry.
2601 Such live registers can be caused by uninitialized variables or
2602 functions not returning values on all paths. In order to keep
2603 the push/pop code happy, and to not scrog the register stack, we
2604 must put something in these registers. Use a QNaN.
2606 Note that we are inserting converted code here. This code is
2607 never seen by the convert_regs pass. */
2609 FOR_EACH_EDGE (e
, ei
, ENTRY_BLOCK_PTR
->succs
)
2611 basic_block block
= e
->dest
;
2612 block_info bi
= BLOCK_INFO (block
);
2615 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2616 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2620 bi
->stack_in
.reg
[++top
] = reg
;
2622 init
= gen_rtx_SET (VOIDmode
,
2623 FP_MODE_REG (FIRST_STACK_REG
, SFmode
),
2625 insert_insn_on_edge (init
, e
);
2629 bi
->stack_in
.top
= top
;
2635 /* Construct the desired stack for function exit. This will either
2636 be `empty', or the function return value at top-of-stack. */
2639 convert_regs_exit (void)
2641 int value_reg_low
, value_reg_high
;
2645 retvalue
= stack_result (current_function_decl
);
2646 value_reg_low
= value_reg_high
= -1;
2649 value_reg_low
= REGNO (retvalue
);
2650 value_reg_high
= END_HARD_REGNO (retvalue
) - 1;
2653 output_stack
= &BLOCK_INFO (EXIT_BLOCK_PTR
)->stack_in
;
2654 if (value_reg_low
== -1)
2655 output_stack
->top
= -1;
2660 output_stack
->top
= value_reg_high
- value_reg_low
;
2661 for (reg
= value_reg_low
; reg
<= value_reg_high
; ++reg
)
2663 output_stack
->reg
[value_reg_high
- reg
] = reg
;
2664 SET_HARD_REG_BIT (output_stack
->reg_set
, reg
);
2669 /* Copy the stack info from the end of edge E's source block to the
2670 start of E's destination block. */
2673 propagate_stack (edge e
)
2675 stack src_stack
= &BLOCK_INFO (e
->src
)->stack_out
;
2676 stack dest_stack
= &BLOCK_INFO (e
->dest
)->stack_in
;
2679 /* Preserve the order of the original stack, but check whether
2680 any pops are needed. */
2681 dest_stack
->top
= -1;
2682 for (reg
= 0; reg
<= src_stack
->top
; ++reg
)
2683 if (TEST_HARD_REG_BIT (dest_stack
->reg_set
, src_stack
->reg
[reg
]))
2684 dest_stack
->reg
[++dest_stack
->top
] = src_stack
->reg
[reg
];
2686 /* Push in any partially dead values. */
2687 for (reg
= FIRST_STACK_REG
; reg
< LAST_STACK_REG
+ 1; reg
++)
2688 if (TEST_HARD_REG_BIT (dest_stack
->reg_set
, reg
)
2689 && !TEST_HARD_REG_BIT (src_stack
->reg_set
, reg
))
2690 dest_stack
->reg
[++dest_stack
->top
] = reg
;
2694 /* Adjust the stack of edge E's source block on exit to match the stack
2695 of it's target block upon input. The stack layouts of both blocks
2696 should have been defined by now. */
2699 compensate_edge (edge e
)
2701 basic_block source
= e
->src
, target
= e
->dest
;
2702 stack target_stack
= &BLOCK_INFO (target
)->stack_in
;
2703 stack source_stack
= &BLOCK_INFO (source
)->stack_out
;
2704 struct stack_def regstack
;
2708 fprintf (dump_file
, "Edge %d->%d: ", source
->index
, target
->index
);
2710 gcc_assert (target_stack
->top
!= -2);
2712 /* Check whether stacks are identical. */
2713 if (target_stack
->top
== source_stack
->top
)
2715 for (reg
= target_stack
->top
; reg
>= 0; --reg
)
2716 if (target_stack
->reg
[reg
] != source_stack
->reg
[reg
])
2722 fprintf (dump_file
, "no changes needed\n");
2729 fprintf (dump_file
, "correcting stack to ");
2730 print_stack (dump_file
, target_stack
);
2733 /* Abnormal calls may appear to have values live in st(0), but the
2734 abnormal return path will not have actually loaded the values. */
2735 if (e
->flags
& EDGE_ABNORMAL_CALL
)
2737 /* Assert that the lifetimes are as we expect -- one value
2738 live at st(0) on the end of the source block, and no
2739 values live at the beginning of the destination block.
2740 For complex return values, we may have st(1) live as well. */
2741 gcc_assert (source_stack
->top
== 0 || source_stack
->top
== 1);
2742 gcc_assert (target_stack
->top
== -1);
2746 /* Handle non-call EH edges specially. The normal return path have
2747 values in registers. These will be popped en masse by the unwind
2749 if (e
->flags
& EDGE_EH
)
2751 gcc_assert (target_stack
->top
== -1);
2755 /* We don't support abnormal edges. Global takes care to
2756 avoid any live register across them, so we should never
2757 have to insert instructions on such edges. */
2758 gcc_assert (! (e
->flags
& EDGE_ABNORMAL
));
2760 /* Make a copy of source_stack as change_stack is destructive. */
2761 regstack
= *source_stack
;
2763 /* It is better to output directly to the end of the block
2764 instead of to the edge, because emit_swap can do minimal
2765 insn scheduling. We can do this when there is only one
2766 edge out, and it is not abnormal. */
2767 if (EDGE_COUNT (source
->succs
) == 1)
2769 current_block
= source
;
2770 change_stack (BB_END (source
), ®stack
, target_stack
,
2771 (JUMP_P (BB_END (source
)) ? EMIT_BEFORE
: EMIT_AFTER
));
2777 current_block
= NULL
;
2780 /* ??? change_stack needs some point to emit insns after. */
2781 after
= emit_note (NOTE_INSN_DELETED
);
2783 change_stack (after
, ®stack
, target_stack
, EMIT_BEFORE
);
2788 insert_insn_on_edge (seq
, e
);
2794 /* Traverse all non-entry edges in the CFG, and emit the necessary
2795 edge compensation code to change the stack from stack_out of the
2796 source block to the stack_in of the destination block. */
2799 compensate_edges (void)
2801 bool inserted
= false;
2804 starting_stack_p
= false;
2807 if (bb
!= ENTRY_BLOCK_PTR
)
2812 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
2813 inserted
|= compensate_edge (e
);
2818 /* Select the better of two edges E1 and E2 to use to determine the
2819 stack layout for their shared destination basic block. This is
2820 typically the more frequently executed. The edge E1 may be NULL
2821 (in which case E2 is returned), but E2 is always non-NULL. */
2824 better_edge (edge e1
, edge e2
)
2829 if (EDGE_FREQUENCY (e1
) > EDGE_FREQUENCY (e2
))
2831 if (EDGE_FREQUENCY (e1
) < EDGE_FREQUENCY (e2
))
2834 if (e1
->count
> e2
->count
)
2836 if (e1
->count
< e2
->count
)
2839 /* Prefer critical edges to minimize inserting compensation code on
2842 if (EDGE_CRITICAL_P (e1
) != EDGE_CRITICAL_P (e2
))
2843 return EDGE_CRITICAL_P (e1
) ? e1
: e2
;
2845 /* Avoid non-deterministic behavior. */
2846 return (e1
->src
->index
< e2
->src
->index
) ? e1
: e2
;
2849 /* Convert stack register references in one block. */
2852 convert_regs_1 (basic_block block
)
2854 struct stack_def regstack
;
2855 block_info bi
= BLOCK_INFO (block
);
2858 bool control_flow_insn_deleted
= false;
2860 any_malformed_asm
= false;
2862 /* Choose an initial stack layout, if one hasn't already been chosen. */
2863 if (bi
->stack_in
.top
== -2)
2865 edge e
, beste
= NULL
;
2868 /* Select the best incoming edge (typically the most frequent) to
2869 use as a template for this basic block. */
2870 FOR_EACH_EDGE (e
, ei
, block
->preds
)
2871 if (BLOCK_INFO (e
->src
)->done
)
2872 beste
= better_edge (beste
, e
);
2875 propagate_stack (beste
);
2878 /* No predecessors. Create an arbitrary input stack. */
2879 bi
->stack_in
.top
= -1;
2880 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2881 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2882 bi
->stack_in
.reg
[++bi
->stack_in
.top
] = reg
;
2888 fprintf (dump_file
, "\nBasic block %d\nInput stack: ", block
->index
);
2889 print_stack (dump_file
, &bi
->stack_in
);
2892 /* Process all insns in this block. Keep track of NEXT so that we
2893 don't process insns emitted while substituting in INSN. */
2894 current_block
= block
;
2895 next
= BB_HEAD (block
);
2896 regstack
= bi
->stack_in
;
2897 starting_stack_p
= true;
2902 next
= NEXT_INSN (insn
);
2904 /* Ensure we have not missed a block boundary. */
2906 if (insn
== BB_END (block
))
2909 /* Don't bother processing unless there is a stack reg
2910 mentioned or if it's a CALL_INSN. */
2911 if (stack_regs_mentioned (insn
)
2916 fprintf (dump_file
, " insn %d input stack: ",
2918 print_stack (dump_file
, ®stack
);
2920 control_flow_insn_deleted
|= subst_stack_regs (insn
, ®stack
);
2921 starting_stack_p
= false;
2928 fprintf (dump_file
, "Expected live registers [");
2929 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2930 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
))
2931 fprintf (dump_file
, " %d", reg
);
2932 fprintf (dump_file
, " ]\nOutput stack: ");
2933 print_stack (dump_file
, ®stack
);
2936 insn
= BB_END (block
);
2938 insn
= PREV_INSN (insn
);
2940 /* If the function is declared to return a value, but it returns one
2941 in only some cases, some registers might come live here. Emit
2942 necessary moves for them. */
2944 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2946 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
)
2947 && ! TEST_HARD_REG_BIT (regstack
.reg_set
, reg
))
2952 fprintf (dump_file
, "Emitting insn initializing reg %d\n", reg
);
2954 set
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (reg
, SFmode
), not_a_num
);
2955 insn
= emit_insn_after (set
, insn
);
2956 control_flow_insn_deleted
|= subst_stack_regs (insn
, ®stack
);
2960 /* Amongst the insns possibly deleted during the substitution process above,
2961 might have been the only trapping insn in the block. We purge the now
2962 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2963 called at the end of convert_regs. The order in which we process the
2964 blocks ensures that we never delete an already processed edge.
2966 Note that, at this point, the CFG may have been damaged by the emission
2967 of instructions after an abnormal call, which moves the basic block end
2968 (and is the reason why we call fixup_abnormal_edges later). So we must
2969 be sure that the trapping insn has been deleted before trying to purge
2970 dead edges, otherwise we risk purging valid edges.
2972 ??? We are normally supposed not to delete trapping insns, so we pretend
2973 that the insns deleted above don't actually trap. It would have been
2974 better to detect this earlier and avoid creating the EH edge in the first
2975 place, still, but we don't have enough information at that time. */
2977 if (control_flow_insn_deleted
)
2978 purge_dead_edges (block
);
2980 /* Something failed if the stack lives don't match. If we had malformed
2981 asms, we zapped the instruction itself, but that didn't produce the
2982 same pattern of register kills as before. */
2984 gcc_assert (hard_reg_set_equal_p (regstack
.reg_set
, bi
->out_reg_set
)
2985 || any_malformed_asm
);
2986 bi
->stack_out
= regstack
;
2990 /* Convert registers in all blocks reachable from BLOCK. */
2993 convert_regs_2 (basic_block block
)
2995 basic_block
*stack
, *sp
;
2997 /* We process the blocks in a top-down manner, in a way such that one block
2998 is only processed after all its predecessors. The number of predecessors
2999 of every block has already been computed. */
3001 stack
= XNEWVEC (basic_block
, n_basic_blocks
);
3013 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3014 some dead EH outgoing edge after the deletion of the trapping
3015 insn inside the block. Since the number of predecessors of
3016 BLOCK's successors was computed based on the initial edge set,
3017 we check the necessity to process some of these successors
3018 before such an edge deletion may happen. However, there is
3019 a pitfall: if BLOCK is the only predecessor of a successor and
3020 the edge between them happens to be deleted, the successor
3021 becomes unreachable and should not be processed. The problem
3022 is that there is no way to preventively detect this case so we
3023 stack the successor in all cases and hand over the task of
3024 fixing up the discrepancy to convert_regs_1. */
3026 FOR_EACH_EDGE (e
, ei
, block
->succs
)
3027 if (! (e
->flags
& EDGE_DFS_BACK
))
3029 BLOCK_INFO (e
->dest
)->predecessors
--;
3030 if (!BLOCK_INFO (e
->dest
)->predecessors
)
3034 convert_regs_1 (block
);
3036 while (sp
!= stack
);
3041 /* Traverse all basic blocks in a function, converting the register
3042 references in each insn from the "flat" register file that gcc uses,
3043 to the stack-like registers the 387 uses. */
3053 /* Initialize uninitialized registers on function entry. */
3054 inserted
= convert_regs_entry ();
3056 /* Construct the desired stack for function exit. */
3057 convert_regs_exit ();
3058 BLOCK_INFO (EXIT_BLOCK_PTR
)->done
= 1;
3060 /* ??? Future: process inner loops first, and give them arbitrary
3061 initial stacks which emit_swap_insn can modify. This ought to
3062 prevent double fxch that often appears at the head of a loop. */
3064 /* Process all blocks reachable from all entry points. */
3065 FOR_EACH_EDGE (e
, ei
, ENTRY_BLOCK_PTR
->succs
)
3066 convert_regs_2 (e
->dest
);
3068 /* ??? Process all unreachable blocks. Though there's no excuse
3069 for keeping these even when not optimizing. */
3072 block_info bi
= BLOCK_INFO (b
);
3078 inserted
|= compensate_edges ();
3080 clear_aux_for_blocks ();
3082 fixup_abnormal_edges ();
3084 commit_edge_insertions ();
3087 fputc ('\n', dump_file
);
3090 /* Convert register usage from "flat" register file usage to a "stack
3091 register file. FILE is the dump file, if used.
3093 Construct a CFG and run life analysis. Then convert each insn one
3094 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3095 code duplication created when the converter inserts pop insns on
3105 /* Clean up previous run. */
3106 if (stack_regs_mentioned_data
!= NULL
)
3107 VEC_free (char, heap
, stack_regs_mentioned_data
);
3109 /* See if there is something to do. Flow analysis is quite
3110 expensive so we might save some compilation time. */
3111 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
3112 if (df_regs_ever_live_p (i
))
3114 if (i
> LAST_STACK_REG
)
3117 df_note_add_problem ();
3120 mark_dfs_back_edges ();
3122 /* Set up block info for each basic block. */
3123 alloc_aux_for_blocks (sizeof (struct block_info_def
));
3126 block_info bi
= BLOCK_INFO (bb
);
3131 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
3132 if (!(e
->flags
& EDGE_DFS_BACK
)
3133 && e
->src
!= ENTRY_BLOCK_PTR
)
3136 /* Set current register status at last instruction `uninitialized'. */
3137 bi
->stack_in
.top
= -2;
3139 /* Copy live_at_end and live_at_start into temporaries. */
3140 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
3142 if (REGNO_REG_SET_P (DF_LR_OUT (bb
), reg
))
3143 SET_HARD_REG_BIT (bi
->out_reg_set
, reg
);
3144 if (REGNO_REG_SET_P (DF_LR_IN (bb
), reg
))
3145 SET_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
);
3149 /* Create the replacement registers up front. */
3150 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
3152 enum machine_mode mode
;
3153 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
3155 mode
= GET_MODE_WIDER_MODE (mode
))
3156 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
3157 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
3159 mode
= GET_MODE_WIDER_MODE (mode
))
3160 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
3163 ix86_flags_rtx
= gen_rtx_REG (CCmode
, FLAGS_REG
);
3165 /* A QNaN for initializing uninitialized variables.
3167 ??? We can't load from constant memory in PIC mode, because
3168 we're inserting these instructions before the prologue and
3169 the PIC register hasn't been set up. In that case, fall back
3170 on zero, which we can get from `ldz'. */
3172 if ((flag_pic
&& !TARGET_64BIT
)
3173 || ix86_cmodel
== CM_LARGE
|| ix86_cmodel
== CM_LARGE_PIC
)
3174 not_a_num
= CONST0_RTX (SFmode
);
3177 not_a_num
= gen_lowpart (SFmode
, GEN_INT (0x7fc00000));
3178 not_a_num
= force_const_mem (SFmode
, not_a_num
);
3181 /* Allocate a cache for stack_regs_mentioned. */
3182 max_uid
= get_max_uid ();
3183 stack_regs_mentioned_data
= VEC_alloc (char, heap
, max_uid
+ 1);
3184 memset (VEC_address (char, stack_regs_mentioned_data
),
3185 0, sizeof (char) * max_uid
+ 1);
3189 free_aux_for_blocks ();
3192 #endif /* STACK_REGS */
3195 gate_handle_stack_regs (void)
3204 struct tree_opt_pass pass_stack_regs
=
3207 gate_handle_stack_regs
, /* gate */
3211 0, /* static_pass_number */
3212 TV_REG_STACK
, /* tv_id */
3213 0, /* properties_required */
3214 0, /* properties_provided */
3215 0, /* properties_destroyed */
3216 0, /* todo_flags_start */
3217 0, /* todo_flags_finish */
3221 /* Convert register usage from flat register file usage to a stack
3224 rest_of_handle_stack_regs (void)
3228 regstack_completed
= 1;
3233 struct tree_opt_pass pass_stack_regs_run
=
3237 rest_of_handle_stack_regs
, /* execute */
3240 0, /* static_pass_number */
3241 TV_REG_STACK
, /* tv_id */
3242 0, /* properties_required */
3243 0, /* properties_provided */
3244 0, /* properties_destroyed */
3245 0, /* todo_flags_start */
3248 TODO_ggc_collect
, /* todo_flags_finish */