1 2018-01-23 Richard Sandiford <richard.sandiford@linaro.org>
4 * doc/sourcebuild.texi (vect_float): Say that the selector
5 only describes the situation when -funsafe-math-optimizations is on.
6 (vect_float_strict): Document.
8 2018-01-23 Richard Sandiford <richard.sandiford@linaro.org>
10 PR tree-optimization/83965
11 * tree-vect-patterns.c (vect_reassociating_reduction_p): New function.
12 (vect_recog_dot_prod_pattern, vect_recog_sad_pattern): Use it
13 instead of checking only for a reduction.
14 (vect_recog_widen_sum_pattern): Likewise.
16 2018-01-23 Jan Hubicka <hubicka@ucw.cz>
18 * predict.c (probably_never_executed): Only use precise profile info.
19 (compute_function_frequency): Skip after inlining hack since we now
20 have quality checking.
22 2018-01-23 Jan Hubicka <hubicka@ucw.cz>
24 * profile-count.h (profile_probability::very_unlikely,
25 profile_probability::unlikely, profile_probability::even): Set
28 2018-01-23 Richard Biener <rguenther@suse.de>
30 PR tree-optimization/83963
31 * graphite-scop-detection.c (scop_detection::harmful_loop_in_region):
32 Properly terminate dominator walk when crossing the exit edge not
33 when visiting its source block.
35 2018-01-23 Jakub Jelinek <jakub@redhat.com>
38 * tree.c (maybe_wrap_with_location): Use NON_LVALUE_EXPR rather than
39 VIEW_CONVERT_EXPR to wrap CONST_DECLs.
41 2018-01-22 Jakub Jelinek <jakub@redhat.com>
43 PR tree-optimization/83957
44 * omp-expand.c (expand_omp_for_generic): Ignore virtual PHIs. Remove
45 semicolon after for body surrounded by braces.
47 PR tree-optimization/83081
48 * profile-count.h (profile_probability::split): New method.
49 * dojump.c (do_jump_1) <case TRUTH_ANDIF_EXPR, case TRUTH_ORIF_EXPR>:
50 Use profile_probability::split.
51 (do_compare_rtx_and_jump): Fix adjustment of probabilities
52 when splitting a single conditional jump into 2.
54 2018-01-22 David Malcolm <dmalcolm@redhat.com>
56 PR tree-optimization/69452
57 * tree-ssa-loop-im.c (class move_computations_dom_walker): Remove
60 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
62 * config/rl78/rl78-expand.md: New define_expand "bswaphi2"
63 * config/rl78/rl78-virt.md: New define_insn "*bswaphi2_virt"
64 * config/rl78/rl78-real.md: New define_insn "*bswaphi2_real"
66 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
68 * config/rl78/rl78-protos.h: New function declaration rl78_split_movdi
69 * config/rl78/rl78.md: New define_expand "movdi"
70 * config/rl78/rl78.c: New function definition rl78_split_movdi
72 2018-01-22 Michael Meissner <meissner@linux.vnet.ibm.com>
75 * config/rs6000/rs6000-protos.h (rs6000_split_signbit): Delete,
77 * config/rs6000/rs6000.c (rs6000_split_signbit): Likewise.
78 * config/rs6000/rs6000.md (signbit<mode>2): Change code for IEEE
79 128-bit to produce an UNSPEC move to get the double word with the
80 signbit and then a shift directly to do signbit.
81 (signbit<mode>2_dm): Replace old IEEE 128-bit signbit
82 implementation with a new version that just does either a direct
83 move or a regular move. Move memory interface to separate insns.
84 Move insns so they are next to the expander.
85 (signbit<mode>2_dm_mem_be): New combiner insns to combine load
86 with signbit move. Split big and little endian case.
87 (signbit<mode>2_dm_mem_le): Likewise.
88 (signbit<mode>2_dm_<su>ext): Delete, no longer used.
89 (signbit<mode>2_dm2): Likewise.
91 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
93 * config/rl78/rl78.md: New define_expand "anddi3".
95 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
97 * config/rl78/rl78.md: New define_expand "umindi3".
99 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
101 * config/rl78/rl78.md: New define_expand "smindi3".
103 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
105 * config/rl78/rl78.md: New define_expand "smaxdi3".
107 2018-01-22 Carl Love <cel@us.ibm.com>
109 * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
110 LVX_V1TI): Add macro expansion.
111 * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
112 definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
113 VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
114 * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
115 Change check to determine if the instruction is a byte reversing
116 entry. Fix typo in comment.
117 * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
118 for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
119 Add def_builtin calls for new builtins.
120 * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
121 Add define_insn expansion.
123 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
125 * config/rl78/rl78.md: New define_expand "umaxdi3".
127 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
129 * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
130 for non-QImode registers
132 2018-01-22 Richard Biener <rguenther@suse.de>
134 PR tree-optimization/83963
135 * graphite-scop-detection.c (scop_detection::get_sese): Delay
136 including the loop exit block.
137 (scop_detection::merge_sese): Likewise.
138 (scop_detection::add_scop): Do it here instead.
140 2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
142 * doc/sourcebuild.texi (arm_softfloat): Document.
144 2018-01-21 John David Anglin <danglin@gcc.gnu.org>
147 * config/pa/pa.c (pa_function_ok_for_sibcall): Use
148 targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
149 Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
151 2018-01-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
152 David Edelsohn <dje.gcc@gmail.com>
155 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
156 Change "crset eq" to "crset 2".
157 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
158 (*call_indirect_aix<mode>_nospec): Likewise.
159 (*call_value_indirect_aix<mode>_nospec): Likewise.
160 (*call_indirect_elfv2<mode>_nospec): Likewise.
161 (*call_value_indirect_elfv2<mode>_nospec): Likewise.
162 (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
163 change assembly output from . to $.
164 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
165 (indirect_jump<mode>_nospec): Change assembly output from . to $.
166 (*tablejump<mode>_internal1_nospec): Likewise.
168 2018-01-21 Oleg Endo <olegendo@gcc.gnu.org>
171 * config/sh/sh_optimize_sett_clrt.cc:
172 Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
174 2018-01-20 Richard Sandiford <richard.sandiford@linaro.org>
176 PR tree-optimization/83940
177 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
178 offset_dt to vect_constant_def rather than vect_unknown_def_type.
179 (vect_check_load_store_mask): Add a mask_dt_out parameter and
180 use it to pass back the definition type.
181 (vect_check_store_rhs): Likewise rhs_dt_out.
182 (vect_build_gather_load_calls): Add a mask_dt argument and use
183 it instead of a call to vect_is_simple_use.
184 (vectorizable_store): Update calls to vect_check_load_store_mask
185 and vect_check_store_rhs. Use the dt returned by the latter instead
186 of scatter_src_dt. Use the cached mask_dt and gs_info.offset_dt
187 instead of calls to vect_is_simple_use. Pass the scalar rather
188 than the vector operand to vect_is_simple_use when handling
189 second and subsequent copies of an rhs value.
190 (vectorizable_load): Update calls to vect_check_load_store_mask
191 and vect_build_gather_load_calls. Use the cached mask_dt and
192 gs_info.offset_dt instead of calls to vect_is_simple_use.
194 2018-01-20 Jakub Jelinek <jakub@redhat.com>
197 * tree-emutls.c: Include gimplify.h.
198 (lower_emutls_2): New function.
199 (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
200 with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
201 it before further processing.
204 * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
205 UINTVAL (trueop1) instead of INTVAL (op1).
207 2018-01-19 Jakub Jelinek <jakub@redhat.com>
211 * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
212 INCOMING_FRAME_SP_OFFSET if not defined.
213 (scan_trace): Add ENTRY argument. If true and
214 DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
215 emit a note to adjust the CFA offset.
216 (create_cfi_notes): Adjust scan_trace callers.
217 (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
218 INCOMING_FRAME_SP_OFFSET in the CIE.
219 * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
220 * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
222 * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
223 * doc/tm.texi: Regenerated.
225 2018-01-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
227 PR rtl-optimization/83147
228 * lra-constraints.c (remove_inheritance_pseudos): Use
229 lra_substitute_pseudo_within_insn.
231 2018-01-19 Tom de Vries <tom@codesourcery.com>
232 Cesar Philippidis <cesar@codesourcery.com>
235 * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
237 2018-01-19 Cesar Philippidis <cesar@codesourcery.com>
240 * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
241 spaces for function labels.
243 2018-01-19 Martin Liska <mliska@suse.cz>
245 * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
246 (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
247 (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
248 (PRED_OPCODE_POSITIVE): Change from 64 to 59.
249 (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
250 (PRED_CONST_RETURN): Change from 69 to 65.
251 (PRED_NULL_RETURN): Change from 91 to 71.
252 (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
253 (PRED_LOOP_GUARD): Change from 66 to 73.
255 2018-01-19 Martin Liska <mliska@suse.cz>
257 * predict.c (predict_insn_def): Add new assert.
258 (struct branch_predictor): Change type to signed integer.
259 (test_prediction_value_range): Amend test to cover
261 * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
262 (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
263 (PRED_LOOP_ITERATIONS_MAX): Likewise.
264 (PRED_LOOP_IV_COMPARE): Likewise.
265 * predict.h (PROB_UNINITIALIZED): Define new constant.
267 2018-01-19 Martin Liska <mliska@suse.cz>
269 * predict.c (dump_prediction): Add new format for
270 analyze_brprob.py script which is enabled with -details
272 * profile-count.h (precise_p): New function.
274 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
276 PR tree-optimization/83922
277 * tree-vect-loop.c (vect_verify_full_masking): Return false if
278 there are no statements that need masking.
279 (vect_active_double_reduction_p): New function.
280 (vect_analyze_loop_operations): Use it when handling phis that
281 are not in the loop header.
283 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
285 PR tree-optimization/83914
286 * tree-vect-loop.c (vectorizable_induction): Don't convert
287 init_expr or apply the peeling adjustment for inductions
288 that are nested within the vectorized loop.
290 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
292 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
295 2018-01-18 Jakub Jelinek <jakub@redhat.com>
299 * function.h (gimplify_parameters): Add gimple_seq * argument.
300 * function.c: Include gimple.h and options.h.
301 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
302 for the added local temporaries if needed.
303 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
304 if there are any parameter cleanups, wrap whole body into a
305 try/finally with the cleanups.
307 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
310 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
311 Use GET_MODE_CLASS for scalar floating point.
313 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
317 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
318 Fix call of call_cgraph_insertion_hooks.
320 2018-01-18 Martin Sebor <msebor@redhat.com>
322 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
324 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
327 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
330 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
333 * common.opt: (-ffile-prefix-map): New option.
334 * opts.c (common_handle_option): Defer it.
335 * opts-global.c (handle_common_deferred_options): Handle it.
336 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
337 * file-prefix-map.h: New file.
338 (remap_debug_filename, add_debug_prefix_map): ...here.
339 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
340 * final.c (debug_prefix_map, add_debug_prefix_map
341 remap_debug_filename): Move to...
342 * file-prefix-map.c: New file.
343 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
344 generalize, get rid of alloca(), use strrchr() instead of strchr().
345 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
346 Implement in terms of add_prefix_map().
347 (remap_macro_filename, remap_debug_filename): Implement in term of
349 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
350 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
351 * dbxout.c: Include file-prefix-map.h.
352 * varasm.c: Likewise.
353 * vmsdbgout.c: Likewise.
354 * xcoffout.c: Likewise.
355 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
356 * doc/cppopts.texi (-fmacro-prefix-map): Document.
357 * doc/invoke.texi (-ffile-prefix-map): Document.
358 (-fdebug-prefix-map): Update description.
360 2018-01-18 Martin Liska <mliska@suse.cz>
362 * config/i386/i386.c (indirect_thunk_name): Document that also
364 (output_indirect_thunk): Document why both instructions
365 (pause and lfence) are generated.
367 2018-01-18 Richard Biener <rguenther@suse.de>
369 PR tree-optimization/83887
370 * graphite-scop-detection.c
371 (scop_detection::get_nearest_dom_with_single_entry): Remove.
372 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
373 (scop_detection::merge_sese): Re-implement with a flood-fill
374 algorithm that properly finds a SESE region if it exists.
376 2018-01-18 Jakub Jelinek <jakub@redhat.com>
379 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
380 pointer_diff optimizations use view_convert instead of convert.
382 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
384 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
385 Generate different code for -mno-speculate-indirect-jumps.
386 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
387 (*call_indirect_aix<mode>): Disable for
388 -mno-speculate-indirect-jumps.
389 (*call_indirect_aix<mode>_nospec): New define_insn.
390 (*call_value_indirect_aix<mode>): Disable for
391 -mno-speculate-indirect-jumps.
392 (*call_value_indirect_aix<mode>_nospec): New define_insn.
393 (*sibcall_nonlocal_sysv<mode>): Generate different code for
394 -mno-speculate-indirect-jumps.
395 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
397 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
399 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
400 long double type, set the flags for noting the default long double
401 type, even if we don't pass or return a long double type.
403 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
406 * ipa-inline.c (flatten_function): Do not overwrite final inlining
409 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
411 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
412 support for merge[hl].
413 (fold_mergehl_helper): New helper function.
414 (tree-vector-builder.h): New #include for tree_vector_builder usage.
415 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
416 (altivec_vmrglw_direct): Add xxmrglw insn.
418 2018-01-17 Andrew Waterman <andrew@sifive.com>
420 * config/riscv/riscv.c (riscv_conditional_register_usage): If
421 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
423 2018-01-17 David Malcolm <dmalcolm@redhat.com>
426 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
427 call the lto_location_cache before reading the
428 DECL_SOURCE_LOCATION of the types.
430 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
431 Richard Sandiford <richard.sandiford@linaro.org>
433 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
434 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
435 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
436 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
437 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
439 * config/aarch64/constraints.md (aarch64_movti_operand):
441 * config/aarch64/predicates.md (Uti): Add new constraint.
443 2018-01-17 Carl Love <cel@us.ibm.com>
444 * config/rs6000/vsx.md (define_expand xl_len_r,
445 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
446 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
448 (define_expand, define_insn): Move the shift left from the
449 define_insn to the define_expand for lxvl and stxvl instructions.
450 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
451 and XL_LEN_R definitions to PURE.
453 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
455 * config/i386/i386.c (indirect_thunk_name): Declare regno
456 as unsigned int. Compare regno with INVALID_REGNUM.
457 (output_indirect_thunk): Ditto.
458 (output_indirect_thunk_function): Ditto.
459 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
460 in the call to output_indirect_thunk_function.
462 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
465 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
466 rather than the size of inner_type to determine the stack slot size
467 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
469 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
472 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
475 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
477 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
478 endian Linux systems to optionally enable multilibs for selecting
479 the long double type if the user configured an explicit type.
480 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
481 have no long double multilibs if not defined.
482 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
483 warn if the user used -mabi={ieee,ibm}longdouble and we built
484 multilibs for long double.
485 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
486 appropriate multilib option.
487 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
489 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
490 for building long double multilibs.
491 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
493 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
495 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
498 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
500 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
503 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
506 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
509 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
511 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
512 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
514 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
516 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
517 different rtl trees depending on TARGET_64BIT.
518 (rs6000_gen_lvx): Likewise.
520 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
522 * config/visium/visium.md (nop): Tweak comment.
523 (hazard_nop): Likewise.
525 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
527 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
528 -mspeculate-indirect-jumps.
529 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
530 for -mno-speculate-indirect-jumps.
531 (*call_indirect_elfv2<mode>_nospec): New define_insn.
532 (*call_value_indirect_elfv2<mode>): Disable for
533 -mno-speculate-indirect-jumps.
534 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
535 (indirect_jump): Emit different RTL for
536 -mno-speculate-indirect-jumps.
537 (*indirect_jump<mode>): Disable for
538 -mno-speculate-indirect-jumps.
539 (*indirect_jump<mode>_nospec): New define_insn.
540 (tablejump): Emit different RTL for
541 -mno-speculate-indirect-jumps.
542 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
543 (tablejumpsi_nospec): New define_expand.
544 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
545 (tablejumpdi_nospec): New define_expand.
546 (*tablejump<mode>_internal1): Disable for
547 -mno-speculate-indirect-jumps.
548 (*tablejump<mode>_internal1_nospec): New define_insn.
549 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
552 2018-01-16 Artyom Skrobov tyomitch@gmail.com
554 * caller-save.c (insert_save): Drop unnecessary parameter. All
557 2018-01-16 Jakub Jelinek <jakub@redhat.com>
558 Richard Biener <rguenth@suse.de>
561 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
562 return early, inline manually is_gimple_sizepos. Make sure if we
563 call gimplify_expr we don't end up with a gimple constant.
564 * tree.c (variably_modified_type_p): Don't return true for
565 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
566 * gimplify.h (is_gimple_sizepos): Remove.
568 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
570 PR tree-optimization/83857
571 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
572 vectorizable_live_operation for pure SLP statements.
573 (vectorizable_live_operation): Handle PHIs.
575 2018-01-16 Richard Biener <rguenther@suse.de>
577 PR tree-optimization/83867
578 * tree-vect-stmts.c (vect_transform_stmt): Precompute
579 nested_in_vect_loop_p since the scalar stmt may get invalidated.
581 2018-01-16 Jakub Jelinek <jakub@redhat.com>
584 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
585 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
586 If off is not INTEGER_CST, issue a may not be aligned warning
587 rather than isn't aligned. Use isn%'t rather than isn't.
588 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
590 <case MULT_EXPR>: Improve the case when bottom and one of the
591 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
592 operand, in that case check if the other operand is multiple of
593 bottom divided by the INTEGER_CST operand.
595 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
598 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
599 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
600 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
601 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
602 * config/pa/pa.c (pa_function_arg_advance): Likewise.
603 (pa_function_arg, pa_arg_partial_bytes): Likewise.
604 (pa_function_arg_size): New function.
606 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
608 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
609 in a separate statement.
611 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
613 PR tree-optimization/83847
614 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
615 group gathers and scatters.
617 2018-01-16 Jakub Jelinek <jakub@redhat.com>
619 PR rtl-optimization/86620
620 * params.def (max-sched-ready-insns): Bump minimum value to 1.
622 PR rtl-optimization/83213
623 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
624 to last if both are JUMP_INSNs.
626 PR tree-optimization/83843
627 * gimple-ssa-store-merging.c
628 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
629 store_immediate_info for bswap/nop orig_stores.
631 2018-01-15 Andrew Waterman <andrew@sifive.com>
633 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
635 <UDIV>: Increase cost if !TARGET_DIV.
637 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
639 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
640 (define_attr "cr_logical_3op"): New.
641 (cceq_ior_compare): Adjust.
642 (cceq_ior_compare_complement): Adjust.
643 (*cceq_rev_compare): Adjust.
644 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
645 (is_cracked_insn): Adjust.
646 (insn_must_be_first_in_group): Adjust.
647 * config/rs6000/40x.md: Adjust.
648 * config/rs6000/440.md: Adjust.
649 * config/rs6000/476.md: Adjust.
650 * config/rs6000/601.md: Adjust.
651 * config/rs6000/603.md: Adjust.
652 * config/rs6000/6xx.md: Adjust.
653 * config/rs6000/7450.md: Adjust.
654 * config/rs6000/7xx.md: Adjust.
655 * config/rs6000/8540.md: Adjust.
656 * config/rs6000/cell.md: Adjust.
657 * config/rs6000/e300c2c3.md: Adjust.
658 * config/rs6000/e500mc.md: Adjust.
659 * config/rs6000/e500mc64.md: Adjust.
660 * config/rs6000/e5500.md: Adjust.
661 * config/rs6000/e6500.md: Adjust.
662 * config/rs6000/mpc.md: Adjust.
663 * config/rs6000/power4.md: Adjust.
664 * config/rs6000/power5.md: Adjust.
665 * config/rs6000/power6.md: Adjust.
666 * config/rs6000/power7.md: Adjust.
667 * config/rs6000/power8.md: Adjust.
668 * config/rs6000/power9.md: Adjust.
669 * config/rs6000/rs64.md: Adjust.
670 * config/rs6000/titan.md: Adjust.
672 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
674 * config/i386/predicates.md (indirect_branch_operand): Rewrite
675 ix86_indirect_branch_register logic.
677 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
679 * config/i386/constraints.md (Bs): Update
680 ix86_indirect_branch_register check. Don't check
681 ix86_indirect_branch_register with GOT_memory_operand.
683 * config/i386/predicates.md (GOT_memory_operand): Don't check
684 ix86_indirect_branch_register here.
685 (GOT32_symbol_operand): Likewise.
687 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
689 * config/i386/predicates.md (constant_call_address_operand):
690 Rewrite ix86_indirect_branch_register logic.
691 (sibcall_insn_operand): Likewise.
693 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
695 * config/i386/constraints.md (Bs): Replace
696 ix86_indirect_branch_thunk_register with
697 ix86_indirect_branch_register.
699 * config/i386/i386.md (indirect_jump): Likewise.
700 (tablejump): Likewise.
701 (*sibcall_memory): Likewise.
702 (*sibcall_value_memory): Likewise.
703 Peepholes of indirect call and jump via memory: Likewise.
704 * config/i386/i386.opt: Likewise.
705 * config/i386/predicates.md (indirect_branch_operand): Likewise.
706 (GOT_memory_operand): Likewise.
707 (call_insn_operand): Likewise.
708 (sibcall_insn_operand): Likewise.
709 (GOT32_symbol_operand): Likewise.
711 2018-01-15 Jakub Jelinek <jakub@redhat.com>
714 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
715 type rather than type addr's type points to.
716 (expand_omp_atomic_mutex): Likewise.
717 (expand_omp_atomic): Likewise.
719 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
722 * config/i386/i386.c (output_indirect_thunk_function): Use
723 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
724 for __x86_return_thunk.
726 2018-01-15 Richard Biener <rguenther@suse.de>
729 * expmed.c (extract_bit_field_1): Fix typo.
731 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
734 * config/arm/iterators.md (VF): New mode iterator.
735 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
736 Remove integer-related logic from pattern.
737 (neon_vabd<mode>_3): Likewise.
739 2018-01-15 Jakub Jelinek <jakub@redhat.com>
742 * common.opt (fstrict-overflow): No longer an alias.
743 (fwrapv-pointer): New option.
744 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
745 also for pointer types based on flag_wrapv_pointer.
746 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
747 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
748 opts->x_flag_wrapv got set.
749 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
750 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
751 POINTER_TYPE_OVERFLOW_UNDEFINED.
752 * match.pd: Likewise in address comparison pattern.
753 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
755 2018-01-15 Richard Biener <rguenther@suse.de>
758 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
759 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
760 Reset type names to their identifier if their TYPE_DECL doesn't
761 have linkage (and thus is used for ODR and devirt).
762 (save_debug_info_for_decl): Remove.
763 (save_debug_info_for_type): Likewise.
764 (add_tree_to_fld_list): Adjust.
765 * tree-pretty-print.c (dump_generic_node): Make dumping of
766 type names more robust.
768 2018-01-15 Richard Biener <rguenther@suse.de>
770 * BASE-VER: Bump to 8.0.1.
772 2018-01-14 Martin Sebor <msebor@redhat.com>
775 * builtins.c (check_access): Avoid warning when the no-warning bit
778 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
780 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
781 * ira-color (allocno_hard_regs_compare): Likewise.
783 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
786 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
787 Use .pushsection/.popsection.
789 2018-01-14 Martin Sebor <msebor@redhat.com>
792 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
794 2018-01-14 Jakub Jelinek <jakub@redhat.com>
796 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
797 entry from extra_headers.
798 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
799 extra_headers, make the list bitwise identical to the i?86-*-* one.
801 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
803 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
804 -mcmodel=large with -mindirect-branch=thunk,
805 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
806 -mfunction-return=thunk-extern.
807 * doc/invoke.texi: Document -mcmodel=large is incompatible with
808 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
809 -mfunction-return=thunk and -mfunction-return=thunk-extern.
811 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
813 * config/i386/i386.c (print_reg): Print the name of the full
814 integer register without '%'.
815 (ix86_print_operand): Handle 'V'.
816 * doc/extend.texi: Document 'V' modifier.
818 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
820 * config/i386/constraints.md (Bs): Disallow memory operand for
821 -mindirect-branch-register.
823 * config/i386/predicates.md (indirect_branch_operand): Likewise.
824 (GOT_memory_operand): Likewise.
825 (call_insn_operand): Likewise.
826 (sibcall_insn_operand): Likewise.
827 (GOT32_symbol_operand): Likewise.
828 * config/i386/i386.md (indirect_jump): Call convert_memory_address
829 for -mindirect-branch-register.
830 (tablejump): Likewise.
831 (*sibcall_memory): Likewise.
832 (*sibcall_value_memory): Likewise.
833 Disallow peepholes of indirect call and jump via memory for
834 -mindirect-branch-register.
835 (*call_pop): Replace m with Bw.
836 (*call_value_pop): Likewise.
837 (*sibcall_pop_memory): Replace m with Bs.
838 * config/i386/i386.opt (mindirect-branch-register): New option.
839 * doc/invoke.texi: Document -mindirect-branch-register option.
841 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
843 * config/i386/i386-protos.h (ix86_output_function_return): New.
844 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
845 set function_return_type.
846 (indirect_thunk_name): Add ret_p to indicate thunk for function
848 (output_indirect_thunk_function): Pass false to
850 (ix86_output_indirect_branch_via_reg): Likewise.
851 (ix86_output_indirect_branch_via_push): Likewise.
852 (output_indirect_thunk_function): Create alias for function
853 return thunk if regno < 0.
854 (ix86_output_function_return): New function.
855 (ix86_handle_fndecl_attribute): Handle function_return.
856 (ix86_attribute_table): Add function_return.
857 * config/i386/i386.h (machine_function): Add
858 function_return_type.
859 * config/i386/i386.md (simple_return_internal): Use
860 ix86_output_function_return.
861 (simple_return_internal_long): Likewise.
862 * config/i386/i386.opt (mfunction-return=): New option.
863 (indirect_branch): Mention -mfunction-return=.
864 * doc/extend.texi: Document function_return function attribute.
865 * doc/invoke.texi: Document -mfunction-return= option.
867 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
869 * config/i386/i386-opts.h (indirect_branch): New.
870 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
871 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
872 with local indirect jump when converting indirect call and jump.
873 (ix86_set_indirect_branch_type): New.
874 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
875 (indirectlabelno): New.
876 (indirect_thunk_needed): Likewise.
877 (indirect_thunk_bnd_needed): Likewise.
878 (indirect_thunks_used): Likewise.
879 (indirect_thunks_bnd_used): Likewise.
880 (INDIRECT_LABEL): Likewise.
881 (indirect_thunk_name): Likewise.
882 (output_indirect_thunk): Likewise.
883 (output_indirect_thunk_function): Likewise.
884 (ix86_output_indirect_branch_via_reg): Likewise.
885 (ix86_output_indirect_branch_via_push): Likewise.
886 (ix86_output_indirect_branch): Likewise.
887 (ix86_output_indirect_jmp): Likewise.
888 (ix86_code_end): Call output_indirect_thunk_function if needed.
889 (ix86_output_call_insn): Call ix86_output_indirect_branch if
891 (ix86_handle_fndecl_attribute): Handle indirect_branch.
892 (ix86_attribute_table): Add indirect_branch.
893 * config/i386/i386.h (machine_function): Add indirect_branch_type
894 and has_local_indirect_jump.
895 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
897 (tablejump): Likewise.
898 (*indirect_jump): Use ix86_output_indirect_jmp.
899 (*tablejump_1): Likewise.
900 (simple_return_indirect_internal): Likewise.
901 * config/i386/i386.opt (mindirect-branch=): New option.
902 (indirect_branch): New.
905 (thunk-inline): Likewise.
906 (thunk-extern): Likewise.
907 * doc/extend.texi: Document indirect_branch function attribute.
908 * doc/invoke.texi: Document -mindirect-branch= option.
910 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
913 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
915 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
917 * ipa-inline.c (want_inline_small_function_p): Return false if
918 inlining has already failed with CIF_FINAL_ERROR.
919 (update_caller_keys): Call want_inline_small_function_p before
921 (update_callee_keys): Likewise.
923 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
925 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
927 (rs6000_quadword_masked_address_p): Likewise.
928 (quad_aligned_load_p): Likewise.
929 (quad_aligned_store_p): Likewise.
930 (const_load_sequence_p): Add comment to describe the outer-most loop.
931 (mimic_memory_attributes_and_flags): New function.
932 (rs6000_gen_stvx): Likewise.
933 (replace_swapped_aligned_store): Likewise.
934 (rs6000_gen_lvx): Likewise.
935 (replace_swapped_aligned_load): Likewise.
936 (replace_swapped_load_constant): Capitalize argument name in
937 comment describing this function.
938 (rs6000_analyze_swaps): Add a third pass to search for vector loads
939 and stores that access quad-word aligned addresses and replace
940 with stvx or lvx instructions when appropriate.
941 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
942 New function prototype.
943 (rs6000_quadword_masked_address_p): Likewise.
944 (rs6000_gen_lvx): Likewise.
945 (rs6000_gen_stvx): Likewise.
946 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
947 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
948 when memory address is aligned.
949 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
950 this split to select lvx instruction when memory address is aligned.
951 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
952 instruction when memory address is aligned.
953 (*vsx_le_perm_load_v16qi): Likewise.
954 (four unnamed splitters): Modify to select the stvx instruction
955 when memory is aligned.
957 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
959 * predict.c (determine_unlikely_bbs): Handle correctly BBs
960 which appears in the queue multiple times.
962 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
963 Alan Hayward <alan.hayward@arm.com>
964 David Sherwood <david.sherwood@arm.com>
966 * tree-vectorizer.h (vec_lower_bound): New structure.
967 (_loop_vec_info): Add check_nonzero and lower_bounds.
968 (LOOP_VINFO_CHECK_NONZERO): New macro.
969 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
970 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
971 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
972 fields. Make seg_len the distance travelled, not including the
974 (dr_direction_indicator): Declare.
975 (dr_zero_step_indicator): Likewise.
976 (dr_known_forward_stride_p): Likewise.
977 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
979 (runtime_alias_check_p): Allow runtime alias checks with
981 (operator ==): Compare access_size and align.
982 (prune_runtime_alias_test_list): Rework for new distinction between
983 the access_size and seg_len.
984 (create_intersect_range_checks_index): Likewise. Cope with polynomial
986 (get_segment_min_max): New function.
987 (create_intersect_range_checks): Use it.
988 (dr_step_indicator): New function.
989 (dr_direction_indicator): Likewise.
990 (dr_zero_step_indicator): Likewise.
991 (dr_known_forward_stride_p): Likewise.
992 * tree-loop-distribution.c (data_ref_segment_size): Return
993 DR_STEP * (niters - 1).
994 (compute_alias_check_pairs): Update call to the dr_with_seg_len
996 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
997 (vect_preserves_scalar_order_p): New function, split out from...
998 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
999 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
1000 (vect_vfa_access_size): New function.
1001 (vect_vfa_align): Likewise.
1002 (vect_compile_time_alias): Take access_size_a and access_b arguments.
1003 (dump_lower_bound): New function.
1004 (vect_check_lower_bound): Likewise.
1005 (vect_small_gap_p): Likewise.
1006 (vectorizable_with_step_bound_p): Likewise.
1007 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
1008 depencies if the vectorization factor is 1. Convert the checks
1009 for nonzero steps into checks on the bounds of DR_STEP. Try using
1010 a bunds check for variable steps if the minimum required step is
1011 relatively small. Update calls to the dr_with_seg_len
1012 constructor and to vect_compile_time_alias.
1013 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
1015 (vect_loop_versioning): Call it.
1016 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
1018 (vect_estimate_min_profitable_iters): Account for any bounds checks.
1020 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1021 Alan Hayward <alan.hayward@arm.com>
1022 David Sherwood <david.sherwood@arm.com>
1024 * doc/sourcebuild.texi (vect_scatter_store): Document.
1025 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
1027 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
1029 * genopinit.c (main): Add supports_vec_scatter_store and
1030 supports_vec_scatter_store_cached to target_optabs.
1031 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
1032 IFN_MASK_SCATTER_STORE.
1033 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
1035 * internal-fn.h (internal_store_fn_p): Declare.
1036 (internal_fn_stored_value_index): Likewise.
1037 * internal-fn.c (scatter_store_direct): New macro.
1038 (expand_scatter_store_optab_fn): New function.
1039 (direct_scatter_store_optab_supported_p): New macro.
1040 (internal_store_fn_p): New function.
1041 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
1042 IFN_MASK_SCATTER_STORE.
1043 (internal_fn_mask_index): Likewise.
1044 (internal_fn_stored_value_index): New function.
1045 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
1047 * optabs-query.h (supports_vec_scatter_store_p): Declare.
1048 * optabs-query.c (supports_vec_scatter_store_p): New function.
1049 * tree-vectorizer.h (vect_get_store_rhs): Declare.
1050 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
1051 true for scatter stores.
1052 (vect_gather_scatter_fn_p): Handle scatter stores too.
1053 (vect_check_gather_scatter): Consider using scatter stores if
1054 supports_vec_scatter_store_p.
1055 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
1057 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1058 internal_fn_stored_value_index.
1059 (check_load_store_masking): Handle scatter stores too.
1060 (vect_get_store_rhs): Make public.
1061 (vectorizable_call): Use internal_store_fn_p.
1062 (vectorizable_store): Handle scatter store internal functions.
1063 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
1064 when deciding whether the end of the group has been reached.
1065 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
1066 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
1067 (mask_scatter_store<mode>): New insns.
1069 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1070 Alan Hayward <alan.hayward@arm.com>
1071 David Sherwood <david.sherwood@arm.com>
1073 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
1074 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
1075 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
1077 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
1078 Use vect_truncate_gather_scatter_offset if we can't treat the
1079 operation as a normal gather load or scatter store.
1080 (get_group_load_store_type): Take the gather_scatter_info
1081 as argument. Try using a gather load or scatter store for
1082 single-element groups.
1083 (get_load_store_type): Update calls to get_group_load_store_type
1084 and vect_use_strided_gather_scatters_p.
1086 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1087 Alan Hayward <alan.hayward@arm.com>
1088 David Sherwood <david.sherwood@arm.com>
1090 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
1091 optional tree argument.
1092 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
1094 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
1095 but continue to use the current value as a fallback.
1096 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
1097 to compare the updates.
1098 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1099 (get_load_store_type): Use it when handling a strided access.
1100 (vect_get_strided_load_store_ops): New function.
1101 (vect_get_data_ptr_increment): Likewise.
1102 (vectorizable_load): Handle strided gather loads. Always pass
1103 a step to vect_create_data_ref_ptr and bump_vector_ptr.
1105 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1106 Alan Hayward <alan.hayward@arm.com>
1107 David Sherwood <david.sherwood@arm.com>
1109 * doc/md.texi (gather_load@var{m}): Document.
1110 (mask_gather_load@var{m}): Likewise.
1111 * genopinit.c (main): Add supports_vec_gather_load and
1112 supports_vec_gather_load_cached to target_optabs.
1113 * optabs-tree.c (init_tree_optimization_optabs): Use
1114 ggc_cleared_alloc to allocate target_optabs.
1115 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1116 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1118 * internal-fn.h (internal_load_fn_p): Declare.
1119 (internal_gather_scatter_fn_p): Likewise.
1120 (internal_fn_mask_index): Likewise.
1121 (internal_gather_scatter_fn_supported_p): Likewise.
1122 * internal-fn.c (gather_load_direct): New macro.
1123 (expand_gather_load_optab_fn): New function.
1124 (direct_gather_load_optab_supported_p): New macro.
1125 (direct_internal_fn_optab): New function.
1126 (internal_load_fn_p): Likewise.
1127 (internal_gather_scatter_fn_p): Likewise.
1128 (internal_fn_mask_index): Likewise.
1129 (internal_gather_scatter_fn_supported_p): Likewise.
1130 * optabs-query.c (supports_at_least_one_mode_p): New function.
1131 (supports_vec_gather_load_p): Likewise.
1132 * optabs-query.h (supports_vec_gather_load_p): Declare.
1133 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1134 and memory_type field.
1135 (NUM_PATTERNS): Bump to 15.
1136 * tree-vect-data-refs.c: Include internal-fn.h.
1137 (vect_gather_scatter_fn_p): New function.
1138 (vect_describe_gather_scatter_call): Likewise.
1139 (vect_check_gather_scatter): Try using internal functions for
1140 gather loads. Recognize existing calls to a gather load function.
1141 (vect_analyze_data_refs): Consider using gather loads if
1142 supports_vec_gather_load_p.
1143 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1144 (vect_get_gather_scatter_offset_type): Likewise.
1145 (vect_convert_mask_for_vectype): Likewise.
1146 (vect_add_conversion_to_patterm): Likewise.
1147 (vect_try_gather_scatter_pattern): Likewise.
1148 (vect_recog_gather_scatter_pattern): New pattern recognizer.
1149 (vect_vect_recog_func_ptrs): Add it.
1150 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1151 internal_fn_mask_index and internal_gather_scatter_fn_p.
1152 (check_load_store_masking): Take the gather_scatter_info as an
1153 argument and handle gather loads.
1154 (vect_get_gather_scatter_ops): New function.
1155 (vectorizable_call): Check internal_load_fn_p.
1156 (vectorizable_load): Likewise. Handle gather load internal
1158 (vectorizable_store): Update call to check_load_store_masking.
1159 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1160 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1161 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1162 (aarch64_gather_scale_operand_d): New predicates.
1163 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1164 (mask_gather_load<mode>): New insns.
1166 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1167 Alan Hayward <alan.hayward@arm.com>
1168 David Sherwood <david.sherwood@arm.com>
1170 * optabs.def (fold_left_plus_optab): New optab.
1171 * doc/md.texi (fold_left_plus_@var{m}): Document.
1172 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1173 * internal-fn.c (fold_left_direct): Define.
1174 (expand_fold_left_optab_fn): Likewise.
1175 (direct_fold_left_optab_supported_p): Likewise.
1176 * fold-const-call.c (fold_const_fold_left): New function.
1177 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1178 * tree-parloops.c (valid_reduction_p): New function.
1179 (gather_scalar_reductions): Use it.
1180 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1181 (vect_finish_replace_stmt): Declare.
1182 * tree-vect-loop.c (fold_left_reduction_fn): New function.
1183 (needs_fold_left_reduction_p): New function, split out from...
1184 (vect_is_simple_reduction): ...here. Accept reductions that
1185 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1186 (vect_force_simple_reduction): Also store the reduction type in
1187 the assignment's STMT_VINFO_REDUC_TYPE.
1188 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1189 (merge_with_identity): New function.
1190 (vect_expand_fold_left): Likewise.
1191 (vectorize_fold_left_reduction): Likewise.
1192 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
1193 scalar phi in place for it. Check for target support and reject
1194 cases that would reassociate the operation. Defer the transform
1195 phase to vectorize_fold_left_reduction.
1196 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1197 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1198 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1200 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1202 * tree-if-conv.c (predicate_mem_writes): Remove redundant
1203 call to ifc_temp_var.
1205 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1206 Alan Hayward <alan.hayward@arm.com>
1207 David Sherwood <david.sherwood@arm.com>
1209 * target.def (legitimize_address_displacement): Take the original
1210 offset as a poly_int.
1211 * targhooks.h (default_legitimize_address_displacement): Update
1213 * targhooks.c (default_legitimize_address_displacement): Likewise.
1214 * doc/tm.texi: Regenerate.
1215 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1216 as an argument, moving assert of ad->disp == ad->disp_term to...
1217 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
1218 Try calling targetm.legitimize_address_displacement before expanding
1219 the address rather than afterwards, and adjust for the new interface.
1220 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1221 Match the new hook interface. Handle SVE addresses.
1222 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1225 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1227 * Makefile.in (OBJS): Add early-remat.o.
1228 * target.def (select_early_remat_modes): New hook.
1229 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1230 * doc/tm.texi: Regenerate.
1231 * targhooks.h (default_select_early_remat_modes): Declare.
1232 * targhooks.c (default_select_early_remat_modes): New function.
1233 * timevar.def (TV_EARLY_REMAT): New timevar.
1234 * passes.def (pass_early_remat): New pass.
1235 * tree-pass.h (make_pass_early_remat): Declare.
1236 * early-remat.c: New file.
1237 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1239 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1241 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1242 Alan Hayward <alan.hayward@arm.com>
1243 David Sherwood <david.sherwood@arm.com>
1245 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1246 vfm1 with a bound_epilog parameter.
1247 (vect_do_peeling): Update calls accordingly, and move the prologue
1248 call earlier in the function. Treat the base bound_epilog as 0 for
1249 fully-masked loops and retain vf - 1 for other loops. Add 1 to
1250 this base when peeling for gaps.
1251 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1252 with fully-masked loops.
1253 (vect_estimate_min_profitable_iters): Handle the single peeled
1254 iteration in that case.
1256 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1257 Alan Hayward <alan.hayward@arm.com>
1258 David Sherwood <david.sherwood@arm.com>
1260 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1261 single-element interleaving even if the size is not a power of 2.
1262 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1263 accesses for single-element interleaving if the group size is
1266 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1267 Alan Hayward <alan.hayward@arm.com>
1268 David Sherwood <david.sherwood@arm.com>
1270 * doc/md.texi (fold_extract_last_@var{m}): Document.
1271 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1272 * optabs.def (fold_extract_last_optab): New optab.
1273 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1274 * internal-fn.c (fold_extract_direct): New macro.
1275 (expand_fold_extract_optab_fn): Likewise.
1276 (direct_fold_extract_optab_supported_p): Likewise.
1277 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1278 * tree-vect-loop.c (vect_model_reduction_cost): Handle
1279 EXTRACT_LAST_REDUCTION.
1280 (get_initial_def_for_reduction): Do not create an initial vector
1281 for EXTRACT_LAST_REDUCTION reductions.
1282 (vectorizable_reduction): Leave the scalar phi in place for
1283 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1284 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1285 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1286 transform phase to vectorizable_condition.
1287 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1289 (vect_finish_stmt_generation): ...here.
1290 (vect_finish_replace_stmt): New function.
1291 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1292 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1294 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1296 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1297 Alan Hayward <alan.hayward@arm.com>
1298 David Sherwood <david.sherwood@arm.com>
1300 * doc/md.texi (extract_last_@var{m}): Document.
1301 * optabs.def (extract_last_optab): New optab.
1302 * internal-fn.def (EXTRACT_LAST): New internal function.
1303 * internal-fn.c (cond_unary_direct): New macro.
1304 (expand_cond_unary_optab_fn): Likewise.
1305 (direct_cond_unary_optab_supported_p): Likewise.
1306 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1307 loops using EXTRACT_LAST.
1308 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1309 (extract_last_<mode>): ...this optab.
1310 (vec_extract<mode><Vel>): Update accordingly.
1312 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1313 Alan Hayward <alan.hayward@arm.com>
1314 David Sherwood <david.sherwood@arm.com>
1316 * target.def (empty_mask_is_expensive): New hook.
1317 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1318 * doc/tm.texi: Regenerate.
1319 * targhooks.h (default_empty_mask_is_expensive): Declare.
1320 * targhooks.c (default_empty_mask_is_expensive): New function.
1321 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1322 if the target says that empty masks are expensive.
1323 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1325 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1327 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1328 Alan Hayward <alan.hayward@arm.com>
1329 David Sherwood <david.sherwood@arm.com>
1331 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1332 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1333 (vect_use_loop_mask_for_alignment_p): New function.
1334 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1335 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1336 niters_skip argument. Make sure that the first niters_skip elements
1337 of the first iteration are inactive.
1338 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1339 Update call to vect_set_loop_masks_directly.
1340 (get_misalign_in_elems): New function, split out from...
1341 (vect_gen_prolog_loop_niters): ...here.
1342 (vect_update_init_of_dr): Take a code argument that specifies whether
1343 the adjustment should be added or subtracted.
1344 (vect_update_init_of_drs): Likewise.
1345 (vect_prepare_for_masked_peels): New function.
1346 (vect_do_peeling): Skip prologue peeling if we're using a mask
1347 instead. Update call to vect_update_inits_of_drs.
1348 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1350 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1351 alignment. Do not include the number of peeled iterations in
1352 the minimum threshold in that case.
1353 (vectorizable_induction): Adjust the start value down by
1354 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1355 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1356 Take the number of skipped iterations into account when calculating
1358 * tree-vect-stmts.c (vect_gen_while_not): New function.
1360 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1361 Alan Hayward <alan.hayward@arm.com>
1362 David Sherwood <david.sherwood@arm.com>
1364 * doc/sourcebuild.texi (vect_fully_masked): Document.
1365 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1367 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1369 (vect_analyze_loop_2): ...here. Don't check the vectorization
1370 factor against the number of loop iterations if the loop is
1373 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1374 Alan Hayward <alan.hayward@arm.com>
1375 David Sherwood <david.sherwood@arm.com>
1377 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1378 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1379 (dump_groups): Update accordingly.
1380 (iv_use::mem_type): New member variable.
1381 (address_p): New function.
1382 (record_use): Add a mem_type argument and initialize the new
1384 (record_group_use): Add a mem_type argument. Use address_p.
1385 Remove obsolete null checks of base_object. Update call to record_use.
1386 (find_interesting_uses_op): Update call to record_group_use.
1387 (find_interesting_uses_cond): Likewise.
1388 (find_interesting_uses_address): Likewise.
1389 (get_mem_type_for_internal_fn): New function.
1390 (find_address_like_use): Likewise.
1391 (find_interesting_uses_stmt): Try find_address_like_use before
1392 calling find_interesting_uses_op.
1393 (addr_offset_valid_p): Use the iv mem_type field as the type
1394 of the addressed memory.
1395 (add_autoinc_candidates): Likewise.
1396 (get_address_cost): Likewise.
1397 (split_small_address_groups_p): Use address_p.
1398 (split_address_groups): Likewise.
1399 (add_iv_candidate_for_use): Likewise.
1400 (autoinc_possible_for_pair): Likewise.
1401 (rewrite_groups): Likewise.
1402 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1403 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1404 (get_alias_ptr_type_for_ptr_address): New function.
1405 (rewrite_use_address): Rewrite address uses in calls that were
1406 identified by find_address_like_use.
1408 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1409 Alan Hayward <alan.hayward@arm.com>
1410 David Sherwood <david.sherwood@arm.com>
1412 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1414 * gimple-expr.h (is_gimple_addressable: Likewise.
1415 * gimple-expr.c (is_gimple_address): Likewise.
1416 * internal-fn.c (expand_call_mem_ref): New function.
1417 (expand_mask_load_optab_fn): Use it.
1418 (expand_mask_store_optab_fn): Likewise.
1420 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1421 Alan Hayward <alan.hayward@arm.com>
1422 David Sherwood <david.sherwood@arm.com>
1424 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1425 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1426 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1427 (cond_umax@var{mode}): Document.
1428 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1429 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1430 (cond_umin_optab, cond_umax_optab): New optabs.
1431 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1432 (COND_IOR, COND_XOR): New internal functions.
1433 * internal-fn.h (get_conditional_internal_fn): Declare.
1434 * internal-fn.c (cond_binary_direct): New macro.
1435 (expand_cond_binary_optab_fn): Likewise.
1436 (direct_cond_binary_optab_supported_p): Likewise.
1437 (get_conditional_internal_fn): New function.
1438 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1439 Cope with reduction statements that are vectorized as calls rather
1441 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1442 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1443 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1444 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1445 (UNSPEC_COND_EOR): New unspecs.
1446 (optab): Add mappings for them.
1447 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1448 (sve_int_op, sve_fp_op): New int attributes.
1450 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1451 Alan Hayward <alan.hayward@arm.com>
1452 David Sherwood <david.sherwood@arm.com>
1454 * optabs.def (while_ult_optab): New optab.
1455 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1456 * internal-fn.def (WHILE_ULT): New internal function.
1457 * internal-fn.h (direct_internal_fn_supported_p): New override
1458 that takes two types as argument.
1459 * internal-fn.c (while_direct): New macro.
1460 (expand_while_optab_fn): New function.
1461 (convert_optab_supported_p): Likewise.
1462 (direct_while_optab_supported_p): New macro.
1463 * wide-int.h (wi::udiv_ceil): New function.
1464 * tree-vectorizer.h (rgroup_masks): New structure.
1465 (vec_loop_masks): New typedef.
1466 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1468 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1469 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1470 (vect_max_vf): New function.
1471 (slpeel_make_loop_iterate_ntimes): Delete.
1472 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1473 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1474 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1475 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1476 internal-fn.h, stor-layout.h and optabs-query.h.
1477 (vect_set_loop_mask): New function.
1478 (add_preheader_seq): Likewise.
1479 (add_header_seq): Likewise.
1480 (interleave_supported_p): Likewise.
1481 (vect_maybe_permute_loop_masks): Likewise.
1482 (vect_set_loop_masks_directly): Likewise.
1483 (vect_set_loop_condition_masked): Likewise.
1484 (vect_set_loop_condition_unmasked): New function, split out from
1485 slpeel_make_loop_iterate_ntimes.
1486 (slpeel_make_loop_iterate_ntimes): Rename to..
1487 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1488 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1489 (vect_do_peeling): Update call accordingly.
1490 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1492 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1493 mask_compare_type, can_fully_mask_p and fully_masked_p.
1494 (release_vec_loop_masks): New function.
1495 (_loop_vec_info): Use it to free the loop masks.
1496 (can_produce_all_loop_masks_p): New function.
1497 (vect_get_max_nscalars_per_iter): Likewise.
1498 (vect_verify_full_masking): Likewise.
1499 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1500 retries, and free the mask rgroups before retrying. Check loop-wide
1501 reasons for disallowing fully-masked loops. Make the final decision
1502 about whether use a fully-masked loop or not.
1503 (vect_estimate_min_profitable_iters): Do not assume that peeling
1504 for the number of iterations will be needed for fully-masked loops.
1505 (vectorizable_reduction): Disable fully-masked loops.
1506 (vectorizable_live_operation): Likewise.
1507 (vect_halve_mask_nunits): New function.
1508 (vect_double_mask_nunits): Likewise.
1509 (vect_record_loop_mask): Likewise.
1510 (vect_get_loop_mask): Likewise.
1511 (vect_transform_loop): Handle the case in which the final loop
1512 iteration might handle a partial vector. Call vect_set_loop_condition
1513 instead of slpeel_make_loop_iterate_ntimes.
1514 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1515 (check_load_store_masking): New function.
1516 (prepare_load_store_mask): Likewise.
1517 (vectorizable_store): Handle fully-masked loops.
1518 (vectorizable_load): Likewise.
1519 (supportable_widening_operation): Use vect_halve_mask_nunits for
1521 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1522 (vect_gen_while): New function.
1523 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1524 (aarch64_uqdec<mode>): New insn.
1526 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1527 Alan Hayward <alan.hayward@arm.com>
1528 David Sherwood <david.sherwood@arm.com>
1530 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1531 (reduc_xor_scal_optab): New optabs.
1532 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1533 (reduc_xor_scal_@var{m}): Document.
1534 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1535 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1537 * fold-const-call.c (fold_const_call): Handle them.
1538 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1539 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1540 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1541 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1542 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1543 (UNSPEC_XORV): New unspecs.
1544 (optab): Add entries for them.
1545 (BITWISEV): New int iterator.
1546 (bit_reduc_op): New int attributes.
1548 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1549 Alan Hayward <alan.hayward@arm.com>
1550 David Sherwood <david.sherwood@arm.com>
1552 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1553 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1554 * optabs.def (vec_shl_insert_optab): New optab.
1555 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1556 (duplicate_and_interleave): Likewise.
1557 * tree-vect-loop.c: Include internal-fn.h.
1558 (neutral_op_for_slp_reduction): New function, split out from
1559 get_initial_defs_for_reduction.
1560 (get_initial_def_for_reduction): Handle option 2 for variable-length
1561 vectors by loading the neutral value into a vector and then shifting
1562 the initial value into element 0.
1563 (get_initial_defs_for_reduction): Replace the code argument with
1564 the neutral value calculated by neutral_op_for_slp_reduction.
1565 Use gimple_build_vector for constant-length vectors.
1566 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1567 but the first group_size elements have a neutral value.
1568 Use duplicate_and_interleave otherwise.
1569 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1570 Update call to get_initial_defs_for_reduction. Handle SLP
1571 reductions for variable-length vectors by creating one vector
1572 result for each scalar result, with the elements associated
1573 with other scalar results stubbed out with the neutral value.
1574 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1575 Require IFN_VEC_SHL_INSERT for double reductions on
1576 variable-length vectors, or SLP reductions that have
1577 a neutral value. Require can_duplicate_and_interleave_p
1578 support for variable-length unchained SLP reductions if there
1579 is no neutral value, such as for MIN/MAX reductions. Also require
1580 the number of vector elements to be a multiple of the number of
1581 SLP statements when doing variable-length unchained SLP reductions.
1582 Update call to vect_create_epilog_for_reduction.
1583 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1584 and remove initial values.
1585 (duplicate_and_interleave): Make public.
1586 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1587 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1589 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1590 Alan Hayward <alan.hayward@arm.com>
1591 David Sherwood <david.sherwood@arm.com>
1593 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1594 (can_duplicate_and_interleave_p): New function.
1595 (vect_get_and_check_slp_defs): Take the vector of statements
1596 rather than just the current one. Remove excess parentheses.
1597 Restriction rejectinon of vect_constant_def and vect_external_def
1598 for variable-length vectors to boolean types, or types for which
1599 can_duplicate_and_interleave_p is false.
1600 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1601 (duplicate_and_interleave): New function.
1602 (vect_get_constant_vectors): Use gimple_build_vector for
1603 constant-length vectors and suitable variable-length constant
1604 vectors. Use duplicate_and_interleave for other variable-length
1605 vectors. Don't defer the update when inserting new statements.
1607 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1608 Alan Hayward <alan.hayward@arm.com>
1609 David Sherwood <david.sherwood@arm.com>
1611 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1612 min_profitable_iters doesn't go negative.
1614 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1615 Alan Hayward <alan.hayward@arm.com>
1616 David Sherwood <david.sherwood@arm.com>
1618 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1619 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1620 * optabs.def (vec_mask_load_lanes_optab): New optab.
1621 (vec_mask_store_lanes_optab): Likewise.
1622 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1623 (MASK_STORE_LANES): Likewise.
1624 * internal-fn.c (mask_load_lanes_direct): New macro.
1625 (mask_store_lanes_direct): Likewise.
1626 (expand_mask_load_optab_fn): Handle masked operations.
1627 (expand_mask_load_lanes_optab_fn): New macro.
1628 (expand_mask_store_optab_fn): Handle masked operations.
1629 (expand_mask_store_lanes_optab_fn): New macro.
1630 (direct_mask_load_lanes_optab_supported_p): Likewise.
1631 (direct_mask_store_lanes_optab_supported_p): Likewise.
1632 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1634 (vect_load_lanes_supported): Likewise.
1635 * tree-vect-data-refs.c (strip_conversion): New function.
1636 (can_group_stmts_p): Likewise.
1637 (vect_analyze_data_ref_accesses): Use it instead of checking
1638 for a pair of assignments.
1639 (vect_store_lanes_supported): Take a masked_p parameter.
1640 (vect_load_lanes_supported): Likewise.
1641 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1642 vect_store_lanes_supported and vect_load_lanes_supported.
1643 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1644 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1645 parameter. Don't allow gaps for masked accesses.
1646 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1647 and vect_load_lanes_supported.
1648 (get_load_store_type): Take a masked_p parameter and update
1649 call to get_group_load_store_type.
1650 (vectorizable_store): Update call to get_load_store_type.
1651 Handle IFN_MASK_STORE_LANES.
1652 (vectorizable_load): Update call to get_load_store_type.
1653 Handle IFN_MASK_LOAD_LANES.
1655 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1656 Alan Hayward <alan.hayward@arm.com>
1657 David Sherwood <david.sherwood@arm.com>
1659 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1661 * config/aarch64/aarch64-protos.h
1662 (aarch64_sve_struct_memory_operand_p): Declare.
1663 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1664 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1665 (VPRED, vpred): Handle SVE structure modes.
1666 * config/aarch64/constraints.md (Utx): New constraint.
1667 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1668 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1669 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1670 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1671 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1672 structure modes. Split into pieces after RA.
1673 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1674 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1676 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1677 SVE structure modes.
1678 (aarch64_classify_address): Likewise.
1679 (sizetochar): Move earlier in file.
1680 (aarch64_print_operand): Handle SVE register lists.
1681 (aarch64_array_mode): New function.
1682 (aarch64_sve_struct_memory_operand_p): Likewise.
1683 (TARGET_ARRAY_MODE): Redefine.
1685 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1686 Alan Hayward <alan.hayward@arm.com>
1687 David Sherwood <david.sherwood@arm.com>
1689 * target.def (array_mode): New target hook.
1690 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1691 * doc/tm.texi: Regenerate.
1692 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1693 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1694 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1696 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1699 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1700 Alan Hayward <alan.hayward@arm.com>
1701 David Sherwood <david.sherwood@arm.com>
1703 * fold-const.c (fold_binary_loc): Check the argument types
1704 rather than the result type when testing for a vector operation.
1706 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1708 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1709 * doc/tm.texi: Regenerate.
1711 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1712 Alan Hayward <alan.hayward@arm.com>
1713 David Sherwood <david.sherwood@arm.com>
1715 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1716 (sve): Document new AArch64 extension.
1717 * doc/md.texi (w): Extend the description of the AArch64
1718 constraint to include SVE vectors.
1719 (Upl, Upa): Document new AArch64 predicate constraints.
1720 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1722 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1723 (msve-vector-bits=): New option.
1724 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1725 SVE when these are disabled.
1726 (sve): New extension.
1727 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1728 modes. Adjust their number of units based on aarch64_sve_vg.
1729 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1730 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1731 aarch64_addr_query_type.
1732 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1733 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1734 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1735 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1736 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1737 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1738 (aarch64_simd_imm_zero_p): Delete.
1739 (aarch64_check_zero_based_sve_index_immediate): Declare.
1740 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1741 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1742 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1743 (aarch64_sve_float_mul_immediate_p): Likewise.
1744 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1746 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1747 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1748 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1749 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1750 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1751 (aarch64_regmode_natural_size): Likewise.
1752 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1753 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1755 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1756 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1757 for VG and the SVE predicate registers.
1758 (V_ALIASES): Add a "z"-prefixed alias.
1759 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1760 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1761 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1762 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1763 (REG_CLASS_NAMES): Add entries for them.
1764 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1765 and the predicate registers.
1766 (aarch64_sve_vg): Declare.
1767 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1768 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1769 (REGMODE_NATURAL_SIZE): Define.
1770 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1772 * config/aarch64/aarch64.c: Include cfgrtl.h.
1773 (simd_immediate_info): Add a constructor for series vectors,
1774 and an associated step field.
1775 (aarch64_sve_vg): New variable.
1776 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1777 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1778 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1779 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1780 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1781 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1782 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1783 (aarch64_get_mask_mode): New functions.
1784 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1785 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1786 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1787 predicate modes and predicate registers. Explicitly restrict
1788 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1789 to store a vector mode if it is recognized by
1790 aarch64_classify_vector_mode.
1791 (aarch64_regmode_natural_size): New function.
1792 (aarch64_hard_regno_caller_save_mode): Return the original mode
1794 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1795 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1796 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1797 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1799 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1800 does not overlap dest if the function is frame-related. Handle
1802 (aarch64_split_add_offset): New function.
1803 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1804 them aarch64_add_offset.
1805 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1806 and update call to aarch64_sub_sp.
1807 (aarch64_add_cfa_expression): New function.
1808 (aarch64_expand_prologue): Pass extra temporary registers to the
1809 functions above. Handle the case in which we need to emit new
1810 DW_CFA_expressions for registers that were originally saved
1811 relative to the stack pointer, but now have to be expressed
1812 relative to the frame pointer.
1813 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1815 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1816 IP0 and IP1 values for SVE frames.
1817 (aarch64_expand_vec_series): New function.
1818 (aarch64_expand_sve_widened_duplicate): Likewise.
1819 (aarch64_expand_sve_const_vector): Likewise.
1820 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1821 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1822 into the register, rather than emitting a SET directly.
1823 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1824 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1825 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1826 (offset_9bit_signed_scaled_p): New functions.
1827 (aarch64_replicate_bitmask_imm): New function.
1828 (aarch64_bitmask_imm): Use it.
1829 (aarch64_cannot_force_const_mem): Reject expressions involving
1830 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1831 (aarch64_classify_index): Handle SVE indices, by requiring
1832 a plain register index with a scale that matches the element size.
1833 (aarch64_classify_address): Handle SVE addresses. Assert that
1834 the mode of the address is VOIDmode or an integer mode.
1835 Update call to aarch64_classify_symbol.
1836 (aarch64_classify_symbolic_expression): Update call to
1837 aarch64_classify_symbol.
1838 (aarch64_const_vec_all_in_range_p): New function.
1839 (aarch64_print_vector_float_operand): Likewise.
1840 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1841 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1842 and the FP immediates 1.0 and 0.5.
1843 (aarch64_print_address_internal): Handle SVE addresses.
1844 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1845 (aarch64_regno_regclass): Handle predicate registers.
1846 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1848 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1849 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1850 (aarch64_convert_sve_vector_bits): New function.
1851 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1852 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1854 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1855 Handle SVE vector and predicate modes. Accept VL-based constants
1856 that need only one temporary register, and VL offsets that require
1857 no temporary registers.
1858 (aarch64_conditional_register_usage): Mark the predicate registers
1859 as fixed if SVE isn't available.
1860 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1861 Return true for SVE vector and predicate modes.
1862 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1863 rather than an unsigned int. Handle SVE modes.
1864 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1866 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1868 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1869 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1870 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1871 (aarch64_sve_float_mul_immediate_p): New functions.
1872 (aarch64_sve_valid_immediate): New function.
1873 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1874 Explicitly reject structure modes. Check for INDEX constants.
1875 Handle PTRUE and PFALSE constants.
1876 (aarch64_check_zero_based_sve_index_immediate): New function.
1877 (aarch64_simd_imm_zero_p): Delete.
1878 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1879 vector modes. Accept constants in the range of CNT[BHWD].
1880 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1881 ask for an Advanced SIMD mode.
1882 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1883 (aarch64_simd_vector_alignment): Handle SVE predicates.
1884 (aarch64_vectorize_preferred_vector_alignment): New function.
1885 (aarch64_simd_vector_alignment_reachable): Use it instead of
1887 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1888 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1890 (MAX_VECT_LEN): Delete.
1891 (expand_vec_perm_d): Add a vec_flags field.
1892 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1893 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1894 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1896 (aarch64_evpc_rev): Rename to...
1897 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1898 (aarch64_evpc_rev_global): New function.
1899 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1900 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1902 (aarch64_evpc_sve_tbl): New function.
1903 (aarch64_expand_vec_perm_const_1): Update after rename of
1904 aarch64_evpc_rev. Handle SVE permutes too, trying
1905 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1906 than aarch64_evpc_tbl.
1907 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1908 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1909 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1910 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1911 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1912 (aarch64_expand_sve_vcond): New functions.
1913 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1914 of aarch64_vector_mode_p.
1915 (aarch64_dwarf_poly_indeterminate_value): New function.
1916 (aarch64_compute_pressure_classes): Likewise.
1917 (aarch64_can_change_mode_class): Likewise.
1918 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1919 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1920 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1921 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1922 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1923 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1924 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1925 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1927 (Dn, Dl, Dr): Accept const as well as const_vector.
1928 (Dz): Likewise. Compare against CONST0_RTX.
1929 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1930 of "vector" where appropriate.
1931 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1932 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1933 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1934 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1935 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1936 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1937 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1938 (v_int_equiv): Extend to SVE modes.
1939 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1941 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1942 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1943 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1944 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1945 (SVE_COND_FP_CMP): New int iterators.
1946 (perm_hilo): Handle the new unpack unspecs.
1947 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1949 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1950 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1951 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1952 (aarch64_equality_operator, aarch64_constant_vector_operand)
1953 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1954 (aarch64_sve_nonimmediate_operand): Likewise.
1955 (aarch64_sve_general_operand): Likewise.
1956 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1957 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1958 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1959 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1960 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1961 (aarch64_sve_float_arith_immediate): Likewise.
1962 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1963 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1964 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1965 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1966 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1967 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1968 (aarch64_sve_float_arith_operand): Likewise.
1969 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1970 (aarch64_sve_float_mul_operand): Likewise.
1971 (aarch64_sve_vec_perm_operand): Likewise.
1972 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1973 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1974 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1975 as well as const_vector.
1976 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1977 in file. Use CONST0_RTX and CONSTM1_RTX.
1978 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1979 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1980 Use aarch64_simd_imm_zero.
1981 * config/aarch64/aarch64-sve.md: New file.
1982 * config/aarch64/aarch64.md: Include it.
1983 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1984 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1985 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1986 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1987 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1988 (sve): New attribute.
1989 (enabled): Disable instructions with the sve attribute unless
1991 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1992 aarch64_expand_mov_immediate.
1993 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1994 CNT[BHSD] immediates.
1995 (movti): Split CONST_POLY_INT moves into two halves.
1996 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1997 Split additions that need a temporary here if the destination
1998 is the stack pointer.
1999 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
2000 (*add<mode>3_poly_1): New instruction.
2001 (set_clobber_cc): New expander.
2003 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2005 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
2006 parameter and use it instead of GET_MODE_SIZE (innermode). Use
2007 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
2008 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
2009 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
2010 Change innermode from fixed_mode_size to machine_mode.
2011 (simplify_subreg): Update call accordingly. Handle a constant-sized
2012 subreg of a variable-length CONST_VECTOR.
2014 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2015 Alan Hayward <alan.hayward@arm.com>
2016 David Sherwood <david.sherwood@arm.com>
2018 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
2019 (add_offset_to_base): New function, split out from...
2020 (create_mem_ref): ...here. When handling a scale other than 1,
2021 check first whether the address is valid without the offset.
2022 Add it into the base if so, leaving the index and scale as-is.
2024 2018-01-12 Jakub Jelinek <jakub@redhat.com>
2027 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
2028 fold_for_warn before checking if arg2 is INTEGER_CST.
2030 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
2032 * config/rs6000/predicates.md (load_multiple_operation): Delete.
2033 (store_multiple_operation): Delete.
2034 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
2035 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
2036 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
2037 guarded by TARGET_STRING.
2038 (rs6000_output_load_multiple): Delete.
2039 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
2040 OPTION_MASK_STRING / TARGET_STRING handling.
2041 (print_operand) <'N', 'O'>: Add comment that these are unused now.
2042 (const rs6000_opt_masks) <"string">: Change mask to 0.
2043 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
2044 (MASK_STRING): Delete.
2045 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
2047 (load_multiple): Delete.
2054 (store_multiple): Delete.
2061 (movmemsi_8reg): Delete.
2062 (corresponding unnamed define_insn): Delete.
2063 (movmemsi_6reg): Delete.
2064 (corresponding unnamed define_insn): Delete.
2065 (movmemsi_4reg): Delete.
2066 (corresponding unnamed define_insn): Delete.
2067 (movmemsi_2reg): Delete.
2068 (corresponding unnamed define_insn): Delete.
2069 (movmemsi_1reg): Delete.
2070 (corresponding unnamed define_insn): Delete.
2071 * config/rs6000/rs6000.opt (mno-string): New.
2072 (mstring): Replace by deprecation warning stub.
2073 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
2075 2018-01-12 Jakub Jelinek <jakub@redhat.com>
2077 * regrename.c (regrename_do_replace): If replacing the same
2078 reg multiple times, try to reuse last created gen_raw_REG.
2081 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
2082 main to workaround a bug in GDB.
2084 2018-01-12 Tom de Vries <tom@codesourcery.com>
2087 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
2089 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
2091 PR rtl-optimization/80481
2092 * ira-color.c (get_cap_member): New function.
2093 (allocnos_conflict_by_live_ranges_p): Use it.
2094 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
2095 (setup_slot_coalesced_allocno_live_ranges): Ditto.
2097 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
2100 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2101 (*saddl_se_1): Ditto.
2103 (*ssubl_se_1): Ditto.
2105 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2107 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2108 rather than wi::to_widest for DR_INITs.
2109 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2110 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2111 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2113 (vect_analyze_group_access_1): Note that here.
2115 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2117 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2118 polynomial type sizes.
2120 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2122 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2123 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2124 (gimple_add_tmp_var): Likewise.
2126 2018-01-12 Martin Liska <mliska@suse.cz>
2128 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2129 (gimple_alloc_sizes): Likewise.
2130 (dump_gimple_statistics): Use PRIu64 in printf format.
2131 * gimple.h: Change uint64_t to int.
2133 2018-01-12 Martin Liska <mliska@suse.cz>
2135 * tree-core.h: Use uint64_t instead of int.
2136 * tree.c (tree_node_counts): Likewise.
2137 (tree_node_sizes): Likewise.
2138 (dump_tree_statistics): Use PRIu64 in printf format.
2140 2018-01-12 Martin Liska <mliska@suse.cz>
2142 * Makefile.in: As qsort_chk is implemented in vec.c, add
2143 vec.o to linkage of gencfn-macros.
2144 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2145 passing the info to record_node_allocation_statistics.
2146 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2148 * ggc-common.c (struct ggc_usage): Add operator== and use
2149 it in operator< and compare function.
2150 * mem-stats.h (struct mem_usage): Likewise.
2151 * vec.c (struct vec_usage): Remove operator< and compare
2152 function. Can be simply inherited.
2154 2018-01-12 Martin Jambor <mjambor@suse.cz>
2157 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2158 * tree-ssa-math-opts.c: Include domwalk.h.
2159 (convert_mult_to_fma_1): New function.
2160 (fma_transformation_info): New type.
2161 (fma_deferring_state): Likewise.
2162 (cancel_fma_deferring): New function.
2163 (result_of_phi): Likewise.
2164 (last_fma_candidate_feeds_initial_phi): Likewise.
2165 (convert_mult_to_fma): Added deferring logic, split actual
2166 transformation to convert_mult_to_fma_1.
2167 (math_opts_dom_walker): New type.
2168 (math_opts_dom_walker::after_dom_children): New method, body moved
2169 here from pass_optimize_widening_mul::execute, added deferring logic
2171 (pass_optimize_widening_mul::execute): Moved most of code to
2172 math_opts_dom_walker::after_dom_children.
2173 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2174 * config/i386/i386.c (ix86_option_override_internal): Added
2175 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2177 2018-01-12 Richard Biener <rguenther@suse.de>
2180 * dwarf2out.c (gen_variable_die): Do not reset old_die for
2181 inline instance vars.
2183 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
2186 * config/rx/rx.c (rx_is_restricted_memory_address):
2189 2018-01-12 Richard Biener <rguenther@suse.de>
2191 PR tree-optimization/80846
2192 * target.def (split_reduction): New target hook.
2193 * targhooks.c (default_split_reduction): New function.
2194 * targhooks.h (default_split_reduction): Declare.
2195 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2196 target requests first reduce vectors by combining low and high
2198 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2199 (get_vectype_for_scalar_type_and_size): Export.
2200 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2201 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2202 * doc/tm.texi: Regenerate.
2203 * config/i386/i386.c (ix86_split_reduction): Implement
2204 TARGET_VECTORIZE_SPLIT_REDUCTION.
2206 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2209 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2210 in PIC mode except for TARGET_VXWORKS_RTP.
2211 * config/sparc/sparc.c: Include cfgrtl.h.
2212 (TARGET_INIT_PIC_REG): Define.
2213 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2214 (sparc_pic_register_p): New predicate.
2215 (sparc_legitimate_address_p): Use it.
2216 (sparc_legitimize_pic_address): Likewise.
2217 (sparc_delegitimize_address): Likewise.
2218 (sparc_mode_dependent_address_p): Likewise.
2219 (gen_load_pcrel_sym): Remove 4th parameter.
2220 (load_got_register): Adjust call to above. Remove obsolete stuff.
2221 (sparc_expand_prologue): Do not call load_got_register here.
2222 (sparc_flat_expand_prologue): Likewise.
2223 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2224 (sparc_use_pseudo_pic_reg): New function.
2225 (sparc_init_pic_reg): Likewise.
2226 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2227 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2229 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
2231 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2232 Add item for branch_cost.
2234 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2236 PR rtl-optimization/83565
2237 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2238 not extend the result to a larger mode for rotate operations.
2239 (num_sign_bit_copies1): Likewise.
2241 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2244 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2246 Use values-Xc.o for -pedantic.
2247 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2249 2018-01-12 Martin Liska <mliska@suse.cz>
2252 * ipa-devirt.c (final_warning_record::grow_type_warnings):
2254 (possible_polymorphic_call_targets): Use it.
2255 (ipa_devirt): Likewise.
2257 2018-01-12 Martin Liska <mliska@suse.cz>
2259 * profile-count.h (enum profile_quality): Use 0 as invalid
2260 enum value of profile_quality.
2262 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
2264 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2265 -mext-string options.
2267 2018-01-12 Richard Biener <rguenther@suse.de>
2269 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2270 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2271 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2273 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2275 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
2277 * configure.ac (--with-long-double-format): Add support for the
2278 configuration option to change the default long double format on
2280 * config.gcc (powerpc*-linux*-*): Likewise.
2281 * configure: Regenerate.
2282 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2283 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2284 used without modification.
2286 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2288 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2289 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2290 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2291 MISC_BUILTIN_SPEC_BARRIER.
2292 (rs6000_init_builtins): Likewise.
2293 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2295 (speculation_barrier): New define_insn.
2296 * doc/extend.texi: Document __builtin_speculation_barrier.
2298 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2301 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2302 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2303 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2305 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2306 integral modes instead of "ss" and "sd".
2307 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2308 vectors with 32-bit and 64-bit elements.
2309 (vecdupssescalarmodesuffix): New mode attribute.
2310 (vec_dup<mode>): Use it.
2312 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2315 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2316 frame if argument is passed on stack.
2318 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2321 * ree.c (combine_reaching_defs): Optimize also
2322 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2323 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2325 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2328 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2330 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2333 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2334 after they are computed.
2336 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2338 PR tree-optimization/83695
2339 * gimple-loop-linterchange.cc
2340 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2341 reset cached scev information after interchange.
2342 (pass_linterchange::execute): Remove call to scev_reset_htab.
2344 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2346 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2347 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2348 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2349 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2350 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2351 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2352 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2353 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2354 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2355 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2356 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2357 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2358 (V_lane_reg): Likewise.
2359 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2361 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2362 (vfmal_lane_low<mode>_intrinsic,
2363 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2364 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2365 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2366 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2367 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2368 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2370 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2372 * config/arm/arm-cpus.in (fp16fml): New feature.
2373 (ALL_SIMD): Add fp16fml.
2374 (armv8.2-a): Add fp16fml as an option.
2375 (armv8.3-a): Likewise.
2376 (armv8.4-a): Add fp16fml as part of fp16.
2377 * config/arm/arm.h (TARGET_FP16FML): Define.
2378 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2380 * config/arm/arm-modes.def (V2HF): Define.
2381 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2382 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2383 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2384 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2385 vfmsl_low, vfmsl_high): New set of builtins.
2386 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2387 (vfml_op): New code attribute.
2388 (VFMLHALVES): New int iterator.
2389 (VFML, VFMLSEL): New mode attributes.
2390 (V_reg): Define mapping for V2HF.
2391 (V_hi, V_lo): New mode attributes.
2392 (VF_constraint): Likewise.
2393 (vfml_half, vfml_half_selector): New int attributes.
2394 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2396 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2397 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2399 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2400 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2401 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2402 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2404 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2405 Document new effective target and option set.
2407 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2409 * config/arm/arm-cpus.in (armv8_4): New feature.
2410 (ARMv8_4a): New fgroup.
2411 (armv8.4-a): New arch.
2412 * config/arm/arm-tables.opt: Regenerate.
2413 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2414 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2415 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2416 Add matching rules for -march=armv8.4-a and extensions.
2417 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2419 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2422 * config/rx/rx.md (BW): New mode attribute.
2423 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2425 2018-01-11 Richard Biener <rguenther@suse.de>
2427 PR tree-optimization/83435
2428 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2429 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2430 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2432 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2433 Alan Hayward <alan.hayward@arm.com>
2434 David Sherwood <david.sherwood@arm.com>
2436 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2438 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2439 (aarch64_print_address_internal): Use it to check for a zero offset.
2441 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2442 Alan Hayward <alan.hayward@arm.com>
2443 David Sherwood <david.sherwood@arm.com>
2445 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2446 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2447 Return a poly_int64 rather than a HOST_WIDE_INT.
2448 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2449 rather than a HOST_WIDE_INT.
2450 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2451 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2452 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2453 final_offset from HOST_WIDE_INT to poly_int64.
2454 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2455 to_constant when getting the number of units in an Advanced SIMD
2457 (aarch64_builtin_vectorized_function): Check for a constant number
2459 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2461 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2462 attribute instead of GET_MODE_NUNITS.
2463 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2464 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2465 GET_MODE_SIZE for fixed-size registers.
2466 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2467 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2468 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2469 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2470 (aarch64_print_operand, aarch64_print_address_internal)
2471 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2472 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2473 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2474 Handle polynomial GET_MODE_SIZE.
2475 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2476 wider than SImode without modification.
2477 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2478 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2479 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2480 passing and returning SVE modes.
2481 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2482 rather than GEN_INT.
2483 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2484 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2485 (aarch64_allocate_and_probe_stack_space): Likewise.
2486 (aarch64_layout_frame): Cope with polynomial offsets.
2487 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2488 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2490 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2491 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2492 poly_int64 rather than a HOST_WIDE_INT.
2493 (aarch64_get_separate_components, aarch64_process_components)
2494 (aarch64_expand_prologue, aarch64_expand_epilogue)
2495 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2496 (aarch64_anchor_offset): New function, split out from...
2497 (aarch64_legitimize_address): ...here.
2498 (aarch64_builtin_vectorization_cost): Handle polynomial
2499 TYPE_VECTOR_SUBPARTS.
2500 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2502 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2503 number of elements from the PARALLEL rather than the mode.
2504 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2505 rather than GET_MODE_BITSIZE.
2506 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2507 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2508 (aarch64_expand_vec_perm_const_1): Handle polynomial
2509 d->perm.length () and d->perm elements.
2510 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2511 Apply to_constant to d->perm elements.
2512 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2513 polynomial CONST_VECTOR_NUNITS.
2514 (aarch64_move_pointer): Take amount as a poly_int64 rather
2516 (aarch64_progress_pointer): Avoid temporary variable.
2517 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2518 the mode attribute instead of GET_MODE.
2520 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2521 Alan Hayward <alan.hayward@arm.com>
2522 David Sherwood <david.sherwood@arm.com>
2524 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2525 x exists before using it.
2526 (aarch64_add_constant_internal): Rename to...
2527 (aarch64_add_offset_1): ...this. Replace regnum with separate
2528 src and dest rtxes. Handle the case in which they're different,
2529 including when the offset is zero. Replace scratchreg with an rtx.
2530 Use 2 additions if there is no spare register into which we can
2531 move a 16-bit constant.
2532 (aarch64_add_constant): Delete.
2533 (aarch64_add_offset): Replace reg with separate src and dest
2534 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2535 Use aarch64_add_offset_1.
2536 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2537 an rtx rather than an int. Take the delta as a poly_int64
2538 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2539 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2540 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2541 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2542 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2544 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2545 aarch64_add_constant.
2547 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2549 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2550 Use scalar_float_mode.
2552 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2554 * config/aarch64/aarch64-simd.md
2555 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2556 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2557 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2558 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2559 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2560 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2561 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2562 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2563 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2564 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2566 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2569 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2570 targ_options->x_arm_arch_string is non NULL.
2572 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2574 * config/aarch64/aarch64.h
2575 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2577 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2580 * expmed.c (emit_store_flag_force): Swap if const op0
2581 and change VOIDmode to mode of op0.
2583 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2585 PR rtl-optimization/83761
2586 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2587 than bytes to mode_for_size.
2589 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2592 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2593 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2596 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2599 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2600 when in layout mode.
2601 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2602 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2605 2018-01-10 Michael Collison <michael.collison@arm.com>
2607 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2608 * config/aarch64/aarch64-option-extension.def: Add
2609 AARCH64_OPT_EXTENSION of 'fp16fml'.
2610 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2611 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2612 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2613 * config/aarch64/constraints.md (Ui7): New constraint.
2614 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2615 (VFMLA_SEL_W): Ditto.
2618 (VFMLA16_LOW): New int iterator.
2619 (VFMLA16_HIGH): Ditto.
2620 (UNSPEC_FMLAL): New unspec.
2621 (UNSPEC_FMLSL): Ditto.
2622 (UNSPEC_FMLAL2): Ditto.
2623 (UNSPEC_FMLSL2): Ditto.
2624 (f16mac): New code attribute.
2625 * config/aarch64/aarch64-simd-builtins.def
2626 (aarch64_fmlal_lowv2sf): Ditto.
2627 (aarch64_fmlsl_lowv2sf): Ditto.
2628 (aarch64_fmlalq_lowv4sf): Ditto.
2629 (aarch64_fmlslq_lowv4sf): Ditto.
2630 (aarch64_fmlal_highv2sf): Ditto.
2631 (aarch64_fmlsl_highv2sf): Ditto.
2632 (aarch64_fmlalq_highv4sf): Ditto.
2633 (aarch64_fmlslq_highv4sf): Ditto.
2634 (aarch64_fmlal_lane_lowv2sf): Ditto.
2635 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2636 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2637 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2638 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2639 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2640 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2641 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2642 (aarch64_fmlal_lane_highv2sf): Ditto.
2643 (aarch64_fmlsl_lane_highv2sf): Ditto.
2644 (aarch64_fmlal_laneq_highv2sf): Ditto.
2645 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2646 (aarch64_fmlalq_lane_highv4sf): Ditto.
2647 (aarch64_fmlsl_lane_highv4sf): Ditto.
2648 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2649 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2650 * config/aarch64/aarch64-simd.md:
2651 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2652 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2653 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2654 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2655 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2656 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2657 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2658 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2659 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2660 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2661 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2662 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2663 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2664 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2665 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2666 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2667 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2668 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2669 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2670 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2671 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2672 (vfmlsl_low_u32): Ditto.
2673 (vfmlalq_low_u32): Ditto.
2674 (vfmlslq_low_u32): Ditto.
2675 (vfmlal_high_u32): Ditto.
2676 (vfmlsl_high_u32): Ditto.
2677 (vfmlalq_high_u32): Ditto.
2678 (vfmlslq_high_u32): Ditto.
2679 (vfmlal_lane_low_u32): Ditto.
2680 (vfmlsl_lane_low_u32): Ditto.
2681 (vfmlal_laneq_low_u32): Ditto.
2682 (vfmlsl_laneq_low_u32): Ditto.
2683 (vfmlalq_lane_low_u32): Ditto.
2684 (vfmlslq_lane_low_u32): Ditto.
2685 (vfmlalq_laneq_low_u32): Ditto.
2686 (vfmlslq_laneq_low_u32): Ditto.
2687 (vfmlal_lane_high_u32): Ditto.
2688 (vfmlsl_lane_high_u32): Ditto.
2689 (vfmlal_laneq_high_u32): Ditto.
2690 (vfmlsl_laneq_high_u32): Ditto.
2691 (vfmlalq_lane_high_u32): Ditto.
2692 (vfmlslq_lane_high_u32): Ditto.
2693 (vfmlalq_laneq_high_u32): Ditto.
2694 (vfmlslq_laneq_high_u32): Ditto.
2695 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2696 (AARCH64_FL_FOR_ARCH8_4): New.
2697 (AARCH64_ISA_F16FML): New ISA flag.
2698 (TARGET_F16FML): New feature flag for fp16fml.
2699 (doc/invoke.texi): Document new fp16fml option.
2701 2018-01-10 Michael Collison <michael.collison@arm.com>
2703 * config/aarch64/aarch64-builtins.c:
2704 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2705 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2706 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2707 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2708 (AARCH64_ISA_SHA3): New ISA flag.
2709 (TARGET_SHA3): New feature flag for sha3.
2710 * config/aarch64/iterators.md (sha512_op): New int attribute.
2711 (CRYPTO_SHA512): New int iterator.
2712 (UNSPEC_SHA512H): New unspec.
2713 (UNSPEC_SHA512H2): Ditto.
2714 (UNSPEC_SHA512SU0): Ditto.
2715 (UNSPEC_SHA512SU1): Ditto.
2716 * config/aarch64/aarch64-simd-builtins.def
2717 (aarch64_crypto_sha512hqv2di): New builtin.
2718 (aarch64_crypto_sha512h2qv2di): Ditto.
2719 (aarch64_crypto_sha512su0qv2di): Ditto.
2720 (aarch64_crypto_sha512su1qv2di): Ditto.
2721 (aarch64_eor3qv8hi): Ditto.
2722 (aarch64_rax1qv2di): Ditto.
2723 (aarch64_xarqv2di): Ditto.
2724 (aarch64_bcaxqv8hi): Ditto.
2725 * config/aarch64/aarch64-simd.md:
2726 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2727 (aarch64_crypto_sha512su0qv2di): Ditto.
2728 (aarch64_crypto_sha512su1qv2di): Ditto.
2729 (aarch64_eor3qv8hi): Ditto.
2730 (aarch64_rax1qv2di): Ditto.
2731 (aarch64_xarqv2di): Ditto.
2732 (aarch64_bcaxqv8hi): Ditto.
2733 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2734 (vsha512h2q_u64): Ditto.
2735 (vsha512su0q_u64): Ditto.
2736 (vsha512su1q_u64): Ditto.
2737 (veor3q_u16): Ditto.
2738 (vrax1q_u64): Ditto.
2740 (vbcaxq_u16): Ditto.
2741 * config/arm/types.md (crypto_sha512): New type attribute.
2742 (crypto_sha3): Ditto.
2743 (doc/invoke.texi): Document new sha3 option.
2745 2018-01-10 Michael Collison <michael.collison@arm.com>
2747 * config/aarch64/aarch64-builtins.c:
2748 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2749 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2750 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2751 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2752 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2753 (AARCH64_ISA_SM4): New ISA flag.
2754 (TARGET_SM4): New feature flag for sm4.
2755 * config/aarch64/aarch64-simd-builtins.def
2756 (aarch64_sm3ss1qv4si): Ditto.
2757 (aarch64_sm3tt1aq4si): Ditto.
2758 (aarch64_sm3tt1bq4si): Ditto.
2759 (aarch64_sm3tt2aq4si): Ditto.
2760 (aarch64_sm3tt2bq4si): Ditto.
2761 (aarch64_sm3partw1qv4si): Ditto.
2762 (aarch64_sm3partw2qv4si): Ditto.
2763 (aarch64_sm4eqv4si): Ditto.
2764 (aarch64_sm4ekeyqv4si): Ditto.
2765 * config/aarch64/aarch64-simd.md:
2766 (aarch64_sm3ss1qv4si): Ditto.
2767 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2768 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2769 (aarch64_sm4eqv4si): Ditto.
2770 (aarch64_sm4ekeyqv4si): Ditto.
2771 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2772 (sm3part_op): Ditto.
2773 (CRYPTO_SM3TT): Ditto.
2774 (CRYPTO_SM3PART): Ditto.
2775 (UNSPEC_SM3SS1): New unspec.
2776 (UNSPEC_SM3TT1A): Ditto.
2777 (UNSPEC_SM3TT1B): Ditto.
2778 (UNSPEC_SM3TT2A): Ditto.
2779 (UNSPEC_SM3TT2B): Ditto.
2780 (UNSPEC_SM3PARTW1): Ditto.
2781 (UNSPEC_SM3PARTW2): Ditto.
2782 (UNSPEC_SM4E): Ditto.
2783 (UNSPEC_SM4EKEY): Ditto.
2784 * config/aarch64/constraints.md (Ui2): New constraint.
2785 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2786 * config/arm/types.md (crypto_sm3): New type attribute.
2787 (crypto_sm4): Ditto.
2788 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2789 (vsm3tt1aq_u32): Ditto.
2790 (vsm3tt1bq_u32): Ditto.
2791 (vsm3tt2aq_u32): Ditto.
2792 (vsm3tt2bq_u32): Ditto.
2793 (vsm3partw1q_u32): Ditto.
2794 (vsm3partw2q_u32): Ditto.
2795 (vsm4eq_u32): Ditto.
2796 (vsm4ekeyq_u32): Ditto.
2797 (doc/invoke.texi): Document new sm4 option.
2799 2018-01-10 Michael Collison <michael.collison@arm.com>
2801 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2802 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2803 (AARCH64_FL_FOR_ARCH8_4): New.
2804 (AARCH64_FL_V8_4): New flag.
2805 (doc/invoke.texi): Document new armv8.4-a option.
2807 2018-01-10 Michael Collison <michael.collison@arm.com>
2809 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2810 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2811 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2812 * config/aarch64/aarch64-option-extension.def: Add
2813 AARCH64_OPT_EXTENSION of 'sha2'.
2814 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2815 (crypto): Disable sha2 and aes if crypto disabled.
2816 (crypto): Enable aes and sha2 if enabled.
2817 (simd): Disable sha2 and aes if simd disabled.
2818 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2820 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2821 (TARGET_SHA2): New feature flag for sha2.
2822 (TARGET_AES): New feature flag for aes.
2823 * config/aarch64/aarch64-simd.md:
2824 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2825 conditional on TARGET_AES.
2826 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2827 (aarch64_crypto_sha1hsi): Make pattern conditional
2829 (aarch64_crypto_sha1hv4si): Ditto.
2830 (aarch64_be_crypto_sha1hv4si): Ditto.
2831 (aarch64_crypto_sha1su1v4si): Ditto.
2832 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2833 (aarch64_crypto_sha1su0v4si): Ditto.
2834 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2835 (aarch64_crypto_sha256su0v4si): Ditto.
2836 (aarch64_crypto_sha256su1v4si): Ditto.
2837 (doc/invoke.texi): Document new aes and sha2 options.
2839 2018-01-10 Martin Sebor <msebor@redhat.com>
2841 PR tree-optimization/83781
2842 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2845 2018-01-11 Martin Sebor <msebor@gmail.com>
2846 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2848 PR tree-optimization/83501
2849 PR tree-optimization/81703
2851 * tree-ssa-strlen.c (get_string_cst): Rename...
2852 (get_string_len): ...to this. Handle global constants.
2853 (handle_char_store): Adjust.
2855 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2856 Jim Wilson <jimw@sifive.com>
2858 * config/riscv/riscv-protos.h (riscv_output_return): New.
2859 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2860 (riscv_attribute_table, riscv_output_return),
2861 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2862 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2863 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2865 (riscv_expand_prologue): Add early return for naked function.
2866 (riscv_expand_epilogue): Likewise.
2867 (riscv_function_ok_for_sibcall): Return false for naked function.
2868 (riscv_set_current_function): New.
2869 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2870 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2871 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2872 * doc/extend.texi (RISC-V Function Attributes): New.
2874 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2876 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2877 check for 128-bit long double before checking TCmode.
2878 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2879 128-bit long doubles before checking TFmode or TCmode.
2880 (FLOAT128_IBM_P): Likewise.
2882 2018-01-10 Martin Sebor <msebor@redhat.com>
2884 PR tree-optimization/83671
2885 * builtins.c (c_strlen): Unconditionally return zero for the empty
2887 Use -Warray-bounds for warnings.
2888 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2889 for non-constant array indices with COMPONENT_REF, arrays of
2890 arrays, and pointers to arrays.
2891 (gimple_fold_builtin_strlen): Determine and set length range for
2892 non-constant character arrays.
2894 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2897 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2900 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2902 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2904 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2907 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2908 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2909 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2910 indexed_or_indirect_operand predicate.
2911 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2912 (*vsx_le_perm_load_v8hi): Likewise.
2913 (*vsx_le_perm_load_v16qi): Likewise.
2914 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2915 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2916 (*vsx_le_perm_store_v8hi): Likewise.
2917 (*vsx_le_perm_store_v16qi): Likewise.
2918 (eight unnamed splitters): Likewise.
2920 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2922 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2923 * config/rs6000/emmintrin.h: Likewise.
2924 * config/rs6000/mmintrin.h: Likewise.
2925 * config/rs6000/xmmintrin.h: Likewise.
2927 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2930 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2932 * tree.c (tree_nop_conversion): Return true for location wrapper
2934 (maybe_wrap_with_location): New function.
2935 (selftest::check_strip_nops): New function.
2936 (selftest::test_location_wrappers): New function.
2937 (selftest::tree_c_tests): Call it.
2938 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2939 (maybe_wrap_with_location): New decl.
2940 (EXPR_LOCATION_WRAPPER_P): New macro.
2941 (location_wrapper_p): New inline function.
2942 (tree_strip_any_location_wrapper): New inline function.
2944 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2947 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2948 stack_realign_offset for the largest alignment of stack slot
2950 (ix86_find_max_used_stack_alignment): New function.
2951 (ix86_finalize_stack_frame_flags): Use it. Set
2952 max_used_stack_alignment if we don't realign stack.
2953 * config/i386/i386.h (machine_function): Add
2954 max_used_stack_alignment.
2956 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2958 * config/arm/arm.opt (-mbranch-cost): New option.
2959 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2962 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2965 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2966 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2968 2018-01-10 Richard Biener <rguenther@suse.de>
2971 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2972 early out so it also covers the case where we have a non-NULL
2975 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2977 PR tree-optimization/83753
2978 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2979 for non-strided grouped accesses if the number of elements is 1.
2981 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2984 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2985 * i386.h (TARGET_USE_GATHER): Define.
2986 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2988 2018-01-10 Martin Liska <mliska@suse.cz>
2991 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2992 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2994 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2995 CLEANUP_NO_PARTITIONING is not set.
2997 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2999 * doc/rtl.texi: Remove documentation of (const ...) wrappers
3000 for vectors, as a partial revert of r254296.
3001 * rtl.h (const_vec_p): Delete.
3002 (const_vec_duplicate_p): Don't test for vector CONSTs.
3003 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
3004 * expmed.c (make_tree): Likewise.
3007 * common.md (E, F): Use CONSTANT_P instead of checking for
3009 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
3010 checking for CONST_VECTOR.
3012 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3015 * predict.c (force_edge_cold): Handle in more sane way edges
3018 2018-01-09 Carl Love <cel@us.ibm.com>
3020 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
3022 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
3023 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
3024 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
3025 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
3026 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
3027 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
3028 * config/rs6000/rs6000-protos.h: Add extern defition for
3029 rs6000_generate_float2_double_code.
3030 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
3032 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
3033 (float2_v2df): Add define_expand.
3035 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
3038 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
3039 op_mode in the force_to_mode call.
3041 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
3043 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
3044 instead of checking each element individually.
3045 (aarch64_evpc_uzp): Likewise.
3046 (aarch64_evpc_zip): Likewise.
3047 (aarch64_evpc_ext): Likewise.
3048 (aarch64_evpc_rev): Likewise.
3049 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
3050 instead of checking each element individually. Return true without
3052 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
3053 whether all selected elements come from the same input, instead of
3054 checking each element individually. Remove calls to gen_rtx_REG,
3055 start_sequence and end_sequence and instead assert that no rtl is
3058 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
3060 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
3061 order of HIGH and CONST checks.
3063 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
3065 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
3066 if the destination isn't an SSA_NAME.
3068 2018-01-09 Richard Biener <rguenther@suse.de>
3070 PR tree-optimization/83668
3071 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
3073 (canonicalize_loop_form): ... here, renamed from ...
3074 (canonicalize_loop_closed_ssa_form): ... this and amended to
3075 swap successor edges for loop exit blocks to make us use
3076 the RPO order we need for initial schedule generation.
3078 2018-01-09 Joseph Myers <joseph@codesourcery.com>
3080 PR tree-optimization/64811
3081 * match.pd: When optimizing comparisons with Inf, avoid
3082 introducing or losing exceptions from comparisons with NaN.
3084 2018-01-09 Martin Liska <mliska@suse.cz>
3087 * asan.c (shadow_mem_size): Add gcc_assert.
3089 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
3091 Don't save registers in main().
3094 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
3095 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
3096 * config/avr/avr.c (avr_set_current_function): Don't error if
3097 naked, OS_task or OS_main are specified at the same time.
3098 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3100 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3102 * common/config/avr/avr-common.c (avr_option_optimization_table):
3103 Switch on -mmain-is-OS_task for optimizing compilations.
3105 2018-01-09 Richard Biener <rguenther@suse.de>
3107 PR tree-optimization/83572
3108 * graphite.c: Include cfganal.h.
3109 (graphite_transform_loops): Connect infinite loops to exit
3110 and remove fake edges at the end.
3112 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3114 * ipa-inline.c (edge_badness): Revert accidental checkin.
3116 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3119 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3120 symbols; not inline clones.
3122 2018-01-09 Jakub Jelinek <jakub@redhat.com>
3125 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3126 hard registers. Formatting fixes.
3128 PR preprocessor/83722
3129 * gcc.c (try_generate_repro): Pass
3130 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3131 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3134 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
3135 Kito Cheng <kito.cheng@gmail.com>
3137 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3138 (riscv_leaf_function_p): Delete.
3139 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3141 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3143 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3145 (do_ifelse): New function.
3146 (do_isel): New function.
3147 (do_sub3): New function.
3148 (do_add3): New function.
3149 (do_load_mask_compare): New function.
3150 (do_overlap_load_compare): New function.
3151 (expand_compare_loop): New function.
3152 (expand_block_compare): Call expand_compare_loop() when appropriate.
3153 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3155 (-mblock-compare-inline-loop-limit): New option.
3157 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3160 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3161 Reverse order of second and third operands in first alternative.
3162 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3163 of first and second elements in UNSPEC_VPERMR vector.
3164 (altivec_expand_vec_perm_le): Likewise.
3166 2017-01-08 Jeff Law <law@redhat.com>
3168 PR rtl-optimizatin/81308
3169 * tree-switch-conversion.c (cfg_altered): New file scoped static.
3170 (process_switch): If group_case_labels makes a change, then set
3172 (pass_convert_switch::execute): If a switch is converted, then
3173 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
3175 PR rtl-optimization/81308
3176 * recog.c (split_all_insns): Conditionally cleanup the CFG after
3179 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
3181 PR target/83663 - Revert r255946
3182 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3183 generation for cases where splatting a value is not useful.
3184 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3185 across a vec_duplicate and a paradoxical subreg forming a vector
3186 mode to a vec_concat.
3188 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3190 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3191 -march=armv8.3-a variants.
3192 * config/arm/t-multilib: Likewise.
3193 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
3195 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3197 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3199 (cceq_ior_compare_complement): Give it a name so I can use it, and
3200 change boolean_or_operator predicate to boolean_operator so it can
3201 be used to generate a crand.
3202 (eqne): New code iterator.
3203 (bd/bd_neg): New code_attrs.
3204 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3205 a single define_insn.
3206 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3207 decrement (bdnzt/bdnzf/bdzt/bdzf).
3208 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3209 with the new names of the branch decrement patterns, and added the
3210 names of the branch decrement conditional patterns.
3212 2018-01-08 Richard Biener <rguenther@suse.de>
3214 PR tree-optimization/83563
3215 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3218 2018-01-08 Richard Biener <rguenther@suse.de>
3221 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3223 2018-01-08 Richard Biener <rguenther@suse.de>
3225 PR tree-optimization/83685
3226 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3227 references to abnormals.
3229 2018-01-08 Richard Biener <rguenther@suse.de>
3232 * dwarf2out.c (output_indirect_strings): Handle empty
3233 skeleton_debug_str_hash.
3234 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3236 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3238 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3239 (emit_store_direct): Likewise.
3240 (arc_trampoline_adjust_address): Likewise.
3241 (arc_asm_trampoline_template): New function.
3242 (arc_initialize_trampoline): Use asm_trampoline_template.
3243 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3244 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3245 * config/arc/arc.md (flush_icache): Delete pattern.
3247 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3249 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3250 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3253 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3256 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3257 by not USED_FOR_TARGET.
3258 (make_pass_resolve_sw_modes): Likewise.
3260 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3262 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3265 2018-01-08 Richard Biener <rguenther@suse.de>
3268 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3270 2018-01-08 Richard Biener <rguenther@suse.de>
3273 * match.pd ((t * 2) / 2) -> t): Add missing :c.
3275 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
3278 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3279 basic blocks with a small number of successors.
3280 (convert_control_dep_chain_into_preds): Improve handling of
3282 (dump_predicates): Split apart into...
3283 (dump_pred_chain): ...here...
3284 (dump_pred_info): ...and here.
3285 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3286 (can_chain_union_be_invalidated_p): Improve check for invalidation
3288 (uninit_uses_cannot_happen): Avoid unnecessary if
3289 convert_control_dep_chain_into_preds yielded nothing.
3291 2018-01-06 Martin Sebor <msebor@redhat.com>
3293 PR tree-optimization/83640
3294 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3295 subtracting negative offset from size.
3296 (builtin_access::overlap): Adjust offset bounds of the access to fall
3297 within the size of the object if possible.
3299 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3301 PR rtl-optimization/83699
3302 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3303 extract_bit_field_as_subreg to cases in which the extracted
3304 value is also a vector.
3306 * lra-constraints.c (process_alt_operands): Test for the equivalence
3307 substitutions when detecting a possible reload cycle.
3309 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3312 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3313 by default if flag_selective_schedling{,2}. Formatting fixes.
3315 PR rtl-optimization/83682
3316 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3317 if it has non-VECTOR_MODE element mode.
3318 (vec_duplicate_p): Likewise.
3321 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3322 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3324 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3327 * config/i386/i386-builtin.def
3328 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3329 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3330 Require also OPTION_MASK_ISA_AVX512F in addition to
3331 OPTION_MASK_ISA_GFNI.
3332 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3333 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3334 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3335 to OPTION_MASK_ISA_GFNI.
3336 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3337 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3338 OPTION_MASK_ISA_AVX512BW.
3339 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3340 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3341 addition to OPTION_MASK_ISA_GFNI.
3342 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3343 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3344 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3345 to OPTION_MASK_ISA_GFNI.
3346 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3347 a requirement for all ISAs rather than any of them with a few
3349 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3351 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3352 bitmasks to be enabled with 3 exceptions, instead of requiring any
3353 enabled ISA with lots of exceptions.
3354 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3355 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3356 Change avx512bw in isa attribute to avx512f.
3357 * config/i386/sgxintrin.h: Add license boilerplate.
3358 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3359 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3360 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3361 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3363 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3364 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3365 temporarily sse2 rather than sse if not enabled already.
3368 * config/i386/sse.md (VI248_VLBW): Rename to ...
3369 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3370 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3371 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3372 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3373 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3374 mode iterator instead of VI248_VLBW.
3376 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3378 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3379 (record_modified): Skip clobbers; add debug output.
3380 (param_change_prob): Use sreal frequencies.
3382 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3384 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3385 punt for user-aligned variables.
3387 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3389 * tree-chrec.c (chrec_contains_symbols): Return true for
3392 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3395 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3396 of (x|y) == x for BICS pattern.
3398 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3400 PR tree-optimization/83605
3401 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3402 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3405 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3407 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3408 * config/epiphany/rtems.h: New file.
3410 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3411 Uros Bizjak <ubizjak@gmail.com>
3414 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3415 QIreg_operand instead of register_operand predicate.
3416 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3417 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3418 comments instead of -fmitigate[-_]rop.
3420 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3423 * cgraphunit.c (symbol_table::compile): Switch to text_section
3424 before calling assembly_start debug hook.
3425 * run-rtl-passes.c (run_rtl_passes): Likewise.
3428 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3430 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3431 range_int_cst_p rather than !symbolic_range_p before calling
3432 extract_range_from_multiplicative_op_1.
3434 2017-01-04 Jeff Law <law@redhat.com>
3436 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3437 redundant test in assertion.
3439 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3441 * doc/rtl.texi: Document machine_mode wrapper classes.
3443 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3445 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3448 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3450 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3451 the VEC_PERM_EXPR fold to fail.
3453 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3456 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3457 to switched_sections.
3459 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3462 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3465 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3468 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3469 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3471 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3474 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3475 is BLKmode and bitpos not zero or mode change is needed.
3477 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3480 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3483 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3486 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3487 instead of MULT rtx. Update all corresponding splitters.
3489 (*ssub<modesuffix>): Ditto.
3491 (*cmp_sadd_di): Update split patterns.
3492 (*cmp_sadd_si): Ditto.
3493 (*cmp_sadd_sidi): Ditto.
3494 (*cmp_ssub_di): Ditto.
3495 (*cmp_ssub_si): Ditto.
3496 (*cmp_ssub_sidi): Ditto.
3497 * config/alpha/predicates.md (const23_operand): New predicate.
3498 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3499 Look for ASHIFT, not MULT inner operand.
3500 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3502 2018-01-04 Martin Liska <mliska@suse.cz>
3504 PR gcov-profile/83669
3505 * gcov.c (output_intermediate_file): Add version to intermediate
3507 * doc/gcov.texi: Document new field 'version' in intermediate
3508 file format. Fix location of '-k' option of gcov command.
3510 2018-01-04 Martin Liska <mliska@suse.cz>
3513 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3515 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3517 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3519 2018-01-03 Martin Sebor <msebor@redhat.com>
3521 PR tree-optimization/83655
3522 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3523 checking calls with invalid arguments.
3525 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3527 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3528 (vectorizable_mask_load_store): Delete.
3529 (vectorizable_call): Return false for masked loads and stores.
3530 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3531 instead of gimple_assign_rhs1.
3532 (vectorizable_load): Handle IFN_MASK_LOAD.
3533 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3535 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3537 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3539 (vectorizable_mask_load_store): ...here.
3540 (vectorizable_load): ...and here.
3542 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3544 * tree-vect-stmts.c (vect_build_all_ones_mask)
3545 (vect_build_zero_merge_argument): New functions, split out from...
3546 (vectorizable_load): ...here.
3548 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3550 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3552 (vectorizable_mask_load_store): ...here.
3553 (vectorizable_store): ...and here.
3555 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3557 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3559 (vectorizable_mask_load_store): ...here.
3561 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3563 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3564 (vect_model_store_cost): Take a vec_load_store_type instead of a
3566 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3567 (vect_model_store_cost): Take a vec_load_store_type instead of a
3569 (vectorizable_mask_load_store): Update accordingly.
3570 (vectorizable_store): Likewise.
3571 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3573 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3575 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3576 IFN_MASK_LOAD calls here rather than...
3577 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3579 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3580 Alan Hayward <alan.hayward@arm.com>
3581 David Sherwood <david.sherwood@arm.com>
3583 * expmed.c (extract_bit_field_1): For vector extracts,
3584 fall back to extract_bit_field_as_subreg if vec_extract
3587 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3588 Alan Hayward <alan.hayward@arm.com>
3589 David Sherwood <david.sherwood@arm.com>
3591 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3592 they are variable or constant sized.
3593 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3594 slots for constant-sized data.
3596 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3597 Alan Hayward <alan.hayward@arm.com>
3598 David Sherwood <david.sherwood@arm.com>
3600 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3601 handling COND_EXPRs with boolean comparisons, try to find a better
3602 basis for the mask type than the boolean itself.
3604 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3606 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3607 is calculated and how it can be overridden.
3608 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3609 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3611 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3614 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3615 Alan Hayward <alan.hayward@arm.com>
3616 David Sherwood <david.sherwood@arm.com>
3618 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3619 Remove the mode argument.
3620 (aarch64_simd_valid_immediate): Remove the mode and inverse
3622 * config/aarch64/iterators.md (bitsize): New iterator.
3623 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3624 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3625 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3626 aarch64_simd_valid_immediate.
3627 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3628 (aarch64_reg_or_bic_imm): Likewise.
3629 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3630 with an insn_type enum and msl with a modifier_type enum.
3631 Replace element_width with a scalar_mode. Change the shift
3632 to unsigned int. Add constructors for scalar_float_mode and
3633 scalar_int_mode elements.
3634 (aarch64_vect_float_const_representable_p): Delete.
3635 (aarch64_can_const_movi_rtx_p)
3636 (aarch64_simd_scalar_immediate_valid_for_move)
3637 (aarch64_simd_make_constant): Update call to
3638 aarch64_simd_valid_immediate.
3639 (aarch64_advsimd_valid_immediate_hs): New function.
3640 (aarch64_advsimd_valid_immediate): Likewise.
3641 (aarch64_simd_valid_immediate): Remove mode and inverse
3642 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3643 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3644 and aarch64_float_const_representable_p on the result.
3645 (aarch64_output_simd_mov_immediate): Remove mode argument.
3646 Update call to aarch64_simd_valid_immediate and use of
3647 simd_immediate_info.
3648 (aarch64_output_scalar_simd_mov_immediate): Update call
3651 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3652 Alan Hayward <alan.hayward@arm.com>
3653 David Sherwood <david.sherwood@arm.com>
3655 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3656 (mode_nunits): Likewise CONST_MODE_NUNITS.
3657 * machmode.def (ADJUST_NUNITS): Document.
3658 * genmodes.c (mode_data::need_nunits_adj): New field.
3659 (blank_mode): Update accordingly.
3660 (adj_nunits): New variable.
3661 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3663 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3664 listed in adj_nunits.
3665 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3666 listed in adj_nunits. Don't emit case statements for such modes.
3667 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3668 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3669 nothing if adj_nunits is nonnull.
3670 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3671 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3672 (emit_mode_fbit): Update use of print_maybe_const_decl.
3673 (emit_move_size): Likewise. Treat the array as non-const
3675 (emit_mode_adjustments): Handle adj_nunits.
3677 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3679 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3680 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3681 (VECTOR_MODES): Use it.
3682 (make_vector_modes): Take the prefix as an argument.
3684 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3685 Alan Hayward <alan.hayward@arm.com>
3686 David Sherwood <david.sherwood@arm.com>
3688 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3689 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3690 for MODE_VECTOR_BOOL.
3691 * machmode.def (VECTOR_BOOL_MODE): Document.
3692 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3693 (make_vector_bool_mode): New function.
3694 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3696 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3697 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3699 * stor-layout.c (int_mode_for_mode): Likewise.
3700 * tree.c (build_vector_type_for_mode): Likewise.
3701 * varasm.c (output_constant_pool_2): Likewise.
3702 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3703 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3704 for MODE_VECTOR_BOOL.
3705 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3706 of mode class checks.
3707 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3708 instead of a list of mode class checks.
3709 (expand_vector_scalar_condition): Likewise.
3710 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3712 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3713 Alan Hayward <alan.hayward@arm.com>
3714 David Sherwood <david.sherwood@arm.com>
3716 * machmode.h (mode_size): Change from unsigned short to
3718 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3719 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3720 or if measurement_type is not polynomial.
3721 (fixed_size_mode::includes_p): Check for constant-sized modes.
3722 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3723 return a poly_uint16 rather than an unsigned short.
3724 (emit_mode_size): Change the type of mode_size from unsigned short
3725 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3726 (emit_mode_adjustments): Cope with polynomial vector sizes.
3727 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3729 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3731 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3732 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3733 * caller-save.c (setup_save_areas): Likewise.
3734 (replace_reg_with_saved_mem): Likewise.
3735 * calls.c (emit_library_call_value_1): Likewise.
3736 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3737 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3738 (gen_lowpart_for_combine): Likewise.
3739 * convert.c (convert_to_integer_1): Likewise.
3740 * cse.c (equiv_constant, cse_insn): Likewise.
3741 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3742 (cselib_subst_to_values): Likewise.
3743 * dce.c (word_dce_process_block): Likewise.
3744 * df-problems.c (df_word_lr_mark_ref): Likewise.
3745 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3746 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3747 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3748 (rtl_for_decl_location): Likewise.
3749 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3750 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3751 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3752 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3753 (expand_expr_real_1): Likewise.
3754 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3755 (pad_below): Likewise.
3756 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3757 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3758 * ira.c (get_subreg_tracking_sizes): Likewise.
3759 * ira-build.c (ira_create_allocno_objects): Likewise.
3760 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3761 (ira_sort_regnos_for_alter_reg): Likewise.
3762 * ira-costs.c (record_operand_costs): Likewise.
3763 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3764 (resolve_simple_move): Likewise.
3765 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3766 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3767 (lra_constraints): Likewise.
3768 (CONST_POOL_OK_P): Reject variable-sized modes.
3769 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3770 (add_pseudo_to_slot, lra_spill): Likewise.
3771 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3772 * optabs-query.c (get_best_extraction_insn): Likewise.
3773 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3774 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3775 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3776 * recog.c (offsettable_address_addr_space_p): Likewise.
3777 * regcprop.c (maybe_mode_change): Likewise.
3778 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3779 * regrename.c (build_def_use): Likewise.
3780 * regstat.c (dump_reg_info): Likewise.
3781 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3782 (find_reloads, find_reloads_subreg_address): Likewise.
3783 * reload1.c (eliminate_regs_1): Likewise.
3784 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3785 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3786 (simplify_binary_operation_1, simplify_subreg): Likewise.
3787 * targhooks.c (default_function_arg_padding): Likewise.
3788 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3789 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3790 (verify_gimple_assign_ternary): Likewise.
3791 * tree-inline.c (estimate_move_cost): Likewise.
3792 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3793 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3794 (get_address_cost_ainc): Likewise.
3795 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3796 (vect_supportable_dr_alignment): Likewise.
3797 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3798 (vectorizable_reduction): Likewise.
3799 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3800 (vectorizable_operation, vectorizable_load): Likewise.
3801 * tree.c (build_same_sized_truth_vector_type): Likewise.
3802 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3803 * var-tracking.c (emit_note_insn_var_location): Likewise.
3804 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3805 (ADDR_VEC_ALIGN): Likewise.
3807 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3808 Alan Hayward <alan.hayward@arm.com>
3809 David Sherwood <david.sherwood@arm.com>
3811 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3813 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3814 or if measurement_type is polynomial.
3815 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3816 * combine.c (make_extraction): Likewise.
3817 * dse.c (find_shift_sequence): Likewise.
3818 * dwarf2out.c (mem_loc_descriptor): Likewise.
3819 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3820 (extract_bit_field, extract_low_bits): Likewise.
3821 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3822 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3823 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3824 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3825 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3826 * reload.c (find_reloads): Likewise.
3827 * reload1.c (alter_reg): Likewise.
3828 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3829 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3830 * tree-if-conv.c (predicate_mem_writes): Likewise.
3831 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3832 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3833 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3834 * valtrack.c (dead_debug_insert_temp): Likewise.
3835 * varasm.c (mergeable_constant_section): Likewise.
3836 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3838 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3839 Alan Hayward <alan.hayward@arm.com>
3840 David Sherwood <david.sherwood@arm.com>
3842 * expr.c (expand_assignment): Cope with polynomial mode sizes
3843 when assigning to a CONCAT.
3845 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3846 Alan Hayward <alan.hayward@arm.com>
3847 David Sherwood <david.sherwood@arm.com>
3849 * machmode.h (mode_precision): Change from unsigned short to
3851 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3853 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3854 or if measurement_type is not polynomial.
3855 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3856 in which the mode is already known to be a scalar_int_mode.
3857 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3858 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3860 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3861 for GET_MODE_PRECISION.
3862 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3863 for GET_MODE_PRECISION.
3864 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3866 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3867 (expand_field_assignment, make_extraction): Likewise.
3868 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3869 (get_last_value): Likewise.
3870 * convert.c (convert_to_integer_1): Likewise.
3871 * cse.c (cse_insn): Likewise.
3872 * expr.c (expand_expr_real_1): Likewise.
3873 * lra-constraints.c (simplify_operand_subreg): Likewise.
3874 * optabs-query.c (can_atomic_load_p): Likewise.
3875 * optabs.c (expand_atomic_load): Likewise.
3876 (expand_atomic_store): Likewise.
3877 * ree.c (combine_reaching_defs): Likewise.
3878 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3879 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3880 * tree.h (type_has_mode_precision_p): Likewise.
3881 * ubsan.c (instrument_si_overflow): Likewise.
3883 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3884 Alan Hayward <alan.hayward@arm.com>
3885 David Sherwood <david.sherwood@arm.com>
3887 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3888 polynomial numbers of units.
3889 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3890 (valid_vector_subparts_p): New function.
3891 (build_vector_type): Remove temporary shim and take the number
3892 of units as a poly_uint64 rather than an int.
3893 (build_opaque_vector_type): Take the number of units as a
3894 poly_uint64 rather than an int.
3895 * tree.c (build_vector_from_ctor): Handle polynomial
3896 TYPE_VECTOR_SUBPARTS.
3897 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3898 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3899 (build_vector_from_val): If the number of units is variable,
3900 use build_vec_duplicate_cst for constant operands and
3901 VEC_DUPLICATE_EXPR otherwise.
3902 (make_vector_type): Remove temporary is_constant ().
3903 (build_vector_type, build_opaque_vector_type): Take the number of
3904 units as a poly_uint64 rather than an int.
3905 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3907 * cfgexpand.c (expand_debug_expr): Likewise.
3908 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3909 (store_constructor, expand_expr_real_1): Likewise.
3910 (const_scalar_mask_from_tree): Likewise.
3911 * fold-const-call.c (fold_const_reduction): Likewise.
3912 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3913 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3914 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3915 (fold_relational_const): Likewise.
3916 (native_interpret_vector): Likewise. Change the size from an
3917 int to an unsigned int.
3918 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3919 TYPE_VECTOR_SUBPARTS.
3920 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3921 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3922 duplicating a non-constant operand into a variable-length vector.
3923 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3924 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3925 * ipa-icf.c (sem_variable::equals): Likewise.
3926 * match.pd: Likewise.
3927 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3928 * print-tree.c (print_node): Likewise.
3929 * stor-layout.c (layout_type): Likewise.
3930 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3931 * tree-cfg.c (verify_gimple_comparison): Likewise.
3932 (verify_gimple_assign_binary): Likewise.
3933 (verify_gimple_assign_ternary): Likewise.
3934 (verify_gimple_assign_single): Likewise.
3935 * tree-pretty-print.c (dump_generic_node): Likewise.
3936 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3937 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3938 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3939 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3940 (vect_shift_permute_load_chain): Likewise.
3941 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3942 (expand_vector_condition, optimize_vector_constructor): Likewise.
3943 (lower_vec_perm, get_compute_type): Likewise.
3944 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3945 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3946 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3947 (vect_recog_mask_conversion_pattern): Likewise.
3948 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3949 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3950 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3951 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3952 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3953 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3954 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3955 (supportable_widening_operation): Likewise.
3956 (supportable_narrowing_operation): Likewise.
3957 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3959 * varasm.c (output_constant): Likewise.
3961 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3962 Alan Hayward <alan.hayward@arm.com>
3963 David Sherwood <david.sherwood@arm.com>
3965 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3966 so that both the length == 3 and length != 3 cases set up their
3967 own permute vectors. Add comments explaining why we know the
3968 number of elements is constant.
3969 (vect_permute_load_chain): Likewise.
3971 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3972 Alan Hayward <alan.hayward@arm.com>
3973 David Sherwood <david.sherwood@arm.com>
3975 * machmode.h (mode_nunits): Change from unsigned char to
3977 (ONLY_FIXED_SIZE_MODES): New macro.
3978 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3979 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3980 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3982 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3983 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3984 or if measurement_type is not polynomial.
3985 * genmodes.c (ZERO_COEFFS): New macro.
3986 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3988 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3989 Use ZERO_COEFFS when emitting initializers.
3990 * data-streamer.h (bp_pack_poly_value): New function.
3991 (bp_unpack_poly_value): Likewise.
3992 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3993 for GET_MODE_NUNITS.
3994 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3995 for GET_MODE_NUNITS.
3996 * tree.c (make_vector_type): Remove temporary shim and make
3997 the real function take the number of units as a poly_uint64
3999 (build_vector_type_for_mode): Handle polynomial nunits.
4000 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
4001 * emit-rtl.c (const_vec_series_p_1): Likewise.
4002 (gen_rtx_CONST_VECTOR): Likewise.
4003 * fold-const.c (test_vec_duplicate_folding): Likewise.
4004 * genrecog.c (validate_pattern): Likewise.
4005 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
4006 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
4007 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
4008 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
4009 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
4010 * rtlanal.c (subreg_get_info): Likewise.
4011 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4012 (vect_grouped_load_supported): Likewise.
4013 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
4014 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
4015 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
4016 (simplify_const_unary_operation, simplify_binary_operation_1)
4017 (simplify_const_binary_operation, simplify_ternary_operation)
4018 (test_vector_ops_duplicate, test_vector_ops): Likewise.
4019 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
4020 instead of CONST_VECTOR_NUNITS.
4021 * varasm.c (output_constant_pool_2): Likewise.
4022 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
4023 explicit-encoded elements in the XVEC for variable-length vectors.
4025 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4027 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
4029 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4030 Alan Hayward <alan.hayward@arm.com>
4031 David Sherwood <david.sherwood@arm.com>
4033 * coretypes.h (fixed_size_mode): Declare.
4034 (fixed_size_mode_pod): New typedef.
4035 * builtins.h (target_builtins::x_apply_args_mode)
4036 (target_builtins::x_apply_result_mode): Change type to
4037 fixed_size_mode_pod.
4038 * builtins.c (apply_args_size, apply_result_size, result_vector)
4039 (expand_builtin_apply_args_1, expand_builtin_apply)
4040 (expand_builtin_return): Update accordingly.
4042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4044 * cse.c (hash_rtx_cb): Hash only the encoded elements.
4045 * cselib.c (cselib_hash_rtx): Likewise.
4046 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
4047 CONST_VECTOR encoding.
4049 2017-01-03 Jakub Jelinek <jakub@redhat.com>
4050 Jeff Law <law@redhat.com>
4053 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
4054 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
4055 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
4056 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
4059 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
4060 explicitly probe *sp in a noreturn function if there were any callee
4061 register saves or frame pointer is needed.
4063 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4066 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
4067 BLKmode for ternary, binary or unary expressions.
4070 * var-tracking.c (delete_vta_debug_insn): New inline function.
4071 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
4072 insns from get_insns () to NULL instead of each bb separately.
4073 Use delete_vta_debug_insn. No longer static.
4074 (vt_debug_insns_local, variable_tracking_main_1): Adjust
4075 delete_vta_debug_insns callers.
4076 * rtl.h (delete_vta_debug_insns): Declare.
4077 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
4078 instead of variable_tracking_main.
4080 2018-01-03 Martin Sebor <msebor@redhat.com>
4082 PR tree-optimization/83603
4083 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
4084 arguments past the endof the argument list in functions declared
4085 without a prototype.
4086 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
4087 Avoid checking when arguments are null.
4089 2018-01-03 Martin Sebor <msebor@redhat.com>
4092 * doc/extend.texi (attribute const): Fix a typo.
4093 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
4094 issuing -Wsuggest-attribute for void functions.
4096 2018-01-03 Martin Sebor <msebor@redhat.com>
4098 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4099 offset_int::from instead of wide_int::to_shwi.
4100 (maybe_diag_overlap): Remove assertion.
4101 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4102 * gimple-ssa-sprintf.c (format_directive): Same.
4103 (parse_directive): Same.
4104 (sprintf_dom_walker::compute_format_length): Same.
4105 (try_substitute_return_value): Same.
4107 2017-01-03 Jeff Law <law@redhat.com>
4110 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4111 non-constant residual for zero at runtime and avoid probing in
4112 that case. Reorganize code for trailing problem to mirror handling
4115 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4117 PR tree-optimization/83501
4118 * tree-ssa-strlen.c (get_string_cst): New.
4119 (handle_char_store): Call get_string_cst.
4121 2018-01-03 Martin Liska <mliska@suse.cz>
4123 PR tree-optimization/83593
4124 * tree-ssa-strlen.c: Include tree-cfg.h.
4125 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4126 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4127 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4129 (strlen_dom_walker::before_dom_children): Call
4130 gimple_purge_dead_eh_edges. Dump tranformation with details
4132 (strlen_dom_walker::before_dom_children): Update call by adding
4133 new argument cleanup_eh.
4134 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4136 2018-01-03 Martin Liska <mliska@suse.cz>
4139 * cif-code.def (VARIADIC_THUNK): New enum value.
4140 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4143 2018-01-03 Jan Beulich <jbeulich@suse.com>
4145 * sse.md (mov<mode>_internal): Tighten condition for when to use
4146 vmovdqu<ssescalarsize> for TI and OI modes.
4148 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4150 Update copyright years.
4152 2018-01-03 Martin Liska <mliska@suse.cz>
4155 * ipa-visibility.c (function_and_variable_visibility): Skip
4156 functions with noipa attribure.
4158 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4160 * gcc.c (process_command): Update copyright notice dates.
4161 * gcov-dump.c (print_version): Ditto.
4162 * gcov.c (print_version): Ditto.
4163 * gcov-tool.c (print_version): Ditto.
4164 * gengtype.c (create_file): Ditto.
4165 * doc/cpp.texi: Bump @copying's copyright year.
4166 * doc/cppinternals.texi: Ditto.
4167 * doc/gcc.texi: Ditto.
4168 * doc/gccint.texi: Ditto.
4169 * doc/gcov.texi: Ditto.
4170 * doc/install.texi: Ditto.
4171 * doc/invoke.texi: Ditto.
4173 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4175 * vector-builder.h (vector_builder::m_full_nelts): Change from
4176 unsigned int to poly_uint64.
4177 (vector_builder::full_nelts): Update prototype accordingly.
4178 (vector_builder::new_vector): Likewise.
4179 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4180 (vector_builder::operator ==): Likewise.
4181 (vector_builder::finalize): Likewise.
4182 * int-vector-builder.h (int_vector_builder::int_vector_builder):
4183 Take the number of elements as a poly_uint64 rather than an
4185 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4186 from unsigned int to poly_uint64.
4187 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4188 (vec_perm_indices::new_vector): Likewise.
4189 (vec_perm_indices::length): Likewise.
4190 (vec_perm_indices::nelts_per_input): Likewise.
4191 (vec_perm_indices::input_nelts): Likewise.
4192 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4193 number of elements per input as a poly_uint64 rather than an
4194 unsigned int. Use the original encoding for variable-length
4195 vectors, rather than clamping each individual element.
4196 For the second and subsequent elements in each pattern,
4197 clamp the step and base before clamping their sum.
4198 (vec_perm_indices::series_p): Handle polynomial element counts.
4199 (vec_perm_indices::all_in_range_p): Likewise.
4200 (vec_perm_indices_to_tree): Likewise.
4201 (vec_perm_indices_to_rtx): Likewise.
4202 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4203 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4204 (tree_vector_builder::new_binary_operation): Handle polynomial
4205 element counts. Return false if we need to know the number
4206 of elements at compile time.
4207 * fold-const.c (fold_vec_perm): Punt if the number of elements
4208 isn't known at compile time.
4210 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4212 * vec-perm-indices.h (vec_perm_builder): Change element type
4213 from HOST_WIDE_INT to poly_int64.
4214 (vec_perm_indices::element_type): Update accordingly.
4215 (vec_perm_indices::clamp): Handle polynomial element_types.
4216 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4217 (vec_perm_indices::all_in_range_p): Likewise.
4218 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4220 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4221 polynomial vec_perm_indices element types.
4222 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4223 * fold-const.c (fold_vec_perm): Likewise.
4224 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4225 * tree-vect-generic.c (lower_vec_perm): Likewise.
4226 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4227 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4228 element type to HOST_WIDE_INT.
4230 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4231 Alan Hayward <alan.hayward@arm.com>
4232 David Sherwood <david.sherwood@arm.com>
4234 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4235 rather than an int. Use plus_constant.
4236 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4237 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4239 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4240 Alan Hayward <alan.hayward@arm.com>
4241 David Sherwood <david.sherwood@arm.com>
4243 * calls.c (emit_call_1, expand_call): Change struct_value_size from
4244 a HOST_WIDE_INT to a poly_int64.
4246 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4247 Alan Hayward <alan.hayward@arm.com>
4248 David Sherwood <david.sherwood@arm.com>
4250 * calls.c (load_register_parameters): Cope with polynomial
4251 mode sizes. Require a constant size for BLKmode parameters
4252 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
4253 forces a parameter to be padded at the lsb end in order to
4254 fill a complete number of words, require the parameter size
4255 to be ordered wrt UNITS_PER_WORD.
4257 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4258 Alan Hayward <alan.hayward@arm.com>
4259 David Sherwood <david.sherwood@arm.com>
4261 * reload1.c (spill_stack_slot_width): Change element type
4262 from unsigned int to poly_uint64_pod.
4263 (alter_reg): Treat mode sizes as polynomial.
4265 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4266 Alan Hayward <alan.hayward@arm.com>
4267 David Sherwood <david.sherwood@arm.com>
4269 * reload.c (complex_word_subreg_p): New function.
4270 (reload_inner_reg_of_subreg, push_reload): Use it.
4272 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4273 Alan Hayward <alan.hayward@arm.com>
4274 David Sherwood <david.sherwood@arm.com>
4276 * lra-constraints.c (process_alt_operands): Reject matched
4277 operands whose sizes aren't ordered.
4278 (match_reload): Refer to this check here.
4280 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4281 Alan Hayward <alan.hayward@arm.com>
4282 David Sherwood <david.sherwood@arm.com>
4284 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4285 that the mode size is in the set {1, 2, 4, 8, 16}.
4287 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4288 Alan Hayward <alan.hayward@arm.com>
4289 David Sherwood <david.sherwood@arm.com>
4291 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4292 Use plus_constant instead of gen_rtx_PLUS.
4294 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4295 Alan Hayward <alan.hayward@arm.com>
4296 David Sherwood <david.sherwood@arm.com>
4298 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4299 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4300 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4301 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4302 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4303 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4304 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4305 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4306 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4307 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4309 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4310 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4311 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4312 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4313 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4314 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4315 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4316 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4317 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4318 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4320 * expr.c (emit_move_resolve_push): Treat the input and result
4321 of PUSH_ROUNDING as a poly_int64.
4322 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4323 (emit_push_insn): Likewise.
4324 * lra-eliminations.c (mark_not_eliminable): Likewise.
4325 * recog.c (push_operand): Likewise.
4326 * reload1.c (elimination_effects): Likewise.
4327 * rtlanal.c (nonzero_bits1): Likewise.
4328 * calls.c (store_one_arg): Likewise. Require the padding to be
4329 known at compile time.
4331 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4332 Alan Hayward <alan.hayward@arm.com>
4333 David Sherwood <david.sherwood@arm.com>
4335 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4336 Use plus_constant instead of gen_rtx_PLUS.
4338 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4339 Alan Hayward <alan.hayward@arm.com>
4340 David Sherwood <david.sherwood@arm.com>
4342 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4345 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4346 Alan Hayward <alan.hayward@arm.com>
4347 David Sherwood <david.sherwood@arm.com>
4349 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4350 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4351 via stack temporaries. Treat the mode size as polynomial too.
4353 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4354 Alan Hayward <alan.hayward@arm.com>
4355 David Sherwood <david.sherwood@arm.com>
4357 * expr.c (expand_expr_real_2): When handling conversions involving
4358 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4359 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4360 as a poly_uint64 too.
4362 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4363 Alan Hayward <alan.hayward@arm.com>
4364 David Sherwood <david.sherwood@arm.com>
4366 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4368 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4369 Alan Hayward <alan.hayward@arm.com>
4370 David Sherwood <david.sherwood@arm.com>
4372 * combine.c (can_change_dest_mode): Handle polynomial
4373 REGMODE_NATURAL_SIZE.
4374 * expmed.c (store_bit_field_1): Likewise.
4375 * expr.c (store_constructor): Likewise.
4376 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4377 and polynomial REGMODE_NATURAL_SIZE.
4378 (gen_lowpart_common): Likewise.
4379 * reginfo.c (record_subregs_of_mode): Likewise.
4380 * rtlanal.c (read_modify_subreg_p): Likewise.
4382 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4383 Alan Hayward <alan.hayward@arm.com>
4384 David Sherwood <david.sherwood@arm.com>
4386 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4387 numbers of elements.
4389 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4390 Alan Hayward <alan.hayward@arm.com>
4391 David Sherwood <david.sherwood@arm.com>
4393 * match.pd: Cope with polynomial numbers of vector elements.
4395 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4396 Alan Hayward <alan.hayward@arm.com>
4397 David Sherwood <david.sherwood@arm.com>
4399 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4400 in a POINTER_PLUS_EXPR.
4402 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4403 Alan Hayward <alan.hayward@arm.com>
4404 David Sherwood <david.sherwood@arm.com>
4406 * omp-simd-clone.c (simd_clone_subparts): New function.
4407 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4408 (ipa_simd_modify_function_body): Likewise.
4410 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4411 Alan Hayward <alan.hayward@arm.com>
4412 David Sherwood <david.sherwood@arm.com>
4414 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4415 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4416 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4417 (expand_vector_condition, vector_element): Likewise.
4418 (subparts_gt): New function.
4419 (get_compute_type): Use subparts_gt.
4420 (count_type_subparts): Delete.
4421 (expand_vector_operations_1): Use subparts_gt instead of
4422 count_type_subparts.
4424 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4425 Alan Hayward <alan.hayward@arm.com>
4426 David Sherwood <david.sherwood@arm.com>
4428 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4429 (vect_compile_time_alias): ...this new function. Do the calculation
4430 on poly_ints rather than trees.
4431 (vect_prune_runtime_alias_test_list): Update call accordingly.
4433 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4434 Alan Hayward <alan.hayward@arm.com>
4435 David Sherwood <david.sherwood@arm.com>
4437 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4439 (vect_schedule_slp_instance): Likewise.
4441 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4442 Alan Hayward <alan.hayward@arm.com>
4443 David Sherwood <david.sherwood@arm.com>
4445 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4446 constant and extern definitions for variable-length vectors.
4447 (vect_get_constant_vectors): Note that the number of units
4448 is known to be constant.
4450 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4451 Alan Hayward <alan.hayward@arm.com>
4452 David Sherwood <david.sherwood@arm.com>
4454 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4455 of units as polynomial. Choose between WIDE and NARROW based
4458 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4459 Alan Hayward <alan.hayward@arm.com>
4460 David Sherwood <david.sherwood@arm.com>
4462 * tree-vect-stmts.c (simd_clone_subparts): New function.
4463 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4465 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4466 Alan Hayward <alan.hayward@arm.com>
4467 David Sherwood <david.sherwood@arm.com>
4469 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4470 vectors as polynomial. Use build_index_vector for
4473 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4474 Alan Hayward <alan.hayward@arm.com>
4475 David Sherwood <david.sherwood@arm.com>
4477 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4478 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4479 for variable-length vectors.
4480 (vectorizable_mask_load_store): Treat the number of units as
4481 polynomial, asserting that it is constant if the condition has
4482 already been enforced.
4483 (vectorizable_store, vectorizable_load): Likewise.
4485 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4486 Alan Hayward <alan.hayward@arm.com>
4487 David Sherwood <david.sherwood@arm.com>
4489 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4490 of units as polynomial. Punt if we can't tell at compile time
4491 which vector contains the final result.
4493 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4494 Alan Hayward <alan.hayward@arm.com>
4495 David Sherwood <david.sherwood@arm.com>
4497 * tree-vect-loop.c (vectorizable_induction): Treat the number
4498 of units as polynomial. Punt on SLP inductions. Use an integer
4499 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4500 cast of such a series for variable-length floating-point
4503 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4504 Alan Hayward <alan.hayward@arm.com>
4505 David Sherwood <david.sherwood@arm.com>
4507 * tree.h (build_index_vector): Declare.
4508 * tree.c (build_index_vector): New function.
4509 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4510 of units as polynomial, forcibly converting it to a constant if
4511 vectorizable_reduction has already enforced the condition.
4512 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4513 to create a {1,2,3,...} vector.
4514 (vectorizable_reduction): Treat the number of units as polynomial.
4515 Choose vectype_in based on the largest scalar element size rather
4516 than the smallest number of units. Enforce the restrictions
4519 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4520 Alan Hayward <alan.hayward@arm.com>
4521 David Sherwood <david.sherwood@arm.com>
4523 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4524 number of units as polynomial.
4526 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4527 Alan Hayward <alan.hayward@arm.com>
4528 David Sherwood <david.sherwood@arm.com>
4530 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4531 * target.def (autovectorize_vector_sizes): Return the vector sizes
4532 by pointer, using vector_sizes rather than a bitmask.
4533 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4534 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4535 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4537 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4538 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4539 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4540 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4541 * omp-general.c (omp_max_vf): Likewise.
4542 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4543 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4544 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4545 * tree-vect-slp.c (vect_slp_bb): Likewise.
4546 * doc/tm.texi: Regenerate.
4547 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4549 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4550 the vector size as a poly_uint64 rather than an unsigned int.
4551 (current_vector_size): Change from an unsigned int to a poly_uint64.
4552 (get_vectype_for_scalar_type): Update accordingly.
4553 * tree.h (build_truth_vector_type): Take the size and number of
4554 units as a poly_uint64 rather than an unsigned int.
4555 (build_vector_type): Add a temporary overload that takes
4556 the number of units as a poly_uint64 rather than an unsigned int.
4557 * tree.c (make_vector_type): Likewise.
4558 (build_truth_vector_type): Take the number of units as a poly_uint64
4559 rather than an unsigned int.
4561 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4562 Alan Hayward <alan.hayward@arm.com>
4563 David Sherwood <david.sherwood@arm.com>
4565 * target.def (get_mask_mode): Take the number of units and length
4566 as poly_uint64s rather than unsigned ints.
4567 * targhooks.h (default_get_mask_mode): Update accordingly.
4568 * targhooks.c (default_get_mask_mode): Likewise.
4569 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4570 * doc/tm.texi: Regenerate.
4572 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4573 Alan Hayward <alan.hayward@arm.com>
4574 David Sherwood <david.sherwood@arm.com>
4576 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4577 * omp-general.c (omp_max_vf): Likewise.
4578 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4579 (expand_omp_simd): Handle polynomial safelen.
4580 * omp-low.c (omplow_simd_context): Add a default constructor.
4581 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4582 (lower_rec_simd_input_clauses): Update accordingly.
4583 (lower_rec_input_clauses): Likewise.
4585 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4586 Alan Hayward <alan.hayward@arm.com>
4587 David Sherwood <david.sherwood@arm.com>
4589 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4590 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4591 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4592 (vect_analyze_slp_cost): Likewise.
4593 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4594 (vect_model_load_cost): Likewise.
4596 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4597 Alan Hayward <alan.hayward@arm.com>
4598 David Sherwood <david.sherwood@arm.com>
4600 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4601 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4602 from an unsigned int * to a poly_uint64_pod *.
4603 (calculate_unrolling_factor): New function.
4604 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4606 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4607 Alan Hayward <alan.hayward@arm.com>
4608 David Sherwood <david.sherwood@arm.com>
4610 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4611 from an unsigned int to a poly_uint64.
4612 (_loop_vec_info::slp_unrolling_factor): Likewise.
4613 (_loop_vec_info::vectorization_factor): Change from an int
4615 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4616 (vect_get_num_vectors): New function.
4617 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4618 (vect_get_num_copies): Use vect_get_num_vectors.
4619 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4620 to an unsigned int *.
4621 (vect_analyze_data_refs): Change min_vf from an int * to a
4623 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4624 than an unsigned HOST_WIDE_INT.
4625 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4626 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4627 to an unsigned int *.
4628 (vect_analyze_data_ref_dependences): Likewise.
4629 (vect_compute_data_ref_alignment): Handle polynomial vf.
4630 (vect_enhance_data_refs_alignment): Likewise.
4631 (vect_prune_runtime_alias_test_list): Likewise.
4632 (vect_shift_permute_load_chain): Likewise.
4633 (vect_supportable_dr_alignment): Likewise.
4634 (dependence_distance_ge_vf): Take the vectorization factor as a
4635 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4636 (vect_analyze_data_refs): Change min_vf from an int * to a
4638 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4639 vfm1 as a poly_uint64 rather than an int. Make the same change
4640 for the returned bound_scalar.
4641 (vect_gen_vector_loop_niters): Handle polynomial vf.
4642 (vect_do_peeling): Likewise. Update call to
4643 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4644 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4646 * tree-vect-loop.c (vect_determine_vectorization_factor)
4647 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4648 (vect_get_known_peeling_cost): Likewise.
4649 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4650 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4651 (vect_transform_loop): Likewise. Use the lowest possible VF when
4652 updating the upper bounds of the loop.
4653 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4655 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4656 polynomial unroll factors.
4657 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4658 (vect_make_slp_decision): Likewise.
4659 (vect_supported_load_permutation_p): Likewise, and polynomial
4661 (vect_analyze_slp_cost): Handle polynomial vf.
4662 (vect_slp_analyze_node_operations): Likewise.
4663 (vect_slp_analyze_bb_1): Likewise.
4664 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4665 than an unsigned HOST_WIDE_INT.
4666 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4667 (vectorizable_load): Handle polynomial vf.
4668 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4670 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4672 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4673 Alan Hayward <alan.hayward@arm.com>
4674 David Sherwood <david.sherwood@arm.com>
4676 * match.pd: Handle bit operations involving three constants
4677 and try to fold one pair.
4679 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4681 * tree-vect-loop-manip.c: Include gimple-fold.h.
4682 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4683 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4684 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4685 Add a path that uses a step of VF instead of 1, but disable it
4687 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4688 and niters_no_overflow parameters. Update calls to
4689 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4690 Create a new SSA name if the latter choses to use a ste other
4691 than zero, and return it via niters_vector_mult_vf_var.
4692 * tree-vect-loop.c (vect_transform_loop): Update calls to
4693 vect_do_peeling, vect_gen_vector_loop_niters and
4694 slpeel_make_loop_iterate_ntimes.
4695 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4696 (vect_gen_vector_loop_niters): Update declarations after above changes.
4698 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4700 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4701 128-bit round to integer instructions.
4702 (ceil<mode>2): Likewise.
4703 (btrunc<mode>2): Likewise.
4704 (round<mode>2): Likewise.
4706 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4708 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4709 unaligned VSX load/store on P8/P9.
4710 (expand_block_clear): Allow the use of unaligned VSX
4711 load/store on P8/P9.
4713 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4715 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4717 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4718 swap associated with both a load and a store.
4720 2018-01-02 Andrew Waterman <andrew@sifive.com>
4722 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4723 * config/riscv/riscv.md (clear_cache): Use it.
4725 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4727 * web.c: Remove out-of-date comment.
4729 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4731 * expr.c (fixup_args_size_notes): Check that any existing
4732 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4733 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4734 (emit_single_push_insn): ...here.
4736 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4738 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4739 (const_vector_encoded_nelts): New function.
4740 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4741 (const_vector_int_elt, const_vector_elt): Declare.
4742 * emit-rtl.c (const_vector_int_elt_1): New function.
4743 (const_vector_elt): Likewise.
4744 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4745 of CONST_VECTOR_ELT.
4747 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4749 * expr.c: Include rtx-vector-builder.h.
4750 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4751 directly on the tree encoding.
4752 (const_vector_from_tree): Likewise.
4753 * optabs.c: Include rtx-vector-builder.h.
4754 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4755 sequence of "u" values.
4756 * vec-perm-indices.c: Include rtx-vector-builder.h.
4757 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4758 directly on the vec_perm_indices encoding.
4760 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4762 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4763 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4764 * rtx-vector-builder.h: New file.
4765 * rtx-vector-builder.c: Likewise.
4766 * rtl.h (rtx_def::u2): Add a const_vector field.
4767 (CONST_VECTOR_NPATTERNS): New macro.
4768 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4769 (CONST_VECTOR_DUPLICATE_P): Likewise.
4770 (CONST_VECTOR_STEPPED_P): Likewise.
4771 (CONST_VECTOR_ENCODED_ELT): Likewise.
4772 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4773 (unwrap_const_vec_duplicate): Likewise.
4774 (const_vec_series_p): Check for a non-duplicated vector encoding.
4775 Say that the function only returns true for integer vectors.
4776 * emit-rtl.c: Include rtx-vector-builder.h.
4777 (gen_const_vec_duplicate_1): Delete.
4778 (gen_const_vector): Call gen_const_vec_duplicate instead of
4779 gen_const_vec_duplicate_1.
4780 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4781 (gen_const_vec_duplicate): Use rtx_vector_builder.
4782 (gen_const_vec_series): Likewise.
4783 (gen_rtx_CONST_VECTOR): Likewise.
4784 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4785 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4786 Build a new vector rather than modifying a CONST_VECTOR in-place.
4787 (handle_special_swappables): Update call accordingly.
4788 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4789 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4790 Build a new vector rather than modifying a CONST_VECTOR in-place.
4791 (handle_special_swappables): Update call accordingly.
4793 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4795 * simplify-rtx.c (simplify_const_binary_operation): Use
4796 CONST_VECTOR_ELT instead of XVECEXP.
4798 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4800 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4801 the selector elements to be different from the data elements
4802 if the selector is a VECTOR_CST.
4803 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4804 ssizetype for the selector.
4806 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4808 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4809 before testing each element individually.
4810 * tree-vect-generic.c (lower_vec_perm): Likewise.
4812 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4814 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4815 * selftest-run-tests.c (selftest::run_tests): Call it.
4816 * vector-builder.h (vector_builder::operator ==): New function.
4817 (vector_builder::operator !=): Likewise.
4818 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4819 (vec_perm_indices::all_from_input_p): New function.
4820 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4821 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4822 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4823 instead of reading the VECTOR_CST directly. Detect whether both
4824 vector inputs are the same before constructing the vec_perm_indices,
4825 and update the number of inputs argument accordingly. Use the
4826 utility functions added above. Only construct sel2 if we need to.
4828 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4830 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4831 the broadcast of the low byte.
4832 (expand_mult_highpart): Use an explicit encoding for the permutes.
4833 * optabs-query.c (can_mult_highpart_p): Likewise.
4834 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4835 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4836 (vectorizable_bswap): Likewise.
4837 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4838 explicit encoding for the power-of-2 permutes.
4839 (vect_permute_store_chain): Likewise.
4840 (vect_grouped_load_supported): Likewise.
4841 (vect_permute_load_chain): Likewise.
4843 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4845 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4846 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4847 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4848 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4849 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4850 (vect_gen_perm_mask_any): Likewise.
4852 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4854 * int-vector-builder.h: New file.
4855 * vec-perm-indices.h: Include int-vector-builder.h.
4856 (vec_perm_indices): Redefine as an int_vector_builder.
4857 (auto_vec_perm_indices): Delete.
4858 (vec_perm_builder): Redefine as a stand-alone class.
4859 (vec_perm_indices::vec_perm_indices): New function.
4860 (vec_perm_indices::clamp): Likewise.
4861 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4862 (vec_perm_indices::new_vector): New function.
4863 (vec_perm_indices::new_expanded_vector): Update for new
4864 vec_perm_indices class.
4865 (vec_perm_indices::rotate_inputs): New function.
4866 (vec_perm_indices::all_in_range_p): Operate directly on the
4867 encoded form, without computing elided elements.
4868 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4869 encoding. Update for new vec_perm_indices class.
4870 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4871 the given vec_perm_builder.
4872 (expand_vec_perm_var): Update vec_perm_builder constructor.
4873 (expand_mult_highpart): Use vec_perm_builder instead of
4874 auto_vec_perm_indices.
4875 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4876 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4877 or double series encoding as appropriate.
4878 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4879 vec_perm_indices instead of auto_vec_perm_indices.
4880 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4881 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4882 (vect_permute_store_chain): Likewise.
4883 (vect_grouped_load_supported): Likewise.
4884 (vect_permute_load_chain): Likewise.
4885 (vect_shift_permute_load_chain): Likewise.
4886 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4887 (vect_transform_slp_perm_load): Likewise.
4888 (vect_schedule_slp_instance): Likewise.
4889 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4890 (vectorizable_mask_load_store): Likewise.
4891 (vectorizable_bswap): Likewise.
4892 (vectorizable_store): Likewise.
4893 (vectorizable_load): Likewise.
4894 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4895 vec_perm_indices instead of auto_vec_perm_indices. Use
4896 tree_to_vec_perm_builder to read the vector from a tree.
4897 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4898 vec_perm_builder instead of a vec_perm_indices.
4899 (have_whole_vector_shift): Use vec_perm_builder and
4900 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4901 truncation to calc_vec_perm_mask_for_shift.
4902 (vect_create_epilog_for_reduction): Likewise.
4903 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4904 from auto_vec_perm_indices to vec_perm_indices.
4905 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4906 instead of changing individual elements.
4907 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4908 the vector in d.perm.
4909 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4910 from auto_vec_perm_indices to vec_perm_indices.
4911 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4912 instead of changing individual elements.
4913 (arm_vectorize_vec_perm_const): Use new_vector to install
4914 the vector in d.perm.
4915 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4916 Update vec_perm_builder constructor.
4917 (rs6000_expand_interleave): Likewise.
4918 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4919 (rs6000_expand_interleave): Likewise.
4921 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4923 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4924 to qimode could truncate the indices.
4925 * optabs.c (expand_vec_perm_var): Likewise.
4927 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4929 * Makefile.in (OBJS): Add vec-perm-indices.o.
4930 * vec-perm-indices.h: New file.
4931 * vec-perm-indices.c: Likewise.
4932 * target.h (vec_perm_indices): Replace with a forward class
4934 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4935 * optabs.h: Include vec-perm-indices.h.
4936 (expand_vec_perm): Delete.
4937 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4938 (expand_vec_perm_const): Declare.
4939 * target.def (vec_perm_const_ok): Replace with...
4940 (vec_perm_const): ...this new hook.
4941 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4942 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4943 * doc/tm.texi: Regenerate.
4944 * optabs.def (vec_perm_const): Delete.
4945 * doc/md.texi (vec_perm_const): Likewise.
4946 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4947 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4948 expand_vec_perm for constant permutation vectors. Assert that
4949 the mode of variable permutation vectors is the integer equivalent
4950 of the mode that is being permuted.
4951 * optabs-query.h (selector_fits_mode_p): Declare.
4952 * optabs-query.c: Include vec-perm-indices.h.
4953 (selector_fits_mode_p): New function.
4954 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4955 is defined, instead of checking whether the vec_perm_const_optab
4956 exists. Use targetm.vectorize.vec_perm_const instead of
4957 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4958 fit in the vector mode before using a variable permute.
4959 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4960 vec_perm_indices instead of an rtx.
4961 (expand_vec_perm): Replace with...
4962 (expand_vec_perm_const): ...this new function. Take the selector
4963 as a vec_perm_indices rather than an rtx. Also take the mode of
4964 the selector. Update call to shift_amt_for_vec_perm_mask.
4965 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4966 Use vec_perm_indices::new_expanded_vector to expand the original
4967 selector into bytes. Check whether the indices fit in the vector
4968 mode before using a variable permute.
4969 (expand_vec_perm_var): Make global.
4970 (expand_mult_highpart): Use expand_vec_perm_const.
4971 * fold-const.c: Includes vec-perm-indices.h.
4972 * tree-ssa-forwprop.c: Likewise.
4973 * tree-vect-data-refs.c: Likewise.
4974 * tree-vect-generic.c: Likewise.
4975 * tree-vect-loop.c: Likewise.
4976 * tree-vect-slp.c: Likewise.
4977 * tree-vect-stmts.c: Likewise.
4978 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4980 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4981 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4982 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4983 (aarch64_vectorize_vec_perm_const): ...this new function.
4984 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4985 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4986 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4987 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4988 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4989 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4990 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4992 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4993 check for NEON modes.
4994 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4995 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4996 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4997 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4999 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
5000 the old VEC_PERM_CONST conditions.
5001 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
5002 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
5003 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
5004 (ia64_vectorize_vec_perm_const_ok): Merge into...
5005 (ia64_vectorize_vec_perm_const): ...this new function.
5006 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
5007 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
5008 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
5009 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
5010 * config/mips/mips.c (mips_expand_vec_perm_const)
5011 (mips_vectorize_vec_perm_const_ok): Merge into...
5012 (mips_vectorize_vec_perm_const): ...this new function.
5013 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
5014 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
5015 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
5016 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
5017 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
5018 (rs6000_expand_vec_perm_const): Delete.
5019 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
5021 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5022 (altivec_expand_vec_perm_const_le): Take each operand individually.
5023 Operate on constant selectors rather than rtxes.
5024 (altivec_expand_vec_perm_const): Likewise. Update call to
5025 altivec_expand_vec_perm_const_le.
5026 (rs6000_expand_vec_perm_const): Delete.
5027 (rs6000_vectorize_vec_perm_const_ok): Delete.
5028 (rs6000_vectorize_vec_perm_const): New function.
5029 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5030 an element count and rtx array.
5031 (rs6000_expand_extract_even): Update call accordingly.
5032 (rs6000_expand_interleave): Likewise.
5033 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
5034 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
5035 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
5036 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
5037 (rs6000_expand_vec_perm_const): Delete.
5038 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
5039 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5040 (altivec_expand_vec_perm_const_le): Take each operand individually.
5041 Operate on constant selectors rather than rtxes.
5042 (altivec_expand_vec_perm_const): Likewise. Update call to
5043 altivec_expand_vec_perm_const_le.
5044 (rs6000_expand_vec_perm_const): Delete.
5045 (rs6000_vectorize_vec_perm_const_ok): Delete.
5046 (rs6000_vectorize_vec_perm_const): New function. Remove stray
5047 reference to the SPE evmerge intructions.
5048 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
5049 an element count and rtx array.
5050 (rs6000_expand_extract_even): Update call accordingly.
5051 (rs6000_expand_interleave): Likewise.
5052 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
5053 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
5055 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
5057 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5059 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
5060 vector mode and that that mode matches the mode of the data
5062 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
5063 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
5064 directly using expand_vec_perm_1 when forcing selectors into
5066 (expand_vec_perm_var): New function, split out from expand_vec_perm.
5068 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5070 * optabs-query.h (can_vec_perm_p): Delete.
5071 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
5072 * optabs-query.c (can_vec_perm_p): Split into...
5073 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
5074 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
5075 particular selector is valid.
5076 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
5077 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
5078 (vect_grouped_load_supported): Likewise.
5079 (vect_shift_permute_load_chain): Likewise.
5080 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
5081 (vect_transform_slp_perm_load): Likewise.
5082 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
5083 (vectorizable_bswap): Likewise.
5084 (vect_gen_perm_mask_checked): Likewise.
5085 * fold-const.c (fold_ternary_loc): Likewise. Don't take
5086 implementations of variable permutation vectors into account
5087 when deciding which selector to use.
5088 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
5089 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
5090 with a false third argument.
5091 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
5092 to test whether the constant selector is valid and can_vec_perm_var_p
5093 to test whether a variable selector is valid.
5095 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5097 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5098 * optabs-query.c (can_vec_perm_p): Likewise.
5099 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5100 instead of vec_perm_indices.
5101 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5102 (vect_gen_perm_mask_checked): Likewise,
5103 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5104 (vect_gen_perm_mask_checked): Likewise,
5106 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5108 * optabs-query.h (qimode_for_vec_perm): Declare.
5109 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5110 (qimode_for_vec_perm): ...this new function.
5111 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5113 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
5115 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5116 does not have a conditional at the top.
5118 2018-01-02 Richard Biener <rguenther@suse.de>
5120 * ipa-inline.c (big_speedup_p): Fix expression.
5122 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5125 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5128 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5132 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5133 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5134 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5135 cond_taken_branch_cost 3->4.
5137 2018-01-01 Jakub Jelinek <jakub@redhat.com>
5139 PR tree-optimization/83581
5140 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5141 TODO_cleanup_cfg if any changes have been made.
5144 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5145 convert_modes if target mode has the right side, but different mode
5149 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5150 last argument when extracting from CONCAT. If either from_real or
5151 from_imag is NULL, use expansion through memory. If result is not
5152 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5153 the parts directly to inner mode, if even that fails, use expansion
5157 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5158 check for bswap in mode rather than HImode and use that in expand_unop
5161 Copyright (C) 2018 Free Software Foundation, Inc.
5163 Copying and distribution of this file, with or without modification,
5164 are permitted in any medium without royalty provided the copyright
5165 notice and this notice are preserved.