1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
236 from
= gen_lowpart (to_int_mode
, from
), from_mode
= to_int_mode
;
238 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
240 if (to_mode
== from_mode
241 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
243 emit_move_insn (to
, from
);
247 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
249 gcc_assert (GET_MODE_BITSIZE (from_mode
) == GET_MODE_BITSIZE (to_mode
));
251 if (VECTOR_MODE_P (to_mode
))
252 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
254 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
256 emit_move_insn (to
, from
);
260 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
262 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
263 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
267 convert_mode_scalar (to
, from
, unsignedp
);
270 /* Like convert_move, but deals only with scalar modes. */
273 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
275 /* Both modes should be scalar types. */
276 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
277 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
278 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
279 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
283 gcc_assert (to_real
== from_real
);
285 /* rtx code for making an equivalent value. */
286 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
287 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
295 gcc_assert ((GET_MODE_PRECISION (from_mode
)
296 != GET_MODE_PRECISION (to_mode
))
297 || (DECIMAL_FLOAT_MODE_P (from_mode
)
298 != DECIMAL_FLOAT_MODE_P (to_mode
)));
300 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
301 /* Conversion between decimal float and binary float, same size. */
302 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
303 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
308 /* Try converting directly if the insn is supported. */
310 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
311 if (code
!= CODE_FOR_nothing
)
313 emit_unop_insn (code
, to
, from
,
314 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
318 /* Otherwise use a libcall. */
319 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
321 /* Is this conversion implemented yet? */
322 gcc_assert (libcall
);
325 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
327 insns
= get_insns ();
329 emit_libcall_block (insns
, to
, value
,
330 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
332 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
336 /* Handle pointer conversion. */ /* SPEE 900220. */
337 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
341 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
348 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
351 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
357 /* Targets are expected to provide conversion insns between PxImode and
358 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
359 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
361 scalar_int_mode full_mode
362 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
364 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
365 != CODE_FOR_nothing
);
367 if (full_mode
!= from_mode
)
368 from
= convert_to_mode (full_mode
, from
, unsignedp
);
369 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
373 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
376 scalar_int_mode full_mode
377 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
378 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
379 enum insn_code icode
;
381 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
382 gcc_assert (icode
!= CODE_FOR_nothing
);
384 if (to_mode
== full_mode
)
386 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
390 new_from
= gen_reg_rtx (full_mode
);
391 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
393 /* else proceed to integer conversions below. */
394 from_mode
= full_mode
;
398 /* Make sure both are fixed-point modes or both are not. */
399 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
400 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
401 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
403 /* If we widen from_mode to to_mode and they are in the same class,
404 we won't saturate the result.
405 Otherwise, always saturate the result to play safe. */
406 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
407 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
408 expand_fixed_convert (to
, from
, 0, 0);
410 expand_fixed_convert (to
, from
, 0, 1);
414 /* Now both modes are integers. */
416 /* Handle expanding beyond a word. */
417 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
418 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
425 scalar_mode lowpart_mode
;
426 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
428 /* Try converting directly if the insn is supported. */
429 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
432 /* If FROM is a SUBREG, put it into a register. Do this
433 so that we always generate the same set of insns for
434 better cse'ing; if an intermediate assignment occurred,
435 we won't be doing the operation directly on the SUBREG. */
436 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
437 from
= force_reg (from_mode
, from
);
438 emit_unop_insn (code
, to
, from
, equiv_code
);
441 /* Next, try converting via full word. */
442 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
443 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
444 != CODE_FOR_nothing
))
446 rtx word_to
= gen_reg_rtx (word_mode
);
449 if (reg_overlap_mentioned_p (to
, from
))
450 from
= force_reg (from_mode
, from
);
453 convert_move (word_to
, from
, unsignedp
);
454 emit_unop_insn (code
, to
, word_to
, equiv_code
);
458 /* No special multiword conversion insn; do it by hand. */
461 /* Since we will turn this into a no conflict block, we must ensure
462 the source does not overlap the target so force it into an isolated
463 register when maybe so. Likewise for any MEM input, since the
464 conversion sequence might require several references to it and we
465 must ensure we're getting the same value every time. */
467 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
468 from
= force_reg (from_mode
, from
);
470 /* Get a copy of FROM widened to a word, if necessary. */
471 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
472 lowpart_mode
= word_mode
;
474 lowpart_mode
= from_mode
;
476 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
478 lowpart
= gen_lowpart (lowpart_mode
, to
);
479 emit_move_insn (lowpart
, lowfrom
);
481 /* Compute the value to put in each remaining word. */
483 fill_value
= const0_rtx
;
485 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
486 LT
, lowfrom
, const0_rtx
,
487 lowpart_mode
, 0, -1);
489 /* Fill the remaining words. */
490 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
492 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
493 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
495 gcc_assert (subword
);
497 if (fill_value
!= subword
)
498 emit_move_insn (subword
, fill_value
);
501 insns
= get_insns ();
508 /* Truncating multi-word to a word or less. */
509 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
510 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
513 && ! MEM_VOLATILE_P (from
)
514 && direct_load
[(int) to_mode
]
515 && ! mode_dependent_address_p (XEXP (from
, 0),
516 MEM_ADDR_SPACE (from
)))
518 || GET_CODE (from
) == SUBREG
))
519 from
= force_reg (from_mode
, from
);
520 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
524 /* Now follow all the conversions between integers
525 no more than a word long. */
527 /* For truncation, usually we can just refer to FROM in a narrower mode. */
528 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
529 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
532 && ! MEM_VOLATILE_P (from
)
533 && direct_load
[(int) to_mode
]
534 && ! mode_dependent_address_p (XEXP (from
, 0),
535 MEM_ADDR_SPACE (from
)))
537 || GET_CODE (from
) == SUBREG
))
538 from
= force_reg (from_mode
, from
);
539 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
540 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
541 from
= copy_to_reg (from
);
542 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
546 /* Handle extension. */
547 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
549 /* Convert directly if that works. */
550 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
553 emit_unop_insn (code
, to
, from
, equiv_code
);
558 scalar_mode intermediate
;
562 /* Search for a mode to convert via. */
563 opt_scalar_mode intermediate_iter
;
564 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
566 scalar_mode intermediate
= intermediate_iter
.require ();
567 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
569 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
570 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
572 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
573 != CODE_FOR_nothing
))
575 convert_move (to
, convert_to_mode (intermediate
, from
,
576 unsignedp
), unsignedp
);
581 /* No suitable intermediate mode.
582 Generate what we need with shifts. */
583 shift_amount
= (GET_MODE_PRECISION (to_mode
)
584 - GET_MODE_PRECISION (from_mode
));
585 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
586 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
588 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
591 emit_move_insn (to
, tmp
);
596 /* Support special truncate insns for certain modes. */
597 if (convert_optab_handler (trunc_optab
, to_mode
,
598 from_mode
) != CODE_FOR_nothing
)
600 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
605 /* Handle truncation of volatile memrefs, and so on;
606 the things that couldn't be truncated directly,
607 and for which there was no special instruction.
609 ??? Code above formerly short-circuited this, for most integer
610 mode pairs, with a force_reg in from_mode followed by a recursive
611 call to this routine. Appears always to have been wrong. */
612 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
614 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
615 emit_move_insn (to
, temp
);
619 /* Mode combination is not recognized. */
623 /* Return an rtx for a value that would result
624 from converting X to mode MODE.
625 Both X and MODE may be floating, or both integer.
626 UNSIGNEDP is nonzero if X is an unsigned value.
627 This can be done by referring to a part of X in place
628 or by copying to a new temporary with conversion. */
631 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
633 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
636 /* Return an rtx for a value that would result
637 from converting X from mode OLDMODE to mode MODE.
638 Both modes may be floating, or both integer.
639 UNSIGNEDP is nonzero if X is an unsigned value.
641 This can be done by referring to a part of X in place
642 or by copying to a new temporary with conversion.
644 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
647 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
650 scalar_int_mode int_mode
;
652 /* If FROM is a SUBREG that indicates that we have already done at least
653 the required extension, strip it. */
655 if (GET_CODE (x
) == SUBREG
656 && SUBREG_PROMOTED_VAR_P (x
)
657 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
658 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
659 >= GET_MODE_PRECISION (int_mode
))
660 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
661 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
663 if (GET_MODE (x
) != VOIDmode
)
664 oldmode
= GET_MODE (x
);
669 if (CONST_SCALAR_INT_P (x
)
670 && is_int_mode (mode
, &int_mode
))
672 /* If the caller did not tell us the old mode, then there is not
673 much to do with respect to canonicalization. We have to
674 assume that all the bits are significant. */
675 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
676 oldmode
= MAX_MODE_INT
;
677 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
678 GET_MODE_PRECISION (int_mode
),
679 unsignedp
? UNSIGNED
: SIGNED
);
680 return immed_wide_int_const (w
, int_mode
);
683 /* We can do this with a gen_lowpart if both desired and current modes
684 are integer, and this is either a constant integer, a register, or a
686 scalar_int_mode int_oldmode
;
687 if (is_int_mode (mode
, &int_mode
)
688 && is_int_mode (oldmode
, &int_oldmode
)
689 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
690 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
691 || CONST_POLY_INT_P (x
)
693 && (!HARD_REGISTER_P (x
)
694 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
695 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
696 return gen_lowpart (int_mode
, x
);
698 /* Converting from integer constant into mode is always equivalent to an
700 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
702 gcc_assert (GET_MODE_BITSIZE (mode
) == GET_MODE_BITSIZE (oldmode
));
703 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
706 temp
= gen_reg_rtx (mode
);
707 convert_move (temp
, x
, unsignedp
);
711 /* Return the largest alignment we can use for doing a move (or store)
712 of MAX_PIECES. ALIGN is the largest alignment we could use. */
715 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
717 scalar_int_mode tmode
718 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
720 if (align
>= GET_MODE_ALIGNMENT (tmode
))
721 align
= GET_MODE_ALIGNMENT (tmode
);
724 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
725 opt_scalar_int_mode mode_iter
;
726 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
728 tmode
= mode_iter
.require ();
729 if (GET_MODE_SIZE (tmode
) > max_pieces
730 || targetm
.slow_unaligned_access (tmode
, align
))
735 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
741 /* Return the widest integer mode that is narrower than SIZE bytes. */
743 static scalar_int_mode
744 widest_int_mode_for_size (unsigned int size
)
746 scalar_int_mode result
= NARROWEST_INT_MODE
;
748 gcc_checking_assert (size
> 1);
750 opt_scalar_int_mode tmode
;
751 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
752 if (GET_MODE_SIZE (tmode
.require ()) < size
)
753 result
= tmode
.require ();
758 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
759 and should be performed piecewise. */
762 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
763 enum by_pieces_operation op
)
765 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
766 optimize_insn_for_speed_p ());
769 /* Determine whether the LEN bytes can be moved by using several move
770 instructions. Return nonzero if a call to move_by_pieces should
774 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
776 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
779 /* Return number of insns required to perform operation OP by pieces
780 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
782 unsigned HOST_WIDE_INT
783 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
784 unsigned int max_size
, by_pieces_operation op
)
786 unsigned HOST_WIDE_INT n_insns
= 0;
788 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
790 while (max_size
> 1 && l
> 0)
792 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
793 enum insn_code icode
;
795 unsigned int modesize
= GET_MODE_SIZE (mode
);
797 icode
= optab_handler (mov_optab
, mode
);
798 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
800 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
808 case COMPARE_BY_PIECES
:
809 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
810 int batch_ops
= 4 * batch
- 1;
811 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
812 n_insns
+= full
* batch_ops
;
813 if (n_pieces
% batch
!= 0)
826 /* Used when performing piecewise block operations, holds information
827 about one of the memory objects involved. The member functions
828 can be used to generate code for loading from the object and
829 updating the address when iterating. */
833 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
836 /* The address of the object. Can differ from that seen in the
837 MEM rtx if we copied the address to a register. */
839 /* Nonzero if the address on the object has an autoincrement already,
840 signifies whether that was an increment or decrement. */
841 signed char m_addr_inc
;
842 /* Nonzero if we intend to use autoinc without the address already
843 having autoinc form. We will insert add insns around each memory
844 reference, expecting later passes to form autoinc addressing modes.
845 The only supported options are predecrement and postincrement. */
846 signed char m_explicit_inc
;
847 /* True if we have either of the two possible cases of using
850 /* True if this is an address to be used for load operations rather
854 /* Optionally, a function to obtain constants for any given offset into
855 the objects, and data associated with it. */
856 by_pieces_constfn m_constfn
;
859 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
860 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
861 void increment_address (HOST_WIDE_INT
);
862 void maybe_predec (HOST_WIDE_INT
);
863 void maybe_postinc (HOST_WIDE_INT
);
864 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
871 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
872 true if the operation to be performed on this object is a load
873 rather than a store. For stores, OBJ can be NULL, in which case we
874 assume the operation is a stack push. For loads, the optional
875 CONSTFN and its associated CFNDATA can be used in place of the
878 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
880 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
886 rtx addr
= XEXP (obj
, 0);
887 rtx_code code
= GET_CODE (addr
);
889 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
890 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
893 m_addr_inc
= dec
? -1 : 1;
895 /* While we have always looked for these codes here, the code
896 implementing the memory operation has never handled them.
897 Support could be added later if necessary or beneficial. */
898 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
906 if (STACK_GROWS_DOWNWARD
)
912 gcc_assert (constfn
!= NULL
);
916 gcc_assert (is_load
);
919 /* Decide whether to use autoinc for an address involved in a memory op.
920 MODE is the mode of the accesses, REVERSE is true if we've decided to
921 perform the operation starting from the end, and LEN is the length of
922 the operation. Don't override an earlier decision to set m_auto. */
925 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
928 if (m_auto
|| m_obj
== NULL_RTX
)
931 bool use_predec
= (m_is_load
932 ? USE_LOAD_PRE_DECREMENT (mode
)
933 : USE_STORE_PRE_DECREMENT (mode
));
934 bool use_postinc
= (m_is_load
935 ? USE_LOAD_POST_INCREMENT (mode
)
936 : USE_STORE_POST_INCREMENT (mode
));
937 machine_mode addr_mode
= get_address_mode (m_obj
);
939 if (use_predec
&& reverse
)
941 m_addr
= copy_to_mode_reg (addr_mode
,
942 plus_constant (addr_mode
,
947 else if (use_postinc
&& !reverse
)
949 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
953 else if (CONSTANT_P (m_addr
))
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
957 /* Adjust the address to refer to the data at OFFSET in MODE. If we
958 are using autoincrement for this address, we don't add the offset,
959 but we still modify the MEM's properties. */
962 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
965 return m_constfn (m_cfndata
, offset
, mode
);
966 if (m_obj
== NULL_RTX
)
969 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
971 return adjust_address (m_obj
, mode
, offset
);
974 /* Emit an add instruction to increment the address by SIZE. */
977 pieces_addr::increment_address (HOST_WIDE_INT size
)
979 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
980 emit_insn (gen_add2_insn (m_addr
, amount
));
983 /* If we are supposed to decrement the address after each access, emit code
984 to do so now. Increment by SIZE (which has should have the correct sign
988 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
990 if (m_explicit_inc
>= 0)
992 gcc_assert (HAVE_PRE_DECREMENT
);
993 increment_address (size
);
996 /* If we are supposed to decrement the address after each access, emit code
997 to do so now. Increment by SIZE. */
1000 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1002 if (m_explicit_inc
<= 0)
1004 gcc_assert (HAVE_POST_INCREMENT
);
1005 increment_address (size
);
1008 /* This structure is used by do_op_by_pieces to describe the operation
1011 class op_by_pieces_d
1014 pieces_addr m_to
, m_from
;
1015 unsigned HOST_WIDE_INT m_len
;
1016 HOST_WIDE_INT m_offset
;
1017 unsigned int m_align
;
1018 unsigned int m_max_size
;
1021 /* Virtual functions, overriden by derived classes for the specific
1023 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1024 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1025 virtual void finish_mode (machine_mode
)
1030 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1031 unsigned HOST_WIDE_INT
, unsigned int);
1035 /* The constructor for an op_by_pieces_d structure. We require two
1036 objects named TO and FROM, which are identified as loads or stores
1037 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1038 and its associated FROM_CFN_DATA can be used to replace loads with
1039 constant values. LEN describes the length of the operation. */
1041 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1042 rtx from
, bool from_load
,
1043 by_pieces_constfn from_cfn
,
1044 void *from_cfn_data
,
1045 unsigned HOST_WIDE_INT len
,
1047 : m_to (to
, to_load
, NULL
, NULL
),
1048 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1049 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1051 int toi
= m_to
.get_addr_inc ();
1052 int fromi
= m_from
.get_addr_inc ();
1053 if (toi
>= 0 && fromi
>= 0)
1055 else if (toi
<= 0 && fromi
<= 0)
1060 m_offset
= m_reverse
? len
: 0;
1061 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1062 from
? MEM_ALIGN (from
) : align
);
1064 /* If copying requires more than two move insns,
1065 copy addresses to registers (to make displacements shorter)
1066 and use post-increment if available. */
1067 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1069 /* Find the mode of the largest comparison. */
1070 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1072 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1073 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1076 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1080 /* This function contains the main loop used for expanding a block
1081 operation. First move what we can in the largest integer mode,
1082 then go to successively smaller modes. For every access, call
1083 GENFUN with the two operands and the EXTRA_DATA. */
1086 op_by_pieces_d::run ()
1088 while (m_max_size
> 1 && m_len
> 0)
1090 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1092 if (prepare_mode (mode
, m_align
))
1094 unsigned int size
= GET_MODE_SIZE (mode
);
1095 rtx to1
= NULL_RTX
, from1
;
1097 while (m_len
>= size
)
1102 to1
= m_to
.adjust (mode
, m_offset
);
1103 from1
= m_from
.adjust (mode
, m_offset
);
1105 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1106 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1108 generate (to1
, from1
, mode
);
1110 m_to
.maybe_postinc (size
);
1111 m_from
.maybe_postinc (size
);
1122 m_max_size
= GET_MODE_SIZE (mode
);
1125 /* The code above should have handled everything. */
1126 gcc_assert (!m_len
);
1129 /* Derived class from op_by_pieces_d, providing support for block move
1132 class move_by_pieces_d
: public op_by_pieces_d
1134 insn_gen_fn m_gen_fun
;
1135 void generate (rtx
, rtx
, machine_mode
);
1136 bool prepare_mode (machine_mode
, unsigned int);
1139 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1141 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1144 rtx
finish_endp (int);
1147 /* Return true if MODE can be used for a set of copies, given an
1148 alignment ALIGN. Prepare whatever data is necessary for later
1149 calls to generate. */
1152 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1154 insn_code icode
= optab_handler (mov_optab
, mode
);
1155 m_gen_fun
= GEN_FCN (icode
);
1156 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1159 /* A callback used when iterating for a compare_by_pieces_operation.
1160 OP0 and OP1 are the values that have been loaded and should be
1161 compared in MODE. If OP0 is NULL, this means we should generate a
1162 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1163 gen function that should be used to generate the mode. */
1166 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1167 machine_mode mode ATTRIBUTE_UNUSED
)
1169 #ifdef PUSH_ROUNDING
1170 if (op0
== NULL_RTX
)
1172 emit_single_push_insn (mode
, op1
, NULL
);
1176 emit_insn (m_gen_fun (op0
, op1
));
1179 /* Perform the final adjustment at the end of a string to obtain the
1180 correct return value for the block operation. If ENDP is 1 return
1181 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1182 end minus one byte ala stpcpy. */
1185 move_by_pieces_d::finish_endp (int endp
)
1187 gcc_assert (!m_reverse
);
1190 m_to
.maybe_postinc (-1);
1193 return m_to
.adjust (QImode
, m_offset
);
1196 /* Generate several move instructions to copy LEN bytes from block FROM to
1197 block TO. (These are MEM rtx's with BLKmode).
1199 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1200 used to push FROM to the stack.
1202 ALIGN is maximum stack alignment we can assume.
1204 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1205 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1209 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1210 unsigned int align
, int endp
)
1212 #ifndef PUSH_ROUNDING
1217 move_by_pieces_d
data (to
, from
, len
, align
);
1222 return data
.finish_endp (endp
);
1227 /* Derived class from op_by_pieces_d, providing support for block move
1230 class store_by_pieces_d
: public op_by_pieces_d
1232 insn_gen_fn m_gen_fun
;
1233 void generate (rtx
, rtx
, machine_mode
);
1234 bool prepare_mode (machine_mode
, unsigned int);
1237 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1238 unsigned HOST_WIDE_INT len
, unsigned int align
)
1239 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1242 rtx
finish_endp (int);
1245 /* Return true if MODE can be used for a set of stores, given an
1246 alignment ALIGN. Prepare whatever data is necessary for later
1247 calls to generate. */
1250 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1252 insn_code icode
= optab_handler (mov_optab
, mode
);
1253 m_gen_fun
= GEN_FCN (icode
);
1254 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1257 /* A callback used when iterating for a store_by_pieces_operation.
1258 OP0 and OP1 are the values that have been loaded and should be
1259 compared in MODE. If OP0 is NULL, this means we should generate a
1260 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1261 gen function that should be used to generate the mode. */
1264 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1266 emit_insn (m_gen_fun (op0
, op1
));
1269 /* Perform the final adjustment at the end of a string to obtain the
1270 correct return value for the block operation. If ENDP is 1 return
1271 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1272 end minus one byte ala stpcpy. */
1275 store_by_pieces_d::finish_endp (int endp
)
1277 gcc_assert (!m_reverse
);
1280 m_to
.maybe_postinc (-1);
1283 return m_to
.adjust (QImode
, m_offset
);
1286 /* Determine whether the LEN bytes generated by CONSTFUN can be
1287 stored to memory using several move instructions. CONSTFUNDATA is
1288 a pointer which will be passed as argument in every CONSTFUN call.
1289 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1290 a memset operation and false if it's a copy of a constant string.
1291 Return nonzero if a call to store_by_pieces should succeed. */
1294 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1295 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1296 void *constfundata
, unsigned int align
, bool memsetp
)
1298 unsigned HOST_WIDE_INT l
;
1299 unsigned int max_size
;
1300 HOST_WIDE_INT offset
= 0;
1301 enum insn_code icode
;
1303 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1304 rtx cst ATTRIBUTE_UNUSED
;
1309 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1313 optimize_insn_for_speed_p ()))
1316 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1318 /* We would first store what we can in the largest integer mode, then go to
1319 successively smaller modes. */
1322 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1326 max_size
= STORE_MAX_PIECES
+ 1;
1327 while (max_size
> 1 && l
> 0)
1329 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1331 icode
= optab_handler (mov_optab
, mode
);
1332 if (icode
!= CODE_FOR_nothing
1333 && align
>= GET_MODE_ALIGNMENT (mode
))
1335 unsigned int size
= GET_MODE_SIZE (mode
);
1342 cst
= (*constfun
) (constfundata
, offset
, mode
);
1343 if (!targetm
.legitimate_constant_p (mode
, cst
))
1353 max_size
= GET_MODE_SIZE (mode
);
1356 /* The code above should have handled everything. */
1363 /* Generate several move instructions to store LEN bytes generated by
1364 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1365 pointer which will be passed as argument in every CONSTFUN call.
1366 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1367 a memset operation and false if it's a copy of a constant string.
1368 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1369 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1373 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1374 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1375 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1379 gcc_assert (endp
!= 2);
1383 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1385 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1386 optimize_insn_for_speed_p ()));
1388 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1392 return data
.finish_endp (endp
);
1397 /* Callback routine for clear_by_pieces.
1398 Return const0_rtx unconditionally. */
1401 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1410 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1415 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1419 /* Context used by compare_by_pieces_genfn. It stores the fail label
1420 to jump to in case of miscomparison, and for branch ratios greater than 1,
1421 it stores an accumulator and the current and maximum counts before
1422 emitting another branch. */
1424 class compare_by_pieces_d
: public op_by_pieces_d
1426 rtx_code_label
*m_fail_label
;
1428 int m_count
, m_batch
;
1430 void generate (rtx
, rtx
, machine_mode
);
1431 bool prepare_mode (machine_mode
, unsigned int);
1432 void finish_mode (machine_mode
);
1434 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1435 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1436 rtx_code_label
*fail_label
)
1437 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1439 m_fail_label
= fail_label
;
1443 /* A callback used when iterating for a compare_by_pieces_operation.
1444 OP0 and OP1 are the values that have been loaded and should be
1445 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1446 context structure. */
1449 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1453 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1454 true, OPTAB_LIB_WIDEN
);
1456 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1457 true, OPTAB_LIB_WIDEN
);
1458 m_accumulator
= temp
;
1460 if (++m_count
< m_batch
)
1464 op0
= m_accumulator
;
1466 m_accumulator
= NULL_RTX
;
1468 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1469 m_fail_label
, profile_probability::uninitialized ());
1472 /* Return true if MODE can be used for a set of moves and comparisons,
1473 given an alignment ALIGN. Prepare whatever data is necessary for
1474 later calls to generate. */
1477 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1479 insn_code icode
= optab_handler (mov_optab
, mode
);
1480 if (icode
== CODE_FOR_nothing
1481 || align
< GET_MODE_ALIGNMENT (mode
)
1482 || !can_compare_p (EQ
, mode
, ccp_jump
))
1484 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1487 m_accumulator
= NULL_RTX
;
1492 /* Called after expanding a series of comparisons in MODE. If we have
1493 accumulated results for which we haven't emitted a branch yet, do
1497 compare_by_pieces_d::finish_mode (machine_mode mode
)
1499 if (m_accumulator
!= NULL_RTX
)
1500 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1501 NULL_RTX
, NULL
, m_fail_label
,
1502 profile_probability::uninitialized ());
1505 /* Generate several move instructions to compare LEN bytes from blocks
1506 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1508 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1509 used to push FROM to the stack.
1511 ALIGN is maximum stack alignment we can assume.
1513 Optionally, the caller can pass a constfn and associated data in A1_CFN
1514 and A1_CFN_DATA. describing that the second operand being compared is a
1515 known constant and how to obtain its data. */
1518 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1519 rtx target
, unsigned int align
,
1520 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1522 rtx_code_label
*fail_label
= gen_label_rtx ();
1523 rtx_code_label
*end_label
= gen_label_rtx ();
1525 if (target
== NULL_RTX
1526 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1527 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1529 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1534 emit_move_insn (target
, const0_rtx
);
1535 emit_jump (end_label
);
1537 emit_label (fail_label
);
1538 emit_move_insn (target
, const1_rtx
);
1539 emit_label (end_label
);
1544 /* Emit code to move a block Y to a block X. This may be done with
1545 string-move instructions, with multiple scalar move instructions,
1546 or with a library call.
1548 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1549 SIZE is an rtx that says how long they are.
1550 ALIGN is the maximum alignment we can assume they have.
1551 METHOD describes what kind of copy this is, and what mechanisms may be used.
1552 MIN_SIZE is the minimal size of block to move
1553 MAX_SIZE is the maximal size of block to move, if it can not be represented
1554 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1556 Return the address of the new block, if memcpy is called and returns it,
1560 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1561 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1562 unsigned HOST_WIDE_INT min_size
,
1563 unsigned HOST_WIDE_INT max_size
,
1564 unsigned HOST_WIDE_INT probable_max_size
)
1571 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1576 case BLOCK_OP_NORMAL
:
1577 case BLOCK_OP_TAILCALL
:
1578 may_use_call
= true;
1581 case BLOCK_OP_CALL_PARM
:
1582 may_use_call
= block_move_libcall_safe_for_call_parm ();
1584 /* Make inhibit_defer_pop nonzero around the library call
1585 to force it to pop the arguments right away. */
1589 case BLOCK_OP_NO_LIBCALL
:
1590 may_use_call
= false;
1597 gcc_assert (MEM_P (x
) && MEM_P (y
));
1598 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1599 gcc_assert (align
>= BITS_PER_UNIT
);
1601 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1602 block copy is more efficient for other large modes, e.g. DCmode. */
1603 x
= adjust_address (x
, BLKmode
, 0);
1604 y
= adjust_address (y
, BLKmode
, 0);
1606 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1607 can be incorrect is coming from __builtin_memcpy. */
1608 if (CONST_INT_P (size
))
1610 x
= shallow_copy_rtx (x
);
1611 y
= shallow_copy_rtx (y
);
1612 set_mem_size (x
, INTVAL (size
));
1613 set_mem_size (y
, INTVAL (size
));
1616 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1617 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1618 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1619 expected_align
, expected_size
,
1620 min_size
, max_size
, probable_max_size
))
1622 else if (may_use_call
1623 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1624 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1626 /* Since x and y are passed to a libcall, mark the corresponding
1627 tree EXPR as addressable. */
1628 tree y_expr
= MEM_EXPR (y
);
1629 tree x_expr
= MEM_EXPR (x
);
1631 mark_addressable (y_expr
);
1633 mark_addressable (x_expr
);
1634 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1635 method
== BLOCK_OP_TAILCALL
);
1639 emit_block_move_via_loop (x
, y
, size
, align
);
1641 if (method
== BLOCK_OP_CALL_PARM
)
1648 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1650 unsigned HOST_WIDE_INT max
, min
= 0;
1651 if (GET_CODE (size
) == CONST_INT
)
1652 min
= max
= UINTVAL (size
);
1654 max
= GET_MODE_MASK (GET_MODE (size
));
1655 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1659 /* A subroutine of emit_block_move. Returns true if calling the
1660 block move libcall will not clobber any parameters which may have
1661 already been placed on the stack. */
1664 block_move_libcall_safe_for_call_parm (void)
1666 #if defined (REG_PARM_STACK_SPACE)
1670 /* If arguments are pushed on the stack, then they're safe. */
1674 /* If registers go on the stack anyway, any argument is sure to clobber
1675 an outgoing argument. */
1676 #if defined (REG_PARM_STACK_SPACE)
1677 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1678 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1679 depend on its argument. */
1681 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1682 && REG_PARM_STACK_SPACE (fn
) != 0)
1686 /* If any argument goes in memory, then it might clobber an outgoing
1689 CUMULATIVE_ARGS args_so_far_v
;
1690 cumulative_args_t args_so_far
;
1693 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1694 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1695 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1697 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1698 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1700 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1701 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1703 if (!tmp
|| !REG_P (tmp
))
1705 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1707 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1714 /* A subroutine of emit_block_move. Expand a movmem pattern;
1715 return true if successful. */
1718 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1719 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1720 unsigned HOST_WIDE_INT min_size
,
1721 unsigned HOST_WIDE_INT max_size
,
1722 unsigned HOST_WIDE_INT probable_max_size
)
1724 int save_volatile_ok
= volatile_ok
;
1726 if (expected_align
< align
)
1727 expected_align
= align
;
1728 if (expected_size
!= -1)
1730 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1731 expected_size
= probable_max_size
;
1732 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1733 expected_size
= min_size
;
1736 /* Since this is a move insn, we don't care about volatility. */
1739 /* Try the most limited insn first, because there's no point
1740 including more than one in the machine description unless
1741 the more limited one has some advantage. */
1743 opt_scalar_int_mode mode_iter
;
1744 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1746 scalar_int_mode mode
= mode_iter
.require ();
1747 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1749 if (code
!= CODE_FOR_nothing
1750 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1751 here because if SIZE is less than the mode mask, as it is
1752 returned by the macro, it will definitely be less than the
1753 actual mode mask. Since SIZE is within the Pmode address
1754 space, we limit MODE to Pmode. */
1755 && ((CONST_INT_P (size
)
1756 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1757 <= (GET_MODE_MASK (mode
) >> 1)))
1758 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1759 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1761 struct expand_operand ops
[9];
1764 /* ??? When called via emit_block_move_for_call, it'd be
1765 nice if there were some way to inform the backend, so
1766 that it doesn't fail the expansion because it thinks
1767 emitting the libcall would be more efficient. */
1768 nops
= insn_data
[(int) code
].n_generator_args
;
1769 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1771 create_fixed_operand (&ops
[0], x
);
1772 create_fixed_operand (&ops
[1], y
);
1773 /* The check above guarantees that this size conversion is valid. */
1774 create_convert_operand_to (&ops
[2], size
, mode
, true);
1775 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1778 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1779 create_integer_operand (&ops
[5], expected_size
);
1783 create_integer_operand (&ops
[6], min_size
);
1784 /* If we can not represent the maximal size,
1785 make parameter NULL. */
1786 if ((HOST_WIDE_INT
) max_size
!= -1)
1787 create_integer_operand (&ops
[7], max_size
);
1789 create_fixed_operand (&ops
[7], NULL
);
1793 /* If we can not represent the maximal size,
1794 make parameter NULL. */
1795 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1796 create_integer_operand (&ops
[8], probable_max_size
);
1798 create_fixed_operand (&ops
[8], NULL
);
1800 if (maybe_expand_insn (code
, nops
, ops
))
1802 volatile_ok
= save_volatile_ok
;
1808 volatile_ok
= save_volatile_ok
;
1812 /* A subroutine of emit_block_move. Copy the data via an explicit
1813 loop. This is used only when libcalls are forbidden. */
1814 /* ??? It'd be nice to copy in hunks larger than QImode. */
1817 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1818 unsigned int align ATTRIBUTE_UNUSED
)
1820 rtx_code_label
*cmp_label
, *top_label
;
1821 rtx iter
, x_addr
, y_addr
, tmp
;
1822 machine_mode x_addr_mode
= get_address_mode (x
);
1823 machine_mode y_addr_mode
= get_address_mode (y
);
1824 machine_mode iter_mode
;
1826 iter_mode
= GET_MODE (size
);
1827 if (iter_mode
== VOIDmode
)
1828 iter_mode
= word_mode
;
1830 top_label
= gen_label_rtx ();
1831 cmp_label
= gen_label_rtx ();
1832 iter
= gen_reg_rtx (iter_mode
);
1834 emit_move_insn (iter
, const0_rtx
);
1836 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1837 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1838 do_pending_stack_adjust ();
1840 emit_jump (cmp_label
);
1841 emit_label (top_label
);
1843 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1844 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1846 if (x_addr_mode
!= y_addr_mode
)
1847 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1848 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1850 x
= change_address (x
, QImode
, x_addr
);
1851 y
= change_address (y
, QImode
, y_addr
);
1853 emit_move_insn (x
, y
);
1855 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1856 true, OPTAB_LIB_WIDEN
);
1858 emit_move_insn (iter
, tmp
);
1860 emit_label (cmp_label
);
1862 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1864 profile_probability::guessed_always ()
1865 .apply_scale (9, 10));
1868 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1869 TAILCALL is true if this is a tail call. */
1872 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1873 rtx size
, bool tailcall
)
1875 rtx dst_addr
, src_addr
;
1876 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1877 machine_mode size_mode
;
1879 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1880 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1881 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1883 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1884 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1885 src_tree
= make_tree (ptr_type_node
, src_addr
);
1887 size_mode
= TYPE_MODE (sizetype
);
1888 size
= convert_to_mode (size_mode
, size
, 1);
1889 size
= copy_to_mode_reg (size_mode
, size
);
1890 size_tree
= make_tree (sizetype
, size
);
1892 /* It is incorrect to use the libcall calling conventions for calls to
1893 memcpy/memmove/memcmp because they can be provided by the user. */
1894 tree fn
= builtin_decl_implicit (fncode
);
1895 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1896 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1898 return expand_call (call_expr
, NULL_RTX
, false);
1901 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1902 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1903 otherwise return null. */
1906 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1907 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1908 HOST_WIDE_INT align
)
1910 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1912 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1915 struct expand_operand ops
[5];
1916 create_output_operand (&ops
[0], target
, insn_mode
);
1917 create_fixed_operand (&ops
[1], arg1_rtx
);
1918 create_fixed_operand (&ops
[2], arg2_rtx
);
1919 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1920 TYPE_UNSIGNED (arg3_type
));
1921 create_integer_operand (&ops
[4], align
);
1922 if (maybe_expand_insn (icode
, 5, ops
))
1923 return ops
[0].value
;
1927 /* Expand a block compare between X and Y with length LEN using the
1928 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1929 of the expression that was used to calculate the length. ALIGN
1930 gives the known minimum common alignment. */
1933 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1936 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1937 implementing memcmp because it will stop if it encounters two
1939 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1941 if (icode
== CODE_FOR_nothing
)
1944 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1947 /* Emit code to compare a block Y to a block X. This may be done with
1948 string-compare instructions, with multiple scalar instructions,
1949 or with a library call.
1951 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1952 they are. LEN_TYPE is the type of the expression that was used to
1955 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1956 value of a normal memcmp call, instead we can just compare for equality.
1957 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1960 Optionally, the caller can pass a constfn and associated data in Y_CFN
1961 and Y_CFN_DATA. describing that the second operand being compared is a
1962 known constant and how to obtain its data.
1963 Return the result of the comparison, or NULL_RTX if we failed to
1964 perform the operation. */
1967 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1968 bool equality_only
, by_pieces_constfn y_cfn
,
1973 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1976 gcc_assert (MEM_P (x
) && MEM_P (y
));
1977 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1978 gcc_assert (align
>= BITS_PER_UNIT
);
1980 x
= adjust_address (x
, BLKmode
, 0);
1981 y
= adjust_address (y
, BLKmode
, 0);
1984 && CONST_INT_P (len
)
1985 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1986 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1989 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
1994 /* Copy all or part of a value X into registers starting at REGNO.
1995 The number of registers to be filled is NREGS. */
1998 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2003 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2004 x
= validize_mem (force_const_mem (mode
, x
));
2006 /* See if the machine can do this with a load multiple insn. */
2007 if (targetm
.have_load_multiple ())
2009 rtx_insn
*last
= get_last_insn ();
2010 rtx first
= gen_rtx_REG (word_mode
, regno
);
2011 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2018 delete_insns_since (last
);
2021 for (int i
= 0; i
< nregs
; i
++)
2022 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2023 operand_subword_force (x
, i
, mode
));
2026 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2027 The number of registers to be filled is NREGS. */
2030 move_block_from_reg (int regno
, rtx x
, int nregs
)
2035 /* See if the machine can do this with a store multiple insn. */
2036 if (targetm
.have_store_multiple ())
2038 rtx_insn
*last
= get_last_insn ();
2039 rtx first
= gen_rtx_REG (word_mode
, regno
);
2040 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2047 delete_insns_since (last
);
2050 for (int i
= 0; i
< nregs
; i
++)
2052 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2056 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2060 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2061 ORIG, where ORIG is a non-consecutive group of registers represented by
2062 a PARALLEL. The clone is identical to the original except in that the
2063 original set of registers is replaced by a new set of pseudo registers.
2064 The new set has the same modes as the original set. */
2067 gen_group_rtx (rtx orig
)
2072 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2074 length
= XVECLEN (orig
, 0);
2075 tmps
= XALLOCAVEC (rtx
, length
);
2077 /* Skip a NULL entry in first slot. */
2078 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2083 for (; i
< length
; i
++)
2085 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2086 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2088 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2091 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2094 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2095 except that values are placed in TMPS[i], and must later be moved
2096 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2099 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2104 machine_mode m
= GET_MODE (orig_src
);
2106 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2109 && !SCALAR_INT_MODE_P (m
)
2110 && !MEM_P (orig_src
)
2111 && GET_CODE (orig_src
) != CONCAT
)
2113 scalar_int_mode imode
;
2114 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2116 src
= gen_reg_rtx (imode
);
2117 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2121 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2122 emit_move_insn (src
, orig_src
);
2124 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2128 /* Check for a NULL entry, used to indicate that the parameter goes
2129 both on the stack and in registers. */
2130 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2135 /* Process the pieces. */
2136 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2138 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2139 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2140 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2141 poly_int64 shift
= 0;
2143 /* Handle trailing fragments that run over the size of the struct.
2144 It's the target's responsibility to make sure that the fragment
2145 cannot be strictly smaller in some cases and strictly larger
2147 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2148 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2150 /* Arrange to shift the fragment to where it belongs.
2151 extract_bit_field loads to the lsb of the reg. */
2153 #ifdef BLOCK_REG_PADDING
2154 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2155 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2160 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2161 bytelen
= ssize
- bytepos
;
2162 gcc_assert (maybe_gt (bytelen
, 0));
2165 /* If we won't be loading directly from memory, protect the real source
2166 from strange tricks we might play; but make sure that the source can
2167 be loaded directly into the destination. */
2169 if (!MEM_P (orig_src
)
2170 && (!CONSTANT_P (orig_src
)
2171 || (GET_MODE (orig_src
) != mode
2172 && GET_MODE (orig_src
) != VOIDmode
)))
2174 if (GET_MODE (orig_src
) == VOIDmode
)
2175 src
= gen_reg_rtx (mode
);
2177 src
= gen_reg_rtx (GET_MODE (orig_src
));
2179 emit_move_insn (src
, orig_src
);
2182 /* Optimize the access just a bit. */
2184 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2185 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2186 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2187 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2189 tmps
[i
] = gen_reg_rtx (mode
);
2190 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2192 else if (COMPLEX_MODE_P (mode
)
2193 && GET_MODE (src
) == mode
2194 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2195 /* Let emit_move_complex do the bulk of the work. */
2197 else if (GET_CODE (src
) == CONCAT
)
2199 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2200 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2204 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2205 && known_le (subpos
+ bytelen
, slen0
))
2207 /* The following assumes that the concatenated objects all
2208 have the same size. In this case, a simple calculation
2209 can be used to determine the object and the bit field
2211 tmps
[i
] = XEXP (src
, elt
);
2212 if (maybe_ne (subpos
, 0)
2213 || maybe_ne (subpos
+ bytelen
, slen0
)
2214 || (!CONSTANT_P (tmps
[i
])
2215 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2216 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2217 subpos
* BITS_PER_UNIT
,
2218 1, NULL_RTX
, mode
, mode
, false,
2225 gcc_assert (known_eq (bytepos
, 0));
2226 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2227 emit_move_insn (mem
, src
);
2228 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2229 0, 1, NULL_RTX
, mode
, mode
, false,
2233 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2234 SIMD register, which is currently broken. While we get GCC
2235 to emit proper RTL for these cases, let's dump to memory. */
2236 else if (VECTOR_MODE_P (GET_MODE (dst
))
2239 int slen
= GET_MODE_SIZE (GET_MODE (src
));
2242 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2243 emit_move_insn (mem
, src
);
2244 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2246 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2247 && XVECLEN (dst
, 0) > 1)
2248 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2249 else if (CONSTANT_P (src
))
2251 if (known_eq (bytelen
, ssize
))
2257 /* TODO: const_wide_int can have sizes other than this... */
2258 gcc_assert (known_eq (2 * bytelen
, ssize
));
2259 split_double (src
, &first
, &second
);
2266 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2269 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2270 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2271 mode
, mode
, false, NULL
);
2273 if (maybe_ne (shift
, 0))
2274 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2279 /* Emit code to move a block SRC of type TYPE to a block DST,
2280 where DST is non-consecutive registers represented by a PARALLEL.
2281 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2285 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2290 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2291 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2293 /* Copy the extracted pieces into the proper (probable) hard regs. */
2294 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2296 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2299 emit_move_insn (d
, tmps
[i
]);
2303 /* Similar, but load SRC into new pseudos in a format that looks like
2304 PARALLEL. This can later be fed to emit_group_move to get things
2305 in the right place. */
2308 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2313 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2314 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2316 /* Convert the vector to look just like the original PARALLEL, except
2317 with the computed values. */
2318 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2320 rtx e
= XVECEXP (parallel
, 0, i
);
2321 rtx d
= XEXP (e
, 0);
2325 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2326 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2328 RTVEC_ELT (vec
, i
) = e
;
2331 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2334 /* Emit code to move a block SRC to block DST, where SRC and DST are
2335 non-consecutive groups of registers, each represented by a PARALLEL. */
2338 emit_group_move (rtx dst
, rtx src
)
2342 gcc_assert (GET_CODE (src
) == PARALLEL
2343 && GET_CODE (dst
) == PARALLEL
2344 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2346 /* Skip first entry if NULL. */
2347 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2348 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2349 XEXP (XVECEXP (src
, 0, i
), 0));
2352 /* Move a group of registers represented by a PARALLEL into pseudos. */
2355 emit_group_move_into_temps (rtx src
)
2357 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2360 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2362 rtx e
= XVECEXP (src
, 0, i
);
2363 rtx d
= XEXP (e
, 0);
2366 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2367 RTVEC_ELT (vec
, i
) = e
;
2370 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2373 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2374 where SRC is non-consecutive registers represented by a PARALLEL.
2375 SSIZE represents the total size of block ORIG_DST, or -1 if not
2379 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2383 int start
, finish
, i
;
2384 machine_mode m
= GET_MODE (orig_dst
);
2386 gcc_assert (GET_CODE (src
) == PARALLEL
);
2388 if (!SCALAR_INT_MODE_P (m
)
2389 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2391 scalar_int_mode imode
;
2392 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2394 dst
= gen_reg_rtx (imode
);
2395 emit_group_store (dst
, src
, type
, ssize
);
2396 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2400 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2401 emit_group_store (dst
, src
, type
, ssize
);
2403 emit_move_insn (orig_dst
, dst
);
2407 /* Check for a NULL entry, used to indicate that the parameter goes
2408 both on the stack and in registers. */
2409 if (XEXP (XVECEXP (src
, 0, 0), 0))
2413 finish
= XVECLEN (src
, 0);
2415 tmps
= XALLOCAVEC (rtx
, finish
);
2417 /* Copy the (probable) hard regs into pseudos. */
2418 for (i
= start
; i
< finish
; i
++)
2420 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2421 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2423 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2424 emit_move_insn (tmps
[i
], reg
);
2430 /* If we won't be storing directly into memory, protect the real destination
2431 from strange tricks we might play. */
2433 if (GET_CODE (dst
) == PARALLEL
)
2437 /* We can get a PARALLEL dst if there is a conditional expression in
2438 a return statement. In that case, the dst and src are the same,
2439 so no action is necessary. */
2440 if (rtx_equal_p (dst
, src
))
2443 /* It is unclear if we can ever reach here, but we may as well handle
2444 it. Allocate a temporary, and split this into a store/load to/from
2446 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2447 emit_group_store (temp
, src
, type
, ssize
);
2448 emit_group_load (dst
, temp
, type
, ssize
);
2451 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2453 machine_mode outer
= GET_MODE (dst
);
2459 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2460 dst
= gen_reg_rtx (outer
);
2462 /* Make life a bit easier for combine. */
2463 /* If the first element of the vector is the low part
2464 of the destination mode, use a paradoxical subreg to
2465 initialize the destination. */
2468 inner
= GET_MODE (tmps
[start
]);
2469 bytepos
= subreg_lowpart_offset (inner
, outer
);
2470 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)), bytepos
))
2472 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2476 emit_move_insn (dst
, temp
);
2483 /* If the first element wasn't the low part, try the last. */
2485 && start
< finish
- 1)
2487 inner
= GET_MODE (tmps
[finish
- 1]);
2488 bytepos
= subreg_lowpart_offset (inner
, outer
);
2489 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)),
2492 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2496 emit_move_insn (dst
, temp
);
2503 /* Otherwise, simply initialize the result to zero. */
2505 emit_move_insn (dst
, CONST0_RTX (outer
));
2508 /* Process the pieces. */
2509 for (i
= start
; i
< finish
; i
++)
2511 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2512 machine_mode mode
= GET_MODE (tmps
[i
]);
2513 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2514 poly_uint64 adj_bytelen
;
2517 /* Handle trailing fragments that run over the size of the struct.
2518 It's the target's responsibility to make sure that the fragment
2519 cannot be strictly smaller in some cases and strictly larger
2521 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2522 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2523 adj_bytelen
= ssize
- bytepos
;
2525 adj_bytelen
= bytelen
;
2527 if (GET_CODE (dst
) == CONCAT
)
2529 if (known_le (bytepos
+ adj_bytelen
,
2530 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2531 dest
= XEXP (dst
, 0);
2532 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2534 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2535 dest
= XEXP (dst
, 1);
2539 machine_mode dest_mode
= GET_MODE (dest
);
2540 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2542 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2544 if (GET_MODE_ALIGNMENT (dest_mode
)
2545 >= GET_MODE_ALIGNMENT (tmp_mode
))
2547 dest
= assign_stack_temp (dest_mode
,
2548 GET_MODE_SIZE (dest_mode
));
2549 emit_move_insn (adjust_address (dest
,
2557 dest
= assign_stack_temp (tmp_mode
,
2558 GET_MODE_SIZE (tmp_mode
));
2559 emit_move_insn (dest
, tmps
[i
]);
2560 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2566 /* Handle trailing fragments that run over the size of the struct. */
2567 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2569 /* store_bit_field always takes its value from the lsb.
2570 Move the fragment to the lsb if it's not already there. */
2572 #ifdef BLOCK_REG_PADDING
2573 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2574 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2580 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2581 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2585 /* Make sure not to write past the end of the struct. */
2586 store_bit_field (dest
,
2587 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2588 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2589 VOIDmode
, tmps
[i
], false);
2592 /* Optimize the access just a bit. */
2593 else if (MEM_P (dest
)
2594 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2595 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2596 && multiple_p (bytepos
* BITS_PER_UNIT
,
2597 GET_MODE_ALIGNMENT (mode
))
2598 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2599 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2602 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2603 0, 0, mode
, tmps
[i
], false);
2606 /* Copy from the pseudo into the (probable) hard reg. */
2607 if (orig_dst
!= dst
)
2608 emit_move_insn (orig_dst
, dst
);
2611 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2612 of the value stored in X. */
2615 maybe_emit_group_store (rtx x
, tree type
)
2617 machine_mode mode
= TYPE_MODE (type
);
2618 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2619 if (GET_CODE (x
) == PARALLEL
)
2621 rtx result
= gen_reg_rtx (mode
);
2622 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2628 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2630 This is used on targets that return BLKmode values in registers. */
2633 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2635 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2636 rtx src
= NULL
, dst
= NULL
;
2637 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2638 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2639 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2640 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2641 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2642 fixed_size_mode copy_mode
;
2644 /* BLKmode registers created in the back-end shouldn't have survived. */
2645 gcc_assert (mode
!= BLKmode
);
2647 /* If the structure doesn't take up a whole number of words, see whether
2648 SRCREG is padded on the left or on the right. If it's on the left,
2649 set PADDING_CORRECTION to the number of bits to skip.
2651 In most ABIs, the structure will be returned at the least end of
2652 the register, which translates to right padding on little-endian
2653 targets and left padding on big-endian targets. The opposite
2654 holds if the structure is returned at the most significant
2655 end of the register. */
2656 if (bytes
% UNITS_PER_WORD
!= 0
2657 && (targetm
.calls
.return_in_msb (type
)
2659 : BYTES_BIG_ENDIAN
))
2661 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2663 /* We can use a single move if we have an exact mode for the size. */
2664 else if (MEM_P (target
)
2665 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2666 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2667 && bytes
== GET_MODE_SIZE (mode
))
2669 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2673 /* And if we additionally have the same mode for a register. */
2674 else if (REG_P (target
)
2675 && GET_MODE (target
) == mode
2676 && bytes
== GET_MODE_SIZE (mode
))
2678 emit_move_insn (target
, srcreg
);
2682 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2683 into a new pseudo which is a full word. */
2684 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2686 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2690 /* Copy the structure BITSIZE bits at a time. If the target lives in
2691 memory, take care of not reading/writing past its end by selecting
2692 a copy mode suited to BITSIZE. This should always be possible given
2695 If the target lives in register, make sure not to select a copy mode
2696 larger than the mode of the register.
2698 We could probably emit more efficient code for machines which do not use
2699 strict alignment, but it doesn't seem worth the effort at the current
2702 copy_mode
= word_mode
;
2705 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2706 if (mem_mode
.exists ())
2707 copy_mode
= mem_mode
.require ();
2709 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2712 for (bitpos
= 0, xbitpos
= padding_correction
;
2713 bitpos
< bytes
* BITS_PER_UNIT
;
2714 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2716 /* We need a new source operand each time xbitpos is on a
2717 word boundary and when xbitpos == padding_correction
2718 (the first time through). */
2719 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2720 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2722 /* We need a new destination operand each time bitpos is on
2724 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2726 else if (bitpos
% BITS_PER_WORD
== 0)
2727 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2729 /* Use xbitpos for the source extraction (right justified) and
2730 bitpos for the destination store (left justified). */
2731 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2732 extract_bit_field (src
, bitsize
,
2733 xbitpos
% BITS_PER_WORD
, 1,
2734 NULL_RTX
, copy_mode
, copy_mode
,
2740 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2741 register if it contains any data, otherwise return null.
2743 This is used on targets that return BLKmode values in registers. */
2746 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2749 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2750 unsigned int bitsize
;
2751 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2752 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2753 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2754 fixed_size_mode dst_mode
;
2756 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2758 x
= expand_normal (src
);
2760 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2764 /* If the structure doesn't take up a whole number of words, see
2765 whether the register value should be padded on the left or on
2766 the right. Set PADDING_CORRECTION to the number of padding
2767 bits needed on the left side.
2769 In most ABIs, the structure will be returned at the least end of
2770 the register, which translates to right padding on little-endian
2771 targets and left padding on big-endian targets. The opposite
2772 holds if the structure is returned at the most significant
2773 end of the register. */
2774 if (bytes
% UNITS_PER_WORD
!= 0
2775 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2777 : BYTES_BIG_ENDIAN
))
2778 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2781 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2782 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2783 bitsize
= BITS_PER_WORD
;
2784 if (targetm
.slow_unaligned_access (word_mode
, TYPE_ALIGN (TREE_TYPE (src
))))
2785 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2787 /* Copy the structure BITSIZE bits at a time. */
2788 for (bitpos
= 0, xbitpos
= padding_correction
;
2789 bitpos
< bytes
* BITS_PER_UNIT
;
2790 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2792 /* We need a new destination pseudo each time xbitpos is
2793 on a word boundary and when xbitpos == padding_correction
2794 (the first time through). */
2795 if (xbitpos
% BITS_PER_WORD
== 0
2796 || xbitpos
== padding_correction
)
2798 /* Generate an appropriate register. */
2799 dst_word
= gen_reg_rtx (word_mode
);
2800 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2802 /* Clear the destination before we move anything into it. */
2803 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2806 /* We need a new source operand each time bitpos is on a word
2808 if (bitpos
% BITS_PER_WORD
== 0)
2809 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2811 /* Use bitpos for the source extraction (left justified) and
2812 xbitpos for the destination store (right justified). */
2813 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2815 extract_bit_field (src_word
, bitsize
,
2816 bitpos
% BITS_PER_WORD
, 1,
2817 NULL_RTX
, word_mode
, word_mode
,
2822 if (mode
== BLKmode
)
2824 /* Find the smallest integer mode large enough to hold the
2825 entire structure. */
2826 opt_scalar_int_mode mode_iter
;
2827 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2828 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2831 /* A suitable mode should have been found. */
2832 mode
= mode_iter
.require ();
2835 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2836 dst_mode
= word_mode
;
2839 dst
= gen_reg_rtx (dst_mode
);
2841 for (i
= 0; i
< n_regs
; i
++)
2842 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2844 if (mode
!= dst_mode
)
2845 dst
= gen_lowpart (mode
, dst
);
2850 /* Add a USE expression for REG to the (possibly empty) list pointed
2851 to by CALL_FUSAGE. REG must denote a hard register. */
2854 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2856 gcc_assert (REG_P (reg
));
2858 if (!HARD_REGISTER_P (reg
))
2862 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2865 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2866 to by CALL_FUSAGE. REG must denote a hard register. */
2869 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2871 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2874 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2877 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2878 starting at REGNO. All of these registers must be hard registers. */
2881 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2885 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2887 for (i
= 0; i
< nregs
; i
++)
2888 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2891 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2892 PARALLEL REGS. This is for calls that pass values in multiple
2893 non-contiguous locations. The Irix 6 ABI has examples of this. */
2896 use_group_regs (rtx
*call_fusage
, rtx regs
)
2900 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2902 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2904 /* A NULL entry means the parameter goes both on the stack and in
2905 registers. This can also be a MEM for targets that pass values
2906 partially on the stack and partially in registers. */
2907 if (reg
!= 0 && REG_P (reg
))
2908 use_reg (call_fusage
, reg
);
2912 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2913 assigment and the code of the expresion on the RHS is CODE. Return
2917 get_def_for_expr (tree name
, enum tree_code code
)
2921 if (TREE_CODE (name
) != SSA_NAME
)
2924 def_stmt
= get_gimple_for_ssa_name (name
);
2926 || gimple_assign_rhs_code (def_stmt
) != code
)
2932 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2933 assigment and the class of the expresion on the RHS is CLASS. Return
2937 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2941 if (TREE_CODE (name
) != SSA_NAME
)
2944 def_stmt
= get_gimple_for_ssa_name (name
);
2946 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2952 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2953 its length in bytes. */
2956 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2957 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2958 unsigned HOST_WIDE_INT min_size
,
2959 unsigned HOST_WIDE_INT max_size
,
2960 unsigned HOST_WIDE_INT probable_max_size
)
2962 machine_mode mode
= GET_MODE (object
);
2965 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2967 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2968 just move a zero. Otherwise, do this a piece at a time. */
2970 && CONST_INT_P (size
)
2971 && INTVAL (size
) == (HOST_WIDE_INT
) GET_MODE_SIZE (mode
))
2973 rtx zero
= CONST0_RTX (mode
);
2976 emit_move_insn (object
, zero
);
2980 if (COMPLEX_MODE_P (mode
))
2982 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2985 write_complex_part (object
, zero
, 0);
2986 write_complex_part (object
, zero
, 1);
2992 if (size
== const0_rtx
)
2995 align
= MEM_ALIGN (object
);
2997 if (CONST_INT_P (size
)
2998 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3000 optimize_insn_for_speed_p ()))
3001 clear_by_pieces (object
, INTVAL (size
), align
);
3002 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3003 expected_align
, expected_size
,
3004 min_size
, max_size
, probable_max_size
))
3006 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3007 return set_storage_via_libcall (object
, size
, const0_rtx
,
3008 method
== BLOCK_OP_TAILCALL
);
3016 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3018 unsigned HOST_WIDE_INT max
, min
= 0;
3019 if (GET_CODE (size
) == CONST_INT
)
3020 min
= max
= UINTVAL (size
);
3022 max
= GET_MODE_MASK (GET_MODE (size
));
3023 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3027 /* A subroutine of clear_storage. Expand a call to memset.
3028 Return the return value of memset, 0 otherwise. */
3031 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3033 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3034 machine_mode size_mode
;
3036 object
= copy_addr_to_reg (XEXP (object
, 0));
3037 object_tree
= make_tree (ptr_type_node
, object
);
3039 if (!CONST_INT_P (val
))
3040 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3041 val_tree
= make_tree (integer_type_node
, val
);
3043 size_mode
= TYPE_MODE (sizetype
);
3044 size
= convert_to_mode (size_mode
, size
, 1);
3045 size
= copy_to_mode_reg (size_mode
, size
);
3046 size_tree
= make_tree (sizetype
, size
);
3048 /* It is incorrect to use the libcall calling conventions for calls to
3049 memset because it can be provided by the user. */
3050 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3051 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3052 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3054 return expand_call (call_expr
, NULL_RTX
, false);
3057 /* Expand a setmem pattern; return true if successful. */
3060 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3061 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3062 unsigned HOST_WIDE_INT min_size
,
3063 unsigned HOST_WIDE_INT max_size
,
3064 unsigned HOST_WIDE_INT probable_max_size
)
3066 /* Try the most limited insn first, because there's no point
3067 including more than one in the machine description unless
3068 the more limited one has some advantage. */
3070 if (expected_align
< align
)
3071 expected_align
= align
;
3072 if (expected_size
!= -1)
3074 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3075 expected_size
= max_size
;
3076 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3077 expected_size
= min_size
;
3080 opt_scalar_int_mode mode_iter
;
3081 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3083 scalar_int_mode mode
= mode_iter
.require ();
3084 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3086 if (code
!= CODE_FOR_nothing
3087 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3088 here because if SIZE is less than the mode mask, as it is
3089 returned by the macro, it will definitely be less than the
3090 actual mode mask. Since SIZE is within the Pmode address
3091 space, we limit MODE to Pmode. */
3092 && ((CONST_INT_P (size
)
3093 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3094 <= (GET_MODE_MASK (mode
) >> 1)))
3095 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3096 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3098 struct expand_operand ops
[9];
3101 nops
= insn_data
[(int) code
].n_generator_args
;
3102 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3104 create_fixed_operand (&ops
[0], object
);
3105 /* The check above guarantees that this size conversion is valid. */
3106 create_convert_operand_to (&ops
[1], size
, mode
, true);
3107 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3108 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3111 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3112 create_integer_operand (&ops
[5], expected_size
);
3116 create_integer_operand (&ops
[6], min_size
);
3117 /* If we can not represent the maximal size,
3118 make parameter NULL. */
3119 if ((HOST_WIDE_INT
) max_size
!= -1)
3120 create_integer_operand (&ops
[7], max_size
);
3122 create_fixed_operand (&ops
[7], NULL
);
3126 /* If we can not represent the maximal size,
3127 make parameter NULL. */
3128 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3129 create_integer_operand (&ops
[8], probable_max_size
);
3131 create_fixed_operand (&ops
[8], NULL
);
3133 if (maybe_expand_insn (code
, nops
, ops
))
3142 /* Write to one of the components of the complex value CPLX. Write VAL to
3143 the real part if IMAG_P is false, and the imaginary part if its true. */
3146 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3152 if (GET_CODE (cplx
) == CONCAT
)
3154 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3158 cmode
= GET_MODE (cplx
);
3159 imode
= GET_MODE_INNER (cmode
);
3160 ibitsize
= GET_MODE_BITSIZE (imode
);
3162 /* For MEMs simplify_gen_subreg may generate an invalid new address
3163 because, e.g., the original address is considered mode-dependent
3164 by the target, which restricts simplify_subreg from invoking
3165 adjust_address_nv. Instead of preparing fallback support for an
3166 invalid address, we call adjust_address_nv directly. */
3169 emit_move_insn (adjust_address_nv (cplx
, imode
,
3170 imag_p
? GET_MODE_SIZE (imode
) : 0),
3175 /* If the sub-object is at least word sized, then we know that subregging
3176 will work. This special case is important, since store_bit_field
3177 wants to operate on integer modes, and there's rarely an OImode to
3178 correspond to TCmode. */
3179 if (ibitsize
>= BITS_PER_WORD
3180 /* For hard regs we have exact predicates. Assume we can split
3181 the original object if it spans an even number of hard regs.
3182 This special case is important for SCmode on 64-bit platforms
3183 where the natural size of floating-point regs is 32-bit. */
3185 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3186 && REG_NREGS (cplx
) % 2 == 0))
3188 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3189 imag_p
? GET_MODE_SIZE (imode
) : 0);
3192 emit_move_insn (part
, val
);
3196 /* simplify_gen_subreg may fail for sub-word MEMs. */
3197 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3200 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3204 /* Extract one of the components of the complex value CPLX. Extract the
3205 real part if IMAG_P is false, and the imaginary part if it's true. */
3208 read_complex_part (rtx cplx
, bool imag_p
)
3214 if (GET_CODE (cplx
) == CONCAT
)
3215 return XEXP (cplx
, imag_p
);
3217 cmode
= GET_MODE (cplx
);
3218 imode
= GET_MODE_INNER (cmode
);
3219 ibitsize
= GET_MODE_BITSIZE (imode
);
3221 /* Special case reads from complex constants that got spilled to memory. */
3222 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3224 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3225 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3227 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3228 if (CONSTANT_CLASS_P (part
))
3229 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3233 /* For MEMs simplify_gen_subreg may generate an invalid new address
3234 because, e.g., the original address is considered mode-dependent
3235 by the target, which restricts simplify_subreg from invoking
3236 adjust_address_nv. Instead of preparing fallback support for an
3237 invalid address, we call adjust_address_nv directly. */
3239 return adjust_address_nv (cplx
, imode
,
3240 imag_p
? GET_MODE_SIZE (imode
) : 0);
3242 /* If the sub-object is at least word sized, then we know that subregging
3243 will work. This special case is important, since extract_bit_field
3244 wants to operate on integer modes, and there's rarely an OImode to
3245 correspond to TCmode. */
3246 if (ibitsize
>= BITS_PER_WORD
3247 /* For hard regs we have exact predicates. Assume we can split
3248 the original object if it spans an even number of hard regs.
3249 This special case is important for SCmode on 64-bit platforms
3250 where the natural size of floating-point regs is 32-bit. */
3252 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3253 && REG_NREGS (cplx
) % 2 == 0))
3255 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3256 imag_p
? GET_MODE_SIZE (imode
) : 0);
3260 /* simplify_gen_subreg may fail for sub-word MEMs. */
3261 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3264 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3265 true, NULL_RTX
, imode
, imode
, false, NULL
);
3268 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3269 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3270 represented in NEW_MODE. If FORCE is true, this will never happen, as
3271 we'll force-create a SUBREG if needed. */
3274 emit_move_change_mode (machine_mode new_mode
,
3275 machine_mode old_mode
, rtx x
, bool force
)
3279 if (push_operand (x
, GET_MODE (x
)))
3281 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3282 MEM_COPY_ATTRIBUTES (ret
, x
);
3286 /* We don't have to worry about changing the address since the
3287 size in bytes is supposed to be the same. */
3288 if (reload_in_progress
)
3290 /* Copy the MEM to change the mode and move any
3291 substitutions from the old MEM to the new one. */
3292 ret
= adjust_address_nv (x
, new_mode
, 0);
3293 copy_replacements (x
, ret
);
3296 ret
= adjust_address (x
, new_mode
, 0);
3300 /* Note that we do want simplify_subreg's behavior of validating
3301 that the new mode is ok for a hard register. If we were to use
3302 simplify_gen_subreg, we would create the subreg, but would
3303 probably run into the target not being able to implement it. */
3304 /* Except, of course, when FORCE is true, when this is exactly what
3305 we want. Which is needed for CCmodes on some targets. */
3307 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3309 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3315 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3316 an integer mode of the same size as MODE. Returns the instruction
3317 emitted, or NULL if such a move could not be generated. */
3320 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3322 scalar_int_mode imode
;
3323 enum insn_code code
;
3325 /* There must exist a mode of the exact size we require. */
3326 if (!int_mode_for_mode (mode
).exists (&imode
))
3329 /* The target must support moves in this mode. */
3330 code
= optab_handler (mov_optab
, imode
);
3331 if (code
== CODE_FOR_nothing
)
3334 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3337 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3340 return emit_insn (GEN_FCN (code
) (x
, y
));
3343 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3344 Return an equivalent MEM that does not use an auto-increment. */
3347 emit_move_resolve_push (machine_mode mode
, rtx x
)
3349 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3350 HOST_WIDE_INT adjust
;
3353 adjust
= GET_MODE_SIZE (mode
);
3354 #ifdef PUSH_ROUNDING
3355 adjust
= PUSH_ROUNDING (adjust
);
3357 if (code
== PRE_DEC
|| code
== POST_DEC
)
3359 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3361 rtx expr
= XEXP (XEXP (x
, 0), 1);
3364 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3365 gcc_assert (CONST_INT_P (XEXP (expr
, 1)));
3366 val
= INTVAL (XEXP (expr
, 1));
3367 if (GET_CODE (expr
) == MINUS
)
3369 gcc_assert (adjust
== val
|| adjust
== -val
);
3373 /* Do not use anti_adjust_stack, since we don't want to update
3374 stack_pointer_delta. */
3375 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3376 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3377 0, OPTAB_LIB_WIDEN
);
3378 if (temp
!= stack_pointer_rtx
)
3379 emit_move_insn (stack_pointer_rtx
, temp
);
3386 temp
= stack_pointer_rtx
;
3391 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3397 return replace_equiv_address (x
, temp
);
3400 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3401 X is known to satisfy push_operand, and MODE is known to be complex.
3402 Returns the last instruction emitted. */
3405 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3407 scalar_mode submode
= GET_MODE_INNER (mode
);
3410 #ifdef PUSH_ROUNDING
3411 unsigned int submodesize
= GET_MODE_SIZE (submode
);
3413 /* In case we output to the stack, but the size is smaller than the
3414 machine can push exactly, we need to use move instructions. */
3415 if (PUSH_ROUNDING (submodesize
) != submodesize
)
3417 x
= emit_move_resolve_push (mode
, x
);
3418 return emit_move_insn (x
, y
);
3422 /* Note that the real part always precedes the imag part in memory
3423 regardless of machine's endianness. */
3424 switch (GET_CODE (XEXP (x
, 0)))
3438 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3439 read_complex_part (y
, imag_first
));
3440 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3441 read_complex_part (y
, !imag_first
));
3444 /* A subroutine of emit_move_complex. Perform the move from Y to X
3445 via two moves of the parts. Returns the last instruction emitted. */
3448 emit_move_complex_parts (rtx x
, rtx y
)
3450 /* Show the output dies here. This is necessary for SUBREGs
3451 of pseudos since we cannot track their lifetimes correctly;
3452 hard regs shouldn't appear here except as return values. */
3453 if (!reload_completed
&& !reload_in_progress
3454 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3457 write_complex_part (x
, read_complex_part (y
, false), false);
3458 write_complex_part (x
, read_complex_part (y
, true), true);
3460 return get_last_insn ();
3463 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3464 MODE is known to be complex. Returns the last instruction emitted. */
3467 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3471 /* Need to take special care for pushes, to maintain proper ordering
3472 of the data, and possibly extra padding. */
3473 if (push_operand (x
, mode
))
3474 return emit_move_complex_push (mode
, x
, y
);
3476 /* See if we can coerce the target into moving both values at once, except
3477 for floating point where we favor moving as parts if this is easy. */
3478 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3479 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3481 && HARD_REGISTER_P (x
)
3482 && REG_NREGS (x
) == 1)
3484 && HARD_REGISTER_P (y
)
3485 && REG_NREGS (y
) == 1))
3487 /* Not possible if the values are inherently not adjacent. */
3488 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3490 /* Is possible if both are registers (or subregs of registers). */
3491 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3493 /* If one of the operands is a memory, and alignment constraints
3494 are friendly enough, we may be able to do combined memory operations.
3495 We do not attempt this if Y is a constant because that combination is
3496 usually better with the by-parts thing below. */
3497 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3498 && (!STRICT_ALIGNMENT
3499 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3508 /* For memory to memory moves, optimal behavior can be had with the
3509 existing block move logic. */
3510 if (MEM_P (x
) && MEM_P (y
))
3512 emit_block_move (x
, y
, GEN_INT (GET_MODE_SIZE (mode
)),
3513 BLOCK_OP_NO_LIBCALL
);
3514 return get_last_insn ();
3517 ret
= emit_move_via_integer (mode
, x
, y
, true);
3522 return emit_move_complex_parts (x
, y
);
3525 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3526 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3529 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3533 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3536 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3537 if (code
!= CODE_FOR_nothing
)
3539 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3540 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3541 return emit_insn (GEN_FCN (code
) (x
, y
));
3545 /* Otherwise, find the MODE_INT mode of the same width. */
3546 ret
= emit_move_via_integer (mode
, x
, y
, false);
3547 gcc_assert (ret
!= NULL
);
3551 /* Return true if word I of OP lies entirely in the
3552 undefined bits of a paradoxical subreg. */
3555 undefined_operand_subword_p (const_rtx op
, int i
)
3557 if (GET_CODE (op
) != SUBREG
)
3559 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3560 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3561 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3562 || known_le (offset
, -UNITS_PER_WORD
));
3565 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3566 MODE is any multi-word or full-word mode that lacks a move_insn
3567 pattern. Note that you will get better code if you define such
3568 patterns, even if they must turn into multiple assembler instructions. */
3571 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3573 rtx_insn
*last_insn
= 0;
3579 gcc_assert (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
);
3581 /* If X is a push on the stack, do the push now and replace
3582 X with a reference to the stack pointer. */
3583 if (push_operand (x
, mode
))
3584 x
= emit_move_resolve_push (mode
, x
);
3586 /* If we are in reload, see if either operand is a MEM whose address
3587 is scheduled for replacement. */
3588 if (reload_in_progress
&& MEM_P (x
)
3589 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3590 x
= replace_equiv_address_nv (x
, inner
);
3591 if (reload_in_progress
&& MEM_P (y
)
3592 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3593 y
= replace_equiv_address_nv (y
, inner
);
3597 need_clobber
= false;
3599 i
< (GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
3602 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3605 /* Do not generate code for a move if it would come entirely
3606 from the undefined bits of a paradoxical subreg. */
3607 if (undefined_operand_subword_p (y
, i
))
3610 ypart
= operand_subword (y
, i
, 1, mode
);
3612 /* If we can't get a part of Y, put Y into memory if it is a
3613 constant. Otherwise, force it into a register. Then we must
3614 be able to get a part of Y. */
3615 if (ypart
== 0 && CONSTANT_P (y
))
3617 y
= use_anchored_address (force_const_mem (mode
, y
));
3618 ypart
= operand_subword (y
, i
, 1, mode
);
3620 else if (ypart
== 0)
3621 ypart
= operand_subword_force (y
, i
, mode
);
3623 gcc_assert (xpart
&& ypart
);
3625 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3627 last_insn
= emit_move_insn (xpart
, ypart
);
3633 /* Show the output dies here. This is necessary for SUBREGs
3634 of pseudos since we cannot track their lifetimes correctly;
3635 hard regs shouldn't appear here except as return values.
3636 We never want to emit such a clobber after reload. */
3638 && ! (reload_in_progress
|| reload_completed
)
3639 && need_clobber
!= 0)
3647 /* Low level part of emit_move_insn.
3648 Called just like emit_move_insn, but assumes X and Y
3649 are basically valid. */
3652 emit_move_insn_1 (rtx x
, rtx y
)
3654 machine_mode mode
= GET_MODE (x
);
3655 enum insn_code code
;
3657 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3659 code
= optab_handler (mov_optab
, mode
);
3660 if (code
!= CODE_FOR_nothing
)
3661 return emit_insn (GEN_FCN (code
) (x
, y
));
3663 /* Expand complex moves by moving real part and imag part. */
3664 if (COMPLEX_MODE_P (mode
))
3665 return emit_move_complex (mode
, x
, y
);
3667 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3668 || ALL_FIXED_POINT_MODE_P (mode
))
3670 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3672 /* If we can't find an integer mode, use multi words. */
3676 return emit_move_multi_word (mode
, x
, y
);
3679 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3680 return emit_move_ccmode (mode
, x
, y
);
3682 /* Try using a move pattern for the corresponding integer mode. This is
3683 only safe when simplify_subreg can convert MODE constants into integer
3684 constants. At present, it can only do this reliably if the value
3685 fits within a HOST_WIDE_INT. */
3686 if (!CONSTANT_P (y
) || GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3688 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3692 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3697 return emit_move_multi_word (mode
, x
, y
);
3700 /* Generate code to copy Y into X.
3701 Both Y and X must have the same mode, except that
3702 Y can be a constant with VOIDmode.
3703 This mode cannot be BLKmode; use emit_block_move for that.
3705 Return the last instruction emitted. */
3708 emit_move_insn (rtx x
, rtx y
)
3710 machine_mode mode
= GET_MODE (x
);
3711 rtx y_cst
= NULL_RTX
;
3712 rtx_insn
*last_insn
;
3715 gcc_assert (mode
!= BLKmode
3716 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3721 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3722 && (last_insn
= compress_float_constant (x
, y
)))
3727 if (!targetm
.legitimate_constant_p (mode
, y
))
3729 y
= force_const_mem (mode
, y
);
3731 /* If the target's cannot_force_const_mem prevented the spill,
3732 assume that the target's move expanders will also take care
3733 of the non-legitimate constant. */
3737 y
= use_anchored_address (y
);
3741 /* If X or Y are memory references, verify that their addresses are valid
3744 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3746 && ! push_operand (x
, GET_MODE (x
))))
3747 x
= validize_mem (x
);
3750 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3751 MEM_ADDR_SPACE (y
)))
3752 y
= validize_mem (y
);
3754 gcc_assert (mode
!= BLKmode
);
3756 last_insn
= emit_move_insn_1 (x
, y
);
3758 if (y_cst
&& REG_P (x
)
3759 && (set
= single_set (last_insn
)) != NULL_RTX
3760 && SET_DEST (set
) == x
3761 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3762 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3767 /* Generate the body of an instruction to copy Y into X.
3768 It may be a list of insns, if one insn isn't enough. */
3771 gen_move_insn (rtx x
, rtx y
)
3776 emit_move_insn_1 (x
, y
);
3782 /* If Y is representable exactly in a narrower mode, and the target can
3783 perform the extension directly from constant or memory, then emit the
3784 move as an extension. */
3787 compress_float_constant (rtx x
, rtx y
)
3789 machine_mode dstmode
= GET_MODE (x
);
3790 machine_mode orig_srcmode
= GET_MODE (y
);
3791 machine_mode srcmode
;
3792 const REAL_VALUE_TYPE
*r
;
3793 int oldcost
, newcost
;
3794 bool speed
= optimize_insn_for_speed_p ();
3796 r
= CONST_DOUBLE_REAL_VALUE (y
);
3798 if (targetm
.legitimate_constant_p (dstmode
, y
))
3799 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3801 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3803 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3807 rtx_insn
*last_insn
;
3809 /* Skip if the target can't extend this way. */
3810 ic
= can_extend_p (dstmode
, srcmode
, 0);
3811 if (ic
== CODE_FOR_nothing
)
3814 /* Skip if the narrowed value isn't exact. */
3815 if (! exact_real_truncate (srcmode
, r
))
3818 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3820 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3822 /* Skip if the target needs extra instructions to perform
3824 if (!insn_operand_matches (ic
, 1, trunc_y
))
3826 /* This is valid, but may not be cheaper than the original. */
3827 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3829 if (oldcost
< newcost
)
3832 else if (float_extend_from_mem
[dstmode
][srcmode
])
3834 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3835 /* This is valid, but may not be cheaper than the original. */
3836 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3838 if (oldcost
< newcost
)
3840 trunc_y
= validize_mem (trunc_y
);
3845 /* For CSE's benefit, force the compressed constant pool entry
3846 into a new pseudo. This constant may be used in different modes,
3847 and if not, combine will put things back together for us. */
3848 trunc_y
= force_reg (srcmode
, trunc_y
);
3850 /* If x is a hard register, perform the extension into a pseudo,
3851 so that e.g. stack realignment code is aware of it. */
3853 if (REG_P (x
) && HARD_REGISTER_P (x
))
3854 target
= gen_reg_rtx (dstmode
);
3856 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3857 last_insn
= get_last_insn ();
3860 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3863 return emit_move_insn (x
, target
);
3870 /* Pushing data onto the stack. */
3872 /* Push a block of length SIZE (perhaps variable)
3873 and return an rtx to address the beginning of the block.
3874 The value may be virtual_outgoing_args_rtx.
3876 EXTRA is the number of bytes of padding to push in addition to SIZE.
3877 BELOW nonzero means this padding comes at low addresses;
3878 otherwise, the padding comes at high addresses. */
3881 push_block (rtx size
, poly_int64 extra
, int below
)
3885 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3886 if (CONSTANT_P (size
))
3887 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3888 else if (REG_P (size
) && known_eq (extra
, 0))
3889 anti_adjust_stack (size
);
3892 temp
= copy_to_mode_reg (Pmode
, size
);
3893 if (maybe_ne (extra
, 0))
3894 temp
= expand_binop (Pmode
, add_optab
, temp
,
3895 gen_int_mode (extra
, Pmode
),
3896 temp
, 0, OPTAB_LIB_WIDEN
);
3897 anti_adjust_stack (temp
);
3900 if (STACK_GROWS_DOWNWARD
)
3902 temp
= virtual_outgoing_args_rtx
;
3903 if (maybe_ne (extra
, 0) && below
)
3904 temp
= plus_constant (Pmode
, temp
, extra
);
3908 if (CONST_INT_P (size
))
3909 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3910 -INTVAL (size
) - (below
? 0 : extra
));
3911 else if (maybe_ne (extra
, 0) && !below
)
3912 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3913 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3916 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3917 negate_rtx (Pmode
, size
));
3920 return memory_address (NARROWEST_INT_MODE
, temp
);
3923 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3926 mem_autoinc_base (rtx mem
)
3930 rtx addr
= XEXP (mem
, 0);
3931 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3932 return XEXP (addr
, 0);
3937 /* A utility routine used here, in reload, and in try_split. The insns
3938 after PREV up to and including LAST are known to adjust the stack,
3939 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3940 placing notes as appropriate. PREV may be NULL, indicating the
3941 entire insn sequence prior to LAST should be scanned.
3943 The set of allowed stack pointer modifications is small:
3944 (1) One or more auto-inc style memory references (aka pushes),
3945 (2) One or more addition/subtraction with the SP as destination,
3946 (3) A single move insn with the SP as destination,
3947 (4) A call_pop insn,
3948 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3950 Insns in the sequence that do not modify the SP are ignored,
3951 except for noreturn calls.
3953 The return value is the amount of adjustment that can be trivially
3954 verified, via immediate operand or auto-inc. If the adjustment
3955 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3958 find_args_size_adjust (rtx_insn
*insn
)
3963 pat
= PATTERN (insn
);
3966 /* Look for a call_pop pattern. */
3969 /* We have to allow non-call_pop patterns for the case
3970 of emit_single_push_insn of a TLS address. */
3971 if (GET_CODE (pat
) != PARALLEL
)
3974 /* All call_pop have a stack pointer adjust in the parallel.
3975 The call itself is always first, and the stack adjust is
3976 usually last, so search from the end. */
3977 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3979 set
= XVECEXP (pat
, 0, i
);
3980 if (GET_CODE (set
) != SET
)
3982 dest
= SET_DEST (set
);
3983 if (dest
== stack_pointer_rtx
)
3986 /* We'd better have found the stack pointer adjust. */
3989 /* Fall through to process the extracted SET and DEST
3990 as if it was a standalone insn. */
3992 else if (GET_CODE (pat
) == SET
)
3994 else if ((set
= single_set (insn
)) != NULL
)
3996 else if (GET_CODE (pat
) == PARALLEL
)
3998 /* ??? Some older ports use a parallel with a stack adjust
3999 and a store for a PUSH_ROUNDING pattern, rather than a
4000 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4001 /* ??? See h8300 and m68k, pushqi1. */
4002 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4004 set
= XVECEXP (pat
, 0, i
);
4005 if (GET_CODE (set
) != SET
)
4007 dest
= SET_DEST (set
);
4008 if (dest
== stack_pointer_rtx
)
4011 /* We do not expect an auto-inc of the sp in the parallel. */
4012 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4013 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4014 != stack_pointer_rtx
);
4022 dest
= SET_DEST (set
);
4024 /* Look for direct modifications of the stack pointer. */
4025 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4027 /* Look for a trivial adjustment, otherwise assume nothing. */
4028 /* Note that the SPU restore_stack_block pattern refers to
4029 the stack pointer in V4SImode. Consider that non-trivial. */
4030 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4031 && GET_CODE (SET_SRC (set
)) == PLUS
4032 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4033 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4034 return INTVAL (XEXP (SET_SRC (set
), 1));
4035 /* ??? Reload can generate no-op moves, which will be cleaned
4036 up later. Recognize it and continue searching. */
4037 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4040 return HOST_WIDE_INT_MIN
;
4046 /* Otherwise only think about autoinc patterns. */
4047 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4050 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4051 != stack_pointer_rtx
);
4053 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4054 mem
= SET_SRC (set
);
4058 addr
= XEXP (mem
, 0);
4059 switch (GET_CODE (addr
))
4063 return GET_MODE_SIZE (GET_MODE (mem
));
4066 return -GET_MODE_SIZE (GET_MODE (mem
));
4069 addr
= XEXP (addr
, 1);
4070 gcc_assert (GET_CODE (addr
) == PLUS
);
4071 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4072 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4073 return INTVAL (XEXP (addr
, 1));
4081 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4082 poly_int64 end_args_size
)
4084 poly_int64 args_size
= end_args_size
;
4085 bool saw_unknown
= false;
4088 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4090 if (!NONDEBUG_INSN_P (insn
))
4093 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4094 a call argument containing a TLS address that itself requires
4095 a call to __tls_get_addr. The handling of stack_pointer_delta
4096 in emit_single_push_insn is supposed to ensure that any such
4097 notes are already correct. */
4098 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4099 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4101 poly_int64 this_delta
= find_args_size_adjust (insn
);
4102 if (known_eq (this_delta
, 0))
4105 || ACCUMULATE_OUTGOING_ARGS
4106 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4110 gcc_assert (!saw_unknown
);
4111 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4115 add_args_size_note (insn
, args_size
);
4116 if (STACK_GROWS_DOWNWARD
)
4117 this_delta
= -poly_uint64 (this_delta
);
4120 args_size
= HOST_WIDE_INT_MIN
;
4122 args_size
-= this_delta
;
4128 #ifdef PUSH_ROUNDING
4129 /* Emit single push insn. */
4132 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4135 unsigned rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4137 enum insn_code icode
;
4139 /* If there is push pattern, use it. Otherwise try old way of throwing
4140 MEM representing push operation to move expander. */
4141 icode
= optab_handler (push_optab
, mode
);
4142 if (icode
!= CODE_FOR_nothing
)
4144 struct expand_operand ops
[1];
4146 create_input_operand (&ops
[0], x
, mode
);
4147 if (maybe_expand_insn (icode
, 1, ops
))
4150 if (GET_MODE_SIZE (mode
) == rounded_size
)
4151 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4152 /* If we are to pad downward, adjust the stack pointer first and
4153 then store X into the stack location using an offset. This is
4154 because emit_move_insn does not know how to pad; it does not have
4156 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4158 unsigned padding_size
= rounded_size
- GET_MODE_SIZE (mode
);
4159 HOST_WIDE_INT offset
;
4161 emit_move_insn (stack_pointer_rtx
,
4162 expand_binop (Pmode
,
4163 STACK_GROWS_DOWNWARD
? sub_optab
4166 gen_int_mode (rounded_size
, Pmode
),
4167 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4169 offset
= (HOST_WIDE_INT
) padding_size
;
4170 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4171 /* We have already decremented the stack pointer, so get the
4173 offset
+= (HOST_WIDE_INT
) rounded_size
;
4175 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4176 /* We have already incremented the stack pointer, so get the
4178 offset
-= (HOST_WIDE_INT
) rounded_size
;
4180 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4181 gen_int_mode (offset
, Pmode
));
4185 if (STACK_GROWS_DOWNWARD
)
4186 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4187 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4188 gen_int_mode (-(HOST_WIDE_INT
) rounded_size
,
4191 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4192 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4193 gen_int_mode (rounded_size
, Pmode
));
4195 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4198 dest
= gen_rtx_MEM (mode
, dest_addr
);
4202 set_mem_attributes (dest
, type
, 1);
4204 if (cfun
->tail_call_marked
)
4205 /* Function incoming arguments may overlap with sibling call
4206 outgoing arguments and we cannot allow reordering of reads
4207 from function arguments with stores to outgoing arguments
4208 of sibling calls. */
4209 set_mem_alias_set (dest
, 0);
4211 emit_move_insn (dest
, x
);
4214 /* Emit and annotate a single push insn. */
4217 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4219 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4220 rtx_insn
*prev
= get_last_insn ();
4223 emit_single_push_insn_1 (mode
, x
, type
);
4225 /* Adjust stack_pointer_delta to describe the situation after the push
4226 we just performed. Note that we must do this after the push rather
4227 than before the push in case calculating X needs pushes and pops of
4228 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4229 for such pushes and pops must not include the effect of the future
4231 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4233 last
= get_last_insn ();
4235 /* Notice the common case where we emitted exactly one insn. */
4236 if (PREV_INSN (last
) == prev
)
4238 add_args_size_note (last
, stack_pointer_delta
);
4242 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4243 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4244 || known_eq (delta
, old_delta
));
4248 /* If reading SIZE bytes from X will end up reading from
4249 Y return the number of bytes that overlap. Return -1
4250 if there is no overlap or -2 if we can't determine
4251 (for example when X and Y have different base registers). */
4254 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4256 rtx tmp
= plus_constant (Pmode
, x
, size
);
4257 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4259 if (!CONST_INT_P (sub
))
4262 HOST_WIDE_INT val
= INTVAL (sub
);
4264 return IN_RANGE (val
, 1, size
) ? val
: -1;
4267 /* Generate code to push X onto the stack, assuming it has mode MODE and
4269 MODE is redundant except when X is a CONST_INT (since they don't
4271 SIZE is an rtx for the size of data to be copied (in bytes),
4272 needed only if X is BLKmode.
4273 Return true if successful. May return false if asked to push a
4274 partial argument during a sibcall optimization (as specified by
4275 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4278 ALIGN (in bits) is maximum alignment we can assume.
4280 If PARTIAL and REG are both nonzero, then copy that many of the first
4281 bytes of X into registers starting with REG, and push the rest of X.
4282 The amount of space pushed is decreased by PARTIAL bytes.
4283 REG must be a hard register in this case.
4284 If REG is zero but PARTIAL is not, take any all others actions for an
4285 argument partially in registers, but do not actually load any
4288 EXTRA is the amount in bytes of extra space to leave next to this arg.
4289 This is ignored if an argument block has already been allocated.
4291 On a machine that lacks real push insns, ARGS_ADDR is the address of
4292 the bottom of the argument block for this call. We use indexing off there
4293 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4294 argument block has not been preallocated.
4296 ARGS_SO_FAR is the size of args previously pushed for this call.
4298 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4299 for arguments passed in registers. If nonzero, it will be the number
4300 of bytes required. */
4303 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4304 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4305 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4306 rtx alignment_pad
, bool sibcall_p
)
4309 pad_direction stack_direction
4310 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4312 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4313 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4314 Default is below for small data on big-endian machines; else above. */
4315 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4317 /* Invert direction if stack is post-decrement.
4319 if (STACK_PUSH_CODE
== POST_DEC
)
4320 if (where_pad
!= PAD_NONE
)
4321 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4325 int nregs
= partial
/ UNITS_PER_WORD
;
4326 rtx
*tmp_regs
= NULL
;
4327 int overlapping
= 0;
4330 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4332 /* Copy a block into the stack, entirely or partially. */
4339 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4340 used
= partial
- offset
;
4342 if (mode
!= BLKmode
)
4344 /* A value is to be stored in an insufficiently aligned
4345 stack slot; copy via a suitably aligned slot if
4347 size
= GEN_INT (GET_MODE_SIZE (mode
));
4348 if (!MEM_P (xinner
))
4350 temp
= assign_temp (type
, 1, 1);
4351 emit_move_insn (temp
, xinner
);
4358 /* USED is now the # of bytes we need not copy to the stack
4359 because registers will take care of them. */
4362 xinner
= adjust_address (xinner
, BLKmode
, used
);
4364 /* If the partial register-part of the arg counts in its stack size,
4365 skip the part of stack space corresponding to the registers.
4366 Otherwise, start copying to the beginning of the stack space,
4367 by setting SKIP to 0. */
4368 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4370 #ifdef PUSH_ROUNDING
4371 /* Do it with several push insns if that doesn't take lots of insns
4372 and if there is no difficulty with push insns that skip bytes
4373 on the stack for alignment purposes. */
4376 && CONST_INT_P (size
)
4378 && MEM_ALIGN (xinner
) >= align
4379 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4380 /* Here we avoid the case of a structure whose weak alignment
4381 forces many pushes of a small amount of data,
4382 and such small pushes do rounding that causes trouble. */
4383 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4384 || align
>= BIGGEST_ALIGNMENT
4385 || (PUSH_ROUNDING (align
/ BITS_PER_UNIT
)
4386 == (align
/ BITS_PER_UNIT
)))
4387 && (HOST_WIDE_INT
) PUSH_ROUNDING (INTVAL (size
)) == INTVAL (size
))
4389 /* Push padding now if padding above and stack grows down,
4390 or if padding below and stack grows up.
4391 But if space already allocated, this has already been done. */
4392 if (maybe_ne (extra
, 0)
4394 && where_pad
!= PAD_NONE
4395 && where_pad
!= stack_direction
)
4396 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4398 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4401 #endif /* PUSH_ROUNDING */
4405 /* Otherwise make space on the stack and copy the data
4406 to the address of that space. */
4408 /* Deduct words put into registers from the size we must copy. */
4411 if (CONST_INT_P (size
))
4412 size
= GEN_INT (INTVAL (size
) - used
);
4414 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4415 gen_int_mode (used
, GET_MODE (size
)),
4416 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4419 /* Get the address of the stack space.
4420 In this case, we do not deal with EXTRA separately.
4421 A single stack adjust will do. */
4424 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4427 else if (CONST_INT_P (args_so_far
))
4428 temp
= memory_address (BLKmode
,
4429 plus_constant (Pmode
, args_addr
,
4430 skip
+ INTVAL (args_so_far
)));
4432 temp
= memory_address (BLKmode
,
4433 plus_constant (Pmode
,
4434 gen_rtx_PLUS (Pmode
,
4439 if (!ACCUMULATE_OUTGOING_ARGS
)
4441 /* If the source is referenced relative to the stack pointer,
4442 copy it to another register to stabilize it. We do not need
4443 to do this if we know that we won't be changing sp. */
4445 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4446 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4447 temp
= copy_to_reg (temp
);
4450 target
= gen_rtx_MEM (BLKmode
, temp
);
4452 /* We do *not* set_mem_attributes here, because incoming arguments
4453 may overlap with sibling call outgoing arguments and we cannot
4454 allow reordering of reads from function arguments with stores
4455 to outgoing arguments of sibling calls. We do, however, want
4456 to record the alignment of the stack slot. */
4457 /* ALIGN may well be better aligned than TYPE, e.g. due to
4458 PARM_BOUNDARY. Assume the caller isn't lying. */
4459 set_mem_align (target
, align
);
4461 /* If part should go in registers and pushing to that part would
4462 overwrite some of the values that need to go into regs, load the
4463 overlapping values into temporary pseudos to be moved into the hard
4464 regs at the end after the stack pushing has completed.
4465 We cannot load them directly into the hard regs here because
4466 they can be clobbered by the block move expansions.
4469 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4470 && GET_CODE (reg
) != PARALLEL
)
4472 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4473 if (overlapping
> 0)
4475 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4476 overlapping
/= UNITS_PER_WORD
;
4478 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4480 for (int i
= 0; i
< overlapping
; i
++)
4481 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4483 for (int i
= 0; i
< overlapping
; i
++)
4484 emit_move_insn (tmp_regs
[i
],
4485 operand_subword_force (target
, i
, mode
));
4487 else if (overlapping
== -1)
4489 /* Could not determine whether there is overlap.
4490 Fail the sibcall. */
4498 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4501 else if (partial
> 0)
4503 /* Scalar partly in registers. */
4505 int size
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
;
4508 /* # bytes of start of argument
4509 that we must make space for but need not store. */
4510 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4511 int args_offset
= INTVAL (args_so_far
);
4514 /* Push padding now if padding above and stack grows down,
4515 or if padding below and stack grows up.
4516 But if space already allocated, this has already been done. */
4517 if (maybe_ne (extra
, 0)
4519 && where_pad
!= PAD_NONE
4520 && where_pad
!= stack_direction
)
4521 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4523 /* If we make space by pushing it, we might as well push
4524 the real data. Otherwise, we can leave OFFSET nonzero
4525 and leave the space uninitialized. */
4529 /* Now NOT_STACK gets the number of words that we don't need to
4530 allocate on the stack. Convert OFFSET to words too. */
4531 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4532 offset
/= UNITS_PER_WORD
;
4534 /* If the partial register-part of the arg counts in its stack size,
4535 skip the part of stack space corresponding to the registers.
4536 Otherwise, start copying to the beginning of the stack space,
4537 by setting SKIP to 0. */
4538 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4540 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4541 x
= validize_mem (force_const_mem (mode
, x
));
4543 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4544 SUBREGs of such registers are not allowed. */
4545 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4546 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4547 x
= copy_to_reg (x
);
4549 /* Loop over all the words allocated on the stack for this arg. */
4550 /* We can do it by words, because any scalar bigger than a word
4551 has a size a multiple of a word. */
4552 for (i
= size
- 1; i
>= not_stack
; i
--)
4553 if (i
>= not_stack
+ offset
)
4554 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4555 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4557 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4559 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4567 /* Push padding now if padding above and stack grows down,
4568 or if padding below and stack grows up.
4569 But if space already allocated, this has already been done. */
4570 if (maybe_ne (extra
, 0)
4572 && where_pad
!= PAD_NONE
4573 && where_pad
!= stack_direction
)
4574 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4576 #ifdef PUSH_ROUNDING
4577 if (args_addr
== 0 && PUSH_ARGS
)
4578 emit_single_push_insn (mode
, x
, type
);
4582 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4583 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4585 /* We do *not* set_mem_attributes here, because incoming arguments
4586 may overlap with sibling call outgoing arguments and we cannot
4587 allow reordering of reads from function arguments with stores
4588 to outgoing arguments of sibling calls. We do, however, want
4589 to record the alignment of the stack slot. */
4590 /* ALIGN may well be better aligned than TYPE, e.g. due to
4591 PARM_BOUNDARY. Assume the caller isn't lying. */
4592 set_mem_align (dest
, align
);
4594 emit_move_insn (dest
, x
);
4598 /* Move the partial arguments into the registers and any overlapping
4599 values that we moved into the pseudos in tmp_regs. */
4600 if (partial
> 0 && reg
!= 0)
4602 /* Handle calls that pass values in multiple non-contiguous locations.
4603 The Irix 6 ABI has examples of this. */
4604 if (GET_CODE (reg
) == PARALLEL
)
4605 emit_group_load (reg
, x
, type
, -1);
4608 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4609 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4611 for (int i
= 0; i
< overlapping
; i
++)
4612 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4613 + nregs
- overlapping
+ i
),
4619 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4620 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4622 if (alignment_pad
&& args_addr
== 0)
4623 anti_adjust_stack (alignment_pad
);
4628 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4632 get_subtarget (rtx x
)
4636 /* Only registers can be subtargets. */
4638 /* Don't use hard regs to avoid extending their life. */
4639 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4643 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4644 FIELD is a bitfield. Returns true if the optimization was successful,
4645 and there's nothing else to do. */
4648 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4649 poly_uint64 pbitpos
,
4650 poly_uint64 pbitregion_start
,
4651 poly_uint64 pbitregion_end
,
4652 machine_mode mode1
, rtx str_rtx
,
4653 tree to
, tree src
, bool reverse
)
4655 machine_mode str_mode
= GET_MODE (str_rtx
);
4656 unsigned int str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4661 enum tree_code code
;
4663 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4664 if (mode1
!= VOIDmode
4665 || !pbitsize
.is_constant (&bitsize
)
4666 || !pbitpos
.is_constant (&bitpos
)
4667 || !pbitregion_start
.is_constant (&bitregion_start
)
4668 || !pbitregion_end
.is_constant (&bitregion_end
)
4669 || bitsize
>= BITS_PER_WORD
4670 || str_bitsize
> BITS_PER_WORD
4671 || TREE_SIDE_EFFECTS (to
)
4672 || TREE_THIS_VOLATILE (to
))
4676 if (TREE_CODE (src
) != SSA_NAME
)
4678 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4681 srcstmt
= get_gimple_for_ssa_name (src
);
4683 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4686 code
= gimple_assign_rhs_code (srcstmt
);
4688 op0
= gimple_assign_rhs1 (srcstmt
);
4690 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4691 to find its initialization. Hopefully the initialization will
4692 be from a bitfield load. */
4693 if (TREE_CODE (op0
) == SSA_NAME
)
4695 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4697 /* We want to eventually have OP0 be the same as TO, which
4698 should be a bitfield. */
4700 || !is_gimple_assign (op0stmt
)
4701 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4703 op0
= gimple_assign_rhs1 (op0stmt
);
4706 op1
= gimple_assign_rhs2 (srcstmt
);
4708 if (!operand_equal_p (to
, op0
, 0))
4711 if (MEM_P (str_rtx
))
4713 unsigned HOST_WIDE_INT offset1
;
4715 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4716 str_bitsize
= BITS_PER_WORD
;
4718 scalar_int_mode best_mode
;
4719 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4720 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4722 str_mode
= best_mode
;
4723 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4726 bitpos
%= str_bitsize
;
4727 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4728 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4730 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4733 gcc_assert (!reverse
);
4735 /* If the bit field covers the whole REG/MEM, store_field
4736 will likely generate better code. */
4737 if (bitsize
>= str_bitsize
)
4740 /* We can't handle fields split across multiple entities. */
4741 if (bitpos
+ bitsize
> str_bitsize
)
4744 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4745 bitpos
= str_bitsize
- bitpos
- bitsize
;
4751 /* For now, just optimize the case of the topmost bitfield
4752 where we don't need to do any masking and also
4753 1 bit bitfields where xor can be used.
4754 We might win by one instruction for the other bitfields
4755 too if insv/extv instructions aren't used, so that
4756 can be added later. */
4757 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4758 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4761 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4762 value
= convert_modes (str_mode
,
4763 TYPE_MODE (TREE_TYPE (op1
)), value
,
4764 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4766 /* We may be accessing data outside the field, which means
4767 we can alias adjacent data. */
4768 if (MEM_P (str_rtx
))
4770 str_rtx
= shallow_copy_rtx (str_rtx
);
4771 set_mem_alias_set (str_rtx
, 0);
4772 set_mem_expr (str_rtx
, 0);
4775 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4777 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4781 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4783 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4785 value
= flip_storage_order (str_mode
, value
);
4786 result
= expand_binop (str_mode
, binop
, str_rtx
,
4787 value
, str_rtx
, 1, OPTAB_WIDEN
);
4788 if (result
!= str_rtx
)
4789 emit_move_insn (str_rtx
, result
);
4794 if (TREE_CODE (op1
) != INTEGER_CST
)
4796 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4797 value
= convert_modes (str_mode
,
4798 TYPE_MODE (TREE_TYPE (op1
)), value
,
4799 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4801 /* We may be accessing data outside the field, which means
4802 we can alias adjacent data. */
4803 if (MEM_P (str_rtx
))
4805 str_rtx
= shallow_copy_rtx (str_rtx
);
4806 set_mem_alias_set (str_rtx
, 0);
4807 set_mem_expr (str_rtx
, 0);
4810 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4811 if (bitpos
+ bitsize
!= str_bitsize
)
4813 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4815 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4817 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4819 value
= flip_storage_order (str_mode
, value
);
4820 result
= expand_binop (str_mode
, binop
, str_rtx
,
4821 value
, str_rtx
, 1, OPTAB_WIDEN
);
4822 if (result
!= str_rtx
)
4823 emit_move_insn (str_rtx
, result
);
4833 /* In the C++ memory model, consecutive bit fields in a structure are
4834 considered one memory location.
4836 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4837 returns the bit range of consecutive bits in which this COMPONENT_REF
4838 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4839 and *OFFSET may be adjusted in the process.
4841 If the access does not need to be restricted, 0 is returned in both
4842 *BITSTART and *BITEND. */
4845 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4846 poly_int64_pod
*bitpos
, tree
*offset
)
4848 poly_int64 bitoffset
;
4851 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4853 field
= TREE_OPERAND (exp
, 1);
4854 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4855 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4856 need to limit the range we can access. */
4859 *bitstart
= *bitend
= 0;
4863 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4864 part of a larger bit field, then the representative does not serve any
4865 useful purpose. This can occur in Ada. */
4866 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4869 poly_int64 rbitsize
, rbitpos
;
4871 int unsignedp
, reversep
, volatilep
= 0;
4872 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4873 &roffset
, &rmode
, &unsignedp
, &reversep
,
4875 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4877 *bitstart
= *bitend
= 0;
4882 /* Compute the adjustment to bitpos from the offset of the field
4883 relative to the representative. DECL_FIELD_OFFSET of field and
4884 repr are the same by construction if they are not constants,
4885 see finish_bitfield_layout. */
4886 poly_uint64 field_offset
, repr_offset
;
4887 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4888 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4889 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4892 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4893 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4895 /* If the adjustment is larger than bitpos, we would have a negative bit
4896 position for the lower bound and this may wreak havoc later. Adjust
4897 offset and bitpos to make the lower bound non-negative in that case. */
4898 if (maybe_gt (bitoffset
, *bitpos
))
4900 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4901 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4903 *bitpos
+= adjust_bits
;
4904 if (*offset
== NULL_TREE
)
4905 *offset
= size_int (-adjust_bytes
);
4907 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4911 *bitstart
= *bitpos
- bitoffset
;
4913 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4916 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4917 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4918 DECL_RTL was not set yet, return NORTL. */
4921 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4923 if (TREE_CODE (addr
) != ADDR_EXPR
)
4926 tree base
= TREE_OPERAND (addr
, 0);
4929 || TREE_ADDRESSABLE (base
)
4930 || DECL_MODE (base
) == BLKmode
)
4933 if (!DECL_RTL_SET_P (base
))
4936 return (!MEM_P (DECL_RTL (base
)));
4939 /* Returns true if the MEM_REF REF refers to an object that does not
4940 reside in memory and has non-BLKmode. */
4943 mem_ref_refers_to_non_mem_p (tree ref
)
4945 tree base
= TREE_OPERAND (ref
, 0);
4946 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4949 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4950 is true, try generating a nontemporal store. */
4953 expand_assignment (tree to
, tree from
, bool nontemporal
)
4959 enum insn_code icode
;
4961 /* Don't crash if the lhs of the assignment was erroneous. */
4962 if (TREE_CODE (to
) == ERROR_MARK
)
4964 expand_normal (from
);
4968 /* Optimize away no-op moves without side-effects. */
4969 if (operand_equal_p (to
, from
, 0))
4972 /* Handle misaligned stores. */
4973 mode
= TYPE_MODE (TREE_TYPE (to
));
4974 if ((TREE_CODE (to
) == MEM_REF
4975 || TREE_CODE (to
) == TARGET_MEM_REF
)
4977 && !mem_ref_refers_to_non_mem_p (to
)
4978 && ((align
= get_object_alignment (to
))
4979 < GET_MODE_ALIGNMENT (mode
))
4980 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4981 != CODE_FOR_nothing
)
4982 || targetm
.slow_unaligned_access (mode
, align
)))
4986 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4987 reg
= force_not_mem (reg
);
4988 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4989 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4990 reg
= flip_storage_order (mode
, reg
);
4992 if (icode
!= CODE_FOR_nothing
)
4994 struct expand_operand ops
[2];
4996 create_fixed_operand (&ops
[0], mem
);
4997 create_input_operand (&ops
[1], reg
, mode
);
4998 /* The movmisalign<mode> pattern cannot fail, else the assignment
4999 would silently be omitted. */
5000 expand_insn (icode
, 2, ops
);
5003 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5008 /* Assignment of a structure component needs special treatment
5009 if the structure component's rtx is not simply a MEM.
5010 Assignment of an array element at a constant index, and assignment of
5011 an array element in an unaligned packed structure field, has the same
5012 problem. Same for (partially) storing into a non-memory object. */
5013 if (handled_component_p (to
)
5014 || (TREE_CODE (to
) == MEM_REF
5015 && (REF_REVERSE_STORAGE_ORDER (to
)
5016 || mem_ref_refers_to_non_mem_p (to
)))
5017 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5020 poly_int64 bitsize
, bitpos
;
5021 poly_uint64 bitregion_start
= 0;
5022 poly_uint64 bitregion_end
= 0;
5024 int unsignedp
, reversep
, volatilep
= 0;
5028 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5029 &unsignedp
, &reversep
, &volatilep
);
5031 /* Make sure bitpos is not negative, it can wreak havoc later. */
5032 if (maybe_lt (bitpos
, 0))
5034 gcc_assert (offset
== NULL_TREE
);
5035 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5036 bitpos
= num_trailing_bits (bitpos
);
5039 if (TREE_CODE (to
) == COMPONENT_REF
5040 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5041 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5042 /* The C++ memory model naturally applies to byte-aligned fields.
5043 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5044 BITSIZE are not byte-aligned, there is no need to limit the range
5045 we can access. This can occur with packed structures in Ada. */
5046 else if (maybe_gt (bitsize
, 0)
5047 && multiple_p (bitsize
, BITS_PER_UNIT
)
5048 && multiple_p (bitpos
, BITS_PER_UNIT
))
5050 bitregion_start
= bitpos
;
5051 bitregion_end
= bitpos
+ bitsize
- 1;
5054 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5056 /* If the field has a mode, we want to access it in the
5057 field's mode, not the computed mode.
5058 If a MEM has VOIDmode (external with incomplete type),
5059 use BLKmode for it instead. */
5062 if (mode1
!= VOIDmode
)
5063 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5064 else if (GET_MODE (to_rtx
) == VOIDmode
)
5065 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5070 machine_mode address_mode
;
5073 if (!MEM_P (to_rtx
))
5075 /* We can get constant negative offsets into arrays with broken
5076 user code. Translate this to a trap instead of ICEing. */
5077 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5078 expand_builtin_trap ();
5079 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5082 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5083 address_mode
= get_address_mode (to_rtx
);
5084 if (GET_MODE (offset_rtx
) != address_mode
)
5086 /* We cannot be sure that the RTL in offset_rtx is valid outside
5087 of a memory address context, so force it into a register
5088 before attempting to convert it to the desired mode. */
5089 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5090 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5093 /* If we have an expression in OFFSET_RTX and a non-zero
5094 byte offset in BITPOS, adding the byte offset before the
5095 OFFSET_RTX results in better intermediate code, which makes
5096 later rtl optimization passes perform better.
5098 We prefer intermediate code like this:
5100 r124:DI=r123:DI+0x18
5105 r124:DI=r123:DI+0x10
5106 [r124:DI+0x8]=r121:DI
5108 This is only done for aligned data values, as these can
5109 be expected to result in single move instructions. */
5111 if (mode1
!= VOIDmode
5112 && maybe_ne (bitpos
, 0)
5113 && maybe_gt (bitsize
, 0)
5114 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5115 && multiple_p (bitpos
, bitsize
)
5116 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5117 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5119 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5120 bitregion_start
= 0;
5121 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5122 bitregion_end
-= bitpos
;
5126 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5127 highest_pow2_factor_for_target (to
,
5131 /* No action is needed if the target is not a memory and the field
5132 lies completely outside that target. This can occur if the source
5133 code contains an out-of-bounds access to a small array. */
5135 && GET_MODE (to_rtx
) != BLKmode
5136 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5138 expand_normal (from
);
5141 /* Handle expand_expr of a complex value returning a CONCAT. */
5142 else if (GET_CODE (to_rtx
) == CONCAT
)
5144 unsigned short mode_bitsize
= GET_MODE_BITSIZE (GET_MODE (to_rtx
));
5145 if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE (to_rtx
)
5146 && COMPLEX_MODE_P (GET_MODE (to_rtx
))
5147 && known_eq (bitpos
, 0)
5148 && known_eq (bitsize
, mode_bitsize
))
5149 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5150 else if (known_eq (bitsize
, mode_bitsize
/ 2)
5151 && (known_eq (bitpos
, 0)
5152 || known_eq (bitpos
, mode_bitsize
/ 2)))
5153 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5154 false, nontemporal
, reversep
);
5155 else if (known_le (bitpos
+ bitsize
, mode_bitsize
/ 2))
5156 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5157 bitregion_start
, bitregion_end
,
5158 mode1
, from
, get_alias_set (to
),
5159 nontemporal
, reversep
);
5160 else if (known_ge (bitpos
, mode_bitsize
/ 2))
5161 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5162 bitpos
- mode_bitsize
/ 2,
5163 bitregion_start
, bitregion_end
,
5164 mode1
, from
, get_alias_set (to
),
5165 nontemporal
, reversep
);
5166 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5168 result
= expand_normal (from
);
5169 if (GET_CODE (result
) == CONCAT
)
5171 machine_mode to_mode
= GET_MODE_INNER (GET_MODE (to_rtx
));
5172 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5174 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5177 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5179 if (!from_real
|| !from_imag
)
5180 goto concat_store_slow
;
5181 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5182 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5187 = simplify_gen_subreg (GET_MODE (to_rtx
), result
,
5188 TYPE_MODE (TREE_TYPE (from
)), 0);
5191 emit_move_insn (XEXP (to_rtx
, 0),
5192 read_complex_part (from_rtx
, false));
5193 emit_move_insn (XEXP (to_rtx
, 1),
5194 read_complex_part (from_rtx
, true));
5198 machine_mode to_mode
5199 = GET_MODE_INNER (GET_MODE (to_rtx
));
5201 = simplify_gen_subreg (to_mode
, result
,
5202 TYPE_MODE (TREE_TYPE (from
)),
5205 = simplify_gen_subreg (to_mode
, result
,
5206 TYPE_MODE (TREE_TYPE (from
)),
5207 GET_MODE_SIZE (to_mode
));
5208 if (!from_real
|| !from_imag
)
5209 goto concat_store_slow
;
5210 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5211 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5218 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5219 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5220 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5221 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5222 result
= store_field (temp
, bitsize
, bitpos
,
5223 bitregion_start
, bitregion_end
,
5224 mode1
, from
, get_alias_set (to
),
5225 nontemporal
, reversep
);
5226 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5227 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5234 /* If the field is at offset zero, we could have been given the
5235 DECL_RTX of the parent struct. Don't munge it. */
5236 to_rtx
= shallow_copy_rtx (to_rtx
);
5237 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5239 MEM_VOLATILE_P (to_rtx
) = 1;
5242 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5243 bitregion_start
, bitregion_end
,
5244 mode1
, to_rtx
, to
, from
,
5248 result
= store_field (to_rtx
, bitsize
, bitpos
,
5249 bitregion_start
, bitregion_end
,
5250 mode1
, from
, get_alias_set (to
),
5251 nontemporal
, reversep
);
5255 preserve_temp_slots (result
);
5260 /* If the rhs is a function call and its value is not an aggregate,
5261 call the function before we start to compute the lhs.
5262 This is needed for correct code for cases such as
5263 val = setjmp (buf) on machines where reference to val
5264 requires loading up part of an address in a separate insn.
5266 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5267 since it might be a promoted variable where the zero- or sign- extension
5268 needs to be done. Handling this in the normal way is safe because no
5269 computation is done before the call. The same is true for SSA names. */
5270 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5271 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5272 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5274 || TREE_CODE (to
) == PARM_DECL
5275 || TREE_CODE (to
) == RESULT_DECL
)
5276 && REG_P (DECL_RTL (to
)))
5277 || TREE_CODE (to
) == SSA_NAME
))
5283 value
= expand_normal (from
);
5285 /* Split value and bounds to store them separately. */
5286 chkp_split_slot (value
, &value
, &bounds
);
5289 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5291 /* Handle calls that return values in multiple non-contiguous locations.
5292 The Irix 6 ABI has examples of this. */
5293 if (GET_CODE (to_rtx
) == PARALLEL
)
5295 if (GET_CODE (value
) == PARALLEL
)
5296 emit_group_move (to_rtx
, value
);
5298 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5299 int_size_in_bytes (TREE_TYPE (from
)));
5301 else if (GET_CODE (value
) == PARALLEL
)
5302 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5303 int_size_in_bytes (TREE_TYPE (from
)));
5304 else if (GET_MODE (to_rtx
) == BLKmode
)
5306 /* Handle calls that return BLKmode values in registers. */
5308 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5310 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5314 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5315 value
= convert_memory_address_addr_space
5316 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5317 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5319 emit_move_insn (to_rtx
, value
);
5322 /* Store bounds if required. */
5324 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5326 gcc_assert (MEM_P (to_rtx
));
5327 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5330 preserve_temp_slots (to_rtx
);
5335 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5336 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5338 /* Don't move directly into a return register. */
5339 if (TREE_CODE (to
) == RESULT_DECL
5340 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5346 /* If the source is itself a return value, it still is in a pseudo at
5347 this point so we can move it back to the return register directly. */
5349 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5350 && TREE_CODE (from
) != CALL_EXPR
)
5351 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5353 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5355 /* Handle calls that return values in multiple non-contiguous locations.
5356 The Irix 6 ABI has examples of this. */
5357 if (GET_CODE (to_rtx
) == PARALLEL
)
5359 if (GET_CODE (temp
) == PARALLEL
)
5360 emit_group_move (to_rtx
, temp
);
5362 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5363 int_size_in_bytes (TREE_TYPE (from
)));
5366 emit_move_insn (to_rtx
, temp
);
5368 preserve_temp_slots (to_rtx
);
5373 /* In case we are returning the contents of an object which overlaps
5374 the place the value is being stored, use a safe function when copying
5375 a value through a pointer into a structure value return block. */
5376 if (TREE_CODE (to
) == RESULT_DECL
5377 && TREE_CODE (from
) == INDIRECT_REF
5378 && ADDR_SPACE_GENERIC_P
5379 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5380 && refs_may_alias_p (to
, from
)
5381 && cfun
->returns_struct
5382 && !cfun
->returns_pcc_struct
)
5387 size
= expr_size (from
);
5388 from_rtx
= expand_normal (from
);
5390 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5392 preserve_temp_slots (to_rtx
);
5397 /* Compute FROM and store the value in the rtx we got. */
5400 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5401 preserve_temp_slots (result
);
5406 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5407 succeeded, false otherwise. */
5410 emit_storent_insn (rtx to
, rtx from
)
5412 struct expand_operand ops
[2];
5413 machine_mode mode
= GET_MODE (to
);
5414 enum insn_code code
= optab_handler (storent_optab
, mode
);
5416 if (code
== CODE_FOR_nothing
)
5419 create_fixed_operand (&ops
[0], to
);
5420 create_input_operand (&ops
[1], from
, mode
);
5421 return maybe_expand_insn (code
, 2, ops
);
5424 /* Generate code for computing expression EXP,
5425 and storing the value into TARGET.
5427 If the mode is BLKmode then we may return TARGET itself.
5428 It turns out that in BLKmode it doesn't cause a problem.
5429 because C has no operators that could combine two different
5430 assignments into the same BLKmode object with different values
5431 with no sequence point. Will other languages need this to
5434 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5435 stack, and block moves may need to be treated specially.
5437 If NONTEMPORAL is true, try using a nontemporal store instruction.
5439 If REVERSE is true, the store is to be done in reverse order.
5441 If BTARGET is not NULL then computed bounds of EXP are
5442 associated with BTARGET. */
5445 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5446 bool nontemporal
, bool reverse
, tree btarget
)
5449 rtx alt_rtl
= NULL_RTX
;
5450 location_t loc
= curr_insn_location ();
5452 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5454 /* C++ can generate ?: expressions with a throw expression in one
5455 branch and an rvalue in the other. Here, we resolve attempts to
5456 store the throw expression's nonexistent result. */
5457 gcc_assert (!call_param_p
);
5458 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5461 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5463 /* Perform first part of compound expression, then assign from second
5465 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5466 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5467 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5468 call_param_p
, nontemporal
, reverse
,
5471 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5473 /* For conditional expression, get safe form of the target. Then
5474 test the condition, doing the appropriate assignment on either
5475 side. This avoids the creation of unnecessary temporaries.
5476 For non-BLKmode, it is more efficient not to do this. */
5478 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5480 do_pending_stack_adjust ();
5482 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5483 profile_probability::uninitialized ());
5484 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5485 nontemporal
, reverse
, btarget
);
5486 emit_jump_insn (targetm
.gen_jump (lab2
));
5489 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5490 nontemporal
, reverse
, btarget
);
5496 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5497 /* If this is a scalar in a register that is stored in a wider mode
5498 than the declared mode, compute the result into its declared mode
5499 and then convert to the wider mode. Our value is the computed
5502 rtx inner_target
= 0;
5503 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5504 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5506 /* We can do the conversion inside EXP, which will often result
5507 in some optimizations. Do the conversion in two steps: first
5508 change the signedness, if needed, then the extend. But don't
5509 do this if the type of EXP is a subtype of something else
5510 since then the conversion might involve more than just
5511 converting modes. */
5512 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5513 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5514 && GET_MODE_PRECISION (outer_mode
)
5515 == TYPE_PRECISION (TREE_TYPE (exp
)))
5517 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5518 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5520 /* Some types, e.g. Fortran's logical*4, won't have a signed
5521 version, so use the mode instead. */
5523 = (signed_or_unsigned_type_for
5524 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5526 ntype
= lang_hooks
.types
.type_for_mode
5527 (TYPE_MODE (TREE_TYPE (exp
)),
5528 SUBREG_PROMOTED_SIGN (target
));
5530 exp
= fold_convert_loc (loc
, ntype
, exp
);
5533 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5534 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5537 inner_target
= SUBREG_REG (target
);
5540 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5541 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5543 /* Handle bounds returned by call. */
5544 if (TREE_CODE (exp
) == CALL_EXPR
)
5547 chkp_split_slot (temp
, &temp
, &bounds
);
5548 if (bounds
&& btarget
)
5550 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5551 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5552 chkp_set_rtl_bounds (btarget
, tmp
);
5556 /* If TEMP is a VOIDmode constant, use convert_modes to make
5557 sure that we properly convert it. */
5558 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5560 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5561 temp
, SUBREG_PROMOTED_SIGN (target
));
5562 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5563 SUBREG_PROMOTED_SIGN (target
));
5566 convert_move (SUBREG_REG (target
), temp
,
5567 SUBREG_PROMOTED_SIGN (target
));
5571 else if ((TREE_CODE (exp
) == STRING_CST
5572 || (TREE_CODE (exp
) == MEM_REF
5573 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5574 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5576 && integer_zerop (TREE_OPERAND (exp
, 1))))
5577 && !nontemporal
&& !call_param_p
5580 /* Optimize initialization of an array with a STRING_CST. */
5581 HOST_WIDE_INT exp_len
, str_copy_len
;
5583 tree str
= TREE_CODE (exp
) == STRING_CST
5584 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5586 exp_len
= int_expr_size (exp
);
5590 if (TREE_STRING_LENGTH (str
) <= 0)
5593 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5594 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5597 str_copy_len
= TREE_STRING_LENGTH (str
);
5598 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5599 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5601 str_copy_len
+= STORE_MAX_PIECES
- 1;
5602 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5604 str_copy_len
= MIN (str_copy_len
, exp_len
);
5605 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5606 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5607 MEM_ALIGN (target
), false))
5612 dest_mem
= store_by_pieces (dest_mem
,
5613 str_copy_len
, builtin_strncpy_read_str
,
5615 TREE_STRING_POINTER (str
)),
5616 MEM_ALIGN (target
), false,
5617 exp_len
> str_copy_len
? 1 : 0);
5618 if (exp_len
> str_copy_len
)
5619 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5620 GEN_INT (exp_len
- str_copy_len
),
5629 /* If we want to use a nontemporal or a reverse order store, force the
5630 value into a register first. */
5631 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5632 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5634 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5637 /* Handle bounds returned by call. */
5638 if (TREE_CODE (exp
) == CALL_EXPR
)
5641 chkp_split_slot (temp
, &temp
, &bounds
);
5642 if (bounds
&& btarget
)
5644 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5645 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5646 chkp_set_rtl_bounds (btarget
, tmp
);
5651 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5652 the same as that of TARGET, adjust the constant. This is needed, for
5653 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5654 only a word-sized value. */
5655 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5656 && TREE_CODE (exp
) != ERROR_MARK
5657 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5659 if (GET_MODE_CLASS (GET_MODE (target
))
5660 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5661 && GET_MODE_BITSIZE (GET_MODE (target
))
5662 == GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
))))
5664 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5665 TYPE_MODE (TREE_TYPE (exp
)), 0);
5669 if (GET_MODE (temp
) == VOIDmode
)
5670 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5671 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5674 /* If value was not generated in the target, store it there.
5675 Convert the value to TARGET's type first if necessary and emit the
5676 pending incrementations that have been queued when expanding EXP.
5677 Note that we cannot emit the whole queue blindly because this will
5678 effectively disable the POST_INC optimization later.
5680 If TEMP and TARGET compare equal according to rtx_equal_p, but
5681 one or both of them are volatile memory refs, we have to distinguish
5683 - expand_expr has used TARGET. In this case, we must not generate
5684 another copy. This can be detected by TARGET being equal according
5686 - expand_expr has not used TARGET - that means that the source just
5687 happens to have the same RTX form. Since temp will have been created
5688 by expand_expr, it will compare unequal according to == .
5689 We must generate a copy in this case, to reach the correct number
5690 of volatile memory references. */
5692 if ((! rtx_equal_p (temp
, target
)
5693 || (temp
!= target
&& (side_effects_p (temp
)
5694 || side_effects_p (target
))))
5695 && TREE_CODE (exp
) != ERROR_MARK
5696 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5697 but TARGET is not valid memory reference, TEMP will differ
5698 from TARGET although it is really the same location. */
5700 && rtx_equal_p (alt_rtl
, target
)
5701 && !side_effects_p (alt_rtl
)
5702 && !side_effects_p (target
))
5703 /* If there's nothing to copy, don't bother. Don't call
5704 expr_size unless necessary, because some front-ends (C++)
5705 expr_size-hook must not be given objects that are not
5706 supposed to be bit-copied or bit-initialized. */
5707 && expr_size (exp
) != const0_rtx
)
5709 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5711 if (GET_MODE (target
) == BLKmode
)
5713 /* Handle calls that return BLKmode values in registers. */
5714 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5715 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5717 store_bit_field (target
,
5718 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5719 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5722 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5725 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5727 /* Handle copying a string constant into an array. The string
5728 constant may be shorter than the array. So copy just the string's
5729 actual length, and clear the rest. First get the size of the data
5730 type of the string, which is actually the size of the target. */
5731 rtx size
= expr_size (exp
);
5733 if (CONST_INT_P (size
)
5734 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5735 emit_block_move (target
, temp
, size
,
5737 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5740 machine_mode pointer_mode
5741 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5742 machine_mode address_mode
= get_address_mode (target
);
5744 /* Compute the size of the data to copy from the string. */
5746 = size_binop_loc (loc
, MIN_EXPR
,
5747 make_tree (sizetype
, size
),
5748 size_int (TREE_STRING_LENGTH (exp
)));
5750 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5752 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5753 rtx_code_label
*label
= 0;
5755 /* Copy that much. */
5756 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5757 TYPE_UNSIGNED (sizetype
));
5758 emit_block_move (target
, temp
, copy_size_rtx
,
5760 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5762 /* Figure out how much is left in TARGET that we have to clear.
5763 Do all calculations in pointer_mode. */
5764 if (CONST_INT_P (copy_size_rtx
))
5766 size
= plus_constant (address_mode
, size
,
5767 -INTVAL (copy_size_rtx
));
5768 target
= adjust_address (target
, BLKmode
,
5769 INTVAL (copy_size_rtx
));
5773 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5774 copy_size_rtx
, NULL_RTX
, 0,
5777 if (GET_MODE (copy_size_rtx
) != address_mode
)
5778 copy_size_rtx
= convert_to_mode (address_mode
,
5780 TYPE_UNSIGNED (sizetype
));
5782 target
= offset_address (target
, copy_size_rtx
,
5783 highest_pow2_factor (copy_size
));
5784 label
= gen_label_rtx ();
5785 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5786 GET_MODE (size
), 0, label
);
5789 if (size
!= const0_rtx
)
5790 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5796 /* Handle calls that return values in multiple non-contiguous locations.
5797 The Irix 6 ABI has examples of this. */
5798 else if (GET_CODE (target
) == PARALLEL
)
5800 if (GET_CODE (temp
) == PARALLEL
)
5801 emit_group_move (target
, temp
);
5803 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5804 int_size_in_bytes (TREE_TYPE (exp
)));
5806 else if (GET_CODE (temp
) == PARALLEL
)
5807 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5808 int_size_in_bytes (TREE_TYPE (exp
)));
5809 else if (GET_MODE (temp
) == BLKmode
)
5810 emit_block_move (target
, temp
, expr_size (exp
),
5812 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5813 /* If we emit a nontemporal store, there is nothing else to do. */
5814 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5819 temp
= flip_storage_order (GET_MODE (target
), temp
);
5820 temp
= force_operand (temp
, target
);
5822 emit_move_insn (target
, temp
);
5829 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5831 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5834 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5838 /* Return true if field F of structure TYPE is a flexible array. */
5841 flexible_array_member_p (const_tree f
, const_tree type
)
5846 return (DECL_CHAIN (f
) == NULL
5847 && TREE_CODE (tf
) == ARRAY_TYPE
5849 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5850 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5851 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5852 && int_size_in_bytes (type
) >= 0);
5855 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5856 must have in order for it to completely initialize a value of type TYPE.
5857 Return -1 if the number isn't known.
5859 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5861 static HOST_WIDE_INT
5862 count_type_elements (const_tree type
, bool for_ctor_p
)
5864 switch (TREE_CODE (type
))
5870 nelts
= array_type_nelts (type
);
5871 if (nelts
&& tree_fits_uhwi_p (nelts
))
5873 unsigned HOST_WIDE_INT n
;
5875 n
= tree_to_uhwi (nelts
) + 1;
5876 if (n
== 0 || for_ctor_p
)
5879 return n
* count_type_elements (TREE_TYPE (type
), false);
5881 return for_ctor_p
? -1 : 1;
5886 unsigned HOST_WIDE_INT n
;
5890 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5891 if (TREE_CODE (f
) == FIELD_DECL
)
5894 n
+= count_type_elements (TREE_TYPE (f
), false);
5895 else if (!flexible_array_member_p (f
, type
))
5896 /* Don't count flexible arrays, which are not supposed
5897 to be initialized. */
5905 case QUAL_UNION_TYPE
:
5910 gcc_assert (!for_ctor_p
);
5911 /* Estimate the number of scalars in each field and pick the
5912 maximum. Other estimates would do instead; the idea is simply
5913 to make sure that the estimate is not sensitive to the ordering
5916 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5917 if (TREE_CODE (f
) == FIELD_DECL
)
5919 m
= count_type_elements (TREE_TYPE (f
), false);
5920 /* If the field doesn't span the whole union, add an extra
5921 scalar for the rest. */
5922 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5923 TYPE_SIZE (type
)) != 1)
5935 return TYPE_VECTOR_SUBPARTS (type
);
5939 case FIXED_POINT_TYPE
:
5944 case REFERENCE_TYPE
:
5960 /* Helper for categorize_ctor_elements. Identical interface. */
5963 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5964 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5966 unsigned HOST_WIDE_INT idx
;
5967 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5968 tree value
, purpose
, elt_type
;
5970 /* Whether CTOR is a valid constant initializer, in accordance with what
5971 initializer_constant_valid_p does. If inferred from the constructor
5972 elements, true until proven otherwise. */
5973 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5974 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5979 elt_type
= NULL_TREE
;
5981 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5983 HOST_WIDE_INT mult
= 1;
5985 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5987 tree lo_index
= TREE_OPERAND (purpose
, 0);
5988 tree hi_index
= TREE_OPERAND (purpose
, 1);
5990 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5991 mult
= (tree_to_uhwi (hi_index
)
5992 - tree_to_uhwi (lo_index
) + 1);
5995 elt_type
= TREE_TYPE (value
);
5997 switch (TREE_CODE (value
))
6001 HOST_WIDE_INT nz
= 0, ic
= 0;
6003 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
6006 nz_elts
+= mult
* nz
;
6007 init_elts
+= mult
* ic
;
6009 if (const_from_elts_p
&& const_p
)
6010 const_p
= const_elt_p
;
6017 if (!initializer_zerop (value
))
6023 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6024 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6028 if (!initializer_zerop (TREE_REALPART (value
)))
6030 if (!initializer_zerop (TREE_IMAGPART (value
)))
6038 for (i
= 0; i
< VECTOR_CST_NELTS (value
); ++i
)
6040 tree v
= VECTOR_CST_ELT (value
, i
);
6041 if (!initializer_zerop (v
))
6050 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6051 nz_elts
+= mult
* tc
;
6052 init_elts
+= mult
* tc
;
6054 if (const_from_elts_p
&& const_p
)
6056 = initializer_constant_valid_p (value
,
6058 TYPE_REVERSE_STORAGE_ORDER
6066 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6067 num_fields
, elt_type
))
6068 *p_complete
= false;
6070 *p_nz_elts
+= nz_elts
;
6071 *p_init_elts
+= init_elts
;
6076 /* Examine CTOR to discover:
6077 * how many scalar fields are set to nonzero values,
6078 and place it in *P_NZ_ELTS;
6079 * how many scalar fields in total are in CTOR,
6080 and place it in *P_ELT_COUNT.
6081 * whether the constructor is complete -- in the sense that every
6082 meaningful byte is explicitly given a value --
6083 and place it in *P_COMPLETE.
6085 Return whether or not CTOR is a valid static constant initializer, the same
6086 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6089 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6090 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6096 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6099 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6100 of which had type LAST_TYPE. Each element was itself a complete
6101 initializer, in the sense that every meaningful byte was explicitly
6102 given a value. Return true if the same is true for the constructor
6106 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6107 const_tree last_type
)
6109 if (TREE_CODE (type
) == UNION_TYPE
6110 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6115 gcc_assert (num_elts
== 1 && last_type
);
6117 /* ??? We could look at each element of the union, and find the
6118 largest element. Which would avoid comparing the size of the
6119 initialized element against any tail padding in the union.
6120 Doesn't seem worth the effort... */
6121 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6124 return count_type_elements (type
, true) == num_elts
;
6127 /* Return 1 if EXP contains mostly (3/4) zeros. */
6130 mostly_zeros_p (const_tree exp
)
6132 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6134 HOST_WIDE_INT nz_elts
, init_elts
;
6137 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6138 return !complete_p
|| nz_elts
< init_elts
/ 4;
6141 return initializer_zerop (exp
);
6144 /* Return 1 if EXP contains all zeros. */
6147 all_zeros_p (const_tree exp
)
6149 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6151 HOST_WIDE_INT nz_elts
, init_elts
;
6154 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6155 return nz_elts
== 0;
6158 return initializer_zerop (exp
);
6161 /* Helper function for store_constructor.
6162 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6163 CLEARED is as for store_constructor.
6164 ALIAS_SET is the alias set to use for any stores.
6165 If REVERSE is true, the store is to be done in reverse order.
6167 This provides a recursive shortcut back to store_constructor when it isn't
6168 necessary to go through store_field. This is so that we can pass through
6169 the cleared field to let store_constructor know that we may not have to
6170 clear a substructure if the outer structure has already been cleared. */
6173 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6174 poly_uint64 bitregion_start
,
6175 poly_uint64 bitregion_end
,
6177 tree exp
, int cleared
,
6178 alias_set_type alias_set
, bool reverse
)
6181 poly_uint64 bytesize
;
6182 if (TREE_CODE (exp
) == CONSTRUCTOR
6183 /* We can only call store_constructor recursively if the size and
6184 bit position are on a byte boundary. */
6185 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6186 && maybe_ne (bitsize
, 0U)
6187 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6188 /* If we have a nonzero bitpos for a register target, then we just
6189 let store_field do the bitfield handling. This is unlikely to
6190 generate unnecessary clear instructions anyways. */
6191 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6195 machine_mode target_mode
= GET_MODE (target
);
6196 if (target_mode
!= BLKmode
6197 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6198 target_mode
= BLKmode
;
6199 target
= adjust_address (target
, target_mode
, bytepos
);
6203 /* Update the alias set, if required. */
6204 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6205 && MEM_ALIAS_SET (target
) != 0)
6207 target
= copy_rtx (target
);
6208 set_mem_alias_set (target
, alias_set
);
6211 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6214 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6215 exp
, alias_set
, false, reverse
);
6219 /* Returns the number of FIELD_DECLs in TYPE. */
6222 fields_length (const_tree type
)
6224 tree t
= TYPE_FIELDS (type
);
6227 for (; t
; t
= DECL_CHAIN (t
))
6228 if (TREE_CODE (t
) == FIELD_DECL
)
6235 /* Store the value of constructor EXP into the rtx TARGET.
6236 TARGET is either a REG or a MEM; we know it cannot conflict, since
6237 safe_from_p has been called.
6238 CLEARED is true if TARGET is known to have been zero'd.
6239 SIZE is the number of bytes of TARGET we are allowed to modify: this
6240 may not be the same as the size of EXP if we are assigning to a field
6241 which has been packed to exclude padding bits.
6242 If REVERSE is true, the store is to be done in reverse order. */
6245 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6248 tree type
= TREE_TYPE (exp
);
6249 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6250 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6252 switch (TREE_CODE (type
))
6256 case QUAL_UNION_TYPE
:
6258 unsigned HOST_WIDE_INT idx
;
6261 /* The storage order is specified for every aggregate type. */
6262 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6264 /* If size is zero or the target is already cleared, do nothing. */
6265 if (known_eq (size
, 0) || cleared
)
6267 /* We either clear the aggregate or indicate the value is dead. */
6268 else if ((TREE_CODE (type
) == UNION_TYPE
6269 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6270 && ! CONSTRUCTOR_ELTS (exp
))
6271 /* If the constructor is empty, clear the union. */
6273 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6277 /* If we are building a static constructor into a register,
6278 set the initial value as zero so we can fold the value into
6279 a constant. But if more than one register is involved,
6280 this probably loses. */
6281 else if (REG_P (target
) && TREE_STATIC (exp
)
6282 && (GET_MODE_SIZE (GET_MODE (target
))
6283 <= REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6285 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6289 /* If the constructor has fewer fields than the structure or
6290 if we are initializing the structure to mostly zeros, clear
6291 the whole structure first. Don't do this if TARGET is a
6292 register whose mode size isn't equal to SIZE since
6293 clear_storage can't handle this case. */
6294 else if (known_size_p (size
)
6295 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6296 || mostly_zeros_p (exp
))
6298 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6300 clear_storage (target
, gen_int_mode (size
, Pmode
),
6305 if (REG_P (target
) && !cleared
)
6306 emit_clobber (target
);
6308 /* Store each element of the constructor into the
6309 corresponding field of TARGET. */
6310 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6313 HOST_WIDE_INT bitsize
;
6314 HOST_WIDE_INT bitpos
= 0;
6316 rtx to_rtx
= target
;
6318 /* Just ignore missing fields. We cleared the whole
6319 structure, above, if any fields are missing. */
6323 if (cleared
&& initializer_zerop (value
))
6326 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6327 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6331 mode
= DECL_MODE (field
);
6332 if (DECL_BIT_FIELD (field
))
6335 offset
= DECL_FIELD_OFFSET (field
);
6336 if (tree_fits_shwi_p (offset
)
6337 && tree_fits_shwi_p (bit_position (field
)))
6339 bitpos
= int_bit_position (field
);
6345 /* If this initializes a field that is smaller than a
6346 word, at the start of a word, try to widen it to a full
6347 word. This special case allows us to output C++ member
6348 function initializations in a form that the optimizers
6350 if (WORD_REGISTER_OPERATIONS
6352 && bitsize
< BITS_PER_WORD
6353 && bitpos
% BITS_PER_WORD
== 0
6354 && GET_MODE_CLASS (mode
) == MODE_INT
6355 && TREE_CODE (value
) == INTEGER_CST
6357 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6359 tree type
= TREE_TYPE (value
);
6361 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6363 type
= lang_hooks
.types
.type_for_mode
6364 (word_mode
, TYPE_UNSIGNED (type
));
6365 value
= fold_convert (type
, value
);
6366 /* Make sure the bits beyond the original bitsize are zero
6367 so that we can correctly avoid extra zeroing stores in
6368 later constructor elements. */
6370 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6372 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6375 if (BYTES_BIG_ENDIAN
)
6377 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6378 build_int_cst (type
,
6379 BITS_PER_WORD
- bitsize
));
6380 bitsize
= BITS_PER_WORD
;
6384 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6385 && DECL_NONADDRESSABLE_P (field
))
6387 to_rtx
= copy_rtx (to_rtx
);
6388 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6391 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6392 0, bitregion_end
, mode
,
6394 get_alias_set (TREE_TYPE (field
)),
6402 unsigned HOST_WIDE_INT i
;
6405 tree elttype
= TREE_TYPE (type
);
6407 HOST_WIDE_INT minelt
= 0;
6408 HOST_WIDE_INT maxelt
= 0;
6410 /* The storage order is specified for every aggregate type. */
6411 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6413 domain
= TYPE_DOMAIN (type
);
6414 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6415 && TYPE_MAX_VALUE (domain
)
6416 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6417 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6419 /* If we have constant bounds for the range of the type, get them. */
6422 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6423 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6426 /* If the constructor has fewer elements than the array, clear
6427 the whole array first. Similarly if this is static
6428 constructor of a non-BLKmode object. */
6431 else if (REG_P (target
) && TREE_STATIC (exp
))
6435 unsigned HOST_WIDE_INT idx
;
6437 HOST_WIDE_INT count
= 0, zero_count
= 0;
6438 need_to_clear
= ! const_bounds_p
;
6440 /* This loop is a more accurate version of the loop in
6441 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6442 is also needed to check for missing elements. */
6443 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6445 HOST_WIDE_INT this_node_count
;
6450 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6452 tree lo_index
= TREE_OPERAND (index
, 0);
6453 tree hi_index
= TREE_OPERAND (index
, 1);
6455 if (! tree_fits_uhwi_p (lo_index
)
6456 || ! tree_fits_uhwi_p (hi_index
))
6462 this_node_count
= (tree_to_uhwi (hi_index
)
6463 - tree_to_uhwi (lo_index
) + 1);
6466 this_node_count
= 1;
6468 count
+= this_node_count
;
6469 if (mostly_zeros_p (value
))
6470 zero_count
+= this_node_count
;
6473 /* Clear the entire array first if there are any missing
6474 elements, or if the incidence of zero elements is >=
6477 && (count
< maxelt
- minelt
+ 1
6478 || 4 * zero_count
>= 3 * count
))
6482 if (need_to_clear
&& maybe_gt (size
, 0))
6485 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6487 clear_storage (target
, gen_int_mode (size
, Pmode
),
6492 if (!cleared
&& REG_P (target
))
6493 /* Inform later passes that the old value is dead. */
6494 emit_clobber (target
);
6496 /* Store each element of the constructor into the
6497 corresponding element of TARGET, determined by counting the
6499 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6503 HOST_WIDE_INT bitpos
;
6504 rtx xtarget
= target
;
6506 if (cleared
&& initializer_zerop (value
))
6509 mode
= TYPE_MODE (elttype
);
6510 if (mode
== BLKmode
)
6511 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6512 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6515 bitsize
= GET_MODE_BITSIZE (mode
);
6517 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6519 tree lo_index
= TREE_OPERAND (index
, 0);
6520 tree hi_index
= TREE_OPERAND (index
, 1);
6521 rtx index_r
, pos_rtx
;
6522 HOST_WIDE_INT lo
, hi
, count
;
6525 /* If the range is constant and "small", unroll the loop. */
6527 && tree_fits_shwi_p (lo_index
)
6528 && tree_fits_shwi_p (hi_index
)
6529 && (lo
= tree_to_shwi (lo_index
),
6530 hi
= tree_to_shwi (hi_index
),
6531 count
= hi
- lo
+ 1,
6534 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6535 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6538 lo
-= minelt
; hi
-= minelt
;
6539 for (; lo
<= hi
; lo
++)
6541 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6544 && !MEM_KEEP_ALIAS_SET_P (target
)
6545 && TREE_CODE (type
) == ARRAY_TYPE
6546 && TYPE_NONALIASED_COMPONENT (type
))
6548 target
= copy_rtx (target
);
6549 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6552 store_constructor_field
6553 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6554 mode
, value
, cleared
,
6555 get_alias_set (elttype
), reverse
);
6560 rtx_code_label
*loop_start
= gen_label_rtx ();
6561 rtx_code_label
*loop_end
= gen_label_rtx ();
6564 expand_normal (hi_index
);
6566 index
= build_decl (EXPR_LOCATION (exp
),
6567 VAR_DECL
, NULL_TREE
, domain
);
6568 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6569 SET_DECL_RTL (index
, index_r
);
6570 store_expr (lo_index
, index_r
, 0, false, reverse
);
6572 /* Build the head of the loop. */
6573 do_pending_stack_adjust ();
6574 emit_label (loop_start
);
6576 /* Assign value to element index. */
6578 fold_convert (ssizetype
,
6579 fold_build2 (MINUS_EXPR
,
6582 TYPE_MIN_VALUE (domain
)));
6585 size_binop (MULT_EXPR
, position
,
6586 fold_convert (ssizetype
,
6587 TYPE_SIZE_UNIT (elttype
)));
6589 pos_rtx
= expand_normal (position
);
6590 xtarget
= offset_address (target
, pos_rtx
,
6591 highest_pow2_factor (position
));
6592 xtarget
= adjust_address (xtarget
, mode
, 0);
6593 if (TREE_CODE (value
) == CONSTRUCTOR
)
6594 store_constructor (value
, xtarget
, cleared
,
6595 exact_div (bitsize
, BITS_PER_UNIT
),
6598 store_expr (value
, xtarget
, 0, false, reverse
);
6600 /* Generate a conditional jump to exit the loop. */
6601 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6603 jumpif (exit_cond
, loop_end
,
6604 profile_probability::uninitialized ());
6606 /* Update the loop counter, and jump to the head of
6608 expand_assignment (index
,
6609 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6610 index
, integer_one_node
),
6613 emit_jump (loop_start
);
6615 /* Build the end of the loop. */
6616 emit_label (loop_end
);
6619 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6620 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6625 index
= ssize_int (1);
6628 index
= fold_convert (ssizetype
,
6629 fold_build2 (MINUS_EXPR
,
6632 TYPE_MIN_VALUE (domain
)));
6635 size_binop (MULT_EXPR
, index
,
6636 fold_convert (ssizetype
,
6637 TYPE_SIZE_UNIT (elttype
)));
6638 xtarget
= offset_address (target
,
6639 expand_normal (position
),
6640 highest_pow2_factor (position
));
6641 xtarget
= adjust_address (xtarget
, mode
, 0);
6642 store_expr (value
, xtarget
, 0, false, reverse
);
6647 bitpos
= ((tree_to_shwi (index
) - minelt
)
6648 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6650 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6652 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6653 && TREE_CODE (type
) == ARRAY_TYPE
6654 && TYPE_NONALIASED_COMPONENT (type
))
6656 target
= copy_rtx (target
);
6657 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6659 store_constructor_field (target
, bitsize
, bitpos
, 0,
6660 bitregion_end
, mode
, value
,
6661 cleared
, get_alias_set (elttype
),
6670 unsigned HOST_WIDE_INT idx
;
6671 constructor_elt
*ce
;
6674 insn_code icode
= CODE_FOR_nothing
;
6676 tree elttype
= TREE_TYPE (type
);
6677 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6678 machine_mode eltmode
= TYPE_MODE (elttype
);
6679 HOST_WIDE_INT bitsize
;
6680 HOST_WIDE_INT bitpos
;
6681 rtvec vector
= NULL
;
6683 alias_set_type alias
;
6684 bool vec_vec_init_p
= false;
6685 machine_mode mode
= GET_MODE (target
);
6687 gcc_assert (eltmode
!= BLKmode
);
6689 /* Try using vec_duplicate_optab for uniform vectors. */
6690 if (!TREE_SIDE_EFFECTS (exp
)
6691 && VECTOR_MODE_P (mode
)
6692 && eltmode
== GET_MODE_INNER (mode
)
6693 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6694 != CODE_FOR_nothing
)
6695 && (elt
= uniform_vector_p (exp
)))
6697 struct expand_operand ops
[2];
6698 create_output_operand (&ops
[0], target
, mode
);
6699 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6700 expand_insn (icode
, 2, ops
);
6701 if (!rtx_equal_p (target
, ops
[0].value
))
6702 emit_move_insn (target
, ops
[0].value
);
6706 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6707 if (REG_P (target
) && VECTOR_MODE_P (mode
))
6709 machine_mode emode
= eltmode
;
6711 if (CONSTRUCTOR_NELTS (exp
)
6712 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6715 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6716 gcc_assert (CONSTRUCTOR_NELTS (exp
) * TYPE_VECTOR_SUBPARTS (etype
)
6718 emode
= TYPE_MODE (etype
);
6720 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6721 if (icode
!= CODE_FOR_nothing
)
6723 unsigned int i
, n
= n_elts
;
6725 if (emode
!= eltmode
)
6727 n
= CONSTRUCTOR_NELTS (exp
);
6728 vec_vec_init_p
= true;
6730 vector
= rtvec_alloc (n
);
6731 for (i
= 0; i
< n
; i
++)
6732 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6736 /* If the constructor has fewer elements than the vector,
6737 clear the whole array first. Similarly if this is static
6738 constructor of a non-BLKmode object. */
6741 else if (REG_P (target
) && TREE_STATIC (exp
))
6745 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6748 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6750 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6752 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6753 TYPE_SIZE (elttype
)));
6755 count
+= n_elts_here
;
6756 if (mostly_zeros_p (value
))
6757 zero_count
+= n_elts_here
;
6760 /* Clear the entire vector first if there are any missing elements,
6761 or if the incidence of zero elements is >= 75%. */
6762 need_to_clear
= (count
< n_elts
|| 4 * zero_count
>= 3 * count
);
6765 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6768 emit_move_insn (target
, CONST0_RTX (mode
));
6770 clear_storage (target
, gen_int_mode (size
, Pmode
),
6775 /* Inform later passes that the old value is dead. */
6776 if (!cleared
&& !vector
&& REG_P (target
))
6777 emit_move_insn (target
, CONST0_RTX (mode
));
6780 alias
= MEM_ALIAS_SET (target
);
6782 alias
= get_alias_set (elttype
);
6784 /* Store each element of the constructor into the corresponding
6785 element of TARGET, determined by counting the elements. */
6786 for (idx
= 0, i
= 0;
6787 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6788 idx
++, i
+= bitsize
/ elt_size
)
6790 HOST_WIDE_INT eltpos
;
6791 tree value
= ce
->value
;
6793 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6794 if (cleared
&& initializer_zerop (value
))
6798 eltpos
= tree_to_uhwi (ce
->index
);
6806 gcc_assert (ce
->index
== NULL_TREE
);
6807 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6811 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6812 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6816 machine_mode value_mode
6817 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6818 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6819 bitpos
= eltpos
* elt_size
;
6820 store_constructor_field (target
, bitsize
, bitpos
, 0,
6821 bitregion_end
, value_mode
,
6822 value
, cleared
, alias
, reverse
);
6827 emit_insn (GEN_FCN (icode
) (target
,
6828 gen_rtx_PARALLEL (mode
, vector
)));
6837 /* Store the value of EXP (an expression tree)
6838 into a subfield of TARGET which has mode MODE and occupies
6839 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6840 If MODE is VOIDmode, it means that we are storing into a bit-field.
6842 BITREGION_START is bitpos of the first bitfield in this region.
6843 BITREGION_END is the bitpos of the ending bitfield in this region.
6844 These two fields are 0, if the C++ memory model does not apply,
6845 or we are not interested in keeping track of bitfield regions.
6847 Always return const0_rtx unless we have something particular to
6850 ALIAS_SET is the alias set for the destination. This value will
6851 (in general) be different from that for TARGET, since TARGET is a
6852 reference to the containing structure.
6854 If NONTEMPORAL is true, try generating a nontemporal store.
6856 If REVERSE is true, the store is to be done in reverse order. */
6859 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6860 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6861 machine_mode mode
, tree exp
,
6862 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6864 if (TREE_CODE (exp
) == ERROR_MARK
)
6867 /* If we have nothing to store, do nothing unless the expression has
6868 side-effects. Don't do that for zero sized addressable lhs of
6870 if (known_eq (bitsize
, 0)
6871 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6872 || TREE_CODE (exp
) != CALL_EXPR
))
6873 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6875 if (GET_CODE (target
) == CONCAT
)
6877 /* We're storing into a struct containing a single __complex. */
6879 gcc_assert (known_eq (bitpos
, 0));
6880 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6883 /* If the structure is in a register or if the component
6884 is a bit field, we cannot use addressing to access it.
6885 Use bit-field techniques or SUBREG to store in it. */
6887 poly_int64 decl_bitsize
;
6888 if (mode
== VOIDmode
6889 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6890 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6891 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6893 || GET_CODE (target
) == SUBREG
6894 /* If the field isn't aligned enough to store as an ordinary memref,
6895 store it as a bit field. */
6897 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6898 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6899 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6900 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6901 || (known_size_p (bitsize
)
6903 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6904 /* If the RHS and field are a constant size and the size of the
6905 RHS isn't the same size as the bitfield, we must use bitfield
6907 || (known_size_p (bitsize
)
6908 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6909 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6911 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6912 we will handle specially below. */
6913 && !(TREE_CODE (exp
) == CONSTRUCTOR
6914 && multiple_p (bitsize
, BITS_PER_UNIT
))
6915 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6916 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6917 includes some extra padding. store_expr / expand_expr will in
6918 that case call get_inner_reference that will have the bitsize
6919 we check here and thus the block move will not clobber the
6920 padding that shouldn't be clobbered. In the future we could
6921 replace the TREE_ADDRESSABLE check with a check that
6922 get_base_address needs to live in memory. */
6923 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6924 || TREE_CODE (exp
) != COMPONENT_REF
6925 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6926 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6927 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6929 || maybe_ne (decl_bitsize
, bitsize
)))
6930 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6931 decl we must use bitfield operations. */
6932 || (known_size_p (bitsize
)
6933 && TREE_CODE (exp
) == MEM_REF
6934 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6935 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6936 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6937 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6942 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6943 implies a mask operation. If the precision is the same size as
6944 the field we're storing into, that mask is redundant. This is
6945 particularly common with bit field assignments generated by the
6947 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6950 tree type
= TREE_TYPE (exp
);
6951 if (INTEGRAL_TYPE_P (type
)
6952 && TYPE_PRECISION (type
) < GET_MODE_BITSIZE (TYPE_MODE (type
))
6953 && known_eq (bitsize
, TYPE_PRECISION (type
)))
6955 tree op
= gimple_assign_rhs1 (nop_def
);
6956 type
= TREE_TYPE (op
);
6957 if (INTEGRAL_TYPE_P (type
)
6958 && known_ge (TYPE_PRECISION (type
), bitsize
))
6963 temp
= expand_normal (exp
);
6965 /* We don't support variable-sized BLKmode bitfields, since our
6966 handling of BLKmode is bound up with the ability to break
6967 things into words. */
6968 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
6970 /* Handle calls that return values in multiple non-contiguous locations.
6971 The Irix 6 ABI has examples of this. */
6972 if (GET_CODE (temp
) == PARALLEL
)
6974 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6975 scalar_int_mode temp_mode
6976 = smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6977 rtx temp_target
= gen_reg_rtx (temp_mode
);
6978 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6982 /* Handle calls that return BLKmode values in registers. */
6983 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6985 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6986 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6990 /* If the value has aggregate type and an integral mode then, if BITSIZE
6991 is narrower than this mode and this is for big-endian data, we first
6992 need to put the value into the low-order bits for store_bit_field,
6993 except when MODE is BLKmode and BITSIZE larger than the word size
6994 (see the handling of fields larger than a word in store_bit_field).
6995 Moreover, the field may be not aligned on a byte boundary; in this
6996 case, if it has reverse storage order, it needs to be accessed as a
6997 scalar field with reverse storage order and we must first put the
6998 value into target order. */
6999 scalar_int_mode temp_mode
;
7000 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7001 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7003 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7005 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7008 temp
= flip_storage_order (temp_mode
, temp
);
7010 gcc_checking_assert (known_le (bitsize
, size
));
7011 if (maybe_lt (bitsize
, size
)
7012 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7013 /* Use of to_constant for BLKmode was checked above. */
7014 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7015 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7016 size
- bitsize
, NULL_RTX
, 1);
7019 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7020 if (mode
!= VOIDmode
&& mode
!= BLKmode
7021 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7022 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7024 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7025 and BITPOS must be aligned on a byte boundary. If so, we simply do
7026 a block copy. Likewise for a BLKmode-like TARGET. */
7027 if (GET_MODE (temp
) == BLKmode
7028 && (GET_MODE (target
) == BLKmode
7030 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7031 && multiple_p (bitpos
, BITS_PER_UNIT
)
7032 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7034 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7035 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7036 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7038 target
= adjust_address (target
, VOIDmode
, bytepos
);
7039 emit_block_move (target
, temp
,
7040 gen_int_mode (bytesize
, Pmode
),
7046 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7047 word size, we need to load the value (see again store_bit_field). */
7048 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7050 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7051 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7052 temp_mode
, false, NULL
);
7055 /* Store the value in the bitfield. */
7056 store_bit_field (target
, bitsize
, bitpos
,
7057 bitregion_start
, bitregion_end
,
7058 mode
, temp
, reverse
);
7064 /* Now build a reference to just the desired component. */
7065 rtx to_rtx
= adjust_address (target
, mode
,
7066 exact_div (bitpos
, BITS_PER_UNIT
));
7068 if (to_rtx
== target
)
7069 to_rtx
= copy_rtx (to_rtx
);
7071 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7072 set_mem_alias_set (to_rtx
, alias_set
);
7074 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7075 into a target smaller than its type; handle that case now. */
7076 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7078 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7079 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7083 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7087 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7088 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7089 codes and find the ultimate containing object, which we return.
7091 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7092 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7093 storage order of the field.
7094 If the position of the field is variable, we store a tree
7095 giving the variable offset (in units) in *POFFSET.
7096 This offset is in addition to the bit position.
7097 If the position is not variable, we store 0 in *POFFSET.
7099 If any of the extraction expressions is volatile,
7100 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7102 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7103 Otherwise, it is a mode that can be used to access the field.
7105 If the field describes a variable-sized object, *PMODE is set to
7106 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7107 this case, but the address of the object can be found. */
7110 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7111 poly_int64_pod
*pbitpos
, tree
*poffset
,
7112 machine_mode
*pmode
, int *punsignedp
,
7113 int *preversep
, int *pvolatilep
)
7116 machine_mode mode
= VOIDmode
;
7117 bool blkmode_bitfield
= false;
7118 tree offset
= size_zero_node
;
7119 poly_offset_int bit_offset
= 0;
7121 /* First get the mode, signedness, storage order and size. We do this from
7122 just the outermost expression. */
7124 if (TREE_CODE (exp
) == COMPONENT_REF
)
7126 tree field
= TREE_OPERAND (exp
, 1);
7127 size_tree
= DECL_SIZE (field
);
7128 if (flag_strict_volatile_bitfields
> 0
7129 && TREE_THIS_VOLATILE (exp
)
7130 && DECL_BIT_FIELD_TYPE (field
)
7131 && DECL_MODE (field
) != BLKmode
)
7132 /* Volatile bitfields should be accessed in the mode of the
7133 field's type, not the mode computed based on the bit
7135 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7136 else if (!DECL_BIT_FIELD (field
))
7138 mode
= DECL_MODE (field
);
7139 /* For vector fields re-check the target flags, as DECL_MODE
7140 could have been set with different target flags than
7141 the current function has. */
7143 && VECTOR_TYPE_P (TREE_TYPE (field
))
7144 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7145 mode
= TYPE_MODE (TREE_TYPE (field
));
7147 else if (DECL_MODE (field
) == BLKmode
)
7148 blkmode_bitfield
= true;
7150 *punsignedp
= DECL_UNSIGNED (field
);
7152 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7154 size_tree
= TREE_OPERAND (exp
, 1);
7155 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7156 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7158 /* For vector types, with the correct size of access, use the mode of
7160 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7161 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7162 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7163 mode
= TYPE_MODE (TREE_TYPE (exp
));
7167 mode
= TYPE_MODE (TREE_TYPE (exp
));
7168 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7170 if (mode
== BLKmode
)
7171 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7173 *pbitsize
= GET_MODE_BITSIZE (mode
);
7178 if (! tree_fits_uhwi_p (size_tree
))
7179 mode
= BLKmode
, *pbitsize
= -1;
7181 *pbitsize
= tree_to_uhwi (size_tree
);
7184 *preversep
= reverse_storage_order_for_component_p (exp
);
7186 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7187 and find the ultimate containing object. */
7190 switch (TREE_CODE (exp
))
7193 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7198 tree field
= TREE_OPERAND (exp
, 1);
7199 tree this_offset
= component_ref_field_offset (exp
);
7201 /* If this field hasn't been filled in yet, don't go past it.
7202 This should only happen when folding expressions made during
7203 type construction. */
7204 if (this_offset
== 0)
7207 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7208 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7210 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7215 case ARRAY_RANGE_REF
:
7217 tree index
= TREE_OPERAND (exp
, 1);
7218 tree low_bound
= array_ref_low_bound (exp
);
7219 tree unit_size
= array_ref_element_size (exp
);
7221 /* We assume all arrays have sizes that are a multiple of a byte.
7222 First subtract the lower bound, if any, in the type of the
7223 index, then convert to sizetype and multiply by the size of
7224 the array element. */
7225 if (! integer_zerop (low_bound
))
7226 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7229 offset
= size_binop (PLUS_EXPR
, offset
,
7230 size_binop (MULT_EXPR
,
7231 fold_convert (sizetype
, index
),
7240 bit_offset
+= *pbitsize
;
7243 case VIEW_CONVERT_EXPR
:
7247 /* Hand back the decl for MEM[&decl, off]. */
7248 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7250 tree off
= TREE_OPERAND (exp
, 1);
7251 if (!integer_zerop (off
))
7253 poly_offset_int boff
= mem_ref_offset (exp
);
7254 boff
<<= LOG2_BITS_PER_UNIT
;
7257 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7265 /* If any reference in the chain is volatile, the effect is volatile. */
7266 if (TREE_THIS_VOLATILE (exp
))
7269 exp
= TREE_OPERAND (exp
, 0);
7273 /* If OFFSET is constant, see if we can return the whole thing as a
7274 constant bit position. Make sure to handle overflow during
7276 if (poly_int_tree_p (offset
))
7278 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7279 TYPE_PRECISION (sizetype
));
7280 tem
<<= LOG2_BITS_PER_UNIT
;
7282 if (tem
.to_shwi (pbitpos
))
7283 *poffset
= offset
= NULL_TREE
;
7286 /* Otherwise, split it up. */
7289 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7290 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7292 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7293 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7294 offset
= size_binop (PLUS_EXPR
, offset
,
7295 build_int_cst (sizetype
, bytes
.force_shwi ()));
7301 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7302 if (mode
== VOIDmode
7304 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7305 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7313 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7315 static unsigned HOST_WIDE_INT
7316 target_align (const_tree target
)
7318 /* We might have a chain of nested references with intermediate misaligning
7319 bitfields components, so need to recurse to find out. */
7321 unsigned HOST_WIDE_INT this_align
, outer_align
;
7323 switch (TREE_CODE (target
))
7329 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7330 outer_align
= target_align (TREE_OPERAND (target
, 0));
7331 return MIN (this_align
, outer_align
);
7334 case ARRAY_RANGE_REF
:
7335 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7336 outer_align
= target_align (TREE_OPERAND (target
, 0));
7337 return MIN (this_align
, outer_align
);
7340 case NON_LVALUE_EXPR
:
7341 case VIEW_CONVERT_EXPR
:
7342 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7343 outer_align
= target_align (TREE_OPERAND (target
, 0));
7344 return MAX (this_align
, outer_align
);
7347 return TYPE_ALIGN (TREE_TYPE (target
));
7352 /* Given an rtx VALUE that may contain additions and multiplications, return
7353 an equivalent value that just refers to a register, memory, or constant.
7354 This is done by generating instructions to perform the arithmetic and
7355 returning a pseudo-register containing the value.
7357 The returned value may be a REG, SUBREG, MEM or constant. */
7360 force_operand (rtx value
, rtx target
)
7363 /* Use subtarget as the target for operand 0 of a binary operation. */
7364 rtx subtarget
= get_subtarget (target
);
7365 enum rtx_code code
= GET_CODE (value
);
7367 /* Check for subreg applied to an expression produced by loop optimizer. */
7369 && !REG_P (SUBREG_REG (value
))
7370 && !MEM_P (SUBREG_REG (value
)))
7373 = simplify_gen_subreg (GET_MODE (value
),
7374 force_reg (GET_MODE (SUBREG_REG (value
)),
7375 force_operand (SUBREG_REG (value
),
7377 GET_MODE (SUBREG_REG (value
)),
7378 SUBREG_BYTE (value
));
7379 code
= GET_CODE (value
);
7382 /* Check for a PIC address load. */
7383 if ((code
== PLUS
|| code
== MINUS
)
7384 && XEXP (value
, 0) == pic_offset_table_rtx
7385 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7386 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7387 || GET_CODE (XEXP (value
, 1)) == CONST
))
7390 subtarget
= gen_reg_rtx (GET_MODE (value
));
7391 emit_move_insn (subtarget
, value
);
7395 if (ARITHMETIC_P (value
))
7397 op2
= XEXP (value
, 1);
7398 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7400 if (code
== MINUS
&& CONST_INT_P (op2
))
7403 op2
= negate_rtx (GET_MODE (value
), op2
);
7406 /* Check for an addition with OP2 a constant integer and our first
7407 operand a PLUS of a virtual register and something else. In that
7408 case, we want to emit the sum of the virtual register and the
7409 constant first and then add the other value. This allows virtual
7410 register instantiation to simply modify the constant rather than
7411 creating another one around this addition. */
7412 if (code
== PLUS
&& CONST_INT_P (op2
)
7413 && GET_CODE (XEXP (value
, 0)) == PLUS
7414 && REG_P (XEXP (XEXP (value
, 0), 0))
7415 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7416 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7418 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7419 XEXP (XEXP (value
, 0), 0), op2
,
7420 subtarget
, 0, OPTAB_LIB_WIDEN
);
7421 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7422 force_operand (XEXP (XEXP (value
,
7424 target
, 0, OPTAB_LIB_WIDEN
);
7427 op1
= force_operand (XEXP (value
, 0), subtarget
);
7428 op2
= force_operand (op2
, NULL_RTX
);
7432 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7434 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7435 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7436 target
, 1, OPTAB_LIB_WIDEN
);
7438 return expand_divmod (0,
7439 FLOAT_MODE_P (GET_MODE (value
))
7440 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7441 GET_MODE (value
), op1
, op2
, target
, 0);
7443 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7446 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7449 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7452 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7453 target
, 0, OPTAB_LIB_WIDEN
);
7455 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7456 target
, 1, OPTAB_LIB_WIDEN
);
7459 if (UNARY_P (value
))
7462 target
= gen_reg_rtx (GET_MODE (value
));
7463 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7470 case FLOAT_TRUNCATE
:
7471 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7476 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7480 case UNSIGNED_FLOAT
:
7481 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7485 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7489 #ifdef INSN_SCHEDULING
7490 /* On machines that have insn scheduling, we want all memory reference to be
7491 explicit, so we need to deal with such paradoxical SUBREGs. */
7492 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7494 = simplify_gen_subreg (GET_MODE (value
),
7495 force_reg (GET_MODE (SUBREG_REG (value
)),
7496 force_operand (SUBREG_REG (value
),
7498 GET_MODE (SUBREG_REG (value
)),
7499 SUBREG_BYTE (value
));
7505 /* Subroutine of expand_expr: return nonzero iff there is no way that
7506 EXP can reference X, which is being modified. TOP_P is nonzero if this
7507 call is going to be used to determine whether we need a temporary
7508 for EXP, as opposed to a recursive call to this function.
7510 It is always safe for this routine to return zero since it merely
7511 searches for optimization opportunities. */
7514 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7520 /* If EXP has varying size, we MUST use a target since we currently
7521 have no way of allocating temporaries of variable size
7522 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7523 So we assume here that something at a higher level has prevented a
7524 clash. This is somewhat bogus, but the best we can do. Only
7525 do this when X is BLKmode and when we are at the top level. */
7526 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7527 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7528 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7529 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7530 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7532 && GET_MODE (x
) == BLKmode
)
7533 /* If X is in the outgoing argument area, it is always safe. */
7535 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7536 || (GET_CODE (XEXP (x
, 0)) == PLUS
7537 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7540 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7541 find the underlying pseudo. */
7542 if (GET_CODE (x
) == SUBREG
)
7545 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7549 /* Now look at our tree code and possibly recurse. */
7550 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7552 case tcc_declaration
:
7553 exp_rtl
= DECL_RTL_IF_SET (exp
);
7559 case tcc_exceptional
:
7560 if (TREE_CODE (exp
) == TREE_LIST
)
7564 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7566 exp
= TREE_CHAIN (exp
);
7569 if (TREE_CODE (exp
) != TREE_LIST
)
7570 return safe_from_p (x
, exp
, 0);
7573 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7575 constructor_elt
*ce
;
7576 unsigned HOST_WIDE_INT idx
;
7578 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7579 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7580 || !safe_from_p (x
, ce
->value
, 0))
7584 else if (TREE_CODE (exp
) == ERROR_MARK
)
7585 return 1; /* An already-visited SAVE_EXPR? */
7590 /* The only case we look at here is the DECL_INITIAL inside a
7592 return (TREE_CODE (exp
) != DECL_EXPR
7593 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7594 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7595 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7598 case tcc_comparison
:
7599 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7604 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7606 case tcc_expression
:
7609 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7610 the expression. If it is set, we conflict iff we are that rtx or
7611 both are in memory. Otherwise, we check all operands of the
7612 expression recursively. */
7614 switch (TREE_CODE (exp
))
7617 /* If the operand is static or we are static, we can't conflict.
7618 Likewise if we don't conflict with the operand at all. */
7619 if (staticp (TREE_OPERAND (exp
, 0))
7620 || TREE_STATIC (exp
)
7621 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7624 /* Otherwise, the only way this can conflict is if we are taking
7625 the address of a DECL a that address if part of X, which is
7627 exp
= TREE_OPERAND (exp
, 0);
7630 if (!DECL_RTL_SET_P (exp
)
7631 || !MEM_P (DECL_RTL (exp
)))
7634 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7640 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7641 get_alias_set (exp
)))
7646 /* Assume that the call will clobber all hard registers and
7648 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7653 case WITH_CLEANUP_EXPR
:
7654 case CLEANUP_POINT_EXPR
:
7655 /* Lowered by gimplify.c. */
7659 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7665 /* If we have an rtx, we do not need to scan our operands. */
7669 nops
= TREE_OPERAND_LENGTH (exp
);
7670 for (i
= 0; i
< nops
; i
++)
7671 if (TREE_OPERAND (exp
, i
) != 0
7672 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7678 /* Should never get a type here. */
7682 /* If we have an rtl, find any enclosed object. Then see if we conflict
7686 if (GET_CODE (exp_rtl
) == SUBREG
)
7688 exp_rtl
= SUBREG_REG (exp_rtl
);
7690 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7694 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7695 are memory and they conflict. */
7696 return ! (rtx_equal_p (x
, exp_rtl
)
7697 || (MEM_P (x
) && MEM_P (exp_rtl
)
7698 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7701 /* If we reach here, it is safe. */
7706 /* Return the highest power of two that EXP is known to be a multiple of.
7707 This is used in updating alignment of MEMs in array references. */
7709 unsigned HOST_WIDE_INT
7710 highest_pow2_factor (const_tree exp
)
7712 unsigned HOST_WIDE_INT ret
;
7713 int trailing_zeros
= tree_ctz (exp
);
7714 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7715 return BIGGEST_ALIGNMENT
;
7716 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7717 if (ret
> BIGGEST_ALIGNMENT
)
7718 return BIGGEST_ALIGNMENT
;
7722 /* Similar, except that the alignment requirements of TARGET are
7723 taken into account. Assume it is at least as aligned as its
7724 type, unless it is a COMPONENT_REF in which case the layout of
7725 the structure gives the alignment. */
7727 static unsigned HOST_WIDE_INT
7728 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7730 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7731 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7733 return MAX (factor
, talign
);
7736 /* Convert the tree comparison code TCODE to the rtl one where the
7737 signedness is UNSIGNEDP. */
7739 static enum rtx_code
7740 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7752 code
= unsignedp
? LTU
: LT
;
7755 code
= unsignedp
? LEU
: LE
;
7758 code
= unsignedp
? GTU
: GT
;
7761 code
= unsignedp
? GEU
: GE
;
7763 case UNORDERED_EXPR
:
7794 /* Subroutine of expand_expr. Expand the two operands of a binary
7795 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7796 The value may be stored in TARGET if TARGET is nonzero. The
7797 MODIFIER argument is as documented by expand_expr. */
7800 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7801 enum expand_modifier modifier
)
7803 if (! safe_from_p (target
, exp1
, 1))
7805 if (operand_equal_p (exp0
, exp1
, 0))
7807 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7808 *op1
= copy_rtx (*op0
);
7812 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7813 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7818 /* Return a MEM that contains constant EXP. DEFER is as for
7819 output_constant_def and MODIFIER is as for expand_expr. */
7822 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7826 mem
= output_constant_def (exp
, defer
);
7827 if (modifier
!= EXPAND_INITIALIZER
)
7828 mem
= use_anchored_address (mem
);
7832 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7833 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7836 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7837 enum expand_modifier modifier
, addr_space_t as
)
7839 rtx result
, subtarget
;
7841 poly_int64 bitsize
, bitpos
;
7842 int unsignedp
, reversep
, volatilep
= 0;
7845 /* If we are taking the address of a constant and are at the top level,
7846 we have to use output_constant_def since we can't call force_const_mem
7848 /* ??? This should be considered a front-end bug. We should not be
7849 generating ADDR_EXPR of something that isn't an LVALUE. The only
7850 exception here is STRING_CST. */
7851 if (CONSTANT_CLASS_P (exp
))
7853 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7854 if (modifier
< EXPAND_SUM
)
7855 result
= force_operand (result
, target
);
7859 /* Everything must be something allowed by is_gimple_addressable. */
7860 switch (TREE_CODE (exp
))
7863 /* This case will happen via recursion for &a->b. */
7864 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7868 tree tem
= TREE_OPERAND (exp
, 0);
7869 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7870 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7871 return expand_expr (tem
, target
, tmode
, modifier
);
7875 /* Expand the initializer like constants above. */
7876 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7878 if (modifier
< EXPAND_SUM
)
7879 result
= force_operand (result
, target
);
7883 /* The real part of the complex number is always first, therefore
7884 the address is the same as the address of the parent object. */
7887 inner
= TREE_OPERAND (exp
, 0);
7891 /* The imaginary part of the complex number is always second.
7892 The expression is therefore always offset by the size of the
7895 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7896 inner
= TREE_OPERAND (exp
, 0);
7899 case COMPOUND_LITERAL_EXPR
:
7900 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7901 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7902 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7903 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7904 the initializers aren't gimplified. */
7905 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7906 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7907 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7908 target
, tmode
, modifier
, as
);
7911 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7912 expand_expr, as that can have various side effects; LABEL_DECLs for
7913 example, may not have their DECL_RTL set yet. Expand the rtl of
7914 CONSTRUCTORs too, which should yield a memory reference for the
7915 constructor's contents. Assume language specific tree nodes can
7916 be expanded in some interesting way. */
7917 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7919 || TREE_CODE (exp
) == CONSTRUCTOR
7920 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7922 result
= expand_expr (exp
, target
, tmode
,
7923 modifier
== EXPAND_INITIALIZER
7924 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7926 /* If the DECL isn't in memory, then the DECL wasn't properly
7927 marked TREE_ADDRESSABLE, which will be either a front-end
7928 or a tree optimizer bug. */
7930 gcc_assert (MEM_P (result
));
7931 result
= XEXP (result
, 0);
7933 /* ??? Is this needed anymore? */
7935 TREE_USED (exp
) = 1;
7937 if (modifier
!= EXPAND_INITIALIZER
7938 && modifier
!= EXPAND_CONST_ADDRESS
7939 && modifier
!= EXPAND_SUM
)
7940 result
= force_operand (result
, target
);
7944 /* Pass FALSE as the last argument to get_inner_reference although
7945 we are expanding to RTL. The rationale is that we know how to
7946 handle "aligning nodes" here: we can just bypass them because
7947 they won't change the final object whose address will be returned
7948 (they actually exist only for that purpose). */
7949 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7950 &unsignedp
, &reversep
, &volatilep
);
7954 /* We must have made progress. */
7955 gcc_assert (inner
!= exp
);
7957 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7958 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7959 inner alignment, force the inner to be sufficiently aligned. */
7960 if (CONSTANT_CLASS_P (inner
)
7961 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7963 inner
= copy_node (inner
);
7964 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7965 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7966 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7968 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7974 if (modifier
!= EXPAND_NORMAL
)
7975 result
= force_operand (result
, NULL
);
7976 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7977 modifier
== EXPAND_INITIALIZER
7978 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7980 /* expand_expr is allowed to return an object in a mode other
7981 than TMODE. If it did, we need to convert. */
7982 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7983 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7984 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7985 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7986 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7988 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7989 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7992 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7993 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7994 1, OPTAB_LIB_WIDEN
);
7998 if (maybe_ne (bitpos
, 0))
8000 /* Someone beforehand should have rejected taking the address
8001 of an object that isn't byte-aligned. */
8002 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8003 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8004 result
= plus_constant (tmode
, result
, bytepos
);
8005 if (modifier
< EXPAND_SUM
)
8006 result
= force_operand (result
, target
);
8012 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8013 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8016 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8017 enum expand_modifier modifier
)
8019 addr_space_t as
= ADDR_SPACE_GENERIC
;
8020 scalar_int_mode address_mode
= Pmode
;
8021 scalar_int_mode pointer_mode
= ptr_mode
;
8025 /* Target mode of VOIDmode says "whatever's natural". */
8026 if (tmode
== VOIDmode
)
8027 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8029 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8031 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8032 address_mode
= targetm
.addr_space
.address_mode (as
);
8033 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8036 /* We can get called with some Weird Things if the user does silliness
8037 like "(short) &a". In that case, convert_memory_address won't do
8038 the right thing, so ignore the given target mode. */
8039 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8043 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8044 new_tmode
, modifier
, as
);
8046 /* Despite expand_expr claims concerning ignoring TMODE when not
8047 strictly convenient, stuff breaks if we don't honor it. Note
8048 that combined with the above, we only do this for pointer modes. */
8049 rmode
= GET_MODE (result
);
8050 if (rmode
== VOIDmode
)
8052 if (rmode
!= new_tmode
)
8053 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8058 /* Generate code for computing CONSTRUCTOR EXP.
8059 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8060 is TRUE, instead of creating a temporary variable in memory
8061 NULL is returned and the caller needs to handle it differently. */
8064 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8065 bool avoid_temp_mem
)
8067 tree type
= TREE_TYPE (exp
);
8068 machine_mode mode
= TYPE_MODE (type
);
8070 /* Try to avoid creating a temporary at all. This is possible
8071 if all of the initializer is zero.
8072 FIXME: try to handle all [0..255] initializers we can handle
8074 if (TREE_STATIC (exp
)
8075 && !TREE_ADDRESSABLE (exp
)
8076 && target
!= 0 && mode
== BLKmode
8077 && all_zeros_p (exp
))
8079 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8083 /* All elts simple constants => refer to a constant in memory. But
8084 if this is a non-BLKmode mode, let it store a field at a time
8085 since that should make a CONST_INT, CONST_WIDE_INT or
8086 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8087 use, it is best to store directly into the target unless the type
8088 is large enough that memcpy will be used. If we are making an
8089 initializer and all operands are constant, put it in memory as
8092 FIXME: Avoid trying to fill vector constructors piece-meal.
8093 Output them with output_constant_def below unless we're sure
8094 they're zeros. This should go away when vector initializers
8095 are treated like VECTOR_CST instead of arrays. */
8096 if ((TREE_STATIC (exp
)
8097 && ((mode
== BLKmode
8098 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8099 || TREE_ADDRESSABLE (exp
)
8100 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8101 && (! can_move_by_pieces
8102 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8104 && ! mostly_zeros_p (exp
))))
8105 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8106 && TREE_CONSTANT (exp
)))
8113 constructor
= expand_expr_constant (exp
, 1, modifier
);
8115 if (modifier
!= EXPAND_CONST_ADDRESS
8116 && modifier
!= EXPAND_INITIALIZER
8117 && modifier
!= EXPAND_SUM
)
8118 constructor
= validize_mem (constructor
);
8123 /* Handle calls that pass values in multiple non-contiguous
8124 locations. The Irix 6 ABI has examples of this. */
8125 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8126 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8131 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8134 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8139 /* expand_expr: generate code for computing expression EXP.
8140 An rtx for the computed value is returned. The value is never null.
8141 In the case of a void EXP, const0_rtx is returned.
8143 The value may be stored in TARGET if TARGET is nonzero.
8144 TARGET is just a suggestion; callers must assume that
8145 the rtx returned may not be the same as TARGET.
8147 If TARGET is CONST0_RTX, it means that the value will be ignored.
8149 If TMODE is not VOIDmode, it suggests generating the
8150 result in mode TMODE. But this is done only when convenient.
8151 Otherwise, TMODE is ignored and the value generated in its natural mode.
8152 TMODE is just a suggestion; callers must assume that
8153 the rtx returned may not have mode TMODE.
8155 Note that TARGET may have neither TMODE nor MODE. In that case, it
8156 probably will not be used.
8158 If MODIFIER is EXPAND_SUM then when EXP is an addition
8159 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8160 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8161 products as above, or REG or MEM, or constant.
8162 Ordinarily in such cases we would output mul or add instructions
8163 and then return a pseudo reg containing the sum.
8165 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8166 it also marks a label as absolutely required (it can't be dead).
8167 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8168 This is used for outputting expressions used in initializers.
8170 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8171 with a constant address even if that address is not normally legitimate.
8172 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8174 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8175 a call parameter. Such targets require special care as we haven't yet
8176 marked TARGET so that it's safe from being trashed by libcalls. We
8177 don't want to use TARGET for anything but the final result;
8178 Intermediate values must go elsewhere. Additionally, calls to
8179 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8181 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8182 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8183 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8184 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8187 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8188 In this case, we don't adjust a returned MEM rtx that wouldn't be
8189 sufficiently aligned for its mode; instead, it's up to the caller
8190 to deal with it afterwards. This is used to make sure that unaligned
8191 base objects for which out-of-bounds accesses are supported, for
8192 example record types with trailing arrays, aren't realigned behind
8193 the back of the caller.
8194 The normal operating mode is to pass FALSE for this parameter. */
8197 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8198 enum expand_modifier modifier
, rtx
*alt_rtl
,
8199 bool inner_reference_p
)
8203 /* Handle ERROR_MARK before anybody tries to access its type. */
8204 if (TREE_CODE (exp
) == ERROR_MARK
8205 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8207 ret
= CONST0_RTX (tmode
);
8208 return ret
? ret
: const0_rtx
;
8211 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8216 /* Try to expand the conditional expression which is represented by
8217 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8218 return the rtl reg which represents the result. Otherwise return
8222 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8223 tree treeop1 ATTRIBUTE_UNUSED
,
8224 tree treeop2 ATTRIBUTE_UNUSED
)
8227 rtx op00
, op01
, op1
, op2
;
8228 enum rtx_code comparison_code
;
8229 machine_mode comparison_mode
;
8232 tree type
= TREE_TYPE (treeop1
);
8233 int unsignedp
= TYPE_UNSIGNED (type
);
8234 machine_mode mode
= TYPE_MODE (type
);
8235 machine_mode orig_mode
= mode
;
8236 static bool expanding_cond_expr_using_cmove
= false;
8238 /* Conditional move expansion can end up TERing two operands which,
8239 when recursively hitting conditional expressions can result in
8240 exponential behavior if the cmove expansion ultimatively fails.
8241 It's hardly profitable to TER a cmove into a cmove so avoid doing
8242 that by failing early if we end up recursing. */
8243 if (expanding_cond_expr_using_cmove
)
8246 /* If we cannot do a conditional move on the mode, try doing it
8247 with the promoted mode. */
8248 if (!can_conditionally_move_p (mode
))
8250 mode
= promote_mode (type
, mode
, &unsignedp
);
8251 if (!can_conditionally_move_p (mode
))
8253 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8256 temp
= assign_temp (type
, 0, 1);
8258 expanding_cond_expr_using_cmove
= true;
8260 expand_operands (treeop1
, treeop2
,
8261 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8263 if (TREE_CODE (treeop0
) == SSA_NAME
8264 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8266 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8267 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8268 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8269 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8270 comparison_mode
= TYPE_MODE (type
);
8271 unsignedp
= TYPE_UNSIGNED (type
);
8272 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8274 else if (COMPARISON_CLASS_P (treeop0
))
8276 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8277 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8278 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8279 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8280 unsignedp
= TYPE_UNSIGNED (type
);
8281 comparison_mode
= TYPE_MODE (type
);
8282 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8286 op00
= expand_normal (treeop0
);
8288 comparison_code
= NE
;
8289 comparison_mode
= GET_MODE (op00
);
8290 if (comparison_mode
== VOIDmode
)
8291 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8293 expanding_cond_expr_using_cmove
= false;
8295 if (GET_MODE (op1
) != mode
)
8296 op1
= gen_lowpart (mode
, op1
);
8298 if (GET_MODE (op2
) != mode
)
8299 op2
= gen_lowpart (mode
, op2
);
8301 /* Try to emit the conditional move. */
8302 insn
= emit_conditional_move (temp
, comparison_code
,
8303 op00
, op01
, comparison_mode
,
8307 /* If we could do the conditional move, emit the sequence,
8311 rtx_insn
*seq
= get_insns ();
8314 return convert_modes (orig_mode
, mode
, temp
, 0);
8317 /* Otherwise discard the sequence and fall back to code with
8324 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8325 enum expand_modifier modifier
)
8327 rtx op0
, op1
, op2
, temp
;
8328 rtx_code_label
*lab
;
8332 scalar_int_mode int_mode
;
8333 enum tree_code code
= ops
->code
;
8335 rtx subtarget
, original_target
;
8337 bool reduce_bit_field
;
8338 location_t loc
= ops
->location
;
8339 tree treeop0
, treeop1
, treeop2
;
8340 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8341 ? reduce_to_bit_field_precision ((expr), \
8347 mode
= TYPE_MODE (type
);
8348 unsignedp
= TYPE_UNSIGNED (type
);
8354 /* We should be called only on simple (binary or unary) expressions,
8355 exactly those that are valid in gimple expressions that aren't
8356 GIMPLE_SINGLE_RHS (or invalid). */
8357 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8358 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8359 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8361 ignore
= (target
== const0_rtx
8362 || ((CONVERT_EXPR_CODE_P (code
)
8363 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8364 && TREE_CODE (type
) == VOID_TYPE
));
8366 /* We should be called only if we need the result. */
8367 gcc_assert (!ignore
);
8369 /* An operation in what may be a bit-field type needs the
8370 result to be reduced to the precision of the bit-field type,
8371 which is narrower than that of the type's mode. */
8372 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8373 && !type_has_mode_precision_p (type
));
8375 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8378 /* Use subtarget as the target for operand 0 of a binary operation. */
8379 subtarget
= get_subtarget (target
);
8380 original_target
= target
;
8384 case NON_LVALUE_EXPR
:
8387 if (treeop0
== error_mark_node
)
8390 if (TREE_CODE (type
) == UNION_TYPE
)
8392 tree valtype
= TREE_TYPE (treeop0
);
8394 /* If both input and output are BLKmode, this conversion isn't doing
8395 anything except possibly changing memory attribute. */
8396 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8398 rtx result
= expand_expr (treeop0
, target
, tmode
,
8401 result
= copy_rtx (result
);
8402 set_mem_attributes (result
, type
, 0);
8408 if (TYPE_MODE (type
) != BLKmode
)
8409 target
= gen_reg_rtx (TYPE_MODE (type
));
8411 target
= assign_temp (type
, 1, 1);
8415 /* Store data into beginning of memory target. */
8416 store_expr (treeop0
,
8417 adjust_address (target
, TYPE_MODE (valtype
), 0),
8418 modifier
== EXPAND_STACK_PARM
,
8419 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8423 gcc_assert (REG_P (target
)
8424 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8426 /* Store this field into a union of the proper type. */
8427 store_field (target
,
8428 MIN ((int_size_in_bytes (TREE_TYPE
8431 (HOST_WIDE_INT
) GET_MODE_BITSIZE (mode
)),
8432 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8436 /* Return the entire union. */
8440 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8442 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8445 /* If the signedness of the conversion differs and OP0 is
8446 a promoted SUBREG, clear that indication since we now
8447 have to do the proper extension. */
8448 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8449 && GET_CODE (op0
) == SUBREG
)
8450 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8452 return REDUCE_BIT_FIELD (op0
);
8455 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8456 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8457 if (GET_MODE (op0
) == mode
)
8460 /* If OP0 is a constant, just convert it into the proper mode. */
8461 else if (CONSTANT_P (op0
))
8463 tree inner_type
= TREE_TYPE (treeop0
);
8464 machine_mode inner_mode
= GET_MODE (op0
);
8466 if (inner_mode
== VOIDmode
)
8467 inner_mode
= TYPE_MODE (inner_type
);
8469 if (modifier
== EXPAND_INITIALIZER
)
8470 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8472 op0
= convert_modes (mode
, inner_mode
, op0
,
8473 TYPE_UNSIGNED (inner_type
));
8476 else if (modifier
== EXPAND_INITIALIZER
)
8477 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8478 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8480 else if (target
== 0)
8481 op0
= convert_to_mode (mode
, op0
,
8482 TYPE_UNSIGNED (TREE_TYPE
8486 convert_move (target
, op0
,
8487 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8491 return REDUCE_BIT_FIELD (op0
);
8493 case ADDR_SPACE_CONVERT_EXPR
:
8495 tree treeop0_type
= TREE_TYPE (treeop0
);
8497 gcc_assert (POINTER_TYPE_P (type
));
8498 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8500 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8501 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8503 /* Conversions between pointers to the same address space should
8504 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8505 gcc_assert (as_to
!= as_from
);
8507 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8509 /* Ask target code to handle conversion between pointers
8510 to overlapping address spaces. */
8511 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8512 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8514 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8518 /* For disjoint address spaces, converting anything but a null
8519 pointer invokes undefined behavior. We truncate or extend the
8520 value as if we'd converted via integers, which handles 0 as
8521 required, and all others as the programmer likely expects. */
8522 #ifndef POINTERS_EXTEND_UNSIGNED
8523 const int POINTERS_EXTEND_UNSIGNED
= 1;
8525 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8526 op0
, POINTERS_EXTEND_UNSIGNED
);
8532 case POINTER_PLUS_EXPR
:
8533 /* Even though the sizetype mode and the pointer's mode can be different
8534 expand is able to handle this correctly and get the correct result out
8535 of the PLUS_EXPR code. */
8536 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8537 if sizetype precision is smaller than pointer precision. */
8538 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8539 treeop1
= fold_convert_loc (loc
, type
,
8540 fold_convert_loc (loc
, ssizetype
,
8542 /* If sizetype precision is larger than pointer precision, truncate the
8543 offset to have matching modes. */
8544 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8545 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8549 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8550 something else, make sure we add the register to the constant and
8551 then to the other thing. This case can occur during strength
8552 reduction and doing it this way will produce better code if the
8553 frame pointer or argument pointer is eliminated.
8555 fold-const.c will ensure that the constant is always in the inner
8556 PLUS_EXPR, so the only case we need to do anything about is if
8557 sp, ap, or fp is our second argument, in which case we must swap
8558 the innermost first argument and our second argument. */
8560 if (TREE_CODE (treeop0
) == PLUS_EXPR
8561 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8563 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8564 || DECL_RTL (treeop1
) == stack_pointer_rtx
8565 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8570 /* If the result is to be ptr_mode and we are adding an integer to
8571 something, we might be forming a constant. So try to use
8572 plus_constant. If it produces a sum and we can't accept it,
8573 use force_operand. This allows P = &ARR[const] to generate
8574 efficient code on machines where a SYMBOL_REF is not a valid
8577 If this is an EXPAND_SUM call, always return the sum. */
8578 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8579 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8581 if (modifier
== EXPAND_STACK_PARM
)
8583 if (TREE_CODE (treeop0
) == INTEGER_CST
8584 && HWI_COMPUTABLE_MODE_P (mode
)
8585 && TREE_CONSTANT (treeop1
))
8589 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8591 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8593 /* Use wi::shwi to ensure that the constant is
8594 truncated according to the mode of OP1, then sign extended
8595 to a HOST_WIDE_INT. Using the constant directly can result
8596 in non-canonical RTL in a 64x32 cross compile. */
8597 wc
= TREE_INT_CST_LOW (treeop0
);
8599 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8600 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8601 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8602 op1
= force_operand (op1
, target
);
8603 return REDUCE_BIT_FIELD (op1
);
8606 else if (TREE_CODE (treeop1
) == INTEGER_CST
8607 && HWI_COMPUTABLE_MODE_P (mode
)
8608 && TREE_CONSTANT (treeop0
))
8612 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8614 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8615 (modifier
== EXPAND_INITIALIZER
8616 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8617 if (! CONSTANT_P (op0
))
8619 op1
= expand_expr (treeop1
, NULL_RTX
,
8620 VOIDmode
, modifier
);
8621 /* Return a PLUS if modifier says it's OK. */
8622 if (modifier
== EXPAND_SUM
8623 || modifier
== EXPAND_INITIALIZER
)
8624 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8627 /* Use wi::shwi to ensure that the constant is
8628 truncated according to the mode of OP1, then sign extended
8629 to a HOST_WIDE_INT. Using the constant directly can result
8630 in non-canonical RTL in a 64x32 cross compile. */
8631 wc
= TREE_INT_CST_LOW (treeop1
);
8633 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8634 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8635 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8636 op0
= force_operand (op0
, target
);
8637 return REDUCE_BIT_FIELD (op0
);
8641 /* Use TER to expand pointer addition of a negated value
8642 as pointer subtraction. */
8643 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8644 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8645 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8646 && TREE_CODE (treeop1
) == SSA_NAME
8647 && TYPE_MODE (TREE_TYPE (treeop0
))
8648 == TYPE_MODE (TREE_TYPE (treeop1
)))
8650 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8653 treeop1
= gimple_assign_rhs1 (def
);
8659 /* No sense saving up arithmetic to be done
8660 if it's all in the wrong mode to form part of an address.
8661 And force_operand won't know whether to sign-extend or
8663 if (modifier
!= EXPAND_INITIALIZER
8664 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8666 expand_operands (treeop0
, treeop1
,
8667 subtarget
, &op0
, &op1
, modifier
);
8668 if (op0
== const0_rtx
)
8670 if (op1
== const0_rtx
)
8675 expand_operands (treeop0
, treeop1
,
8676 subtarget
, &op0
, &op1
, modifier
);
8677 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8680 case POINTER_DIFF_EXPR
:
8682 /* For initializers, we are allowed to return a MINUS of two
8683 symbolic constants. Here we handle all cases when both operands
8685 /* Handle difference of two symbolic constants,
8686 for the sake of an initializer. */
8687 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8688 && really_constant_p (treeop0
)
8689 && really_constant_p (treeop1
))
8691 expand_operands (treeop0
, treeop1
,
8692 NULL_RTX
, &op0
, &op1
, modifier
);
8693 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8696 /* No sense saving up arithmetic to be done
8697 if it's all in the wrong mode to form part of an address.
8698 And force_operand won't know whether to sign-extend or
8700 if (modifier
!= EXPAND_INITIALIZER
8701 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8704 expand_operands (treeop0
, treeop1
,
8705 subtarget
, &op0
, &op1
, modifier
);
8707 /* Convert A - const to A + (-const). */
8708 if (CONST_INT_P (op1
))
8710 op1
= negate_rtx (mode
, op1
);
8711 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8716 case WIDEN_MULT_PLUS_EXPR
:
8717 case WIDEN_MULT_MINUS_EXPR
:
8718 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8719 op2
= expand_normal (treeop2
);
8720 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8724 case WIDEN_MULT_EXPR
:
8725 /* If first operand is constant, swap them.
8726 Thus the following special case checks need only
8727 check the second operand. */
8728 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8729 std::swap (treeop0
, treeop1
);
8731 /* First, check if we have a multiplication of one signed and one
8732 unsigned operand. */
8733 if (TREE_CODE (treeop1
) != INTEGER_CST
8734 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8735 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8737 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8738 this_optab
= usmul_widen_optab
;
8739 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8740 != CODE_FOR_nothing
)
8742 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8743 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8746 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8748 /* op0 and op1 might still be constant, despite the above
8749 != INTEGER_CST check. Handle it. */
8750 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8752 op0
= convert_modes (innermode
, mode
, op0
, true);
8753 op1
= convert_modes (innermode
, mode
, op1
, false);
8754 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8755 target
, unsignedp
));
8760 /* Check for a multiplication with matching signedness. */
8761 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8762 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8763 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8764 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8766 tree op0type
= TREE_TYPE (treeop0
);
8767 machine_mode innermode
= TYPE_MODE (op0type
);
8768 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8769 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8770 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8772 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8774 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8775 != CODE_FOR_nothing
)
8777 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8779 /* op0 and op1 might still be constant, despite the above
8780 != INTEGER_CST check. Handle it. */
8781 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8784 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8786 = convert_modes (innermode
, mode
, op1
,
8787 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8788 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8792 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8793 unsignedp
, this_optab
);
8794 return REDUCE_BIT_FIELD (temp
);
8796 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8798 && innermode
== word_mode
)
8801 op0
= expand_normal (treeop0
);
8802 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8803 op1
= convert_modes (word_mode
, mode
,
8804 expand_normal (treeop1
),
8805 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8807 op1
= expand_normal (treeop1
);
8808 /* op0 and op1 might still be constant, despite the above
8809 != INTEGER_CST check. Handle it. */
8810 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8811 goto widen_mult_const
;
8812 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8813 unsignedp
, OPTAB_LIB_WIDEN
);
8814 hipart
= gen_highpart (word_mode
, temp
);
8815 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8819 emit_move_insn (hipart
, htem
);
8820 return REDUCE_BIT_FIELD (temp
);
8824 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8825 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8826 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8827 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8831 optab opt
= fma_optab
;
8832 gimple
*def0
, *def2
;
8834 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8836 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8838 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8841 gcc_assert (fn
!= NULL_TREE
);
8842 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8843 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8846 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8847 /* The multiplication is commutative - look at its 2nd operand
8848 if the first isn't fed by a negate. */
8851 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8852 /* Swap operands if the 2nd operand is fed by a negate. */
8854 std::swap (treeop0
, treeop1
);
8856 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8861 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8864 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8865 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8868 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8871 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8874 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8877 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8881 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8883 op2
= expand_normal (treeop2
);
8884 op1
= expand_normal (treeop1
);
8886 return expand_ternary_op (TYPE_MODE (type
), opt
,
8887 op0
, op1
, op2
, target
, 0);
8891 /* If this is a fixed-point operation, then we cannot use the code
8892 below because "expand_mult" doesn't support sat/no-sat fixed-point
8894 if (ALL_FIXED_POINT_MODE_P (mode
))
8897 /* If first operand is constant, swap them.
8898 Thus the following special case checks need only
8899 check the second operand. */
8900 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8901 std::swap (treeop0
, treeop1
);
8903 /* Attempt to return something suitable for generating an
8904 indexed address, for machines that support that. */
8906 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8907 && tree_fits_shwi_p (treeop1
))
8909 tree exp1
= treeop1
;
8911 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8915 op0
= force_operand (op0
, NULL_RTX
);
8917 op0
= copy_to_mode_reg (mode
, op0
);
8919 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8920 gen_int_mode (tree_to_shwi (exp1
),
8921 TYPE_MODE (TREE_TYPE (exp1
)))));
8924 if (modifier
== EXPAND_STACK_PARM
)
8927 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8928 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8930 case TRUNC_MOD_EXPR
:
8931 case FLOOR_MOD_EXPR
:
8933 case ROUND_MOD_EXPR
:
8935 case TRUNC_DIV_EXPR
:
8936 case FLOOR_DIV_EXPR
:
8938 case ROUND_DIV_EXPR
:
8939 case EXACT_DIV_EXPR
:
8941 /* If this is a fixed-point operation, then we cannot use the code
8942 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8944 if (ALL_FIXED_POINT_MODE_P (mode
))
8947 if (modifier
== EXPAND_STACK_PARM
)
8949 /* Possible optimization: compute the dividend with EXPAND_SUM
8950 then if the divisor is constant can optimize the case
8951 where some terms of the dividend have coeffs divisible by it. */
8952 expand_operands (treeop0
, treeop1
,
8953 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8954 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8955 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8956 if (SCALAR_INT_MODE_P (mode
)
8958 && get_range_pos_neg (treeop0
) == 1
8959 && get_range_pos_neg (treeop1
) == 1)
8961 /* If both arguments are known to be positive when interpreted
8962 as signed, we can expand it as both signed and unsigned
8963 division or modulo. Choose the cheaper sequence in that case. */
8964 bool speed_p
= optimize_insn_for_speed_p ();
8965 do_pending_stack_adjust ();
8967 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8968 rtx_insn
*uns_insns
= get_insns ();
8971 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8972 rtx_insn
*sgn_insns
= get_insns ();
8974 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8975 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8977 /* If costs are the same then use as tie breaker the other
8979 if (uns_cost
== sgn_cost
)
8981 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8982 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8985 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8987 emit_insn (uns_insns
);
8990 emit_insn (sgn_insns
);
8993 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8998 case MULT_HIGHPART_EXPR
:
8999 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9000 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9004 case FIXED_CONVERT_EXPR
:
9005 op0
= expand_normal (treeop0
);
9006 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9007 target
= gen_reg_rtx (mode
);
9009 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9010 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9011 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9012 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9014 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9017 case FIX_TRUNC_EXPR
:
9018 op0
= expand_normal (treeop0
);
9019 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9020 target
= gen_reg_rtx (mode
);
9021 expand_fix (target
, op0
, unsignedp
);
9025 op0
= expand_normal (treeop0
);
9026 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9027 target
= gen_reg_rtx (mode
);
9028 /* expand_float can't figure out what to do if FROM has VOIDmode.
9029 So give it the correct mode. With -O, cse will optimize this. */
9030 if (GET_MODE (op0
) == VOIDmode
)
9031 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9033 expand_float (target
, op0
,
9034 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9038 op0
= expand_expr (treeop0
, subtarget
,
9039 VOIDmode
, EXPAND_NORMAL
);
9040 if (modifier
== EXPAND_STACK_PARM
)
9042 temp
= expand_unop (mode
,
9043 optab_for_tree_code (NEGATE_EXPR
, type
,
9047 return REDUCE_BIT_FIELD (temp
);
9050 op0
= expand_expr (treeop0
, subtarget
,
9051 VOIDmode
, EXPAND_NORMAL
);
9052 if (modifier
== EXPAND_STACK_PARM
)
9055 /* ABS_EXPR is not valid for complex arguments. */
9056 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9057 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9059 /* Unsigned abs is simply the operand. Testing here means we don't
9060 risk generating incorrect code below. */
9061 if (TYPE_UNSIGNED (type
))
9064 return expand_abs (mode
, op0
, target
, unsignedp
,
9065 safe_from_p (target
, treeop0
, 1));
9069 target
= original_target
;
9071 || modifier
== EXPAND_STACK_PARM
9072 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9073 || GET_MODE (target
) != mode
9075 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9076 target
= gen_reg_rtx (mode
);
9077 expand_operands (treeop0
, treeop1
,
9078 target
, &op0
, &op1
, EXPAND_NORMAL
);
9080 /* First try to do it with a special MIN or MAX instruction.
9081 If that does not win, use a conditional jump to select the proper
9083 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9084 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9089 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9090 and similarly for MAX <x, y>. */
9091 if (VECTOR_TYPE_P (type
))
9093 tree t0
= make_tree (type
, op0
);
9094 tree t1
= make_tree (type
, op1
);
9095 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9097 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9101 /* At this point, a MEM target is no longer useful; we will get better
9104 if (! REG_P (target
))
9105 target
= gen_reg_rtx (mode
);
9107 /* If op1 was placed in target, swap op0 and op1. */
9108 if (target
!= op0
&& target
== op1
)
9109 std::swap (op0
, op1
);
9111 /* We generate better code and avoid problems with op1 mentioning
9112 target by forcing op1 into a pseudo if it isn't a constant. */
9113 if (! CONSTANT_P (op1
))
9114 op1
= force_reg (mode
, op1
);
9117 enum rtx_code comparison_code
;
9120 if (code
== MAX_EXPR
)
9121 comparison_code
= unsignedp
? GEU
: GE
;
9123 comparison_code
= unsignedp
? LEU
: LE
;
9125 /* Canonicalize to comparisons against 0. */
9126 if (op1
== const1_rtx
)
9128 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9129 or (a != 0 ? a : 1) for unsigned.
9130 For MIN we are safe converting (a <= 1 ? a : 1)
9131 into (a <= 0 ? a : 1) */
9132 cmpop1
= const0_rtx
;
9133 if (code
== MAX_EXPR
)
9134 comparison_code
= unsignedp
? NE
: GT
;
9136 if (op1
== constm1_rtx
&& !unsignedp
)
9138 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9139 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9140 cmpop1
= const0_rtx
;
9141 if (code
== MIN_EXPR
)
9142 comparison_code
= LT
;
9145 /* Use a conditional move if possible. */
9146 if (can_conditionally_move_p (mode
))
9152 /* Try to emit the conditional move. */
9153 insn
= emit_conditional_move (target
, comparison_code
,
9158 /* If we could do the conditional move, emit the sequence,
9162 rtx_insn
*seq
= get_insns ();
9168 /* Otherwise discard the sequence and fall back to code with
9174 emit_move_insn (target
, op0
);
9176 lab
= gen_label_rtx ();
9177 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9178 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9179 profile_probability::uninitialized ());
9181 emit_move_insn (target
, op1
);
9186 op0
= expand_expr (treeop0
, subtarget
,
9187 VOIDmode
, EXPAND_NORMAL
);
9188 if (modifier
== EXPAND_STACK_PARM
)
9190 /* In case we have to reduce the result to bitfield precision
9191 for unsigned bitfield expand this as XOR with a proper constant
9193 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9195 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9196 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9197 false, GET_MODE_PRECISION (int_mode
));
9199 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9200 immed_wide_int_const (mask
, int_mode
),
9201 target
, 1, OPTAB_LIB_WIDEN
);
9204 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9208 /* ??? Can optimize bitwise operations with one arg constant.
9209 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9210 and (a bitwise1 b) bitwise2 b (etc)
9211 but that is probably not worth while. */
9220 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9221 || type_has_mode_precision_p (type
));
9227 /* If this is a fixed-point operation, then we cannot use the code
9228 below because "expand_shift" doesn't support sat/no-sat fixed-point
9230 if (ALL_FIXED_POINT_MODE_P (mode
))
9233 if (! safe_from_p (subtarget
, treeop1
, 1))
9235 if (modifier
== EXPAND_STACK_PARM
)
9237 op0
= expand_expr (treeop0
, subtarget
,
9238 VOIDmode
, EXPAND_NORMAL
);
9240 /* Left shift optimization when shifting across word_size boundary.
9242 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9243 there isn't native instruction to support this wide mode
9244 left shift. Given below scenario:
9246 Type A = (Type) B << C
9249 | dest_high | dest_low |
9253 If the shift amount C caused we shift B to across the word
9254 size boundary, i.e part of B shifted into high half of
9255 destination register, and part of B remains in the low
9256 half, then GCC will use the following left shift expand
9259 1. Initialize dest_low to B.
9260 2. Initialize every bit of dest_high to the sign bit of B.
9261 3. Logic left shift dest_low by C bit to finalize dest_low.
9262 The value of dest_low before this shift is kept in a temp D.
9263 4. Logic left shift dest_high by C.
9264 5. Logic right shift D by (word_size - C).
9265 6. Or the result of 4 and 5 to finalize dest_high.
9267 While, by checking gimple statements, if operand B is
9268 coming from signed extension, then we can simplify above
9271 1. dest_high = src_low >> (word_size - C).
9272 2. dest_low = src_low << C.
9274 We can use one arithmetic right shift to finish all the
9275 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9276 needed from 6 into 2.
9278 The case is similar for zero extension, except that we
9279 initialize dest_high to zero rather than copies of the sign
9280 bit from B. Furthermore, we need to use a logical right shift
9283 The choice of sign-extension versus zero-extension is
9284 determined entirely by whether or not B is signed and is
9285 independent of the current setting of unsignedp. */
9288 if (code
== LSHIFT_EXPR
9291 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9293 && TREE_CONSTANT (treeop1
)
9294 && TREE_CODE (treeop0
) == SSA_NAME
)
9296 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9297 if (is_gimple_assign (def
)
9298 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9300 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9301 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9303 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9304 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9305 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9306 >= GET_MODE_BITSIZE (word_mode
)))
9308 rtx_insn
*seq
, *seq_old
;
9309 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9311 bool extend_unsigned
9312 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9313 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9314 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9315 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9316 int_mode
, high_off
);
9317 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9318 - TREE_INT_CST_LOW (treeop1
));
9319 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9322 /* dest_high = src_low >> (word_size - C). */
9323 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9326 if (temp
!= dest_high
)
9327 emit_move_insn (dest_high
, temp
);
9329 /* dest_low = src_low << C. */
9330 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9331 treeop1
, dest_low
, unsignedp
);
9332 if (temp
!= dest_low
)
9333 emit_move_insn (dest_low
, temp
);
9339 if (have_insn_for (ASHIFT
, int_mode
))
9341 bool speed_p
= optimize_insn_for_speed_p ();
9343 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9348 seq_old
= get_insns ();
9350 if (seq_cost (seq
, speed_p
)
9351 >= seq_cost (seq_old
, speed_p
))
9362 if (temp
== NULL_RTX
)
9363 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9365 if (code
== LSHIFT_EXPR
)
9366 temp
= REDUCE_BIT_FIELD (temp
);
9370 /* Could determine the answer when only additive constants differ. Also,
9371 the addition of one can be handled by changing the condition. */
9378 case UNORDERED_EXPR
:
9387 temp
= do_store_flag (ops
,
9388 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9389 tmode
!= VOIDmode
? tmode
: mode
);
9393 /* Use a compare and a jump for BLKmode comparisons, or for function
9394 type comparisons is have_canonicalize_funcptr_for_compare. */
9397 || modifier
== EXPAND_STACK_PARM
9398 || ! safe_from_p (target
, treeop0
, 1)
9399 || ! safe_from_p (target
, treeop1
, 1)
9400 /* Make sure we don't have a hard reg (such as function's return
9401 value) live across basic blocks, if not optimizing. */
9402 || (!optimize
&& REG_P (target
)
9403 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9404 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9406 emit_move_insn (target
, const0_rtx
);
9408 rtx_code_label
*lab1
= gen_label_rtx ();
9409 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9410 profile_probability::uninitialized ());
9412 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9413 emit_move_insn (target
, constm1_rtx
);
9415 emit_move_insn (target
, const1_rtx
);
9421 /* Get the rtx code of the operands. */
9422 op0
= expand_normal (treeop0
);
9423 op1
= expand_normal (treeop1
);
9426 target
= gen_reg_rtx (TYPE_MODE (type
));
9428 /* If target overlaps with op1, then either we need to force
9429 op1 into a pseudo (if target also overlaps with op0),
9430 or write the complex parts in reverse order. */
9431 switch (GET_CODE (target
))
9434 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9436 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9438 complex_expr_force_op1
:
9439 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9440 emit_move_insn (temp
, op1
);
9444 complex_expr_swap_order
:
9445 /* Move the imaginary (op1) and real (op0) parts to their
9447 write_complex_part (target
, op1
, true);
9448 write_complex_part (target
, op0
, false);
9454 temp
= adjust_address_nv (target
,
9455 GET_MODE_INNER (GET_MODE (target
)), 0);
9456 if (reg_overlap_mentioned_p (temp
, op1
))
9458 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9459 temp
= adjust_address_nv (target
, imode
,
9460 GET_MODE_SIZE (imode
));
9461 if (reg_overlap_mentioned_p (temp
, op0
))
9462 goto complex_expr_force_op1
;
9463 goto complex_expr_swap_order
;
9467 if (reg_overlap_mentioned_p (target
, op1
))
9469 if (reg_overlap_mentioned_p (target
, op0
))
9470 goto complex_expr_force_op1
;
9471 goto complex_expr_swap_order
;
9476 /* Move the real (op0) and imaginary (op1) parts to their location. */
9477 write_complex_part (target
, op0
, false);
9478 write_complex_part (target
, op1
, true);
9482 case WIDEN_SUM_EXPR
:
9484 tree oprnd0
= treeop0
;
9485 tree oprnd1
= treeop1
;
9487 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9488 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9493 case VEC_UNPACK_HI_EXPR
:
9494 case VEC_UNPACK_LO_EXPR
:
9496 op0
= expand_normal (treeop0
);
9497 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9503 case VEC_UNPACK_FLOAT_HI_EXPR
:
9504 case VEC_UNPACK_FLOAT_LO_EXPR
:
9506 op0
= expand_normal (treeop0
);
9507 /* The signedness is determined from input operand. */
9508 temp
= expand_widen_pattern_expr
9509 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9510 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9516 case VEC_WIDEN_MULT_HI_EXPR
:
9517 case VEC_WIDEN_MULT_LO_EXPR
:
9518 case VEC_WIDEN_MULT_EVEN_EXPR
:
9519 case VEC_WIDEN_MULT_ODD_EXPR
:
9520 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9521 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9522 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9523 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9525 gcc_assert (target
);
9528 case VEC_PACK_TRUNC_EXPR
:
9529 case VEC_PACK_SAT_EXPR
:
9530 case VEC_PACK_FIX_TRUNC_EXPR
:
9531 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9536 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9537 vec_perm_builder sel
;
9538 if (TREE_CODE (treeop2
) == VECTOR_CST
9539 && tree_to_vec_perm_builder (&sel
, treeop2
))
9541 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9542 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9547 op2
= expand_normal (treeop2
);
9548 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9556 tree oprnd0
= treeop0
;
9557 tree oprnd1
= treeop1
;
9558 tree oprnd2
= treeop2
;
9561 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9562 op2
= expand_normal (oprnd2
);
9563 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9570 tree oprnd0
= treeop0
;
9571 tree oprnd1
= treeop1
;
9572 tree oprnd2
= treeop2
;
9575 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9576 op2
= expand_normal (oprnd2
);
9577 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9582 case REALIGN_LOAD_EXPR
:
9584 tree oprnd0
= treeop0
;
9585 tree oprnd1
= treeop1
;
9586 tree oprnd2
= treeop2
;
9589 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9590 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9591 op2
= expand_normal (oprnd2
);
9592 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9600 /* A COND_EXPR with its type being VOID_TYPE represents a
9601 conditional jump and is handled in
9602 expand_gimple_cond_expr. */
9603 gcc_assert (!VOID_TYPE_P (type
));
9605 /* Note that COND_EXPRs whose type is a structure or union
9606 are required to be constructed to contain assignments of
9607 a temporary variable, so that we can evaluate them here
9608 for side effect only. If type is void, we must do likewise. */
9610 gcc_assert (!TREE_ADDRESSABLE (type
)
9612 && TREE_TYPE (treeop1
) != void_type_node
9613 && TREE_TYPE (treeop2
) != void_type_node
);
9615 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9619 /* If we are not to produce a result, we have no target. Otherwise,
9620 if a target was specified use it; it will not be used as an
9621 intermediate target unless it is safe. If no target, use a
9624 if (modifier
!= EXPAND_STACK_PARM
9626 && safe_from_p (original_target
, treeop0
, 1)
9627 && GET_MODE (original_target
) == mode
9628 && !MEM_P (original_target
))
9629 temp
= original_target
;
9631 temp
= assign_temp (type
, 0, 1);
9633 do_pending_stack_adjust ();
9635 rtx_code_label
*lab0
= gen_label_rtx ();
9636 rtx_code_label
*lab1
= gen_label_rtx ();
9637 jumpifnot (treeop0
, lab0
,
9638 profile_probability::uninitialized ());
9639 store_expr (treeop1
, temp
,
9640 modifier
== EXPAND_STACK_PARM
,
9643 emit_jump_insn (targetm
.gen_jump (lab1
));
9646 store_expr (treeop2
, temp
,
9647 modifier
== EXPAND_STACK_PARM
,
9656 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9659 case VEC_DUPLICATE_EXPR
:
9660 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9661 target
= expand_vector_broadcast (mode
, op0
);
9662 gcc_assert (target
);
9665 case VEC_SERIES_EXPR
:
9666 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9667 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9669 case BIT_INSERT_EXPR
:
9671 unsigned bitpos
= tree_to_uhwi (treeop2
);
9673 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9674 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9676 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9677 rtx op0
= expand_normal (treeop0
);
9678 rtx op1
= expand_normal (treeop1
);
9679 rtx dst
= gen_reg_rtx (mode
);
9680 emit_move_insn (dst
, op0
);
9681 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9682 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9690 /* Here to do an ordinary binary operator. */
9692 expand_operands (treeop0
, treeop1
,
9693 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9695 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9697 if (modifier
== EXPAND_STACK_PARM
)
9699 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9700 unsignedp
, OPTAB_LIB_WIDEN
);
9702 /* Bitwise operations do not need bitfield reduction as we expect their
9703 operands being properly truncated. */
9704 if (code
== BIT_XOR_EXPR
9705 || code
== BIT_AND_EXPR
9706 || code
== BIT_IOR_EXPR
)
9708 return REDUCE_BIT_FIELD (temp
);
9710 #undef REDUCE_BIT_FIELD
9713 /* Return TRUE if expression STMT is suitable for replacement.
9714 Never consider memory loads as replaceable, because those don't ever lead
9715 into constant expressions. */
9718 stmt_is_replaceable_p (gimple
*stmt
)
9720 if (ssa_is_replaceable_p (stmt
))
9722 /* Don't move around loads. */
9723 if (!gimple_assign_single_p (stmt
)
9724 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9731 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9732 enum expand_modifier modifier
, rtx
*alt_rtl
,
9733 bool inner_reference_p
)
9735 rtx op0
, op1
, temp
, decl_rtl
;
9738 machine_mode mode
, dmode
;
9739 enum tree_code code
= TREE_CODE (exp
);
9740 rtx subtarget
, original_target
;
9743 bool reduce_bit_field
;
9744 location_t loc
= EXPR_LOCATION (exp
);
9745 struct separate_ops ops
;
9746 tree treeop0
, treeop1
, treeop2
;
9747 tree ssa_name
= NULL_TREE
;
9750 type
= TREE_TYPE (exp
);
9751 mode
= TYPE_MODE (type
);
9752 unsignedp
= TYPE_UNSIGNED (type
);
9754 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9755 if (!VL_EXP_CLASS_P (exp
))
9756 switch (TREE_CODE_LENGTH (code
))
9759 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9760 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9761 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9771 ignore
= (target
== const0_rtx
9772 || ((CONVERT_EXPR_CODE_P (code
)
9773 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9774 && TREE_CODE (type
) == VOID_TYPE
));
9776 /* An operation in what may be a bit-field type needs the
9777 result to be reduced to the precision of the bit-field type,
9778 which is narrower than that of the type's mode. */
9779 reduce_bit_field
= (!ignore
9780 && INTEGRAL_TYPE_P (type
)
9781 && !type_has_mode_precision_p (type
));
9783 /* If we are going to ignore this result, we need only do something
9784 if there is a side-effect somewhere in the expression. If there
9785 is, short-circuit the most common cases here. Note that we must
9786 not call expand_expr with anything but const0_rtx in case this
9787 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9791 if (! TREE_SIDE_EFFECTS (exp
))
9794 /* Ensure we reference a volatile object even if value is ignored, but
9795 don't do this if all we are doing is taking its address. */
9796 if (TREE_THIS_VOLATILE (exp
)
9797 && TREE_CODE (exp
) != FUNCTION_DECL
9798 && mode
!= VOIDmode
&& mode
!= BLKmode
9799 && modifier
!= EXPAND_CONST_ADDRESS
)
9801 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9807 if (TREE_CODE_CLASS (code
) == tcc_unary
9808 || code
== BIT_FIELD_REF
9809 || code
== COMPONENT_REF
9810 || code
== INDIRECT_REF
)
9811 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9814 else if (TREE_CODE_CLASS (code
) == tcc_binary
9815 || TREE_CODE_CLASS (code
) == tcc_comparison
9816 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9818 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9819 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9826 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9829 /* Use subtarget as the target for operand 0 of a binary operation. */
9830 subtarget
= get_subtarget (target
);
9831 original_target
= target
;
9837 tree function
= decl_function_context (exp
);
9839 temp
= label_rtx (exp
);
9840 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9842 if (function
!= current_function_decl
9844 LABEL_REF_NONLOCAL_P (temp
) = 1;
9846 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9851 /* ??? ivopts calls expander, without any preparation from
9852 out-of-ssa. So fake instructions as if this was an access to the
9853 base variable. This unnecessarily allocates a pseudo, see how we can
9854 reuse it, if partition base vars have it set already. */
9855 if (!currently_expanding_to_rtl
)
9857 tree var
= SSA_NAME_VAR (exp
);
9858 if (var
&& DECL_RTL_SET_P (var
))
9859 return DECL_RTL (var
);
9860 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9861 LAST_VIRTUAL_REGISTER
+ 1);
9864 g
= get_gimple_for_ssa_name (exp
);
9865 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9867 && modifier
== EXPAND_INITIALIZER
9868 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9869 && (optimize
|| !SSA_NAME_VAR (exp
)
9870 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9871 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9872 g
= SSA_NAME_DEF_STMT (exp
);
9876 location_t saved_loc
= curr_insn_location ();
9877 location_t loc
= gimple_location (g
);
9878 if (loc
!= UNKNOWN_LOCATION
)
9879 set_curr_insn_location (loc
);
9880 ops
.code
= gimple_assign_rhs_code (g
);
9881 switch (get_gimple_rhs_class (ops
.code
))
9883 case GIMPLE_TERNARY_RHS
:
9884 ops
.op2
= gimple_assign_rhs3 (g
);
9886 case GIMPLE_BINARY_RHS
:
9887 ops
.op1
= gimple_assign_rhs2 (g
);
9889 /* Try to expand conditonal compare. */
9890 if (targetm
.gen_ccmp_first
)
9892 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9893 r
= expand_ccmp_expr (g
, mode
);
9898 case GIMPLE_UNARY_RHS
:
9899 ops
.op0
= gimple_assign_rhs1 (g
);
9900 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9902 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9904 case GIMPLE_SINGLE_RHS
:
9906 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9907 tmode
, modifier
, alt_rtl
,
9914 set_curr_insn_location (saved_loc
);
9915 if (REG_P (r
) && !REG_EXPR (r
))
9916 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9921 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9922 exp
= SSA_NAME_VAR (ssa_name
);
9923 goto expand_decl_rtl
;
9927 /* If a static var's type was incomplete when the decl was written,
9928 but the type is complete now, lay out the decl now. */
9929 if (DECL_SIZE (exp
) == 0
9930 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9931 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9932 layout_decl (exp
, 0);
9938 decl_rtl
= DECL_RTL (exp
);
9940 gcc_assert (decl_rtl
);
9942 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9943 settings for VECTOR_TYPE_P that might switch for the function. */
9944 if (currently_expanding_to_rtl
9945 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9946 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9947 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9949 decl_rtl
= copy_rtx (decl_rtl
);
9951 /* Record writes to register variables. */
9952 if (modifier
== EXPAND_WRITE
9954 && HARD_REGISTER_P (decl_rtl
))
9955 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9956 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9958 /* Ensure variable marked as used even if it doesn't go through
9959 a parser. If it hasn't be used yet, write out an external
9962 TREE_USED (exp
) = 1;
9964 /* Show we haven't gotten RTL for this yet. */
9967 /* Variables inherited from containing functions should have
9968 been lowered by this point. */
9970 context
= decl_function_context (exp
);
9972 || SCOPE_FILE_SCOPE_P (context
)
9973 || context
== current_function_decl
9974 || TREE_STATIC (exp
)
9975 || DECL_EXTERNAL (exp
)
9976 /* ??? C++ creates functions that are not TREE_STATIC. */
9977 || TREE_CODE (exp
) == FUNCTION_DECL
);
9979 /* This is the case of an array whose size is to be determined
9980 from its initializer, while the initializer is still being parsed.
9981 ??? We aren't parsing while expanding anymore. */
9983 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9984 temp
= validize_mem (decl_rtl
);
9986 /* If DECL_RTL is memory, we are in the normal case and the
9987 address is not valid, get the address into a register. */
9989 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9992 *alt_rtl
= decl_rtl
;
9993 decl_rtl
= use_anchored_address (decl_rtl
);
9994 if (modifier
!= EXPAND_CONST_ADDRESS
9995 && modifier
!= EXPAND_SUM
9996 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9997 : GET_MODE (decl_rtl
),
9999 MEM_ADDR_SPACE (decl_rtl
)))
10000 temp
= replace_equiv_address (decl_rtl
,
10001 copy_rtx (XEXP (decl_rtl
, 0)));
10004 /* If we got something, return it. But first, set the alignment
10005 if the address is a register. */
10008 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10009 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10015 dmode
= DECL_MODE (exp
);
10017 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10019 /* If the mode of DECL_RTL does not match that of the decl,
10020 there are two cases: we are dealing with a BLKmode value
10021 that is returned in a register, or we are dealing with
10022 a promoted value. In the latter case, return a SUBREG
10023 of the wanted mode, but mark it so that we know that it
10024 was already extended. */
10025 if (REG_P (decl_rtl
)
10026 && dmode
!= BLKmode
10027 && GET_MODE (decl_rtl
) != dmode
)
10029 machine_mode pmode
;
10031 /* Get the signedness to be used for this variable. Ensure we get
10032 the same mode we got when the variable was declared. */
10033 if (code
!= SSA_NAME
)
10034 pmode
= promote_decl_mode (exp
, &unsignedp
);
10035 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10036 && gimple_code (g
) == GIMPLE_CALL
10037 && !gimple_call_internal_p (g
))
10038 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10039 gimple_call_fntype (g
),
10042 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10043 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10045 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10046 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10047 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10055 /* Given that TYPE_PRECISION (type) is not always equal to
10056 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10057 the former to the latter according to the signedness of the
10059 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10060 temp
= immed_wide_int_const
10061 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10067 tree tmp
= NULL_TREE
;
10068 if (GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
10069 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
10070 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FRACT
10071 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UFRACT
10072 || GET_MODE_CLASS (mode
) == MODE_VECTOR_ACCUM
10073 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UACCUM
)
10074 return const_vector_from_tree (exp
);
10075 scalar_int_mode int_mode
;
10076 if (is_int_mode (mode
, &int_mode
))
10078 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10079 return const_scalar_mask_from_tree (int_mode
, exp
);
10083 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10085 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10086 type_for_mode
, exp
);
10091 vec
<constructor_elt
, va_gc
> *v
;
10093 vec_alloc (v
, VECTOR_CST_NELTS (exp
));
10094 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
10095 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10096 tmp
= build_constructor (type
, v
);
10098 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10103 if (modifier
== EXPAND_WRITE
)
10105 /* Writing into CONST_DECL is always invalid, but handle it
10107 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10108 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10109 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10110 EXPAND_NORMAL
, as
);
10111 op0
= memory_address_addr_space (mode
, op0
, as
);
10112 temp
= gen_rtx_MEM (mode
, op0
);
10113 set_mem_addr_space (temp
, as
);
10116 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10119 /* If optimized, generate immediate CONST_DOUBLE
10120 which will be turned into memory by reload if necessary.
10122 We used to force a register so that loop.c could see it. But
10123 this does not allow gen_* patterns to perform optimizations with
10124 the constants. It also produces two insns in cases like "x = 1.0;".
10125 On most machines, floating-point constants are not permitted in
10126 many insns, so we'd end up copying it to a register in any case.
10128 Now, we do the copying in expand_binop, if appropriate. */
10129 return const_double_from_real_value (TREE_REAL_CST (exp
),
10130 TYPE_MODE (TREE_TYPE (exp
)));
10133 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10134 TYPE_MODE (TREE_TYPE (exp
)));
10137 /* Handle evaluating a complex constant in a CONCAT target. */
10138 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10140 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10143 rtarg
= XEXP (original_target
, 0);
10144 itarg
= XEXP (original_target
, 1);
10146 /* Move the real and imaginary parts separately. */
10147 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10148 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10151 emit_move_insn (rtarg
, op0
);
10153 emit_move_insn (itarg
, op1
);
10155 return original_target
;
10161 temp
= expand_expr_constant (exp
, 1, modifier
);
10163 /* temp contains a constant address.
10164 On RISC machines where a constant address isn't valid,
10165 make some insns to get that address into a register. */
10166 if (modifier
!= EXPAND_CONST_ADDRESS
10167 && modifier
!= EXPAND_INITIALIZER
10168 && modifier
!= EXPAND_SUM
10169 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10170 MEM_ADDR_SPACE (temp
)))
10171 return replace_equiv_address (temp
,
10172 copy_rtx (XEXP (temp
, 0)));
10176 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10180 tree val
= treeop0
;
10181 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10182 inner_reference_p
);
10184 if (!SAVE_EXPR_RESOLVED_P (exp
))
10186 /* We can indeed still hit this case, typically via builtin
10187 expanders calling save_expr immediately before expanding
10188 something. Assume this means that we only have to deal
10189 with non-BLKmode values. */
10190 gcc_assert (GET_MODE (ret
) != BLKmode
);
10192 val
= build_decl (curr_insn_location (),
10193 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10194 DECL_ARTIFICIAL (val
) = 1;
10195 DECL_IGNORED_P (val
) = 1;
10197 TREE_OPERAND (exp
, 0) = treeop0
;
10198 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10200 if (!CONSTANT_P (ret
))
10201 ret
= copy_to_reg (ret
);
10202 SET_DECL_RTL (val
, ret
);
10210 /* If we don't need the result, just ensure we evaluate any
10214 unsigned HOST_WIDE_INT idx
;
10217 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10218 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10223 return expand_constructor (exp
, target
, modifier
, false);
10225 case TARGET_MEM_REF
:
10228 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10229 enum insn_code icode
;
10230 unsigned int align
;
10232 op0
= addr_for_mem_ref (exp
, as
, true);
10233 op0
= memory_address_addr_space (mode
, op0
, as
);
10234 temp
= gen_rtx_MEM (mode
, op0
);
10235 set_mem_attributes (temp
, exp
, 0);
10236 set_mem_addr_space (temp
, as
);
10237 align
= get_object_alignment (exp
);
10238 if (modifier
!= EXPAND_WRITE
10239 && modifier
!= EXPAND_MEMORY
10241 && align
< GET_MODE_ALIGNMENT (mode
)
10242 /* If the target does not have special handling for unaligned
10243 loads of mode then it can use regular moves for them. */
10244 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10245 != CODE_FOR_nothing
))
10247 struct expand_operand ops
[2];
10249 /* We've already validated the memory, and we're creating a
10250 new pseudo destination. The predicates really can't fail,
10251 nor can the generator. */
10252 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10253 create_fixed_operand (&ops
[1], temp
);
10254 expand_insn (icode
, 2, ops
);
10255 temp
= ops
[0].value
;
10262 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10264 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10265 machine_mode address_mode
;
10266 tree base
= TREE_OPERAND (exp
, 0);
10268 enum insn_code icode
;
10270 /* Handle expansion of non-aliased memory with non-BLKmode. That
10271 might end up in a register. */
10272 if (mem_ref_refers_to_non_mem_p (exp
))
10274 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10275 base
= TREE_OPERAND (base
, 0);
10276 if (known_eq (offset
, 0)
10278 && tree_fits_uhwi_p (TYPE_SIZE (type
))
10279 && (GET_MODE_BITSIZE (DECL_MODE (base
))
10280 == tree_to_uhwi (TYPE_SIZE (type
))))
10281 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10282 target
, tmode
, modifier
);
10283 if (TYPE_MODE (type
) == BLKmode
)
10285 temp
= assign_stack_temp (DECL_MODE (base
),
10286 GET_MODE_SIZE (DECL_MODE (base
)));
10287 store_expr (base
, temp
, 0, false, false);
10288 temp
= adjust_address (temp
, BLKmode
, offset
);
10289 set_mem_size (temp
, int_size_in_bytes (type
));
10292 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10293 bitsize_int (offset
* BITS_PER_UNIT
));
10294 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10295 return expand_expr (exp
, target
, tmode
, modifier
);
10297 address_mode
= targetm
.addr_space
.address_mode (as
);
10298 base
= TREE_OPERAND (exp
, 0);
10299 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10301 tree mask
= gimple_assign_rhs2 (def_stmt
);
10302 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10303 gimple_assign_rhs1 (def_stmt
), mask
);
10304 TREE_OPERAND (exp
, 0) = base
;
10306 align
= get_object_alignment (exp
);
10307 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10308 op0
= memory_address_addr_space (mode
, op0
, as
);
10309 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10311 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10312 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10313 op0
= memory_address_addr_space (mode
, op0
, as
);
10315 temp
= gen_rtx_MEM (mode
, op0
);
10316 set_mem_attributes (temp
, exp
, 0);
10317 set_mem_addr_space (temp
, as
);
10318 if (TREE_THIS_VOLATILE (exp
))
10319 MEM_VOLATILE_P (temp
) = 1;
10320 if (modifier
!= EXPAND_WRITE
10321 && modifier
!= EXPAND_MEMORY
10322 && !inner_reference_p
10324 && align
< GET_MODE_ALIGNMENT (mode
))
10326 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10327 != CODE_FOR_nothing
)
10329 struct expand_operand ops
[2];
10331 /* We've already validated the memory, and we're creating a
10332 new pseudo destination. The predicates really can't fail,
10333 nor can the generator. */
10334 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10335 create_fixed_operand (&ops
[1], temp
);
10336 expand_insn (icode
, 2, ops
);
10337 temp
= ops
[0].value
;
10339 else if (targetm
.slow_unaligned_access (mode
, align
))
10340 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10341 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10342 (modifier
== EXPAND_STACK_PARM
10343 ? NULL_RTX
: target
),
10344 mode
, mode
, false, alt_rtl
);
10347 && modifier
!= EXPAND_MEMORY
10348 && modifier
!= EXPAND_WRITE
)
10349 temp
= flip_storage_order (mode
, temp
);
10356 tree array
= treeop0
;
10357 tree index
= treeop1
;
10360 /* Fold an expression like: "foo"[2].
10361 This is not done in fold so it won't happen inside &.
10362 Don't fold if this is for wide characters since it's too
10363 difficult to do correctly and this is a very rare case. */
10365 if (modifier
!= EXPAND_CONST_ADDRESS
10366 && modifier
!= EXPAND_INITIALIZER
10367 && modifier
!= EXPAND_MEMORY
)
10369 tree t
= fold_read_from_constant_string (exp
);
10372 return expand_expr (t
, target
, tmode
, modifier
);
10375 /* If this is a constant index into a constant array,
10376 just get the value from the array. Handle both the cases when
10377 we have an explicit constructor and when our operand is a variable
10378 that was declared const. */
10380 if (modifier
!= EXPAND_CONST_ADDRESS
10381 && modifier
!= EXPAND_INITIALIZER
10382 && modifier
!= EXPAND_MEMORY
10383 && TREE_CODE (array
) == CONSTRUCTOR
10384 && ! TREE_SIDE_EFFECTS (array
)
10385 && TREE_CODE (index
) == INTEGER_CST
)
10387 unsigned HOST_WIDE_INT ix
;
10390 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10392 if (tree_int_cst_equal (field
, index
))
10394 if (!TREE_SIDE_EFFECTS (value
))
10395 return expand_expr (fold (value
), target
, tmode
, modifier
);
10400 else if (optimize
>= 1
10401 && modifier
!= EXPAND_CONST_ADDRESS
10402 && modifier
!= EXPAND_INITIALIZER
10403 && modifier
!= EXPAND_MEMORY
10404 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10405 && TREE_CODE (index
) == INTEGER_CST
10406 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10407 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10409 if (init
== NULL_TREE
)
10411 tree value
= build_zero_cst (type
);
10412 if (TREE_CODE (value
) == CONSTRUCTOR
)
10414 /* If VALUE is a CONSTRUCTOR, this optimization is only
10415 useful if this doesn't store the CONSTRUCTOR into
10416 memory. If it does, it is more efficient to just
10417 load the data from the array directly. */
10418 rtx ret
= expand_constructor (value
, target
,
10420 if (ret
== NULL_RTX
)
10425 return expand_expr (value
, target
, tmode
, modifier
);
10427 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10429 unsigned HOST_WIDE_INT ix
;
10432 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10434 if (tree_int_cst_equal (field
, index
))
10436 if (TREE_SIDE_EFFECTS (value
))
10439 if (TREE_CODE (value
) == CONSTRUCTOR
)
10441 /* If VALUE is a CONSTRUCTOR, this
10442 optimization is only useful if
10443 this doesn't store the CONSTRUCTOR
10444 into memory. If it does, it is more
10445 efficient to just load the data from
10446 the array directly. */
10447 rtx ret
= expand_constructor (value
, target
,
10449 if (ret
== NULL_RTX
)
10454 expand_expr (fold (value
), target
, tmode
, modifier
);
10457 else if (TREE_CODE (init
) == STRING_CST
)
10459 tree low_bound
= array_ref_low_bound (exp
);
10460 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10462 /* Optimize the special case of a zero lower bound.
10464 We convert the lower bound to sizetype to avoid problems
10465 with constant folding. E.g. suppose the lower bound is
10466 1 and its mode is QI. Without the conversion
10467 (ARRAY + (INDEX - (unsigned char)1))
10469 (ARRAY + (-(unsigned char)1) + INDEX)
10471 (ARRAY + 255 + INDEX). Oops! */
10472 if (!integer_zerop (low_bound
))
10473 index1
= size_diffop_loc (loc
, index1
,
10474 fold_convert_loc (loc
, sizetype
,
10477 if (tree_fits_uhwi_p (index1
)
10478 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10480 tree type
= TREE_TYPE (TREE_TYPE (init
));
10481 scalar_int_mode mode
;
10483 if (is_int_mode (TYPE_MODE (type
), &mode
)
10484 && GET_MODE_SIZE (mode
) == 1)
10485 return gen_int_mode (TREE_STRING_POINTER (init
)
10486 [TREE_INT_CST_LOW (index1
)],
10492 goto normal_inner_ref
;
10494 case COMPONENT_REF
:
10495 /* If the operand is a CONSTRUCTOR, we can just extract the
10496 appropriate field if it is present. */
10497 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10499 unsigned HOST_WIDE_INT idx
;
10501 scalar_int_mode field_mode
;
10503 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10505 if (field
== treeop1
10506 /* We can normally use the value of the field in the
10507 CONSTRUCTOR. However, if this is a bitfield in
10508 an integral mode that we can fit in a HOST_WIDE_INT,
10509 we must mask only the number of bits in the bitfield,
10510 since this is done implicitly by the constructor. If
10511 the bitfield does not meet either of those conditions,
10512 we can't do this optimization. */
10513 && (! DECL_BIT_FIELD (field
)
10514 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10515 && (GET_MODE_PRECISION (field_mode
)
10516 <= HOST_BITS_PER_WIDE_INT
))))
10518 if (DECL_BIT_FIELD (field
)
10519 && modifier
== EXPAND_STACK_PARM
)
10521 op0
= expand_expr (value
, target
, tmode
, modifier
);
10522 if (DECL_BIT_FIELD (field
))
10524 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10525 scalar_int_mode imode
10526 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10528 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10530 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10532 op0
= expand_and (imode
, op0
, op1
, target
);
10536 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10538 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10540 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10548 goto normal_inner_ref
;
10550 case BIT_FIELD_REF
:
10551 case ARRAY_RANGE_REF
:
10554 machine_mode mode1
, mode2
;
10555 poly_int64 bitsize
, bitpos
, bytepos
;
10557 int reversep
, volatilep
= 0, must_force_mem
;
10559 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10560 &unsignedp
, &reversep
, &volatilep
);
10561 rtx orig_op0
, memloc
;
10562 bool clear_mem_expr
= false;
10564 /* If we got back the original object, something is wrong. Perhaps
10565 we are evaluating an expression too early. In any event, don't
10566 infinitely recurse. */
10567 gcc_assert (tem
!= exp
);
10569 /* If TEM's type is a union of variable size, pass TARGET to the inner
10570 computation, since it will need a temporary and TARGET is known
10571 to have to do. This occurs in unchecked conversion in Ada. */
10573 = expand_expr_real (tem
,
10574 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10575 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10576 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10578 && modifier
!= EXPAND_STACK_PARM
10579 ? target
: NULL_RTX
),
10581 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10584 /* If the field has a mode, we want to access it in the
10585 field's mode, not the computed mode.
10586 If a MEM has VOIDmode (external with incomplete type),
10587 use BLKmode for it instead. */
10590 if (mode1
!= VOIDmode
)
10591 op0
= adjust_address (op0
, mode1
, 0);
10592 else if (GET_MODE (op0
) == VOIDmode
)
10593 op0
= adjust_address (op0
, BLKmode
, 0);
10597 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10599 /* If we have either an offset, a BLKmode result, or a reference
10600 outside the underlying object, we must force it to memory.
10601 Such a case can occur in Ada if we have unchecked conversion
10602 of an expression from a scalar type to an aggregate type or
10603 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10604 passed a partially uninitialized object or a view-conversion
10605 to a larger size. */
10606 must_force_mem
= (offset
10607 || mode1
== BLKmode
10608 || maybe_gt (bitpos
+ bitsize
,
10609 GET_MODE_BITSIZE (mode2
)));
10611 /* Handle CONCAT first. */
10612 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10614 if (known_eq (bitpos
, 0)
10615 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10616 && COMPLEX_MODE_P (mode1
)
10617 && COMPLEX_MODE_P (GET_MODE (op0
))
10618 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10619 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10622 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10623 if (mode1
!= GET_MODE (op0
))
10626 for (int i
= 0; i
< 2; i
++)
10628 rtx op
= read_complex_part (op0
, i
!= 0);
10629 if (GET_CODE (op
) == SUBREG
)
10630 op
= force_reg (GET_MODE (op
), op
);
10631 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10637 if (!REG_P (op
) && !MEM_P (op
))
10638 op
= force_reg (GET_MODE (op
), op
);
10639 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10643 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10647 if (known_eq (bitpos
, 0)
10648 && known_eq (bitsize
,
10649 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10650 && maybe_ne (bitsize
, 0))
10652 op0
= XEXP (op0
, 0);
10653 mode2
= GET_MODE (op0
);
10655 else if (known_eq (bitpos
,
10656 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10657 && known_eq (bitsize
,
10658 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10659 && maybe_ne (bitpos
, 0)
10660 && maybe_ne (bitsize
, 0))
10662 op0
= XEXP (op0
, 1);
10664 mode2
= GET_MODE (op0
);
10667 /* Otherwise force into memory. */
10668 must_force_mem
= 1;
10671 /* If this is a constant, put it in a register if it is a legitimate
10672 constant and we don't need a memory reference. */
10673 if (CONSTANT_P (op0
)
10674 && mode2
!= BLKmode
10675 && targetm
.legitimate_constant_p (mode2
, op0
)
10676 && !must_force_mem
)
10677 op0
= force_reg (mode2
, op0
);
10679 /* Otherwise, if this is a constant, try to force it to the constant
10680 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10681 is a legitimate constant. */
10682 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10683 op0
= validize_mem (memloc
);
10685 /* Otherwise, if this is a constant or the object is not in memory
10686 and need be, put it there. */
10687 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10689 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10690 emit_move_insn (memloc
, op0
);
10692 clear_mem_expr
= true;
10697 machine_mode address_mode
;
10698 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10701 gcc_assert (MEM_P (op0
));
10703 address_mode
= get_address_mode (op0
);
10704 if (GET_MODE (offset_rtx
) != address_mode
)
10706 /* We cannot be sure that the RTL in offset_rtx is valid outside
10707 of a memory address context, so force it into a register
10708 before attempting to convert it to the desired mode. */
10709 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10710 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10713 /* See the comment in expand_assignment for the rationale. */
10714 if (mode1
!= VOIDmode
10715 && maybe_ne (bitpos
, 0)
10716 && maybe_gt (bitsize
, 0)
10717 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10718 && multiple_p (bitpos
, bitsize
)
10719 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10720 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10722 op0
= adjust_address (op0
, mode1
, bytepos
);
10726 op0
= offset_address (op0
, offset_rtx
,
10727 highest_pow2_factor (offset
));
10730 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10731 record its alignment as BIGGEST_ALIGNMENT. */
10733 && known_eq (bitpos
, 0)
10735 && is_aligning_offset (offset
, tem
))
10736 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10738 /* Don't forget about volatility even if this is a bitfield. */
10739 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10741 if (op0
== orig_op0
)
10742 op0
= copy_rtx (op0
);
10744 MEM_VOLATILE_P (op0
) = 1;
10747 /* In cases where an aligned union has an unaligned object
10748 as a field, we might be extracting a BLKmode value from
10749 an integer-mode (e.g., SImode) object. Handle this case
10750 by doing the extract into an object as wide as the field
10751 (which we know to be the width of a basic mode), then
10752 storing into memory, and changing the mode to BLKmode. */
10753 if (mode1
== VOIDmode
10754 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10755 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10756 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10757 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10758 && modifier
!= EXPAND_CONST_ADDRESS
10759 && modifier
!= EXPAND_INITIALIZER
10760 && modifier
!= EXPAND_MEMORY
)
10761 /* If the bitfield is volatile and the bitsize
10762 is narrower than the access size of the bitfield,
10763 we need to extract bitfields from the access. */
10764 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10765 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10766 && mode1
!= BLKmode
10767 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10768 /* If the field isn't aligned enough to fetch as a memref,
10769 fetch it as a bit field. */
10770 || (mode1
!= BLKmode
10772 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10773 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10774 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10775 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10776 && modifier
!= EXPAND_MEMORY
10777 && ((modifier
== EXPAND_CONST_ADDRESS
10778 || modifier
== EXPAND_INITIALIZER
)
10780 : targetm
.slow_unaligned_access (mode1
,
10782 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10783 /* If the type and the field are a constant size and the
10784 size of the type isn't the same size as the bitfield,
10785 we must use bitfield operations. */
10786 || (known_size_p (bitsize
)
10787 && TYPE_SIZE (TREE_TYPE (exp
))
10788 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10789 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10792 machine_mode ext_mode
= mode
;
10794 if (ext_mode
== BLKmode
10795 && ! (target
!= 0 && MEM_P (op0
)
10797 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10798 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10800 if (ext_mode
== BLKmode
)
10803 target
= assign_temp (type
, 1, 1);
10805 /* ??? Unlike the similar test a few lines below, this one is
10806 very likely obsolete. */
10807 if (known_eq (bitsize
, 0))
10810 /* In this case, BITPOS must start at a byte boundary and
10811 TARGET, if specified, must be a MEM. */
10812 gcc_assert (MEM_P (op0
)
10813 && (!target
|| MEM_P (target
)));
10815 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10816 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10817 emit_block_move (target
,
10818 adjust_address (op0
, VOIDmode
, bytepos
),
10819 gen_int_mode (bytesize
, Pmode
),
10820 (modifier
== EXPAND_STACK_PARM
10821 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10826 /* If we have nothing to extract, the result will be 0 for targets
10827 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10828 return 0 for the sake of consistency, as reading a zero-sized
10829 bitfield is valid in Ada and the value is fully specified. */
10830 if (known_eq (bitsize
, 0))
10833 op0
= validize_mem (op0
);
10835 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10836 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10838 /* If the result has a record type and the extraction is done in
10839 an integral mode, then the field may be not aligned on a byte
10840 boundary; in this case, if it has reverse storage order, it
10841 needs to be extracted as a scalar field with reverse storage
10842 order and put back into memory order afterwards. */
10843 if (TREE_CODE (type
) == RECORD_TYPE
10844 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10845 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10847 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10848 (modifier
== EXPAND_STACK_PARM
10849 ? NULL_RTX
: target
),
10850 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10852 /* If the result has a record type and the mode of OP0 is an
10853 integral mode then, if BITSIZE is narrower than this mode
10854 and this is for big-endian data, we must put the field
10855 into the high-order bits. And we must also put it back
10856 into memory order if it has been previously reversed. */
10857 scalar_int_mode op0_mode
;
10858 if (TREE_CODE (type
) == RECORD_TYPE
10859 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10861 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10863 gcc_checking_assert (known_le (bitsize
, size
));
10864 if (maybe_lt (bitsize
, size
)
10865 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10866 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10867 size
- bitsize
, op0
, 1);
10870 op0
= flip_storage_order (op0_mode
, op0
);
10873 /* If the result type is BLKmode, store the data into a temporary
10874 of the appropriate type, but with the mode corresponding to the
10875 mode for the data we have (op0's mode). */
10876 if (mode
== BLKmode
)
10879 = assign_stack_temp_for_type (ext_mode
,
10880 GET_MODE_BITSIZE (ext_mode
),
10882 emit_move_insn (new_rtx
, op0
);
10883 op0
= copy_rtx (new_rtx
);
10884 PUT_MODE (op0
, BLKmode
);
10890 /* If the result is BLKmode, use that to access the object
10892 if (mode
== BLKmode
)
10895 /* Get a reference to just this component. */
10896 bytepos
= bits_to_bytes_round_down (bitpos
);
10897 if (modifier
== EXPAND_CONST_ADDRESS
10898 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10899 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10901 op0
= adjust_address (op0
, mode1
, bytepos
);
10903 if (op0
== orig_op0
)
10904 op0
= copy_rtx (op0
);
10906 /* Don't set memory attributes if the base expression is
10907 SSA_NAME that got expanded as a MEM. In that case, we should
10908 just honor its original memory attributes. */
10909 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10910 set_mem_attributes (op0
, exp
, 0);
10912 if (REG_P (XEXP (op0
, 0)))
10913 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10915 /* If op0 is a temporary because the original expressions was forced
10916 to memory, clear MEM_EXPR so that the original expression cannot
10917 be marked as addressable through MEM_EXPR of the temporary. */
10918 if (clear_mem_expr
)
10919 set_mem_expr (op0
, NULL_TREE
);
10921 MEM_VOLATILE_P (op0
) |= volatilep
;
10924 && modifier
!= EXPAND_MEMORY
10925 && modifier
!= EXPAND_WRITE
)
10926 op0
= flip_storage_order (mode1
, op0
);
10928 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10929 || modifier
== EXPAND_CONST_ADDRESS
10930 || modifier
== EXPAND_INITIALIZER
)
10934 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10936 convert_move (target
, op0
, unsignedp
);
10941 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10944 /* All valid uses of __builtin_va_arg_pack () are removed during
10946 if (CALL_EXPR_VA_ARG_PACK (exp
))
10947 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10949 tree fndecl
= get_callee_fndecl (exp
), attr
;
10952 && (attr
= lookup_attribute ("error",
10953 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10954 error ("%Kcall to %qs declared with attribute error: %s",
10955 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10956 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10958 && (attr
= lookup_attribute ("warning",
10959 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10960 warning_at (tree_nonartificial_location (exp
),
10961 0, "%Kcall to %qs declared with attribute warning: %s",
10962 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10963 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10965 /* Check for a built-in function. */
10966 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10968 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10969 if (CALL_WITH_BOUNDS_P (exp
))
10970 return expand_builtin_with_bounds (exp
, target
, subtarget
,
10973 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10976 return expand_call (exp
, target
, ignore
);
10978 case VIEW_CONVERT_EXPR
:
10981 /* If we are converting to BLKmode, try to avoid an intermediate
10982 temporary by fetching an inner memory reference. */
10983 if (mode
== BLKmode
10984 && poly_int_tree_p (TYPE_SIZE (type
))
10985 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10986 && handled_component_p (treeop0
))
10988 machine_mode mode1
;
10989 poly_int64 bitsize
, bitpos
, bytepos
;
10991 int unsignedp
, reversep
, volatilep
= 0;
10993 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10994 &unsignedp
, &reversep
, &volatilep
);
10997 /* ??? We should work harder and deal with non-zero offsets. */
10999 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11001 && known_size_p (bitsize
)
11002 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11004 /* See the normal_inner_ref case for the rationale. */
11006 = expand_expr_real (tem
,
11007 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11008 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11010 && modifier
!= EXPAND_STACK_PARM
11011 ? target
: NULL_RTX
),
11013 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11016 if (MEM_P (orig_op0
))
11020 /* Get a reference to just this component. */
11021 if (modifier
== EXPAND_CONST_ADDRESS
11022 || modifier
== EXPAND_SUM
11023 || modifier
== EXPAND_INITIALIZER
)
11024 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11026 op0
= adjust_address (op0
, mode
, bytepos
);
11028 if (op0
== orig_op0
)
11029 op0
= copy_rtx (op0
);
11031 set_mem_attributes (op0
, treeop0
, 0);
11032 if (REG_P (XEXP (op0
, 0)))
11033 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11035 MEM_VOLATILE_P (op0
) |= volatilep
;
11041 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11042 NULL
, inner_reference_p
);
11044 /* If the input and output modes are both the same, we are done. */
11045 if (mode
== GET_MODE (op0
))
11047 /* If neither mode is BLKmode, and both modes are the same size
11048 then we can use gen_lowpart. */
11049 else if (mode
!= BLKmode
&& GET_MODE (op0
) != BLKmode
11050 && (GET_MODE_PRECISION (mode
)
11051 == GET_MODE_PRECISION (GET_MODE (op0
)))
11052 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11054 if (GET_CODE (op0
) == SUBREG
)
11055 op0
= force_reg (GET_MODE (op0
), op0
);
11056 temp
= gen_lowpart_common (mode
, op0
);
11061 if (!REG_P (op0
) && !MEM_P (op0
))
11062 op0
= force_reg (GET_MODE (op0
), op0
);
11063 op0
= gen_lowpart (mode
, op0
);
11066 /* If both types are integral, convert from one mode to the other. */
11067 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11068 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11069 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11070 /* If the output type is a bit-field type, do an extraction. */
11071 else if (reduce_bit_field
)
11072 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11073 TYPE_UNSIGNED (type
), NULL_RTX
,
11074 mode
, mode
, false, NULL
);
11075 /* As a last resort, spill op0 to memory, and reload it in a
11077 else if (!MEM_P (op0
))
11079 /* If the operand is not a MEM, force it into memory. Since we
11080 are going to be changing the mode of the MEM, don't call
11081 force_const_mem for constants because we don't allow pool
11082 constants to change mode. */
11083 tree inner_type
= TREE_TYPE (treeop0
);
11085 gcc_assert (!TREE_ADDRESSABLE (exp
));
11087 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11089 = assign_stack_temp_for_type
11090 (TYPE_MODE (inner_type
),
11091 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11093 emit_move_insn (target
, op0
);
11097 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11098 output type is such that the operand is known to be aligned, indicate
11099 that it is. Otherwise, we need only be concerned about alignment for
11100 non-BLKmode results. */
11103 enum insn_code icode
;
11105 if (modifier
!= EXPAND_WRITE
11106 && modifier
!= EXPAND_MEMORY
11107 && !inner_reference_p
11109 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11111 /* If the target does have special handling for unaligned
11112 loads of mode then use them. */
11113 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11114 != CODE_FOR_nothing
)
11118 op0
= adjust_address (op0
, mode
, 0);
11119 /* We've already validated the memory, and we're creating a
11120 new pseudo destination. The predicates really can't
11122 reg
= gen_reg_rtx (mode
);
11124 /* Nor can the insn generator. */
11125 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11129 else if (STRICT_ALIGNMENT
)
11131 tree inner_type
= TREE_TYPE (treeop0
);
11132 HOST_WIDE_INT temp_size
11133 = MAX (int_size_in_bytes (inner_type
),
11134 (HOST_WIDE_INT
) GET_MODE_SIZE (mode
));
11136 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11137 rtx new_with_op0_mode
11138 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11140 gcc_assert (!TREE_ADDRESSABLE (exp
));
11142 if (GET_MODE (op0
) == BLKmode
)
11143 emit_block_move (new_with_op0_mode
, op0
,
11144 GEN_INT (GET_MODE_SIZE (mode
)),
11145 (modifier
== EXPAND_STACK_PARM
11146 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11148 emit_move_insn (new_with_op0_mode
, op0
);
11154 op0
= adjust_address (op0
, mode
, 0);
11161 tree lhs
= treeop0
;
11162 tree rhs
= treeop1
;
11163 gcc_assert (ignore
);
11165 /* Check for |= or &= of a bitfield of size one into another bitfield
11166 of size 1. In this case, (unless we need the result of the
11167 assignment) we can do this more efficiently with a
11168 test followed by an assignment, if necessary.
11170 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11171 things change so we do, this code should be enhanced to
11173 if (TREE_CODE (lhs
) == COMPONENT_REF
11174 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11175 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11176 && TREE_OPERAND (rhs
, 0) == lhs
11177 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11178 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11179 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11181 rtx_code_label
*label
= gen_label_rtx ();
11182 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11183 do_jump (TREE_OPERAND (rhs
, 1),
11186 profile_probability::uninitialized ());
11187 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11189 do_pending_stack_adjust ();
11190 emit_label (label
);
11194 expand_assignment (lhs
, rhs
, false);
11199 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11201 case REALPART_EXPR
:
11202 op0
= expand_normal (treeop0
);
11203 return read_complex_part (op0
, false);
11205 case IMAGPART_EXPR
:
11206 op0
= expand_normal (treeop0
);
11207 return read_complex_part (op0
, true);
11214 /* Expanded in cfgexpand.c. */
11215 gcc_unreachable ();
11217 case TRY_CATCH_EXPR
:
11219 case EH_FILTER_EXPR
:
11220 case TRY_FINALLY_EXPR
:
11221 /* Lowered by tree-eh.c. */
11222 gcc_unreachable ();
11224 case WITH_CLEANUP_EXPR
:
11225 case CLEANUP_POINT_EXPR
:
11227 case CASE_LABEL_EXPR
:
11232 case COMPOUND_EXPR
:
11233 case PREINCREMENT_EXPR
:
11234 case PREDECREMENT_EXPR
:
11235 case POSTINCREMENT_EXPR
:
11236 case POSTDECREMENT_EXPR
:
11239 case COMPOUND_LITERAL_EXPR
:
11240 /* Lowered by gimplify.c. */
11241 gcc_unreachable ();
11244 /* Function descriptors are not valid except for as
11245 initialization constants, and should not be expanded. */
11246 gcc_unreachable ();
11248 case WITH_SIZE_EXPR
:
11249 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11250 have pulled out the size to use in whatever context it needed. */
11251 return expand_expr_real (treeop0
, original_target
, tmode
,
11252 modifier
, alt_rtl
, inner_reference_p
);
11255 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11259 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11260 signedness of TYPE), possibly returning the result in TARGET.
11261 TYPE is known to be a partial integer type. */
11263 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11265 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11266 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11268 /* For constant values, reduce using build_int_cst_type. */
11269 if (CONST_INT_P (exp
))
11271 HOST_WIDE_INT value
= INTVAL (exp
);
11272 tree t
= build_int_cst_type (type
, value
);
11273 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11275 else if (TYPE_UNSIGNED (type
))
11277 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11278 rtx mask
= immed_wide_int_const
11279 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11280 return expand_and (mode
, exp
, mask
, target
);
11284 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11285 int count
= GET_MODE_PRECISION (mode
) - prec
;
11286 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11287 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11291 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11292 when applied to the address of EXP produces an address known to be
11293 aligned more than BIGGEST_ALIGNMENT. */
11296 is_aligning_offset (const_tree offset
, const_tree exp
)
11298 /* Strip off any conversions. */
11299 while (CONVERT_EXPR_P (offset
))
11300 offset
= TREE_OPERAND (offset
, 0);
11302 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11303 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11304 if (TREE_CODE (offset
) != BIT_AND_EXPR
11305 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11306 || compare_tree_int (TREE_OPERAND (offset
, 1),
11307 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11308 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11311 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11312 It must be NEGATE_EXPR. Then strip any more conversions. */
11313 offset
= TREE_OPERAND (offset
, 0);
11314 while (CONVERT_EXPR_P (offset
))
11315 offset
= TREE_OPERAND (offset
, 0);
11317 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11320 offset
= TREE_OPERAND (offset
, 0);
11321 while (CONVERT_EXPR_P (offset
))
11322 offset
= TREE_OPERAND (offset
, 0);
11324 /* This must now be the address of EXP. */
11325 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11328 /* Return the tree node if an ARG corresponds to a string constant or zero
11329 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11330 in bytes within the string that ARG is accessing. The type of the
11331 offset will be `sizetype'. */
11334 string_constant (tree arg
, tree
*ptr_offset
)
11336 tree array
, offset
, lower_bound
;
11339 if (TREE_CODE (arg
) == ADDR_EXPR
)
11341 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11343 *ptr_offset
= size_zero_node
;
11344 return TREE_OPERAND (arg
, 0);
11346 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11348 array
= TREE_OPERAND (arg
, 0);
11349 offset
= size_zero_node
;
11351 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11353 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11354 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11355 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11358 /* Check if the array has a nonzero lower bound. */
11359 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11360 if (!integer_zerop (lower_bound
))
11362 /* If the offset and base aren't both constants, return 0. */
11363 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11365 if (TREE_CODE (offset
) != INTEGER_CST
)
11367 /* Adjust offset by the lower bound. */
11368 offset
= size_diffop (fold_convert (sizetype
, offset
),
11369 fold_convert (sizetype
, lower_bound
));
11372 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11374 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11375 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11376 if (TREE_CODE (array
) != ADDR_EXPR
)
11378 array
= TREE_OPERAND (array
, 0);
11379 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11385 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11387 tree arg0
= TREE_OPERAND (arg
, 0);
11388 tree arg1
= TREE_OPERAND (arg
, 1);
11393 if (TREE_CODE (arg0
) == ADDR_EXPR
11394 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11395 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11397 array
= TREE_OPERAND (arg0
, 0);
11400 else if (TREE_CODE (arg1
) == ADDR_EXPR
11401 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11402 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11404 array
= TREE_OPERAND (arg1
, 0);
11413 if (TREE_CODE (array
) == STRING_CST
)
11415 *ptr_offset
= fold_convert (sizetype
, offset
);
11418 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11421 tree init
= ctor_for_folding (array
);
11423 /* Variables initialized to string literals can be handled too. */
11424 if (init
== error_mark_node
11426 || TREE_CODE (init
) != STRING_CST
)
11429 /* Avoid const char foo[4] = "abcde"; */
11430 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11431 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11432 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11433 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11436 /* If variable is bigger than the string literal, OFFSET must be constant
11437 and inside of the bounds of the string literal. */
11438 offset
= fold_convert (sizetype
, offset
);
11439 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11440 && (! tree_fits_uhwi_p (offset
)
11441 || compare_tree_int (offset
, length
) >= 0))
11444 *ptr_offset
= offset
;
11451 /* Generate code to calculate OPS, and exploded expression
11452 using a store-flag instruction and return an rtx for the result.
11453 OPS reflects a comparison.
11455 If TARGET is nonzero, store the result there if convenient.
11457 Return zero if there is no suitable set-flag instruction
11458 available on this machine.
11460 Once expand_expr has been called on the arguments of the comparison,
11461 we are committed to doing the store flag, since it is not safe to
11462 re-evaluate the expression. We emit the store-flag insn by calling
11463 emit_store_flag, but only expand the arguments if we have a reason
11464 to believe that emit_store_flag will be successful. If we think that
11465 it will, but it isn't, we have to simulate the store-flag with a
11466 set/jump/set sequence. */
11469 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11471 enum rtx_code code
;
11472 tree arg0
, arg1
, type
;
11473 machine_mode operand_mode
;
11476 rtx subtarget
= target
;
11477 location_t loc
= ops
->location
;
11482 /* Don't crash if the comparison was erroneous. */
11483 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11486 type
= TREE_TYPE (arg0
);
11487 operand_mode
= TYPE_MODE (type
);
11488 unsignedp
= TYPE_UNSIGNED (type
);
11490 /* We won't bother with BLKmode store-flag operations because it would mean
11491 passing a lot of information to emit_store_flag. */
11492 if (operand_mode
== BLKmode
)
11495 /* We won't bother with store-flag operations involving function pointers
11496 when function pointers must be canonicalized before comparisons. */
11497 if (targetm
.have_canonicalize_funcptr_for_compare ()
11498 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11499 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11501 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11502 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11503 == FUNCTION_TYPE
))))
11509 /* For vector typed comparisons emit code to generate the desired
11510 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11511 expander for this. */
11512 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11514 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11515 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11516 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11517 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11520 tree if_true
= constant_boolean_node (true, ops
->type
);
11521 tree if_false
= constant_boolean_node (false, ops
->type
);
11522 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11527 /* Get the rtx comparison code to use. We know that EXP is a comparison
11528 operation of some type. Some comparisons against 1 and -1 can be
11529 converted to comparisons with zero. Do so here so that the tests
11530 below will be aware that we have a comparison with zero. These
11531 tests will not catch constants in the first operand, but constants
11532 are rarely passed as the first operand. */
11543 if (integer_onep (arg1
))
11544 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11546 code
= unsignedp
? LTU
: LT
;
11549 if (! unsignedp
&& integer_all_onesp (arg1
))
11550 arg1
= integer_zero_node
, code
= LT
;
11552 code
= unsignedp
? LEU
: LE
;
11555 if (! unsignedp
&& integer_all_onesp (arg1
))
11556 arg1
= integer_zero_node
, code
= GE
;
11558 code
= unsignedp
? GTU
: GT
;
11561 if (integer_onep (arg1
))
11562 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11564 code
= unsignedp
? GEU
: GE
;
11567 case UNORDERED_EXPR
:
11593 gcc_unreachable ();
11596 /* Put a constant second. */
11597 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11598 || TREE_CODE (arg0
) == FIXED_CST
)
11600 std::swap (arg0
, arg1
);
11601 code
= swap_condition (code
);
11604 /* If this is an equality or inequality test of a single bit, we can
11605 do this by shifting the bit being tested to the low-order bit and
11606 masking the result with the constant 1. If the condition was EQ,
11607 we xor it with 1. This does not require an scc insn and is faster
11608 than an scc insn even if we have it.
11610 The code to make this transformation was moved into fold_single_bit_test,
11611 so we just call into the folder and expand its result. */
11613 if ((code
== NE
|| code
== EQ
)
11614 && integer_zerop (arg1
)
11615 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11617 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11619 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11621 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11622 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11623 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11624 gimple_assign_rhs1 (srcstmt
),
11625 gimple_assign_rhs2 (srcstmt
));
11626 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11628 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11632 if (! get_subtarget (target
)
11633 || GET_MODE (subtarget
) != operand_mode
)
11636 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11639 target
= gen_reg_rtx (mode
);
11641 /* Try a cstore if possible. */
11642 return emit_store_flag_force (target
, code
, op0
, op1
,
11643 operand_mode
, unsignedp
,
11644 (TYPE_PRECISION (ops
->type
) == 1
11645 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11648 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11649 0 otherwise (i.e. if there is no casesi instruction).
11651 DEFAULT_PROBABILITY is the probability of jumping to the default
11654 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11655 rtx table_label
, rtx default_label
, rtx fallback_label
,
11656 profile_probability default_probability
)
11658 struct expand_operand ops
[5];
11659 scalar_int_mode index_mode
= SImode
;
11660 rtx op1
, op2
, index
;
11662 if (! targetm
.have_casesi ())
11665 /* The index must be some form of integer. Convert it to SImode. */
11666 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11667 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11669 rtx rangertx
= expand_normal (range
);
11671 /* We must handle the endpoints in the original mode. */
11672 index_expr
= build2 (MINUS_EXPR
, index_type
,
11673 index_expr
, minval
);
11674 minval
= integer_zero_node
;
11675 index
= expand_normal (index_expr
);
11677 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11678 omode
, 1, default_label
,
11679 default_probability
);
11680 /* Now we can safely truncate. */
11681 index
= convert_to_mode (index_mode
, index
, 0);
11685 if (omode
!= index_mode
)
11687 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11688 index_expr
= fold_convert (index_type
, index_expr
);
11691 index
= expand_normal (index_expr
);
11694 do_pending_stack_adjust ();
11696 op1
= expand_normal (minval
);
11697 op2
= expand_normal (range
);
11699 create_input_operand (&ops
[0], index
, index_mode
);
11700 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11701 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11702 create_fixed_operand (&ops
[3], table_label
);
11703 create_fixed_operand (&ops
[4], (default_label
11705 : fallback_label
));
11706 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11710 /* Attempt to generate a tablejump instruction; same concept. */
11711 /* Subroutine of the next function.
11713 INDEX is the value being switched on, with the lowest value
11714 in the table already subtracted.
11715 MODE is its expected mode (needed if INDEX is constant).
11716 RANGE is the length of the jump table.
11717 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11719 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11720 index value is out of range.
11721 DEFAULT_PROBABILITY is the probability of jumping to
11722 the default label. */
11725 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11726 rtx default_label
, profile_probability default_probability
)
11730 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11731 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11733 /* Do an unsigned comparison (in the proper mode) between the index
11734 expression and the value which represents the length of the range.
11735 Since we just finished subtracting the lower bound of the range
11736 from the index expression, this comparison allows us to simultaneously
11737 check that the original index expression value is both greater than
11738 or equal to the minimum value of the range and less than or equal to
11739 the maximum value of the range. */
11742 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11743 default_label
, default_probability
);
11746 /* If index is in range, it must fit in Pmode.
11747 Convert to Pmode so we can index with it. */
11749 index
= convert_to_mode (Pmode
, index
, 1);
11751 /* Don't let a MEM slip through, because then INDEX that comes
11752 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11753 and break_out_memory_refs will go to work on it and mess it up. */
11754 #ifdef PIC_CASE_VECTOR_ADDRESS
11755 if (flag_pic
&& !REG_P (index
))
11756 index
= copy_to_mode_reg (Pmode
, index
);
11759 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11760 GET_MODE_SIZE, because this indicates how large insns are. The other
11761 uses should all be Pmode, because they are addresses. This code
11762 could fail if addresses and insns are not the same size. */
11763 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11764 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11766 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11767 gen_rtx_LABEL_REF (Pmode
, table_label
));
11769 #ifdef PIC_CASE_VECTOR_ADDRESS
11771 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11774 index
= memory_address (CASE_VECTOR_MODE
, index
);
11775 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11776 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11777 convert_move (temp
, vector
, 0);
11779 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11781 /* If we are generating PIC code or if the table is PC-relative, the
11782 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11783 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11788 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11789 rtx table_label
, rtx default_label
,
11790 profile_probability default_probability
)
11794 if (! targetm
.have_tablejump ())
11797 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11798 fold_convert (index_type
, index_expr
),
11799 fold_convert (index_type
, minval
));
11800 index
= expand_normal (index_expr
);
11801 do_pending_stack_adjust ();
11803 do_tablejump (index
, TYPE_MODE (index_type
),
11804 convert_modes (TYPE_MODE (index_type
),
11805 TYPE_MODE (TREE_TYPE (range
)),
11806 expand_normal (range
),
11807 TYPE_UNSIGNED (TREE_TYPE (range
))),
11808 table_label
, default_label
, default_probability
);
11812 /* Return a CONST_VECTOR rtx representing vector mask for
11813 a VECTOR_CST of booleans. */
11815 const_vector_mask_from_tree (tree exp
)
11817 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11818 machine_mode inner
= GET_MODE_INNER (mode
);
11820 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11821 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11822 unsigned int count
= builder
.encoded_nelts ();
11823 for (unsigned int i
= 0; i
< count
; ++i
)
11825 tree elt
= VECTOR_CST_ELT (exp
, i
);
11826 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11827 if (integer_zerop (elt
))
11828 builder
.quick_push (CONST0_RTX (inner
));
11829 else if (integer_onep (elt
)
11830 || integer_minus_onep (elt
))
11831 builder
.quick_push (CONSTM1_RTX (inner
));
11833 gcc_unreachable ();
11835 return builder
.build ();
11838 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11839 Return a constant scalar rtx of mode MODE in which bit X is set if element
11840 X of EXP is nonzero. */
11842 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11844 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11848 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11850 elt
= VECTOR_CST_ELT (exp
, i
);
11851 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11852 if (integer_all_onesp (elt
))
11853 res
= wi::set_bit (res
, i
);
11855 gcc_assert (integer_zerop (elt
));
11858 return immed_wide_int_const (res
, mode
);
11861 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11863 const_vector_from_tree (tree exp
)
11865 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11867 if (initializer_zerop (exp
))
11868 return CONST0_RTX (mode
);
11870 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11871 return const_vector_mask_from_tree (exp
);
11873 machine_mode inner
= GET_MODE_INNER (mode
);
11875 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11876 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11877 unsigned int count
= builder
.encoded_nelts ();
11878 for (unsigned int i
= 0; i
< count
; ++i
)
11880 tree elt
= VECTOR_CST_ELT (exp
, i
);
11881 if (TREE_CODE (elt
) == REAL_CST
)
11882 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
11884 else if (TREE_CODE (elt
) == FIXED_CST
)
11885 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11888 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
11891 return builder
.build ();
11894 /* Build a decl for a personality function given a language prefix. */
11897 build_personality_function (const char *lang
)
11899 const char *unwind_and_version
;
11903 switch (targetm_common
.except_unwind_info (&global_options
))
11908 unwind_and_version
= "_sj0";
11912 unwind_and_version
= "_v0";
11915 unwind_and_version
= "_seh0";
11918 gcc_unreachable ();
11921 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11923 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11924 long_long_unsigned_type_node
,
11925 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11926 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11927 get_identifier (name
), type
);
11928 DECL_ARTIFICIAL (decl
) = 1;
11929 DECL_EXTERNAL (decl
) = 1;
11930 TREE_PUBLIC (decl
) = 1;
11932 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11933 are the flags assigned by targetm.encode_section_info. */
11934 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11939 /* Extracts the personality function of DECL and returns the corresponding
11943 get_personality_function (tree decl
)
11945 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11946 enum eh_personality_kind pk
;
11948 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11949 if (pk
== eh_personality_none
)
11953 && pk
== eh_personality_any
)
11954 personality
= lang_hooks
.eh_personality ();
11956 if (pk
== eh_personality_lang
)
11957 gcc_assert (personality
!= NULL_TREE
);
11959 return XEXP (DECL_RTL (personality
), 0);
11962 /* Returns a tree for the size of EXP in bytes. */
11965 tree_expr_size (const_tree exp
)
11968 && DECL_SIZE_UNIT (exp
) != 0)
11969 return DECL_SIZE_UNIT (exp
);
11971 return size_in_bytes (TREE_TYPE (exp
));
11974 /* Return an rtx for the size in bytes of the value of EXP. */
11977 expr_size (tree exp
)
11981 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11982 size
= TREE_OPERAND (exp
, 1);
11985 size
= tree_expr_size (exp
);
11987 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
11990 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
11993 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11994 if the size can vary or is larger than an integer. */
11996 static HOST_WIDE_INT
11997 int_expr_size (tree exp
)
12001 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12002 size
= TREE_OPERAND (exp
, 1);
12005 size
= tree_expr_size (exp
);
12009 if (size
== 0 || !tree_fits_shwi_p (size
))
12012 return tree_to_shwi (size
);