2017-12-01 Richard Biener <rguenther@suse.de>
[official-gcc.git] / gcc / config / aarch64 / aarch64-tuning-flags.def
blobf48642c28089cfdd639cc8434e486954bdaeff1a
1 /* Copyright (C) 2015-2017 Free Software Foundation, Inc.
2 Contributed by ARM Ltd.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* Additional control over certain tuning parameters. Before including
21 this file, define a macro:
23 AARCH64_EXTRA_TUNING_OPTION (name, internal_name)
25 Where:
27 NAME is a string giving a friendly name for the tuning flag.
28 INTERNAL_NAME gives the internal name suitable for appending to
29 AARCH64_TUNE_ to give an enum name. */
31 AARCH64_EXTRA_TUNING_OPTION ("rename_fma_regs", RENAME_FMA_REGS)
33 /* Don't create non-8 byte aligned load/store pair. That is if the
34 two load/stores are not at least 8 byte aligned don't create load/store
35 pairs. */
36 AARCH64_EXTRA_TUNING_OPTION ("slow_unaligned_ldpw", SLOW_UNALIGNED_LDPW)
38 /* Some of the optional shift to some arthematic instructions are
39 considered cheap. Logical shift left <=4 with or without a
40 zero extend are considered cheap. Sign extend; non logical shift left
41 are not considered cheap. */
42 AARCH64_EXTRA_TUNING_OPTION ("cheap_shift_extend", CHEAP_SHIFT_EXTEND)
44 #undef AARCH64_EXTRA_TUNING_OPTION