1 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
3 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
4 long double type, set the flags for noting the default long double
5 type, even if we don't pass or return a long double type.
7 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
10 * ipa-inline.c (flatten_function): Do not overwrite final inlining
13 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
15 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
16 support for merge[hl].
17 (fold_mergehl_helper): New helper function.
18 (tree-vector-builder.h): New #include for tree_vector_builder usage.
19 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
20 (altivec_vmrglw_direct): Add xxmrglw insn.
22 2018-01-17 Andrew Waterman <andrew@sifive.com>
24 * config/riscv/riscv.c (riscv_conditional_register_usage): If
25 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
27 2018-01-17 David Malcolm <dmalcolm@redhat.com>
30 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
31 call the lto_location_cache before reading the
32 DECL_SOURCE_LOCATION of the types.
34 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
35 Richard Sandiford <richard.sandiford@linaro.org>
37 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
38 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
39 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
40 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
41 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
43 * config/aarch64/constraints.md (aarch64_movti_operand):
45 * config/aarch64/predicates.md (Uti): Add new constraint.
47 2018-01-17 Carl Love <cel@us.ibm.com>
48 * config/rs6000/vsx.md (define_expand xl_len_r,
49 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
50 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
52 (define_expand, define_insn): Move the shift left from the
53 define_insn to the define_expand for lxvl and stxvl instructions.
54 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
55 and XL_LEN_R definitions to PURE.
57 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
59 * config/i386/i386.c (indirect_thunk_name): Declare regno
60 as unsigned int. Compare regno with INVALID_REGNUM.
61 (output_indirect_thunk): Ditto.
62 (output_indirect_thunk_function): Ditto.
63 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
64 in the call to output_indirect_thunk_function.
66 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
69 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
70 rather than the size of inner_type to determine the stack slot size
71 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
73 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
76 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
79 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
81 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
82 endian Linux systems to optionally enable multilibs for selecting
83 the long double type if the user configured an explicit type.
84 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
85 have no long double multilibs if not defined.
86 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
87 warn if the user used -mabi={ieee,ibm}longdouble and we built
88 multilibs for long double.
89 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
90 appropriate multilib option.
91 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
93 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
94 for building long double multilibs.
95 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
97 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
99 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
102 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
104 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
107 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
110 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
113 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
115 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
116 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
118 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
120 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
121 different rtl trees depending on TARGET_64BIT.
122 (rs6000_gen_lvx): Likewise.
124 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
126 * config/visium/visium.md (nop): Tweak comment.
127 (hazard_nop): Likewise.
129 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
131 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
132 -mspeculate-indirect-jumps.
133 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
134 for -mno-speculate-indirect-jumps.
135 (*call_indirect_elfv2<mode>_nospec): New define_insn.
136 (*call_value_indirect_elfv2<mode>): Disable for
137 -mno-speculate-indirect-jumps.
138 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
139 (indirect_jump): Emit different RTL for
140 -mno-speculate-indirect-jumps.
141 (*indirect_jump<mode>): Disable for
142 -mno-speculate-indirect-jumps.
143 (*indirect_jump<mode>_nospec): New define_insn.
144 (tablejump): Emit different RTL for
145 -mno-speculate-indirect-jumps.
146 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
147 (tablejumpsi_nospec): New define_expand.
148 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
149 (tablejumpdi_nospec): New define_expand.
150 (*tablejump<mode>_internal1): Disable for
151 -mno-speculate-indirect-jumps.
152 (*tablejump<mode>_internal1_nospec): New define_insn.
153 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
156 2018-01-16 Artyom Skrobov tyomitch@gmail.com
158 * caller-save.c (insert_save): Drop unnecessary parameter. All
161 2018-01-16 Jakub Jelinek <jakub@redhat.com>
162 Richard Biener <rguenth@suse.de>
165 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
166 return early, inline manually is_gimple_sizepos. Make sure if we
167 call gimplify_expr we don't end up with a gimple constant.
168 * tree.c (variably_modified_type_p): Don't return true for
169 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
170 * gimplify.h (is_gimple_sizepos): Remove.
172 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
174 PR tree-optimization/83857
175 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
176 vectorizable_live_operation for pure SLP statements.
177 (vectorizable_live_operation): Handle PHIs.
179 2018-01-16 Richard Biener <rguenther@suse.de>
181 PR tree-optimization/83867
182 * tree-vect-stmts.c (vect_transform_stmt): Precompute
183 nested_in_vect_loop_p since the scalar stmt may get invalidated.
185 2018-01-16 Jakub Jelinek <jakub@redhat.com>
188 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
189 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
190 If off is not INTEGER_CST, issue a may not be aligned warning
191 rather than isn't aligned. Use isn%'t rather than isn't.
192 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
194 <case MULT_EXPR>: Improve the case when bottom and one of the
195 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
196 operand, in that case check if the other operand is multiple of
197 bottom divided by the INTEGER_CST operand.
199 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
202 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
203 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
204 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
205 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
206 * config/pa/pa.c (pa_function_arg_advance): Likewise.
207 (pa_function_arg, pa_arg_partial_bytes): Likewise.
208 (pa_function_arg_size): New function.
210 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
212 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
213 in a separate statement.
215 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
217 PR tree-optimization/83847
218 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
219 group gathers and scatters.
221 2018-01-16 Jakub Jelinek <jakub@redhat.com>
223 PR rtl-optimization/86620
224 * params.def (max-sched-ready-insns): Bump minimum value to 1.
226 PR rtl-optimization/83213
227 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
228 to last if both are JUMP_INSNs.
230 PR tree-optimization/83843
231 * gimple-ssa-store-merging.c
232 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
233 store_immediate_info for bswap/nop orig_stores.
235 2018-01-15 Andrew Waterman <andrew@sifive.com>
237 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
239 <UDIV>: Increase cost if !TARGET_DIV.
241 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
243 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
244 (define_attr "cr_logical_3op"): New.
245 (cceq_ior_compare): Adjust.
246 (cceq_ior_compare_complement): Adjust.
247 (*cceq_rev_compare): Adjust.
248 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
249 (is_cracked_insn): Adjust.
250 (insn_must_be_first_in_group): Adjust.
251 * config/rs6000/40x.md: Adjust.
252 * config/rs6000/440.md: Adjust.
253 * config/rs6000/476.md: Adjust.
254 * config/rs6000/601.md: Adjust.
255 * config/rs6000/603.md: Adjust.
256 * config/rs6000/6xx.md: Adjust.
257 * config/rs6000/7450.md: Adjust.
258 * config/rs6000/7xx.md: Adjust.
259 * config/rs6000/8540.md: Adjust.
260 * config/rs6000/cell.md: Adjust.
261 * config/rs6000/e300c2c3.md: Adjust.
262 * config/rs6000/e500mc.md: Adjust.
263 * config/rs6000/e500mc64.md: Adjust.
264 * config/rs6000/e5500.md: Adjust.
265 * config/rs6000/e6500.md: Adjust.
266 * config/rs6000/mpc.md: Adjust.
267 * config/rs6000/power4.md: Adjust.
268 * config/rs6000/power5.md: Adjust.
269 * config/rs6000/power6.md: Adjust.
270 * config/rs6000/power7.md: Adjust.
271 * config/rs6000/power8.md: Adjust.
272 * config/rs6000/power9.md: Adjust.
273 * config/rs6000/rs64.md: Adjust.
274 * config/rs6000/titan.md: Adjust.
276 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
278 * config/i386/predicates.md (indirect_branch_operand): Rewrite
279 ix86_indirect_branch_register logic.
281 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
283 * config/i386/constraints.md (Bs): Update
284 ix86_indirect_branch_register check. Don't check
285 ix86_indirect_branch_register with GOT_memory_operand.
287 * config/i386/predicates.md (GOT_memory_operand): Don't check
288 ix86_indirect_branch_register here.
289 (GOT32_symbol_operand): Likewise.
291 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
293 * config/i386/predicates.md (constant_call_address_operand):
294 Rewrite ix86_indirect_branch_register logic.
295 (sibcall_insn_operand): Likewise.
297 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
299 * config/i386/constraints.md (Bs): Replace
300 ix86_indirect_branch_thunk_register with
301 ix86_indirect_branch_register.
303 * config/i386/i386.md (indirect_jump): Likewise.
304 (tablejump): Likewise.
305 (*sibcall_memory): Likewise.
306 (*sibcall_value_memory): Likewise.
307 Peepholes of indirect call and jump via memory: Likewise.
308 * config/i386/i386.opt: Likewise.
309 * config/i386/predicates.md (indirect_branch_operand): Likewise.
310 (GOT_memory_operand): Likewise.
311 (call_insn_operand): Likewise.
312 (sibcall_insn_operand): Likewise.
313 (GOT32_symbol_operand): Likewise.
315 2018-01-15 Jakub Jelinek <jakub@redhat.com>
318 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
319 type rather than type addr's type points to.
320 (expand_omp_atomic_mutex): Likewise.
321 (expand_omp_atomic): Likewise.
323 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
326 * config/i386/i386.c (output_indirect_thunk_function): Use
327 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
328 for __x86_return_thunk.
330 2018-01-15 Richard Biener <rguenther@suse.de>
333 * expmed.c (extract_bit_field_1): Fix typo.
335 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
338 * config/arm/iterators.md (VF): New mode iterator.
339 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
340 Remove integer-related logic from pattern.
341 (neon_vabd<mode>_3): Likewise.
343 2018-01-15 Jakub Jelinek <jakub@redhat.com>
346 * common.opt (fstrict-overflow): No longer an alias.
347 (fwrapv-pointer): New option.
348 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
349 also for pointer types based on flag_wrapv_pointer.
350 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
351 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
352 opts->x_flag_wrapv got set.
353 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
354 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
355 POINTER_TYPE_OVERFLOW_UNDEFINED.
356 * match.pd: Likewise in address comparison pattern.
357 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
359 2018-01-15 Richard Biener <rguenther@suse.de>
362 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
363 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
364 Reset type names to their identifier if their TYPE_DECL doesn't
365 have linkage (and thus is used for ODR and devirt).
366 (save_debug_info_for_decl): Remove.
367 (save_debug_info_for_type): Likewise.
368 (add_tree_to_fld_list): Adjust.
369 * tree-pretty-print.c (dump_generic_node): Make dumping of
370 type names more robust.
372 2018-01-15 Richard Biener <rguenther@suse.de>
374 * BASE-VER: Bump to 8.0.1.
376 2018-01-14 Martin Sebor <msebor@redhat.com>
379 * builtins.c (check_access): Avoid warning when the no-warning bit
382 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
384 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
385 * ira-color (allocno_hard_regs_compare): Likewise.
387 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
390 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
391 Use .pushsection/.popsection.
393 2018-01-14 Martin Sebor <msebor@redhat.com>
396 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
398 2018-01-14 Jakub Jelinek <jakub@redhat.com>
400 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
401 entry from extra_headers.
402 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
403 extra_headers, make the list bitwise identical to the i?86-*-* one.
405 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
407 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
408 -mcmodel=large with -mindirect-branch=thunk,
409 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
410 -mfunction-return=thunk-extern.
411 * doc/invoke.texi: Document -mcmodel=large is incompatible with
412 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
413 -mfunction-return=thunk and -mfunction-return=thunk-extern.
415 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
417 * config/i386/i386.c (print_reg): Print the name of the full
418 integer register without '%'.
419 (ix86_print_operand): Handle 'V'.
420 * doc/extend.texi: Document 'V' modifier.
422 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
424 * config/i386/constraints.md (Bs): Disallow memory operand for
425 -mindirect-branch-register.
427 * config/i386/predicates.md (indirect_branch_operand): Likewise.
428 (GOT_memory_operand): Likewise.
429 (call_insn_operand): Likewise.
430 (sibcall_insn_operand): Likewise.
431 (GOT32_symbol_operand): Likewise.
432 * config/i386/i386.md (indirect_jump): Call convert_memory_address
433 for -mindirect-branch-register.
434 (tablejump): Likewise.
435 (*sibcall_memory): Likewise.
436 (*sibcall_value_memory): Likewise.
437 Disallow peepholes of indirect call and jump via memory for
438 -mindirect-branch-register.
439 (*call_pop): Replace m with Bw.
440 (*call_value_pop): Likewise.
441 (*sibcall_pop_memory): Replace m with Bs.
442 * config/i386/i386.opt (mindirect-branch-register): New option.
443 * doc/invoke.texi: Document -mindirect-branch-register option.
445 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
447 * config/i386/i386-protos.h (ix86_output_function_return): New.
448 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
449 set function_return_type.
450 (indirect_thunk_name): Add ret_p to indicate thunk for function
452 (output_indirect_thunk_function): Pass false to
454 (ix86_output_indirect_branch_via_reg): Likewise.
455 (ix86_output_indirect_branch_via_push): Likewise.
456 (output_indirect_thunk_function): Create alias for function
457 return thunk if regno < 0.
458 (ix86_output_function_return): New function.
459 (ix86_handle_fndecl_attribute): Handle function_return.
460 (ix86_attribute_table): Add function_return.
461 * config/i386/i386.h (machine_function): Add
462 function_return_type.
463 * config/i386/i386.md (simple_return_internal): Use
464 ix86_output_function_return.
465 (simple_return_internal_long): Likewise.
466 * config/i386/i386.opt (mfunction-return=): New option.
467 (indirect_branch): Mention -mfunction-return=.
468 * doc/extend.texi: Document function_return function attribute.
469 * doc/invoke.texi: Document -mfunction-return= option.
471 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
473 * config/i386/i386-opts.h (indirect_branch): New.
474 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
475 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
476 with local indirect jump when converting indirect call and jump.
477 (ix86_set_indirect_branch_type): New.
478 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
479 (indirectlabelno): New.
480 (indirect_thunk_needed): Likewise.
481 (indirect_thunk_bnd_needed): Likewise.
482 (indirect_thunks_used): Likewise.
483 (indirect_thunks_bnd_used): Likewise.
484 (INDIRECT_LABEL): Likewise.
485 (indirect_thunk_name): Likewise.
486 (output_indirect_thunk): Likewise.
487 (output_indirect_thunk_function): Likewise.
488 (ix86_output_indirect_branch_via_reg): Likewise.
489 (ix86_output_indirect_branch_via_push): Likewise.
490 (ix86_output_indirect_branch): Likewise.
491 (ix86_output_indirect_jmp): Likewise.
492 (ix86_code_end): Call output_indirect_thunk_function if needed.
493 (ix86_output_call_insn): Call ix86_output_indirect_branch if
495 (ix86_handle_fndecl_attribute): Handle indirect_branch.
496 (ix86_attribute_table): Add indirect_branch.
497 * config/i386/i386.h (machine_function): Add indirect_branch_type
498 and has_local_indirect_jump.
499 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
501 (tablejump): Likewise.
502 (*indirect_jump): Use ix86_output_indirect_jmp.
503 (*tablejump_1): Likewise.
504 (simple_return_indirect_internal): Likewise.
505 * config/i386/i386.opt (mindirect-branch=): New option.
506 (indirect_branch): New.
509 (thunk-inline): Likewise.
510 (thunk-extern): Likewise.
511 * doc/extend.texi: Document indirect_branch function attribute.
512 * doc/invoke.texi: Document -mindirect-branch= option.
514 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
517 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
519 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
521 * ipa-inline.c (want_inline_small_function_p): Return false if
522 inlining has already failed with CIF_FINAL_ERROR.
523 (update_caller_keys): Call want_inline_small_function_p before
525 (update_callee_keys): Likewise.
527 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
529 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
531 (rs6000_quadword_masked_address_p): Likewise.
532 (quad_aligned_load_p): Likewise.
533 (quad_aligned_store_p): Likewise.
534 (const_load_sequence_p): Add comment to describe the outer-most loop.
535 (mimic_memory_attributes_and_flags): New function.
536 (rs6000_gen_stvx): Likewise.
537 (replace_swapped_aligned_store): Likewise.
538 (rs6000_gen_lvx): Likewise.
539 (replace_swapped_aligned_load): Likewise.
540 (replace_swapped_load_constant): Capitalize argument name in
541 comment describing this function.
542 (rs6000_analyze_swaps): Add a third pass to search for vector loads
543 and stores that access quad-word aligned addresses and replace
544 with stvx or lvx instructions when appropriate.
545 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
546 New function prototype.
547 (rs6000_quadword_masked_address_p): Likewise.
548 (rs6000_gen_lvx): Likewise.
549 (rs6000_gen_stvx): Likewise.
550 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
551 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
552 when memory address is aligned.
553 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
554 this split to select lvx instruction when memory address is aligned.
555 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
556 instruction when memory address is aligned.
557 (*vsx_le_perm_load_v16qi): Likewise.
558 (four unnamed splitters): Modify to select the stvx instruction
559 when memory is aligned.
561 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
563 * predict.c (determine_unlikely_bbs): Handle correctly BBs
564 which appears in the queue multiple times.
566 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
567 Alan Hayward <alan.hayward@arm.com>
568 David Sherwood <david.sherwood@arm.com>
570 * tree-vectorizer.h (vec_lower_bound): New structure.
571 (_loop_vec_info): Add check_nonzero and lower_bounds.
572 (LOOP_VINFO_CHECK_NONZERO): New macro.
573 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
574 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
575 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
576 fields. Make seg_len the distance travelled, not including the
578 (dr_direction_indicator): Declare.
579 (dr_zero_step_indicator): Likewise.
580 (dr_known_forward_stride_p): Likewise.
581 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
583 (runtime_alias_check_p): Allow runtime alias checks with
585 (operator ==): Compare access_size and align.
586 (prune_runtime_alias_test_list): Rework for new distinction between
587 the access_size and seg_len.
588 (create_intersect_range_checks_index): Likewise. Cope with polynomial
590 (get_segment_min_max): New function.
591 (create_intersect_range_checks): Use it.
592 (dr_step_indicator): New function.
593 (dr_direction_indicator): Likewise.
594 (dr_zero_step_indicator): Likewise.
595 (dr_known_forward_stride_p): Likewise.
596 * tree-loop-distribution.c (data_ref_segment_size): Return
597 DR_STEP * (niters - 1).
598 (compute_alias_check_pairs): Update call to the dr_with_seg_len
600 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
601 (vect_preserves_scalar_order_p): New function, split out from...
602 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
603 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
604 (vect_vfa_access_size): New function.
605 (vect_vfa_align): Likewise.
606 (vect_compile_time_alias): Take access_size_a and access_b arguments.
607 (dump_lower_bound): New function.
608 (vect_check_lower_bound): Likewise.
609 (vect_small_gap_p): Likewise.
610 (vectorizable_with_step_bound_p): Likewise.
611 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
612 depencies if the vectorization factor is 1. Convert the checks
613 for nonzero steps into checks on the bounds of DR_STEP. Try using
614 a bunds check for variable steps if the minimum required step is
615 relatively small. Update calls to the dr_with_seg_len
616 constructor and to vect_compile_time_alias.
617 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
619 (vect_loop_versioning): Call it.
620 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
622 (vect_estimate_min_profitable_iters): Account for any bounds checks.
624 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
625 Alan Hayward <alan.hayward@arm.com>
626 David Sherwood <david.sherwood@arm.com>
628 * doc/sourcebuild.texi (vect_scatter_store): Document.
629 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
631 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
633 * genopinit.c (main): Add supports_vec_scatter_store and
634 supports_vec_scatter_store_cached to target_optabs.
635 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
636 IFN_MASK_SCATTER_STORE.
637 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
639 * internal-fn.h (internal_store_fn_p): Declare.
640 (internal_fn_stored_value_index): Likewise.
641 * internal-fn.c (scatter_store_direct): New macro.
642 (expand_scatter_store_optab_fn): New function.
643 (direct_scatter_store_optab_supported_p): New macro.
644 (internal_store_fn_p): New function.
645 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
646 IFN_MASK_SCATTER_STORE.
647 (internal_fn_mask_index): Likewise.
648 (internal_fn_stored_value_index): New function.
649 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
651 * optabs-query.h (supports_vec_scatter_store_p): Declare.
652 * optabs-query.c (supports_vec_scatter_store_p): New function.
653 * tree-vectorizer.h (vect_get_store_rhs): Declare.
654 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
655 true for scatter stores.
656 (vect_gather_scatter_fn_p): Handle scatter stores too.
657 (vect_check_gather_scatter): Consider using scatter stores if
658 supports_vec_scatter_store_p.
659 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
661 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
662 internal_fn_stored_value_index.
663 (check_load_store_masking): Handle scatter stores too.
664 (vect_get_store_rhs): Make public.
665 (vectorizable_call): Use internal_store_fn_p.
666 (vectorizable_store): Handle scatter store internal functions.
667 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
668 when deciding whether the end of the group has been reached.
669 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
670 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
671 (mask_scatter_store<mode>): New insns.
673 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
674 Alan Hayward <alan.hayward@arm.com>
675 David Sherwood <david.sherwood@arm.com>
677 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
678 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
679 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
681 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
682 Use vect_truncate_gather_scatter_offset if we can't treat the
683 operation as a normal gather load or scatter store.
684 (get_group_load_store_type): Take the gather_scatter_info
685 as argument. Try using a gather load or scatter store for
686 single-element groups.
687 (get_load_store_type): Update calls to get_group_load_store_type
688 and vect_use_strided_gather_scatters_p.
690 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
691 Alan Hayward <alan.hayward@arm.com>
692 David Sherwood <david.sherwood@arm.com>
694 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
695 optional tree argument.
696 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
698 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
699 but continue to use the current value as a fallback.
700 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
701 to compare the updates.
702 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
703 (get_load_store_type): Use it when handling a strided access.
704 (vect_get_strided_load_store_ops): New function.
705 (vect_get_data_ptr_increment): Likewise.
706 (vectorizable_load): Handle strided gather loads. Always pass
707 a step to vect_create_data_ref_ptr and bump_vector_ptr.
709 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
710 Alan Hayward <alan.hayward@arm.com>
711 David Sherwood <david.sherwood@arm.com>
713 * doc/md.texi (gather_load@var{m}): Document.
714 (mask_gather_load@var{m}): Likewise.
715 * genopinit.c (main): Add supports_vec_gather_load and
716 supports_vec_gather_load_cached to target_optabs.
717 * optabs-tree.c (init_tree_optimization_optabs): Use
718 ggc_cleared_alloc to allocate target_optabs.
719 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
720 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
722 * internal-fn.h (internal_load_fn_p): Declare.
723 (internal_gather_scatter_fn_p): Likewise.
724 (internal_fn_mask_index): Likewise.
725 (internal_gather_scatter_fn_supported_p): Likewise.
726 * internal-fn.c (gather_load_direct): New macro.
727 (expand_gather_load_optab_fn): New function.
728 (direct_gather_load_optab_supported_p): New macro.
729 (direct_internal_fn_optab): New function.
730 (internal_load_fn_p): Likewise.
731 (internal_gather_scatter_fn_p): Likewise.
732 (internal_fn_mask_index): Likewise.
733 (internal_gather_scatter_fn_supported_p): Likewise.
734 * optabs-query.c (supports_at_least_one_mode_p): New function.
735 (supports_vec_gather_load_p): Likewise.
736 * optabs-query.h (supports_vec_gather_load_p): Declare.
737 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
738 and memory_type field.
739 (NUM_PATTERNS): Bump to 15.
740 * tree-vect-data-refs.c: Include internal-fn.h.
741 (vect_gather_scatter_fn_p): New function.
742 (vect_describe_gather_scatter_call): Likewise.
743 (vect_check_gather_scatter): Try using internal functions for
744 gather loads. Recognize existing calls to a gather load function.
745 (vect_analyze_data_refs): Consider using gather loads if
746 supports_vec_gather_load_p.
747 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
748 (vect_get_gather_scatter_offset_type): Likewise.
749 (vect_convert_mask_for_vectype): Likewise.
750 (vect_add_conversion_to_patterm): Likewise.
751 (vect_try_gather_scatter_pattern): Likewise.
752 (vect_recog_gather_scatter_pattern): New pattern recognizer.
753 (vect_vect_recog_func_ptrs): Add it.
754 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
755 internal_fn_mask_index and internal_gather_scatter_fn_p.
756 (check_load_store_masking): Take the gather_scatter_info as an
757 argument and handle gather loads.
758 (vect_get_gather_scatter_ops): New function.
759 (vectorizable_call): Check internal_load_fn_p.
760 (vectorizable_load): Likewise. Handle gather load internal
762 (vectorizable_store): Update call to check_load_store_masking.
763 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
764 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
765 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
766 (aarch64_gather_scale_operand_d): New predicates.
767 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
768 (mask_gather_load<mode>): New insns.
770 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
771 Alan Hayward <alan.hayward@arm.com>
772 David Sherwood <david.sherwood@arm.com>
774 * optabs.def (fold_left_plus_optab): New optab.
775 * doc/md.texi (fold_left_plus_@var{m}): Document.
776 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
777 * internal-fn.c (fold_left_direct): Define.
778 (expand_fold_left_optab_fn): Likewise.
779 (direct_fold_left_optab_supported_p): Likewise.
780 * fold-const-call.c (fold_const_fold_left): New function.
781 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
782 * tree-parloops.c (valid_reduction_p): New function.
783 (gather_scalar_reductions): Use it.
784 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
785 (vect_finish_replace_stmt): Declare.
786 * tree-vect-loop.c (fold_left_reduction_fn): New function.
787 (needs_fold_left_reduction_p): New function, split out from...
788 (vect_is_simple_reduction): ...here. Accept reductions that
789 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
790 (vect_force_simple_reduction): Also store the reduction type in
791 the assignment's STMT_VINFO_REDUC_TYPE.
792 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
793 (merge_with_identity): New function.
794 (vect_expand_fold_left): Likewise.
795 (vectorize_fold_left_reduction): Likewise.
796 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
797 scalar phi in place for it. Check for target support and reject
798 cases that would reassociate the operation. Defer the transform
799 phase to vectorize_fold_left_reduction.
800 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
801 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
802 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
804 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
806 * tree-if-conv.c (predicate_mem_writes): Remove redundant
807 call to ifc_temp_var.
809 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
810 Alan Hayward <alan.hayward@arm.com>
811 David Sherwood <david.sherwood@arm.com>
813 * target.def (legitimize_address_displacement): Take the original
814 offset as a poly_int.
815 * targhooks.h (default_legitimize_address_displacement): Update
817 * targhooks.c (default_legitimize_address_displacement): Likewise.
818 * doc/tm.texi: Regenerate.
819 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
820 as an argument, moving assert of ad->disp == ad->disp_term to...
821 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
822 Try calling targetm.legitimize_address_displacement before expanding
823 the address rather than afterwards, and adjust for the new interface.
824 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
825 Match the new hook interface. Handle SVE addresses.
826 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
829 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
831 * Makefile.in (OBJS): Add early-remat.o.
832 * target.def (select_early_remat_modes): New hook.
833 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
834 * doc/tm.texi: Regenerate.
835 * targhooks.h (default_select_early_remat_modes): Declare.
836 * targhooks.c (default_select_early_remat_modes): New function.
837 * timevar.def (TV_EARLY_REMAT): New timevar.
838 * passes.def (pass_early_remat): New pass.
839 * tree-pass.h (make_pass_early_remat): Declare.
840 * early-remat.c: New file.
841 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
843 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
845 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
846 Alan Hayward <alan.hayward@arm.com>
847 David Sherwood <david.sherwood@arm.com>
849 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
850 vfm1 with a bound_epilog parameter.
851 (vect_do_peeling): Update calls accordingly, and move the prologue
852 call earlier in the function. Treat the base bound_epilog as 0 for
853 fully-masked loops and retain vf - 1 for other loops. Add 1 to
854 this base when peeling for gaps.
855 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
856 with fully-masked loops.
857 (vect_estimate_min_profitable_iters): Handle the single peeled
858 iteration in that case.
860 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
861 Alan Hayward <alan.hayward@arm.com>
862 David Sherwood <david.sherwood@arm.com>
864 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
865 single-element interleaving even if the size is not a power of 2.
866 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
867 accesses for single-element interleaving if the group size is
870 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
871 Alan Hayward <alan.hayward@arm.com>
872 David Sherwood <david.sherwood@arm.com>
874 * doc/md.texi (fold_extract_last_@var{m}): Document.
875 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
876 * optabs.def (fold_extract_last_optab): New optab.
877 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
878 * internal-fn.c (fold_extract_direct): New macro.
879 (expand_fold_extract_optab_fn): Likewise.
880 (direct_fold_extract_optab_supported_p): Likewise.
881 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
882 * tree-vect-loop.c (vect_model_reduction_cost): Handle
883 EXTRACT_LAST_REDUCTION.
884 (get_initial_def_for_reduction): Do not create an initial vector
885 for EXTRACT_LAST_REDUCTION reductions.
886 (vectorizable_reduction): Leave the scalar phi in place for
887 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
888 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
889 epilogue code for EXTRACT_LAST_REDUCTION and defer the
890 transform phase to vectorizable_condition.
891 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
893 (vect_finish_stmt_generation): ...here.
894 (vect_finish_replace_stmt): New function.
895 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
896 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
898 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
900 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
901 Alan Hayward <alan.hayward@arm.com>
902 David Sherwood <david.sherwood@arm.com>
904 * doc/md.texi (extract_last_@var{m}): Document.
905 * optabs.def (extract_last_optab): New optab.
906 * internal-fn.def (EXTRACT_LAST): New internal function.
907 * internal-fn.c (cond_unary_direct): New macro.
908 (expand_cond_unary_optab_fn): Likewise.
909 (direct_cond_unary_optab_supported_p): Likewise.
910 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
911 loops using EXTRACT_LAST.
912 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
913 (extract_last_<mode>): ...this optab.
914 (vec_extract<mode><Vel>): Update accordingly.
916 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
917 Alan Hayward <alan.hayward@arm.com>
918 David Sherwood <david.sherwood@arm.com>
920 * target.def (empty_mask_is_expensive): New hook.
921 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
922 * doc/tm.texi: Regenerate.
923 * targhooks.h (default_empty_mask_is_expensive): Declare.
924 * targhooks.c (default_empty_mask_is_expensive): New function.
925 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
926 if the target says that empty masks are expensive.
927 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
929 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
931 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
932 Alan Hayward <alan.hayward@arm.com>
933 David Sherwood <david.sherwood@arm.com>
935 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
936 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
937 (vect_use_loop_mask_for_alignment_p): New function.
938 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
939 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
940 niters_skip argument. Make sure that the first niters_skip elements
941 of the first iteration are inactive.
942 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
943 Update call to vect_set_loop_masks_directly.
944 (get_misalign_in_elems): New function, split out from...
945 (vect_gen_prolog_loop_niters): ...here.
946 (vect_update_init_of_dr): Take a code argument that specifies whether
947 the adjustment should be added or subtracted.
948 (vect_update_init_of_drs): Likewise.
949 (vect_prepare_for_masked_peels): New function.
950 (vect_do_peeling): Skip prologue peeling if we're using a mask
951 instead. Update call to vect_update_inits_of_drs.
952 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
954 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
955 alignment. Do not include the number of peeled iterations in
956 the minimum threshold in that case.
957 (vectorizable_induction): Adjust the start value down by
958 LOOP_VINFO_MASK_SKIP_NITERS iterations.
959 (vect_transform_loop): Call vect_prepare_for_masked_peels.
960 Take the number of skipped iterations into account when calculating
962 * tree-vect-stmts.c (vect_gen_while_not): New function.
964 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
965 Alan Hayward <alan.hayward@arm.com>
966 David Sherwood <david.sherwood@arm.com>
968 * doc/sourcebuild.texi (vect_fully_masked): Document.
969 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
971 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
973 (vect_analyze_loop_2): ...here. Don't check the vectorization
974 factor against the number of loop iterations if the loop is
977 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
978 Alan Hayward <alan.hayward@arm.com>
979 David Sherwood <david.sherwood@arm.com>
981 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
982 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
983 (dump_groups): Update accordingly.
984 (iv_use::mem_type): New member variable.
985 (address_p): New function.
986 (record_use): Add a mem_type argument and initialize the new
988 (record_group_use): Add a mem_type argument. Use address_p.
989 Remove obsolete null checks of base_object. Update call to record_use.
990 (find_interesting_uses_op): Update call to record_group_use.
991 (find_interesting_uses_cond): Likewise.
992 (find_interesting_uses_address): Likewise.
993 (get_mem_type_for_internal_fn): New function.
994 (find_address_like_use): Likewise.
995 (find_interesting_uses_stmt): Try find_address_like_use before
996 calling find_interesting_uses_op.
997 (addr_offset_valid_p): Use the iv mem_type field as the type
998 of the addressed memory.
999 (add_autoinc_candidates): Likewise.
1000 (get_address_cost): Likewise.
1001 (split_small_address_groups_p): Use address_p.
1002 (split_address_groups): Likewise.
1003 (add_iv_candidate_for_use): Likewise.
1004 (autoinc_possible_for_pair): Likewise.
1005 (rewrite_groups): Likewise.
1006 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1007 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1008 (get_alias_ptr_type_for_ptr_address): New function.
1009 (rewrite_use_address): Rewrite address uses in calls that were
1010 identified by find_address_like_use.
1012 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1013 Alan Hayward <alan.hayward@arm.com>
1014 David Sherwood <david.sherwood@arm.com>
1016 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1018 * gimple-expr.h (is_gimple_addressable: Likewise.
1019 * gimple-expr.c (is_gimple_address): Likewise.
1020 * internal-fn.c (expand_call_mem_ref): New function.
1021 (expand_mask_load_optab_fn): Use it.
1022 (expand_mask_store_optab_fn): Likewise.
1024 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1025 Alan Hayward <alan.hayward@arm.com>
1026 David Sherwood <david.sherwood@arm.com>
1028 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1029 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1030 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1031 (cond_umax@var{mode}): Document.
1032 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1033 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1034 (cond_umin_optab, cond_umax_optab): New optabs.
1035 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1036 (COND_IOR, COND_XOR): New internal functions.
1037 * internal-fn.h (get_conditional_internal_fn): Declare.
1038 * internal-fn.c (cond_binary_direct): New macro.
1039 (expand_cond_binary_optab_fn): Likewise.
1040 (direct_cond_binary_optab_supported_p): Likewise.
1041 (get_conditional_internal_fn): New function.
1042 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1043 Cope with reduction statements that are vectorized as calls rather
1045 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1046 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1047 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1048 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1049 (UNSPEC_COND_EOR): New unspecs.
1050 (optab): Add mappings for them.
1051 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1052 (sve_int_op, sve_fp_op): New int attributes.
1054 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1055 Alan Hayward <alan.hayward@arm.com>
1056 David Sherwood <david.sherwood@arm.com>
1058 * optabs.def (while_ult_optab): New optab.
1059 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1060 * internal-fn.def (WHILE_ULT): New internal function.
1061 * internal-fn.h (direct_internal_fn_supported_p): New override
1062 that takes two types as argument.
1063 * internal-fn.c (while_direct): New macro.
1064 (expand_while_optab_fn): New function.
1065 (convert_optab_supported_p): Likewise.
1066 (direct_while_optab_supported_p): New macro.
1067 * wide-int.h (wi::udiv_ceil): New function.
1068 * tree-vectorizer.h (rgroup_masks): New structure.
1069 (vec_loop_masks): New typedef.
1070 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1072 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1073 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1074 (vect_max_vf): New function.
1075 (slpeel_make_loop_iterate_ntimes): Delete.
1076 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1077 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1078 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1079 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1080 internal-fn.h, stor-layout.h and optabs-query.h.
1081 (vect_set_loop_mask): New function.
1082 (add_preheader_seq): Likewise.
1083 (add_header_seq): Likewise.
1084 (interleave_supported_p): Likewise.
1085 (vect_maybe_permute_loop_masks): Likewise.
1086 (vect_set_loop_masks_directly): Likewise.
1087 (vect_set_loop_condition_masked): Likewise.
1088 (vect_set_loop_condition_unmasked): New function, split out from
1089 slpeel_make_loop_iterate_ntimes.
1090 (slpeel_make_loop_iterate_ntimes): Rename to..
1091 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1092 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1093 (vect_do_peeling): Update call accordingly.
1094 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1096 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1097 mask_compare_type, can_fully_mask_p and fully_masked_p.
1098 (release_vec_loop_masks): New function.
1099 (_loop_vec_info): Use it to free the loop masks.
1100 (can_produce_all_loop_masks_p): New function.
1101 (vect_get_max_nscalars_per_iter): Likewise.
1102 (vect_verify_full_masking): Likewise.
1103 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1104 retries, and free the mask rgroups before retrying. Check loop-wide
1105 reasons for disallowing fully-masked loops. Make the final decision
1106 about whether use a fully-masked loop or not.
1107 (vect_estimate_min_profitable_iters): Do not assume that peeling
1108 for the number of iterations will be needed for fully-masked loops.
1109 (vectorizable_reduction): Disable fully-masked loops.
1110 (vectorizable_live_operation): Likewise.
1111 (vect_halve_mask_nunits): New function.
1112 (vect_double_mask_nunits): Likewise.
1113 (vect_record_loop_mask): Likewise.
1114 (vect_get_loop_mask): Likewise.
1115 (vect_transform_loop): Handle the case in which the final loop
1116 iteration might handle a partial vector. Call vect_set_loop_condition
1117 instead of slpeel_make_loop_iterate_ntimes.
1118 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1119 (check_load_store_masking): New function.
1120 (prepare_load_store_mask): Likewise.
1121 (vectorizable_store): Handle fully-masked loops.
1122 (vectorizable_load): Likewise.
1123 (supportable_widening_operation): Use vect_halve_mask_nunits for
1125 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1126 (vect_gen_while): New function.
1127 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1128 (aarch64_uqdec<mode>): New insn.
1130 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1131 Alan Hayward <alan.hayward@arm.com>
1132 David Sherwood <david.sherwood@arm.com>
1134 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1135 (reduc_xor_scal_optab): New optabs.
1136 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1137 (reduc_xor_scal_@var{m}): Document.
1138 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1139 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1141 * fold-const-call.c (fold_const_call): Handle them.
1142 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1143 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1144 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1145 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1146 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1147 (UNSPEC_XORV): New unspecs.
1148 (optab): Add entries for them.
1149 (BITWISEV): New int iterator.
1150 (bit_reduc_op): New int attributes.
1152 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1153 Alan Hayward <alan.hayward@arm.com>
1154 David Sherwood <david.sherwood@arm.com>
1156 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1157 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1158 * optabs.def (vec_shl_insert_optab): New optab.
1159 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1160 (duplicate_and_interleave): Likewise.
1161 * tree-vect-loop.c: Include internal-fn.h.
1162 (neutral_op_for_slp_reduction): New function, split out from
1163 get_initial_defs_for_reduction.
1164 (get_initial_def_for_reduction): Handle option 2 for variable-length
1165 vectors by loading the neutral value into a vector and then shifting
1166 the initial value into element 0.
1167 (get_initial_defs_for_reduction): Replace the code argument with
1168 the neutral value calculated by neutral_op_for_slp_reduction.
1169 Use gimple_build_vector for constant-length vectors.
1170 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1171 but the first group_size elements have a neutral value.
1172 Use duplicate_and_interleave otherwise.
1173 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1174 Update call to get_initial_defs_for_reduction. Handle SLP
1175 reductions for variable-length vectors by creating one vector
1176 result for each scalar result, with the elements associated
1177 with other scalar results stubbed out with the neutral value.
1178 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1179 Require IFN_VEC_SHL_INSERT for double reductions on
1180 variable-length vectors, or SLP reductions that have
1181 a neutral value. Require can_duplicate_and_interleave_p
1182 support for variable-length unchained SLP reductions if there
1183 is no neutral value, such as for MIN/MAX reductions. Also require
1184 the number of vector elements to be a multiple of the number of
1185 SLP statements when doing variable-length unchained SLP reductions.
1186 Update call to vect_create_epilog_for_reduction.
1187 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1188 and remove initial values.
1189 (duplicate_and_interleave): Make public.
1190 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1191 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1193 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1194 Alan Hayward <alan.hayward@arm.com>
1195 David Sherwood <david.sherwood@arm.com>
1197 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1198 (can_duplicate_and_interleave_p): New function.
1199 (vect_get_and_check_slp_defs): Take the vector of statements
1200 rather than just the current one. Remove excess parentheses.
1201 Restriction rejectinon of vect_constant_def and vect_external_def
1202 for variable-length vectors to boolean types, or types for which
1203 can_duplicate_and_interleave_p is false.
1204 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1205 (duplicate_and_interleave): New function.
1206 (vect_get_constant_vectors): Use gimple_build_vector for
1207 constant-length vectors and suitable variable-length constant
1208 vectors. Use duplicate_and_interleave for other variable-length
1209 vectors. Don't defer the update when inserting new statements.
1211 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1212 Alan Hayward <alan.hayward@arm.com>
1213 David Sherwood <david.sherwood@arm.com>
1215 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1216 min_profitable_iters doesn't go negative.
1218 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1219 Alan Hayward <alan.hayward@arm.com>
1220 David Sherwood <david.sherwood@arm.com>
1222 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1223 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1224 * optabs.def (vec_mask_load_lanes_optab): New optab.
1225 (vec_mask_store_lanes_optab): Likewise.
1226 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1227 (MASK_STORE_LANES): Likewise.
1228 * internal-fn.c (mask_load_lanes_direct): New macro.
1229 (mask_store_lanes_direct): Likewise.
1230 (expand_mask_load_optab_fn): Handle masked operations.
1231 (expand_mask_load_lanes_optab_fn): New macro.
1232 (expand_mask_store_optab_fn): Handle masked operations.
1233 (expand_mask_store_lanes_optab_fn): New macro.
1234 (direct_mask_load_lanes_optab_supported_p): Likewise.
1235 (direct_mask_store_lanes_optab_supported_p): Likewise.
1236 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1238 (vect_load_lanes_supported): Likewise.
1239 * tree-vect-data-refs.c (strip_conversion): New function.
1240 (can_group_stmts_p): Likewise.
1241 (vect_analyze_data_ref_accesses): Use it instead of checking
1242 for a pair of assignments.
1243 (vect_store_lanes_supported): Take a masked_p parameter.
1244 (vect_load_lanes_supported): Likewise.
1245 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1246 vect_store_lanes_supported and vect_load_lanes_supported.
1247 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1248 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1249 parameter. Don't allow gaps for masked accesses.
1250 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1251 and vect_load_lanes_supported.
1252 (get_load_store_type): Take a masked_p parameter and update
1253 call to get_group_load_store_type.
1254 (vectorizable_store): Update call to get_load_store_type.
1255 Handle IFN_MASK_STORE_LANES.
1256 (vectorizable_load): Update call to get_load_store_type.
1257 Handle IFN_MASK_LOAD_LANES.
1259 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1260 Alan Hayward <alan.hayward@arm.com>
1261 David Sherwood <david.sherwood@arm.com>
1263 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1265 * config/aarch64/aarch64-protos.h
1266 (aarch64_sve_struct_memory_operand_p): Declare.
1267 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1268 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1269 (VPRED, vpred): Handle SVE structure modes.
1270 * config/aarch64/constraints.md (Utx): New constraint.
1271 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1272 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1273 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1274 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1275 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1276 structure modes. Split into pieces after RA.
1277 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1278 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1280 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1281 SVE structure modes.
1282 (aarch64_classify_address): Likewise.
1283 (sizetochar): Move earlier in file.
1284 (aarch64_print_operand): Handle SVE register lists.
1285 (aarch64_array_mode): New function.
1286 (aarch64_sve_struct_memory_operand_p): Likewise.
1287 (TARGET_ARRAY_MODE): Redefine.
1289 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1290 Alan Hayward <alan.hayward@arm.com>
1291 David Sherwood <david.sherwood@arm.com>
1293 * target.def (array_mode): New target hook.
1294 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1295 * doc/tm.texi: Regenerate.
1296 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1297 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1298 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1300 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1303 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1304 Alan Hayward <alan.hayward@arm.com>
1305 David Sherwood <david.sherwood@arm.com>
1307 * fold-const.c (fold_binary_loc): Check the argument types
1308 rather than the result type when testing for a vector operation.
1310 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1312 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1313 * doc/tm.texi: Regenerate.
1315 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1316 Alan Hayward <alan.hayward@arm.com>
1317 David Sherwood <david.sherwood@arm.com>
1319 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1320 (sve): Document new AArch64 extension.
1321 * doc/md.texi (w): Extend the description of the AArch64
1322 constraint to include SVE vectors.
1323 (Upl, Upa): Document new AArch64 predicate constraints.
1324 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1326 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1327 (msve-vector-bits=): New option.
1328 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1329 SVE when these are disabled.
1330 (sve): New extension.
1331 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1332 modes. Adjust their number of units based on aarch64_sve_vg.
1333 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1334 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1335 aarch64_addr_query_type.
1336 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1337 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1338 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1339 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1340 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1341 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1342 (aarch64_simd_imm_zero_p): Delete.
1343 (aarch64_check_zero_based_sve_index_immediate): Declare.
1344 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1345 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1346 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1347 (aarch64_sve_float_mul_immediate_p): Likewise.
1348 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1350 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1351 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1352 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1353 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1354 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1355 (aarch64_regmode_natural_size): Likewise.
1356 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1357 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1359 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1360 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1361 for VG and the SVE predicate registers.
1362 (V_ALIASES): Add a "z"-prefixed alias.
1363 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1364 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1365 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1366 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1367 (REG_CLASS_NAMES): Add entries for them.
1368 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1369 and the predicate registers.
1370 (aarch64_sve_vg): Declare.
1371 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1372 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1373 (REGMODE_NATURAL_SIZE): Define.
1374 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1376 * config/aarch64/aarch64.c: Include cfgrtl.h.
1377 (simd_immediate_info): Add a constructor for series vectors,
1378 and an associated step field.
1379 (aarch64_sve_vg): New variable.
1380 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1381 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1382 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1383 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1384 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1385 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1386 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1387 (aarch64_get_mask_mode): New functions.
1388 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1389 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1390 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1391 predicate modes and predicate registers. Explicitly restrict
1392 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1393 to store a vector mode if it is recognized by
1394 aarch64_classify_vector_mode.
1395 (aarch64_regmode_natural_size): New function.
1396 (aarch64_hard_regno_caller_save_mode): Return the original mode
1398 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1399 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1400 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1401 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1403 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1404 does not overlap dest if the function is frame-related. Handle
1406 (aarch64_split_add_offset): New function.
1407 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1408 them aarch64_add_offset.
1409 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1410 and update call to aarch64_sub_sp.
1411 (aarch64_add_cfa_expression): New function.
1412 (aarch64_expand_prologue): Pass extra temporary registers to the
1413 functions above. Handle the case in which we need to emit new
1414 DW_CFA_expressions for registers that were originally saved
1415 relative to the stack pointer, but now have to be expressed
1416 relative to the frame pointer.
1417 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1419 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1420 IP0 and IP1 values for SVE frames.
1421 (aarch64_expand_vec_series): New function.
1422 (aarch64_expand_sve_widened_duplicate): Likewise.
1423 (aarch64_expand_sve_const_vector): Likewise.
1424 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1425 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1426 into the register, rather than emitting a SET directly.
1427 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1428 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1429 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1430 (offset_9bit_signed_scaled_p): New functions.
1431 (aarch64_replicate_bitmask_imm): New function.
1432 (aarch64_bitmask_imm): Use it.
1433 (aarch64_cannot_force_const_mem): Reject expressions involving
1434 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1435 (aarch64_classify_index): Handle SVE indices, by requiring
1436 a plain register index with a scale that matches the element size.
1437 (aarch64_classify_address): Handle SVE addresses. Assert that
1438 the mode of the address is VOIDmode or an integer mode.
1439 Update call to aarch64_classify_symbol.
1440 (aarch64_classify_symbolic_expression): Update call to
1441 aarch64_classify_symbol.
1442 (aarch64_const_vec_all_in_range_p): New function.
1443 (aarch64_print_vector_float_operand): Likewise.
1444 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1445 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1446 and the FP immediates 1.0 and 0.5.
1447 (aarch64_print_address_internal): Handle SVE addresses.
1448 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1449 (aarch64_regno_regclass): Handle predicate registers.
1450 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1452 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1453 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1454 (aarch64_convert_sve_vector_bits): New function.
1455 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1456 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1458 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1459 Handle SVE vector and predicate modes. Accept VL-based constants
1460 that need only one temporary register, and VL offsets that require
1461 no temporary registers.
1462 (aarch64_conditional_register_usage): Mark the predicate registers
1463 as fixed if SVE isn't available.
1464 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1465 Return true for SVE vector and predicate modes.
1466 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1467 rather than an unsigned int. Handle SVE modes.
1468 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1470 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1472 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1473 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1474 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1475 (aarch64_sve_float_mul_immediate_p): New functions.
1476 (aarch64_sve_valid_immediate): New function.
1477 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1478 Explicitly reject structure modes. Check for INDEX constants.
1479 Handle PTRUE and PFALSE constants.
1480 (aarch64_check_zero_based_sve_index_immediate): New function.
1481 (aarch64_simd_imm_zero_p): Delete.
1482 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1483 vector modes. Accept constants in the range of CNT[BHWD].
1484 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1485 ask for an Advanced SIMD mode.
1486 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1487 (aarch64_simd_vector_alignment): Handle SVE predicates.
1488 (aarch64_vectorize_preferred_vector_alignment): New function.
1489 (aarch64_simd_vector_alignment_reachable): Use it instead of
1491 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1492 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1494 (MAX_VECT_LEN): Delete.
1495 (expand_vec_perm_d): Add a vec_flags field.
1496 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1497 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1498 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1500 (aarch64_evpc_rev): Rename to...
1501 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1502 (aarch64_evpc_rev_global): New function.
1503 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1504 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1506 (aarch64_evpc_sve_tbl): New function.
1507 (aarch64_expand_vec_perm_const_1): Update after rename of
1508 aarch64_evpc_rev. Handle SVE permutes too, trying
1509 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1510 than aarch64_evpc_tbl.
1511 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1512 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1513 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1514 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1515 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1516 (aarch64_expand_sve_vcond): New functions.
1517 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1518 of aarch64_vector_mode_p.
1519 (aarch64_dwarf_poly_indeterminate_value): New function.
1520 (aarch64_compute_pressure_classes): Likewise.
1521 (aarch64_can_change_mode_class): Likewise.
1522 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1523 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1524 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1525 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1526 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1527 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1528 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1529 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1531 (Dn, Dl, Dr): Accept const as well as const_vector.
1532 (Dz): Likewise. Compare against CONST0_RTX.
1533 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1534 of "vector" where appropriate.
1535 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1536 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1537 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1538 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1539 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1540 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1541 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1542 (v_int_equiv): Extend to SVE modes.
1543 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1545 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1546 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1547 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1548 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1549 (SVE_COND_FP_CMP): New int iterators.
1550 (perm_hilo): Handle the new unpack unspecs.
1551 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1553 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1554 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1555 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1556 (aarch64_equality_operator, aarch64_constant_vector_operand)
1557 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1558 (aarch64_sve_nonimmediate_operand): Likewise.
1559 (aarch64_sve_general_operand): Likewise.
1560 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1561 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1562 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1563 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1564 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1565 (aarch64_sve_float_arith_immediate): Likewise.
1566 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1567 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1568 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1569 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1570 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1571 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1572 (aarch64_sve_float_arith_operand): Likewise.
1573 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1574 (aarch64_sve_float_mul_operand): Likewise.
1575 (aarch64_sve_vec_perm_operand): Likewise.
1576 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1577 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1578 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1579 as well as const_vector.
1580 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1581 in file. Use CONST0_RTX and CONSTM1_RTX.
1582 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1583 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1584 Use aarch64_simd_imm_zero.
1585 * config/aarch64/aarch64-sve.md: New file.
1586 * config/aarch64/aarch64.md: Include it.
1587 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1588 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1589 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1590 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1591 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1592 (sve): New attribute.
1593 (enabled): Disable instructions with the sve attribute unless
1595 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1596 aarch64_expand_mov_immediate.
1597 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1598 CNT[BHSD] immediates.
1599 (movti): Split CONST_POLY_INT moves into two halves.
1600 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1601 Split additions that need a temporary here if the destination
1602 is the stack pointer.
1603 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1604 (*add<mode>3_poly_1): New instruction.
1605 (set_clobber_cc): New expander.
1607 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1609 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1610 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1611 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1612 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1613 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1614 Change innermode from fixed_mode_size to machine_mode.
1615 (simplify_subreg): Update call accordingly. Handle a constant-sized
1616 subreg of a variable-length CONST_VECTOR.
1618 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1619 Alan Hayward <alan.hayward@arm.com>
1620 David Sherwood <david.sherwood@arm.com>
1622 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1623 (add_offset_to_base): New function, split out from...
1624 (create_mem_ref): ...here. When handling a scale other than 1,
1625 check first whether the address is valid without the offset.
1626 Add it into the base if so, leaving the index and scale as-is.
1628 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1631 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1632 fold_for_warn before checking if arg2 is INTEGER_CST.
1634 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1636 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1637 (store_multiple_operation): Delete.
1638 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1639 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1640 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1641 guarded by TARGET_STRING.
1642 (rs6000_output_load_multiple): Delete.
1643 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1644 OPTION_MASK_STRING / TARGET_STRING handling.
1645 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1646 (const rs6000_opt_masks) <"string">: Change mask to 0.
1647 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1648 (MASK_STRING): Delete.
1649 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1651 (load_multiple): Delete.
1658 (store_multiple): Delete.
1665 (movmemsi_8reg): Delete.
1666 (corresponding unnamed define_insn): Delete.
1667 (movmemsi_6reg): Delete.
1668 (corresponding unnamed define_insn): Delete.
1669 (movmemsi_4reg): Delete.
1670 (corresponding unnamed define_insn): Delete.
1671 (movmemsi_2reg): Delete.
1672 (corresponding unnamed define_insn): Delete.
1673 (movmemsi_1reg): Delete.
1674 (corresponding unnamed define_insn): Delete.
1675 * config/rs6000/rs6000.opt (mno-string): New.
1676 (mstring): Replace by deprecation warning stub.
1677 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1679 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1681 * regrename.c (regrename_do_replace): If replacing the same
1682 reg multiple times, try to reuse last created gen_raw_REG.
1685 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1686 main to workaround a bug in GDB.
1688 2018-01-12 Tom de Vries <tom@codesourcery.com>
1691 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1693 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1695 PR rtl-optimization/80481
1696 * ira-color.c (get_cap_member): New function.
1697 (allocnos_conflict_by_live_ranges_p): Use it.
1698 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1699 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1701 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1704 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1705 (*saddl_se_1): Ditto.
1707 (*ssubl_se_1): Ditto.
1709 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1711 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1712 rather than wi::to_widest for DR_INITs.
1713 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1714 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1715 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1717 (vect_analyze_group_access_1): Note that here.
1719 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1721 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1722 polynomial type sizes.
1724 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1726 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1727 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1728 (gimple_add_tmp_var): Likewise.
1730 2018-01-12 Martin Liska <mliska@suse.cz>
1732 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1733 (gimple_alloc_sizes): Likewise.
1734 (dump_gimple_statistics): Use PRIu64 in printf format.
1735 * gimple.h: Change uint64_t to int.
1737 2018-01-12 Martin Liska <mliska@suse.cz>
1739 * tree-core.h: Use uint64_t instead of int.
1740 * tree.c (tree_node_counts): Likewise.
1741 (tree_node_sizes): Likewise.
1742 (dump_tree_statistics): Use PRIu64 in printf format.
1744 2018-01-12 Martin Liska <mliska@suse.cz>
1746 * Makefile.in: As qsort_chk is implemented in vec.c, add
1747 vec.o to linkage of gencfn-macros.
1748 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1749 passing the info to record_node_allocation_statistics.
1750 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1752 * ggc-common.c (struct ggc_usage): Add operator== and use
1753 it in operator< and compare function.
1754 * mem-stats.h (struct mem_usage): Likewise.
1755 * vec.c (struct vec_usage): Remove operator< and compare
1756 function. Can be simply inherited.
1758 2018-01-12 Martin Jambor <mjambor@suse.cz>
1761 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1762 * tree-ssa-math-opts.c: Include domwalk.h.
1763 (convert_mult_to_fma_1): New function.
1764 (fma_transformation_info): New type.
1765 (fma_deferring_state): Likewise.
1766 (cancel_fma_deferring): New function.
1767 (result_of_phi): Likewise.
1768 (last_fma_candidate_feeds_initial_phi): Likewise.
1769 (convert_mult_to_fma): Added deferring logic, split actual
1770 transformation to convert_mult_to_fma_1.
1771 (math_opts_dom_walker): New type.
1772 (math_opts_dom_walker::after_dom_children): New method, body moved
1773 here from pass_optimize_widening_mul::execute, added deferring logic
1775 (pass_optimize_widening_mul::execute): Moved most of code to
1776 math_opts_dom_walker::after_dom_children.
1777 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1778 * config/i386/i386.c (ix86_option_override_internal): Added
1779 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1781 2018-01-12 Richard Biener <rguenther@suse.de>
1784 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1785 inline instance vars.
1787 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1790 * config/rx/rx.c (rx_is_restricted_memory_address):
1793 2018-01-12 Richard Biener <rguenther@suse.de>
1795 PR tree-optimization/80846
1796 * target.def (split_reduction): New target hook.
1797 * targhooks.c (default_split_reduction): New function.
1798 * targhooks.h (default_split_reduction): Declare.
1799 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1800 target requests first reduce vectors by combining low and high
1802 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1803 (get_vectype_for_scalar_type_and_size): Export.
1804 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1805 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1806 * doc/tm.texi: Regenerate.
1807 * config/i386/i386.c (ix86_split_reduction): Implement
1808 TARGET_VECTORIZE_SPLIT_REDUCTION.
1810 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1813 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1814 in PIC mode except for TARGET_VXWORKS_RTP.
1815 * config/sparc/sparc.c: Include cfgrtl.h.
1816 (TARGET_INIT_PIC_REG): Define.
1817 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1818 (sparc_pic_register_p): New predicate.
1819 (sparc_legitimate_address_p): Use it.
1820 (sparc_legitimize_pic_address): Likewise.
1821 (sparc_delegitimize_address): Likewise.
1822 (sparc_mode_dependent_address_p): Likewise.
1823 (gen_load_pcrel_sym): Remove 4th parameter.
1824 (load_got_register): Adjust call to above. Remove obsolete stuff.
1825 (sparc_expand_prologue): Do not call load_got_register here.
1826 (sparc_flat_expand_prologue): Likewise.
1827 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1828 (sparc_use_pseudo_pic_reg): New function.
1829 (sparc_init_pic_reg): Likewise.
1830 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1831 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1833 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1835 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1836 Add item for branch_cost.
1838 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1840 PR rtl-optimization/83565
1841 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1842 not extend the result to a larger mode for rotate operations.
1843 (num_sign_bit_copies1): Likewise.
1845 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1848 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1850 Use values-Xc.o for -pedantic.
1851 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1853 2018-01-12 Martin Liska <mliska@suse.cz>
1856 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1858 (possible_polymorphic_call_targets): Use it.
1859 (ipa_devirt): Likewise.
1861 2018-01-12 Martin Liska <mliska@suse.cz>
1863 * profile-count.h (enum profile_quality): Use 0 as invalid
1864 enum value of profile_quality.
1866 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1868 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1869 -mext-string options.
1871 2018-01-12 Richard Biener <rguenther@suse.de>
1873 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1874 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1875 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1877 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1879 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1881 * configure.ac (--with-long-double-format): Add support for the
1882 configuration option to change the default long double format on
1884 * config.gcc (powerpc*-linux*-*): Likewise.
1885 * configure: Regenerate.
1886 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1887 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1888 used without modification.
1890 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1892 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1893 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1894 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1895 MISC_BUILTIN_SPEC_BARRIER.
1896 (rs6000_init_builtins): Likewise.
1897 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1899 (speculation_barrier): New define_insn.
1900 * doc/extend.texi: Document __builtin_speculation_barrier.
1902 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1905 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1906 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1907 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1909 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1910 integral modes instead of "ss" and "sd".
1911 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1912 vectors with 32-bit and 64-bit elements.
1913 (vecdupssescalarmodesuffix): New mode attribute.
1914 (vec_dup<mode>): Use it.
1916 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1919 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1920 frame if argument is passed on stack.
1922 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1925 * ree.c (combine_reaching_defs): Optimize also
1926 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1927 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1929 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1932 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1934 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1937 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1938 after they are computed.
1940 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1942 PR tree-optimization/83695
1943 * gimple-loop-linterchange.cc
1944 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1945 reset cached scev information after interchange.
1946 (pass_linterchange::execute): Remove call to scev_reset_htab.
1948 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1950 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1951 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1952 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1953 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1954 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1955 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1956 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1957 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1958 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1959 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1960 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1961 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1962 (V_lane_reg): Likewise.
1963 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1965 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1966 (vfmal_lane_low<mode>_intrinsic,
1967 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1968 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1969 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1970 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1971 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1972 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1974 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1976 * config/arm/arm-cpus.in (fp16fml): New feature.
1977 (ALL_SIMD): Add fp16fml.
1978 (armv8.2-a): Add fp16fml as an option.
1979 (armv8.3-a): Likewise.
1980 (armv8.4-a): Add fp16fml as part of fp16.
1981 * config/arm/arm.h (TARGET_FP16FML): Define.
1982 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1984 * config/arm/arm-modes.def (V2HF): Define.
1985 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1986 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1987 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1988 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1989 vfmsl_low, vfmsl_high): New set of builtins.
1990 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1991 (vfml_op): New code attribute.
1992 (VFMLHALVES): New int iterator.
1993 (VFML, VFMLSEL): New mode attributes.
1994 (V_reg): Define mapping for V2HF.
1995 (V_hi, V_lo): New mode attributes.
1996 (VF_constraint): Likewise.
1997 (vfml_half, vfml_half_selector): New int attributes.
1998 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2000 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2001 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2003 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2004 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2005 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2006 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2008 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2009 Document new effective target and option set.
2011 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2013 * config/arm/arm-cpus.in (armv8_4): New feature.
2014 (ARMv8_4a): New fgroup.
2015 (armv8.4-a): New arch.
2016 * config/arm/arm-tables.opt: Regenerate.
2017 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2018 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2019 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2020 Add matching rules for -march=armv8.4-a and extensions.
2021 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2023 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2026 * config/rx/rx.md (BW): New mode attribute.
2027 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2029 2018-01-11 Richard Biener <rguenther@suse.de>
2031 PR tree-optimization/83435
2032 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2033 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2034 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2036 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2037 Alan Hayward <alan.hayward@arm.com>
2038 David Sherwood <david.sherwood@arm.com>
2040 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2042 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2043 (aarch64_print_address_internal): Use it to check for a zero offset.
2045 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2046 Alan Hayward <alan.hayward@arm.com>
2047 David Sherwood <david.sherwood@arm.com>
2049 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2050 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2051 Return a poly_int64 rather than a HOST_WIDE_INT.
2052 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2053 rather than a HOST_WIDE_INT.
2054 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2055 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2056 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2057 final_offset from HOST_WIDE_INT to poly_int64.
2058 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2059 to_constant when getting the number of units in an Advanced SIMD
2061 (aarch64_builtin_vectorized_function): Check for a constant number
2063 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2065 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2066 attribute instead of GET_MODE_NUNITS.
2067 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2068 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2069 GET_MODE_SIZE for fixed-size registers.
2070 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2071 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2072 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2073 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2074 (aarch64_print_operand, aarch64_print_address_internal)
2075 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2076 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2077 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2078 Handle polynomial GET_MODE_SIZE.
2079 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2080 wider than SImode without modification.
2081 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2082 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2083 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2084 passing and returning SVE modes.
2085 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2086 rather than GEN_INT.
2087 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2088 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2089 (aarch64_allocate_and_probe_stack_space): Likewise.
2090 (aarch64_layout_frame): Cope with polynomial offsets.
2091 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2092 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2094 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2095 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2096 poly_int64 rather than a HOST_WIDE_INT.
2097 (aarch64_get_separate_components, aarch64_process_components)
2098 (aarch64_expand_prologue, aarch64_expand_epilogue)
2099 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2100 (aarch64_anchor_offset): New function, split out from...
2101 (aarch64_legitimize_address): ...here.
2102 (aarch64_builtin_vectorization_cost): Handle polynomial
2103 TYPE_VECTOR_SUBPARTS.
2104 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2106 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2107 number of elements from the PARALLEL rather than the mode.
2108 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2109 rather than GET_MODE_BITSIZE.
2110 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2111 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2112 (aarch64_expand_vec_perm_const_1): Handle polynomial
2113 d->perm.length () and d->perm elements.
2114 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2115 Apply to_constant to d->perm elements.
2116 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2117 polynomial CONST_VECTOR_NUNITS.
2118 (aarch64_move_pointer): Take amount as a poly_int64 rather
2120 (aarch64_progress_pointer): Avoid temporary variable.
2121 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2122 the mode attribute instead of GET_MODE.
2124 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2125 Alan Hayward <alan.hayward@arm.com>
2126 David Sherwood <david.sherwood@arm.com>
2128 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2129 x exists before using it.
2130 (aarch64_add_constant_internal): Rename to...
2131 (aarch64_add_offset_1): ...this. Replace regnum with separate
2132 src and dest rtxes. Handle the case in which they're different,
2133 including when the offset is zero. Replace scratchreg with an rtx.
2134 Use 2 additions if there is no spare register into which we can
2135 move a 16-bit constant.
2136 (aarch64_add_constant): Delete.
2137 (aarch64_add_offset): Replace reg with separate src and dest
2138 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2139 Use aarch64_add_offset_1.
2140 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2141 an rtx rather than an int. Take the delta as a poly_int64
2142 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2143 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2144 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2145 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2146 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2148 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2149 aarch64_add_constant.
2151 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2153 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2154 Use scalar_float_mode.
2156 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2158 * config/aarch64/aarch64-simd.md
2159 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2160 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2161 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2162 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2163 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2164 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2165 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2166 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2167 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2168 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2170 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2173 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2174 targ_options->x_arm_arch_string is non NULL.
2176 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2178 * config/aarch64/aarch64.h
2179 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2181 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2184 * expmed.c (emit_store_flag_force): Swap if const op0
2185 and change VOIDmode to mode of op0.
2187 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2189 PR rtl-optimization/83761
2190 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2191 than bytes to mode_for_size.
2193 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2196 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2197 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2200 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2203 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2204 when in layout mode.
2205 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2206 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2209 2018-01-10 Michael Collison <michael.collison@arm.com>
2211 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2212 * config/aarch64/aarch64-option-extension.def: Add
2213 AARCH64_OPT_EXTENSION of 'fp16fml'.
2214 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2215 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2216 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2217 * config/aarch64/constraints.md (Ui7): New constraint.
2218 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2219 (VFMLA_SEL_W): Ditto.
2222 (VFMLA16_LOW): New int iterator.
2223 (VFMLA16_HIGH): Ditto.
2224 (UNSPEC_FMLAL): New unspec.
2225 (UNSPEC_FMLSL): Ditto.
2226 (UNSPEC_FMLAL2): Ditto.
2227 (UNSPEC_FMLSL2): Ditto.
2228 (f16mac): New code attribute.
2229 * config/aarch64/aarch64-simd-builtins.def
2230 (aarch64_fmlal_lowv2sf): Ditto.
2231 (aarch64_fmlsl_lowv2sf): Ditto.
2232 (aarch64_fmlalq_lowv4sf): Ditto.
2233 (aarch64_fmlslq_lowv4sf): Ditto.
2234 (aarch64_fmlal_highv2sf): Ditto.
2235 (aarch64_fmlsl_highv2sf): Ditto.
2236 (aarch64_fmlalq_highv4sf): Ditto.
2237 (aarch64_fmlslq_highv4sf): Ditto.
2238 (aarch64_fmlal_lane_lowv2sf): Ditto.
2239 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2240 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2241 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2242 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2243 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2244 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2245 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2246 (aarch64_fmlal_lane_highv2sf): Ditto.
2247 (aarch64_fmlsl_lane_highv2sf): Ditto.
2248 (aarch64_fmlal_laneq_highv2sf): Ditto.
2249 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2250 (aarch64_fmlalq_lane_highv4sf): Ditto.
2251 (aarch64_fmlsl_lane_highv4sf): Ditto.
2252 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2253 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2254 * config/aarch64/aarch64-simd.md:
2255 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2256 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2257 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2258 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2259 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2260 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2261 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2262 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2263 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2264 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2265 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2266 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2267 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2268 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2269 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2270 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2271 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2272 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2273 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2274 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2275 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2276 (vfmlsl_low_u32): Ditto.
2277 (vfmlalq_low_u32): Ditto.
2278 (vfmlslq_low_u32): Ditto.
2279 (vfmlal_high_u32): Ditto.
2280 (vfmlsl_high_u32): Ditto.
2281 (vfmlalq_high_u32): Ditto.
2282 (vfmlslq_high_u32): Ditto.
2283 (vfmlal_lane_low_u32): Ditto.
2284 (vfmlsl_lane_low_u32): Ditto.
2285 (vfmlal_laneq_low_u32): Ditto.
2286 (vfmlsl_laneq_low_u32): Ditto.
2287 (vfmlalq_lane_low_u32): Ditto.
2288 (vfmlslq_lane_low_u32): Ditto.
2289 (vfmlalq_laneq_low_u32): Ditto.
2290 (vfmlslq_laneq_low_u32): Ditto.
2291 (vfmlal_lane_high_u32): Ditto.
2292 (vfmlsl_lane_high_u32): Ditto.
2293 (vfmlal_laneq_high_u32): Ditto.
2294 (vfmlsl_laneq_high_u32): Ditto.
2295 (vfmlalq_lane_high_u32): Ditto.
2296 (vfmlslq_lane_high_u32): Ditto.
2297 (vfmlalq_laneq_high_u32): Ditto.
2298 (vfmlslq_laneq_high_u32): Ditto.
2299 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2300 (AARCH64_FL_FOR_ARCH8_4): New.
2301 (AARCH64_ISA_F16FML): New ISA flag.
2302 (TARGET_F16FML): New feature flag for fp16fml.
2303 (doc/invoke.texi): Document new fp16fml option.
2305 2018-01-10 Michael Collison <michael.collison@arm.com>
2307 * config/aarch64/aarch64-builtins.c:
2308 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2309 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2310 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2311 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2312 (AARCH64_ISA_SHA3): New ISA flag.
2313 (TARGET_SHA3): New feature flag for sha3.
2314 * config/aarch64/iterators.md (sha512_op): New int attribute.
2315 (CRYPTO_SHA512): New int iterator.
2316 (UNSPEC_SHA512H): New unspec.
2317 (UNSPEC_SHA512H2): Ditto.
2318 (UNSPEC_SHA512SU0): Ditto.
2319 (UNSPEC_SHA512SU1): Ditto.
2320 * config/aarch64/aarch64-simd-builtins.def
2321 (aarch64_crypto_sha512hqv2di): New builtin.
2322 (aarch64_crypto_sha512h2qv2di): Ditto.
2323 (aarch64_crypto_sha512su0qv2di): Ditto.
2324 (aarch64_crypto_sha512su1qv2di): Ditto.
2325 (aarch64_eor3qv8hi): Ditto.
2326 (aarch64_rax1qv2di): Ditto.
2327 (aarch64_xarqv2di): Ditto.
2328 (aarch64_bcaxqv8hi): Ditto.
2329 * config/aarch64/aarch64-simd.md:
2330 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2331 (aarch64_crypto_sha512su0qv2di): Ditto.
2332 (aarch64_crypto_sha512su1qv2di): Ditto.
2333 (aarch64_eor3qv8hi): Ditto.
2334 (aarch64_rax1qv2di): Ditto.
2335 (aarch64_xarqv2di): Ditto.
2336 (aarch64_bcaxqv8hi): Ditto.
2337 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2338 (vsha512h2q_u64): Ditto.
2339 (vsha512su0q_u64): Ditto.
2340 (vsha512su1q_u64): Ditto.
2341 (veor3q_u16): Ditto.
2342 (vrax1q_u64): Ditto.
2344 (vbcaxq_u16): Ditto.
2345 * config/arm/types.md (crypto_sha512): New type attribute.
2346 (crypto_sha3): Ditto.
2347 (doc/invoke.texi): Document new sha3 option.
2349 2018-01-10 Michael Collison <michael.collison@arm.com>
2351 * config/aarch64/aarch64-builtins.c:
2352 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2353 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2354 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2355 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2356 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2357 (AARCH64_ISA_SM4): New ISA flag.
2358 (TARGET_SM4): New feature flag for sm4.
2359 * config/aarch64/aarch64-simd-builtins.def
2360 (aarch64_sm3ss1qv4si): Ditto.
2361 (aarch64_sm3tt1aq4si): Ditto.
2362 (aarch64_sm3tt1bq4si): Ditto.
2363 (aarch64_sm3tt2aq4si): Ditto.
2364 (aarch64_sm3tt2bq4si): Ditto.
2365 (aarch64_sm3partw1qv4si): Ditto.
2366 (aarch64_sm3partw2qv4si): Ditto.
2367 (aarch64_sm4eqv4si): Ditto.
2368 (aarch64_sm4ekeyqv4si): Ditto.
2369 * config/aarch64/aarch64-simd.md:
2370 (aarch64_sm3ss1qv4si): Ditto.
2371 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2372 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2373 (aarch64_sm4eqv4si): Ditto.
2374 (aarch64_sm4ekeyqv4si): Ditto.
2375 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2376 (sm3part_op): Ditto.
2377 (CRYPTO_SM3TT): Ditto.
2378 (CRYPTO_SM3PART): Ditto.
2379 (UNSPEC_SM3SS1): New unspec.
2380 (UNSPEC_SM3TT1A): Ditto.
2381 (UNSPEC_SM3TT1B): Ditto.
2382 (UNSPEC_SM3TT2A): Ditto.
2383 (UNSPEC_SM3TT2B): Ditto.
2384 (UNSPEC_SM3PARTW1): Ditto.
2385 (UNSPEC_SM3PARTW2): Ditto.
2386 (UNSPEC_SM4E): Ditto.
2387 (UNSPEC_SM4EKEY): Ditto.
2388 * config/aarch64/constraints.md (Ui2): New constraint.
2389 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2390 * config/arm/types.md (crypto_sm3): New type attribute.
2391 (crypto_sm4): Ditto.
2392 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2393 (vsm3tt1aq_u32): Ditto.
2394 (vsm3tt1bq_u32): Ditto.
2395 (vsm3tt2aq_u32): Ditto.
2396 (vsm3tt2bq_u32): Ditto.
2397 (vsm3partw1q_u32): Ditto.
2398 (vsm3partw2q_u32): Ditto.
2399 (vsm4eq_u32): Ditto.
2400 (vsm4ekeyq_u32): Ditto.
2401 (doc/invoke.texi): Document new sm4 option.
2403 2018-01-10 Michael Collison <michael.collison@arm.com>
2405 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2406 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2407 (AARCH64_FL_FOR_ARCH8_4): New.
2408 (AARCH64_FL_V8_4): New flag.
2409 (doc/invoke.texi): Document new armv8.4-a option.
2411 2018-01-10 Michael Collison <michael.collison@arm.com>
2413 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2414 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2415 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2416 * config/aarch64/aarch64-option-extension.def: Add
2417 AARCH64_OPT_EXTENSION of 'sha2'.
2418 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2419 (crypto): Disable sha2 and aes if crypto disabled.
2420 (crypto): Enable aes and sha2 if enabled.
2421 (simd): Disable sha2 and aes if simd disabled.
2422 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2424 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2425 (TARGET_SHA2): New feature flag for sha2.
2426 (TARGET_AES): New feature flag for aes.
2427 * config/aarch64/aarch64-simd.md:
2428 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2429 conditional on TARGET_AES.
2430 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2431 (aarch64_crypto_sha1hsi): Make pattern conditional
2433 (aarch64_crypto_sha1hv4si): Ditto.
2434 (aarch64_be_crypto_sha1hv4si): Ditto.
2435 (aarch64_crypto_sha1su1v4si): Ditto.
2436 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2437 (aarch64_crypto_sha1su0v4si): Ditto.
2438 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2439 (aarch64_crypto_sha256su0v4si): Ditto.
2440 (aarch64_crypto_sha256su1v4si): Ditto.
2441 (doc/invoke.texi): Document new aes and sha2 options.
2443 2018-01-10 Martin Sebor <msebor@redhat.com>
2445 PR tree-optimization/83781
2446 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2449 2018-01-11 Martin Sebor <msebor@gmail.com>
2450 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2452 PR tree-optimization/83501
2453 PR tree-optimization/81703
2455 * tree-ssa-strlen.c (get_string_cst): Rename...
2456 (get_string_len): ...to this. Handle global constants.
2457 (handle_char_store): Adjust.
2459 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2460 Jim Wilson <jimw@sifive.com>
2462 * config/riscv/riscv-protos.h (riscv_output_return): New.
2463 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2464 (riscv_attribute_table, riscv_output_return),
2465 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2466 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2467 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2469 (riscv_expand_prologue): Add early return for naked function.
2470 (riscv_expand_epilogue): Likewise.
2471 (riscv_function_ok_for_sibcall): Return false for naked function.
2472 (riscv_set_current_function): New.
2473 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2474 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2475 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2476 * doc/extend.texi (RISC-V Function Attributes): New.
2478 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2480 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2481 check for 128-bit long double before checking TCmode.
2482 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2483 128-bit long doubles before checking TFmode or TCmode.
2484 (FLOAT128_IBM_P): Likewise.
2486 2018-01-10 Martin Sebor <msebor@redhat.com>
2488 PR tree-optimization/83671
2489 * builtins.c (c_strlen): Unconditionally return zero for the empty
2491 Use -Warray-bounds for warnings.
2492 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2493 for non-constant array indices with COMPONENT_REF, arrays of
2494 arrays, and pointers to arrays.
2495 (gimple_fold_builtin_strlen): Determine and set length range for
2496 non-constant character arrays.
2498 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2501 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2504 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2506 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2508 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2511 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2512 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2513 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2514 indexed_or_indirect_operand predicate.
2515 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2516 (*vsx_le_perm_load_v8hi): Likewise.
2517 (*vsx_le_perm_load_v16qi): Likewise.
2518 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2519 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2520 (*vsx_le_perm_store_v8hi): Likewise.
2521 (*vsx_le_perm_store_v16qi): Likewise.
2522 (eight unnamed splitters): Likewise.
2524 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2526 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2527 * config/rs6000/emmintrin.h: Likewise.
2528 * config/rs6000/mmintrin.h: Likewise.
2529 * config/rs6000/xmmintrin.h: Likewise.
2531 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2534 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2536 * tree.c (tree_nop_conversion): Return true for location wrapper
2538 (maybe_wrap_with_location): New function.
2539 (selftest::check_strip_nops): New function.
2540 (selftest::test_location_wrappers): New function.
2541 (selftest::tree_c_tests): Call it.
2542 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2543 (maybe_wrap_with_location): New decl.
2544 (EXPR_LOCATION_WRAPPER_P): New macro.
2545 (location_wrapper_p): New inline function.
2546 (tree_strip_any_location_wrapper): New inline function.
2548 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2551 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2552 stack_realign_offset for the largest alignment of stack slot
2554 (ix86_find_max_used_stack_alignment): New function.
2555 (ix86_finalize_stack_frame_flags): Use it. Set
2556 max_used_stack_alignment if we don't realign stack.
2557 * config/i386/i386.h (machine_function): Add
2558 max_used_stack_alignment.
2560 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2562 * config/arm/arm.opt (-mbranch-cost): New option.
2563 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2566 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2569 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2570 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2572 2018-01-10 Richard Biener <rguenther@suse.de>
2575 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2576 early out so it also covers the case where we have a non-NULL
2579 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2581 PR tree-optimization/83753
2582 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2583 for non-strided grouped accesses if the number of elements is 1.
2585 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2588 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2589 * i386.h (TARGET_USE_GATHER): Define.
2590 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2592 2018-01-10 Martin Liska <mliska@suse.cz>
2595 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2596 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2598 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2599 CLEANUP_NO_PARTITIONING is not set.
2601 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2603 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2604 for vectors, as a partial revert of r254296.
2605 * rtl.h (const_vec_p): Delete.
2606 (const_vec_duplicate_p): Don't test for vector CONSTs.
2607 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2608 * expmed.c (make_tree): Likewise.
2611 * common.md (E, F): Use CONSTANT_P instead of checking for
2613 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2614 checking for CONST_VECTOR.
2616 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2619 * predict.c (force_edge_cold): Handle in more sane way edges
2622 2018-01-09 Carl Love <cel@us.ibm.com>
2624 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2626 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2627 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2628 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2629 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2630 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2631 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2632 * config/rs6000/rs6000-protos.h: Add extern defition for
2633 rs6000_generate_float2_double_code.
2634 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2636 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2637 (float2_v2df): Add define_expand.
2639 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2642 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2643 op_mode in the force_to_mode call.
2645 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2647 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2648 instead of checking each element individually.
2649 (aarch64_evpc_uzp): Likewise.
2650 (aarch64_evpc_zip): Likewise.
2651 (aarch64_evpc_ext): Likewise.
2652 (aarch64_evpc_rev): Likewise.
2653 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2654 instead of checking each element individually. Return true without
2656 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2657 whether all selected elements come from the same input, instead of
2658 checking each element individually. Remove calls to gen_rtx_REG,
2659 start_sequence and end_sequence and instead assert that no rtl is
2662 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2664 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2665 order of HIGH and CONST checks.
2667 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2669 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2670 if the destination isn't an SSA_NAME.
2672 2018-01-09 Richard Biener <rguenther@suse.de>
2674 PR tree-optimization/83668
2675 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2677 (canonicalize_loop_form): ... here, renamed from ...
2678 (canonicalize_loop_closed_ssa_form): ... this and amended to
2679 swap successor edges for loop exit blocks to make us use
2680 the RPO order we need for initial schedule generation.
2682 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2684 PR tree-optimization/64811
2685 * match.pd: When optimizing comparisons with Inf, avoid
2686 introducing or losing exceptions from comparisons with NaN.
2688 2018-01-09 Martin Liska <mliska@suse.cz>
2691 * asan.c (shadow_mem_size): Add gcc_assert.
2693 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2695 Don't save registers in main().
2698 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2699 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2700 * config/avr/avr.c (avr_set_current_function): Don't error if
2701 naked, OS_task or OS_main are specified at the same time.
2702 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2704 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2706 * common/config/avr/avr-common.c (avr_option_optimization_table):
2707 Switch on -mmain-is-OS_task for optimizing compilations.
2709 2018-01-09 Richard Biener <rguenther@suse.de>
2711 PR tree-optimization/83572
2712 * graphite.c: Include cfganal.h.
2713 (graphite_transform_loops): Connect infinite loops to exit
2714 and remove fake edges at the end.
2716 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2718 * ipa-inline.c (edge_badness): Revert accidental checkin.
2720 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2723 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2724 symbols; not inline clones.
2726 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2729 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2730 hard registers. Formatting fixes.
2732 PR preprocessor/83722
2733 * gcc.c (try_generate_repro): Pass
2734 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2735 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2738 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2739 Kito Cheng <kito.cheng@gmail.com>
2741 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2742 (riscv_leaf_function_p): Delete.
2743 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2745 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2747 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2749 (do_ifelse): New function.
2750 (do_isel): New function.
2751 (do_sub3): New function.
2752 (do_add3): New function.
2753 (do_load_mask_compare): New function.
2754 (do_overlap_load_compare): New function.
2755 (expand_compare_loop): New function.
2756 (expand_block_compare): Call expand_compare_loop() when appropriate.
2757 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2759 (-mblock-compare-inline-loop-limit): New option.
2761 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2764 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2765 Reverse order of second and third operands in first alternative.
2766 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2767 of first and second elements in UNSPEC_VPERMR vector.
2768 (altivec_expand_vec_perm_le): Likewise.
2770 2017-01-08 Jeff Law <law@redhat.com>
2772 PR rtl-optimizatin/81308
2773 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2774 (process_switch): If group_case_labels makes a change, then set
2776 (pass_convert_switch::execute): If a switch is converted, then
2777 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2779 PR rtl-optimization/81308
2780 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2783 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2785 PR target/83663 - Revert r255946
2786 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2787 generation for cases where splatting a value is not useful.
2788 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2789 across a vec_duplicate and a paradoxical subreg forming a vector
2790 mode to a vec_concat.
2792 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2794 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2795 -march=armv8.3-a variants.
2796 * config/arm/t-multilib: Likewise.
2797 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2799 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2801 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2803 (cceq_ior_compare_complement): Give it a name so I can use it, and
2804 change boolean_or_operator predicate to boolean_operator so it can
2805 be used to generate a crand.
2806 (eqne): New code iterator.
2807 (bd/bd_neg): New code_attrs.
2808 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2809 a single define_insn.
2810 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2811 decrement (bdnzt/bdnzf/bdzt/bdzf).
2812 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2813 with the new names of the branch decrement patterns, and added the
2814 names of the branch decrement conditional patterns.
2816 2018-01-08 Richard Biener <rguenther@suse.de>
2818 PR tree-optimization/83563
2819 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2822 2018-01-08 Richard Biener <rguenther@suse.de>
2825 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2827 2018-01-08 Richard Biener <rguenther@suse.de>
2829 PR tree-optimization/83685
2830 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2831 references to abnormals.
2833 2018-01-08 Richard Biener <rguenther@suse.de>
2836 * dwarf2out.c (output_indirect_strings): Handle empty
2837 skeleton_debug_str_hash.
2838 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2840 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2842 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2843 (emit_store_direct): Likewise.
2844 (arc_trampoline_adjust_address): Likewise.
2845 (arc_asm_trampoline_template): New function.
2846 (arc_initialize_trampoline): Use asm_trampoline_template.
2847 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2848 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2849 * config/arc/arc.md (flush_icache): Delete pattern.
2851 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2853 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2854 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2857 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2860 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2861 by not USED_FOR_TARGET.
2862 (make_pass_resolve_sw_modes): Likewise.
2864 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2866 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2869 2018-01-08 Richard Biener <rguenther@suse.de>
2872 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2874 2018-01-08 Richard Biener <rguenther@suse.de>
2877 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2879 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2882 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2883 basic blocks with a small number of successors.
2884 (convert_control_dep_chain_into_preds): Improve handling of
2886 (dump_predicates): Split apart into...
2887 (dump_pred_chain): ...here...
2888 (dump_pred_info): ...and here.
2889 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2890 (can_chain_union_be_invalidated_p): Improve check for invalidation
2892 (uninit_uses_cannot_happen): Avoid unnecessary if
2893 convert_control_dep_chain_into_preds yielded nothing.
2895 2018-01-06 Martin Sebor <msebor@redhat.com>
2897 PR tree-optimization/83640
2898 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2899 subtracting negative offset from size.
2900 (builtin_access::overlap): Adjust offset bounds of the access to fall
2901 within the size of the object if possible.
2903 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2905 PR rtl-optimization/83699
2906 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2907 extract_bit_field_as_subreg to cases in which the extracted
2908 value is also a vector.
2910 * lra-constraints.c (process_alt_operands): Test for the equivalence
2911 substitutions when detecting a possible reload cycle.
2913 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2916 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2917 by default if flag_selective_schedling{,2}. Formatting fixes.
2919 PR rtl-optimization/83682
2920 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2921 if it has non-VECTOR_MODE element mode.
2922 (vec_duplicate_p): Likewise.
2925 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2926 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2928 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2931 * config/i386/i386-builtin.def
2932 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2933 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2934 Require also OPTION_MASK_ISA_AVX512F in addition to
2935 OPTION_MASK_ISA_GFNI.
2936 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2937 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2938 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2939 to OPTION_MASK_ISA_GFNI.
2940 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2941 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2942 OPTION_MASK_ISA_AVX512BW.
2943 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2944 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2945 addition to OPTION_MASK_ISA_GFNI.
2946 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2947 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2948 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2949 to OPTION_MASK_ISA_GFNI.
2950 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2951 a requirement for all ISAs rather than any of them with a few
2953 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2955 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2956 bitmasks to be enabled with 3 exceptions, instead of requiring any
2957 enabled ISA with lots of exceptions.
2958 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2959 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2960 Change avx512bw in isa attribute to avx512f.
2961 * config/i386/sgxintrin.h: Add license boilerplate.
2962 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2963 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2964 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2965 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2967 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2968 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2969 temporarily sse2 rather than sse if not enabled already.
2972 * config/i386/sse.md (VI248_VLBW): Rename to ...
2973 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2974 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2975 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2976 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2977 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2978 mode iterator instead of VI248_VLBW.
2980 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2982 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2983 (record_modified): Skip clobbers; add debug output.
2984 (param_change_prob): Use sreal frequencies.
2986 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2988 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2989 punt for user-aligned variables.
2991 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2993 * tree-chrec.c (chrec_contains_symbols): Return true for
2996 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2999 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3000 of (x|y) == x for BICS pattern.
3002 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3004 PR tree-optimization/83605
3005 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3006 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3009 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3011 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3012 * config/epiphany/rtems.h: New file.
3014 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3015 Uros Bizjak <ubizjak@gmail.com>
3018 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3019 QIreg_operand instead of register_operand predicate.
3020 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3021 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3022 comments instead of -fmitigate[-_]rop.
3024 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3027 * cgraphunit.c (symbol_table::compile): Switch to text_section
3028 before calling assembly_start debug hook.
3029 * run-rtl-passes.c (run_rtl_passes): Likewise.
3032 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3034 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3035 range_int_cst_p rather than !symbolic_range_p before calling
3036 extract_range_from_multiplicative_op_1.
3038 2017-01-04 Jeff Law <law@redhat.com>
3040 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3041 redundant test in assertion.
3043 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3045 * doc/rtl.texi: Document machine_mode wrapper classes.
3047 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3049 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3052 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3054 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3055 the VEC_PERM_EXPR fold to fail.
3057 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3060 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3061 to switched_sections.
3063 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3066 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3069 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3072 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3073 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3075 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3078 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3079 is BLKmode and bitpos not zero or mode change is needed.
3081 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3084 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3087 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3090 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3091 instead of MULT rtx. Update all corresponding splitters.
3093 (*ssub<modesuffix>): Ditto.
3095 (*cmp_sadd_di): Update split patterns.
3096 (*cmp_sadd_si): Ditto.
3097 (*cmp_sadd_sidi): Ditto.
3098 (*cmp_ssub_di): Ditto.
3099 (*cmp_ssub_si): Ditto.
3100 (*cmp_ssub_sidi): Ditto.
3101 * config/alpha/predicates.md (const23_operand): New predicate.
3102 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3103 Look for ASHIFT, not MULT inner operand.
3104 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3106 2018-01-04 Martin Liska <mliska@suse.cz>
3108 PR gcov-profile/83669
3109 * gcov.c (output_intermediate_file): Add version to intermediate
3111 * doc/gcov.texi: Document new field 'version' in intermediate
3112 file format. Fix location of '-k' option of gcov command.
3114 2018-01-04 Martin Liska <mliska@suse.cz>
3117 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3119 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3121 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3123 2018-01-03 Martin Sebor <msebor@redhat.com>
3125 PR tree-optimization/83655
3126 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3127 checking calls with invalid arguments.
3129 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3131 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3132 (vectorizable_mask_load_store): Delete.
3133 (vectorizable_call): Return false for masked loads and stores.
3134 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3135 instead of gimple_assign_rhs1.
3136 (vectorizable_load): Handle IFN_MASK_LOAD.
3137 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3139 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3141 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3143 (vectorizable_mask_load_store): ...here.
3144 (vectorizable_load): ...and here.
3146 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3148 * tree-vect-stmts.c (vect_build_all_ones_mask)
3149 (vect_build_zero_merge_argument): New functions, split out from...
3150 (vectorizable_load): ...here.
3152 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3154 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3156 (vectorizable_mask_load_store): ...here.
3157 (vectorizable_store): ...and here.
3159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3161 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3163 (vectorizable_mask_load_store): ...here.
3165 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3167 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3168 (vect_model_store_cost): Take a vec_load_store_type instead of a
3170 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3171 (vect_model_store_cost): Take a vec_load_store_type instead of a
3173 (vectorizable_mask_load_store): Update accordingly.
3174 (vectorizable_store): Likewise.
3175 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3177 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3179 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3180 IFN_MASK_LOAD calls here rather than...
3181 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3183 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3184 Alan Hayward <alan.hayward@arm.com>
3185 David Sherwood <david.sherwood@arm.com>
3187 * expmed.c (extract_bit_field_1): For vector extracts,
3188 fall back to extract_bit_field_as_subreg if vec_extract
3191 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3192 Alan Hayward <alan.hayward@arm.com>
3193 David Sherwood <david.sherwood@arm.com>
3195 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3196 they are variable or constant sized.
3197 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3198 slots for constant-sized data.
3200 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3201 Alan Hayward <alan.hayward@arm.com>
3202 David Sherwood <david.sherwood@arm.com>
3204 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3205 handling COND_EXPRs with boolean comparisons, try to find a better
3206 basis for the mask type than the boolean itself.
3208 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3210 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3211 is calculated and how it can be overridden.
3212 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3213 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3215 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3218 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3219 Alan Hayward <alan.hayward@arm.com>
3220 David Sherwood <david.sherwood@arm.com>
3222 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3223 Remove the mode argument.
3224 (aarch64_simd_valid_immediate): Remove the mode and inverse
3226 * config/aarch64/iterators.md (bitsize): New iterator.
3227 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3228 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3229 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3230 aarch64_simd_valid_immediate.
3231 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3232 (aarch64_reg_or_bic_imm): Likewise.
3233 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3234 with an insn_type enum and msl with a modifier_type enum.
3235 Replace element_width with a scalar_mode. Change the shift
3236 to unsigned int. Add constructors for scalar_float_mode and
3237 scalar_int_mode elements.
3238 (aarch64_vect_float_const_representable_p): Delete.
3239 (aarch64_can_const_movi_rtx_p)
3240 (aarch64_simd_scalar_immediate_valid_for_move)
3241 (aarch64_simd_make_constant): Update call to
3242 aarch64_simd_valid_immediate.
3243 (aarch64_advsimd_valid_immediate_hs): New function.
3244 (aarch64_advsimd_valid_immediate): Likewise.
3245 (aarch64_simd_valid_immediate): Remove mode and inverse
3246 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3247 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3248 and aarch64_float_const_representable_p on the result.
3249 (aarch64_output_simd_mov_immediate): Remove mode argument.
3250 Update call to aarch64_simd_valid_immediate and use of
3251 simd_immediate_info.
3252 (aarch64_output_scalar_simd_mov_immediate): Update call
3255 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3256 Alan Hayward <alan.hayward@arm.com>
3257 David Sherwood <david.sherwood@arm.com>
3259 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3260 (mode_nunits): Likewise CONST_MODE_NUNITS.
3261 * machmode.def (ADJUST_NUNITS): Document.
3262 * genmodes.c (mode_data::need_nunits_adj): New field.
3263 (blank_mode): Update accordingly.
3264 (adj_nunits): New variable.
3265 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3267 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3268 listed in adj_nunits.
3269 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3270 listed in adj_nunits. Don't emit case statements for such modes.
3271 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3272 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3273 nothing if adj_nunits is nonnull.
3274 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3275 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3276 (emit_mode_fbit): Update use of print_maybe_const_decl.
3277 (emit_move_size): Likewise. Treat the array as non-const
3279 (emit_mode_adjustments): Handle adj_nunits.
3281 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3283 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3284 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3285 (VECTOR_MODES): Use it.
3286 (make_vector_modes): Take the prefix as an argument.
3288 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3289 Alan Hayward <alan.hayward@arm.com>
3290 David Sherwood <david.sherwood@arm.com>
3292 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3293 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3294 for MODE_VECTOR_BOOL.
3295 * machmode.def (VECTOR_BOOL_MODE): Document.
3296 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3297 (make_vector_bool_mode): New function.
3298 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3300 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3301 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3303 * stor-layout.c (int_mode_for_mode): Likewise.
3304 * tree.c (build_vector_type_for_mode): Likewise.
3305 * varasm.c (output_constant_pool_2): Likewise.
3306 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3307 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3308 for MODE_VECTOR_BOOL.
3309 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3310 of mode class checks.
3311 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3312 instead of a list of mode class checks.
3313 (expand_vector_scalar_condition): Likewise.
3314 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3316 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3317 Alan Hayward <alan.hayward@arm.com>
3318 David Sherwood <david.sherwood@arm.com>
3320 * machmode.h (mode_size): Change from unsigned short to
3322 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3323 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3324 or if measurement_type is not polynomial.
3325 (fixed_size_mode::includes_p): Check for constant-sized modes.
3326 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3327 return a poly_uint16 rather than an unsigned short.
3328 (emit_mode_size): Change the type of mode_size from unsigned short
3329 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3330 (emit_mode_adjustments): Cope with polynomial vector sizes.
3331 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3333 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3335 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3336 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3337 * caller-save.c (setup_save_areas): Likewise.
3338 (replace_reg_with_saved_mem): Likewise.
3339 * calls.c (emit_library_call_value_1): Likewise.
3340 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3341 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3342 (gen_lowpart_for_combine): Likewise.
3343 * convert.c (convert_to_integer_1): Likewise.
3344 * cse.c (equiv_constant, cse_insn): Likewise.
3345 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3346 (cselib_subst_to_values): Likewise.
3347 * dce.c (word_dce_process_block): Likewise.
3348 * df-problems.c (df_word_lr_mark_ref): Likewise.
3349 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3350 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3351 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3352 (rtl_for_decl_location): Likewise.
3353 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3354 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3355 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3356 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3357 (expand_expr_real_1): Likewise.
3358 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3359 (pad_below): Likewise.
3360 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3361 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3362 * ira.c (get_subreg_tracking_sizes): Likewise.
3363 * ira-build.c (ira_create_allocno_objects): Likewise.
3364 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3365 (ira_sort_regnos_for_alter_reg): Likewise.
3366 * ira-costs.c (record_operand_costs): Likewise.
3367 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3368 (resolve_simple_move): Likewise.
3369 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3370 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3371 (lra_constraints): Likewise.
3372 (CONST_POOL_OK_P): Reject variable-sized modes.
3373 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3374 (add_pseudo_to_slot, lra_spill): Likewise.
3375 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3376 * optabs-query.c (get_best_extraction_insn): Likewise.
3377 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3378 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3379 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3380 * recog.c (offsettable_address_addr_space_p): Likewise.
3381 * regcprop.c (maybe_mode_change): Likewise.
3382 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3383 * regrename.c (build_def_use): Likewise.
3384 * regstat.c (dump_reg_info): Likewise.
3385 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3386 (find_reloads, find_reloads_subreg_address): Likewise.
3387 * reload1.c (eliminate_regs_1): Likewise.
3388 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3389 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3390 (simplify_binary_operation_1, simplify_subreg): Likewise.
3391 * targhooks.c (default_function_arg_padding): Likewise.
3392 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3393 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3394 (verify_gimple_assign_ternary): Likewise.
3395 * tree-inline.c (estimate_move_cost): Likewise.
3396 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3397 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3398 (get_address_cost_ainc): Likewise.
3399 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3400 (vect_supportable_dr_alignment): Likewise.
3401 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3402 (vectorizable_reduction): Likewise.
3403 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3404 (vectorizable_operation, vectorizable_load): Likewise.
3405 * tree.c (build_same_sized_truth_vector_type): Likewise.
3406 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3407 * var-tracking.c (emit_note_insn_var_location): Likewise.
3408 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3409 (ADDR_VEC_ALIGN): Likewise.
3411 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3412 Alan Hayward <alan.hayward@arm.com>
3413 David Sherwood <david.sherwood@arm.com>
3415 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3417 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3418 or if measurement_type is polynomial.
3419 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3420 * combine.c (make_extraction): Likewise.
3421 * dse.c (find_shift_sequence): Likewise.
3422 * dwarf2out.c (mem_loc_descriptor): Likewise.
3423 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3424 (extract_bit_field, extract_low_bits): Likewise.
3425 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3426 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3427 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3428 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3429 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3430 * reload.c (find_reloads): Likewise.
3431 * reload1.c (alter_reg): Likewise.
3432 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3433 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3434 * tree-if-conv.c (predicate_mem_writes): Likewise.
3435 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3436 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3437 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3438 * valtrack.c (dead_debug_insert_temp): Likewise.
3439 * varasm.c (mergeable_constant_section): Likewise.
3440 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3442 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3443 Alan Hayward <alan.hayward@arm.com>
3444 David Sherwood <david.sherwood@arm.com>
3446 * expr.c (expand_assignment): Cope with polynomial mode sizes
3447 when assigning to a CONCAT.
3449 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3450 Alan Hayward <alan.hayward@arm.com>
3451 David Sherwood <david.sherwood@arm.com>
3453 * machmode.h (mode_precision): Change from unsigned short to
3455 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3457 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3458 or if measurement_type is not polynomial.
3459 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3460 in which the mode is already known to be a scalar_int_mode.
3461 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3462 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3464 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3465 for GET_MODE_PRECISION.
3466 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3467 for GET_MODE_PRECISION.
3468 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3470 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3471 (expand_field_assignment, make_extraction): Likewise.
3472 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3473 (get_last_value): Likewise.
3474 * convert.c (convert_to_integer_1): Likewise.
3475 * cse.c (cse_insn): Likewise.
3476 * expr.c (expand_expr_real_1): Likewise.
3477 * lra-constraints.c (simplify_operand_subreg): Likewise.
3478 * optabs-query.c (can_atomic_load_p): Likewise.
3479 * optabs.c (expand_atomic_load): Likewise.
3480 (expand_atomic_store): Likewise.
3481 * ree.c (combine_reaching_defs): Likewise.
3482 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3483 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3484 * tree.h (type_has_mode_precision_p): Likewise.
3485 * ubsan.c (instrument_si_overflow): Likewise.
3487 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3488 Alan Hayward <alan.hayward@arm.com>
3489 David Sherwood <david.sherwood@arm.com>
3491 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3492 polynomial numbers of units.
3493 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3494 (valid_vector_subparts_p): New function.
3495 (build_vector_type): Remove temporary shim and take the number
3496 of units as a poly_uint64 rather than an int.
3497 (build_opaque_vector_type): Take the number of units as a
3498 poly_uint64 rather than an int.
3499 * tree.c (build_vector_from_ctor): Handle polynomial
3500 TYPE_VECTOR_SUBPARTS.
3501 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3502 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3503 (build_vector_from_val): If the number of units is variable,
3504 use build_vec_duplicate_cst for constant operands and
3505 VEC_DUPLICATE_EXPR otherwise.
3506 (make_vector_type): Remove temporary is_constant ().
3507 (build_vector_type, build_opaque_vector_type): Take the number of
3508 units as a poly_uint64 rather than an int.
3509 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3511 * cfgexpand.c (expand_debug_expr): Likewise.
3512 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3513 (store_constructor, expand_expr_real_1): Likewise.
3514 (const_scalar_mask_from_tree): Likewise.
3515 * fold-const-call.c (fold_const_reduction): Likewise.
3516 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3517 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3518 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3519 (fold_relational_const): Likewise.
3520 (native_interpret_vector): Likewise. Change the size from an
3521 int to an unsigned int.
3522 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3523 TYPE_VECTOR_SUBPARTS.
3524 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3525 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3526 duplicating a non-constant operand into a variable-length vector.
3527 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3528 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3529 * ipa-icf.c (sem_variable::equals): Likewise.
3530 * match.pd: Likewise.
3531 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3532 * print-tree.c (print_node): Likewise.
3533 * stor-layout.c (layout_type): Likewise.
3534 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3535 * tree-cfg.c (verify_gimple_comparison): Likewise.
3536 (verify_gimple_assign_binary): Likewise.
3537 (verify_gimple_assign_ternary): Likewise.
3538 (verify_gimple_assign_single): Likewise.
3539 * tree-pretty-print.c (dump_generic_node): Likewise.
3540 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3541 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3542 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3543 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3544 (vect_shift_permute_load_chain): Likewise.
3545 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3546 (expand_vector_condition, optimize_vector_constructor): Likewise.
3547 (lower_vec_perm, get_compute_type): Likewise.
3548 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3549 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3550 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3551 (vect_recog_mask_conversion_pattern): Likewise.
3552 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3553 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3554 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3555 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3556 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3557 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3558 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3559 (supportable_widening_operation): Likewise.
3560 (supportable_narrowing_operation): Likewise.
3561 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3563 * varasm.c (output_constant): Likewise.
3565 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3566 Alan Hayward <alan.hayward@arm.com>
3567 David Sherwood <david.sherwood@arm.com>
3569 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3570 so that both the length == 3 and length != 3 cases set up their
3571 own permute vectors. Add comments explaining why we know the
3572 number of elements is constant.
3573 (vect_permute_load_chain): Likewise.
3575 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3576 Alan Hayward <alan.hayward@arm.com>
3577 David Sherwood <david.sherwood@arm.com>
3579 * machmode.h (mode_nunits): Change from unsigned char to
3581 (ONLY_FIXED_SIZE_MODES): New macro.
3582 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3583 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3584 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3586 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3587 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3588 or if measurement_type is not polynomial.
3589 * genmodes.c (ZERO_COEFFS): New macro.
3590 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3592 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3593 Use ZERO_COEFFS when emitting initializers.
3594 * data-streamer.h (bp_pack_poly_value): New function.
3595 (bp_unpack_poly_value): Likewise.
3596 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3597 for GET_MODE_NUNITS.
3598 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3599 for GET_MODE_NUNITS.
3600 * tree.c (make_vector_type): Remove temporary shim and make
3601 the real function take the number of units as a poly_uint64
3603 (build_vector_type_for_mode): Handle polynomial nunits.
3604 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3605 * emit-rtl.c (const_vec_series_p_1): Likewise.
3606 (gen_rtx_CONST_VECTOR): Likewise.
3607 * fold-const.c (test_vec_duplicate_folding): Likewise.
3608 * genrecog.c (validate_pattern): Likewise.
3609 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3610 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3611 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3612 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3613 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3614 * rtlanal.c (subreg_get_info): Likewise.
3615 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3616 (vect_grouped_load_supported): Likewise.
3617 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3618 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3619 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3620 (simplify_const_unary_operation, simplify_binary_operation_1)
3621 (simplify_const_binary_operation, simplify_ternary_operation)
3622 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3623 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3624 instead of CONST_VECTOR_NUNITS.
3625 * varasm.c (output_constant_pool_2): Likewise.
3626 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3627 explicit-encoded elements in the XVEC for variable-length vectors.
3629 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3631 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3633 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3634 Alan Hayward <alan.hayward@arm.com>
3635 David Sherwood <david.sherwood@arm.com>
3637 * coretypes.h (fixed_size_mode): Declare.
3638 (fixed_size_mode_pod): New typedef.
3639 * builtins.h (target_builtins::x_apply_args_mode)
3640 (target_builtins::x_apply_result_mode): Change type to
3641 fixed_size_mode_pod.
3642 * builtins.c (apply_args_size, apply_result_size, result_vector)
3643 (expand_builtin_apply_args_1, expand_builtin_apply)
3644 (expand_builtin_return): Update accordingly.
3646 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3648 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3649 * cselib.c (cselib_hash_rtx): Likewise.
3650 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3651 CONST_VECTOR encoding.
3653 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3654 Jeff Law <law@redhat.com>
3657 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3658 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3659 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3660 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3663 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3664 explicitly probe *sp in a noreturn function if there were any callee
3665 register saves or frame pointer is needed.
3667 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3670 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3671 BLKmode for ternary, binary or unary expressions.
3674 * var-tracking.c (delete_vta_debug_insn): New inline function.
3675 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3676 insns from get_insns () to NULL instead of each bb separately.
3677 Use delete_vta_debug_insn. No longer static.
3678 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3679 delete_vta_debug_insns callers.
3680 * rtl.h (delete_vta_debug_insns): Declare.
3681 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3682 instead of variable_tracking_main.
3684 2018-01-03 Martin Sebor <msebor@redhat.com>
3686 PR tree-optimization/83603
3687 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3688 arguments past the endof the argument list in functions declared
3689 without a prototype.
3690 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3691 Avoid checking when arguments are null.
3693 2018-01-03 Martin Sebor <msebor@redhat.com>
3696 * doc/extend.texi (attribute const): Fix a typo.
3697 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3698 issuing -Wsuggest-attribute for void functions.
3700 2018-01-03 Martin Sebor <msebor@redhat.com>
3702 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3703 offset_int::from instead of wide_int::to_shwi.
3704 (maybe_diag_overlap): Remove assertion.
3705 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3706 * gimple-ssa-sprintf.c (format_directive): Same.
3707 (parse_directive): Same.
3708 (sprintf_dom_walker::compute_format_length): Same.
3709 (try_substitute_return_value): Same.
3711 2017-01-03 Jeff Law <law@redhat.com>
3714 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3715 non-constant residual for zero at runtime and avoid probing in
3716 that case. Reorganize code for trailing problem to mirror handling
3719 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3721 PR tree-optimization/83501
3722 * tree-ssa-strlen.c (get_string_cst): New.
3723 (handle_char_store): Call get_string_cst.
3725 2018-01-03 Martin Liska <mliska@suse.cz>
3727 PR tree-optimization/83593
3728 * tree-ssa-strlen.c: Include tree-cfg.h.
3729 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3730 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3731 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3733 (strlen_dom_walker::before_dom_children): Call
3734 gimple_purge_dead_eh_edges. Dump tranformation with details
3736 (strlen_dom_walker::before_dom_children): Update call by adding
3737 new argument cleanup_eh.
3738 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3740 2018-01-03 Martin Liska <mliska@suse.cz>
3743 * cif-code.def (VARIADIC_THUNK): New enum value.
3744 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3747 2018-01-03 Jan Beulich <jbeulich@suse.com>
3749 * sse.md (mov<mode>_internal): Tighten condition for when to use
3750 vmovdqu<ssescalarsize> for TI and OI modes.
3752 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3754 Update copyright years.
3756 2018-01-03 Martin Liska <mliska@suse.cz>
3759 * ipa-visibility.c (function_and_variable_visibility): Skip
3760 functions with noipa attribure.
3762 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3764 * gcc.c (process_command): Update copyright notice dates.
3765 * gcov-dump.c (print_version): Ditto.
3766 * gcov.c (print_version): Ditto.
3767 * gcov-tool.c (print_version): Ditto.
3768 * gengtype.c (create_file): Ditto.
3769 * doc/cpp.texi: Bump @copying's copyright year.
3770 * doc/cppinternals.texi: Ditto.
3771 * doc/gcc.texi: Ditto.
3772 * doc/gccint.texi: Ditto.
3773 * doc/gcov.texi: Ditto.
3774 * doc/install.texi: Ditto.
3775 * doc/invoke.texi: Ditto.
3777 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3779 * vector-builder.h (vector_builder::m_full_nelts): Change from
3780 unsigned int to poly_uint64.
3781 (vector_builder::full_nelts): Update prototype accordingly.
3782 (vector_builder::new_vector): Likewise.
3783 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3784 (vector_builder::operator ==): Likewise.
3785 (vector_builder::finalize): Likewise.
3786 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3787 Take the number of elements as a poly_uint64 rather than an
3789 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3790 from unsigned int to poly_uint64.
3791 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3792 (vec_perm_indices::new_vector): Likewise.
3793 (vec_perm_indices::length): Likewise.
3794 (vec_perm_indices::nelts_per_input): Likewise.
3795 (vec_perm_indices::input_nelts): Likewise.
3796 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3797 number of elements per input as a poly_uint64 rather than an
3798 unsigned int. Use the original encoding for variable-length
3799 vectors, rather than clamping each individual element.
3800 For the second and subsequent elements in each pattern,
3801 clamp the step and base before clamping their sum.
3802 (vec_perm_indices::series_p): Handle polynomial element counts.
3803 (vec_perm_indices::all_in_range_p): Likewise.
3804 (vec_perm_indices_to_tree): Likewise.
3805 (vec_perm_indices_to_rtx): Likewise.
3806 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3807 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3808 (tree_vector_builder::new_binary_operation): Handle polynomial
3809 element counts. Return false if we need to know the number
3810 of elements at compile time.
3811 * fold-const.c (fold_vec_perm): Punt if the number of elements
3812 isn't known at compile time.
3814 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3816 * vec-perm-indices.h (vec_perm_builder): Change element type
3817 from HOST_WIDE_INT to poly_int64.
3818 (vec_perm_indices::element_type): Update accordingly.
3819 (vec_perm_indices::clamp): Handle polynomial element_types.
3820 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3821 (vec_perm_indices::all_in_range_p): Likewise.
3822 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3824 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3825 polynomial vec_perm_indices element types.
3826 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3827 * fold-const.c (fold_vec_perm): Likewise.
3828 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3829 * tree-vect-generic.c (lower_vec_perm): Likewise.
3830 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3831 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3832 element type to HOST_WIDE_INT.
3834 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3835 Alan Hayward <alan.hayward@arm.com>
3836 David Sherwood <david.sherwood@arm.com>
3838 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3839 rather than an int. Use plus_constant.
3840 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3841 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3843 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3844 Alan Hayward <alan.hayward@arm.com>
3845 David Sherwood <david.sherwood@arm.com>
3847 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3848 a HOST_WIDE_INT to a poly_int64.
3850 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3851 Alan Hayward <alan.hayward@arm.com>
3852 David Sherwood <david.sherwood@arm.com>
3854 * calls.c (load_register_parameters): Cope with polynomial
3855 mode sizes. Require a constant size for BLKmode parameters
3856 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3857 forces a parameter to be padded at the lsb end in order to
3858 fill a complete number of words, require the parameter size
3859 to be ordered wrt UNITS_PER_WORD.
3861 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3862 Alan Hayward <alan.hayward@arm.com>
3863 David Sherwood <david.sherwood@arm.com>
3865 * reload1.c (spill_stack_slot_width): Change element type
3866 from unsigned int to poly_uint64_pod.
3867 (alter_reg): Treat mode sizes as polynomial.
3869 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3870 Alan Hayward <alan.hayward@arm.com>
3871 David Sherwood <david.sherwood@arm.com>
3873 * reload.c (complex_word_subreg_p): New function.
3874 (reload_inner_reg_of_subreg, push_reload): Use it.
3876 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3877 Alan Hayward <alan.hayward@arm.com>
3878 David Sherwood <david.sherwood@arm.com>
3880 * lra-constraints.c (process_alt_operands): Reject matched
3881 operands whose sizes aren't ordered.
3882 (match_reload): Refer to this check here.
3884 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3885 Alan Hayward <alan.hayward@arm.com>
3886 David Sherwood <david.sherwood@arm.com>
3888 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3889 that the mode size is in the set {1, 2, 4, 8, 16}.
3891 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3892 Alan Hayward <alan.hayward@arm.com>
3893 David Sherwood <david.sherwood@arm.com>
3895 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3896 Use plus_constant instead of gen_rtx_PLUS.
3898 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3899 Alan Hayward <alan.hayward@arm.com>
3900 David Sherwood <david.sherwood@arm.com>
3902 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3903 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3904 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3905 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3906 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3907 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3908 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3909 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3910 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3911 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3913 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3914 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3915 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3916 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3917 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3918 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3919 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3920 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3921 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3922 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3924 * expr.c (emit_move_resolve_push): Treat the input and result
3925 of PUSH_ROUNDING as a poly_int64.
3926 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3927 (emit_push_insn): Likewise.
3928 * lra-eliminations.c (mark_not_eliminable): Likewise.
3929 * recog.c (push_operand): Likewise.
3930 * reload1.c (elimination_effects): Likewise.
3931 * rtlanal.c (nonzero_bits1): Likewise.
3932 * calls.c (store_one_arg): Likewise. Require the padding to be
3933 known at compile time.
3935 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3936 Alan Hayward <alan.hayward@arm.com>
3937 David Sherwood <david.sherwood@arm.com>
3939 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3940 Use plus_constant instead of gen_rtx_PLUS.
3942 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3943 Alan Hayward <alan.hayward@arm.com>
3944 David Sherwood <david.sherwood@arm.com>
3946 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3949 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3950 Alan Hayward <alan.hayward@arm.com>
3951 David Sherwood <david.sherwood@arm.com>
3953 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3954 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3955 via stack temporaries. Treat the mode size as polynomial too.
3957 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3958 Alan Hayward <alan.hayward@arm.com>
3959 David Sherwood <david.sherwood@arm.com>
3961 * expr.c (expand_expr_real_2): When handling conversions involving
3962 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3963 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3964 as a poly_uint64 too.
3966 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3967 Alan Hayward <alan.hayward@arm.com>
3968 David Sherwood <david.sherwood@arm.com>
3970 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3972 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3973 Alan Hayward <alan.hayward@arm.com>
3974 David Sherwood <david.sherwood@arm.com>
3976 * combine.c (can_change_dest_mode): Handle polynomial
3977 REGMODE_NATURAL_SIZE.
3978 * expmed.c (store_bit_field_1): Likewise.
3979 * expr.c (store_constructor): Likewise.
3980 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3981 and polynomial REGMODE_NATURAL_SIZE.
3982 (gen_lowpart_common): Likewise.
3983 * reginfo.c (record_subregs_of_mode): Likewise.
3984 * rtlanal.c (read_modify_subreg_p): Likewise.
3986 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3987 Alan Hayward <alan.hayward@arm.com>
3988 David Sherwood <david.sherwood@arm.com>
3990 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3991 numbers of elements.
3993 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3994 Alan Hayward <alan.hayward@arm.com>
3995 David Sherwood <david.sherwood@arm.com>
3997 * match.pd: Cope with polynomial numbers of vector elements.
3999 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4000 Alan Hayward <alan.hayward@arm.com>
4001 David Sherwood <david.sherwood@arm.com>
4003 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4004 in a POINTER_PLUS_EXPR.
4006 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4007 Alan Hayward <alan.hayward@arm.com>
4008 David Sherwood <david.sherwood@arm.com>
4010 * omp-simd-clone.c (simd_clone_subparts): New function.
4011 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4012 (ipa_simd_modify_function_body): Likewise.
4014 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4015 Alan Hayward <alan.hayward@arm.com>
4016 David Sherwood <david.sherwood@arm.com>
4018 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4019 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4020 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4021 (expand_vector_condition, vector_element): Likewise.
4022 (subparts_gt): New function.
4023 (get_compute_type): Use subparts_gt.
4024 (count_type_subparts): Delete.
4025 (expand_vector_operations_1): Use subparts_gt instead of
4026 count_type_subparts.
4028 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4029 Alan Hayward <alan.hayward@arm.com>
4030 David Sherwood <david.sherwood@arm.com>
4032 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4033 (vect_compile_time_alias): ...this new function. Do the calculation
4034 on poly_ints rather than trees.
4035 (vect_prune_runtime_alias_test_list): Update call accordingly.
4037 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4038 Alan Hayward <alan.hayward@arm.com>
4039 David Sherwood <david.sherwood@arm.com>
4041 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4043 (vect_schedule_slp_instance): Likewise.
4045 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4046 Alan Hayward <alan.hayward@arm.com>
4047 David Sherwood <david.sherwood@arm.com>
4049 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4050 constant and extern definitions for variable-length vectors.
4051 (vect_get_constant_vectors): Note that the number of units
4052 is known to be constant.
4054 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4055 Alan Hayward <alan.hayward@arm.com>
4056 David Sherwood <david.sherwood@arm.com>
4058 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4059 of units as polynomial. Choose between WIDE and NARROW based
4062 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4063 Alan Hayward <alan.hayward@arm.com>
4064 David Sherwood <david.sherwood@arm.com>
4066 * tree-vect-stmts.c (simd_clone_subparts): New function.
4067 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4069 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4070 Alan Hayward <alan.hayward@arm.com>
4071 David Sherwood <david.sherwood@arm.com>
4073 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4074 vectors as polynomial. Use build_index_vector for
4077 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4078 Alan Hayward <alan.hayward@arm.com>
4079 David Sherwood <david.sherwood@arm.com>
4081 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4082 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4083 for variable-length vectors.
4084 (vectorizable_mask_load_store): Treat the number of units as
4085 polynomial, asserting that it is constant if the condition has
4086 already been enforced.
4087 (vectorizable_store, vectorizable_load): Likewise.
4089 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4090 Alan Hayward <alan.hayward@arm.com>
4091 David Sherwood <david.sherwood@arm.com>
4093 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4094 of units as polynomial. Punt if we can't tell at compile time
4095 which vector contains the final result.
4097 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4098 Alan Hayward <alan.hayward@arm.com>
4099 David Sherwood <david.sherwood@arm.com>
4101 * tree-vect-loop.c (vectorizable_induction): Treat the number
4102 of units as polynomial. Punt on SLP inductions. Use an integer
4103 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4104 cast of such a series for variable-length floating-point
4107 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4108 Alan Hayward <alan.hayward@arm.com>
4109 David Sherwood <david.sherwood@arm.com>
4111 * tree.h (build_index_vector): Declare.
4112 * tree.c (build_index_vector): New function.
4113 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4114 of units as polynomial, forcibly converting it to a constant if
4115 vectorizable_reduction has already enforced the condition.
4116 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4117 to create a {1,2,3,...} vector.
4118 (vectorizable_reduction): Treat the number of units as polynomial.
4119 Choose vectype_in based on the largest scalar element size rather
4120 than the smallest number of units. Enforce the restrictions
4123 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4124 Alan Hayward <alan.hayward@arm.com>
4125 David Sherwood <david.sherwood@arm.com>
4127 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4128 number of units as polynomial.
4130 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4131 Alan Hayward <alan.hayward@arm.com>
4132 David Sherwood <david.sherwood@arm.com>
4134 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4135 * target.def (autovectorize_vector_sizes): Return the vector sizes
4136 by pointer, using vector_sizes rather than a bitmask.
4137 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4138 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4139 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4141 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4142 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4143 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4144 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4145 * omp-general.c (omp_max_vf): Likewise.
4146 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4147 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4148 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4149 * tree-vect-slp.c (vect_slp_bb): Likewise.
4150 * doc/tm.texi: Regenerate.
4151 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4153 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4154 the vector size as a poly_uint64 rather than an unsigned int.
4155 (current_vector_size): Change from an unsigned int to a poly_uint64.
4156 (get_vectype_for_scalar_type): Update accordingly.
4157 * tree.h (build_truth_vector_type): Take the size and number of
4158 units as a poly_uint64 rather than an unsigned int.
4159 (build_vector_type): Add a temporary overload that takes
4160 the number of units as a poly_uint64 rather than an unsigned int.
4161 * tree.c (make_vector_type): Likewise.
4162 (build_truth_vector_type): Take the number of units as a poly_uint64
4163 rather than an unsigned int.
4165 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4166 Alan Hayward <alan.hayward@arm.com>
4167 David Sherwood <david.sherwood@arm.com>
4169 * target.def (get_mask_mode): Take the number of units and length
4170 as poly_uint64s rather than unsigned ints.
4171 * targhooks.h (default_get_mask_mode): Update accordingly.
4172 * targhooks.c (default_get_mask_mode): Likewise.
4173 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4174 * doc/tm.texi: Regenerate.
4176 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4177 Alan Hayward <alan.hayward@arm.com>
4178 David Sherwood <david.sherwood@arm.com>
4180 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4181 * omp-general.c (omp_max_vf): Likewise.
4182 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4183 (expand_omp_simd): Handle polynomial safelen.
4184 * omp-low.c (omplow_simd_context): Add a default constructor.
4185 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4186 (lower_rec_simd_input_clauses): Update accordingly.
4187 (lower_rec_input_clauses): Likewise.
4189 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4190 Alan Hayward <alan.hayward@arm.com>
4191 David Sherwood <david.sherwood@arm.com>
4193 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4194 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4195 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4196 (vect_analyze_slp_cost): Likewise.
4197 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4198 (vect_model_load_cost): Likewise.
4200 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4201 Alan Hayward <alan.hayward@arm.com>
4202 David Sherwood <david.sherwood@arm.com>
4204 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4205 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4206 from an unsigned int * to a poly_uint64_pod *.
4207 (calculate_unrolling_factor): New function.
4208 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4210 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4211 Alan Hayward <alan.hayward@arm.com>
4212 David Sherwood <david.sherwood@arm.com>
4214 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4215 from an unsigned int to a poly_uint64.
4216 (_loop_vec_info::slp_unrolling_factor): Likewise.
4217 (_loop_vec_info::vectorization_factor): Change from an int
4219 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4220 (vect_get_num_vectors): New function.
4221 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4222 (vect_get_num_copies): Use vect_get_num_vectors.
4223 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4224 to an unsigned int *.
4225 (vect_analyze_data_refs): Change min_vf from an int * to a
4227 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4228 than an unsigned HOST_WIDE_INT.
4229 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4230 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4231 to an unsigned int *.
4232 (vect_analyze_data_ref_dependences): Likewise.
4233 (vect_compute_data_ref_alignment): Handle polynomial vf.
4234 (vect_enhance_data_refs_alignment): Likewise.
4235 (vect_prune_runtime_alias_test_list): Likewise.
4236 (vect_shift_permute_load_chain): Likewise.
4237 (vect_supportable_dr_alignment): Likewise.
4238 (dependence_distance_ge_vf): Take the vectorization factor as a
4239 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4240 (vect_analyze_data_refs): Change min_vf from an int * to a
4242 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4243 vfm1 as a poly_uint64 rather than an int. Make the same change
4244 for the returned bound_scalar.
4245 (vect_gen_vector_loop_niters): Handle polynomial vf.
4246 (vect_do_peeling): Likewise. Update call to
4247 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4248 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4250 * tree-vect-loop.c (vect_determine_vectorization_factor)
4251 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4252 (vect_get_known_peeling_cost): Likewise.
4253 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4254 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4255 (vect_transform_loop): Likewise. Use the lowest possible VF when
4256 updating the upper bounds of the loop.
4257 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4259 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4260 polynomial unroll factors.
4261 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4262 (vect_make_slp_decision): Likewise.
4263 (vect_supported_load_permutation_p): Likewise, and polynomial
4265 (vect_analyze_slp_cost): Handle polynomial vf.
4266 (vect_slp_analyze_node_operations): Likewise.
4267 (vect_slp_analyze_bb_1): Likewise.
4268 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4269 than an unsigned HOST_WIDE_INT.
4270 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4271 (vectorizable_load): Handle polynomial vf.
4272 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4274 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4276 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4277 Alan Hayward <alan.hayward@arm.com>
4278 David Sherwood <david.sherwood@arm.com>
4280 * match.pd: Handle bit operations involving three constants
4281 and try to fold one pair.
4283 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4285 * tree-vect-loop-manip.c: Include gimple-fold.h.
4286 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4287 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4288 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4289 Add a path that uses a step of VF instead of 1, but disable it
4291 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4292 and niters_no_overflow parameters. Update calls to
4293 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4294 Create a new SSA name if the latter choses to use a ste other
4295 than zero, and return it via niters_vector_mult_vf_var.
4296 * tree-vect-loop.c (vect_transform_loop): Update calls to
4297 vect_do_peeling, vect_gen_vector_loop_niters and
4298 slpeel_make_loop_iterate_ntimes.
4299 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4300 (vect_gen_vector_loop_niters): Update declarations after above changes.
4302 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4304 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4305 128-bit round to integer instructions.
4306 (ceil<mode>2): Likewise.
4307 (btrunc<mode>2): Likewise.
4308 (round<mode>2): Likewise.
4310 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4312 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4313 unaligned VSX load/store on P8/P9.
4314 (expand_block_clear): Allow the use of unaligned VSX
4315 load/store on P8/P9.
4317 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4319 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4321 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4322 swap associated with both a load and a store.
4324 2018-01-02 Andrew Waterman <andrew@sifive.com>
4326 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4327 * config/riscv/riscv.md (clear_cache): Use it.
4329 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4331 * web.c: Remove out-of-date comment.
4333 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4335 * expr.c (fixup_args_size_notes): Check that any existing
4336 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4337 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4338 (emit_single_push_insn): ...here.
4340 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4342 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4343 (const_vector_encoded_nelts): New function.
4344 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4345 (const_vector_int_elt, const_vector_elt): Declare.
4346 * emit-rtl.c (const_vector_int_elt_1): New function.
4347 (const_vector_elt): Likewise.
4348 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4349 of CONST_VECTOR_ELT.
4351 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4353 * expr.c: Include rtx-vector-builder.h.
4354 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4355 directly on the tree encoding.
4356 (const_vector_from_tree): Likewise.
4357 * optabs.c: Include rtx-vector-builder.h.
4358 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4359 sequence of "u" values.
4360 * vec-perm-indices.c: Include rtx-vector-builder.h.
4361 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4362 directly on the vec_perm_indices encoding.
4364 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4366 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4367 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4368 * rtx-vector-builder.h: New file.
4369 * rtx-vector-builder.c: Likewise.
4370 * rtl.h (rtx_def::u2): Add a const_vector field.
4371 (CONST_VECTOR_NPATTERNS): New macro.
4372 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4373 (CONST_VECTOR_DUPLICATE_P): Likewise.
4374 (CONST_VECTOR_STEPPED_P): Likewise.
4375 (CONST_VECTOR_ENCODED_ELT): Likewise.
4376 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4377 (unwrap_const_vec_duplicate): Likewise.
4378 (const_vec_series_p): Check for a non-duplicated vector encoding.
4379 Say that the function only returns true for integer vectors.
4380 * emit-rtl.c: Include rtx-vector-builder.h.
4381 (gen_const_vec_duplicate_1): Delete.
4382 (gen_const_vector): Call gen_const_vec_duplicate instead of
4383 gen_const_vec_duplicate_1.
4384 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4385 (gen_const_vec_duplicate): Use rtx_vector_builder.
4386 (gen_const_vec_series): Likewise.
4387 (gen_rtx_CONST_VECTOR): Likewise.
4388 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4389 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4390 Build a new vector rather than modifying a CONST_VECTOR in-place.
4391 (handle_special_swappables): Update call accordingly.
4392 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4393 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4394 Build a new vector rather than modifying a CONST_VECTOR in-place.
4395 (handle_special_swappables): Update call accordingly.
4397 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4399 * simplify-rtx.c (simplify_const_binary_operation): Use
4400 CONST_VECTOR_ELT instead of XVECEXP.
4402 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4404 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4405 the selector elements to be different from the data elements
4406 if the selector is a VECTOR_CST.
4407 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4408 ssizetype for the selector.
4410 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4412 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4413 before testing each element individually.
4414 * tree-vect-generic.c (lower_vec_perm): Likewise.
4416 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4418 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4419 * selftest-run-tests.c (selftest::run_tests): Call it.
4420 * vector-builder.h (vector_builder::operator ==): New function.
4421 (vector_builder::operator !=): Likewise.
4422 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4423 (vec_perm_indices::all_from_input_p): New function.
4424 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4425 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4426 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4427 instead of reading the VECTOR_CST directly. Detect whether both
4428 vector inputs are the same before constructing the vec_perm_indices,
4429 and update the number of inputs argument accordingly. Use the
4430 utility functions added above. Only construct sel2 if we need to.
4432 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4434 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4435 the broadcast of the low byte.
4436 (expand_mult_highpart): Use an explicit encoding for the permutes.
4437 * optabs-query.c (can_mult_highpart_p): Likewise.
4438 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4439 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4440 (vectorizable_bswap): Likewise.
4441 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4442 explicit encoding for the power-of-2 permutes.
4443 (vect_permute_store_chain): Likewise.
4444 (vect_grouped_load_supported): Likewise.
4445 (vect_permute_load_chain): Likewise.
4447 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4449 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4450 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4451 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4452 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4453 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4454 (vect_gen_perm_mask_any): Likewise.
4456 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4458 * int-vector-builder.h: New file.
4459 * vec-perm-indices.h: Include int-vector-builder.h.
4460 (vec_perm_indices): Redefine as an int_vector_builder.
4461 (auto_vec_perm_indices): Delete.
4462 (vec_perm_builder): Redefine as a stand-alone class.
4463 (vec_perm_indices::vec_perm_indices): New function.
4464 (vec_perm_indices::clamp): Likewise.
4465 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4466 (vec_perm_indices::new_vector): New function.
4467 (vec_perm_indices::new_expanded_vector): Update for new
4468 vec_perm_indices class.
4469 (vec_perm_indices::rotate_inputs): New function.
4470 (vec_perm_indices::all_in_range_p): Operate directly on the
4471 encoded form, without computing elided elements.
4472 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4473 encoding. Update for new vec_perm_indices class.
4474 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4475 the given vec_perm_builder.
4476 (expand_vec_perm_var): Update vec_perm_builder constructor.
4477 (expand_mult_highpart): Use vec_perm_builder instead of
4478 auto_vec_perm_indices.
4479 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4480 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4481 or double series encoding as appropriate.
4482 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4483 vec_perm_indices instead of auto_vec_perm_indices.
4484 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4485 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4486 (vect_permute_store_chain): Likewise.
4487 (vect_grouped_load_supported): Likewise.
4488 (vect_permute_load_chain): Likewise.
4489 (vect_shift_permute_load_chain): Likewise.
4490 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4491 (vect_transform_slp_perm_load): Likewise.
4492 (vect_schedule_slp_instance): Likewise.
4493 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4494 (vectorizable_mask_load_store): Likewise.
4495 (vectorizable_bswap): Likewise.
4496 (vectorizable_store): Likewise.
4497 (vectorizable_load): Likewise.
4498 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4499 vec_perm_indices instead of auto_vec_perm_indices. Use
4500 tree_to_vec_perm_builder to read the vector from a tree.
4501 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4502 vec_perm_builder instead of a vec_perm_indices.
4503 (have_whole_vector_shift): Use vec_perm_builder and
4504 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4505 truncation to calc_vec_perm_mask_for_shift.
4506 (vect_create_epilog_for_reduction): Likewise.
4507 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4508 from auto_vec_perm_indices to vec_perm_indices.
4509 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4510 instead of changing individual elements.
4511 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4512 the vector in d.perm.
4513 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4514 from auto_vec_perm_indices to vec_perm_indices.
4515 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4516 instead of changing individual elements.
4517 (arm_vectorize_vec_perm_const): Use new_vector to install
4518 the vector in d.perm.
4519 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4520 Update vec_perm_builder constructor.
4521 (rs6000_expand_interleave): Likewise.
4522 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4523 (rs6000_expand_interleave): Likewise.
4525 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4527 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4528 to qimode could truncate the indices.
4529 * optabs.c (expand_vec_perm_var): Likewise.
4531 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4533 * Makefile.in (OBJS): Add vec-perm-indices.o.
4534 * vec-perm-indices.h: New file.
4535 * vec-perm-indices.c: Likewise.
4536 * target.h (vec_perm_indices): Replace with a forward class
4538 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4539 * optabs.h: Include vec-perm-indices.h.
4540 (expand_vec_perm): Delete.
4541 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4542 (expand_vec_perm_const): Declare.
4543 * target.def (vec_perm_const_ok): Replace with...
4544 (vec_perm_const): ...this new hook.
4545 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4546 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4547 * doc/tm.texi: Regenerate.
4548 * optabs.def (vec_perm_const): Delete.
4549 * doc/md.texi (vec_perm_const): Likewise.
4550 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4551 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4552 expand_vec_perm for constant permutation vectors. Assert that
4553 the mode of variable permutation vectors is the integer equivalent
4554 of the mode that is being permuted.
4555 * optabs-query.h (selector_fits_mode_p): Declare.
4556 * optabs-query.c: Include vec-perm-indices.h.
4557 (selector_fits_mode_p): New function.
4558 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4559 is defined, instead of checking whether the vec_perm_const_optab
4560 exists. Use targetm.vectorize.vec_perm_const instead of
4561 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4562 fit in the vector mode before using a variable permute.
4563 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4564 vec_perm_indices instead of an rtx.
4565 (expand_vec_perm): Replace with...
4566 (expand_vec_perm_const): ...this new function. Take the selector
4567 as a vec_perm_indices rather than an rtx. Also take the mode of
4568 the selector. Update call to shift_amt_for_vec_perm_mask.
4569 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4570 Use vec_perm_indices::new_expanded_vector to expand the original
4571 selector into bytes. Check whether the indices fit in the vector
4572 mode before using a variable permute.
4573 (expand_vec_perm_var): Make global.
4574 (expand_mult_highpart): Use expand_vec_perm_const.
4575 * fold-const.c: Includes vec-perm-indices.h.
4576 * tree-ssa-forwprop.c: Likewise.
4577 * tree-vect-data-refs.c: Likewise.
4578 * tree-vect-generic.c: Likewise.
4579 * tree-vect-loop.c: Likewise.
4580 * tree-vect-slp.c: Likewise.
4581 * tree-vect-stmts.c: Likewise.
4582 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4584 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4585 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4586 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4587 (aarch64_vectorize_vec_perm_const): ...this new function.
4588 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4589 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4590 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4591 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4592 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4593 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4594 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4596 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4597 check for NEON modes.
4598 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4599 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4600 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4601 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4603 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4604 the old VEC_PERM_CONST conditions.
4605 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4606 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4607 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4608 (ia64_vectorize_vec_perm_const_ok): Merge into...
4609 (ia64_vectorize_vec_perm_const): ...this new function.
4610 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4611 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4612 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4613 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4614 * config/mips/mips.c (mips_expand_vec_perm_const)
4615 (mips_vectorize_vec_perm_const_ok): Merge into...
4616 (mips_vectorize_vec_perm_const): ...this new function.
4617 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4618 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4619 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4620 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4621 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4622 (rs6000_expand_vec_perm_const): Delete.
4623 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4625 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4626 (altivec_expand_vec_perm_const_le): Take each operand individually.
4627 Operate on constant selectors rather than rtxes.
4628 (altivec_expand_vec_perm_const): Likewise. Update call to
4629 altivec_expand_vec_perm_const_le.
4630 (rs6000_expand_vec_perm_const): Delete.
4631 (rs6000_vectorize_vec_perm_const_ok): Delete.
4632 (rs6000_vectorize_vec_perm_const): New function.
4633 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4634 an element count and rtx array.
4635 (rs6000_expand_extract_even): Update call accordingly.
4636 (rs6000_expand_interleave): Likewise.
4637 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4638 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4639 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4640 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4641 (rs6000_expand_vec_perm_const): Delete.
4642 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4643 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4644 (altivec_expand_vec_perm_const_le): Take each operand individually.
4645 Operate on constant selectors rather than rtxes.
4646 (altivec_expand_vec_perm_const): Likewise. Update call to
4647 altivec_expand_vec_perm_const_le.
4648 (rs6000_expand_vec_perm_const): Delete.
4649 (rs6000_vectorize_vec_perm_const_ok): Delete.
4650 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4651 reference to the SPE evmerge intructions.
4652 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4653 an element count and rtx array.
4654 (rs6000_expand_extract_even): Update call accordingly.
4655 (rs6000_expand_interleave): Likewise.
4656 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4657 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4659 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4661 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4663 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4664 vector mode and that that mode matches the mode of the data
4666 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4667 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4668 directly using expand_vec_perm_1 when forcing selectors into
4670 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4672 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4674 * optabs-query.h (can_vec_perm_p): Delete.
4675 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4676 * optabs-query.c (can_vec_perm_p): Split into...
4677 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4678 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4679 particular selector is valid.
4680 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4681 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4682 (vect_grouped_load_supported): Likewise.
4683 (vect_shift_permute_load_chain): Likewise.
4684 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4685 (vect_transform_slp_perm_load): Likewise.
4686 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4687 (vectorizable_bswap): Likewise.
4688 (vect_gen_perm_mask_checked): Likewise.
4689 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4690 implementations of variable permutation vectors into account
4691 when deciding which selector to use.
4692 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4693 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4694 with a false third argument.
4695 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4696 to test whether the constant selector is valid and can_vec_perm_var_p
4697 to test whether a variable selector is valid.
4699 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4701 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4702 * optabs-query.c (can_vec_perm_p): Likewise.
4703 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4704 instead of vec_perm_indices.
4705 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4706 (vect_gen_perm_mask_checked): Likewise,
4707 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4708 (vect_gen_perm_mask_checked): Likewise,
4710 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4712 * optabs-query.h (qimode_for_vec_perm): Declare.
4713 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4714 (qimode_for_vec_perm): ...this new function.
4715 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4717 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4719 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4720 does not have a conditional at the top.
4722 2018-01-02 Richard Biener <rguenther@suse.de>
4724 * ipa-inline.c (big_speedup_p): Fix expression.
4726 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4729 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4732 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4736 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4737 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4738 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4739 cond_taken_branch_cost 3->4.
4741 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4743 PR tree-optimization/83581
4744 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4745 TODO_cleanup_cfg if any changes have been made.
4748 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4749 convert_modes if target mode has the right side, but different mode
4753 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4754 last argument when extracting from CONCAT. If either from_real or
4755 from_imag is NULL, use expansion through memory. If result is not
4756 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4757 the parts directly to inner mode, if even that fails, use expansion
4761 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4762 check for bswap in mode rather than HImode and use that in expand_unop
4765 Copyright (C) 2018 Free Software Foundation, Inc.
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