1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
22 /* stdio.h must precede rtl.h for FFS. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
33 #include "insn-config.h"
44 #include "rtlhooks-def.h"
45 #include "tree-pass.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `REG_QTY (N)' records what quantity register N is currently thought
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, `REG_QTY (N)' will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 `REG_TICK' and `REG_IN_TABLE', accessors for members of
176 cse_reg_info, are used to detect this case. REG_TICK (i) is
177 incremented whenever a value is stored in register i.
178 REG_IN_TABLE (i) holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value REG_TICK (i)
180 had when the references were entered. If we want to enter a
181 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
182 remove old references. Until we want to enter a new entry, the
183 mere fact that the two vectors don't match makes the entries be
184 ignored if anyone tries to match them.
186 Registers themselves are entered in the hash table as well as in
187 the equivalent-register chains. However, `REG_TICK' and
188 `REG_IN_TABLE' do not apply to expressions which are simple
189 register references. These expressions are removed from the table
190 immediately when they become invalid, and this can be done even if
191 we do not immediately search for all the expressions that refer to
194 A CLOBBER rtx in an instruction invalidates its operand for further
195 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
196 invalidates everything that resides in memory.
200 Constant expressions that differ only by an additive integer
201 are called related. When a constant expression is put in
202 the table, the related expression with no constant term
203 is also entered. These are made to point at each other
204 so that it is possible to find out if there exists any
205 register equivalent to an expression related to a given expression. */
207 /* Length of qty_table vector. We know in advance we will not need
208 a quantity number this big. */
212 /* Next quantity number to be allocated.
213 This is 1 + the largest number needed so far. */
217 /* Per-qty information tracking.
219 `first_reg' and `last_reg' track the head and tail of the
220 chain of registers which currently contain this quantity.
222 `mode' contains the machine mode of this quantity.
224 `const_rtx' holds the rtx of the constant value of this
225 quantity, if known. A summations of the frame/arg pointer
226 and a constant can also be entered here. When this holds
227 a known value, `const_insn' is the insn which stored the
230 `comparison_{code,const,qty}' are used to track when a
231 comparison between a quantity and some constant or register has
232 been passed. In such a case, we know the results of the comparison
233 in case we see it again. These members record a comparison that
234 is known to be true. `comparison_code' holds the rtx code of such
235 a comparison, else it is set to UNKNOWN and the other two
236 comparison members are undefined. `comparison_const' holds
237 the constant being compared against, or zero if the comparison
238 is not against a constant. `comparison_qty' holds the quantity
239 being compared against when the result is known. If the comparison
240 is not with a register, `comparison_qty' is -1. */
242 struct qty_table_elem
246 rtx comparison_const
;
248 unsigned int first_reg
, last_reg
;
249 /* The sizes of these fields should match the sizes of the
250 code and mode fields of struct rtx_def (see rtl.h). */
251 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
252 ENUM_BITFIELD(machine_mode
) mode
: 8;
255 /* The table of all qtys, indexed by qty number. */
256 static struct qty_table_elem
*qty_table
;
258 /* Structure used to pass arguments via for_each_rtx to function
259 cse_change_cc_mode. */
260 struct change_cc_mode_args
267 /* For machines that have a CC0, we do not record its value in the hash
268 table since its use is guaranteed to be the insn immediately following
269 its definition and any other insn is presumed to invalidate it.
271 Instead, we store below the value last assigned to CC0. If it should
272 happen to be a constant, it is stored in preference to the actual
273 assigned value. In case it is a constant, we store the mode in which
274 the constant should be interpreted. */
276 static rtx prev_insn_cc0
;
277 static enum machine_mode prev_insn_cc0_mode
;
279 /* Previous actual insn. 0 if at first insn of basic block. */
281 static rtx prev_insn
;
284 /* Insn being scanned. */
286 static rtx this_insn
;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem
*reg_eqv_table
;
307 /* The timestamp at which this register is initialized. */
308 unsigned int timestamp
;
310 /* The quantity number of the register's current contents. */
313 /* The number of times the register has been altered in the current
317 /* The REG_TICK value at which rtx's containing this register are
318 valid in the hash table. If this does not equal the current
319 reg_tick value, such expressions existing in the hash table are
323 /* The SUBREG that was set when REG_TICK was last incremented. Set
324 to -1 if the last store was to the whole register, not a subreg. */
325 unsigned int subreg_ticked
;
328 /* A table of cse_reg_info indexed by register numbers. */
329 static struct cse_reg_info
*cse_reg_info_table
;
331 /* The size of the above table. */
332 static unsigned int cse_reg_info_table_size
;
334 /* The index of the first entry that has not been initialized. */
335 static unsigned int cse_reg_info_table_first_uninitialized
;
337 /* The timestamp at the beginning of the current run of
338 cse_basic_block. We increment this variable at the beginning of
339 the current run of cse_basic_block. The timestamp field of a
340 cse_reg_info entry matches the value of this variable if and only
341 if the entry has been initialized during the current run of
343 static unsigned int cse_reg_info_timestamp
;
345 /* A HARD_REG_SET containing all the hard registers for which there is
346 currently a REG expression in the hash table. Note the difference
347 from the above variables, which indicate if the REG is mentioned in some
348 expression in the table. */
350 static HARD_REG_SET hard_regs_in_table
;
352 /* CUID of insn that starts the basic block currently being cse-processed. */
354 static int cse_basic_block_start
;
356 /* CUID of insn that ends the basic block currently being cse-processed. */
358 static int cse_basic_block_end
;
360 /* Vector mapping INSN_UIDs to cuids.
361 The cuids are like uids but increase monotonically always.
362 We use them to see whether a reg is used outside a given basic block. */
364 static int *uid_cuid
;
366 /* Highest UID in UID_CUID. */
369 /* Get the cuid of an insn. */
371 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
373 /* Nonzero if this pass has made changes, and therefore it's
374 worthwhile to run the garbage collector. */
376 static int cse_altered
;
378 /* Nonzero if cse has altered conditional jump insns
379 in such a way that jump optimization should be redone. */
381 static int cse_jumps_altered
;
383 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
384 REG_LABEL, we have to rerun jump after CSE to put in the note. */
385 static int recorded_label_ref
;
387 /* canon_hash stores 1 in do_not_record
388 if it notices a reference to CC0, PC, or some other volatile
391 static int do_not_record
;
393 /* canon_hash stores 1 in hash_arg_in_memory
394 if it notices a reference to memory within the expression being hashed. */
396 static int hash_arg_in_memory
;
398 /* The hash table contains buckets which are chains of `struct table_elt's,
399 each recording one expression's information.
400 That expression is in the `exp' field.
402 The canon_exp field contains a canonical (from the point of view of
403 alias analysis) version of the `exp' field.
405 Those elements with the same hash code are chained in both directions
406 through the `next_same_hash' and `prev_same_hash' fields.
408 Each set of expressions with equivalent values
409 are on a two-way chain through the `next_same_value'
410 and `prev_same_value' fields, and all point with
411 the `first_same_value' field at the first element in
412 that chain. The chain is in order of increasing cost.
413 Each element's cost value is in its `cost' field.
415 The `in_memory' field is nonzero for elements that
416 involve any reference to memory. These elements are removed
417 whenever a write is done to an unidentified location in memory.
418 To be safe, we assume that a memory address is unidentified unless
419 the address is either a symbol constant or a constant plus
420 the frame pointer or argument pointer.
422 The `related_value' field is used to connect related expressions
423 (that differ by adding an integer).
424 The related expressions are chained in a circular fashion.
425 `related_value' is zero for expressions for which this
428 The `cost' field stores the cost of this element's expression.
429 The `regcost' field stores the value returned by approx_reg_cost for
430 this element's expression.
432 The `is_const' flag is set if the element is a constant (including
435 The `flag' field is used as a temporary during some search routines.
437 The `mode' field is usually the same as GET_MODE (`exp'), but
438 if `exp' is a CONST_INT and has no machine mode then the `mode'
439 field is the mode it was being used as. Each constant is
440 recorded separately for each mode it is used with. */
446 struct table_elt
*next_same_hash
;
447 struct table_elt
*prev_same_hash
;
448 struct table_elt
*next_same_value
;
449 struct table_elt
*prev_same_value
;
450 struct table_elt
*first_same_value
;
451 struct table_elt
*related_value
;
454 /* The size of this field should match the size
455 of the mode field of struct rtx_def (see rtl.h). */
456 ENUM_BITFIELD(machine_mode
) mode
: 8;
462 /* We don't want a lot of buckets, because we rarely have very many
463 things stored in the hash table, and a lot of buckets slows
464 down a lot of loops that happen frequently. */
466 #define HASH_SIZE (1 << HASH_SHIFT)
467 #define HASH_MASK (HASH_SIZE - 1)
469 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
470 register (hard registers may require `do_not_record' to be set). */
473 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
474 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
475 : canon_hash (X, M)) & HASH_MASK)
477 /* Like HASH, but without side-effects. */
478 #define SAFE_HASH(X, M) \
479 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
480 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
481 : safe_hash (X, M)) & HASH_MASK)
483 /* Determine whether register number N is considered a fixed register for the
484 purpose of approximating register costs.
485 It is desirable to replace other regs with fixed regs, to reduce need for
487 A reg wins if it is either the frame pointer or designated as fixed. */
488 #define FIXED_REGNO_P(N) \
489 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
490 || fixed_regs[N] || global_regs[N])
492 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
493 hard registers and pointers into the frame are the cheapest with a cost
494 of 0. Next come pseudos with a cost of one and other hard registers with
495 a cost of 2. Aside from these special cases, call `rtx_cost'. */
497 #define CHEAP_REGNO(N) \
498 (REGNO_PTR_FRAME_P(N) \
499 || (HARD_REGISTER_NUM_P (N) \
500 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
502 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
503 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
505 /* Get the number of times this register has been updated in this
508 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
510 /* Get the point at which REG was recorded in the table. */
512 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
514 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
517 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
519 /* Get the quantity number for REG. */
521 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
523 /* Determine if the quantity number for register X represents a valid index
524 into the qty_table. */
526 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
528 static struct table_elt
*table
[HASH_SIZE
];
530 /* Number of elements in the hash table. */
532 static unsigned int table_size
;
534 /* Chain of `struct table_elt's made so far for this function
535 but currently removed from the table. */
537 static struct table_elt
*free_element_chain
;
539 /* Set to the cost of a constant pool reference if one was found for a
540 symbolic constant. If this was found, it means we should try to
541 convert constants into constant pool entries if they don't fit in
544 static int constant_pool_entries_cost
;
545 static int constant_pool_entries_regcost
;
547 /* This data describes a block that will be processed by cse_basic_block. */
549 struct cse_basic_block_data
551 /* Lowest CUID value of insns in block. */
553 /* Highest CUID value of insns in block. */
555 /* Total number of SETs in block. */
557 /* Last insn in the block. */
559 /* Size of current branch path, if any. */
561 /* Current branch path, indicating which branches will be taken. */
564 /* The branch insn. */
566 /* Whether it should be taken or not. AROUND is the same as taken
567 except that it is used when the destination label is not preceded
569 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
573 static bool fixed_base_plus_p (rtx x
);
574 static int notreg_cost (rtx
, enum rtx_code
);
575 static int approx_reg_cost_1 (rtx
*, void *);
576 static int approx_reg_cost (rtx
);
577 static int preferable (int, int, int, int);
578 static void new_basic_block (void);
579 static void make_new_qty (unsigned int, enum machine_mode
);
580 static void make_regs_eqv (unsigned int, unsigned int);
581 static void delete_reg_equiv (unsigned int);
582 static int mention_regs (rtx
);
583 static int insert_regs (rtx
, struct table_elt
*, int);
584 static void remove_from_table (struct table_elt
*, unsigned);
585 static void remove_pseudo_from_table (rtx
, unsigned);
586 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
587 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
588 static rtx
lookup_as_function (rtx
, enum rtx_code
);
589 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
591 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
592 static void invalidate (rtx
, enum machine_mode
);
593 static int cse_rtx_varies_p (rtx
, int);
594 static void remove_invalid_refs (unsigned int);
595 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
597 static void rehash_using_reg (rtx
);
598 static void invalidate_memory (void);
599 static void invalidate_for_call (void);
600 static rtx
use_related_value (rtx
, struct table_elt
*);
602 static inline unsigned canon_hash (rtx
, enum machine_mode
);
603 static inline unsigned safe_hash (rtx
, enum machine_mode
);
604 static unsigned hash_rtx_string (const char *);
606 static rtx
canon_reg (rtx
, rtx
);
607 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
608 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
610 enum machine_mode
*);
611 static rtx
fold_rtx (rtx
, rtx
);
612 static rtx
equiv_constant (rtx
);
613 static void record_jump_equiv (rtx
, int);
614 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
616 static void cse_insn (rtx
, rtx
);
617 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
619 static int addr_affects_sp_p (rtx
);
620 static void invalidate_from_clobbers (rtx
);
621 static rtx
cse_process_notes (rtx
, rtx
);
622 static void invalidate_skipped_set (rtx
, rtx
, void *);
623 static void invalidate_skipped_block (rtx
);
624 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*);
625 static void count_reg_usage (rtx
, int *, rtx
, int);
626 static int check_for_label_ref (rtx
*, void *);
627 extern void dump_class (struct table_elt
*);
628 static void get_cse_reg_info_1 (unsigned int regno
);
629 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
630 static int check_dependence (rtx
*, void *);
632 static void flush_hash_table (void);
633 static bool insn_live_p (rtx
, int *);
634 static bool set_live_p (rtx
, rtx
, int *);
635 static bool dead_libcall_p (rtx
, int *);
636 static int cse_change_cc_mode (rtx
*, void *);
637 static void cse_change_cc_mode_insn (rtx
, rtx
);
638 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
639 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
642 #undef RTL_HOOKS_GEN_LOWPART
643 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
645 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
647 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
648 virtual regs here because the simplify_*_operation routines are called
649 by integrate.c, which is called before virtual register instantiation. */
652 fixed_base_plus_p (rtx x
)
654 switch (GET_CODE (x
))
657 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
659 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
661 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
662 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
667 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
669 return fixed_base_plus_p (XEXP (x
, 0));
676 /* Dump the expressions in the equivalence class indicated by CLASSP.
677 This function is used only for debugging. */
679 dump_class (struct table_elt
*classp
)
681 struct table_elt
*elt
;
683 fprintf (stderr
, "Equivalence chain for ");
684 print_rtl (stderr
, classp
->exp
);
685 fprintf (stderr
, ": \n");
687 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
689 print_rtl (stderr
, elt
->exp
);
690 fprintf (stderr
, "\n");
694 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
697 approx_reg_cost_1 (rtx
*xp
, void *data
)
704 unsigned int regno
= REGNO (x
);
706 if (! CHEAP_REGNO (regno
))
708 if (regno
< FIRST_PSEUDO_REGISTER
)
710 if (SMALL_REGISTER_CLASSES
)
722 /* Return an estimate of the cost of the registers used in an rtx.
723 This is mostly the number of different REG expressions in the rtx;
724 however for some exceptions like fixed registers we use a cost of
725 0. If any other hard register reference occurs, return MAX_COST. */
728 approx_reg_cost (rtx x
)
732 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
738 /* Returns a canonical version of X for the address, from the point of view,
739 that all multiplications are represented as MULT instead of the multiply
740 by a power of 2 being represented as ASHIFT. */
743 canon_for_address (rtx x
)
746 enum machine_mode mode
;
760 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
761 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (mode
)
762 && INTVAL (XEXP (x
, 1)) >= 0)
764 new = canon_for_address (XEXP (x
, 0));
765 new = gen_rtx_MULT (mode
, new,
766 gen_int_mode ((HOST_WIDE_INT
) 1
767 << INTVAL (XEXP (x
, 1)),
778 /* Now recursively process each operand of this operation. */
779 fmt
= GET_RTX_FORMAT (code
);
780 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
783 new = canon_for_address (XEXP (x
, i
));
789 /* Return a negative value if an rtx A, whose costs are given by COST_A
790 and REGCOST_A, is more desirable than an rtx B.
791 Return a positive value if A is less desirable, or 0 if the two are
794 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
796 /* First, get rid of cases involving expressions that are entirely
798 if (cost_a
!= cost_b
)
800 if (cost_a
== MAX_COST
)
802 if (cost_b
== MAX_COST
)
806 /* Avoid extending lifetimes of hardregs. */
807 if (regcost_a
!= regcost_b
)
809 if (regcost_a
== MAX_COST
)
811 if (regcost_b
== MAX_COST
)
815 /* Normal operation costs take precedence. */
816 if (cost_a
!= cost_b
)
817 return cost_a
- cost_b
;
818 /* Only if these are identical consider effects on register pressure. */
819 if (regcost_a
!= regcost_b
)
820 return regcost_a
- regcost_b
;
824 /* Internal function, to compute cost when X is not a register; called
825 from COST macro to keep it simple. */
828 notreg_cost (rtx x
, enum rtx_code outer
)
830 return ((GET_CODE (x
) == SUBREG
831 && REG_P (SUBREG_REG (x
))
832 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
833 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
834 && (GET_MODE_SIZE (GET_MODE (x
))
835 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
836 && subreg_lowpart_p (x
)
837 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
838 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
840 : rtx_cost (x
, outer
) * 2);
844 /* Initialize CSE_REG_INFO_TABLE. */
847 init_cse_reg_info (unsigned int nregs
)
849 /* Do we need to grow the table? */
850 if (nregs
> cse_reg_info_table_size
)
852 unsigned int new_size
;
854 if (cse_reg_info_table_size
< 2048)
856 /* Compute a new size that is a power of 2 and no smaller
857 than the large of NREGS and 64. */
858 new_size
= (cse_reg_info_table_size
859 ? cse_reg_info_table_size
: 64);
861 while (new_size
< nregs
)
866 /* If we need a big table, allocate just enough to hold
871 /* Reallocate the table with NEW_SIZE entries. */
872 if (cse_reg_info_table
)
873 free (cse_reg_info_table
);
874 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
875 cse_reg_info_table_size
= new_size
;
876 cse_reg_info_table_first_uninitialized
= 0;
879 /* Do we have all of the first NREGS entries initialized? */
880 if (cse_reg_info_table_first_uninitialized
< nregs
)
882 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
885 /* Put the old timestamp on newly allocated entries so that they
886 will all be considered out of date. We do not touch those
887 entries beyond the first NREGS entries to be nice to the
889 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
890 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
892 cse_reg_info_table_first_uninitialized
= nregs
;
896 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
899 get_cse_reg_info_1 (unsigned int regno
)
901 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
902 entry will be considered to have been initialized. */
903 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
905 /* Initialize the rest of the entry. */
906 cse_reg_info_table
[regno
].reg_tick
= 1;
907 cse_reg_info_table
[regno
].reg_in_table
= -1;
908 cse_reg_info_table
[regno
].subreg_ticked
= -1;
909 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
912 /* Find a cse_reg_info entry for REGNO. */
914 static inline struct cse_reg_info
*
915 get_cse_reg_info (unsigned int regno
)
917 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
919 /* If this entry has not been initialized, go ahead and initialize
921 if (p
->timestamp
!= cse_reg_info_timestamp
)
922 get_cse_reg_info_1 (regno
);
927 /* Clear the hash table and initialize each register with its own quantity,
928 for a new basic block. */
931 new_basic_block (void)
937 /* Invalidate cse_reg_info_table. */
938 cse_reg_info_timestamp
++;
940 /* Clear out hash table state for this pass. */
941 CLEAR_HARD_REG_SET (hard_regs_in_table
);
943 /* The per-quantity values used to be initialized here, but it is
944 much faster to initialize each as it is made in `make_new_qty'. */
946 for (i
= 0; i
< HASH_SIZE
; i
++)
948 struct table_elt
*first
;
953 struct table_elt
*last
= first
;
957 while (last
->next_same_hash
!= NULL
)
958 last
= last
->next_same_hash
;
960 /* Now relink this hash entire chain into
961 the free element list. */
963 last
->next_same_hash
= free_element_chain
;
964 free_element_chain
= first
;
976 /* Say that register REG contains a quantity in mode MODE not in any
977 register before and initialize that quantity. */
980 make_new_qty (unsigned int reg
, enum machine_mode mode
)
983 struct qty_table_elem
*ent
;
984 struct reg_eqv_elem
*eqv
;
986 gcc_assert (next_qty
< max_qty
);
988 q
= REG_QTY (reg
) = next_qty
++;
990 ent
->first_reg
= reg
;
993 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
994 ent
->comparison_code
= UNKNOWN
;
996 eqv
= ®_eqv_table
[reg
];
997 eqv
->next
= eqv
->prev
= -1;
1000 /* Make reg NEW equivalent to reg OLD.
1001 OLD is not changing; NEW is. */
1004 make_regs_eqv (unsigned int new, unsigned int old
)
1006 unsigned int lastr
, firstr
;
1007 int q
= REG_QTY (old
);
1008 struct qty_table_elem
*ent
;
1010 ent
= &qty_table
[q
];
1012 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1013 gcc_assert (REGNO_QTY_VALID_P (old
));
1016 firstr
= ent
->first_reg
;
1017 lastr
= ent
->last_reg
;
1019 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1020 hard regs. Among pseudos, if NEW will live longer than any other reg
1021 of the same qty, and that is beyond the current basic block,
1022 make it the new canonical replacement for this qty. */
1023 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
1024 /* Certain fixed registers might be of the class NO_REGS. This means
1025 that not only can they not be allocated by the compiler, but
1026 they cannot be used in substitutions or canonicalizations
1028 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
1029 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
1030 || (new >= FIRST_PSEUDO_REGISTER
1031 && (firstr
< FIRST_PSEUDO_REGISTER
1032 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
1033 || (uid_cuid
[REGNO_FIRST_UID (new)]
1034 < cse_basic_block_start
))
1035 && (uid_cuid
[REGNO_LAST_UID (new)]
1036 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
1038 reg_eqv_table
[firstr
].prev
= new;
1039 reg_eqv_table
[new].next
= firstr
;
1040 reg_eqv_table
[new].prev
= -1;
1041 ent
->first_reg
= new;
1045 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1046 Otherwise, insert before any non-fixed hard regs that are at the
1047 end. Registers of class NO_REGS cannot be used as an
1048 equivalent for anything. */
1049 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
1050 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
1051 && new >= FIRST_PSEUDO_REGISTER
)
1052 lastr
= reg_eqv_table
[lastr
].prev
;
1053 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
1054 if (reg_eqv_table
[lastr
].next
>= 0)
1055 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1057 qty_table
[q
].last_reg
= new;
1058 reg_eqv_table
[lastr
].next
= new;
1059 reg_eqv_table
[new].prev
= lastr
;
1063 /* Remove REG from its equivalence class. */
1066 delete_reg_equiv (unsigned int reg
)
1068 struct qty_table_elem
*ent
;
1069 int q
= REG_QTY (reg
);
1072 /* If invalid, do nothing. */
1073 if (! REGNO_QTY_VALID_P (reg
))
1076 ent
= &qty_table
[q
];
1078 p
= reg_eqv_table
[reg
].prev
;
1079 n
= reg_eqv_table
[reg
].next
;
1082 reg_eqv_table
[n
].prev
= p
;
1086 reg_eqv_table
[p
].next
= n
;
1090 REG_QTY (reg
) = -reg
- 1;
1093 /* Remove any invalid expressions from the hash table
1094 that refer to any of the registers contained in expression X.
1096 Make sure that newly inserted references to those registers
1097 as subexpressions will be considered valid.
1099 mention_regs is not called when a register itself
1100 is being stored in the table.
1102 Return 1 if we have done something that may have changed the hash code
1106 mention_regs (rtx x
)
1116 code
= GET_CODE (x
);
1119 unsigned int regno
= REGNO (x
);
1120 unsigned int endregno
1121 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1122 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1125 for (i
= regno
; i
< endregno
; i
++)
1127 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1128 remove_invalid_refs (i
);
1130 REG_IN_TABLE (i
) = REG_TICK (i
);
1131 SUBREG_TICKED (i
) = -1;
1137 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1138 pseudo if they don't use overlapping words. We handle only pseudos
1139 here for simplicity. */
1140 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1141 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1143 unsigned int i
= REGNO (SUBREG_REG (x
));
1145 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1147 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1148 the last store to this register really stored into this
1149 subreg, then remove the memory of this subreg.
1150 Otherwise, remove any memory of the entire register and
1151 all its subregs from the table. */
1152 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1153 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1154 remove_invalid_refs (i
);
1156 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1159 REG_IN_TABLE (i
) = REG_TICK (i
);
1160 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1164 /* If X is a comparison or a COMPARE and either operand is a register
1165 that does not have a quantity, give it one. This is so that a later
1166 call to record_jump_equiv won't cause X to be assigned a different
1167 hash code and not found in the table after that call.
1169 It is not necessary to do this here, since rehash_using_reg can
1170 fix up the table later, but doing this here eliminates the need to
1171 call that expensive function in the most common case where the only
1172 use of the register is in the comparison. */
1174 if (code
== COMPARE
|| COMPARISON_P (x
))
1176 if (REG_P (XEXP (x
, 0))
1177 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1178 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1180 rehash_using_reg (XEXP (x
, 0));
1184 if (REG_P (XEXP (x
, 1))
1185 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1186 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1188 rehash_using_reg (XEXP (x
, 1));
1193 fmt
= GET_RTX_FORMAT (code
);
1194 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1196 changed
|= mention_regs (XEXP (x
, i
));
1197 else if (fmt
[i
] == 'E')
1198 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1199 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1204 /* Update the register quantities for inserting X into the hash table
1205 with a value equivalent to CLASSP.
1206 (If the class does not contain a REG, it is irrelevant.)
1207 If MODIFIED is nonzero, X is a destination; it is being modified.
1208 Note that delete_reg_equiv should be called on a register
1209 before insert_regs is done on that register with MODIFIED != 0.
1211 Nonzero value means that elements of reg_qty have changed
1212 so X's hash code may be different. */
1215 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1219 unsigned int regno
= REGNO (x
);
1222 /* If REGNO is in the equivalence table already but is of the
1223 wrong mode for that equivalence, don't do anything here. */
1225 qty_valid
= REGNO_QTY_VALID_P (regno
);
1228 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1230 if (ent
->mode
!= GET_MODE (x
))
1234 if (modified
|| ! qty_valid
)
1237 for (classp
= classp
->first_same_value
;
1239 classp
= classp
->next_same_value
)
1240 if (REG_P (classp
->exp
)
1241 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1243 unsigned c_regno
= REGNO (classp
->exp
);
1245 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1247 /* Suppose that 5 is hard reg and 100 and 101 are
1250 (set (reg:si 100) (reg:si 5))
1251 (set (reg:si 5) (reg:si 100))
1252 (set (reg:di 101) (reg:di 5))
1254 We would now set REG_QTY (101) = REG_QTY (5), but the
1255 entry for 5 is in SImode. When we use this later in
1256 copy propagation, we get the register in wrong mode. */
1257 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1260 make_regs_eqv (regno
, c_regno
);
1264 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1265 than REG_IN_TABLE to find out if there was only a single preceding
1266 invalidation - for the SUBREG - or another one, which would be
1267 for the full register. However, if we find here that REG_TICK
1268 indicates that the register is invalid, it means that it has
1269 been invalidated in a separate operation. The SUBREG might be used
1270 now (then this is a recursive call), or we might use the full REG
1271 now and a SUBREG of it later. So bump up REG_TICK so that
1272 mention_regs will do the right thing. */
1274 && REG_IN_TABLE (regno
) >= 0
1275 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1277 make_new_qty (regno
, GET_MODE (x
));
1284 /* If X is a SUBREG, we will likely be inserting the inner register in the
1285 table. If that register doesn't have an assigned quantity number at
1286 this point but does later, the insertion that we will be doing now will
1287 not be accessible because its hash code will have changed. So assign
1288 a quantity number now. */
1290 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1291 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1293 insert_regs (SUBREG_REG (x
), NULL
, 0);
1298 return mention_regs (x
);
1301 /* Look in or update the hash table. */
1303 /* Remove table element ELT from use in the table.
1304 HASH is its hash code, made using the HASH macro.
1305 It's an argument because often that is known in advance
1306 and we save much time not recomputing it. */
1309 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1314 /* Mark this element as removed. See cse_insn. */
1315 elt
->first_same_value
= 0;
1317 /* Remove the table element from its equivalence class. */
1320 struct table_elt
*prev
= elt
->prev_same_value
;
1321 struct table_elt
*next
= elt
->next_same_value
;
1324 next
->prev_same_value
= prev
;
1327 prev
->next_same_value
= next
;
1330 struct table_elt
*newfirst
= next
;
1333 next
->first_same_value
= newfirst
;
1334 next
= next
->next_same_value
;
1339 /* Remove the table element from its hash bucket. */
1342 struct table_elt
*prev
= elt
->prev_same_hash
;
1343 struct table_elt
*next
= elt
->next_same_hash
;
1346 next
->prev_same_hash
= prev
;
1349 prev
->next_same_hash
= next
;
1350 else if (table
[hash
] == elt
)
1354 /* This entry is not in the proper hash bucket. This can happen
1355 when two classes were merged by `merge_equiv_classes'. Search
1356 for the hash bucket that it heads. This happens only very
1357 rarely, so the cost is acceptable. */
1358 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1359 if (table
[hash
] == elt
)
1364 /* Remove the table element from its related-value circular chain. */
1366 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1368 struct table_elt
*p
= elt
->related_value
;
1370 while (p
->related_value
!= elt
)
1371 p
= p
->related_value
;
1372 p
->related_value
= elt
->related_value
;
1373 if (p
->related_value
== p
)
1374 p
->related_value
= 0;
1377 /* Now add it to the free element chain. */
1378 elt
->next_same_hash
= free_element_chain
;
1379 free_element_chain
= elt
;
1384 /* Same as above, but X is a pseudo-register. */
1387 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1389 struct table_elt
*elt
;
1391 /* Because a pseudo-register can be referenced in more than one
1392 mode, we might have to remove more than one table entry. */
1393 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1394 remove_from_table (elt
, hash
);
1397 /* Look up X in the hash table and return its table element,
1398 or 0 if X is not in the table.
1400 MODE is the machine-mode of X, or if X is an integer constant
1401 with VOIDmode then MODE is the mode with which X will be used.
1403 Here we are satisfied to find an expression whose tree structure
1406 static struct table_elt
*
1407 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1409 struct table_elt
*p
;
1411 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1412 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1413 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1419 /* Like `lookup' but don't care whether the table element uses invalid regs.
1420 Also ignore discrepancies in the machine mode of a register. */
1422 static struct table_elt
*
1423 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1425 struct table_elt
*p
;
1429 unsigned int regno
= REGNO (x
);
1431 /* Don't check the machine mode when comparing registers;
1432 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1433 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1435 && REGNO (p
->exp
) == regno
)
1440 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1442 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1449 /* Look for an expression equivalent to X and with code CODE.
1450 If one is found, return that expression. */
1453 lookup_as_function (rtx x
, enum rtx_code code
)
1456 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1458 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1459 long as we are narrowing. So if we looked in vain for a mode narrower
1460 than word_mode before, look for word_mode now. */
1461 if (p
== 0 && code
== CONST_INT
1462 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1465 PUT_MODE (x
, word_mode
);
1466 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1472 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1473 if (GET_CODE (p
->exp
) == code
1474 /* Make sure this is a valid entry in the table. */
1475 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1481 /* Insert X in the hash table, assuming HASH is its hash code
1482 and CLASSP is an element of the class it should go in
1483 (or 0 if a new class should be made).
1484 It is inserted at the proper position to keep the class in
1485 the order cheapest first.
1487 MODE is the machine-mode of X, or if X is an integer constant
1488 with VOIDmode then MODE is the mode with which X will be used.
1490 For elements of equal cheapness, the most recent one
1491 goes in front, except that the first element in the list
1492 remains first unless a cheaper element is added. The order of
1493 pseudo-registers does not matter, as canon_reg will be called to
1494 find the cheapest when a register is retrieved from the table.
1496 The in_memory field in the hash table element is set to 0.
1497 The caller must set it nonzero if appropriate.
1499 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1500 and if insert_regs returns a nonzero value
1501 you must then recompute its hash code before calling here.
1503 If necessary, update table showing constant values of quantities. */
1505 #define CHEAPER(X, Y) \
1506 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1508 static struct table_elt
*
1509 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1511 struct table_elt
*elt
;
1513 /* If X is a register and we haven't made a quantity for it,
1514 something is wrong. */
1515 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1517 /* If X is a hard register, show it is being put in the table. */
1518 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1520 unsigned int regno
= REGNO (x
);
1521 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1524 for (i
= regno
; i
< endregno
; i
++)
1525 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1528 /* Put an element for X into the right hash bucket. */
1530 elt
= free_element_chain
;
1532 free_element_chain
= elt
->next_same_hash
;
1534 elt
= XNEW (struct table_elt
);
1537 elt
->canon_exp
= NULL_RTX
;
1538 elt
->cost
= COST (x
);
1539 elt
->regcost
= approx_reg_cost (x
);
1540 elt
->next_same_value
= 0;
1541 elt
->prev_same_value
= 0;
1542 elt
->next_same_hash
= table
[hash
];
1543 elt
->prev_same_hash
= 0;
1544 elt
->related_value
= 0;
1547 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1550 table
[hash
]->prev_same_hash
= elt
;
1553 /* Put it into the proper value-class. */
1556 classp
= classp
->first_same_value
;
1557 if (CHEAPER (elt
, classp
))
1558 /* Insert at the head of the class. */
1560 struct table_elt
*p
;
1561 elt
->next_same_value
= classp
;
1562 classp
->prev_same_value
= elt
;
1563 elt
->first_same_value
= elt
;
1565 for (p
= classp
; p
; p
= p
->next_same_value
)
1566 p
->first_same_value
= elt
;
1570 /* Insert not at head of the class. */
1571 /* Put it after the last element cheaper than X. */
1572 struct table_elt
*p
, *next
;
1574 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1577 /* Put it after P and before NEXT. */
1578 elt
->next_same_value
= next
;
1580 next
->prev_same_value
= elt
;
1582 elt
->prev_same_value
= p
;
1583 p
->next_same_value
= elt
;
1584 elt
->first_same_value
= classp
;
1588 elt
->first_same_value
= elt
;
1590 /* If this is a constant being set equivalent to a register or a register
1591 being set equivalent to a constant, note the constant equivalence.
1593 If this is a constant, it cannot be equivalent to a different constant,
1594 and a constant is the only thing that can be cheaper than a register. So
1595 we know the register is the head of the class (before the constant was
1598 If this is a register that is not already known equivalent to a
1599 constant, we must check the entire class.
1601 If this is a register that is already known equivalent to an insn,
1602 update the qtys `const_insn' to show that `this_insn' is the latest
1603 insn making that quantity equivalent to the constant. */
1605 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1608 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1609 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1611 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1612 exp_ent
->const_insn
= this_insn
;
1617 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1620 struct table_elt
*p
;
1622 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1624 if (p
->is_const
&& !REG_P (p
->exp
))
1626 int x_q
= REG_QTY (REGNO (x
));
1627 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1630 = gen_lowpart (GET_MODE (x
), p
->exp
);
1631 x_ent
->const_insn
= this_insn
;
1638 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1639 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1640 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1642 /* If this is a constant with symbolic value,
1643 and it has a term with an explicit integer value,
1644 link it up with related expressions. */
1645 if (GET_CODE (x
) == CONST
)
1647 rtx subexp
= get_related_value (x
);
1649 struct table_elt
*subelt
, *subelt_prev
;
1653 /* Get the integer-free subexpression in the hash table. */
1654 subhash
= SAFE_HASH (subexp
, mode
);
1655 subelt
= lookup (subexp
, subhash
, mode
);
1657 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1658 /* Initialize SUBELT's circular chain if it has none. */
1659 if (subelt
->related_value
== 0)
1660 subelt
->related_value
= subelt
;
1661 /* Find the element in the circular chain that precedes SUBELT. */
1662 subelt_prev
= subelt
;
1663 while (subelt_prev
->related_value
!= subelt
)
1664 subelt_prev
= subelt_prev
->related_value
;
1665 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1666 This way the element that follows SUBELT is the oldest one. */
1667 elt
->related_value
= subelt_prev
->related_value
;
1668 subelt_prev
->related_value
= elt
;
1677 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1678 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1679 the two classes equivalent.
1681 CLASS1 will be the surviving class; CLASS2 should not be used after this
1684 Any invalid entries in CLASS2 will not be copied. */
1687 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1689 struct table_elt
*elt
, *next
, *new;
1691 /* Ensure we start with the head of the classes. */
1692 class1
= class1
->first_same_value
;
1693 class2
= class2
->first_same_value
;
1695 /* If they were already equal, forget it. */
1696 if (class1
== class2
)
1699 for (elt
= class2
; elt
; elt
= next
)
1703 enum machine_mode mode
= elt
->mode
;
1705 next
= elt
->next_same_value
;
1707 /* Remove old entry, make a new one in CLASS1's class.
1708 Don't do this for invalid entries as we cannot find their
1709 hash code (it also isn't necessary). */
1710 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1712 bool need_rehash
= false;
1714 hash_arg_in_memory
= 0;
1715 hash
= HASH (exp
, mode
);
1719 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1720 delete_reg_equiv (REGNO (exp
));
1723 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1724 remove_pseudo_from_table (exp
, hash
);
1726 remove_from_table (elt
, hash
);
1728 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1730 rehash_using_reg (exp
);
1731 hash
= HASH (exp
, mode
);
1733 new = insert (exp
, class1
, hash
, mode
);
1734 new->in_memory
= hash_arg_in_memory
;
1739 /* Flush the entire hash table. */
1742 flush_hash_table (void)
1745 struct table_elt
*p
;
1747 for (i
= 0; i
< HASH_SIZE
; i
++)
1748 for (p
= table
[i
]; p
; p
= table
[i
])
1750 /* Note that invalidate can remove elements
1751 after P in the current hash chain. */
1753 invalidate (p
->exp
, VOIDmode
);
1755 remove_from_table (p
, i
);
1759 /* Function called for each rtx to check whether true dependence exist. */
1760 struct check_dependence_data
1762 enum machine_mode mode
;
1768 check_dependence (rtx
*x
, void *data
)
1770 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1771 if (*x
&& MEM_P (*x
))
1772 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1778 /* Remove from the hash table, or mark as invalid, all expressions whose
1779 values could be altered by storing in X. X is a register, a subreg, or
1780 a memory reference with nonvarying address (because, when a memory
1781 reference with a varying address is stored in, all memory references are
1782 removed by invalidate_memory so specific invalidation is superfluous).
1783 FULL_MODE, if not VOIDmode, indicates that this much should be
1784 invalidated instead of just the amount indicated by the mode of X. This
1785 is only used for bitfield stores into memory.
1787 A nonvarying address may be just a register or just a symbol reference,
1788 or it may be either of those plus a numeric offset. */
1791 invalidate (rtx x
, enum machine_mode full_mode
)
1794 struct table_elt
*p
;
1797 switch (GET_CODE (x
))
1801 /* If X is a register, dependencies on its contents are recorded
1802 through the qty number mechanism. Just change the qty number of
1803 the register, mark it as invalid for expressions that refer to it,
1804 and remove it itself. */
1805 unsigned int regno
= REGNO (x
);
1806 unsigned int hash
= HASH (x
, GET_MODE (x
));
1808 /* Remove REGNO from any quantity list it might be on and indicate
1809 that its value might have changed. If it is a pseudo, remove its
1810 entry from the hash table.
1812 For a hard register, we do the first two actions above for any
1813 additional hard registers corresponding to X. Then, if any of these
1814 registers are in the table, we must remove any REG entries that
1815 overlap these registers. */
1817 delete_reg_equiv (regno
);
1819 SUBREG_TICKED (regno
) = -1;
1821 if (regno
>= FIRST_PSEUDO_REGISTER
)
1822 remove_pseudo_from_table (x
, hash
);
1825 HOST_WIDE_INT in_table
1826 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1827 unsigned int endregno
1828 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1829 unsigned int tregno
, tendregno
, rn
;
1830 struct table_elt
*p
, *next
;
1832 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1834 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1836 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1837 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1838 delete_reg_equiv (rn
);
1840 SUBREG_TICKED (rn
) = -1;
1844 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1845 for (p
= table
[hash
]; p
; p
= next
)
1847 next
= p
->next_same_hash
;
1850 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1853 tregno
= REGNO (p
->exp
);
1855 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1856 if (tendregno
> regno
&& tregno
< endregno
)
1857 remove_from_table (p
, hash
);
1864 invalidate (SUBREG_REG (x
), VOIDmode
);
1868 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1869 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1873 /* This is part of a disjoint return value; extract the location in
1874 question ignoring the offset. */
1875 invalidate (XEXP (x
, 0), VOIDmode
);
1879 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1880 /* Calculate the canonical version of X here so that
1881 true_dependence doesn't generate new RTL for X on each call. */
1884 /* Remove all hash table elements that refer to overlapping pieces of
1886 if (full_mode
== VOIDmode
)
1887 full_mode
= GET_MODE (x
);
1889 for (i
= 0; i
< HASH_SIZE
; i
++)
1891 struct table_elt
*next
;
1893 for (p
= table
[i
]; p
; p
= next
)
1895 next
= p
->next_same_hash
;
1898 struct check_dependence_data d
;
1900 /* Just canonicalize the expression once;
1901 otherwise each time we call invalidate
1902 true_dependence will canonicalize the
1903 expression again. */
1905 p
->canon_exp
= canon_rtx (p
->exp
);
1909 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1910 remove_from_table (p
, i
);
1921 /* Remove all expressions that refer to register REGNO,
1922 since they are already invalid, and we are about to
1923 mark that register valid again and don't want the old
1924 expressions to reappear as valid. */
1927 remove_invalid_refs (unsigned int regno
)
1930 struct table_elt
*p
, *next
;
1932 for (i
= 0; i
< HASH_SIZE
; i
++)
1933 for (p
= table
[i
]; p
; p
= next
)
1935 next
= p
->next_same_hash
;
1937 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1938 remove_from_table (p
, i
);
1942 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1945 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1946 enum machine_mode mode
)
1949 struct table_elt
*p
, *next
;
1950 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1952 for (i
= 0; i
< HASH_SIZE
; i
++)
1953 for (p
= table
[i
]; p
; p
= next
)
1956 next
= p
->next_same_hash
;
1959 && (GET_CODE (exp
) != SUBREG
1960 || !REG_P (SUBREG_REG (exp
))
1961 || REGNO (SUBREG_REG (exp
)) != regno
1962 || (((SUBREG_BYTE (exp
)
1963 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1964 && SUBREG_BYTE (exp
) <= end
))
1965 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1966 remove_from_table (p
, i
);
1970 /* Recompute the hash codes of any valid entries in the hash table that
1971 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1973 This is called when we make a jump equivalence. */
1976 rehash_using_reg (rtx x
)
1979 struct table_elt
*p
, *next
;
1982 if (GET_CODE (x
) == SUBREG
)
1985 /* If X is not a register or if the register is known not to be in any
1986 valid entries in the table, we have no work to do. */
1989 || REG_IN_TABLE (REGNO (x
)) < 0
1990 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1993 /* Scan all hash chains looking for valid entries that mention X.
1994 If we find one and it is in the wrong hash chain, move it. */
1996 for (i
= 0; i
< HASH_SIZE
; i
++)
1997 for (p
= table
[i
]; p
; p
= next
)
1999 next
= p
->next_same_hash
;
2000 if (reg_mentioned_p (x
, p
->exp
)
2001 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2002 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2004 if (p
->next_same_hash
)
2005 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2007 if (p
->prev_same_hash
)
2008 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2010 table
[i
] = p
->next_same_hash
;
2012 p
->next_same_hash
= table
[hash
];
2013 p
->prev_same_hash
= 0;
2015 table
[hash
]->prev_same_hash
= p
;
2021 /* Remove from the hash table any expression that is a call-clobbered
2022 register. Also update their TICK values. */
2025 invalidate_for_call (void)
2027 unsigned int regno
, endregno
;
2030 struct table_elt
*p
, *next
;
2033 /* Go through all the hard registers. For each that is clobbered in
2034 a CALL_INSN, remove the register from quantity chains and update
2035 reg_tick if defined. Also see if any of these registers is currently
2038 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2039 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2041 delete_reg_equiv (regno
);
2042 if (REG_TICK (regno
) >= 0)
2045 SUBREG_TICKED (regno
) = -1;
2048 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2051 /* In the case where we have no call-clobbered hard registers in the
2052 table, we are done. Otherwise, scan the table and remove any
2053 entry that overlaps a call-clobbered register. */
2056 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2057 for (p
= table
[hash
]; p
; p
= next
)
2059 next
= p
->next_same_hash
;
2062 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2065 regno
= REGNO (p
->exp
);
2066 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
2068 for (i
= regno
; i
< endregno
; i
++)
2069 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2071 remove_from_table (p
, hash
);
2077 /* Given an expression X of type CONST,
2078 and ELT which is its table entry (or 0 if it
2079 is not in the hash table),
2080 return an alternate expression for X as a register plus integer.
2081 If none can be found, return 0. */
2084 use_related_value (rtx x
, struct table_elt
*elt
)
2086 struct table_elt
*relt
= 0;
2087 struct table_elt
*p
, *q
;
2088 HOST_WIDE_INT offset
;
2090 /* First, is there anything related known?
2091 If we have a table element, we can tell from that.
2092 Otherwise, must look it up. */
2094 if (elt
!= 0 && elt
->related_value
!= 0)
2096 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2098 rtx subexp
= get_related_value (x
);
2100 relt
= lookup (subexp
,
2101 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2108 /* Search all related table entries for one that has an
2109 equivalent register. */
2114 /* This loop is strange in that it is executed in two different cases.
2115 The first is when X is already in the table. Then it is searching
2116 the RELATED_VALUE list of X's class (RELT). The second case is when
2117 X is not in the table. Then RELT points to a class for the related
2120 Ensure that, whatever case we are in, that we ignore classes that have
2121 the same value as X. */
2123 if (rtx_equal_p (x
, p
->exp
))
2126 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2133 p
= p
->related_value
;
2135 /* We went all the way around, so there is nothing to be found.
2136 Alternatively, perhaps RELT was in the table for some other reason
2137 and it has no related values recorded. */
2138 if (p
== relt
|| p
== 0)
2145 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2146 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2147 return plus_constant (q
->exp
, offset
);
2150 /* Hash a string. Just add its bytes up. */
2151 static inline unsigned
2152 hash_rtx_string (const char *ps
)
2155 const unsigned char *p
= (const unsigned char *) ps
;
2164 /* Hash an rtx. We are careful to make sure the value is never negative.
2165 Equivalent registers hash identically.
2166 MODE is used in hashing for CONST_INTs only;
2167 otherwise the mode of X is used.
2169 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2171 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2172 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2174 Note that cse_insn knows that the hash code of a MEM expression
2175 is just (int) MEM plus the hash code of the address. */
2178 hash_rtx (rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2179 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2186 /* Used to turn recursion into iteration. We can't rely on GCC's
2187 tail-recursion elimination since we need to keep accumulating values
2193 code
= GET_CODE (x
);
2198 unsigned int regno
= REGNO (x
);
2200 if (!reload_completed
)
2202 /* On some machines, we can't record any non-fixed hard register,
2203 because extending its life will cause reload problems. We
2204 consider ap, fp, sp, gp to be fixed for this purpose.
2206 We also consider CCmode registers to be fixed for this purpose;
2207 failure to do so leads to failure to simplify 0<100 type of
2210 On all machines, we can't record any global registers.
2211 Nor should we record any register that is in a small
2212 class, as defined by CLASS_LIKELY_SPILLED_P. */
2215 if (regno
>= FIRST_PSEUDO_REGISTER
)
2217 else if (x
== frame_pointer_rtx
2218 || x
== hard_frame_pointer_rtx
2219 || x
== arg_pointer_rtx
2220 || x
== stack_pointer_rtx
2221 || x
== pic_offset_table_rtx
)
2223 else if (global_regs
[regno
])
2225 else if (fixed_regs
[regno
])
2227 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2229 else if (SMALL_REGISTER_CLASSES
)
2231 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2238 *do_not_record_p
= 1;
2243 hash
+= ((unsigned int) REG
<< 7);
2244 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2248 /* We handle SUBREG of a REG specially because the underlying
2249 reg changes its hash value with every value change; we don't
2250 want to have to forget unrelated subregs when one subreg changes. */
2253 if (REG_P (SUBREG_REG (x
)))
2255 hash
+= (((unsigned int) SUBREG
<< 7)
2256 + REGNO (SUBREG_REG (x
))
2257 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2264 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2265 + (unsigned int) INTVAL (x
));
2269 /* This is like the general case, except that it only counts
2270 the integers representing the constant. */
2271 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2272 if (GET_MODE (x
) != VOIDmode
)
2273 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2275 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2276 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2284 units
= CONST_VECTOR_NUNITS (x
);
2286 for (i
= 0; i
< units
; ++i
)
2288 elt
= CONST_VECTOR_ELT (x
, i
);
2289 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2290 hash_arg_in_memory_p
, have_reg_qty
);
2296 /* Assume there is only one rtx object for any given label. */
2298 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2299 differences and differences between each stage's debugging dumps. */
2300 hash
+= (((unsigned int) LABEL_REF
<< 7)
2301 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2306 /* Don't hash on the symbol's address to avoid bootstrap differences.
2307 Different hash values may cause expressions to be recorded in
2308 different orders and thus different registers to be used in the
2309 final assembler. This also avoids differences in the dump files
2310 between various stages. */
2312 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2315 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2317 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2322 /* We don't record if marked volatile or if BLKmode since we don't
2323 know the size of the move. */
2324 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2326 *do_not_record_p
= 1;
2329 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2330 *hash_arg_in_memory_p
= 1;
2332 /* Now that we have already found this special case,
2333 might as well speed it up as much as possible. */
2334 hash
+= (unsigned) MEM
;
2339 /* A USE that mentions non-volatile memory needs special
2340 handling since the MEM may be BLKmode which normally
2341 prevents an entry from being made. Pure calls are
2342 marked by a USE which mentions BLKmode memory.
2343 See calls.c:emit_call_1. */
2344 if (MEM_P (XEXP (x
, 0))
2345 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2347 hash
+= (unsigned) USE
;
2350 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2351 *hash_arg_in_memory_p
= 1;
2353 /* Now that we have already found this special case,
2354 might as well speed it up as much as possible. */
2355 hash
+= (unsigned) MEM
;
2370 case UNSPEC_VOLATILE
:
2371 *do_not_record_p
= 1;
2375 if (MEM_VOLATILE_P (x
))
2377 *do_not_record_p
= 1;
2382 /* We don't want to take the filename and line into account. */
2383 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2384 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2385 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2386 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2388 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2390 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2392 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2393 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2394 do_not_record_p
, hash_arg_in_memory_p
,
2397 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2400 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2401 x
= ASM_OPERANDS_INPUT (x
, 0);
2402 mode
= GET_MODE (x
);
2414 i
= GET_RTX_LENGTH (code
) - 1;
2415 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2416 fmt
= GET_RTX_FORMAT (code
);
2422 /* If we are about to do the last recursive call
2423 needed at this level, change it into iteration.
2424 This function is called enough to be worth it. */
2431 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2432 hash_arg_in_memory_p
, have_reg_qty
);
2436 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2437 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2438 hash_arg_in_memory_p
, have_reg_qty
);
2442 hash
+= hash_rtx_string (XSTR (x
, i
));
2446 hash
+= (unsigned int) XINT (x
, i
);
2461 /* Hash an rtx X for cse via hash_rtx.
2462 Stores 1 in do_not_record if any subexpression is volatile.
2463 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2464 does not have the RTX_UNCHANGING_P bit set. */
2466 static inline unsigned
2467 canon_hash (rtx x
, enum machine_mode mode
)
2469 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2472 /* Like canon_hash but with no side effects, i.e. do_not_record
2473 and hash_arg_in_memory are not changed. */
2475 static inline unsigned
2476 safe_hash (rtx x
, enum machine_mode mode
)
2478 int dummy_do_not_record
;
2479 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2482 /* Return 1 iff X and Y would canonicalize into the same thing,
2483 without actually constructing the canonicalization of either one.
2484 If VALIDATE is nonzero,
2485 we assume X is an expression being processed from the rtl
2486 and Y was found in the hash table. We check register refs
2487 in Y for being marked as valid.
2489 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2492 exp_equiv_p (rtx x
, rtx y
, int validate
, bool for_gcse
)
2498 /* Note: it is incorrect to assume an expression is equivalent to itself
2499 if VALIDATE is nonzero. */
2500 if (x
== y
&& !validate
)
2503 if (x
== 0 || y
== 0)
2506 code
= GET_CODE (x
);
2507 if (code
!= GET_CODE (y
))
2510 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2511 if (GET_MODE (x
) != GET_MODE (y
))
2523 return XEXP (x
, 0) == XEXP (y
, 0);
2526 return XSTR (x
, 0) == XSTR (y
, 0);
2530 return REGNO (x
) == REGNO (y
);
2533 unsigned int regno
= REGNO (y
);
2535 unsigned int endregno
2536 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2537 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2539 /* If the quantities are not the same, the expressions are not
2540 equivalent. If there are and we are not to validate, they
2541 are equivalent. Otherwise, ensure all regs are up-to-date. */
2543 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2549 for (i
= regno
; i
< endregno
; i
++)
2550 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2559 /* A volatile mem should not be considered equivalent to any
2561 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2564 /* Can't merge two expressions in different alias sets, since we
2565 can decide that the expression is transparent in a block when
2566 it isn't, due to it being set with the different alias set.
2568 Also, can't merge two expressions with different MEM_ATTRS.
2569 They could e.g. be two different entities allocated into the
2570 same space on the stack (see e.g. PR25130). In that case, the
2571 MEM addresses can be the same, even though the two MEMs are
2572 absolutely not equivalent.
2574 But because really all MEM attributes should be the same for
2575 equivalent MEMs, we just use the invariant that MEMs that have
2576 the same attributes share the same mem_attrs data structure. */
2577 if (MEM_ATTRS (x
) != MEM_ATTRS (y
))
2582 /* For commutative operations, check both orders. */
2590 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2592 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2593 validate
, for_gcse
))
2594 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2596 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2597 validate
, for_gcse
)));
2600 /* We don't use the generic code below because we want to
2601 disregard filename and line numbers. */
2603 /* A volatile asm isn't equivalent to any other. */
2604 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2607 if (GET_MODE (x
) != GET_MODE (y
)
2608 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2609 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2610 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2611 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2612 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2615 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2617 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2618 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2619 ASM_OPERANDS_INPUT (y
, i
),
2621 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2622 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2632 /* Compare the elements. If any pair of corresponding elements
2633 fail to match, return 0 for the whole thing. */
2635 fmt
= GET_RTX_FORMAT (code
);
2636 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2641 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2642 validate
, for_gcse
))
2647 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2649 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2650 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2651 validate
, for_gcse
))
2656 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2661 if (XINT (x
, i
) != XINT (y
, i
))
2666 if (XWINT (x
, i
) != XWINT (y
, i
))
2682 /* Return 1 if X has a value that can vary even between two
2683 executions of the program. 0 means X can be compared reliably
2684 against certain constants or near-constants. */
2687 cse_rtx_varies_p (rtx x
, int from_alias
)
2689 /* We need not check for X and the equivalence class being of the same
2690 mode because if X is equivalent to a constant in some mode, it
2691 doesn't vary in any mode. */
2694 && REGNO_QTY_VALID_P (REGNO (x
)))
2696 int x_q
= REG_QTY (REGNO (x
));
2697 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2699 if (GET_MODE (x
) == x_ent
->mode
2700 && x_ent
->const_rtx
!= NULL_RTX
)
2704 if (GET_CODE (x
) == PLUS
2705 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2706 && REG_P (XEXP (x
, 0))
2707 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2709 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2710 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2712 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2713 && x0_ent
->const_rtx
!= NULL_RTX
)
2717 /* This can happen as the result of virtual register instantiation, if
2718 the initial constant is too large to be a valid address. This gives
2719 us a three instruction sequence, load large offset into a register,
2720 load fp minus a constant into a register, then a MEM which is the
2721 sum of the two `constant' registers. */
2722 if (GET_CODE (x
) == PLUS
2723 && REG_P (XEXP (x
, 0))
2724 && REG_P (XEXP (x
, 1))
2725 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2726 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2728 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2729 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2730 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2731 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2733 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2734 && x0_ent
->const_rtx
!= NULL_RTX
2735 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2736 && x1_ent
->const_rtx
!= NULL_RTX
)
2740 return rtx_varies_p (x
, from_alias
);
2743 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2744 the result if necessary. INSN is as for canon_reg. */
2747 validate_canon_reg (rtx
*xloc
, rtx insn
)
2749 rtx
new = canon_reg (*xloc
, insn
);
2751 /* If replacing pseudo with hard reg or vice versa, ensure the
2752 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2753 if (insn
!= 0 && new != 0)
2754 validate_change (insn
, xloc
, new, 1);
2759 /* Canonicalize an expression:
2760 replace each register reference inside it
2761 with the "oldest" equivalent register.
2763 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2764 after we make our substitution. The calls are made with IN_GROUP nonzero
2765 so apply_change_group must be called upon the outermost return from this
2766 function (unless INSN is zero). The result of apply_change_group can
2767 generally be discarded since the changes we are making are optional. */
2770 canon_reg (rtx x
, rtx insn
)
2779 code
= GET_CODE (x
);
2798 struct qty_table_elem
*ent
;
2800 /* Never replace a hard reg, because hard regs can appear
2801 in more than one machine mode, and we must preserve the mode
2802 of each occurrence. Also, some hard regs appear in
2803 MEMs that are shared and mustn't be altered. Don't try to
2804 replace any reg that maps to a reg of class NO_REGS. */
2805 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2806 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2809 q
= REG_QTY (REGNO (x
));
2810 ent
= &qty_table
[q
];
2811 first
= ent
->first_reg
;
2812 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2813 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2814 : gen_rtx_REG (ent
->mode
, first
));
2821 fmt
= GET_RTX_FORMAT (code
);
2822 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2827 validate_canon_reg (&XEXP (x
, i
), insn
);
2828 else if (fmt
[i
] == 'E')
2829 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2830 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2836 /* LOC is a location within INSN that is an operand address (the contents of
2837 a MEM). Find the best equivalent address to use that is valid for this
2840 On most CISC machines, complicated address modes are costly, and rtx_cost
2841 is a good approximation for that cost. However, most RISC machines have
2842 only a few (usually only one) memory reference formats. If an address is
2843 valid at all, it is often just as cheap as any other address. Hence, for
2844 RISC machines, we use `address_cost' to compare the costs of various
2845 addresses. For two addresses of equal cost, choose the one with the
2846 highest `rtx_cost' value as that has the potential of eliminating the
2847 most insns. For equal costs, we choose the first in the equivalence
2848 class. Note that we ignore the fact that pseudo registers are cheaper than
2849 hard registers here because we would also prefer the pseudo registers. */
2852 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2854 struct table_elt
*elt
;
2856 struct table_elt
*p
;
2857 int found_better
= 1;
2858 int save_do_not_record
= do_not_record
;
2859 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2864 /* Do not try to replace constant addresses or addresses of local and
2865 argument slots. These MEM expressions are made only once and inserted
2866 in many instructions, as well as being used to control symbol table
2867 output. It is not safe to clobber them.
2869 There are some uncommon cases where the address is already in a register
2870 for some reason, but we cannot take advantage of that because we have
2871 no easy way to unshare the MEM. In addition, looking up all stack
2872 addresses is costly. */
2873 if ((GET_CODE (addr
) == PLUS
2874 && REG_P (XEXP (addr
, 0))
2875 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2876 && (regno
= REGNO (XEXP (addr
, 0)),
2877 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2878 || regno
== ARG_POINTER_REGNUM
))
2880 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2881 || regno
== HARD_FRAME_POINTER_REGNUM
2882 || regno
== ARG_POINTER_REGNUM
))
2883 || CONSTANT_ADDRESS_P (addr
))
2886 /* If this address is not simply a register, try to fold it. This will
2887 sometimes simplify the expression. Many simplifications
2888 will not be valid, but some, usually applying the associative rule, will
2889 be valid and produce better code. */
2892 rtx folded
= canon_for_address (fold_rtx (addr
, NULL_RTX
));
2896 int addr_folded_cost
= address_cost (folded
, mode
);
2897 int addr_cost
= address_cost (addr
, mode
);
2899 if ((addr_folded_cost
< addr_cost
2900 || (addr_folded_cost
== addr_cost
2901 /* ??? The rtx_cost comparison is left over from an older
2902 version of this code. It is probably no longer helpful.*/
2903 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2904 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2905 && validate_change (insn
, loc
, folded
, 0))
2910 /* If this address is not in the hash table, we can't look for equivalences
2911 of the whole address. Also, ignore if volatile. */
2914 hash
= HASH (addr
, Pmode
);
2915 addr_volatile
= do_not_record
;
2916 do_not_record
= save_do_not_record
;
2917 hash_arg_in_memory
= save_hash_arg_in_memory
;
2922 elt
= lookup (addr
, hash
, Pmode
);
2926 /* We need to find the best (under the criteria documented above) entry
2927 in the class that is valid. We use the `flag' field to indicate
2928 choices that were invalid and iterate until we can't find a better
2929 one that hasn't already been tried. */
2931 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2934 while (found_better
)
2936 int best_addr_cost
= address_cost (*loc
, mode
);
2937 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2939 struct table_elt
*best_elt
= elt
;
2942 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2946 || exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2947 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2948 || (exp_cost
== best_addr_cost
2949 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2952 best_addr_cost
= exp_cost
;
2953 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2960 if (validate_change (insn
, loc
,
2961 canon_reg (copy_rtx (best_elt
->exp
),
2970 /* If the address is a binary operation with the first operand a register
2971 and the second a constant, do the same as above, but looking for
2972 equivalences of the register. Then try to simplify before checking for
2973 the best address to use. This catches a few cases: First is when we
2974 have REG+const and the register is another REG+const. We can often merge
2975 the constants and eliminate one insn and one register. It may also be
2976 that a machine has a cheap REG+REG+const. Finally, this improves the
2977 code on the Alpha for unaligned byte stores. */
2979 if (flag_expensive_optimizations
2980 && ARITHMETIC_P (*loc
)
2981 && REG_P (XEXP (*loc
, 0)))
2983 rtx op1
= XEXP (*loc
, 1);
2986 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2987 do_not_record
= save_do_not_record
;
2988 hash_arg_in_memory
= save_hash_arg_in_memory
;
2990 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2994 /* We need to find the best (under the criteria documented above) entry
2995 in the class that is valid. We use the `flag' field to indicate
2996 choices that were invalid and iterate until we can't find a better
2997 one that hasn't already been tried. */
2999 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
3002 while (found_better
)
3004 int best_addr_cost
= address_cost (*loc
, mode
);
3005 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
3006 struct table_elt
*best_elt
= elt
;
3007 rtx best_rtx
= *loc
;
3010 /* This is at worst case an O(n^2) algorithm, so limit our search
3011 to the first 32 elements on the list. This avoids trouble
3012 compiling code with very long basic blocks that can easily
3013 call simplify_gen_binary so many times that we run out of
3017 for (p
= elt
->first_same_value
, count
= 0;
3019 p
= p
->next_same_value
, count
++)
3022 || (GET_CODE (p
->exp
) != EXPR_LIST
3023 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))))
3026 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
3030 /* Get the canonical version of the address so we can accept
3032 new = canon_for_address (new);
3034 new_cost
= address_cost (new, mode
);
3036 if (new_cost
< best_addr_cost
3037 || (new_cost
== best_addr_cost
3038 && (COST (new) + 1) >> 1 > best_rtx_cost
))
3041 best_addr_cost
= new_cost
;
3042 best_rtx_cost
= (COST (new) + 1) >> 1;
3050 if (validate_change (insn
, loc
,
3051 canon_reg (copy_rtx (best_rtx
),
3061 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3062 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3063 what values are being compared.
3065 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3066 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3067 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3068 compared to produce cc0.
3070 The return value is the comparison operator and is either the code of
3071 A or the code corresponding to the inverse of the comparison. */
3073 static enum rtx_code
3074 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
3075 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
3079 arg1
= *parg1
, arg2
= *parg2
;
3081 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3083 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
3085 /* Set nonzero when we find something of interest. */
3087 int reverse_code
= 0;
3088 struct table_elt
*p
= 0;
3090 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3091 On machines with CC0, this is the only case that can occur, since
3092 fold_rtx will return the COMPARE or item being compared with zero
3095 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
3098 /* If ARG1 is a comparison operator and CODE is testing for
3099 STORE_FLAG_VALUE, get the inner arguments. */
3101 else if (COMPARISON_P (arg1
))
3103 #ifdef FLOAT_STORE_FLAG_VALUE
3104 REAL_VALUE_TYPE fsfv
;
3108 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3109 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3110 #ifdef FLOAT_STORE_FLAG_VALUE
3111 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
3112 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3113 REAL_VALUE_NEGATIVE (fsfv
)))
3118 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3119 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3120 #ifdef FLOAT_STORE_FLAG_VALUE
3121 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
3122 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3123 REAL_VALUE_NEGATIVE (fsfv
)))
3126 x
= arg1
, reverse_code
= 1;
3129 /* ??? We could also check for
3131 (ne (and (eq (...) (const_int 1))) (const_int 0))
3133 and related forms, but let's wait until we see them occurring. */
3136 /* Look up ARG1 in the hash table and see if it has an equivalence
3137 that lets us see what is being compared. */
3138 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3141 p
= p
->first_same_value
;
3143 /* If what we compare is already known to be constant, that is as
3145 We need to break the loop in this case, because otherwise we
3146 can have an infinite loop when looking at a reg that is known
3147 to be a constant which is the same as a comparison of a reg
3148 against zero which appears later in the insn stream, which in
3149 turn is constant and the same as the comparison of the first reg
3155 for (; p
; p
= p
->next_same_value
)
3157 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3158 #ifdef FLOAT_STORE_FLAG_VALUE
3159 REAL_VALUE_TYPE fsfv
;
3162 /* If the entry isn't valid, skip it. */
3163 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3166 if (GET_CODE (p
->exp
) == COMPARE
3167 /* Another possibility is that this machine has a compare insn
3168 that includes the comparison code. In that case, ARG1 would
3169 be equivalent to a comparison operation that would set ARG1 to
3170 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3171 ORIG_CODE is the actual comparison being done; if it is an EQ,
3172 we must reverse ORIG_CODE. On machine with a negative value
3173 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3176 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3177 && (GET_MODE_BITSIZE (inner_mode
)
3178 <= HOST_BITS_PER_WIDE_INT
)
3179 && (STORE_FLAG_VALUE
3180 & ((HOST_WIDE_INT
) 1
3181 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3182 #ifdef FLOAT_STORE_FLAG_VALUE
3184 && SCALAR_FLOAT_MODE_P (inner_mode
)
3185 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3186 REAL_VALUE_NEGATIVE (fsfv
)))
3189 && COMPARISON_P (p
->exp
)))
3194 else if ((code
== EQ
3196 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3197 && (GET_MODE_BITSIZE (inner_mode
)
3198 <= HOST_BITS_PER_WIDE_INT
)
3199 && (STORE_FLAG_VALUE
3200 & ((HOST_WIDE_INT
) 1
3201 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3202 #ifdef FLOAT_STORE_FLAG_VALUE
3204 && SCALAR_FLOAT_MODE_P (inner_mode
)
3205 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3206 REAL_VALUE_NEGATIVE (fsfv
)))
3209 && COMPARISON_P (p
->exp
))
3216 /* If this non-trapping address, e.g. fp + constant, the
3217 equivalent is a better operand since it may let us predict
3218 the value of the comparison. */
3219 else if (!rtx_addr_can_trap_p (p
->exp
))
3226 /* If we didn't find a useful equivalence for ARG1, we are done.
3227 Otherwise, set up for the next iteration. */
3231 /* If we need to reverse the comparison, make sure that that is
3232 possible -- we can't necessarily infer the value of GE from LT
3233 with floating-point operands. */
3236 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3237 if (reversed
== UNKNOWN
)
3242 else if (COMPARISON_P (x
))
3243 code
= GET_CODE (x
);
3244 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3247 /* Return our results. Return the modes from before fold_rtx
3248 because fold_rtx might produce const_int, and then it's too late. */
3249 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3250 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3258 fold_rtx_subreg (rtx x
, rtx insn
)
3260 enum machine_mode mode
= GET_MODE (x
);
3265 /* See if we previously assigned a constant value to this SUBREG. */
3266 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3267 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3270 /* If this is a paradoxical SUBREG, we have no idea what value the
3271 extra bits would have. However, if the operand is equivalent to
3272 a SUBREG whose operand is the same as our mode, and all the modes
3273 are within a word, we can just use the inner operand because
3274 these SUBREGs just say how to treat the register.
3276 Similarly if we find an integer constant. */
3278 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3280 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3281 struct table_elt
*elt
;
3283 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3284 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3285 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3287 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3289 if (CONSTANT_P (elt
->exp
)
3290 && GET_MODE (elt
->exp
) == VOIDmode
)
3293 if (GET_CODE (elt
->exp
) == SUBREG
3294 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3295 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3296 return copy_rtx (SUBREG_REG (elt
->exp
));
3302 /* Fold SUBREG_REG. If it changed, see if we can simplify the
3303 SUBREG. We might be able to if the SUBREG is extracting a single
3304 word in an integral mode or extracting the low part. */
3306 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3307 const_arg0
= equiv_constant (folded_arg0
);
3309 folded_arg0
= const_arg0
;
3311 if (folded_arg0
!= SUBREG_REG (x
))
3313 new = simplify_subreg (mode
, folded_arg0
,
3314 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3319 if (REG_P (folded_arg0
)
3320 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3322 struct table_elt
*elt
;
3324 elt
= lookup (folded_arg0
,
3325 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3326 GET_MODE (folded_arg0
));
3329 elt
= elt
->first_same_value
;
3331 if (subreg_lowpart_p (x
))
3332 /* If this is a narrowing SUBREG and our operand is a REG, see
3333 if we can find an equivalence for REG that is an arithmetic
3334 operation in a wider mode where both operands are
3335 paradoxical SUBREGs from objects of our result mode. In
3336 that case, we couldn-t report an equivalent value for that
3337 operation, since we don't know what the extra bits will be.
3338 But we can find an equivalence for this SUBREG by folding
3339 that operation in the narrow mode. This allows us to fold
3340 arithmetic in narrow modes when the machine only supports
3341 word-sized arithmetic.
3343 Also look for a case where we have a SUBREG whose operand
3344 is the same as our result. If both modes are smaller than
3345 a word, we are simply interpreting a register in different
3346 modes and we can use the inner value. */
3348 for (; elt
; elt
= elt
->next_same_value
)
3350 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3352 /* Just check for unary and binary operations. */
3353 if (UNARY_P (elt
->exp
)
3354 && eltcode
!= SIGN_EXTEND
3355 && eltcode
!= ZERO_EXTEND
3356 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3357 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3358 && (GET_MODE_CLASS (mode
)
3359 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3361 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3363 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3364 op0
= fold_rtx (op0
, NULL_RTX
);
3366 op0
= equiv_constant (op0
);
3368 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3371 else if (ARITHMETIC_P (elt
->exp
)
3372 && eltcode
!= DIV
&& eltcode
!= MOD
3373 && eltcode
!= UDIV
&& eltcode
!= UMOD
3374 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3375 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3376 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3377 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3379 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3380 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3381 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3383 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3385 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3386 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3388 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3389 op0
= fold_rtx (op0
, NULL_RTX
);
3392 op0
= equiv_constant (op0
);
3394 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3395 op1
= fold_rtx (op1
, NULL_RTX
);
3398 op1
= equiv_constant (op1
);
3400 /* If we are looking for the low SImode part of
3401 (ashift:DI c (const_int 32)), it doesn't work to
3402 compute that in SImode, because a 32-bit shift in
3403 SImode is unpredictable. We know the value is
3406 && GET_CODE (elt
->exp
) == ASHIFT
3407 && GET_CODE (op1
) == CONST_INT
3408 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3411 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3412 /* If the count fits in the inner mode's width,
3413 but exceeds the outer mode's width, the value
3414 will get truncated to 0 by the subreg. */
3415 new = CONST0_RTX (mode
);
3417 /* If the count exceeds even the inner mode's width,
3418 don't fold this expression. */
3421 else if (op0
&& op1
)
3422 new = simplify_binary_operation (GET_CODE (elt
->exp
),
3426 else if (GET_CODE (elt
->exp
) == SUBREG
3427 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3428 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3430 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3431 new = copy_rtx (SUBREG_REG (elt
->exp
));
3437 /* A SUBREG resulting from a zero extension may fold to zero
3438 if it extracts higher bits than the ZERO_EXTEND's source
3439 bits. FIXME: if combine tried to, er, combine these
3440 instructions, this transformation may be moved to
3442 for (; elt
; elt
= elt
->next_same_value
)
3444 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3446 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3447 return CONST0_RTX (mode
);
3454 /* Fold MEM. Not to be called directly, see fold_rtx_mem instead. */
3457 fold_rtx_mem_1 (rtx x
, rtx insn
)
3459 enum machine_mode mode
= GET_MODE (x
);
3462 /* If we are not actually processing an insn, don't try to find the
3463 best address. Not only don't we care, but we could modify the
3464 MEM in an invalid way since we have no insn to validate
3467 find_best_addr (insn
, &XEXP (x
, 0), mode
);
3470 /* Even if we don't fold in the insn itself, we can safely do so
3471 here, in hopes of getting a constant. */
3472 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3474 HOST_WIDE_INT offset
= 0;
3477 && REGNO_QTY_VALID_P (REGNO (addr
)))
3479 int addr_q
= REG_QTY (REGNO (addr
));
3480 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3482 if (GET_MODE (addr
) == addr_ent
->mode
3483 && addr_ent
->const_rtx
!= NULL_RTX
)
3484 addr
= addr_ent
->const_rtx
;
3487 /* Call target hook to avoid the effects of -fpic etc.... */
3488 addr
= targetm
.delegitimize_address (addr
);
3490 /* If address is constant, split it into a base and integer
3492 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3494 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3495 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3497 base
= XEXP (XEXP (addr
, 0), 0);
3498 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3500 else if (GET_CODE (addr
) == LO_SUM
3501 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3502 base
= XEXP (addr
, 1);
3504 /* If this is a constant pool reference, we can fold it into its
3505 constant to allow better value tracking. */
3506 if (base
&& GET_CODE (base
) == SYMBOL_REF
3507 && CONSTANT_POOL_ADDRESS_P (base
))
3509 rtx constant
= get_pool_constant (base
);
3510 enum machine_mode const_mode
= get_pool_mode (base
);
3513 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3515 constant_pool_entries_cost
= COST (constant
);
3516 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3519 /* If we are loading the full constant, we have an
3521 if (offset
== 0 && mode
== const_mode
)
3524 /* If this actually isn't a constant (weird!), we can't do
3525 anything. Otherwise, handle the two most common cases:
3526 extracting a word from a multi-word constant, and
3527 extracting the low-order bits. Other cases don't seem
3528 common enough to worry about. */
3529 if (! CONSTANT_P (constant
))
3532 if (GET_MODE_CLASS (mode
) == MODE_INT
3533 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3534 && offset
% UNITS_PER_WORD
== 0
3535 && (new = operand_subword (constant
,
3536 offset
/ UNITS_PER_WORD
,
3537 0, const_mode
)) != 0)
3540 if (((BYTES_BIG_ENDIAN
3541 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3542 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3543 && (new = gen_lowpart (mode
, constant
)) != 0)
3547 /* If this is a reference to a label at a known position in a jump
3548 table, we also know its value. */
3549 if (base
&& GET_CODE (base
) == LABEL_REF
)
3551 rtx label
= XEXP (base
, 0);
3552 rtx table_insn
= NEXT_INSN (label
);
3554 if (table_insn
&& JUMP_P (table_insn
)
3555 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3557 rtx table
= PATTERN (table_insn
);
3560 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3561 < XVECLEN (table
, 0)))
3564 (table
, 0, offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3567 /* If we have an insn that loads the label from the
3568 jumptable into a reg, we don't want to set the reg
3569 to the label, because this may cause a reference to
3570 the label to remain after the label is removed in
3571 some very obscure cases (PR middle-end/18628). */
3575 set
= single_set (insn
);
3577 if (! set
|| SET_SRC (set
) != x
)
3580 /* If it's a jump, it's safe to reference the label. */
3581 if (SET_DEST (set
) == pc_rtx
)
3587 if (table_insn
&& JUMP_P (table_insn
)
3588 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3590 rtx table
= PATTERN (table_insn
);
3593 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3594 < XVECLEN (table
, 1)))
3596 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3597 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3600 if (GET_MODE (table
) != Pmode
)
3601 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3603 /* Indicate this is a constant. This isn't a valid
3604 form of CONST, but it will only be used to fold the
3605 next insns and then discarded, so it should be
3608 Note this expression must be explicitly discarded,
3609 by cse_insn, else it may end up in a REG_EQUAL note
3610 and "escape" to cause problems elsewhere. */
3611 return gen_rtx_CONST (GET_MODE (new), new);
3623 fold_rtx_mem (rtx x
, rtx insn
)
3625 /* To avoid infinite oscillations between fold_rtx and fold_rtx_mem,
3626 refuse to allow recursion of the latter past n levels. This can
3627 happen because fold_rtx_mem will try to fold the address of the
3628 memory reference it is passed, i.e. conceptually throwing away
3629 the MEM and reinjecting the bare address into fold_rtx. As a
3630 result, patterns like
3634 (mem (plus (reg2) (const_int))))
3638 (mem (plus (reg1) (const_int))))
3640 will defeat any "first-order" short-circuit put in either
3641 function to prevent these infinite oscillations.
3643 The heuristics for determining n is as follows: since each time
3644 it is invoked fold_rtx_mem throws away a MEM, and since MEMs
3645 are generically not nested, we assume that each invocation of
3646 fold_rtx_mem corresponds to a new "top-level" operand, i.e.
3647 the source or the destination of a SET. So fold_rtx_mem is
3648 bound to stop or cycle before n recursions, n being the number
3649 of expressions recorded in the hash table. We also leave some
3650 play to account for the initial steps. */
3652 static unsigned int depth
;
3655 if (depth
> 3 + table_size
)
3659 ret
= fold_rtx_mem_1 (x
, insn
);
3665 /* If X is a nontrivial arithmetic operation on an argument
3666 for which a constant value can be determined, return
3667 the result of operating on that value, as a constant.
3668 Otherwise, return X, possibly with one or more operands
3669 modified by recursive calls to this function.
3671 If X is a register whose contents are known, we do NOT
3672 return those contents here. equiv_constant is called to
3675 INSN is the insn that we may be modifying. If it is 0, make a copy
3676 of X before modifying it. */
3679 fold_rtx (rtx x
, rtx insn
)
3682 enum machine_mode mode
;
3689 /* Folded equivalents of first two operands of X. */
3693 /* Constant equivalents of first three operands of X;
3694 0 when no such equivalent is known. */
3699 /* The mode of the first operand of X. We need this for sign and zero
3701 enum machine_mode mode_arg0
;
3706 mode
= GET_MODE (x
);
3707 code
= GET_CODE (x
);
3718 /* No use simplifying an EXPR_LIST
3719 since they are used only for lists of args
3720 in a function call's REG_EQUAL note. */
3726 return prev_insn_cc0
;
3730 return fold_rtx_subreg (x
, insn
);
3734 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3735 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3736 new = lookup_as_function (XEXP (x
, 0), code
);
3738 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3742 return fold_rtx_mem (x
, insn
);
3744 #ifdef NO_FUNCTION_CSE
3746 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3754 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3755 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3756 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3767 mode_arg0
= VOIDmode
;
3769 /* Try folding our operands.
3770 Then see which ones have constant values known. */
3772 fmt
= GET_RTX_FORMAT (code
);
3773 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3776 rtx arg
= XEXP (x
, i
);
3777 rtx folded_arg
= arg
, const_arg
= 0;
3778 enum machine_mode mode_arg
= GET_MODE (arg
);
3779 rtx cheap_arg
, expensive_arg
;
3780 rtx replacements
[2];
3782 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3784 /* Most arguments are cheap, so handle them specially. */
3785 switch (GET_CODE (arg
))
3788 /* This is the same as calling equiv_constant; it is duplicated
3790 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3792 int arg_q
= REG_QTY (REGNO (arg
));
3793 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3795 if (arg_ent
->const_rtx
!= NULL_RTX
3796 && !REG_P (arg_ent
->const_rtx
)
3797 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3799 = gen_lowpart (GET_MODE (arg
),
3800 arg_ent
->const_rtx
);
3815 folded_arg
= prev_insn_cc0
;
3816 mode_arg
= prev_insn_cc0_mode
;
3817 const_arg
= equiv_constant (folded_arg
);
3822 folded_arg
= fold_rtx (arg
, insn
);
3823 const_arg
= equiv_constant (folded_arg
);
3826 /* For the first three operands, see if the operand
3827 is constant or equivalent to a constant. */
3831 folded_arg0
= folded_arg
;
3832 const_arg0
= const_arg
;
3833 mode_arg0
= mode_arg
;
3836 folded_arg1
= folded_arg
;
3837 const_arg1
= const_arg
;
3840 const_arg2
= const_arg
;
3844 /* Pick the least expensive of the folded argument and an
3845 equivalent constant argument. */
3846 if (const_arg
== 0 || const_arg
== folded_arg
3847 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3848 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3850 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3852 /* Try to replace the operand with the cheapest of the two
3853 possibilities. If it doesn't work and this is either of the first
3854 two operands of a commutative operation, try swapping them.
3855 If THAT fails, try the more expensive, provided it is cheaper
3856 than what is already there. */
3858 if (cheap_arg
== XEXP (x
, i
))
3861 if (insn
== 0 && ! copied
)
3867 /* Order the replacements from cheapest to most expensive. */
3868 replacements
[0] = cheap_arg
;
3869 replacements
[1] = expensive_arg
;
3871 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3873 int new_cost
= COST_IN (replacements
[j
], code
);
3875 /* Stop if what existed before was cheaper. Prefer constants
3876 in the case of a tie. */
3877 if (new_cost
> old_cost
3878 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3881 /* It's not safe to substitute the operand of a conversion
3882 operator with a constant, as the conversion's identity
3883 depends upon the mode of its operand. This optimization
3884 is handled by the call to simplify_unary_operation. */
3885 if (GET_RTX_CLASS (code
) == RTX_UNARY
3886 && GET_MODE (replacements
[j
]) != mode_arg0
3887 && (code
== ZERO_EXTEND
3888 || code
== SIGN_EXTEND
3890 || code
== FLOAT_TRUNCATE
3891 || code
== FLOAT_EXTEND
3894 || code
== UNSIGNED_FLOAT
3895 || code
== UNSIGNED_FIX
))
3898 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3901 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3902 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3904 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3905 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3907 if (apply_change_group ())
3909 /* Swap them back to be invalid so that this loop can
3910 continue and flag them to be swapped back later. */
3913 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3925 /* Don't try to fold inside of a vector of expressions.
3926 Doing nothing is harmless. */
3930 /* If a commutative operation, place a constant integer as the second
3931 operand unless the first operand is also a constant integer. Otherwise,
3932 place any constant second unless the first operand is also a constant. */
3934 if (COMMUTATIVE_P (x
))
3937 || swap_commutative_operands_p (const_arg0
? const_arg0
3939 const_arg1
? const_arg1
3942 rtx tem
= XEXP (x
, 0);
3944 if (insn
== 0 && ! copied
)
3950 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3951 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3952 if (apply_change_group ())
3954 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3955 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3960 /* If X is an arithmetic operation, see if we can simplify it. */
3962 switch (GET_RTX_CLASS (code
))
3968 /* We can't simplify extension ops unless we know the
3970 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3971 && mode_arg0
== VOIDmode
)
3974 /* If we had a CONST, strip it off and put it back later if we
3976 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3977 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3979 new = simplify_unary_operation (code
, mode
,
3980 const_arg0
? const_arg0
: folded_arg0
,
3982 /* NEG of PLUS could be converted into MINUS, but that causes
3983 expressions of the form
3984 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3985 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3986 FIXME: those ports should be fixed. */
3987 if (new != 0 && is_const
3988 && GET_CODE (new) == PLUS
3989 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3990 || GET_CODE (XEXP (new, 0)) == LABEL_REF
)
3991 && GET_CODE (XEXP (new, 1)) == CONST_INT
)
3992 new = gen_rtx_CONST (mode
, new);
3997 case RTX_COMM_COMPARE
:
3998 /* See what items are actually being compared and set FOLDED_ARG[01]
3999 to those values and CODE to the actual comparison code. If any are
4000 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
4001 do anything if both operands are already known to be constant. */
4003 /* ??? Vector mode comparisons are not supported yet. */
4004 if (VECTOR_MODE_P (mode
))
4007 if (const_arg0
== 0 || const_arg1
== 0)
4009 struct table_elt
*p0
, *p1
;
4010 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
4011 enum machine_mode mode_arg1
;
4013 #ifdef FLOAT_STORE_FLAG_VALUE
4014 if (SCALAR_FLOAT_MODE_P (mode
))
4016 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
4017 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4018 false_rtx
= CONST0_RTX (mode
);
4022 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
4023 &mode_arg0
, &mode_arg1
);
4025 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
4026 what kinds of things are being compared, so we can't do
4027 anything with this comparison. */
4029 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
4032 const_arg0
= equiv_constant (folded_arg0
);
4033 const_arg1
= equiv_constant (folded_arg1
);
4035 /* If we do not now have two constants being compared, see
4036 if we can nevertheless deduce some things about the
4038 if (const_arg0
== 0 || const_arg1
== 0)
4040 if (const_arg1
!= NULL
)
4042 rtx cheapest_simplification
;
4045 struct table_elt
*p
;
4047 /* See if we can find an equivalent of folded_arg0
4048 that gets us a cheaper expression, possibly a
4049 constant through simplifications. */
4050 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
4055 cheapest_simplification
= x
;
4056 cheapest_cost
= COST (x
);
4058 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
4062 /* If the entry isn't valid, skip it. */
4063 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4066 /* Try to simplify using this equivalence. */
4068 = simplify_relational_operation (code
, mode
,
4073 if (simp_result
== NULL
)
4076 cost
= COST (simp_result
);
4077 if (cost
< cheapest_cost
)
4079 cheapest_cost
= cost
;
4080 cheapest_simplification
= simp_result
;
4084 /* If we have a cheaper expression now, use that
4085 and try folding it further, from the top. */
4086 if (cheapest_simplification
!= x
)
4087 return fold_rtx (cheapest_simplification
, insn
);
4091 /* Some addresses are known to be nonzero. We don't know
4092 their sign, but equality comparisons are known. */
4093 if (const_arg1
== const0_rtx
4094 && nonzero_address_p (folded_arg0
))
4098 else if (code
== NE
)
4102 /* See if the two operands are the same. */
4104 if (folded_arg0
== folded_arg1
4105 || (REG_P (folded_arg0
)
4106 && REG_P (folded_arg1
)
4107 && (REG_QTY (REGNO (folded_arg0
))
4108 == REG_QTY (REGNO (folded_arg1
))))
4109 || ((p0
= lookup (folded_arg0
,
4110 SAFE_HASH (folded_arg0
, mode_arg0
),
4112 && (p1
= lookup (folded_arg1
,
4113 SAFE_HASH (folded_arg1
, mode_arg0
),
4115 && p0
->first_same_value
== p1
->first_same_value
))
4117 /* Sadly two equal NaNs are not equivalent. */
4118 if (!HONOR_NANS (mode_arg0
))
4119 return ((code
== EQ
|| code
== LE
|| code
== GE
4120 || code
== LEU
|| code
== GEU
|| code
== UNEQ
4121 || code
== UNLE
|| code
== UNGE
4123 ? true_rtx
: false_rtx
);
4124 /* Take care for the FP compares we can resolve. */
4125 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
4127 if (code
== LTGT
|| code
== LT
|| code
== GT
)
4131 /* If FOLDED_ARG0 is a register, see if the comparison we are
4132 doing now is either the same as we did before or the reverse
4133 (we only check the reverse if not floating-point). */
4134 else if (REG_P (folded_arg0
))
4136 int qty
= REG_QTY (REGNO (folded_arg0
));
4138 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
4140 struct qty_table_elem
*ent
= &qty_table
[qty
];
4142 if ((comparison_dominates_p (ent
->comparison_code
, code
)
4143 || (! FLOAT_MODE_P (mode_arg0
)
4144 && comparison_dominates_p (ent
->comparison_code
,
4145 reverse_condition (code
))))
4146 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
4148 && rtx_equal_p (ent
->comparison_const
,
4150 || (REG_P (folded_arg1
)
4151 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
4152 return (comparison_dominates_p (ent
->comparison_code
, code
)
4153 ? true_rtx
: false_rtx
);
4159 /* If we are comparing against zero, see if the first operand is
4160 equivalent to an IOR with a constant. If so, we may be able to
4161 determine the result of this comparison. */
4163 if (const_arg1
== const0_rtx
)
4165 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4169 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4170 && GET_CODE (inner_const
) == CONST_INT
4171 && INTVAL (inner_const
) != 0)
4173 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4174 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
4175 && (INTVAL (inner_const
)
4176 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
4177 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
4179 #ifdef FLOAT_STORE_FLAG_VALUE
4180 if (SCALAR_FLOAT_MODE_P (mode
))
4182 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
4183 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4184 false_rtx
= CONST0_RTX (mode
);
4209 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
4210 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
4211 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
4216 case RTX_COMM_ARITH
:
4220 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4221 with that LABEL_REF as its second operand. If so, the result is
4222 the first operand of that MINUS. This handles switches with an
4223 ADDR_DIFF_VEC table. */
4224 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4227 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
4228 : lookup_as_function (folded_arg0
, MINUS
);
4230 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4231 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4234 /* Now try for a CONST of a MINUS like the above. */
4235 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
4236 : lookup_as_function (folded_arg0
, CONST
))) != 0
4237 && GET_CODE (XEXP (y
, 0)) == MINUS
4238 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4239 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
4240 return XEXP (XEXP (y
, 0), 0);
4243 /* Likewise if the operands are in the other order. */
4244 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
4247 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
4248 : lookup_as_function (folded_arg1
, MINUS
);
4250 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4251 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
4254 /* Now try for a CONST of a MINUS like the above. */
4255 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
4256 : lookup_as_function (folded_arg1
, CONST
))) != 0
4257 && GET_CODE (XEXP (y
, 0)) == MINUS
4258 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4259 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4260 return XEXP (XEXP (y
, 0), 0);
4263 /* If second operand is a register equivalent to a negative
4264 CONST_INT, see if we can find a register equivalent to the
4265 positive constant. Make a MINUS if so. Don't do this for
4266 a non-negative constant since we might then alternate between
4267 choosing positive and negative constants. Having the positive
4268 constant previously-used is the more common case. Be sure
4269 the resulting constant is non-negative; if const_arg1 were
4270 the smallest negative number this would overflow: depending
4271 on the mode, this would either just be the same value (and
4272 hence not save anything) or be incorrect. */
4273 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4274 && INTVAL (const_arg1
) < 0
4275 /* This used to test
4277 -INTVAL (const_arg1) >= 0
4279 But The Sun V5.0 compilers mis-compiled that test. So
4280 instead we test for the problematic value in a more direct
4281 manner and hope the Sun compilers get it correct. */
4282 && INTVAL (const_arg1
) !=
4283 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4284 && REG_P (folded_arg1
))
4286 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4288 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
4291 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4293 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4294 canon_reg (p
->exp
, NULL_RTX
));
4299 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4300 If so, produce (PLUS Z C2-C). */
4301 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4303 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4304 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4305 return fold_rtx (plus_constant (copy_rtx (y
),
4306 -INTVAL (const_arg1
)),
4313 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4314 case IOR
: case AND
: case XOR
:
4316 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4317 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4318 is known to be of similar form, we may be able to replace the
4319 operation with a combined operation. This may eliminate the
4320 intermediate operation if every use is simplified in this way.
4321 Note that the similar optimization done by combine.c only works
4322 if the intermediate operation's result has only one reference. */
4324 if (REG_P (folded_arg0
)
4325 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4328 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4329 rtx y
, inner_const
, new_const
;
4330 enum rtx_code associate_code
;
4333 && (INTVAL (const_arg1
) >= GET_MODE_BITSIZE (mode
)
4334 || INTVAL (const_arg1
) < 0))
4336 if (SHIFT_COUNT_TRUNCATED
)
4337 const_arg1
= GEN_INT (INTVAL (const_arg1
)
4338 & (GET_MODE_BITSIZE (mode
) - 1));
4343 y
= lookup_as_function (folded_arg0
, code
);
4347 /* If we have compiled a statement like
4348 "if (x == (x & mask1))", and now are looking at
4349 "x & mask2", we will have a case where the first operand
4350 of Y is the same as our first operand. Unless we detect
4351 this case, an infinite loop will result. */
4352 if (XEXP (y
, 0) == folded_arg0
)
4355 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
4356 if (!inner_const
|| GET_CODE (inner_const
) != CONST_INT
)
4359 /* Don't associate these operations if they are a PLUS with the
4360 same constant and it is a power of two. These might be doable
4361 with a pre- or post-increment. Similarly for two subtracts of
4362 identical powers of two with post decrement. */
4364 if (code
== PLUS
&& const_arg1
== inner_const
4365 && ((HAVE_PRE_INCREMENT
4366 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4367 || (HAVE_POST_INCREMENT
4368 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4369 || (HAVE_PRE_DECREMENT
4370 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4371 || (HAVE_POST_DECREMENT
4372 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4376 && (INTVAL (inner_const
) >= GET_MODE_BITSIZE (mode
)
4377 || INTVAL (inner_const
) < 0))
4379 if (SHIFT_COUNT_TRUNCATED
)
4380 inner_const
= GEN_INT (INTVAL (inner_const
)
4381 & (GET_MODE_BITSIZE (mode
) - 1));
4386 /* Compute the code used to compose the constants. For example,
4387 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4389 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4391 new_const
= simplify_binary_operation (associate_code
, mode
,
4392 const_arg1
, inner_const
);
4397 /* If we are associating shift operations, don't let this
4398 produce a shift of the size of the object or larger.
4399 This could occur when we follow a sign-extend by a right
4400 shift on a machine that does a sign-extend as a pair
4404 && GET_CODE (new_const
) == CONST_INT
4405 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4407 /* As an exception, we can turn an ASHIFTRT of this
4408 form into a shift of the number of bits - 1. */
4409 if (code
== ASHIFTRT
)
4410 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4411 else if (!side_effects_p (XEXP (y
, 0)))
4412 return CONST0_RTX (mode
);
4417 y
= copy_rtx (XEXP (y
, 0));
4419 /* If Y contains our first operand (the most common way this
4420 can happen is if Y is a MEM), we would do into an infinite
4421 loop if we tried to fold it. So don't in that case. */
4423 if (! reg_mentioned_p (folded_arg0
, y
))
4424 y
= fold_rtx (y
, insn
);
4426 return simplify_gen_binary (code
, mode
, y
, new_const
);
4430 case DIV
: case UDIV
:
4431 /* ??? The associative optimization performed immediately above is
4432 also possible for DIV and UDIV using associate_code of MULT.
4433 However, we would need extra code to verify that the
4434 multiplication does not overflow, that is, there is no overflow
4435 in the calculation of new_const. */
4442 new = simplify_binary_operation (code
, mode
,
4443 const_arg0
? const_arg0
: folded_arg0
,
4444 const_arg1
? const_arg1
: folded_arg1
);
4448 /* (lo_sum (high X) X) is simply X. */
4449 if (code
== LO_SUM
&& const_arg0
!= 0
4450 && GET_CODE (const_arg0
) == HIGH
4451 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4456 case RTX_BITFIELD_OPS
:
4457 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4458 const_arg0
? const_arg0
: folded_arg0
,
4459 const_arg1
? const_arg1
: folded_arg1
,
4460 const_arg2
? const_arg2
: XEXP (x
, 2));
4467 return new ? new : x
;
4470 /* Return a constant value currently equivalent to X.
4471 Return 0 if we don't know one. */
4474 equiv_constant (rtx x
)
4477 && REGNO_QTY_VALID_P (REGNO (x
)))
4479 int x_q
= REG_QTY (REGNO (x
));
4480 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4482 if (x_ent
->const_rtx
)
4483 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4486 if (x
== 0 || CONSTANT_P (x
))
4489 /* If X is a MEM, try to fold it outside the context of any insn to see if
4490 it might be equivalent to a constant. That handles the case where it
4491 is a constant-pool reference. Then try to look it up in the hash table
4492 in case it is something whose value we have seen before. */
4496 struct table_elt
*elt
;
4498 x
= fold_rtx (x
, NULL_RTX
);
4502 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
4506 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4507 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4514 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4515 branch. It will be zero if not.
4517 In certain cases, this can cause us to add an equivalence. For example,
4518 if we are following the taken case of
4520 we can add the fact that `i' and '2' are now equivalent.
4522 In any case, we can record that this comparison was passed. If the same
4523 comparison is seen later, we will know its value. */
4526 record_jump_equiv (rtx insn
, int taken
)
4528 int cond_known_true
;
4531 enum machine_mode mode
, mode0
, mode1
;
4532 int reversed_nonequality
= 0;
4535 /* Ensure this is the right kind of insn. */
4536 if (! any_condjump_p (insn
))
4538 set
= pc_set (insn
);
4540 /* See if this jump condition is known true or false. */
4542 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4544 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4546 /* Get the type of comparison being done and the operands being compared.
4547 If we had to reverse a non-equality condition, record that fact so we
4548 know that it isn't valid for floating-point. */
4549 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4550 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4551 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4553 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4555 /* If the mode is a MODE_CC mode, we don't know what kinds of things
4556 are being compared, so we can't do anything with this
4559 if (GET_MODE_CLASS (mode0
) == MODE_CC
)
4562 if (! cond_known_true
)
4564 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4566 /* Don't remember if we can't find the inverse. */
4567 if (code
== UNKNOWN
)
4571 /* The mode is the mode of the non-constant. */
4573 if (mode1
!= VOIDmode
)
4576 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4579 /* Yet another form of subreg creation. In this case, we want something in
4580 MODE, and we should assume OP has MODE iff it is naturally modeless. */
4583 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
4585 enum machine_mode op_mode
= GET_MODE (op
);
4586 if (op_mode
== mode
|| op_mode
== VOIDmode
)
4588 return lowpart_subreg (mode
, op
, op_mode
);
4591 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4592 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4593 Make any useful entries we can with that information. Called from
4594 above function and called recursively. */
4597 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4598 rtx op1
, int reversed_nonequality
)
4600 unsigned op0_hash
, op1_hash
;
4601 int op0_in_memory
, op1_in_memory
;
4602 struct table_elt
*op0_elt
, *op1_elt
;
4604 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4605 we know that they are also equal in the smaller mode (this is also
4606 true for all smaller modes whether or not there is a SUBREG, but
4607 is not worth testing for with no SUBREG). */
4609 /* Note that GET_MODE (op0) may not equal MODE. */
4610 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4611 && (GET_MODE_SIZE (GET_MODE (op0
))
4612 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4614 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4615 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4617 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4618 reversed_nonequality
);
4621 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4622 && (GET_MODE_SIZE (GET_MODE (op1
))
4623 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4625 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4626 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4628 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4629 reversed_nonequality
);
4632 /* Similarly, if this is an NE comparison, and either is a SUBREG
4633 making a smaller mode, we know the whole thing is also NE. */
4635 /* Note that GET_MODE (op0) may not equal MODE;
4636 if we test MODE instead, we can get an infinite recursion
4637 alternating between two modes each wider than MODE. */
4639 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4640 && subreg_lowpart_p (op0
)
4641 && (GET_MODE_SIZE (GET_MODE (op0
))
4642 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4644 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4645 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4647 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4648 reversed_nonequality
);
4651 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4652 && subreg_lowpart_p (op1
)
4653 && (GET_MODE_SIZE (GET_MODE (op1
))
4654 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4656 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4657 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4659 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4660 reversed_nonequality
);
4663 /* Hash both operands. */
4666 hash_arg_in_memory
= 0;
4667 op0_hash
= HASH (op0
, mode
);
4668 op0_in_memory
= hash_arg_in_memory
;
4674 hash_arg_in_memory
= 0;
4675 op1_hash
= HASH (op1
, mode
);
4676 op1_in_memory
= hash_arg_in_memory
;
4681 /* Look up both operands. */
4682 op0_elt
= lookup (op0
, op0_hash
, mode
);
4683 op1_elt
= lookup (op1
, op1_hash
, mode
);
4685 /* If both operands are already equivalent or if they are not in the
4686 table but are identical, do nothing. */
4687 if ((op0_elt
!= 0 && op1_elt
!= 0
4688 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4689 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4692 /* If we aren't setting two things equal all we can do is save this
4693 comparison. Similarly if this is floating-point. In the latter
4694 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4695 If we record the equality, we might inadvertently delete code
4696 whose intent was to change -0 to +0. */
4698 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4700 struct qty_table_elem
*ent
;
4703 /* If we reversed a floating-point comparison, if OP0 is not a
4704 register, or if OP1 is neither a register or constant, we can't
4708 op1
= equiv_constant (op1
);
4710 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4711 || !REG_P (op0
) || op1
== 0)
4714 /* Put OP0 in the hash table if it isn't already. This gives it a
4715 new quantity number. */
4718 if (insert_regs (op0
, NULL
, 0))
4720 rehash_using_reg (op0
);
4721 op0_hash
= HASH (op0
, mode
);
4723 /* If OP0 is contained in OP1, this changes its hash code
4724 as well. Faster to rehash than to check, except
4725 for the simple case of a constant. */
4726 if (! CONSTANT_P (op1
))
4727 op1_hash
= HASH (op1
,mode
);
4730 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4731 op0_elt
->in_memory
= op0_in_memory
;
4734 qty
= REG_QTY (REGNO (op0
));
4735 ent
= &qty_table
[qty
];
4737 ent
->comparison_code
= code
;
4740 /* Look it up again--in case op0 and op1 are the same. */
4741 op1_elt
= lookup (op1
, op1_hash
, mode
);
4743 /* Put OP1 in the hash table so it gets a new quantity number. */
4746 if (insert_regs (op1
, NULL
, 0))
4748 rehash_using_reg (op1
);
4749 op1_hash
= HASH (op1
, mode
);
4752 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4753 op1_elt
->in_memory
= op1_in_memory
;
4756 ent
->comparison_const
= NULL_RTX
;
4757 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4761 ent
->comparison_const
= op1
;
4762 ent
->comparison_qty
= -1;
4768 /* If either side is still missing an equivalence, make it now,
4769 then merge the equivalences. */
4773 if (insert_regs (op0
, NULL
, 0))
4775 rehash_using_reg (op0
);
4776 op0_hash
= HASH (op0
, mode
);
4779 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4780 op0_elt
->in_memory
= op0_in_memory
;
4785 if (insert_regs (op1
, NULL
, 0))
4787 rehash_using_reg (op1
);
4788 op1_hash
= HASH (op1
, mode
);
4791 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4792 op1_elt
->in_memory
= op1_in_memory
;
4795 merge_equiv_classes (op0_elt
, op1_elt
);
4798 /* CSE processing for one instruction.
4799 First simplify sources and addresses of all assignments
4800 in the instruction, using previously-computed equivalents values.
4801 Then install the new sources and destinations in the table
4802 of available values.
4804 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4805 the insn. It means that INSN is inside libcall block. In this
4806 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4808 /* Data on one SET contained in the instruction. */
4812 /* The SET rtx itself. */
4814 /* The SET_SRC of the rtx (the original value, if it is changing). */
4816 /* The hash-table element for the SET_SRC of the SET. */
4817 struct table_elt
*src_elt
;
4818 /* Hash value for the SET_SRC. */
4820 /* Hash value for the SET_DEST. */
4822 /* The SET_DEST, with SUBREG, etc., stripped. */
4824 /* Nonzero if the SET_SRC is in memory. */
4826 /* Nonzero if the SET_SRC contains something
4827 whose value cannot be predicted and understood. */
4829 /* Original machine mode, in case it becomes a CONST_INT.
4830 The size of this field should match the size of the mode
4831 field of struct rtx_def (see rtl.h). */
4832 ENUM_BITFIELD(machine_mode
) mode
: 8;
4833 /* A constant equivalent for SET_SRC, if any. */
4835 /* Original SET_SRC value used for libcall notes. */
4837 /* Hash value of constant equivalent for SET_SRC. */
4838 unsigned src_const_hash
;
4839 /* Table entry for constant equivalent for SET_SRC, if any. */
4840 struct table_elt
*src_const_elt
;
4841 /* Table entry for the destination address. */
4842 struct table_elt
*dest_addr_elt
;
4846 cse_insn (rtx insn
, rtx libcall_insn
)
4848 rtx x
= PATTERN (insn
);
4854 /* Records what this insn does to set CC0. */
4855 rtx this_insn_cc0
= 0;
4856 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4860 struct table_elt
*src_eqv_elt
= 0;
4861 int src_eqv_volatile
= 0;
4862 int src_eqv_in_memory
= 0;
4863 unsigned src_eqv_hash
= 0;
4865 struct set
*sets
= (struct set
*) 0;
4869 /* Find all the SETs and CLOBBERs in this instruction.
4870 Record all the SETs in the array `set' and count them.
4871 Also determine whether there is a CLOBBER that invalidates
4872 all memory references, or all references at varying addresses. */
4876 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4878 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4879 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4880 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4884 if (GET_CODE (x
) == SET
)
4886 sets
= alloca (sizeof (struct set
));
4889 /* Ignore SETs that are unconditional jumps.
4890 They never need cse processing, so this does not hurt.
4891 The reason is not efficiency but rather
4892 so that we can test at the end for instructions
4893 that have been simplified to unconditional jumps
4894 and not be misled by unchanged instructions
4895 that were unconditional jumps to begin with. */
4896 if (SET_DEST (x
) == pc_rtx
4897 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4900 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4901 The hard function value register is used only once, to copy to
4902 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4903 Ensure we invalidate the destination register. On the 80386 no
4904 other code would invalidate it since it is a fixed_reg.
4905 We need not check the return of apply_change_group; see canon_reg. */
4907 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4909 canon_reg (SET_SRC (x
), insn
);
4910 apply_change_group ();
4911 fold_rtx (SET_SRC (x
), insn
);
4912 invalidate (SET_DEST (x
), VOIDmode
);
4917 else if (GET_CODE (x
) == PARALLEL
)
4919 int lim
= XVECLEN (x
, 0);
4921 sets
= alloca (lim
* sizeof (struct set
));
4923 /* Find all regs explicitly clobbered in this insn,
4924 and ensure they are not replaced with any other regs
4925 elsewhere in this insn.
4926 When a reg that is clobbered is also used for input,
4927 we should presume that that is for a reason,
4928 and we should not substitute some other register
4929 which is not supposed to be clobbered.
4930 Therefore, this loop cannot be merged into the one below
4931 because a CALL may precede a CLOBBER and refer to the
4932 value clobbered. We must not let a canonicalization do
4933 anything in that case. */
4934 for (i
= 0; i
< lim
; i
++)
4936 rtx y
= XVECEXP (x
, 0, i
);
4937 if (GET_CODE (y
) == CLOBBER
)
4939 rtx clobbered
= XEXP (y
, 0);
4941 if (REG_P (clobbered
)
4942 || GET_CODE (clobbered
) == SUBREG
)
4943 invalidate (clobbered
, VOIDmode
);
4944 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4945 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4946 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4950 for (i
= 0; i
< lim
; i
++)
4952 rtx y
= XVECEXP (x
, 0, i
);
4953 if (GET_CODE (y
) == SET
)
4955 /* As above, we ignore unconditional jumps and call-insns and
4956 ignore the result of apply_change_group. */
4957 if (GET_CODE (SET_SRC (y
)) == CALL
)
4959 canon_reg (SET_SRC (y
), insn
);
4960 apply_change_group ();
4961 fold_rtx (SET_SRC (y
), insn
);
4962 invalidate (SET_DEST (y
), VOIDmode
);
4964 else if (SET_DEST (y
) == pc_rtx
4965 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4968 sets
[n_sets
++].rtl
= y
;
4970 else if (GET_CODE (y
) == CLOBBER
)
4972 /* If we clobber memory, canon the address.
4973 This does nothing when a register is clobbered
4974 because we have already invalidated the reg. */
4975 if (MEM_P (XEXP (y
, 0)))
4976 canon_reg (XEXP (y
, 0), NULL_RTX
);
4978 else if (GET_CODE (y
) == USE
4979 && ! (REG_P (XEXP (y
, 0))
4980 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4981 canon_reg (y
, NULL_RTX
);
4982 else if (GET_CODE (y
) == CALL
)
4984 /* The result of apply_change_group can be ignored; see
4986 canon_reg (y
, insn
);
4987 apply_change_group ();
4992 else if (GET_CODE (x
) == CLOBBER
)
4994 if (MEM_P (XEXP (x
, 0)))
4995 canon_reg (XEXP (x
, 0), NULL_RTX
);
4998 /* Canonicalize a USE of a pseudo register or memory location. */
4999 else if (GET_CODE (x
) == USE
5000 && ! (REG_P (XEXP (x
, 0))
5001 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
5002 canon_reg (XEXP (x
, 0), NULL_RTX
);
5003 else if (GET_CODE (x
) == CALL
)
5005 /* The result of apply_change_group can be ignored; see canon_reg. */
5006 canon_reg (x
, insn
);
5007 apply_change_group ();
5011 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
5012 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
5013 is handled specially for this case, and if it isn't set, then there will
5014 be no equivalence for the destination. */
5015 if (n_sets
== 1 && REG_NOTES (insn
) != 0
5016 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
5017 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
5018 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
5020 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
5021 XEXP (tem
, 0) = src_eqv
;
5024 /* Canonicalize sources and addresses of destinations.
5025 We do this in a separate pass to avoid problems when a MATCH_DUP is
5026 present in the insn pattern. In that case, we want to ensure that
5027 we don't break the duplicate nature of the pattern. So we will replace
5028 both operands at the same time. Otherwise, we would fail to find an
5029 equivalent substitution in the loop calling validate_change below.
5031 We used to suppress canonicalization of DEST if it appears in SRC,
5032 but we don't do this any more. */
5034 for (i
= 0; i
< n_sets
; i
++)
5036 rtx dest
= SET_DEST (sets
[i
].rtl
);
5037 rtx src
= SET_SRC (sets
[i
].rtl
);
5038 rtx
new = canon_reg (src
, insn
);
5040 sets
[i
].orig_src
= src
;
5041 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5043 if (GET_CODE (dest
) == ZERO_EXTRACT
)
5045 validate_change (insn
, &XEXP (dest
, 1),
5046 canon_reg (XEXP (dest
, 1), insn
), 1);
5047 validate_change (insn
, &XEXP (dest
, 2),
5048 canon_reg (XEXP (dest
, 2), insn
), 1);
5051 while (GET_CODE (dest
) == SUBREG
5052 || GET_CODE (dest
) == ZERO_EXTRACT
5053 || GET_CODE (dest
) == STRICT_LOW_PART
)
5054 dest
= XEXP (dest
, 0);
5057 canon_reg (dest
, insn
);
5060 /* Now that we have done all the replacements, we can apply the change
5061 group and see if they all work. Note that this will cause some
5062 canonicalizations that would have worked individually not to be applied
5063 because some other canonicalization didn't work, but this should not
5066 The result of apply_change_group can be ignored; see canon_reg. */
5068 apply_change_group ();
5070 /* Set sets[i].src_elt to the class each source belongs to.
5071 Detect assignments from or to volatile things
5072 and set set[i] to zero so they will be ignored
5073 in the rest of this function.
5075 Nothing in this loop changes the hash table or the register chains. */
5077 for (i
= 0; i
< n_sets
; i
++)
5081 struct table_elt
*elt
= 0, *p
;
5082 enum machine_mode mode
;
5085 rtx src_related
= 0;
5086 struct table_elt
*src_const_elt
= 0;
5087 int src_cost
= MAX_COST
;
5088 int src_eqv_cost
= MAX_COST
;
5089 int src_folded_cost
= MAX_COST
;
5090 int src_related_cost
= MAX_COST
;
5091 int src_elt_cost
= MAX_COST
;
5092 int src_regcost
= MAX_COST
;
5093 int src_eqv_regcost
= MAX_COST
;
5094 int src_folded_regcost
= MAX_COST
;
5095 int src_related_regcost
= MAX_COST
;
5096 int src_elt_regcost
= MAX_COST
;
5097 /* Set nonzero if we need to call force_const_mem on with the
5098 contents of src_folded before using it. */
5099 int src_folded_force_flag
= 0;
5101 dest
= SET_DEST (sets
[i
].rtl
);
5102 src
= SET_SRC (sets
[i
].rtl
);
5104 /* If SRC is a constant that has no machine mode,
5105 hash it with the destination's machine mode.
5106 This way we can keep different modes separate. */
5108 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5109 sets
[i
].mode
= mode
;
5113 enum machine_mode eqvmode
= mode
;
5114 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5115 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5117 hash_arg_in_memory
= 0;
5118 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5120 /* Find the equivalence class for the equivalent expression. */
5123 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
5125 src_eqv_volatile
= do_not_record
;
5126 src_eqv_in_memory
= hash_arg_in_memory
;
5129 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5130 value of the INNER register, not the destination. So it is not
5131 a valid substitution for the source. But save it for later. */
5132 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5135 src_eqv_here
= src_eqv
;
5137 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5138 simplified result, which may not necessarily be valid. */
5139 src_folded
= fold_rtx (src
, insn
);
5142 /* ??? This caused bad code to be generated for the m68k port with -O2.
5143 Suppose src is (CONST_INT -1), and that after truncation src_folded
5144 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5145 At the end we will add src and src_const to the same equivalence
5146 class. We now have 3 and -1 on the same equivalence class. This
5147 causes later instructions to be mis-optimized. */
5148 /* If storing a constant in a bitfield, pre-truncate the constant
5149 so we will be able to record it later. */
5150 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5152 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5154 if (GET_CODE (src
) == CONST_INT
5155 && GET_CODE (width
) == CONST_INT
5156 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5157 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5159 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5160 << INTVAL (width
)) - 1));
5164 /* Compute SRC's hash code, and also notice if it
5165 should not be recorded at all. In that case,
5166 prevent any further processing of this assignment. */
5168 hash_arg_in_memory
= 0;
5171 sets
[i
].src_hash
= HASH (src
, mode
);
5172 sets
[i
].src_volatile
= do_not_record
;
5173 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5175 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5176 a pseudo, do not record SRC. Using SRC as a replacement for
5177 anything else will be incorrect in that situation. Note that
5178 this usually occurs only for stack slots, in which case all the
5179 RTL would be referring to SRC, so we don't lose any optimization
5180 opportunities by not having SRC in the hash table. */
5183 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
5185 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
5186 sets
[i
].src_volatile
= 1;
5189 /* It is no longer clear why we used to do this, but it doesn't
5190 appear to still be needed. So let's try without it since this
5191 code hurts cse'ing widened ops. */
5192 /* If source is a paradoxical subreg (such as QI treated as an SI),
5193 treat it as volatile. It may do the work of an SI in one context
5194 where the extra bits are not being used, but cannot replace an SI
5196 if (GET_CODE (src
) == SUBREG
5197 && (GET_MODE_SIZE (GET_MODE (src
))
5198 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5199 sets
[i
].src_volatile
= 1;
5202 /* Locate all possible equivalent forms for SRC. Try to replace
5203 SRC in the insn with each cheaper equivalent.
5205 We have the following types of equivalents: SRC itself, a folded
5206 version, a value given in a REG_EQUAL note, or a value related
5209 Each of these equivalents may be part of an additional class
5210 of equivalents (if more than one is in the table, they must be in
5211 the same class; we check for this).
5213 If the source is volatile, we don't do any table lookups.
5215 We note any constant equivalent for possible later use in a
5218 if (!sets
[i
].src_volatile
)
5219 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5221 sets
[i
].src_elt
= elt
;
5223 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5225 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5227 /* The REG_EQUAL is indicating that two formerly distinct
5228 classes are now equivalent. So merge them. */
5229 merge_equiv_classes (elt
, src_eqv_elt
);
5230 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
5231 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
5237 else if (src_eqv_elt
)
5240 /* Try to find a constant somewhere and record it in `src_const'.
5241 Record its table element, if any, in `src_const_elt'. Look in
5242 any known equivalences first. (If the constant is not in the
5243 table, also set `sets[i].src_const_hash'). */
5245 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5249 src_const_elt
= elt
;
5254 && (CONSTANT_P (src_folded
)
5255 /* Consider (minus (label_ref L1) (label_ref L2)) as
5256 "constant" here so we will record it. This allows us
5257 to fold switch statements when an ADDR_DIFF_VEC is used. */
5258 || (GET_CODE (src_folded
) == MINUS
5259 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5260 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5261 src_const
= src_folded
, src_const_elt
= elt
;
5262 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5263 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5265 /* If we don't know if the constant is in the table, get its
5266 hash code and look it up. */
5267 if (src_const
&& src_const_elt
== 0)
5269 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5270 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5273 sets
[i
].src_const
= src_const
;
5274 sets
[i
].src_const_elt
= src_const_elt
;
5276 /* If the constant and our source are both in the table, mark them as
5277 equivalent. Otherwise, if a constant is in the table but the source
5278 isn't, set ELT to it. */
5279 if (src_const_elt
&& elt
5280 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5281 merge_equiv_classes (elt
, src_const_elt
);
5282 else if (src_const_elt
&& elt
== 0)
5283 elt
= src_const_elt
;
5285 /* See if there is a register linearly related to a constant
5286 equivalent of SRC. */
5288 && (GET_CODE (src_const
) == CONST
5289 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5291 src_related
= use_related_value (src_const
, src_const_elt
);
5294 struct table_elt
*src_related_elt
5295 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5296 if (src_related_elt
&& elt
)
5298 if (elt
->first_same_value
5299 != src_related_elt
->first_same_value
)
5300 /* This can occur when we previously saw a CONST
5301 involving a SYMBOL_REF and then see the SYMBOL_REF
5302 twice. Merge the involved classes. */
5303 merge_equiv_classes (elt
, src_related_elt
);
5306 src_related_elt
= 0;
5308 else if (src_related_elt
&& elt
== 0)
5309 elt
= src_related_elt
;
5313 /* See if we have a CONST_INT that is already in a register in a
5316 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5317 && GET_MODE_CLASS (mode
) == MODE_INT
5318 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5320 enum machine_mode wider_mode
;
5322 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5323 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5324 && src_related
== 0;
5325 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5327 struct table_elt
*const_elt
5328 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5333 for (const_elt
= const_elt
->first_same_value
;
5334 const_elt
; const_elt
= const_elt
->next_same_value
)
5335 if (REG_P (const_elt
->exp
))
5337 src_related
= gen_lowpart (mode
,
5344 /* Another possibility is that we have an AND with a constant in
5345 a mode narrower than a word. If so, it might have been generated
5346 as part of an "if" which would narrow the AND. If we already
5347 have done the AND in a wider mode, we can use a SUBREG of that
5350 if (flag_expensive_optimizations
&& ! src_related
5351 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5352 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5354 enum machine_mode tmode
;
5355 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5357 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5358 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5359 tmode
= GET_MODE_WIDER_MODE (tmode
))
5361 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5362 struct table_elt
*larger_elt
;
5366 PUT_MODE (new_and
, tmode
);
5367 XEXP (new_and
, 0) = inner
;
5368 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5369 if (larger_elt
== 0)
5372 for (larger_elt
= larger_elt
->first_same_value
;
5373 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5374 if (REG_P (larger_elt
->exp
))
5377 = gen_lowpart (mode
, larger_elt
->exp
);
5387 #ifdef LOAD_EXTEND_OP
5388 /* See if a MEM has already been loaded with a widening operation;
5389 if it has, we can use a subreg of that. Many CISC machines
5390 also have such operations, but this is only likely to be
5391 beneficial on these machines. */
5393 if (flag_expensive_optimizations
&& src_related
== 0
5394 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5395 && GET_MODE_CLASS (mode
) == MODE_INT
5396 && MEM_P (src
) && ! do_not_record
5397 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
5399 struct rtx_def memory_extend_buf
;
5400 rtx memory_extend_rtx
= &memory_extend_buf
;
5401 enum machine_mode tmode
;
5403 /* Set what we are trying to extend and the operation it might
5404 have been extended with. */
5405 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
5406 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5407 XEXP (memory_extend_rtx
, 0) = src
;
5409 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5410 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5411 tmode
= GET_MODE_WIDER_MODE (tmode
))
5413 struct table_elt
*larger_elt
;
5415 PUT_MODE (memory_extend_rtx
, tmode
);
5416 larger_elt
= lookup (memory_extend_rtx
,
5417 HASH (memory_extend_rtx
, tmode
), tmode
);
5418 if (larger_elt
== 0)
5421 for (larger_elt
= larger_elt
->first_same_value
;
5422 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5423 if (REG_P (larger_elt
->exp
))
5425 src_related
= gen_lowpart (mode
,
5434 #endif /* LOAD_EXTEND_OP */
5436 if (src
== src_folded
)
5439 /* At this point, ELT, if nonzero, points to a class of expressions
5440 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5441 and SRC_RELATED, if nonzero, each contain additional equivalent
5442 expressions. Prune these latter expressions by deleting expressions
5443 already in the equivalence class.
5445 Check for an equivalent identical to the destination. If found,
5446 this is the preferred equivalent since it will likely lead to
5447 elimination of the insn. Indicate this by placing it in
5451 elt
= elt
->first_same_value
;
5452 for (p
= elt
; p
; p
= p
->next_same_value
)
5454 enum rtx_code code
= GET_CODE (p
->exp
);
5456 /* If the expression is not valid, ignore it. Then we do not
5457 have to check for validity below. In most cases, we can use
5458 `rtx_equal_p', since canonicalization has already been done. */
5459 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5462 /* Also skip paradoxical subregs, unless that's what we're
5465 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5466 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5468 && GET_CODE (src
) == SUBREG
5469 && GET_MODE (src
) == GET_MODE (p
->exp
)
5470 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5471 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5474 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5476 else if (src_folded
&& GET_CODE (src_folded
) == code
5477 && rtx_equal_p (src_folded
, p
->exp
))
5479 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5480 && rtx_equal_p (src_eqv_here
, p
->exp
))
5482 else if (src_related
&& GET_CODE (src_related
) == code
5483 && rtx_equal_p (src_related
, p
->exp
))
5486 /* This is the same as the destination of the insns, we want
5487 to prefer it. Copy it to src_related. The code below will
5488 then give it a negative cost. */
5489 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5493 /* Find the cheapest valid equivalent, trying all the available
5494 possibilities. Prefer items not in the hash table to ones
5495 that are when they are equal cost. Note that we can never
5496 worsen an insn as the current contents will also succeed.
5497 If we find an equivalent identical to the destination, use it as best,
5498 since this insn will probably be eliminated in that case. */
5501 if (rtx_equal_p (src
, dest
))
5502 src_cost
= src_regcost
= -1;
5505 src_cost
= COST (src
);
5506 src_regcost
= approx_reg_cost (src
);
5512 if (rtx_equal_p (src_eqv_here
, dest
))
5513 src_eqv_cost
= src_eqv_regcost
= -1;
5516 src_eqv_cost
= COST (src_eqv_here
);
5517 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5523 if (rtx_equal_p (src_folded
, dest
))
5524 src_folded_cost
= src_folded_regcost
= -1;
5527 src_folded_cost
= COST (src_folded
);
5528 src_folded_regcost
= approx_reg_cost (src_folded
);
5534 if (rtx_equal_p (src_related
, dest
))
5535 src_related_cost
= src_related_regcost
= -1;
5538 src_related_cost
= COST (src_related
);
5539 src_related_regcost
= approx_reg_cost (src_related
);
5543 /* If this was an indirect jump insn, a known label will really be
5544 cheaper even though it looks more expensive. */
5545 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5546 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5548 /* Terminate loop when replacement made. This must terminate since
5549 the current contents will be tested and will always be valid. */
5554 /* Skip invalid entries. */
5555 while (elt
&& !REG_P (elt
->exp
)
5556 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5557 elt
= elt
->next_same_value
;
5559 /* A paradoxical subreg would be bad here: it'll be the right
5560 size, but later may be adjusted so that the upper bits aren't
5561 what we want. So reject it. */
5563 && GET_CODE (elt
->exp
) == SUBREG
5564 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5565 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5566 /* It is okay, though, if the rtx we're trying to match
5567 will ignore any of the bits we can't predict. */
5569 && GET_CODE (src
) == SUBREG
5570 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5571 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5572 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5574 elt
= elt
->next_same_value
;
5580 src_elt_cost
= elt
->cost
;
5581 src_elt_regcost
= elt
->regcost
;
5584 /* Find cheapest and skip it for the next time. For items
5585 of equal cost, use this order:
5586 src_folded, src, src_eqv, src_related and hash table entry. */
5588 && preferable (src_folded_cost
, src_folded_regcost
,
5589 src_cost
, src_regcost
) <= 0
5590 && preferable (src_folded_cost
, src_folded_regcost
,
5591 src_eqv_cost
, src_eqv_regcost
) <= 0
5592 && preferable (src_folded_cost
, src_folded_regcost
,
5593 src_related_cost
, src_related_regcost
) <= 0
5594 && preferable (src_folded_cost
, src_folded_regcost
,
5595 src_elt_cost
, src_elt_regcost
) <= 0)
5597 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5598 if (src_folded_force_flag
)
5600 rtx forced
= force_const_mem (mode
, trial
);
5606 && preferable (src_cost
, src_regcost
,
5607 src_eqv_cost
, src_eqv_regcost
) <= 0
5608 && preferable (src_cost
, src_regcost
,
5609 src_related_cost
, src_related_regcost
) <= 0
5610 && preferable (src_cost
, src_regcost
,
5611 src_elt_cost
, src_elt_regcost
) <= 0)
5612 trial
= src
, src_cost
= MAX_COST
;
5613 else if (src_eqv_here
5614 && preferable (src_eqv_cost
, src_eqv_regcost
,
5615 src_related_cost
, src_related_regcost
) <= 0
5616 && preferable (src_eqv_cost
, src_eqv_regcost
,
5617 src_elt_cost
, src_elt_regcost
) <= 0)
5618 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5619 else if (src_related
5620 && preferable (src_related_cost
, src_related_regcost
,
5621 src_elt_cost
, src_elt_regcost
) <= 0)
5622 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5625 trial
= copy_rtx (elt
->exp
);
5626 elt
= elt
->next_same_value
;
5627 src_elt_cost
= MAX_COST
;
5630 /* We don't normally have an insn matching (set (pc) (pc)), so
5631 check for this separately here. We will delete such an
5634 For other cases such as a table jump or conditional jump
5635 where we know the ultimate target, go ahead and replace the
5636 operand. While that may not make a valid insn, we will
5637 reemit the jump below (and also insert any necessary
5639 if (n_sets
== 1 && dest
== pc_rtx
5641 || (GET_CODE (trial
) == LABEL_REF
5642 && ! condjump_p (insn
))))
5644 /* Don't substitute non-local labels, this confuses CFG. */
5645 if (GET_CODE (trial
) == LABEL_REF
5646 && LABEL_REF_NONLOCAL_P (trial
))
5649 SET_SRC (sets
[i
].rtl
) = trial
;
5650 cse_jumps_altered
= 1;
5654 /* Reject certain invalid forms of CONST that we create. */
5655 else if (CONSTANT_P (trial
)
5656 && GET_CODE (trial
) == CONST
5657 /* Reject cases that will cause decode_rtx_const to
5658 die. On the alpha when simplifying a switch, we
5659 get (const (truncate (minus (label_ref)
5661 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5662 /* Likewise on IA-64, except without the
5664 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5665 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5666 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5667 /* Do nothing for this case. */
5670 /* Look for a substitution that makes a valid insn. */
5671 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5673 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5675 /* If we just made a substitution inside a libcall, then we
5676 need to make the same substitution in any notes attached
5677 to the RETVAL insn. */
5679 && (REG_P (sets
[i
].orig_src
)
5680 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5681 || MEM_P (sets
[i
].orig_src
)))
5683 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5685 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5690 /* The result of apply_change_group can be ignored; see
5693 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5694 apply_change_group ();
5698 /* If we previously found constant pool entries for
5699 constants and this is a constant, try making a
5700 pool entry. Put it in src_folded unless we already have done
5701 this since that is where it likely came from. */
5703 else if (constant_pool_entries_cost
5704 && CONSTANT_P (trial
)
5706 || (!MEM_P (src_folded
)
5707 && ! src_folded_force_flag
))
5708 && GET_MODE_CLASS (mode
) != MODE_CC
5709 && mode
!= VOIDmode
)
5711 src_folded_force_flag
= 1;
5713 src_folded_cost
= constant_pool_entries_cost
;
5714 src_folded_regcost
= constant_pool_entries_regcost
;
5718 src
= SET_SRC (sets
[i
].rtl
);
5720 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5721 However, there is an important exception: If both are registers
5722 that are not the head of their equivalence class, replace SET_SRC
5723 with the head of the class. If we do not do this, we will have
5724 both registers live over a portion of the basic block. This way,
5725 their lifetimes will likely abut instead of overlapping. */
5727 && REGNO_QTY_VALID_P (REGNO (dest
)))
5729 int dest_q
= REG_QTY (REGNO (dest
));
5730 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5732 if (dest_ent
->mode
== GET_MODE (dest
)
5733 && dest_ent
->first_reg
!= REGNO (dest
)
5734 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5735 /* Don't do this if the original insn had a hard reg as
5736 SET_SRC or SET_DEST. */
5737 && (!REG_P (sets
[i
].src
)
5738 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5739 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5740 /* We can't call canon_reg here because it won't do anything if
5741 SRC is a hard register. */
5743 int src_q
= REG_QTY (REGNO (src
));
5744 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5745 int first
= src_ent
->first_reg
;
5747 = (first
>= FIRST_PSEUDO_REGISTER
5748 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5750 /* We must use validate-change even for this, because this
5751 might be a special no-op instruction, suitable only to
5753 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5756 /* If we had a constant that is cheaper than what we are now
5757 setting SRC to, use that constant. We ignored it when we
5758 thought we could make this into a no-op. */
5759 if (src_const
&& COST (src_const
) < COST (src
)
5760 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5767 /* If we made a change, recompute SRC values. */
5768 if (src
!= sets
[i
].src
)
5772 hash_arg_in_memory
= 0;
5774 sets
[i
].src_hash
= HASH (src
, mode
);
5775 sets
[i
].src_volatile
= do_not_record
;
5776 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5777 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5780 /* If this is a single SET, we are setting a register, and we have an
5781 equivalent constant, we want to add a REG_NOTE. We don't want
5782 to write a REG_EQUAL note for a constant pseudo since verifying that
5783 that pseudo hasn't been eliminated is a pain. Such a note also
5784 won't help anything.
5786 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5787 which can be created for a reference to a compile time computable
5788 entry in a jump table. */
5790 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5791 && !REG_P (src_const
)
5792 && ! (GET_CODE (src_const
) == CONST
5793 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5794 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5795 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5797 /* We only want a REG_EQUAL note if src_const != src. */
5798 if (! rtx_equal_p (src
, src_const
))
5800 /* Make sure that the rtx is not shared. */
5801 src_const
= copy_rtx (src_const
);
5803 /* Record the actual constant value in a REG_EQUAL note,
5804 making a new one if one does not already exist. */
5805 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5809 /* Now deal with the destination. */
5812 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5813 while (GET_CODE (dest
) == SUBREG
5814 || GET_CODE (dest
) == ZERO_EXTRACT
5815 || GET_CODE (dest
) == STRICT_LOW_PART
)
5816 dest
= XEXP (dest
, 0);
5818 sets
[i
].inner_dest
= dest
;
5822 #ifdef PUSH_ROUNDING
5823 /* Stack pushes invalidate the stack pointer. */
5824 rtx addr
= XEXP (dest
, 0);
5825 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5826 && XEXP (addr
, 0) == stack_pointer_rtx
)
5827 invalidate (stack_pointer_rtx
, VOIDmode
);
5829 dest
= fold_rtx (dest
, insn
);
5832 /* Compute the hash code of the destination now,
5833 before the effects of this instruction are recorded,
5834 since the register values used in the address computation
5835 are those before this instruction. */
5836 sets
[i
].dest_hash
= HASH (dest
, mode
);
5838 /* Don't enter a bit-field in the hash table
5839 because the value in it after the store
5840 may not equal what was stored, due to truncation. */
5842 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5844 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5846 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5847 && GET_CODE (width
) == CONST_INT
5848 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5849 && ! (INTVAL (src_const
)
5850 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5851 /* Exception: if the value is constant,
5852 and it won't be truncated, record it. */
5856 /* This is chosen so that the destination will be invalidated
5857 but no new value will be recorded.
5858 We must invalidate because sometimes constant
5859 values can be recorded for bitfields. */
5860 sets
[i
].src_elt
= 0;
5861 sets
[i
].src_volatile
= 1;
5867 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5869 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5871 /* One less use of the label this insn used to jump to. */
5873 cse_jumps_altered
= 1;
5874 /* No more processing for this set. */
5878 /* If this SET is now setting PC to a label, we know it used to
5879 be a conditional or computed branch. */
5880 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5881 && !LABEL_REF_NONLOCAL_P (src
))
5883 /* Now emit a BARRIER after the unconditional jump. */
5884 if (NEXT_INSN (insn
) == 0
5885 || !BARRIER_P (NEXT_INSN (insn
)))
5886 emit_barrier_after (insn
);
5888 /* We reemit the jump in as many cases as possible just in
5889 case the form of an unconditional jump is significantly
5890 different than a computed jump or conditional jump.
5892 If this insn has multiple sets, then reemitting the
5893 jump is nontrivial. So instead we just force rerecognition
5894 and hope for the best. */
5899 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5900 JUMP_LABEL (new) = XEXP (src
, 0);
5901 LABEL_NUSES (XEXP (src
, 0))++;
5903 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5904 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5907 XEXP (note
, 1) = NULL_RTX
;
5908 REG_NOTES (new) = note
;
5914 /* Now emit a BARRIER after the unconditional jump. */
5915 if (NEXT_INSN (insn
) == 0
5916 || !BARRIER_P (NEXT_INSN (insn
)))
5917 emit_barrier_after (insn
);
5920 INSN_CODE (insn
) = -1;
5922 /* Do not bother deleting any unreachable code,
5923 let jump/flow do that. */
5925 cse_jumps_altered
= 1;
5929 /* If destination is volatile, invalidate it and then do no further
5930 processing for this assignment. */
5932 else if (do_not_record
)
5934 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5935 invalidate (dest
, VOIDmode
);
5936 else if (MEM_P (dest
))
5937 invalidate (dest
, VOIDmode
);
5938 else if (GET_CODE (dest
) == STRICT_LOW_PART
5939 || GET_CODE (dest
) == ZERO_EXTRACT
)
5940 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5944 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5945 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5948 /* If setting CC0, record what it was set to, or a constant, if it
5949 is equivalent to a constant. If it is being set to a floating-point
5950 value, make a COMPARE with the appropriate constant of 0. If we
5951 don't do this, later code can interpret this as a test against
5952 const0_rtx, which can cause problems if we try to put it into an
5953 insn as a floating-point operand. */
5954 if (dest
== cc0_rtx
)
5956 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5957 this_insn_cc0_mode
= mode
;
5958 if (FLOAT_MODE_P (mode
))
5959 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5965 /* Now enter all non-volatile source expressions in the hash table
5966 if they are not already present.
5967 Record their equivalence classes in src_elt.
5968 This way we can insert the corresponding destinations into
5969 the same classes even if the actual sources are no longer in them
5970 (having been invalidated). */
5972 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5973 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5975 struct table_elt
*elt
;
5976 struct table_elt
*classp
= sets
[0].src_elt
;
5977 rtx dest
= SET_DEST (sets
[0].rtl
);
5978 enum machine_mode eqvmode
= GET_MODE (dest
);
5980 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5982 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5985 if (insert_regs (src_eqv
, classp
, 0))
5987 rehash_using_reg (src_eqv
);
5988 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5990 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5991 elt
->in_memory
= src_eqv_in_memory
;
5994 /* Check to see if src_eqv_elt is the same as a set source which
5995 does not yet have an elt, and if so set the elt of the set source
5997 for (i
= 0; i
< n_sets
; i
++)
5998 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5999 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
6000 sets
[i
].src_elt
= src_eqv_elt
;
6003 for (i
= 0; i
< n_sets
; i
++)
6004 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
6005 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
6007 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
6009 /* REG_EQUAL in setting a STRICT_LOW_PART
6010 gives an equivalent for the entire destination register,
6011 not just for the subreg being stored in now.
6012 This is a more interesting equivalence, so we arrange later
6013 to treat the entire reg as the destination. */
6014 sets
[i
].src_elt
= src_eqv_elt
;
6015 sets
[i
].src_hash
= src_eqv_hash
;
6019 /* Insert source and constant equivalent into hash table, if not
6021 struct table_elt
*classp
= src_eqv_elt
;
6022 rtx src
= sets
[i
].src
;
6023 rtx dest
= SET_DEST (sets
[i
].rtl
);
6024 enum machine_mode mode
6025 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
6027 /* It's possible that we have a source value known to be
6028 constant but don't have a REG_EQUAL note on the insn.
6029 Lack of a note will mean src_eqv_elt will be NULL. This
6030 can happen where we've generated a SUBREG to access a
6031 CONST_INT that is already in a register in a wider mode.
6032 Ensure that the source expression is put in the proper
6035 classp
= sets
[i
].src_const_elt
;
6037 if (sets
[i
].src_elt
== 0)
6039 /* Don't put a hard register source into the table if this is
6040 the last insn of a libcall. In this case, we only need
6041 to put src_eqv_elt in src_elt. */
6042 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6044 struct table_elt
*elt
;
6046 /* Note that these insert_regs calls cannot remove
6047 any of the src_elt's, because they would have failed to
6048 match if not still valid. */
6049 if (insert_regs (src
, classp
, 0))
6051 rehash_using_reg (src
);
6052 sets
[i
].src_hash
= HASH (src
, mode
);
6054 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
6055 elt
->in_memory
= sets
[i
].src_in_memory
;
6056 sets
[i
].src_elt
= classp
= elt
;
6059 sets
[i
].src_elt
= classp
;
6061 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
6062 && src
!= sets
[i
].src_const
6063 && ! rtx_equal_p (sets
[i
].src_const
, src
))
6064 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
6065 sets
[i
].src_const_hash
, mode
);
6068 else if (sets
[i
].src_elt
== 0)
6069 /* If we did not insert the source into the hash table (e.g., it was
6070 volatile), note the equivalence class for the REG_EQUAL value, if any,
6071 so that the destination goes into that class. */
6072 sets
[i
].src_elt
= src_eqv_elt
;
6074 /* Record destination addresses in the hash table. This allows us to
6075 check if they are invalidated by other sets. */
6076 for (i
= 0; i
< n_sets
; i
++)
6080 rtx x
= sets
[i
].inner_dest
;
6081 struct table_elt
*elt
;
6082 enum machine_mode mode
;
6088 mode
= GET_MODE (x
);
6089 hash
= HASH (x
, mode
);
6090 elt
= lookup (x
, hash
, mode
);
6093 if (insert_regs (x
, NULL
, 0))
6095 rtx dest
= SET_DEST (sets
[i
].rtl
);
6097 rehash_using_reg (x
);
6098 hash
= HASH (x
, mode
);
6099 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
6101 elt
= insert (x
, NULL
, hash
, mode
);
6104 sets
[i
].dest_addr_elt
= elt
;
6107 sets
[i
].dest_addr_elt
= NULL
;
6111 invalidate_from_clobbers (x
);
6113 /* Some registers are invalidated by subroutine calls. Memory is
6114 invalidated by non-constant calls. */
6118 if (! CONST_OR_PURE_CALL_P (insn
))
6119 invalidate_memory ();
6120 invalidate_for_call ();
6123 /* Now invalidate everything set by this instruction.
6124 If a SUBREG or other funny destination is being set,
6125 sets[i].rtl is still nonzero, so here we invalidate the reg
6126 a part of which is being set. */
6128 for (i
= 0; i
< n_sets
; i
++)
6131 /* We can't use the inner dest, because the mode associated with
6132 a ZERO_EXTRACT is significant. */
6133 rtx dest
= SET_DEST (sets
[i
].rtl
);
6135 /* Needed for registers to remove the register from its
6136 previous quantity's chain.
6137 Needed for memory if this is a nonvarying address, unless
6138 we have just done an invalidate_memory that covers even those. */
6139 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
6140 invalidate (dest
, VOIDmode
);
6141 else if (MEM_P (dest
))
6142 invalidate (dest
, VOIDmode
);
6143 else if (GET_CODE (dest
) == STRICT_LOW_PART
6144 || GET_CODE (dest
) == ZERO_EXTRACT
)
6145 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6148 /* A volatile ASM invalidates everything. */
6149 if (NONJUMP_INSN_P (insn
)
6150 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
6151 && MEM_VOLATILE_P (PATTERN (insn
)))
6152 flush_hash_table ();
6154 /* Make sure registers mentioned in destinations
6155 are safe for use in an expression to be inserted.
6156 This removes from the hash table
6157 any invalid entry that refers to one of these registers.
6159 We don't care about the return value from mention_regs because
6160 we are going to hash the SET_DEST values unconditionally. */
6162 for (i
= 0; i
< n_sets
; i
++)
6166 rtx x
= SET_DEST (sets
[i
].rtl
);
6172 /* We used to rely on all references to a register becoming
6173 inaccessible when a register changes to a new quantity,
6174 since that changes the hash code. However, that is not
6175 safe, since after HASH_SIZE new quantities we get a
6176 hash 'collision' of a register with its own invalid
6177 entries. And since SUBREGs have been changed not to
6178 change their hash code with the hash code of the register,
6179 it wouldn't work any longer at all. So we have to check
6180 for any invalid references lying around now.
6181 This code is similar to the REG case in mention_regs,
6182 but it knows that reg_tick has been incremented, and
6183 it leaves reg_in_table as -1 . */
6184 unsigned int regno
= REGNO (x
);
6185 unsigned int endregno
6186 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
6187 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
6190 for (i
= regno
; i
< endregno
; i
++)
6192 if (REG_IN_TABLE (i
) >= 0)
6194 remove_invalid_refs (i
);
6195 REG_IN_TABLE (i
) = -1;
6202 /* We may have just removed some of the src_elt's from the hash table.
6203 So replace each one with the current head of the same class.
6204 Also check if destination addresses have been removed. */
6206 for (i
= 0; i
< n_sets
; i
++)
6209 if (sets
[i
].dest_addr_elt
6210 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
6212 /* The elt was removed, which means this destination is not
6213 valid after this instruction. */
6214 sets
[i
].rtl
= NULL_RTX
;
6216 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6217 /* If elt was removed, find current head of same class,
6218 or 0 if nothing remains of that class. */
6220 struct table_elt
*elt
= sets
[i
].src_elt
;
6222 while (elt
&& elt
->prev_same_value
)
6223 elt
= elt
->prev_same_value
;
6225 while (elt
&& elt
->first_same_value
== 0)
6226 elt
= elt
->next_same_value
;
6227 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6231 /* Now insert the destinations into their equivalence classes. */
6233 for (i
= 0; i
< n_sets
; i
++)
6236 rtx dest
= SET_DEST (sets
[i
].rtl
);
6237 struct table_elt
*elt
;
6239 /* Don't record value if we are not supposed to risk allocating
6240 floating-point values in registers that might be wider than
6242 if ((flag_float_store
6244 && FLOAT_MODE_P (GET_MODE (dest
)))
6245 /* Don't record BLKmode values, because we don't know the
6246 size of it, and can't be sure that other BLKmode values
6247 have the same or smaller size. */
6248 || GET_MODE (dest
) == BLKmode
6249 /* Don't record values of destinations set inside a libcall block
6250 since we might delete the libcall. Things should have been set
6251 up so we won't want to reuse such a value, but we play it safe
6254 /* If we didn't put a REG_EQUAL value or a source into the hash
6255 table, there is no point is recording DEST. */
6256 || sets
[i
].src_elt
== 0
6257 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6258 or SIGN_EXTEND, don't record DEST since it can cause
6259 some tracking to be wrong.
6261 ??? Think about this more later. */
6262 || (GET_CODE (dest
) == SUBREG
6263 && (GET_MODE_SIZE (GET_MODE (dest
))
6264 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6265 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
6266 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
6269 /* STRICT_LOW_PART isn't part of the value BEING set,
6270 and neither is the SUBREG inside it.
6271 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6272 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6273 dest
= SUBREG_REG (XEXP (dest
, 0));
6275 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
6276 /* Registers must also be inserted into chains for quantities. */
6277 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6279 /* If `insert_regs' changes something, the hash code must be
6281 rehash_using_reg (dest
);
6282 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
6285 elt
= insert (dest
, sets
[i
].src_elt
,
6286 sets
[i
].dest_hash
, GET_MODE (dest
));
6288 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
6289 && !MEM_READONLY_P (sets
[i
].inner_dest
));
6291 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6292 narrower than M2, and both M1 and M2 are the same number of words,
6293 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6294 make that equivalence as well.
6296 However, BAR may have equivalences for which gen_lowpart
6297 will produce a simpler value than gen_lowpart applied to
6298 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6299 BAR's equivalences. If we don't get a simplified form, make
6300 the SUBREG. It will not be used in an equivalence, but will
6301 cause two similar assignments to be detected.
6303 Note the loop below will find SUBREG_REG (DEST) since we have
6304 already entered SRC and DEST of the SET in the table. */
6306 if (GET_CODE (dest
) == SUBREG
6307 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6309 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6310 && (GET_MODE_SIZE (GET_MODE (dest
))
6311 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6312 && sets
[i
].src_elt
!= 0)
6314 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6315 struct table_elt
*elt
, *classp
= 0;
6317 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6318 elt
= elt
->next_same_value
)
6322 struct table_elt
*src_elt
;
6325 /* Ignore invalid entries. */
6326 if (!REG_P (elt
->exp
)
6327 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6330 /* We may have already been playing subreg games. If the
6331 mode is already correct for the destination, use it. */
6332 if (GET_MODE (elt
->exp
) == new_mode
)
6336 /* Calculate big endian correction for the SUBREG_BYTE.
6337 We have already checked that M1 (GET_MODE (dest))
6338 is not narrower than M2 (new_mode). */
6339 if (BYTES_BIG_ENDIAN
)
6340 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6341 - GET_MODE_SIZE (new_mode
));
6343 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6344 GET_MODE (dest
), byte
);
6347 /* The call to simplify_gen_subreg fails if the value
6348 is VOIDmode, yet we can't do any simplification, e.g.
6349 for EXPR_LISTs denoting function call results.
6350 It is invalid to construct a SUBREG with a VOIDmode
6351 SUBREG_REG, hence a zero new_src means we can't do
6352 this substitution. */
6356 src_hash
= HASH (new_src
, new_mode
);
6357 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6359 /* Put the new source in the hash table is if isn't
6363 if (insert_regs (new_src
, classp
, 0))
6365 rehash_using_reg (new_src
);
6366 src_hash
= HASH (new_src
, new_mode
);
6368 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6369 src_elt
->in_memory
= elt
->in_memory
;
6371 else if (classp
&& classp
!= src_elt
->first_same_value
)
6372 /* Show that two things that we've seen before are
6373 actually the same. */
6374 merge_equiv_classes (src_elt
, classp
);
6376 classp
= src_elt
->first_same_value
;
6377 /* Ignore invalid entries. */
6379 && !REG_P (classp
->exp
)
6380 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6381 classp
= classp
->next_same_value
;
6386 /* Special handling for (set REG0 REG1) where REG0 is the
6387 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6388 be used in the sequel, so (if easily done) change this insn to
6389 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6390 that computed their value. Then REG1 will become a dead store
6391 and won't cloud the situation for later optimizations.
6393 Do not make this change if REG1 is a hard register, because it will
6394 then be used in the sequel and we may be changing a two-operand insn
6395 into a three-operand insn.
6397 Also do not do this if we are operating on a copy of INSN.
6399 Also don't do this if INSN ends a libcall; this would cause an unrelated
6400 register to be set in the middle of a libcall, and we then get bad code
6401 if the libcall is deleted. */
6403 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6404 && NEXT_INSN (PREV_INSN (insn
)) == insn
6405 && REG_P (SET_SRC (sets
[0].rtl
))
6406 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6407 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6409 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6410 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6412 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6413 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6416 /* Scan for the previous nonnote insn, but stop at a basic
6420 prev
= PREV_INSN (prev
);
6422 while (prev
&& NOTE_P (prev
)
6423 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6425 /* Do not swap the registers around if the previous instruction
6426 attaches a REG_EQUIV note to REG1.
6428 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6429 from the pseudo that originally shadowed an incoming argument
6430 to another register. Some uses of REG_EQUIV might rely on it
6431 being attached to REG1 rather than REG2.
6433 This section previously turned the REG_EQUIV into a REG_EQUAL
6434 note. We cannot do that because REG_EQUIV may provide an
6435 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6437 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6438 && GET_CODE (PATTERN (prev
)) == SET
6439 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6440 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6442 rtx dest
= SET_DEST (sets
[0].rtl
);
6443 rtx src
= SET_SRC (sets
[0].rtl
);
6446 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6447 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6448 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6449 apply_change_group ();
6451 /* If INSN has a REG_EQUAL note, and this note mentions
6452 REG0, then we must delete it, because the value in
6453 REG0 has changed. If the note's value is REG1, we must
6454 also delete it because that is now this insn's dest. */
6455 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6457 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6458 || rtx_equal_p (src
, XEXP (note
, 0))))
6459 remove_note (insn
, note
);
6464 /* If this is a conditional jump insn, record any known equivalences due to
6465 the condition being tested. */
6468 && n_sets
== 1 && GET_CODE (x
) == SET
6469 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6470 record_jump_equiv (insn
, 0);
6473 /* If the previous insn set CC0 and this insn no longer references CC0,
6474 delete the previous insn. Here we use the fact that nothing expects CC0
6475 to be valid over an insn, which is true until the final pass. */
6476 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6477 && (tem
= single_set (prev_insn
)) != 0
6478 && SET_DEST (tem
) == cc0_rtx
6479 && ! reg_mentioned_p (cc0_rtx
, x
))
6480 delete_insn (prev_insn
);
6482 prev_insn_cc0
= this_insn_cc0
;
6483 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6488 /* Remove from the hash table all expressions that reference memory. */
6491 invalidate_memory (void)
6494 struct table_elt
*p
, *next
;
6496 for (i
= 0; i
< HASH_SIZE
; i
++)
6497 for (p
= table
[i
]; p
; p
= next
)
6499 next
= p
->next_same_hash
;
6501 remove_from_table (p
, i
);
6505 /* If ADDR is an address that implicitly affects the stack pointer, return
6506 1 and update the register tables to show the effect. Else, return 0. */
6509 addr_affects_sp_p (rtx addr
)
6511 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6512 && REG_P (XEXP (addr
, 0))
6513 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6515 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6517 REG_TICK (STACK_POINTER_REGNUM
)++;
6518 /* Is it possible to use a subreg of SP? */
6519 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6522 /* This should be *very* rare. */
6523 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6524 invalidate (stack_pointer_rtx
, VOIDmode
);
6532 /* Perform invalidation on the basis of everything about an insn
6533 except for invalidating the actual places that are SET in it.
6534 This includes the places CLOBBERed, and anything that might
6535 alias with something that is SET or CLOBBERed.
6537 X is the pattern of the insn. */
6540 invalidate_from_clobbers (rtx x
)
6542 if (GET_CODE (x
) == CLOBBER
)
6544 rtx ref
= XEXP (x
, 0);
6547 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6549 invalidate (ref
, VOIDmode
);
6550 else if (GET_CODE (ref
) == STRICT_LOW_PART
6551 || GET_CODE (ref
) == ZERO_EXTRACT
)
6552 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6555 else if (GET_CODE (x
) == PARALLEL
)
6558 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6560 rtx y
= XVECEXP (x
, 0, i
);
6561 if (GET_CODE (y
) == CLOBBER
)
6563 rtx ref
= XEXP (y
, 0);
6564 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6566 invalidate (ref
, VOIDmode
);
6567 else if (GET_CODE (ref
) == STRICT_LOW_PART
6568 || GET_CODE (ref
) == ZERO_EXTRACT
)
6569 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6575 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6576 and replace any registers in them with either an equivalent constant
6577 or the canonical form of the register. If we are inside an address,
6578 only do this if the address remains valid.
6580 OBJECT is 0 except when within a MEM in which case it is the MEM.
6582 Return the replacement for X. */
6585 cse_process_notes (rtx x
, rtx object
)
6587 enum rtx_code code
= GET_CODE (x
);
6588 const char *fmt
= GET_RTX_FORMAT (code
);
6605 validate_change (x
, &XEXP (x
, 0),
6606 cse_process_notes (XEXP (x
, 0), x
), 0);
6611 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6612 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6614 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6621 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6622 /* We don't substitute VOIDmode constants into these rtx,
6623 since they would impede folding. */
6624 if (GET_MODE (new) != VOIDmode
)
6625 validate_change (object
, &XEXP (x
, 0), new, 0);
6630 i
= REG_QTY (REGNO (x
));
6632 /* Return a constant or a constant register. */
6633 if (REGNO_QTY_VALID_P (REGNO (x
)))
6635 struct qty_table_elem
*ent
= &qty_table
[i
];
6637 if (ent
->const_rtx
!= NULL_RTX
6638 && (CONSTANT_P (ent
->const_rtx
)
6639 || REG_P (ent
->const_rtx
)))
6641 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6647 /* Otherwise, canonicalize this register. */
6648 return canon_reg (x
, NULL_RTX
);
6654 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6656 validate_change (object
, &XEXP (x
, i
),
6657 cse_process_notes (XEXP (x
, i
), object
), 0);
6662 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6663 since they are done elsewhere. This function is called via note_stores. */
6666 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6668 enum rtx_code code
= GET_CODE (dest
);
6671 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6672 /* There are times when an address can appear varying and be a PLUS
6673 during this scan when it would be a fixed address were we to know
6674 the proper equivalences. So invalidate all memory if there is
6675 a BLKmode or nonscalar memory reference or a reference to a
6676 variable address. */
6677 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6678 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6680 invalidate_memory ();
6684 if (GET_CODE (set
) == CLOBBER
6689 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6690 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6691 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6692 invalidate (dest
, VOIDmode
);
6695 /* Invalidate all insns from START up to the end of the function or the
6696 next label. This called when we wish to CSE around a block that is
6697 conditionally executed. */
6700 invalidate_skipped_block (rtx start
)
6704 for (insn
= start
; insn
&& !LABEL_P (insn
);
6705 insn
= NEXT_INSN (insn
))
6707 if (! INSN_P (insn
))
6712 if (! CONST_OR_PURE_CALL_P (insn
))
6713 invalidate_memory ();
6714 invalidate_for_call ();
6717 invalidate_from_clobbers (PATTERN (insn
));
6718 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6722 /* Find the end of INSN's basic block and return its range,
6723 the total number of SETs in all the insns of the block, the last insn of the
6724 block, and the branch path.
6726 The branch path indicates which branches should be followed. If a nonzero
6727 path size is specified, the block should be rescanned and a different set
6728 of branches will be taken. The branch path is only used if
6729 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6731 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6732 used to describe the block. It is filled in with the information about
6733 the current block. The incoming structure's branch path, if any, is used
6734 to construct the output branch path. */
6737 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6738 int follow_jumps
, int skip_blocks
)
6742 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6743 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6744 int path_size
= data
->path_size
;
6748 /* Update the previous branch path, if any. If the last branch was
6749 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6750 If it was previously PATH_NOT_TAKEN,
6751 shorten the path by one and look at the previous branch. We know that
6752 at least one branch must have been taken if PATH_SIZE is nonzero. */
6753 while (path_size
> 0)
6755 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6757 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6764 /* If the first instruction is marked with QImode, that means we've
6765 already processed this block. Our caller will look at DATA->LAST
6766 to figure out where to go next. We want to return the next block
6767 in the instruction stream, not some branched-to block somewhere
6768 else. We accomplish this by pretending our called forbid us to
6769 follow jumps, or skip blocks. */
6770 if (GET_MODE (insn
) == QImode
)
6771 follow_jumps
= skip_blocks
= 0;
6773 /* Scan to end of this basic block. */
6774 while (p
&& !LABEL_P (p
))
6776 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6777 the regs restored by the longjmp come from
6778 a later time than the setjmp. */
6779 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6780 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6783 /* A PARALLEL can have lots of SETs in it,
6784 especially if it is really an ASM_OPERANDS. */
6785 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6786 nsets
+= XVECLEN (PATTERN (p
), 0);
6787 else if (!NOTE_P (p
))
6790 /* Ignore insns made by CSE; they cannot affect the boundaries of
6793 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6794 high_cuid
= INSN_CUID (p
);
6795 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6796 low_cuid
= INSN_CUID (p
);
6798 /* See if this insn is in our branch path. If it is and we are to
6800 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6802 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6805 /* Point to next entry in path, if any. */
6809 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6810 was specified, we haven't reached our maximum path length, there are
6811 insns following the target of the jump, this is the only use of the
6812 jump label, and the target label is preceded by a BARRIER.
6814 Alternatively, we can follow the jump if it branches around a
6815 block of code and there are no other branches into the block.
6816 In this case invalidate_skipped_block will be called to invalidate any
6817 registers set in the block when following the jump. */
6819 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6821 && GET_CODE (PATTERN (p
)) == SET
6822 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6823 && JUMP_LABEL (p
) != 0
6824 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6825 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6827 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6829 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6830 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6831 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6834 /* If we ran into a BARRIER, this code is an extension of the
6835 basic block when the branch is taken. */
6836 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6838 /* Don't allow ourself to keep walking around an
6839 always-executed loop. */
6840 if (next_real_insn (q
) == next
)
6846 /* Similarly, don't put a branch in our path more than once. */
6847 for (i
= 0; i
< path_entry
; i
++)
6848 if (data
->path
[i
].branch
== p
)
6851 if (i
!= path_entry
)
6854 data
->path
[path_entry
].branch
= p
;
6855 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6857 /* This branch now ends our path. It was possible that we
6858 didn't see this branch the last time around (when the
6859 insn in front of the target was a JUMP_INSN that was
6860 turned into a no-op). */
6861 path_size
= path_entry
;
6864 /* Mark block so we won't scan it again later. */
6865 PUT_MODE (NEXT_INSN (p
), QImode
);
6867 /* Detect a branch around a block of code. */
6868 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6872 if (next_real_insn (q
) == next
)
6878 for (i
= 0; i
< path_entry
; i
++)
6879 if (data
->path
[i
].branch
== p
)
6882 if (i
!= path_entry
)
6885 /* This is no_labels_between_p (p, q) with an added check for
6886 reaching the end of a function (in case Q precedes P). */
6887 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6893 data
->path
[path_entry
].branch
= p
;
6894 data
->path
[path_entry
++].status
= PATH_AROUND
;
6896 path_size
= path_entry
;
6899 /* Mark block so we won't scan it again later. */
6900 PUT_MODE (NEXT_INSN (p
), QImode
);
6907 data
->low_cuid
= low_cuid
;
6908 data
->high_cuid
= high_cuid
;
6909 data
->nsets
= nsets
;
6912 /* If all jumps in the path are not taken, set our path length to zero
6913 so a rescan won't be done. */
6914 for (i
= path_size
- 1; i
>= 0; i
--)
6915 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6919 data
->path_size
= 0;
6921 data
->path_size
= path_size
;
6923 /* End the current branch path. */
6924 data
->path
[path_size
].branch
= 0;
6927 /* Perform cse on the instructions of a function.
6928 F is the first instruction.
6929 NREGS is one plus the highest pseudo-reg number used in the instruction.
6931 Returns 1 if jump_optimize should be redone due to simplifications
6932 in conditional jump instructions. */
6935 cse_main (rtx f
, int nregs
)
6937 struct cse_basic_block_data val
;
6941 init_cse_reg_info (nregs
);
6943 val
.path
= XNEWVEC (struct branch_path
, PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6945 cse_jumps_altered
= 0;
6946 recorded_label_ref
= 0;
6947 constant_pool_entries_cost
= 0;
6948 constant_pool_entries_regcost
= 0;
6950 rtl_hooks
= cse_rtl_hooks
;
6953 init_alias_analysis ();
6955 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6957 /* Find the largest uid. */
6959 max_uid
= get_max_uid ();
6960 uid_cuid
= XCNEWVEC (int, max_uid
+ 1);
6962 /* Compute the mapping from uids to cuids.
6963 CUIDs are numbers assigned to insns, like uids,
6964 except that cuids increase monotonically through the code.
6965 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6966 between two insns is not affected by -g. */
6968 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6971 || NOTE_LINE_NUMBER (insn
) < 0)
6972 INSN_CUID (insn
) = ++i
;
6974 /* Give a line number note the same cuid as preceding insn. */
6975 INSN_CUID (insn
) = i
;
6978 /* Loop over basic blocks.
6979 Compute the maximum number of qty's needed for each basic block
6980 (which is 2 for each SET). */
6985 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
,
6986 flag_cse_skip_blocks
);
6988 /* If this basic block was already processed or has no sets, skip it. */
6989 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6991 PUT_MODE (insn
, VOIDmode
);
6992 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6997 cse_basic_block_start
= val
.low_cuid
;
6998 cse_basic_block_end
= val
.high_cuid
;
6999 max_qty
= val
.nsets
* 2;
7002 fprintf (dump_file
, ";; Processing block from %d to %d, %d sets.\n",
7003 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
7006 /* Make MAX_QTY bigger to give us room to optimize
7007 past the end of this basic block, if that should prove useful. */
7011 /* If this basic block is being extended by following certain jumps,
7012 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7013 Otherwise, we start after this basic block. */
7014 if (val
.path_size
> 0)
7015 cse_basic_block (insn
, val
.last
, val
.path
);
7018 int old_cse_jumps_altered
= cse_jumps_altered
;
7021 /* When cse changes a conditional jump to an unconditional
7022 jump, we want to reprocess the block, since it will give
7023 us a new branch path to investigate. */
7024 cse_jumps_altered
= 0;
7025 temp
= cse_basic_block (insn
, val
.last
, val
.path
);
7026 if (cse_jumps_altered
== 0
7027 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
7030 cse_jumps_altered
|= old_cse_jumps_altered
;
7042 end_alias_analysis ();
7044 free (reg_eqv_table
);
7046 rtl_hooks
= general_rtl_hooks
;
7048 return cse_jumps_altered
|| recorded_label_ref
;
7051 /* Process a single basic block. FROM and TO and the limits of the basic
7052 block. NEXT_BRANCH points to the branch path when following jumps or
7053 a null path when not following jumps. */
7056 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
)
7060 rtx libcall_insn
= NULL_RTX
;
7062 int no_conflict
= 0;
7064 /* Allocate the space needed by qty_table. */
7065 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
7069 /* TO might be a label. If so, protect it from being deleted. */
7070 if (to
!= 0 && LABEL_P (to
))
7073 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
7075 enum rtx_code code
= GET_CODE (insn
);
7077 /* If we have processed 1,000 insns, flush the hash table to
7078 avoid extreme quadratic behavior. We must not include NOTEs
7079 in the count since there may be more of them when generating
7080 debugging information. If we clear the table at different
7081 times, code generated with -g -O might be different than code
7082 generated with -O but not -g.
7084 ??? This is a real kludge and needs to be done some other way.
7086 if (code
!= NOTE
&& num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
7088 flush_hash_table ();
7092 /* See if this is a branch that is part of the path. If so, and it is
7093 to be taken, do so. */
7094 if (next_branch
->branch
== insn
)
7096 enum taken status
= next_branch
++->status
;
7097 if (status
!= PATH_NOT_TAKEN
)
7099 if (status
== PATH_TAKEN
)
7100 record_jump_equiv (insn
, 1);
7102 invalidate_skipped_block (NEXT_INSN (insn
));
7104 /* Set the last insn as the jump insn; it doesn't affect cc0.
7105 Then follow this branch. */
7110 insn
= JUMP_LABEL (insn
);
7115 if (GET_MODE (insn
) == QImode
)
7116 PUT_MODE (insn
, VOIDmode
);
7118 if (GET_RTX_CLASS (code
) == RTX_INSN
)
7122 /* Process notes first so we have all notes in canonical forms when
7123 looking for duplicate operations. */
7125 if (REG_NOTES (insn
))
7126 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
7128 /* Track when we are inside in LIBCALL block. Inside such a block,
7129 we do not want to record destinations. The last insn of a
7130 LIBCALL block is not considered to be part of the block, since
7131 its destination is the result of the block and hence should be
7134 if (REG_NOTES (insn
) != 0)
7136 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
7137 libcall_insn
= XEXP (p
, 0);
7138 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7140 /* Keep libcall_insn for the last SET insn of a no-conflict
7141 block to prevent changing the destination. */
7147 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
7151 cse_insn (insn
, libcall_insn
);
7153 if (no_conflict
== -1)
7159 /* If we haven't already found an insn where we added a LABEL_REF,
7161 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
7162 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
7164 recorded_label_ref
= 1;
7167 /* If INSN is now an unconditional jump, skip to the end of our
7168 basic block by pretending that we just did the last insn in the
7169 basic block. If we are jumping to the end of our block, show
7170 that we can have one usage of TO. */
7172 if (any_uncondjump_p (insn
))
7180 if (JUMP_LABEL (insn
) == to
)
7183 /* Maybe TO was deleted because the jump is unconditional.
7184 If so, there is nothing left in this basic block. */
7185 /* ??? Perhaps it would be smarter to set TO
7186 to whatever follows this insn,
7187 and pretend the basic block had always ended here. */
7188 if (INSN_DELETED_P (to
))
7191 insn
= PREV_INSN (to
);
7194 /* See if it is ok to keep on going past the label
7195 which used to end our basic block. Remember that we incremented
7196 the count of that label, so we decrement it here. If we made
7197 a jump unconditional, TO_USAGE will be one; in that case, we don't
7198 want to count the use in that jump. */
7200 if (to
!= 0 && NEXT_INSN (insn
) == to
7201 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
7203 struct cse_basic_block_data val
;
7206 insn
= NEXT_INSN (to
);
7208 /* If TO was the last insn in the function, we are done. */
7215 /* If TO was preceded by a BARRIER we are done with this block
7216 because it has no continuation. */
7217 prev
= prev_nonnote_insn (to
);
7218 if (prev
&& BARRIER_P (prev
))
7224 /* Find the end of the following block. Note that we won't be
7225 following branches in this case. */
7228 val
.path
= XNEWVEC (struct branch_path
, PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
7229 cse_end_of_basic_block (insn
, &val
, 0, 0);
7232 /* If the tables we allocated have enough space left
7233 to handle all the SETs in the next basic block,
7234 continue through it. Otherwise, return,
7235 and that block will be scanned individually. */
7236 if (val
.nsets
* 2 + next_qty
> max_qty
)
7239 cse_basic_block_start
= val
.low_cuid
;
7240 cse_basic_block_end
= val
.high_cuid
;
7243 /* Prevent TO from being deleted if it is a label. */
7244 if (to
!= 0 && LABEL_P (to
))
7247 /* Back up so we process the first insn in the extension. */
7248 insn
= PREV_INSN (insn
);
7252 gcc_assert (next_qty
<= max_qty
);
7256 return to
? NEXT_INSN (to
) : 0;
7259 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7260 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7263 check_for_label_ref (rtx
*rtl
, void *data
)
7265 rtx insn
= (rtx
) data
;
7267 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7268 we must rerun jump since it needs to place the note. If this is a
7269 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7270 since no REG_LABEL will be added. */
7271 return (GET_CODE (*rtl
) == LABEL_REF
7272 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7273 && LABEL_P (XEXP (*rtl
, 0))
7274 && INSN_UID (XEXP (*rtl
, 0)) != 0
7275 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7278 /* Count the number of times registers are used (not set) in X.
7279 COUNTS is an array in which we accumulate the count, INCR is how much
7280 we count each register usage.
7282 Don't count a usage of DEST, which is the SET_DEST of a SET which
7283 contains X in its SET_SRC. This is because such a SET does not
7284 modify the liveness of DEST.
7285 DEST is set to pc_rtx for a trapping insn, which means that we must count
7286 uses of a SET_DEST regardless because the insn can't be deleted here. */
7289 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
7299 switch (code
= GET_CODE (x
))
7303 counts
[REGNO (x
)] += incr
;
7317 /* If we are clobbering a MEM, mark any registers inside the address
7319 if (MEM_P (XEXP (x
, 0)))
7320 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
7324 /* Unless we are setting a REG, count everything in SET_DEST. */
7325 if (!REG_P (SET_DEST (x
)))
7326 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
7327 count_reg_usage (SET_SRC (x
), counts
,
7328 dest
? dest
: SET_DEST (x
),
7335 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
7336 this fact by setting DEST to pc_rtx. */
7337 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (x
)))
7339 if (code
== CALL_INSN
)
7340 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
7341 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
7343 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7346 note
= find_reg_equal_equiv_note (x
);
7349 rtx eqv
= XEXP (note
, 0);
7351 if (GET_CODE (eqv
) == EXPR_LIST
)
7352 /* This REG_EQUAL note describes the result of a function call.
7353 Process all the arguments. */
7356 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
7357 eqv
= XEXP (eqv
, 1);
7359 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7361 count_reg_usage (eqv
, counts
, dest
, incr
);
7366 if (REG_NOTE_KIND (x
) == REG_EQUAL
7367 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7368 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7369 involving registers in the address. */
7370 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7371 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
7373 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
7377 /* If the asm is volatile, then this insn cannot be deleted,
7378 and so the inputs *must* be live. */
7379 if (MEM_VOLATILE_P (x
))
7381 /* Iterate over just the inputs, not the constraints as well. */
7382 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7383 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
7393 fmt
= GET_RTX_FORMAT (code
);
7394 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7397 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
7398 else if (fmt
[i
] == 'E')
7399 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7400 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
7404 /* Return true if set is live. */
7406 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7413 if (set_noop_p (set
))
7417 else if (GET_CODE (SET_DEST (set
)) == CC0
7418 && !side_effects_p (SET_SRC (set
))
7419 && ((tem
= next_nonnote_insn (insn
)) == 0
7421 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7424 else if (!REG_P (SET_DEST (set
))
7425 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7426 || counts
[REGNO (SET_DEST (set
))] != 0
7427 || side_effects_p (SET_SRC (set
)))
7432 /* Return true if insn is live. */
7435 insn_live_p (rtx insn
, int *counts
)
7438 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7440 else if (GET_CODE (PATTERN (insn
)) == SET
)
7441 return set_live_p (PATTERN (insn
), insn
, counts
);
7442 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7444 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7446 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7448 if (GET_CODE (elt
) == SET
)
7450 if (set_live_p (elt
, insn
, counts
))
7453 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7462 /* Return true if libcall is dead as a whole. */
7465 dead_libcall_p (rtx insn
, int *counts
)
7469 /* See if there's a REG_EQUAL note on this insn and try to
7470 replace the source with the REG_EQUAL expression.
7472 We assume that insns with REG_RETVALs can only be reg->reg
7473 copies at this point. */
7474 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7478 set
= single_set (insn
);
7482 new = simplify_rtx (XEXP (note
, 0));
7484 new = XEXP (note
, 0);
7486 /* While changing insn, we must update the counts accordingly. */
7487 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7489 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7491 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7492 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7493 remove_note (insn
, note
);
7497 if (CONSTANT_P (new))
7499 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7500 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7502 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7503 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7504 remove_note (insn
, note
);
7509 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7513 /* Scan all the insns and delete any that are dead; i.e., they store a register
7514 that is never used or they copy a register to itself.
7516 This is used to remove insns made obviously dead by cse, loop or other
7517 optimizations. It improves the heuristics in loop since it won't try to
7518 move dead invariants out of loops or make givs for dead quantities. The
7519 remaining passes of the compilation are also sped up. */
7522 delete_trivially_dead_insns (rtx insns
, int nreg
)
7526 int in_libcall
= 0, dead_libcall
= 0;
7529 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7530 /* First count the number of times each register is used. */
7531 counts
= XCNEWVEC (int, nreg
);
7532 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7534 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7536 /* Go from the last insn to the first and delete insns that only set unused
7537 registers or copy a register to itself. As we delete an insn, remove
7538 usage counts for registers it uses.
7540 The first jump optimization pass may leave a real insn as the last
7541 insn in the function. We must not skip that insn or we may end
7542 up deleting code that is not really dead. */
7543 for (insn
= get_last_insn (); insn
; insn
= prev
)
7547 prev
= PREV_INSN (insn
);
7551 /* Don't delete any insns that are part of a libcall block unless
7552 we can delete the whole libcall block.
7554 Flow or loop might get confused if we did that. Remember
7555 that we are scanning backwards. */
7556 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7560 dead_libcall
= dead_libcall_p (insn
, counts
);
7562 else if (in_libcall
)
7563 live_insn
= ! dead_libcall
;
7565 live_insn
= insn_live_p (insn
, counts
);
7567 /* If this is a dead insn, delete it and show registers in it aren't
7572 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7573 delete_insn_and_edges (insn
);
7577 if (in_libcall
&& find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7584 if (dump_file
&& ndead
)
7585 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7589 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7593 /* This function is called via for_each_rtx. The argument, NEWREG, is
7594 a condition code register with the desired mode. If we are looking
7595 at the same register in a different mode, replace it with
7599 cse_change_cc_mode (rtx
*loc
, void *data
)
7601 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
7605 && REGNO (*loc
) == REGNO (args
->newreg
)
7606 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
7608 validate_change (args
->insn
, loc
, args
->newreg
, 1);
7615 /* Change the mode of any reference to the register REGNO (NEWREG) to
7616 GET_MODE (NEWREG) in INSN. */
7619 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
7621 struct change_cc_mode_args args
;
7628 args
.newreg
= newreg
;
7630 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
7631 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
7633 /* If the following assertion was triggered, there is most probably
7634 something wrong with the cc_modes_compatible back end function.
7635 CC modes only can be considered compatible if the insn - with the mode
7636 replaced by any of the compatible modes - can still be recognized. */
7637 success
= apply_change_group ();
7638 gcc_assert (success
);
7641 /* Change the mode of any reference to the register REGNO (NEWREG) to
7642 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7643 any instruction which modifies NEWREG. */
7646 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7650 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7652 if (! INSN_P (insn
))
7655 if (reg_set_p (newreg
, insn
))
7658 cse_change_cc_mode_insn (insn
, newreg
);
7662 /* BB is a basic block which finishes with CC_REG as a condition code
7663 register which is set to CC_SRC. Look through the successors of BB
7664 to find blocks which have a single predecessor (i.e., this one),
7665 and look through those blocks for an assignment to CC_REG which is
7666 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7667 permitted to change the mode of CC_SRC to a compatible mode. This
7668 returns VOIDmode if no equivalent assignments were found.
7669 Otherwise it returns the mode which CC_SRC should wind up with.
7671 The main complexity in this function is handling the mode issues.
7672 We may have more than one duplicate which we can eliminate, and we
7673 try to find a mode which will work for multiple duplicates. */
7675 static enum machine_mode
7676 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7679 enum machine_mode mode
;
7680 unsigned int insn_count
;
7683 enum machine_mode modes
[2];
7689 /* We expect to have two successors. Look at both before picking
7690 the final mode for the comparison. If we have more successors
7691 (i.e., some sort of table jump, although that seems unlikely),
7692 then we require all beyond the first two to use the same
7695 found_equiv
= false;
7696 mode
= GET_MODE (cc_src
);
7698 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7703 if (e
->flags
& EDGE_COMPLEX
)
7706 if (EDGE_COUNT (e
->dest
->preds
) != 1
7707 || e
->dest
== EXIT_BLOCK_PTR
)
7710 end
= NEXT_INSN (BB_END (e
->dest
));
7711 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7715 if (! INSN_P (insn
))
7718 /* If CC_SRC is modified, we have to stop looking for
7719 something which uses it. */
7720 if (modified_in_p (cc_src
, insn
))
7723 /* Check whether INSN sets CC_REG to CC_SRC. */
7724 set
= single_set (insn
);
7726 && REG_P (SET_DEST (set
))
7727 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7730 enum machine_mode set_mode
;
7731 enum machine_mode comp_mode
;
7734 set_mode
= GET_MODE (SET_SRC (set
));
7735 comp_mode
= set_mode
;
7736 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7738 else if (GET_CODE (cc_src
) == COMPARE
7739 && GET_CODE (SET_SRC (set
)) == COMPARE
7741 && rtx_equal_p (XEXP (cc_src
, 0),
7742 XEXP (SET_SRC (set
), 0))
7743 && rtx_equal_p (XEXP (cc_src
, 1),
7744 XEXP (SET_SRC (set
), 1)))
7747 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7748 if (comp_mode
!= VOIDmode
7749 && (can_change_mode
|| comp_mode
== mode
))
7756 if (insn_count
< ARRAY_SIZE (insns
))
7758 insns
[insn_count
] = insn
;
7759 modes
[insn_count
] = set_mode
;
7760 last_insns
[insn_count
] = end
;
7763 if (mode
!= comp_mode
)
7765 gcc_assert (can_change_mode
);
7768 /* The modified insn will be re-recognized later. */
7769 PUT_MODE (cc_src
, mode
);
7774 if (set_mode
!= mode
)
7776 /* We found a matching expression in the
7777 wrong mode, but we don't have room to
7778 store it in the array. Punt. This case
7782 /* INSN sets CC_REG to a value equal to CC_SRC
7783 with the right mode. We can simply delete
7788 /* We found an instruction to delete. Keep looking,
7789 in the hopes of finding a three-way jump. */
7793 /* We found an instruction which sets the condition
7794 code, so don't look any farther. */
7798 /* If INSN sets CC_REG in some other way, don't look any
7800 if (reg_set_p (cc_reg
, insn
))
7804 /* If we fell off the bottom of the block, we can keep looking
7805 through successors. We pass CAN_CHANGE_MODE as false because
7806 we aren't prepared to handle compatibility between the
7807 further blocks and this block. */
7810 enum machine_mode submode
;
7812 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7813 if (submode
!= VOIDmode
)
7815 gcc_assert (submode
== mode
);
7817 can_change_mode
= false;
7825 /* Now INSN_COUNT is the number of instructions we found which set
7826 CC_REG to a value equivalent to CC_SRC. The instructions are in
7827 INSNS. The modes used by those instructions are in MODES. */
7830 for (i
= 0; i
< insn_count
; ++i
)
7832 if (modes
[i
] != mode
)
7834 /* We need to change the mode of CC_REG in INSNS[i] and
7835 subsequent instructions. */
7838 if (GET_MODE (cc_reg
) == mode
)
7841 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7843 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7847 delete_insn (insns
[i
]);
7853 /* If we have a fixed condition code register (or two), walk through
7854 the instructions and try to eliminate duplicate assignments. */
7857 cse_condition_code_reg (void)
7859 unsigned int cc_regno_1
;
7860 unsigned int cc_regno_2
;
7865 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7868 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7869 if (cc_regno_2
!= INVALID_REGNUM
)
7870 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7872 cc_reg_2
= NULL_RTX
;
7881 enum machine_mode mode
;
7882 enum machine_mode orig_mode
;
7884 /* Look for blocks which end with a conditional jump based on a
7885 condition code register. Then look for the instruction which
7886 sets the condition code register. Then look through the
7887 successor blocks for instructions which set the condition
7888 code register to the same value. There are other possible
7889 uses of the condition code register, but these are by far the
7890 most common and the ones which we are most likely to be able
7893 last_insn
= BB_END (bb
);
7894 if (!JUMP_P (last_insn
))
7897 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7899 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7904 cc_src_insn
= NULL_RTX
;
7906 for (insn
= PREV_INSN (last_insn
);
7907 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7908 insn
= PREV_INSN (insn
))
7912 if (! INSN_P (insn
))
7914 set
= single_set (insn
);
7916 && REG_P (SET_DEST (set
))
7917 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7920 cc_src
= SET_SRC (set
);
7923 else if (reg_set_p (cc_reg
, insn
))
7930 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7933 /* Now CC_REG is a condition code register used for a
7934 conditional jump at the end of the block, and CC_SRC, in
7935 CC_SRC_INSN, is the value to which that condition code
7936 register is set, and CC_SRC is still meaningful at the end of
7939 orig_mode
= GET_MODE (cc_src
);
7940 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7941 if (mode
!= VOIDmode
)
7943 gcc_assert (mode
== GET_MODE (cc_src
));
7944 if (mode
!= orig_mode
)
7946 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7948 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7950 /* Do the same in the following insns that use the
7951 current value of CC_REG within BB. */
7952 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7953 NEXT_INSN (last_insn
),
7961 /* Perform common subexpression elimination. Nonzero value from
7962 `cse_main' means that jumps were simplified and some code may now
7963 be unreachable, so do jump optimization again. */
7965 gate_handle_cse (void)
7967 return optimize
> 0;
7971 rest_of_handle_cse (void)
7976 dump_flow_info (dump_file
, dump_flags
);
7978 reg_scan (get_insns (), max_reg_num ());
7980 tem
= cse_main (get_insns (), max_reg_num ());
7982 rebuild_jump_labels (get_insns ());
7983 if (purge_all_dead_edges ())
7984 delete_unreachable_blocks ();
7986 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7988 /* If we are not running more CSE passes, then we are no longer
7989 expecting CSE to be run. But always rerun it in a cheap mode. */
7990 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7993 delete_dead_jumptables ();
7995 if (tem
|| optimize
> 1)
7996 cleanup_cfg (CLEANUP_EXPENSIVE
);
8000 struct tree_opt_pass pass_cse
=
8003 gate_handle_cse
, /* gate */
8004 rest_of_handle_cse
, /* execute */
8007 0, /* static_pass_number */
8009 0, /* properties_required */
8010 0, /* properties_provided */
8011 0, /* properties_destroyed */
8012 0, /* todo_flags_start */
8014 TODO_ggc_collect
, /* todo_flags_finish */
8020 gate_handle_cse2 (void)
8022 return optimize
> 0 && flag_rerun_cse_after_loop
;
8025 /* Run second CSE pass after loop optimizations. */
8027 rest_of_handle_cse2 (void)
8032 dump_flow_info (dump_file
, dump_flags
);
8034 tem
= cse_main (get_insns (), max_reg_num ());
8036 /* Run a pass to eliminate duplicated assignments to condition code
8037 registers. We have to run this after bypass_jumps, because it
8038 makes it harder for that pass to determine whether a jump can be
8040 cse_condition_code_reg ();
8042 purge_all_dead_edges ();
8043 delete_trivially_dead_insns (get_insns (), max_reg_num ());
8047 timevar_push (TV_JUMP
);
8048 rebuild_jump_labels (get_insns ());
8049 delete_dead_jumptables ();
8050 cleanup_cfg (CLEANUP_EXPENSIVE
);
8051 timevar_pop (TV_JUMP
);
8053 reg_scan (get_insns (), max_reg_num ());
8054 cse_not_expected
= 1;
8059 struct tree_opt_pass pass_cse2
=
8062 gate_handle_cse2
, /* gate */
8063 rest_of_handle_cse2
, /* execute */
8066 0, /* static_pass_number */
8067 TV_CSE2
, /* tv_id */
8068 0, /* properties_required */
8069 0, /* properties_provided */
8070 0, /* properties_destroyed */
8071 0, /* todo_flags_start */
8073 TODO_ggc_collect
, /* todo_flags_finish */