1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "c-family/c-common.h"
30 #include "target-def.h"
32 #include "c-family/c-pragma.h"
34 static bool ix86_pragma_target_parse (tree
, tree
);
35 static void ix86_target_macros_internal
36 (HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
37 void (*def_or_undef
) (cpp_reader
*, const char *));
40 /* Internal function to either define or undef the appropriate system
43 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
44 enum processor_type arch
,
45 enum processor_type tune
,
46 enum fpmath_unit fpmath
,
47 void (*def_or_undef
) (cpp_reader
*,
50 /* For some of the k6/pentium varients there weren't separate ISA bits to
51 identify which tune/arch flag was passed, so figure it out here. */
52 size_t arch_len
= strlen (ix86_arch_string
);
53 size_t tune_len
= strlen (ix86_tune_string
);
54 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
55 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
57 /* Built-ins based on -march=. */
63 def_or_undef (parse_in
, "__i486");
64 def_or_undef (parse_in
, "__i486__");
66 case PROCESSOR_PENTIUM
:
67 def_or_undef (parse_in
, "__i586");
68 def_or_undef (parse_in
, "__i586__");
69 def_or_undef (parse_in
, "__pentium");
70 def_or_undef (parse_in
, "__pentium__");
71 if (isa_flag
& OPTION_MASK_ISA_MMX
)
72 def_or_undef (parse_in
, "__pentium_mmx__");
74 case PROCESSOR_PENTIUMPRO
:
75 def_or_undef (parse_in
, "__i686");
76 def_or_undef (parse_in
, "__i686__");
77 def_or_undef (parse_in
, "__pentiumpro");
78 def_or_undef (parse_in
, "__pentiumpro__");
81 def_or_undef (parse_in
, "__geode");
82 def_or_undef (parse_in
, "__geode__");
85 def_or_undef (parse_in
, "__k6");
86 def_or_undef (parse_in
, "__k6__");
87 if (last_arch_char
== '2')
88 def_or_undef (parse_in
, "__k6_2__");
89 else if (last_arch_char
== '3')
90 def_or_undef (parse_in
, "__k6_3__");
91 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
92 def_or_undef (parse_in
, "__k6_3__");
94 case PROCESSOR_ATHLON
:
95 def_or_undef (parse_in
, "__athlon");
96 def_or_undef (parse_in
, "__athlon__");
97 if (isa_flag
& OPTION_MASK_ISA_SSE
)
98 def_or_undef (parse_in
, "__athlon_sse__");
101 def_or_undef (parse_in
, "__k8");
102 def_or_undef (parse_in
, "__k8__");
104 case PROCESSOR_AMDFAM10
:
105 def_or_undef (parse_in
, "__amdfam10");
106 def_or_undef (parse_in
, "__amdfam10__");
108 case PROCESSOR_BDVER1
:
109 def_or_undef (parse_in
, "__bdver1");
110 def_or_undef (parse_in
, "__bdver1__");
112 case PROCESSOR_BDVER2
:
113 def_or_undef (parse_in
, "__bdver2");
114 def_or_undef (parse_in
, "__bdver2__");
116 case PROCESSOR_BDVER3
:
117 def_or_undef (parse_in
, "__bdver3");
118 def_or_undef (parse_in
, "__bdver3__");
120 case PROCESSOR_BTVER1
:
121 def_or_undef (parse_in
, "__btver1");
122 def_or_undef (parse_in
, "__btver1__");
124 case PROCESSOR_BTVER2
:
125 def_or_undef (parse_in
, "__btver2");
126 def_or_undef (parse_in
, "__btver2__");
128 case PROCESSOR_PENTIUM4
:
129 def_or_undef (parse_in
, "__pentium4");
130 def_or_undef (parse_in
, "__pentium4__");
132 case PROCESSOR_NOCONA
:
133 def_or_undef (parse_in
, "__nocona");
134 def_or_undef (parse_in
, "__nocona__");
136 case PROCESSOR_CORE2
:
137 def_or_undef (parse_in
, "__core2");
138 def_or_undef (parse_in
, "__core2__");
140 case PROCESSOR_COREI7
:
141 def_or_undef (parse_in
, "__corei7");
142 def_or_undef (parse_in
, "__corei7__");
144 case PROCESSOR_HASWELL
:
145 def_or_undef (parse_in
, "__core_avx2");
146 def_or_undef (parse_in
, "__core_avx2__");
149 def_or_undef (parse_in
, "__atom");
150 def_or_undef (parse_in
, "__atom__");
153 def_or_undef (parse_in
, "__slm");
154 def_or_undef (parse_in
, "__slm__");
156 /* use PROCESSOR_max to not set/unset the arch macro. */
159 case PROCESSOR_GENERIC32
:
160 case PROCESSOR_GENERIC64
:
164 /* Built-ins based on -mtune=. */
168 def_or_undef (parse_in
, "__tune_i386__");
171 def_or_undef (parse_in
, "__tune_i486__");
173 case PROCESSOR_PENTIUM
:
174 def_or_undef (parse_in
, "__tune_i586__");
175 def_or_undef (parse_in
, "__tune_pentium__");
176 if (last_tune_char
== 'x')
177 def_or_undef (parse_in
, "__tune_pentium_mmx__");
179 case PROCESSOR_PENTIUMPRO
:
180 def_or_undef (parse_in
, "__tune_i686__");
181 def_or_undef (parse_in
, "__tune_pentiumpro__");
182 switch (last_tune_char
)
185 def_or_undef (parse_in
, "__tune_pentium3__");
188 def_or_undef (parse_in
, "__tune_pentium2__");
192 case PROCESSOR_GEODE
:
193 def_or_undef (parse_in
, "__tune_geode__");
196 def_or_undef (parse_in
, "__tune_k6__");
197 if (last_tune_char
== '2')
198 def_or_undef (parse_in
, "__tune_k6_2__");
199 else if (last_tune_char
== '3')
200 def_or_undef (parse_in
, "__tune_k6_3__");
201 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
202 def_or_undef (parse_in
, "__tune_k6_3__");
204 case PROCESSOR_ATHLON
:
205 def_or_undef (parse_in
, "__tune_athlon__");
206 if (isa_flag
& OPTION_MASK_ISA_SSE
)
207 def_or_undef (parse_in
, "__tune_athlon_sse__");
210 def_or_undef (parse_in
, "__tune_k8__");
212 case PROCESSOR_AMDFAM10
:
213 def_or_undef (parse_in
, "__tune_amdfam10__");
215 case PROCESSOR_BDVER1
:
216 def_or_undef (parse_in
, "__tune_bdver1__");
218 case PROCESSOR_BDVER2
:
219 def_or_undef (parse_in
, "__tune_bdver2__");
221 case PROCESSOR_BDVER3
:
222 def_or_undef (parse_in
, "__tune_bdver3__");
224 case PROCESSOR_BTVER1
:
225 def_or_undef (parse_in
, "__tune_btver1__");
227 case PROCESSOR_BTVER2
:
228 def_or_undef (parse_in
, "__tune_btver2__");
230 case PROCESSOR_PENTIUM4
:
231 def_or_undef (parse_in
, "__tune_pentium4__");
233 case PROCESSOR_NOCONA
:
234 def_or_undef (parse_in
, "__tune_nocona__");
236 case PROCESSOR_CORE2
:
237 def_or_undef (parse_in
, "__tune_core2__");
239 case PROCESSOR_COREI7
:
240 def_or_undef (parse_in
, "__tune_corei7__");
242 case PROCESSOR_HASWELL
:
243 def_or_undef (parse_in
, "__tune_core_avx2__");
246 def_or_undef (parse_in
, "__tune_atom__");
249 def_or_undef (parse_in
, "__tune_slm__");
251 case PROCESSOR_GENERIC32
:
252 case PROCESSOR_GENERIC64
:
254 /* use PROCESSOR_max to not set/unset the tune macro. */
263 def_or_undef (parse_in
, "__code_model_small__");
267 def_or_undef (parse_in
, "__code_model_medium__");
271 def_or_undef (parse_in
, "__code_model_large__");
274 def_or_undef (parse_in
, "__code_model_32__");
277 def_or_undef (parse_in
, "__code_model_kernel__");
283 if (isa_flag
& OPTION_MASK_ISA_MMX
)
284 def_or_undef (parse_in
, "__MMX__");
285 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
286 def_or_undef (parse_in
, "__3dNOW__");
287 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
288 def_or_undef (parse_in
, "__3dNOW_A__");
289 if (isa_flag
& OPTION_MASK_ISA_SSE
)
290 def_or_undef (parse_in
, "__SSE__");
291 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
292 def_or_undef (parse_in
, "__SSE2__");
293 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
294 def_or_undef (parse_in
, "__SSE3__");
295 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
296 def_or_undef (parse_in
, "__SSSE3__");
297 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
298 def_or_undef (parse_in
, "__SSE4_1__");
299 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
300 def_or_undef (parse_in
, "__SSE4_2__");
301 if (isa_flag
& OPTION_MASK_ISA_AES
)
302 def_or_undef (parse_in
, "__AES__");
303 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
304 def_or_undef (parse_in
, "__PCLMUL__");
305 if (isa_flag
& OPTION_MASK_ISA_AVX
)
306 def_or_undef (parse_in
, "__AVX__");
307 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
308 def_or_undef (parse_in
, "__AVX2__");
309 if (isa_flag
& OPTION_MASK_ISA_FMA
)
310 def_or_undef (parse_in
, "__FMA__");
311 if (isa_flag
& OPTION_MASK_ISA_RTM
)
312 def_or_undef (parse_in
, "__RTM__");
313 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
314 def_or_undef (parse_in
, "__SSE4A__");
315 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
316 def_or_undef (parse_in
, "__FMA4__");
317 if (isa_flag
& OPTION_MASK_ISA_XOP
)
318 def_or_undef (parse_in
, "__XOP__");
319 if (isa_flag
& OPTION_MASK_ISA_LWP
)
320 def_or_undef (parse_in
, "__LWP__");
321 if (isa_flag
& OPTION_MASK_ISA_ABM
)
322 def_or_undef (parse_in
, "__ABM__");
323 if (isa_flag
& OPTION_MASK_ISA_BMI
)
324 def_or_undef (parse_in
, "__BMI__");
325 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
326 def_or_undef (parse_in
, "__BMI2__");
327 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
328 def_or_undef (parse_in
, "__LZCNT__");
329 if (isa_flag
& OPTION_MASK_ISA_TBM
)
330 def_or_undef (parse_in
, "__TBM__");
331 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
332 def_or_undef (parse_in
, "__POPCNT__");
333 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
334 def_or_undef (parse_in
, "__FSGSBASE__");
335 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
336 def_or_undef (parse_in
, "__RDRND__");
337 if (isa_flag
& OPTION_MASK_ISA_F16C
)
338 def_or_undef (parse_in
, "__F16C__");
339 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
340 def_or_undef (parse_in
, "__RDSEED__");
341 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
342 def_or_undef (parse_in
, "__PRFCHW__");
343 if (isa_flag
& OPTION_MASK_ISA_ADX
)
344 def_or_undef (parse_in
, "__ADX__");
345 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
346 def_or_undef (parse_in
, "__FXSR__");
347 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
348 def_or_undef (parse_in
, "__XSAVE__");
349 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
350 def_or_undef (parse_in
, "__XSAVEOPT__");
351 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
352 def_or_undef (parse_in
, "__SSE_MATH__");
353 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
354 def_or_undef (parse_in
, "__SSE2_MATH__");
358 /* Hook to validate the current #pragma GCC target and set the state, and
359 update the macros based on what was changed. If ARGS is NULL, then
360 POP_TARGET is used to reset the options. */
363 ix86_pragma_target_parse (tree args
, tree pop_target
)
365 tree prev_tree
= build_target_option_node ();
367 struct cl_target_option
*prev_opt
;
368 struct cl_target_option
*cur_opt
;
369 HOST_WIDE_INT prev_isa
;
370 HOST_WIDE_INT cur_isa
;
371 HOST_WIDE_INT diff_isa
;
372 enum processor_type prev_arch
;
373 enum processor_type prev_tune
;
374 enum processor_type cur_arch
;
375 enum processor_type cur_tune
;
379 cur_tree
= (pop_target
? pop_target
: target_option_default_node
);
380 cl_target_option_restore (&global_options
,
381 TREE_TARGET_OPTION (cur_tree
));
385 cur_tree
= ix86_valid_target_attribute_tree (args
);
386 if (!cur_tree
|| cur_tree
== error_mark_node
)
388 cl_target_option_restore (&global_options
,
389 TREE_TARGET_OPTION (prev_tree
));
394 target_option_current_node
= cur_tree
;
395 ix86_reset_previous_fndecl ();
397 /* Figure out the previous/current isa, arch, tune and the differences. */
398 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
399 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
400 prev_isa
= prev_opt
->x_ix86_isa_flags
;
401 cur_isa
= cur_opt
->x_ix86_isa_flags
;
402 diff_isa
= (prev_isa
^ cur_isa
);
403 prev_arch
= (enum processor_type
) prev_opt
->arch
;
404 prev_tune
= (enum processor_type
) prev_opt
->tune
;
405 cur_arch
= (enum processor_type
) cur_opt
->arch
;
406 cur_tune
= (enum processor_type
) cur_opt
->tune
;
408 /* If the same processor is used for both previous and current options, don't
409 change the macros. */
410 if (cur_arch
== prev_arch
)
411 cur_arch
= prev_arch
= PROCESSOR_max
;
413 if (cur_tune
== prev_tune
)
414 cur_tune
= prev_tune
= PROCESSOR_max
;
416 /* Undef all of the macros for that are no longer current. */
417 ix86_target_macros_internal (prev_isa
& diff_isa
,
420 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
423 /* Define all of the macros for new options that were just turned on. */
424 ix86_target_macros_internal (cur_isa
& diff_isa
,
427 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
433 /* Function to tell the preprocessor about the defines for the current target. */
436 ix86_target_macros (void)
438 /* 32/64-bit won't change with target specific options, so do the assert and
439 builtin_define_std calls here. */
442 cpp_assert (parse_in
, "cpu=x86_64");
443 cpp_assert (parse_in
, "machine=x86_64");
444 cpp_define (parse_in
, "__amd64");
445 cpp_define (parse_in
, "__amd64__");
446 cpp_define (parse_in
, "__x86_64");
447 cpp_define (parse_in
, "__x86_64__");
450 cpp_define (parse_in
, "_ILP32");
451 cpp_define (parse_in
, "__ILP32__");
456 cpp_assert (parse_in
, "cpu=i386");
457 cpp_assert (parse_in
, "machine=i386");
458 builtin_define_std ("i386");
461 if (TARGET_LONG_DOUBLE_64
)
462 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
464 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
465 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
467 ix86_target_macros_internal (ix86_isa_flags
,
475 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
476 option here rather than in i386.c since it will pull in various preprocessor
477 functions, and those are not present in languages like fortran without a
481 ix86_register_pragmas (void)
483 /* Update pragma hook to allow parsing #pragma GCC target. */
484 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
486 #ifdef REGISTER_SUBTARGET_PRAGMAS
487 REGISTER_SUBTARGET_PRAGMAS ();