2012-11-28 Oleg Raikhman <oleg@adapteva.com>
[official-gcc.git] / gcc / ira-int.h
blob69db4411b478d294114440d0f22f70de2a55ba4d
1 /* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006, 2007, 2008, 2009, 2010
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "cfgloop.h"
23 #include "ira.h"
24 #include "alloc-pool.h"
26 /* To provide consistency in naming, all IRA external variables,
27 functions, common typedefs start with prefix ira_. */
29 #ifdef ENABLE_CHECKING
30 #define ENABLE_IRA_CHECKING
31 #endif
33 #ifdef ENABLE_IRA_CHECKING
34 #define ira_assert(c) gcc_assert (c)
35 #else
36 /* Always define and include C, so that warnings for empty body in an
37 ‘if’ statement and unused variable do not occur. */
38 #define ira_assert(c) ((void)(0 && (c)))
39 #endif
41 /* Compute register frequency from edge frequency FREQ. It is
42 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
43 profile driven feedback is available and the function is never
44 executed, frequency is always equivalent. Otherwise rescale the
45 edge frequency. */
46 #define REG_FREQ_FROM_EDGE_FREQ(freq) \
47 (optimize_size || (flag_branch_probabilities && !ENTRY_BLOCK_PTR->count) \
48 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
49 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51 /* All natural loops. */
52 extern struct loops ira_loops;
54 /* A modified value of flag `-fira-verbose' used internally. */
55 extern int internal_flag_ira_verbose;
57 /* Dump file of the allocator if it is not NULL. */
58 extern FILE *ira_dump_file;
60 /* Typedefs for pointers to allocno live range, allocno, and copy of
61 allocnos. */
62 typedef struct live_range *live_range_t;
63 typedef struct ira_allocno *ira_allocno_t;
64 typedef struct ira_allocno_copy *ira_copy_t;
65 typedef struct ira_object *ira_object_t;
67 /* Definition of vector of allocnos and copies. */
69 /* Typedef for pointer to the subsequent structure. */
70 typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
72 typedef unsigned short move_table[N_REG_CLASSES];
74 /* In general case, IRA is a regional allocator. The regions are
75 nested and form a tree. Currently regions are natural loops. The
76 following structure describes loop tree node (representing basic
77 block or loop). We need such tree because the loop tree from
78 cfgloop.h is not convenient for the optimization: basic blocks are
79 not a part of the tree from cfgloop.h. We also use the nodes for
80 storing additional information about basic blocks/loops for the
81 register allocation purposes. */
82 struct ira_loop_tree_node
84 /* The node represents basic block if children == NULL. */
85 basic_block bb; /* NULL for loop. */
86 /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
87 struct loop *loop;
88 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
89 SUBLOOP_NEXT is always NULL for BBs. */
90 ira_loop_tree_node_t subloop_next, next;
91 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
92 the node. They are NULL for BBs. */
93 ira_loop_tree_node_t subloops, children;
94 /* The node immediately containing given node. */
95 ira_loop_tree_node_t parent;
97 /* Loop level in range [0, ira_loop_tree_height). */
98 int level;
100 /* All the following members are defined only for nodes representing
101 loops. */
103 /* The loop number from CFG loop tree. The root number is 0. */
104 int loop_num;
106 /* True if the loop was marked for removal from the register
107 allocation. */
108 bool to_remove_p;
110 /* Allocnos in the loop corresponding to their regnos. If it is
111 NULL the loop does not form a separate register allocation region
112 (e.g. because it has abnormal enter/exit edges and we can not put
113 code for register shuffling on the edges if a different
114 allocation is used for a pseudo-register on different sides of
115 the edges). Caps are not in the map (remember we can have more
116 one cap with the same regno in a region). */
117 ira_allocno_t *regno_allocno_map;
119 /* True if there is an entry to given loop not from its parent (or
120 grandparent) basic block. For example, it is possible for two
121 adjacent loops inside another loop. */
122 bool entered_from_non_parent_p;
124 /* Maximal register pressure inside loop for given register class
125 (defined only for the pressure classes). */
126 int reg_pressure[N_REG_CLASSES];
128 /* Numbers of allocnos referred or living in the loop node (except
129 for its subloops). */
130 bitmap all_allocnos;
132 /* Numbers of allocnos living at the loop borders. */
133 bitmap border_allocnos;
135 /* Regnos of pseudos modified in the loop node (including its
136 subloops). */
137 bitmap modified_regnos;
139 /* Numbers of copies referred in the corresponding loop. */
140 bitmap local_copies;
143 /* The root of the loop tree corresponding to the all function. */
144 extern ira_loop_tree_node_t ira_loop_tree_root;
146 /* Height of the loop tree. */
147 extern int ira_loop_tree_height;
149 /* All nodes representing basic blocks are referred through the
150 following array. We can not use basic block member `aux' for this
151 because it is used for insertion of insns on edges. */
152 extern ira_loop_tree_node_t ira_bb_nodes;
154 /* Two access macros to the nodes representing basic blocks. */
155 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
156 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
157 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
158 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
160 fprintf (stderr, \
161 "\n%s: %d: error in %s: it is not a block node\n", \
162 __FILE__, __LINE__, __FUNCTION__); \
163 gcc_unreachable (); \
165 _node; }))
166 #else
167 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
168 #endif
170 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
172 /* All nodes representing loops are referred through the following
173 array. */
174 extern ira_loop_tree_node_t ira_loop_nodes;
176 /* Two access macros to the nodes representing loops. */
177 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
178 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
179 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
180 if (_node->children == NULL || _node->bb != NULL \
181 || (_node->loop == NULL && current_loops != NULL)) \
183 fprintf (stderr, \
184 "\n%s: %d: error in %s: it is not a loop node\n", \
185 __FILE__, __LINE__, __FUNCTION__); \
186 gcc_unreachable (); \
188 _node; }))
189 #else
190 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
191 #endif
193 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
196 /* The structure describes program points where a given allocno lives.
197 If the live ranges of two allocnos are intersected, the allocnos
198 are in conflict. */
199 struct live_range
201 /* Object whose live range is described by given structure. */
202 ira_object_t object;
203 /* Program point range. */
204 int start, finish;
205 /* Next structure describing program points where the allocno
206 lives. */
207 live_range_t next;
208 /* Pointer to structures with the same start/finish. */
209 live_range_t start_next, finish_next;
212 /* Program points are enumerated by numbers from range
213 0..IRA_MAX_POINT-1. There are approximately two times more program
214 points than insns. Program points are places in the program where
215 liveness info can be changed. In most general case (there are more
216 complicated cases too) some program points correspond to places
217 where input operand dies and other ones correspond to places where
218 output operands are born. */
219 extern int ira_max_point;
221 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
222 live ranges with given start/finish point. */
223 extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
225 /* A structure representing conflict information for an allocno
226 (or one of its subwords). */
227 struct ira_object
229 /* The allocno associated with this record. */
230 ira_allocno_t allocno;
231 /* Vector of accumulated conflicting conflict_redords with NULL end
232 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
233 otherwise. */
234 void *conflicts_array;
235 /* Pointer to structures describing at what program point the
236 object lives. We always maintain the list in such way that *the
237 ranges in the list are not intersected and ordered by decreasing
238 their program points*. */
239 live_range_t live_ranges;
240 /* The subword within ALLOCNO which is represented by this object.
241 Zero means the lowest-order subword (or the entire allocno in case
242 it is not being tracked in subwords). */
243 int subword;
244 /* Allocated size of the conflicts array. */
245 unsigned int conflicts_array_size;
246 /* A unique number for every instance of this structure, which is used
247 to represent it in conflict bit vectors. */
248 int id;
249 /* Before building conflicts, MIN and MAX are initialized to
250 correspondingly minimal and maximal points of the accumulated
251 live ranges. Afterwards, they hold the minimal and maximal ids
252 of other ira_objects that this one can conflict with. */
253 int min, max;
254 /* Initial and accumulated hard registers conflicting with this
255 object and as a consequences can not be assigned to the allocno.
256 All non-allocatable hard regs and hard regs of register classes
257 different from given allocno one are included in the sets. */
258 HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
259 /* Number of accumulated conflicts in the vector of conflicting
260 objects. */
261 int num_accumulated_conflicts;
262 /* TRUE if conflicts are represented by a vector of pointers to
263 ira_object structures. Otherwise, we use a bit vector indexed
264 by conflict ID numbers. */
265 unsigned int conflict_vec_p : 1;
268 /* A structure representing an allocno (allocation entity). Allocno
269 represents a pseudo-register in an allocation region. If
270 pseudo-register does not live in a region but it lives in the
271 nested regions, it is represented in the region by special allocno
272 called *cap*. There may be more one cap representing the same
273 pseudo-register in region. It means that the corresponding
274 pseudo-register lives in more one non-intersected subregion. */
275 struct ira_allocno
277 /* The allocno order number starting with 0. Each allocno has an
278 unique number and the number is never changed for the
279 allocno. */
280 int num;
281 /* Regno for allocno or cap. */
282 int regno;
283 /* Mode of the allocno which is the mode of the corresponding
284 pseudo-register. */
285 ENUM_BITFIELD (machine_mode) mode : 8;
286 /* Register class which should be used for allocation for given
287 allocno. NO_REGS means that we should use memory. */
288 ENUM_BITFIELD (reg_class) aclass : 16;
289 /* During the reload, value TRUE means that we should not reassign a
290 hard register to the allocno got memory earlier. It is set up
291 when we removed memory-memory move insn before each iteration of
292 the reload. */
293 unsigned int dont_reassign_p : 1;
294 #ifdef STACK_REGS
295 /* Set to TRUE if allocno can't be assigned to the stack hard
296 register correspondingly in this region and area including the
297 region and all its subregions recursively. */
298 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
299 #endif
300 /* TRUE value means that there is no sense to spill the allocno
301 during coloring because the spill will result in additional
302 reloads in reload pass. */
303 unsigned int bad_spill_p : 1;
304 /* TRUE if a hard register or memory has been assigned to the
305 allocno. */
306 unsigned int assigned_p : 1;
307 /* TRUE if conflicts for given allocno are represented by vector of
308 pointers to the conflicting allocnos. Otherwise, we use a bit
309 vector where a bit with given index represents allocno with the
310 same number. */
311 unsigned int conflict_vec_p : 1;
312 /* Hard register assigned to given allocno. Negative value means
313 that memory was allocated to the allocno. During the reload,
314 spilled allocno has value equal to the corresponding stack slot
315 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
316 reload (at this point pseudo-register has only one allocno) which
317 did not get stack slot yet. */
318 short int hard_regno;
319 /* Allocnos with the same regno are linked by the following member.
320 Allocnos corresponding to inner loops are first in the list (it
321 corresponds to depth-first traverse of the loops). */
322 ira_allocno_t next_regno_allocno;
323 /* There may be different allocnos with the same regno in different
324 regions. Allocnos are bound to the corresponding loop tree node.
325 Pseudo-register may have only one regular allocno with given loop
326 tree node but more than one cap (see comments above). */
327 ira_loop_tree_node_t loop_tree_node;
328 /* Accumulated usage references of the allocno. Here and below,
329 word 'accumulated' means info for given region and all nested
330 subregions. In this case, 'accumulated' means sum of references
331 of the corresponding pseudo-register in this region and in all
332 nested subregions recursively. */
333 int nrefs;
334 /* Accumulated frequency of usage of the allocno. */
335 int freq;
336 /* Minimal accumulated and updated costs of usage register of the
337 allocno class. */
338 int class_cost, updated_class_cost;
339 /* Minimal accumulated, and updated costs of memory for the allocno.
340 At the allocation start, the original and updated costs are
341 equal. The updated cost may be changed after finishing
342 allocation in a region and starting allocation in a subregion.
343 The change reflects the cost of spill/restore code on the
344 subregion border if we assign memory to the pseudo in the
345 subregion. */
346 int memory_cost, updated_memory_cost;
347 /* Accumulated number of points where the allocno lives and there is
348 excess pressure for its class. Excess pressure for a register
349 class at some point means that there are more allocnos of given
350 register class living at the point than number of hard-registers
351 of the class available for the allocation. */
352 int excess_pressure_points_num;
353 /* Copies to other non-conflicting allocnos. The copies can
354 represent move insn or potential move insn usually because of two
355 operand insn constraints. */
356 ira_copy_t allocno_copies;
357 /* It is a allocno (cap) representing given allocno on upper loop tree
358 level. */
359 ira_allocno_t cap;
360 /* It is a link to allocno (cap) on lower loop level represented by
361 given cap. Null if given allocno is not a cap. */
362 ira_allocno_t cap_member;
363 /* The number of objects tracked in the following array. */
364 int num_objects;
365 /* An array of structures describing conflict information and live
366 ranges for each object associated with the allocno. There may be
367 more than one such object in cases where the allocno represents a
368 multi-word register. */
369 ira_object_t objects[2];
370 /* Accumulated frequency of calls which given allocno
371 intersects. */
372 int call_freq;
373 /* Accumulated number of the intersected calls. */
374 int calls_crossed_num;
375 /* The number of calls across which it is live, but which should not
376 affect register preferences. */
377 int cheap_calls_crossed_num;
378 /* Array of usage costs (accumulated and the one updated during
379 coloring) for each hard register of the allocno class. The
380 member value can be NULL if all costs are the same and equal to
381 CLASS_COST. For example, the costs of two different hard
382 registers can be different if one hard register is callee-saved
383 and another one is callee-used and the allocno lives through
384 calls. Another example can be case when for some insn the
385 corresponding pseudo-register value should be put in specific
386 register class (e.g. AREG for x86) which is a strict subset of
387 the allocno class (GENERAL_REGS for x86). We have updated costs
388 to reflect the situation when the usage cost of a hard register
389 is decreased because the allocno is connected to another allocno
390 by a copy and the another allocno has been assigned to the hard
391 register. */
392 int *hard_reg_costs, *updated_hard_reg_costs;
393 /* Array of decreasing costs (accumulated and the one updated during
394 coloring) for allocnos conflicting with given allocno for hard
395 regno of the allocno class. The member value can be NULL if all
396 costs are the same. These costs are used to reflect preferences
397 of other allocnos not assigned yet during assigning to given
398 allocno. */
399 int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
400 /* Different additional data. It is used to decrease size of
401 allocno data footprint. */
402 void *add_data;
406 /* All members of the allocno structures should be accessed only
407 through the following macros. */
408 #define ALLOCNO_NUM(A) ((A)->num)
409 #define ALLOCNO_REGNO(A) ((A)->regno)
410 #define ALLOCNO_REG(A) ((A)->reg)
411 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
412 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
413 #define ALLOCNO_CAP(A) ((A)->cap)
414 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
415 #define ALLOCNO_NREFS(A) ((A)->nrefs)
416 #define ALLOCNO_FREQ(A) ((A)->freq)
417 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
418 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
419 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
420 #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
421 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
422 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
423 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
424 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
425 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
426 #ifdef STACK_REGS
427 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
428 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
429 #endif
430 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
431 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
432 #define ALLOCNO_MODE(A) ((A)->mode)
433 #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
434 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
435 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
436 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
437 ((A)->conflict_hard_reg_costs)
438 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
439 ((A)->updated_conflict_hard_reg_costs)
440 #define ALLOCNO_CLASS(A) ((A)->aclass)
441 #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
442 #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
443 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
444 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
445 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
446 ((A)->excess_pressure_points_num)
447 #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
448 #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
449 #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
451 /* Typedef for pointer to the subsequent structure. */
452 typedef struct ira_emit_data *ira_emit_data_t;
454 /* Allocno bound data used for emit pseudo live range split insns and
455 to flattening IR. */
456 struct ira_emit_data
458 /* TRUE if the allocno assigned to memory was a destination of
459 removed move (see ira-emit.c) at loop exit because the value of
460 the corresponding pseudo-register is not changed inside the
461 loop. */
462 unsigned int mem_optimized_dest_p : 1;
463 /* TRUE if the corresponding pseudo-register has disjoint live
464 ranges and the other allocnos of the pseudo-register except this
465 one changed REG. */
466 unsigned int somewhere_renamed_p : 1;
467 /* TRUE if allocno with the same REGNO in a subregion has been
468 renamed, in other words, got a new pseudo-register. */
469 unsigned int child_renamed_p : 1;
470 /* Final rtx representation of the allocno. */
471 rtx reg;
472 /* Non NULL if we remove restoring value from given allocno to
473 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the
474 allocno value is not changed inside the loop. */
475 ira_allocno_t mem_optimized_dest;
478 #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
480 /* Data used to emit live range split insns and to flattening IR. */
481 extern ira_emit_data_t ira_allocno_emit_data;
483 /* Abbreviation for frequent emit data access. */
484 static inline rtx
485 allocno_emit_reg (ira_allocno_t a)
487 return ALLOCNO_EMIT_DATA (a)->reg;
490 #define OBJECT_ALLOCNO(O) ((O)->allocno)
491 #define OBJECT_SUBWORD(O) ((O)->subword)
492 #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
493 #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
494 #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
495 #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
496 #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
497 #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
498 #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
499 #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
500 #define OBJECT_MIN(O) ((O)->min)
501 #define OBJECT_MAX(O) ((O)->max)
502 #define OBJECT_CONFLICT_ID(O) ((O)->id)
503 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
505 /* Map regno -> allocnos with given regno (see comments for
506 allocno member `next_regno_allocno'). */
507 extern ira_allocno_t *ira_regno_allocno_map;
509 /* Array of references to all allocnos. The order number of the
510 allocno corresponds to the index in the array. Removed allocnos
511 have NULL element value. */
512 extern ira_allocno_t *ira_allocnos;
514 /* The size of the previous array. */
515 extern int ira_allocnos_num;
517 /* Map a conflict id to its corresponding ira_object structure. */
518 extern ira_object_t *ira_object_id_map;
520 /* The size of the previous array. */
521 extern int ira_objects_num;
523 /* The following structure represents a copy of two allocnos. The
524 copies represent move insns or potential move insns usually because
525 of two operand insn constraints. To remove register shuffle, we
526 also create copies between allocno which is output of an insn and
527 allocno becoming dead in the insn. */
528 struct ira_allocno_copy
530 /* The unique order number of the copy node starting with 0. */
531 int num;
532 /* Allocnos connected by the copy. The first allocno should have
533 smaller order number than the second one. */
534 ira_allocno_t first, second;
535 /* Execution frequency of the copy. */
536 int freq;
537 bool constraint_p;
538 /* It is a move insn which is an origin of the copy. The member
539 value for the copy representing two operand insn constraints or
540 for the copy created to remove register shuffle is NULL. In last
541 case the copy frequency is smaller than the corresponding insn
542 execution frequency. */
543 rtx insn;
544 /* All copies with the same allocno as FIRST are linked by the two
545 following members. */
546 ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
547 /* All copies with the same allocno as SECOND are linked by the two
548 following members. */
549 ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
550 /* Region from which given copy is originated. */
551 ira_loop_tree_node_t loop_tree_node;
554 /* Array of references to all copies. The order number of the copy
555 corresponds to the index in the array. Removed copies have NULL
556 element value. */
557 extern ira_copy_t *ira_copies;
559 /* Size of the previous array. */
560 extern int ira_copies_num;
562 /* The following structure describes a stack slot used for spilled
563 pseudo-registers. */
564 struct ira_spilled_reg_stack_slot
566 /* pseudo-registers assigned to the stack slot. */
567 bitmap_head spilled_regs;
568 /* RTL representation of the stack slot. */
569 rtx mem;
570 /* Size of the stack slot. */
571 unsigned int width;
574 /* The number of elements in the following array. */
575 extern int ira_spilled_reg_stack_slots_num;
577 /* The following array contains info about spilled pseudo-registers
578 stack slots used in current function so far. */
579 extern struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
581 /* Correspondingly overall cost of the allocation, cost of the
582 allocnos assigned to hard-registers, cost of the allocnos assigned
583 to memory, cost of loads, stores and register move insns generated
584 for pseudo-register live range splitting (see ira-emit.c). */
585 extern int ira_overall_cost;
586 extern int ira_reg_cost, ira_mem_cost;
587 extern int ira_load_cost, ira_store_cost, ira_shuffle_cost;
588 extern int ira_move_loops_num, ira_additional_jumps_num;
591 /* This page contains a bitset implementation called 'min/max sets' used to
592 record conflicts in IRA.
593 They are named min/maxs set since we keep track of a minimum and a maximum
594 bit number for each set representing the bounds of valid elements. Otherwise,
595 the implementation resembles sbitmaps in that we store an array of integers
596 whose bits directly represent the members of the set. */
598 /* The type used as elements in the array, and the number of bits in
599 this type. */
601 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
602 #define IRA_INT_TYPE HOST_WIDE_INT
604 /* Set, clear or test bit number I in R, a bit vector of elements with
605 minimal index and maximal index equal correspondingly to MIN and
606 MAX. */
607 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
609 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
610 (({ int _min = (MIN), _max = (MAX), _i = (I); \
611 if (_i < _min || _i > _max) \
613 fprintf (stderr, \
614 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
615 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
616 gcc_unreachable (); \
618 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
619 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
622 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
623 (({ int _min = (MIN), _max = (MAX), _i = (I); \
624 if (_i < _min || _i > _max) \
626 fprintf (stderr, \
627 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
628 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
629 gcc_unreachable (); \
631 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
632 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
634 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
635 (({ int _min = (MIN), _max = (MAX), _i = (I); \
636 if (_i < _min || _i > _max) \
638 fprintf (stderr, \
639 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
640 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
641 gcc_unreachable (); \
643 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
644 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
646 #else
648 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
649 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
650 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
652 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
653 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
654 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
656 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
657 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
658 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
660 #endif
662 /* The iterator for min/max sets. */
663 typedef struct {
665 /* Array containing the bit vector. */
666 IRA_INT_TYPE *vec;
668 /* The number of the current element in the vector. */
669 unsigned int word_num;
671 /* The number of bits in the bit vector. */
672 unsigned int nel;
674 /* The current bit index of the bit vector. */
675 unsigned int bit_num;
677 /* Index corresponding to the 1st bit of the bit vector. */
678 int start_val;
680 /* The word of the bit vector currently visited. */
681 unsigned IRA_INT_TYPE word;
682 } minmax_set_iterator;
684 /* Initialize the iterator I for bit vector VEC containing minimal and
685 maximal values MIN and MAX. */
686 static inline void
687 minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min,
688 int max)
690 i->vec = vec;
691 i->word_num = 0;
692 i->nel = max < min ? 0 : max - min + 1;
693 i->start_val = min;
694 i->bit_num = 0;
695 i->word = i->nel == 0 ? 0 : vec[0];
698 /* Return TRUE if we have more allocnos to visit, in which case *N is
699 set to the number of the element to be visited. Otherwise, return
700 FALSE. */
701 static inline bool
702 minmax_set_iter_cond (minmax_set_iterator *i, int *n)
704 /* Skip words that are zeros. */
705 for (; i->word == 0; i->word = i->vec[i->word_num])
707 i->word_num++;
708 i->bit_num = i->word_num * IRA_INT_BITS;
710 /* If we have reached the end, break. */
711 if (i->bit_num >= i->nel)
712 return false;
715 /* Skip bits that are zero. */
716 for (; (i->word & 1) == 0; i->word >>= 1)
717 i->bit_num++;
719 *n = (int) i->bit_num + i->start_val;
721 return true;
724 /* Advance to the next element in the set. */
725 static inline void
726 minmax_set_iter_next (minmax_set_iterator *i)
728 i->word >>= 1;
729 i->bit_num++;
732 /* Loop over all elements of a min/max set given by bit vector VEC and
733 their minimal and maximal values MIN and MAX. In each iteration, N
734 is set to the number of next allocno. ITER is an instance of
735 minmax_set_iterator used to iterate over the set. */
736 #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
737 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
738 minmax_set_iter_cond (&(ITER), &(N)); \
739 minmax_set_iter_next (&(ITER)))
741 struct target_ira_int {
742 /* Initialized once. It is a maximal possible size of the allocated
743 struct costs. */
744 int x_max_struct_costs_size;
746 /* Allocated and initialized once, and used to initialize cost values
747 for each insn. */
748 struct costs *x_init_cost;
750 /* Allocated once, and used for temporary purposes. */
751 struct costs *x_temp_costs;
753 /* Allocated once, and used for the cost calculation. */
754 struct costs *x_op_costs[MAX_RECOG_OPERANDS];
755 struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
757 /* Hard registers that can not be used for the register allocator for
758 all functions of the current compilation unit. */
759 HARD_REG_SET x_no_unit_alloc_regs;
761 /* Map: hard regs X modes -> set of hard registers for storing value
762 of given mode starting with given hard register. */
763 HARD_REG_SET (x_ira_reg_mode_hard_regset
764 [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
766 /* Maximum cost of moving from a register in one class to a register
767 in another class. Based on TARGET_REGISTER_MOVE_COST. */
768 move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
770 /* Similar, but here we don't have to move if the first index is a
771 subset of the second so in that case the cost is zero. */
772 move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
774 /* Similar, but here we don't have to move if the first index is a
775 superset of the second so in that case the cost is zero. */
776 move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
778 /* Keep track of the last mode we initialized move costs for. */
779 int x_last_mode_for_init_move_cost;
781 /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal
782 cost not minimal. */
783 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
785 /* Map class->true if class is a possible allocno class, false
786 otherwise. */
787 bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
789 /* Map class->true if class is a pressure class, false otherwise. */
790 bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
792 /* Array of the number of hard registers of given class which are
793 available for allocation. The order is defined by the hard
794 register numbers. */
795 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
797 /* Index (in ira_class_hard_regs; for given register class and hard
798 register (in general case a hard register can belong to several
799 register classes;. The index is negative for hard registers
800 unavailable for the allocation. */
801 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
803 /* Array whose values are hard regset of hard registers available for
804 the allocation of given register class whose HARD_REGNO_MODE_OK
805 values for given mode are zero. */
806 HARD_REG_SET x_ira_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
808 /* Index [CL][M] contains R if R appears somewhere in a register of the form:
810 (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M]
812 For example, if:
814 - (reg:M 2) is valid and occupies two registers;
815 - register 2 belongs to CL; and
816 - register 3 belongs to the same pressure class as CL
818 then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be
819 in the set. */
820 HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
822 /* The value is number of elements in the subsequent array. */
823 int x_ira_important_classes_num;
825 /* The array containing all non-empty classes. Such classes is
826 important for calculation of the hard register usage costs. */
827 enum reg_class x_ira_important_classes[N_REG_CLASSES];
829 /* The array containing indexes of important classes in the previous
830 array. The array elements are defined only for important
831 classes. */
832 int x_ira_important_class_nums[N_REG_CLASSES];
834 /* Map class->true if class is an uniform class, false otherwise. */
835 bool x_ira_uniform_class_p[N_REG_CLASSES];
837 /* The biggest important class inside of intersection of the two
838 classes (that is calculated taking only hard registers available
839 for allocation into account;. If the both classes contain no hard
840 registers available for allocation, the value is calculated with
841 taking all hard-registers including fixed ones into account. */
842 enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
844 /* Classes with end marker LIM_REG_CLASSES which are intersected with
845 given class (the first index). That includes given class itself.
846 This is calculated taking only hard registers available for
847 allocation into account. */
848 enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
850 /* The biggest (smallest) important class inside of (covering) union
851 of the two classes (that is calculated taking only hard registers
852 available for allocation into account). If the both classes
853 contain no hard registers available for allocation, the value is
854 calculated with taking all hard-registers including fixed ones
855 into account. In other words, the value is the corresponding
856 reg_class_subunion (reg_class_superunion) value. */
857 enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
858 enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
860 /* For each reg class, table listing all the classes contained in it
861 (excluding the class itself. Non-allocatable registers are
862 excluded from the consideration). */
863 enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
865 /* Array whose values are hard regset of hard registers for which
866 move of the hard register in given mode into itself is
867 prohibited. */
868 HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
870 /* Flag of that the above array has been initialized. */
871 bool x_ira_prohibited_mode_move_regs_initialized_p;
874 extern struct target_ira_int default_target_ira_int;
875 #if SWITCHABLE_TARGET
876 extern struct target_ira_int *this_target_ira_int;
877 #else
878 #define this_target_ira_int (&default_target_ira_int)
879 #endif
881 #define ira_reg_mode_hard_regset \
882 (this_target_ira_int->x_ira_reg_mode_hard_regset)
883 #define ira_register_move_cost \
884 (this_target_ira_int->x_ira_register_move_cost)
885 #define ira_max_memory_move_cost \
886 (this_target_ira_int->x_ira_max_memory_move_cost)
887 #define ira_may_move_in_cost \
888 (this_target_ira_int->x_ira_may_move_in_cost)
889 #define ira_may_move_out_cost \
890 (this_target_ira_int->x_ira_may_move_out_cost)
891 #define ira_reg_allocno_class_p \
892 (this_target_ira_int->x_ira_reg_allocno_class_p)
893 #define ira_reg_pressure_class_p \
894 (this_target_ira_int->x_ira_reg_pressure_class_p)
895 #define ira_non_ordered_class_hard_regs \
896 (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
897 #define ira_class_hard_reg_index \
898 (this_target_ira_int->x_ira_class_hard_reg_index)
899 #define ira_prohibited_class_mode_regs \
900 (this_target_ira_int->x_ira_prohibited_class_mode_regs)
901 #define ira_useful_class_mode_regs \
902 (this_target_ira_int->x_ira_useful_class_mode_regs)
903 #define ira_important_classes_num \
904 (this_target_ira_int->x_ira_important_classes_num)
905 #define ira_important_classes \
906 (this_target_ira_int->x_ira_important_classes)
907 #define ira_important_class_nums \
908 (this_target_ira_int->x_ira_important_class_nums)
909 #define ira_uniform_class_p \
910 (this_target_ira_int->x_ira_uniform_class_p)
911 #define ira_reg_class_intersect \
912 (this_target_ira_int->x_ira_reg_class_intersect)
913 #define ira_reg_class_super_classes \
914 (this_target_ira_int->x_ira_reg_class_super_classes)
915 #define ira_reg_class_subunion \
916 (this_target_ira_int->x_ira_reg_class_subunion)
917 #define ira_reg_class_superunion \
918 (this_target_ira_int->x_ira_reg_class_superunion)
919 #define ira_prohibited_mode_move_regs \
920 (this_target_ira_int->x_ira_prohibited_mode_move_regs)
922 /* ira.c: */
924 extern void *ira_allocate (size_t);
925 extern void ira_free (void *addr);
926 extern bitmap ira_allocate_bitmap (void);
927 extern void ira_free_bitmap (bitmap);
928 extern void ira_print_disposition (FILE *);
929 extern void ira_debug_disposition (void);
930 extern void ira_debug_allocno_classes (void);
931 extern void ira_init_register_move_cost (enum machine_mode);
933 /* ira-build.c */
935 /* The current loop tree node and its regno allocno map. */
936 extern ira_loop_tree_node_t ira_curr_loop_tree_node;
937 extern ira_allocno_t *ira_curr_regno_allocno_map;
939 extern void ira_debug_copy (ira_copy_t);
940 extern void ira_debug_copies (void);
941 extern void ira_debug_allocno_copies (ira_allocno_t);
943 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
944 void (*) (ira_loop_tree_node_t),
945 void (*) (ira_loop_tree_node_t));
946 extern ira_allocno_t ira_parent_allocno (ira_allocno_t);
947 extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t);
948 extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
949 extern void ira_create_allocno_objects (ira_allocno_t);
950 extern void ira_set_allocno_class (ira_allocno_t, enum reg_class);
951 extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
952 extern void ira_allocate_conflict_vec (ira_object_t, int);
953 extern void ira_allocate_object_conflicts (ira_object_t, int);
954 extern void ior_hard_reg_conflicts (ira_allocno_t, HARD_REG_SET *);
955 extern void ira_print_expanded_allocno (ira_allocno_t);
956 extern void ira_add_live_range_to_object (ira_object_t, int, int);
957 extern live_range_t ira_create_live_range (ira_object_t, int, int,
958 live_range_t);
959 extern live_range_t ira_copy_live_range_list (live_range_t);
960 extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t);
961 extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t);
962 extern void ira_finish_live_range (live_range_t);
963 extern void ira_finish_live_range_list (live_range_t);
964 extern void ira_free_allocno_updated_costs (ira_allocno_t);
965 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
966 int, bool, rtx, ira_loop_tree_node_t);
967 extern void ira_add_allocno_copy_to_list (ira_copy_t);
968 extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t);
969 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
970 bool, rtx, ira_loop_tree_node_t);
972 extern int *ira_allocate_cost_vector (reg_class_t);
973 extern void ira_free_cost_vector (int *, reg_class_t);
975 extern void ira_flattening (int, int);
976 extern bool ira_build (void);
977 extern void ira_destroy (void);
979 /* ira-costs.c */
980 extern void ira_init_costs_once (void);
981 extern void ira_init_costs (void);
982 extern void ira_finish_costs_once (void);
983 extern void ira_costs (void);
984 extern void ira_tune_allocno_costs (void);
986 /* ira-lives.c */
988 extern void ira_rebuild_start_finish_chains (void);
989 extern void ira_print_live_range_list (FILE *, live_range_t);
990 extern void ira_debug_live_range_list (live_range_t);
991 extern void ira_debug_allocno_live_ranges (ira_allocno_t);
992 extern void ira_debug_live_ranges (void);
993 extern void ira_create_allocno_live_ranges (void);
994 extern void ira_compress_allocno_live_ranges (void);
995 extern void ira_finish_allocno_live_ranges (void);
997 /* ira-conflicts.c */
998 extern void ira_debug_conflicts (bool);
999 extern void ira_build_conflicts (void);
1001 /* ira-color.c */
1002 extern void ira_debug_hard_regs_forest (void);
1003 extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1004 extern void ira_reassign_conflict_allocnos (int);
1005 extern void ira_initiate_assign (void);
1006 extern void ira_finish_assign (void);
1007 extern void ira_color (void);
1009 /* ira-emit.c */
1010 extern void ira_initiate_emit_data (void);
1011 extern void ira_finish_emit_data (void);
1012 extern void ira_emit (bool);
1016 /* Return true if equivalence of pseudo REGNO is not a lvalue. */
1017 static inline bool
1018 ira_equiv_no_lvalue_p (int regno)
1020 if (regno >= ira_reg_equiv_len)
1021 return false;
1022 return (ira_reg_equiv[regno].constant != NULL_RTX
1023 || ira_reg_equiv[regno].invariant != NULL_RTX
1024 || (ira_reg_equiv[regno].memory != NULL_RTX
1025 && MEM_READONLY_P (ira_reg_equiv[regno].memory)));
1030 /* Initialize register costs for MODE if necessary. */
1031 static inline void
1032 ira_init_register_move_cost_if_necessary (enum machine_mode mode)
1034 if (ira_register_move_cost[mode] == NULL)
1035 ira_init_register_move_cost (mode);
1040 /* The iterator for all allocnos. */
1041 typedef struct {
1042 /* The number of the current element in IRA_ALLOCNOS. */
1043 int n;
1044 } ira_allocno_iterator;
1046 /* Initialize the iterator I. */
1047 static inline void
1048 ira_allocno_iter_init (ira_allocno_iterator *i)
1050 i->n = 0;
1053 /* Return TRUE if we have more allocnos to visit, in which case *A is
1054 set to the allocno to be visited. Otherwise, return FALSE. */
1055 static inline bool
1056 ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
1058 int n;
1060 for (n = i->n; n < ira_allocnos_num; n++)
1061 if (ira_allocnos[n] != NULL)
1063 *a = ira_allocnos[n];
1064 i->n = n + 1;
1065 return true;
1067 return false;
1070 /* Loop over all allocnos. In each iteration, A is set to the next
1071 allocno. ITER is an instance of ira_allocno_iterator used to iterate
1072 the allocnos. */
1073 #define FOR_EACH_ALLOCNO(A, ITER) \
1074 for (ira_allocno_iter_init (&(ITER)); \
1075 ira_allocno_iter_cond (&(ITER), &(A));)
1077 /* The iterator for all objects. */
1078 typedef struct {
1079 /* The number of the current element in ira_object_id_map. */
1080 int n;
1081 } ira_object_iterator;
1083 /* Initialize the iterator I. */
1084 static inline void
1085 ira_object_iter_init (ira_object_iterator *i)
1087 i->n = 0;
1090 /* Return TRUE if we have more objects to visit, in which case *OBJ is
1091 set to the object to be visited. Otherwise, return FALSE. */
1092 static inline bool
1093 ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
1095 int n;
1097 for (n = i->n; n < ira_objects_num; n++)
1098 if (ira_object_id_map[n] != NULL)
1100 *obj = ira_object_id_map[n];
1101 i->n = n + 1;
1102 return true;
1104 return false;
1107 /* Loop over all objects. In each iteration, OBJ is set to the next
1108 object. ITER is an instance of ira_object_iterator used to iterate
1109 the objects. */
1110 #define FOR_EACH_OBJECT(OBJ, ITER) \
1111 for (ira_object_iter_init (&(ITER)); \
1112 ira_object_iter_cond (&(ITER), &(OBJ));)
1114 /* The iterator for objects associated with an allocno. */
1115 typedef struct {
1116 /* The number of the element the allocno's object array. */
1117 int n;
1118 } ira_allocno_object_iterator;
1120 /* Initialize the iterator I. */
1121 static inline void
1122 ira_allocno_object_iter_init (ira_allocno_object_iterator *i)
1124 i->n = 0;
1127 /* Return TRUE if we have more objects to visit in allocno A, in which
1128 case *O is set to the object to be visited. Otherwise, return
1129 FALSE. */
1130 static inline bool
1131 ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
1132 ira_object_t *o)
1134 int n = i->n++;
1135 if (n < ALLOCNO_NUM_OBJECTS (a))
1137 *o = ALLOCNO_OBJECT (a, n);
1138 return true;
1140 return false;
1143 /* Loop over all objects associated with allocno A. In each
1144 iteration, O is set to the next object. ITER is an instance of
1145 ira_allocno_object_iterator used to iterate the conflicts. */
1146 #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1147 for (ira_allocno_object_iter_init (&(ITER)); \
1148 ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1151 /* The iterator for copies. */
1152 typedef struct {
1153 /* The number of the current element in IRA_COPIES. */
1154 int n;
1155 } ira_copy_iterator;
1157 /* Initialize the iterator I. */
1158 static inline void
1159 ira_copy_iter_init (ira_copy_iterator *i)
1161 i->n = 0;
1164 /* Return TRUE if we have more copies to visit, in which case *CP is
1165 set to the copy to be visited. Otherwise, return FALSE. */
1166 static inline bool
1167 ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
1169 int n;
1171 for (n = i->n; n < ira_copies_num; n++)
1172 if (ira_copies[n] != NULL)
1174 *cp = ira_copies[n];
1175 i->n = n + 1;
1176 return true;
1178 return false;
1181 /* Loop over all copies. In each iteration, C is set to the next
1182 copy. ITER is an instance of ira_copy_iterator used to iterate
1183 the copies. */
1184 #define FOR_EACH_COPY(C, ITER) \
1185 for (ira_copy_iter_init (&(ITER)); \
1186 ira_copy_iter_cond (&(ITER), &(C));)
1188 /* The iterator for object conflicts. */
1189 typedef struct {
1191 /* TRUE if the conflicts are represented by vector of allocnos. */
1192 bool conflict_vec_p;
1194 /* The conflict vector or conflict bit vector. */
1195 void *vec;
1197 /* The number of the current element in the vector (of type
1198 ira_object_t or IRA_INT_TYPE). */
1199 unsigned int word_num;
1201 /* The bit vector size. It is defined only if
1202 OBJECT_CONFLICT_VEC_P is FALSE. */
1203 unsigned int size;
1205 /* The current bit index of bit vector. It is defined only if
1206 OBJECT_CONFLICT_VEC_P is FALSE. */
1207 unsigned int bit_num;
1209 /* The object id corresponding to the 1st bit of the bit vector. It
1210 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1211 int base_conflict_id;
1213 /* The word of bit vector currently visited. It is defined only if
1214 OBJECT_CONFLICT_VEC_P is FALSE. */
1215 unsigned IRA_INT_TYPE word;
1216 } ira_object_conflict_iterator;
1218 /* Initialize the iterator I with ALLOCNO conflicts. */
1219 static inline void
1220 ira_object_conflict_iter_init (ira_object_conflict_iterator *i,
1221 ira_object_t obj)
1223 i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1224 i->vec = OBJECT_CONFLICT_ARRAY (obj);
1225 i->word_num = 0;
1226 if (i->conflict_vec_p)
1227 i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1228 else
1230 if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1231 i->size = 0;
1232 else
1233 i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1234 + IRA_INT_BITS)
1235 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1236 i->bit_num = 0;
1237 i->base_conflict_id = OBJECT_MIN (obj);
1238 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1242 /* Return TRUE if we have more conflicting allocnos to visit, in which
1243 case *A is set to the allocno to be visited. Otherwise, return
1244 FALSE. */
1245 static inline bool
1246 ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
1247 ira_object_t *pobj)
1249 ira_object_t obj;
1251 if (i->conflict_vec_p)
1253 obj = ((ira_object_t *) i->vec)[i->word_num++];
1254 if (obj == NULL)
1255 return false;
1257 else
1259 unsigned IRA_INT_TYPE word = i->word;
1260 unsigned int bit_num = i->bit_num;
1262 /* Skip words that are zeros. */
1263 for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1265 i->word_num++;
1267 /* If we have reached the end, break. */
1268 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1269 return false;
1271 bit_num = i->word_num * IRA_INT_BITS;
1274 /* Skip bits that are zero. */
1275 for (; (word & 1) == 0; word >>= 1)
1276 bit_num++;
1278 obj = ira_object_id_map[bit_num + i->base_conflict_id];
1279 i->bit_num = bit_num + 1;
1280 i->word = word >> 1;
1283 *pobj = obj;
1284 return true;
1287 /* Loop over all objects conflicting with OBJ. In each iteration,
1288 CONF is set to the next conflicting object. ITER is an instance
1289 of ira_object_conflict_iterator used to iterate the conflicts. */
1290 #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1291 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1292 ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1296 /* The function returns TRUE if at least one hard register from ones
1297 starting with HARD_REGNO and containing value of MODE are in set
1298 HARD_REGSET. */
1299 static inline bool
1300 ira_hard_reg_set_intersection_p (int hard_regno, enum machine_mode mode,
1301 HARD_REG_SET hard_regset)
1303 int i;
1305 gcc_assert (hard_regno >= 0);
1306 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1307 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1308 return true;
1309 return false;
1312 /* Return number of hard registers in hard register SET. */
1313 static inline int
1314 hard_reg_set_size (HARD_REG_SET set)
1316 int i, size;
1318 for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1319 if (TEST_HARD_REG_BIT (set, i))
1320 size++;
1321 return size;
1324 /* The function returns TRUE if hard registers starting with
1325 HARD_REGNO and containing value of MODE are fully in set
1326 HARD_REGSET. */
1327 static inline bool
1328 ira_hard_reg_in_set_p (int hard_regno, enum machine_mode mode,
1329 HARD_REG_SET hard_regset)
1331 int i;
1333 ira_assert (hard_regno >= 0);
1334 for (i = hard_regno_nregs[hard_regno][mode] - 1; i >= 0; i--)
1335 if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1336 return false;
1337 return true;
1342 /* To save memory we use a lazy approach for allocation and
1343 initialization of the cost vectors. We do this only when it is
1344 really necessary. */
1346 /* Allocate cost vector *VEC for hard registers of ACLASS and
1347 initialize the elements by VAL if it is necessary */
1348 static inline void
1349 ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
1351 int i, *reg_costs;
1352 int len;
1354 if (*vec != NULL)
1355 return;
1356 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1357 len = ira_class_hard_regs_num[(int) aclass];
1358 for (i = 0; i < len; i++)
1359 reg_costs[i] = val;
1362 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1363 values of vector SRC into the vector if it is necessary */
1364 static inline void
1365 ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1367 int len;
1369 if (*vec != NULL || src == NULL)
1370 return;
1371 *vec = ira_allocate_cost_vector (aclass);
1372 len = ira_class_hard_regs_num[aclass];
1373 memcpy (*vec, src, sizeof (int) * len);
1376 /* Allocate cost vector *VEC for hard registers of ACLASS and add
1377 values of vector SRC into the vector if it is necessary */
1378 static inline void
1379 ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src)
1381 int i, len;
1383 if (src == NULL)
1384 return;
1385 len = ira_class_hard_regs_num[aclass];
1386 if (*vec == NULL)
1388 *vec = ira_allocate_cost_vector (aclass);
1389 memset (*vec, 0, sizeof (int) * len);
1391 for (i = 0; i < len; i++)
1392 (*vec)[i] += src[i];
1395 /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1396 values of vector SRC into the vector or initialize it by VAL (if
1397 SRC is null). */
1398 static inline void
1399 ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass,
1400 int val, int *src)
1402 int i, *reg_costs;
1403 int len;
1405 if (*vec != NULL)
1406 return;
1407 *vec = reg_costs = ira_allocate_cost_vector (aclass);
1408 len = ira_class_hard_regs_num[aclass];
1409 if (src != NULL)
1410 memcpy (reg_costs, src, sizeof (int) * len);
1411 else
1413 for (i = 0; i < len; i++)
1414 reg_costs[i] = val;
1418 extern rtx ira_create_new_reg (rtx);
1419 extern int first_moveable_pseudo, last_moveable_pseudo;