2012-11-28 Oleg Raikhman <oleg@adapteva.com>
[official-gcc.git] / gcc / dwarf2cfi.c
blob3454b1da10ac2a4c7d7bf848e5d288689e6be824
1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "version.h"
27 #include "flags.h"
28 #include "rtl.h"
29 #include "function.h"
30 #include "basic-block.h"
31 #include "dwarf2.h"
32 #include "dwarf2out.h"
33 #include "dwarf2asm.h"
34 #include "ggc.h"
35 #include "tm_p.h"
36 #include "target.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
53 #endif
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
57 #endif
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
68 dw_cfa_location cfa;
69 dw_cfi_ref cfa_cfi;
71 /* The expressions for any register column that is saved. */
72 cfi_vec reg_save;
73 } dw_cfi_row;
75 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
76 typedef struct GTY(()) reg_saved_in_data_struct {
77 rtx orig_reg;
78 rtx saved_in_reg;
79 } reg_saved_in_data;
82 /* Since we no longer have a proper CFG, we're going to create a facsimile
83 of one on the fly while processing the frame-related insns.
85 We create dw_trace_info structures for each extended basic block beginning
86 and ending at a "save point". Save points are labels, barriers, certain
87 notes, and of course the beginning and end of the function.
89 As we encounter control transfer insns, we propagate the "current"
90 row state across the edges to the starts of traces. When checking is
91 enabled, we validate that we propagate the same data from all sources.
93 All traces are members of the TRACE_INFO array, in the order in which
94 they appear in the instruction stream.
96 All save points are present in the TRACE_INDEX hash, mapping the insn
97 starting a trace to the dw_trace_info describing the trace. */
99 typedef struct
101 /* The insn that begins the trace. */
102 rtx head;
104 /* The row state at the beginning and end of the trace. */
105 dw_cfi_row *beg_row, *end_row;
107 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
108 while scanning insns. However, the args_size value is irrelevant at
109 any point except can_throw_internal_p insns. Therefore the "delay"
110 sizes the values that must actually be emitted for this trace. */
111 HOST_WIDE_INT beg_true_args_size, end_true_args_size;
112 HOST_WIDE_INT beg_delay_args_size, end_delay_args_size;
114 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
115 rtx eh_head;
117 /* The following variables contain data used in interpreting frame related
118 expressions. These are not part of the "real" row state as defined by
119 Dwarf, but it seems like they need to be propagated into a trace in case
120 frame related expressions have been sunk. */
121 /* ??? This seems fragile. These variables are fragments of a larger
122 expression. If we do not keep the entire expression together, we risk
123 not being able to put it together properly. Consider forcing targets
124 to generate self-contained expressions and dropping all of the magic
125 interpretation code in this file. Or at least refusing to shrink wrap
126 any frame related insn that doesn't contain a complete expression. */
128 /* The register used for saving registers to the stack, and its offset
129 from the CFA. */
130 dw_cfa_location cfa_store;
132 /* A temporary register holding an integral value used in adjusting SP
133 or setting up the store_reg. The "offset" field holds the integer
134 value, not an offset. */
135 dw_cfa_location cfa_temp;
137 /* A set of registers saved in other registers. This is the inverse of
138 the row->reg_save info, if the entry is a DW_CFA_register. This is
139 implemented as a flat array because it normally contains zero or 1
140 entry, depending on the target. IA-64 is the big spender here, using
141 a maximum of 5 entries. */
142 vec<reg_saved_in_data> regs_saved_in_regs;
144 /* An identifier for this trace. Used only for debugging dumps. */
145 unsigned id;
147 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
148 bool switch_sections;
150 /* True if we've seen different values incoming to beg_true_args_size. */
151 bool args_size_undefined;
152 } dw_trace_info;
155 typedef dw_trace_info *dw_trace_info_ref;
158 /* The variables making up the pseudo-cfg, as described above. */
159 static vec<dw_trace_info> trace_info;
160 static vec<dw_trace_info_ref> trace_work_list;
161 static htab_t trace_index;
163 /* A vector of call frame insns for the CIE. */
164 cfi_vec cie_cfi_vec;
166 /* The state of the first row of the FDE table, which includes the
167 state provided by the CIE. */
168 static GTY(()) dw_cfi_row *cie_cfi_row;
170 static GTY(()) reg_saved_in_data *cie_return_save;
172 static GTY(()) unsigned long dwarf2out_cfi_label_num;
174 /* The insn after which a new CFI note should be emitted. */
175 static rtx add_cfi_insn;
177 /* When non-null, add_cfi will add the CFI to this vector. */
178 static cfi_vec *add_cfi_vec;
180 /* The current instruction trace. */
181 static dw_trace_info *cur_trace;
183 /* The current, i.e. most recently generated, row of the CFI table. */
184 static dw_cfi_row *cur_row;
186 /* A copy of the current CFA, for use during the processing of a
187 single insn. */
188 static dw_cfa_location *cur_cfa;
190 /* We delay emitting a register save until either (a) we reach the end
191 of the prologue or (b) the register is clobbered. This clusters
192 register saves so that there are fewer pc advances. */
194 typedef struct {
195 rtx reg;
196 rtx saved_reg;
197 HOST_WIDE_INT cfa_offset;
198 } queued_reg_save;
201 static vec<queued_reg_save> queued_reg_saves;
203 /* True if any CFI directives were emitted at the current insn. */
204 static bool any_cfis_emitted;
206 /* Short-hand for commonly used register numbers. */
207 static unsigned dw_stack_pointer_regnum;
208 static unsigned dw_frame_pointer_regnum;
210 /* Hook used by __throw. */
213 expand_builtin_dwarf_sp_column (void)
215 unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
216 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1));
219 /* MEM is a memory reference for the register size table, each element of
220 which has mode MODE. Initialize column C as a return address column. */
222 static void
223 init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c)
225 HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode);
226 HOST_WIDE_INT size = GET_MODE_SIZE (Pmode);
227 emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size));
230 /* Generate code to initialize the register size table. */
232 void
233 expand_builtin_init_dwarf_reg_sizes (tree address)
235 unsigned int i;
236 enum machine_mode mode = TYPE_MODE (char_type_node);
237 rtx addr = expand_normal (address);
238 rtx mem = gen_rtx_MEM (BLKmode, addr);
239 bool wrote_return_column = false;
241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
243 unsigned int dnum = DWARF_FRAME_REGNUM (i);
244 unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
246 if (rnum < DWARF_FRAME_REGISTERS)
248 HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode);
249 enum machine_mode save_mode = reg_raw_mode[i];
250 HOST_WIDE_INT size;
252 if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode))
253 save_mode = choose_hard_reg_mode (i, 1, true);
254 if (dnum == DWARF_FRAME_RETURN_COLUMN)
256 if (save_mode == VOIDmode)
257 continue;
258 wrote_return_column = true;
260 size = GET_MODE_SIZE (save_mode);
261 if (offset < 0)
262 continue;
264 emit_move_insn (adjust_address (mem, mode, offset),
265 gen_int_mode (size, mode));
269 if (!wrote_return_column)
270 init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN);
272 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
273 init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN);
274 #endif
276 targetm.init_dwarf_reg_sizes_extra (address);
280 static hashval_t
281 dw_trace_info_hash (const void *ptr)
283 const dw_trace_info *ti = (const dw_trace_info *) ptr;
284 return INSN_UID (ti->head);
287 static int
288 dw_trace_info_eq (const void *ptr_a, const void *ptr_b)
290 const dw_trace_info *a = (const dw_trace_info *) ptr_a;
291 const dw_trace_info *b = (const dw_trace_info *) ptr_b;
292 return a->head == b->head;
295 static dw_trace_info *
296 get_trace_info (rtx insn)
298 dw_trace_info dummy;
299 dummy.head = insn;
300 return (dw_trace_info *)
301 htab_find_with_hash (trace_index, &dummy, INSN_UID (insn));
304 static bool
305 save_point_p (rtx insn)
307 /* Labels, except those that are really jump tables. */
308 if (LABEL_P (insn))
309 return inside_basic_block_p (insn);
311 /* We split traces at the prologue/epilogue notes because those
312 are points at which the unwind info is usually stable. This
313 makes it easier to find spots with identical unwind info so
314 that we can use remember/restore_state opcodes. */
315 if (NOTE_P (insn))
316 switch (NOTE_KIND (insn))
318 case NOTE_INSN_PROLOGUE_END:
319 case NOTE_INSN_EPILOGUE_BEG:
320 return true;
323 return false;
326 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
328 static inline HOST_WIDE_INT
329 div_data_align (HOST_WIDE_INT off)
331 HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT;
332 gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off);
333 return r;
336 /* Return true if we need a signed version of a given opcode
337 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
339 static inline bool
340 need_data_align_sf_opcode (HOST_WIDE_INT off)
342 return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0;
345 /* Return a pointer to a newly allocated Call Frame Instruction. */
347 static inline dw_cfi_ref
348 new_cfi (void)
350 dw_cfi_ref cfi = ggc_alloc_dw_cfi_node ();
352 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0;
353 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0;
355 return cfi;
358 /* Return a newly allocated CFI row, with no defined data. */
360 static dw_cfi_row *
361 new_cfi_row (void)
363 dw_cfi_row *row = ggc_alloc_cleared_dw_cfi_row ();
365 row->cfa.reg = INVALID_REGNUM;
367 return row;
370 /* Return a copy of an existing CFI row. */
372 static dw_cfi_row *
373 copy_cfi_row (dw_cfi_row *src)
375 dw_cfi_row *dst = ggc_alloc_dw_cfi_row ();
377 *dst = *src;
378 dst->reg_save = vec_safe_copy (src->reg_save);
380 return dst;
383 /* Generate a new label for the CFI info to refer to. */
385 static char *
386 dwarf2out_cfi_label (void)
388 int num = dwarf2out_cfi_label_num++;
389 char label[20];
391 ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num);
393 return xstrdup (label);
396 /* Add CFI either to the current insn stream or to a vector, or both. */
398 static void
399 add_cfi (dw_cfi_ref cfi)
401 any_cfis_emitted = true;
403 if (add_cfi_insn != NULL)
405 add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn);
406 NOTE_CFI (add_cfi_insn) = cfi;
409 if (add_cfi_vec != NULL)
410 vec_safe_push (*add_cfi_vec, cfi);
413 static void
414 add_cfi_args_size (HOST_WIDE_INT size)
416 dw_cfi_ref cfi = new_cfi ();
418 /* While we can occasionally have args_size < 0 internally, this state
419 should not persist at a point we actually need an opcode. */
420 gcc_assert (size >= 0);
422 cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
423 cfi->dw_cfi_oprnd1.dw_cfi_offset = size;
425 add_cfi (cfi);
428 static void
429 add_cfi_restore (unsigned reg)
431 dw_cfi_ref cfi = new_cfi ();
433 cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
434 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
436 add_cfi (cfi);
439 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
440 that the register column is no longer saved. */
442 static void
443 update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi)
445 if (vec_safe_length (row->reg_save) <= column)
446 vec_safe_grow_cleared (row->reg_save, column + 1);
447 (*row->reg_save)[column] = cfi;
450 /* This function fills in aa dw_cfa_location structure from a dwarf location
451 descriptor sequence. */
453 static void
454 get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_struct *loc)
456 struct dw_loc_descr_struct *ptr;
457 cfa->offset = 0;
458 cfa->base_offset = 0;
459 cfa->indirect = 0;
460 cfa->reg = -1;
462 for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next)
464 enum dwarf_location_atom op = ptr->dw_loc_opc;
466 switch (op)
468 case DW_OP_reg0:
469 case DW_OP_reg1:
470 case DW_OP_reg2:
471 case DW_OP_reg3:
472 case DW_OP_reg4:
473 case DW_OP_reg5:
474 case DW_OP_reg6:
475 case DW_OP_reg7:
476 case DW_OP_reg8:
477 case DW_OP_reg9:
478 case DW_OP_reg10:
479 case DW_OP_reg11:
480 case DW_OP_reg12:
481 case DW_OP_reg13:
482 case DW_OP_reg14:
483 case DW_OP_reg15:
484 case DW_OP_reg16:
485 case DW_OP_reg17:
486 case DW_OP_reg18:
487 case DW_OP_reg19:
488 case DW_OP_reg20:
489 case DW_OP_reg21:
490 case DW_OP_reg22:
491 case DW_OP_reg23:
492 case DW_OP_reg24:
493 case DW_OP_reg25:
494 case DW_OP_reg26:
495 case DW_OP_reg27:
496 case DW_OP_reg28:
497 case DW_OP_reg29:
498 case DW_OP_reg30:
499 case DW_OP_reg31:
500 cfa->reg = op - DW_OP_reg0;
501 break;
502 case DW_OP_regx:
503 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
504 break;
505 case DW_OP_breg0:
506 case DW_OP_breg1:
507 case DW_OP_breg2:
508 case DW_OP_breg3:
509 case DW_OP_breg4:
510 case DW_OP_breg5:
511 case DW_OP_breg6:
512 case DW_OP_breg7:
513 case DW_OP_breg8:
514 case DW_OP_breg9:
515 case DW_OP_breg10:
516 case DW_OP_breg11:
517 case DW_OP_breg12:
518 case DW_OP_breg13:
519 case DW_OP_breg14:
520 case DW_OP_breg15:
521 case DW_OP_breg16:
522 case DW_OP_breg17:
523 case DW_OP_breg18:
524 case DW_OP_breg19:
525 case DW_OP_breg20:
526 case DW_OP_breg21:
527 case DW_OP_breg22:
528 case DW_OP_breg23:
529 case DW_OP_breg24:
530 case DW_OP_breg25:
531 case DW_OP_breg26:
532 case DW_OP_breg27:
533 case DW_OP_breg28:
534 case DW_OP_breg29:
535 case DW_OP_breg30:
536 case DW_OP_breg31:
537 cfa->reg = op - DW_OP_breg0;
538 cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int;
539 break;
540 case DW_OP_bregx:
541 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
542 cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int;
543 break;
544 case DW_OP_deref:
545 cfa->indirect = 1;
546 break;
547 case DW_OP_plus_uconst:
548 cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned;
549 break;
550 default:
551 gcc_unreachable ();
556 /* Find the previous value for the CFA, iteratively. CFI is the opcode
557 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
558 one level of remember/restore state processing. */
560 void
561 lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember)
563 switch (cfi->dw_cfi_opc)
565 case DW_CFA_def_cfa_offset:
566 case DW_CFA_def_cfa_offset_sf:
567 loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset;
568 break;
569 case DW_CFA_def_cfa_register:
570 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
571 break;
572 case DW_CFA_def_cfa:
573 case DW_CFA_def_cfa_sf:
574 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
575 loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset;
576 break;
577 case DW_CFA_def_cfa_expression:
578 get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc);
579 break;
581 case DW_CFA_remember_state:
582 gcc_assert (!remember->in_use);
583 *remember = *loc;
584 remember->in_use = 1;
585 break;
586 case DW_CFA_restore_state:
587 gcc_assert (remember->in_use);
588 *loc = *remember;
589 remember->in_use = 0;
590 break;
592 default:
593 break;
597 /* Determine if two dw_cfa_location structures define the same data. */
599 bool
600 cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2)
602 return (loc1->reg == loc2->reg
603 && loc1->offset == loc2->offset
604 && loc1->indirect == loc2->indirect
605 && (loc1->indirect == 0
606 || loc1->base_offset == loc2->base_offset));
609 /* Determine if two CFI operands are identical. */
611 static bool
612 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b)
614 switch (t)
616 case dw_cfi_oprnd_unused:
617 return true;
618 case dw_cfi_oprnd_reg_num:
619 return a->dw_cfi_reg_num == b->dw_cfi_reg_num;
620 case dw_cfi_oprnd_offset:
621 return a->dw_cfi_offset == b->dw_cfi_offset;
622 case dw_cfi_oprnd_addr:
623 return (a->dw_cfi_addr == b->dw_cfi_addr
624 || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0);
625 case dw_cfi_oprnd_loc:
626 return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc);
628 gcc_unreachable ();
631 /* Determine if two CFI entries are identical. */
633 static bool
634 cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b)
636 enum dwarf_call_frame_info opc;
638 /* Make things easier for our callers, including missing operands. */
639 if (a == b)
640 return true;
641 if (a == NULL || b == NULL)
642 return false;
644 /* Obviously, the opcodes must match. */
645 opc = a->dw_cfi_opc;
646 if (opc != b->dw_cfi_opc)
647 return false;
649 /* Compare the two operands, re-using the type of the operands as
650 already exposed elsewhere. */
651 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc),
652 &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1)
653 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc),
654 &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2));
657 /* Determine if two CFI_ROW structures are identical. */
659 static bool
660 cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b)
662 size_t i, n_a, n_b, n_max;
664 if (a->cfa_cfi)
666 if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi))
667 return false;
669 else if (!cfa_equal_p (&a->cfa, &b->cfa))
670 return false;
672 n_a = vec_safe_length (a->reg_save);
673 n_b = vec_safe_length (b->reg_save);
674 n_max = MAX (n_a, n_b);
676 for (i = 0; i < n_max; ++i)
678 dw_cfi_ref r_a = NULL, r_b = NULL;
680 if (i < n_a)
681 r_a = (*a->reg_save)[i];
682 if (i < n_b)
683 r_b = (*b->reg_save)[i];
685 if (!cfi_equal_p (r_a, r_b))
686 return false;
689 return true;
692 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
693 what opcode to emit. Returns the CFI opcode to effect the change, or
694 NULL if NEW_CFA == OLD_CFA. */
696 static dw_cfi_ref
697 def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa)
699 dw_cfi_ref cfi;
701 /* If nothing changed, no need to issue any call frame instructions. */
702 if (cfa_equal_p (old_cfa, new_cfa))
703 return NULL;
705 cfi = new_cfi ();
707 if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect)
709 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
710 the CFA register did not change but the offset did. The data
711 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
712 in the assembler via the .cfi_def_cfa_offset directive. */
713 if (new_cfa->offset < 0)
714 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf;
715 else
716 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset;
717 cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset;
719 else if (new_cfa->offset == old_cfa->offset
720 && old_cfa->reg != INVALID_REGNUM
721 && !new_cfa->indirect
722 && !old_cfa->indirect)
724 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
725 indicating the CFA register has changed to <register> but the
726 offset has not changed. */
727 cfi->dw_cfi_opc = DW_CFA_def_cfa_register;
728 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
730 else if (new_cfa->indirect == 0)
732 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
733 indicating the CFA register has changed to <register> with
734 the specified offset. The data factoring for DW_CFA_def_cfa_sf
735 happens in output_cfi, or in the assembler via the .cfi_def_cfa
736 directive. */
737 if (new_cfa->offset < 0)
738 cfi->dw_cfi_opc = DW_CFA_def_cfa_sf;
739 else
740 cfi->dw_cfi_opc = DW_CFA_def_cfa;
741 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
742 cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset;
744 else
746 /* Construct a DW_CFA_def_cfa_expression instruction to
747 calculate the CFA using a full location expression since no
748 register-offset pair is available. */
749 struct dw_loc_descr_struct *loc_list;
751 cfi->dw_cfi_opc = DW_CFA_def_cfa_expression;
752 loc_list = build_cfa_loc (new_cfa, 0);
753 cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list;
756 return cfi;
759 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
761 static void
762 def_cfa_1 (dw_cfa_location *new_cfa)
764 dw_cfi_ref cfi;
766 if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0)
767 cur_trace->cfa_store.offset = new_cfa->offset;
769 cfi = def_cfa_0 (&cur_row->cfa, new_cfa);
770 if (cfi)
772 cur_row->cfa = *new_cfa;
773 cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression
774 ? cfi : NULL);
776 add_cfi (cfi);
780 /* Add the CFI for saving a register. REG is the CFA column number.
781 If SREG is -1, the register is saved at OFFSET from the CFA;
782 otherwise it is saved in SREG. */
784 static void
785 reg_save (unsigned int reg, unsigned int sreg, HOST_WIDE_INT offset)
787 dw_fde_ref fde = cfun ? cfun->fde : NULL;
788 dw_cfi_ref cfi = new_cfi ();
790 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
792 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
793 if (fde
794 && fde->stack_realign
795 && sreg == INVALID_REGNUM)
797 cfi->dw_cfi_opc = DW_CFA_expression;
798 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
799 cfi->dw_cfi_oprnd2.dw_cfi_loc
800 = build_cfa_aligned_loc (&cur_row->cfa, offset,
801 fde->stack_realignment);
803 else if (sreg == INVALID_REGNUM)
805 if (need_data_align_sf_opcode (offset))
806 cfi->dw_cfi_opc = DW_CFA_offset_extended_sf;
807 else if (reg & ~0x3f)
808 cfi->dw_cfi_opc = DW_CFA_offset_extended;
809 else
810 cfi->dw_cfi_opc = DW_CFA_offset;
811 cfi->dw_cfi_oprnd2.dw_cfi_offset = offset;
813 else if (sreg == reg)
815 /* While we could emit something like DW_CFA_same_value or
816 DW_CFA_restore, we never expect to see something like that
817 in a prologue. This is more likely to be a bug. A backend
818 can always bypass this by using REG_CFA_RESTORE directly. */
819 gcc_unreachable ();
821 else
823 cfi->dw_cfi_opc = DW_CFA_register;
824 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
827 add_cfi (cfi);
828 update_row_reg_save (cur_row, reg, cfi);
831 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
832 and adjust data structures to match. */
834 static void
835 notice_args_size (rtx insn)
837 HOST_WIDE_INT args_size, delta;
838 rtx note;
840 note = find_reg_note (insn, REG_ARGS_SIZE, NULL);
841 if (note == NULL)
842 return;
844 args_size = INTVAL (XEXP (note, 0));
845 delta = args_size - cur_trace->end_true_args_size;
846 if (delta == 0)
847 return;
849 cur_trace->end_true_args_size = args_size;
851 /* If the CFA is computed off the stack pointer, then we must adjust
852 the computation of the CFA as well. */
853 if (cur_cfa->reg == dw_stack_pointer_regnum)
855 gcc_assert (!cur_cfa->indirect);
857 /* Convert a change in args_size (always a positive in the
858 direction of stack growth) to a change in stack pointer. */
859 #ifndef STACK_GROWS_DOWNWARD
860 delta = -delta;
861 #endif
862 cur_cfa->offset += delta;
866 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
867 data within the trace related to EH insns and args_size. */
869 static void
870 notice_eh_throw (rtx insn)
872 HOST_WIDE_INT args_size;
874 args_size = cur_trace->end_true_args_size;
875 if (cur_trace->eh_head == NULL)
877 cur_trace->eh_head = insn;
878 cur_trace->beg_delay_args_size = args_size;
879 cur_trace->end_delay_args_size = args_size;
881 else if (cur_trace->end_delay_args_size != args_size)
883 cur_trace->end_delay_args_size = args_size;
885 /* ??? If the CFA is the stack pointer, search backward for the last
886 CFI note and insert there. Given that the stack changed for the
887 args_size change, there *must* be such a note in between here and
888 the last eh insn. */
889 add_cfi_args_size (args_size);
893 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
894 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
895 used in places where rtl is prohibited. */
897 static inline unsigned
898 dwf_regno (const_rtx reg)
900 return DWARF_FRAME_REGNUM (REGNO (reg));
903 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
905 static bool
906 compare_reg_or_pc (rtx x, rtx y)
908 if (REG_P (x) && REG_P (y))
909 return REGNO (x) == REGNO (y);
910 return x == y;
913 /* Record SRC as being saved in DEST. DEST may be null to delete an
914 existing entry. SRC may be a register or PC_RTX. */
916 static void
917 record_reg_saved_in_reg (rtx dest, rtx src)
919 reg_saved_in_data *elt;
920 size_t i;
922 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt)
923 if (compare_reg_or_pc (elt->orig_reg, src))
925 if (dest == NULL)
926 cur_trace->regs_saved_in_regs.unordered_remove (i);
927 else
928 elt->saved_in_reg = dest;
929 return;
932 if (dest == NULL)
933 return;
935 reg_saved_in_data e = {src, dest};
936 cur_trace->regs_saved_in_regs.safe_push (e);
939 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
940 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
942 static void
943 queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset)
945 queued_reg_save *q;
946 queued_reg_save e = {reg, sreg, offset};
947 size_t i;
949 /* Duplicates waste space, but it's also necessary to remove them
950 for correctness, since the queue gets output in reverse order. */
951 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
952 if (compare_reg_or_pc (q->reg, reg))
954 *q = e;
955 return;
958 queued_reg_saves.safe_push (e);
961 /* Output all the entries in QUEUED_REG_SAVES. */
963 static void
964 dwarf2out_flush_queued_reg_saves (void)
966 queued_reg_save *q;
967 size_t i;
969 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
971 unsigned int reg, sreg;
973 record_reg_saved_in_reg (q->saved_reg, q->reg);
975 if (q->reg == pc_rtx)
976 reg = DWARF_FRAME_RETURN_COLUMN;
977 else
978 reg = dwf_regno (q->reg);
979 if (q->saved_reg)
980 sreg = dwf_regno (q->saved_reg);
981 else
982 sreg = INVALID_REGNUM;
983 reg_save (reg, sreg, q->cfa_offset);
986 queued_reg_saves.truncate (0);
989 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
990 location for? Or, does it clobber a register which we've previously
991 said that some other register is saved in, and for which we now
992 have a new location for? */
994 static bool
995 clobbers_queued_reg_save (const_rtx insn)
997 queued_reg_save *q;
998 size_t iq;
1000 FOR_EACH_VEC_ELT (queued_reg_saves, iq, q)
1002 size_t ir;
1003 reg_saved_in_data *rir;
1005 if (modified_in_p (q->reg, insn))
1006 return true;
1008 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir)
1009 if (compare_reg_or_pc (q->reg, rir->orig_reg)
1010 && modified_in_p (rir->saved_in_reg, insn))
1011 return true;
1014 return false;
1017 /* What register, if any, is currently saved in REG? */
1019 static rtx
1020 reg_saved_in (rtx reg)
1022 unsigned int regn = REGNO (reg);
1023 queued_reg_save *q;
1024 reg_saved_in_data *rir;
1025 size_t i;
1027 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
1028 if (q->saved_reg && regn == REGNO (q->saved_reg))
1029 return q->reg;
1031 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir)
1032 if (regn == REGNO (rir->saved_in_reg))
1033 return rir->orig_reg;
1035 return NULL_RTX;
1038 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1040 static void
1041 dwarf2out_frame_debug_def_cfa (rtx pat)
1043 memset (cur_cfa, 0, sizeof (*cur_cfa));
1045 if (GET_CODE (pat) == PLUS)
1047 cur_cfa->offset = INTVAL (XEXP (pat, 1));
1048 pat = XEXP (pat, 0);
1050 if (MEM_P (pat))
1052 cur_cfa->indirect = 1;
1053 pat = XEXP (pat, 0);
1054 if (GET_CODE (pat) == PLUS)
1056 cur_cfa->base_offset = INTVAL (XEXP (pat, 1));
1057 pat = XEXP (pat, 0);
1060 /* ??? If this fails, we could be calling into the _loc functions to
1061 define a full expression. So far no port does that. */
1062 gcc_assert (REG_P (pat));
1063 cur_cfa->reg = dwf_regno (pat);
1066 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1068 static void
1069 dwarf2out_frame_debug_adjust_cfa (rtx pat)
1071 rtx src, dest;
1073 gcc_assert (GET_CODE (pat) == SET);
1074 dest = XEXP (pat, 0);
1075 src = XEXP (pat, 1);
1077 switch (GET_CODE (src))
1079 case PLUS:
1080 gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg);
1081 cur_cfa->offset -= INTVAL (XEXP (src, 1));
1082 break;
1084 case REG:
1085 break;
1087 default:
1088 gcc_unreachable ();
1091 cur_cfa->reg = dwf_regno (dest);
1092 gcc_assert (cur_cfa->indirect == 0);
1095 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1097 static void
1098 dwarf2out_frame_debug_cfa_offset (rtx set)
1100 HOST_WIDE_INT offset;
1101 rtx src, addr, span;
1102 unsigned int sregno;
1104 src = XEXP (set, 1);
1105 addr = XEXP (set, 0);
1106 gcc_assert (MEM_P (addr));
1107 addr = XEXP (addr, 0);
1109 /* As documented, only consider extremely simple addresses. */
1110 switch (GET_CODE (addr))
1112 case REG:
1113 gcc_assert (dwf_regno (addr) == cur_cfa->reg);
1114 offset = -cur_cfa->offset;
1115 break;
1116 case PLUS:
1117 gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg);
1118 offset = INTVAL (XEXP (addr, 1)) - cur_cfa->offset;
1119 break;
1120 default:
1121 gcc_unreachable ();
1124 if (src == pc_rtx)
1126 span = NULL;
1127 sregno = DWARF_FRAME_RETURN_COLUMN;
1129 else
1131 span = targetm.dwarf_register_span (src);
1132 sregno = dwf_regno (src);
1135 /* ??? We'd like to use queue_reg_save, but we need to come up with
1136 a different flushing heuristic for epilogues. */
1137 if (!span)
1138 reg_save (sregno, INVALID_REGNUM, offset);
1139 else
1141 /* We have a PARALLEL describing where the contents of SRC live.
1142 Queue register saves for each piece of the PARALLEL. */
1143 int par_index;
1144 int limit;
1145 HOST_WIDE_INT span_offset = offset;
1147 gcc_assert (GET_CODE (span) == PARALLEL);
1149 limit = XVECLEN (span, 0);
1150 for (par_index = 0; par_index < limit; par_index++)
1152 rtx elem = XVECEXP (span, 0, par_index);
1154 sregno = dwf_regno (src);
1155 reg_save (sregno, INVALID_REGNUM, span_offset);
1156 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1161 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1163 static void
1164 dwarf2out_frame_debug_cfa_register (rtx set)
1166 rtx src, dest;
1167 unsigned sregno, dregno;
1169 src = XEXP (set, 1);
1170 dest = XEXP (set, 0);
1172 record_reg_saved_in_reg (dest, src);
1173 if (src == pc_rtx)
1174 sregno = DWARF_FRAME_RETURN_COLUMN;
1175 else
1176 sregno = dwf_regno (src);
1178 dregno = dwf_regno (dest);
1180 /* ??? We'd like to use queue_reg_save, but we need to come up with
1181 a different flushing heuristic for epilogues. */
1182 reg_save (sregno, dregno, 0);
1185 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1187 static void
1188 dwarf2out_frame_debug_cfa_expression (rtx set)
1190 rtx src, dest, span;
1191 dw_cfi_ref cfi = new_cfi ();
1192 unsigned regno;
1194 dest = SET_DEST (set);
1195 src = SET_SRC (set);
1197 gcc_assert (REG_P (src));
1198 gcc_assert (MEM_P (dest));
1200 span = targetm.dwarf_register_span (src);
1201 gcc_assert (!span);
1203 regno = dwf_regno (src);
1205 cfi->dw_cfi_opc = DW_CFA_expression;
1206 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
1207 cfi->dw_cfi_oprnd2.dw_cfi_loc
1208 = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest),
1209 GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
1211 /* ??? We'd like to use queue_reg_save, were the interface different,
1212 and, as above, we could manage flushing for epilogues. */
1213 add_cfi (cfi);
1214 update_row_reg_save (cur_row, regno, cfi);
1217 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1219 static void
1220 dwarf2out_frame_debug_cfa_restore (rtx reg)
1222 unsigned int regno = dwf_regno (reg);
1224 add_cfi_restore (regno);
1225 update_row_reg_save (cur_row, regno, NULL);
1228 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1229 ??? Perhaps we should note in the CIE where windows are saved (instead of
1230 assuming 0(cfa)) and what registers are in the window. */
1232 static void
1233 dwarf2out_frame_debug_cfa_window_save (void)
1235 dw_cfi_ref cfi = new_cfi ();
1237 cfi->dw_cfi_opc = DW_CFA_GNU_window_save;
1238 add_cfi (cfi);
1241 /* Record call frame debugging information for an expression EXPR,
1242 which either sets SP or FP (adjusting how we calculate the frame
1243 address) or saves a register to the stack or another register.
1244 LABEL indicates the address of EXPR.
1246 This function encodes a state machine mapping rtxes to actions on
1247 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1248 users need not read the source code.
1250 The High-Level Picture
1252 Changes in the register we use to calculate the CFA: Currently we
1253 assume that if you copy the CFA register into another register, we
1254 should take the other one as the new CFA register; this seems to
1255 work pretty well. If it's wrong for some target, it's simple
1256 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1258 Changes in the register we use for saving registers to the stack:
1259 This is usually SP, but not always. Again, we deduce that if you
1260 copy SP into another register (and SP is not the CFA register),
1261 then the new register is the one we will be using for register
1262 saves. This also seems to work.
1264 Register saves: There's not much guesswork about this one; if
1265 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1266 register save, and the register used to calculate the destination
1267 had better be the one we think we're using for this purpose.
1268 It's also assumed that a copy from a call-saved register to another
1269 register is saving that register if RTX_FRAME_RELATED_P is set on
1270 that instruction. If the copy is from a call-saved register to
1271 the *same* register, that means that the register is now the same
1272 value as in the caller.
1274 Except: If the register being saved is the CFA register, and the
1275 offset is nonzero, we are saving the CFA, so we assume we have to
1276 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1277 the intent is to save the value of SP from the previous frame.
1279 In addition, if a register has previously been saved to a different
1280 register,
1282 Invariants / Summaries of Rules
1284 cfa current rule for calculating the CFA. It usually
1285 consists of a register and an offset. This is
1286 actually stored in *cur_cfa, but abbreviated
1287 for the purposes of this documentation.
1288 cfa_store register used by prologue code to save things to the stack
1289 cfa_store.offset is the offset from the value of
1290 cfa_store.reg to the actual CFA
1291 cfa_temp register holding an integral value. cfa_temp.offset
1292 stores the value, which will be used to adjust the
1293 stack pointer. cfa_temp is also used like cfa_store,
1294 to track stores to the stack via fp or a temp reg.
1296 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1297 with cfa.reg as the first operand changes the cfa.reg and its
1298 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1299 cfa_temp.offset.
1301 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1302 expression yielding a constant. This sets cfa_temp.reg
1303 and cfa_temp.offset.
1305 Rule 5: Create a new register cfa_store used to save items to the
1306 stack.
1308 Rules 10-14: Save a register to the stack. Define offset as the
1309 difference of the original location and cfa_store's
1310 location (or cfa_temp's location if cfa_temp is used).
1312 Rules 16-20: If AND operation happens on sp in prologue, we assume
1313 stack is realigned. We will use a group of DW_OP_XXX
1314 expressions to represent the location of the stored
1315 register instead of CFA+offset.
1317 The Rules
1319 "{a,b}" indicates a choice of a xor b.
1320 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1322 Rule 1:
1323 (set <reg1> <reg2>:cfa.reg)
1324 effects: cfa.reg = <reg1>
1325 cfa.offset unchanged
1326 cfa_temp.reg = <reg1>
1327 cfa_temp.offset = cfa.offset
1329 Rule 2:
1330 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1331 {<const_int>,<reg>:cfa_temp.reg}))
1332 effects: cfa.reg = sp if fp used
1333 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1334 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1335 if cfa_store.reg==sp
1337 Rule 3:
1338 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1339 effects: cfa.reg = fp
1340 cfa_offset += +/- <const_int>
1342 Rule 4:
1343 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1344 constraints: <reg1> != fp
1345 <reg1> != sp
1346 effects: cfa.reg = <reg1>
1347 cfa_temp.reg = <reg1>
1348 cfa_temp.offset = cfa.offset
1350 Rule 5:
1351 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1352 constraints: <reg1> != fp
1353 <reg1> != sp
1354 effects: cfa_store.reg = <reg1>
1355 cfa_store.offset = cfa.offset - cfa_temp.offset
1357 Rule 6:
1358 (set <reg> <const_int>)
1359 effects: cfa_temp.reg = <reg>
1360 cfa_temp.offset = <const_int>
1362 Rule 7:
1363 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1364 effects: cfa_temp.reg = <reg1>
1365 cfa_temp.offset |= <const_int>
1367 Rule 8:
1368 (set <reg> (high <exp>))
1369 effects: none
1371 Rule 9:
1372 (set <reg> (lo_sum <exp> <const_int>))
1373 effects: cfa_temp.reg = <reg>
1374 cfa_temp.offset = <const_int>
1376 Rule 10:
1377 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1378 effects: cfa_store.offset -= <const_int>
1379 cfa.offset = cfa_store.offset if cfa.reg == sp
1380 cfa.reg = sp
1381 cfa.base_offset = -cfa_store.offset
1383 Rule 11:
1384 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1385 effects: cfa_store.offset += -/+ mode_size(mem)
1386 cfa.offset = cfa_store.offset if cfa.reg == sp
1387 cfa.reg = sp
1388 cfa.base_offset = -cfa_store.offset
1390 Rule 12:
1391 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1393 <reg2>)
1394 effects: cfa.reg = <reg1>
1395 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1397 Rule 13:
1398 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1399 effects: cfa.reg = <reg1>
1400 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1402 Rule 14:
1403 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1404 effects: cfa.reg = <reg1>
1405 cfa.base_offset = -cfa_temp.offset
1406 cfa_temp.offset -= mode_size(mem)
1408 Rule 15:
1409 (set <reg> {unspec, unspec_volatile})
1410 effects: target-dependent
1412 Rule 16:
1413 (set sp (and: sp <const_int>))
1414 constraints: cfa_store.reg == sp
1415 effects: cfun->fde.stack_realign = 1
1416 cfa_store.offset = 0
1417 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1419 Rule 17:
1420 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1421 effects: cfa_store.offset += -/+ mode_size(mem)
1423 Rule 18:
1424 (set (mem ({pre_inc, pre_dec} sp)) fp)
1425 constraints: fde->stack_realign == 1
1426 effects: cfa_store.offset = 0
1427 cfa.reg != HARD_FRAME_POINTER_REGNUM
1429 Rule 19:
1430 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1431 constraints: fde->stack_realign == 1
1432 && cfa.offset == 0
1433 && cfa.indirect == 0
1434 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1435 effects: Use DW_CFA_def_cfa_expression to define cfa
1436 cfa.reg == fde->drap_reg */
1438 static void
1439 dwarf2out_frame_debug_expr (rtx expr)
1441 rtx src, dest, span;
1442 HOST_WIDE_INT offset;
1443 dw_fde_ref fde;
1445 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1446 the PARALLEL independently. The first element is always processed if
1447 it is a SET. This is for backward compatibility. Other elements
1448 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1449 flag is set in them. */
1450 if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE)
1452 int par_index;
1453 int limit = XVECLEN (expr, 0);
1454 rtx elem;
1456 /* PARALLELs have strict read-modify-write semantics, so we
1457 ought to evaluate every rvalue before changing any lvalue.
1458 It's cumbersome to do that in general, but there's an
1459 easy approximation that is enough for all current users:
1460 handle register saves before register assignments. */
1461 if (GET_CODE (expr) == PARALLEL)
1462 for (par_index = 0; par_index < limit; par_index++)
1464 elem = XVECEXP (expr, 0, par_index);
1465 if (GET_CODE (elem) == SET
1466 && MEM_P (SET_DEST (elem))
1467 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1468 dwarf2out_frame_debug_expr (elem);
1471 for (par_index = 0; par_index < limit; par_index++)
1473 elem = XVECEXP (expr, 0, par_index);
1474 if (GET_CODE (elem) == SET
1475 && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE)
1476 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1477 dwarf2out_frame_debug_expr (elem);
1479 return;
1482 gcc_assert (GET_CODE (expr) == SET);
1484 src = SET_SRC (expr);
1485 dest = SET_DEST (expr);
1487 if (REG_P (src))
1489 rtx rsi = reg_saved_in (src);
1490 if (rsi)
1491 src = rsi;
1494 fde = cfun->fde;
1496 switch (GET_CODE (dest))
1498 case REG:
1499 switch (GET_CODE (src))
1501 /* Setting FP from SP. */
1502 case REG:
1503 if (cur_cfa->reg == dwf_regno (src))
1505 /* Rule 1 */
1506 /* Update the CFA rule wrt SP or FP. Make sure src is
1507 relative to the current CFA register.
1509 We used to require that dest be either SP or FP, but the
1510 ARM copies SP to a temporary register, and from there to
1511 FP. So we just rely on the backends to only set
1512 RTX_FRAME_RELATED_P on appropriate insns. */
1513 cur_cfa->reg = dwf_regno (dest);
1514 cur_trace->cfa_temp.reg = cur_cfa->reg;
1515 cur_trace->cfa_temp.offset = cur_cfa->offset;
1517 else
1519 /* Saving a register in a register. */
1520 gcc_assert (!fixed_regs [REGNO (dest)]
1521 /* For the SPARC and its register window. */
1522 || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN));
1524 /* After stack is aligned, we can only save SP in FP
1525 if drap register is used. In this case, we have
1526 to restore stack pointer with the CFA value and we
1527 don't generate this DWARF information. */
1528 if (fde
1529 && fde->stack_realign
1530 && REGNO (src) == STACK_POINTER_REGNUM)
1531 gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM
1532 && fde->drap_reg != INVALID_REGNUM
1533 && cur_cfa->reg != dwf_regno (src));
1534 else
1535 queue_reg_save (src, dest, 0);
1537 break;
1539 case PLUS:
1540 case MINUS:
1541 case LO_SUM:
1542 if (dest == stack_pointer_rtx)
1544 /* Rule 2 */
1545 /* Adjusting SP. */
1546 switch (GET_CODE (XEXP (src, 1)))
1548 case CONST_INT:
1549 offset = INTVAL (XEXP (src, 1));
1550 break;
1551 case REG:
1552 gcc_assert (dwf_regno (XEXP (src, 1))
1553 == cur_trace->cfa_temp.reg);
1554 offset = cur_trace->cfa_temp.offset;
1555 break;
1556 default:
1557 gcc_unreachable ();
1560 if (XEXP (src, 0) == hard_frame_pointer_rtx)
1562 /* Restoring SP from FP in the epilogue. */
1563 gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum);
1564 cur_cfa->reg = dw_stack_pointer_regnum;
1566 else if (GET_CODE (src) == LO_SUM)
1567 /* Assume we've set the source reg of the LO_SUM from sp. */
1569 else
1570 gcc_assert (XEXP (src, 0) == stack_pointer_rtx);
1572 if (GET_CODE (src) != MINUS)
1573 offset = -offset;
1574 if (cur_cfa->reg == dw_stack_pointer_regnum)
1575 cur_cfa->offset += offset;
1576 if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
1577 cur_trace->cfa_store.offset += offset;
1579 else if (dest == hard_frame_pointer_rtx)
1581 /* Rule 3 */
1582 /* Either setting the FP from an offset of the SP,
1583 or adjusting the FP */
1584 gcc_assert (frame_pointer_needed);
1586 gcc_assert (REG_P (XEXP (src, 0))
1587 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
1588 && CONST_INT_P (XEXP (src, 1)));
1589 offset = INTVAL (XEXP (src, 1));
1590 if (GET_CODE (src) != MINUS)
1591 offset = -offset;
1592 cur_cfa->offset += offset;
1593 cur_cfa->reg = dw_frame_pointer_regnum;
1595 else
1597 gcc_assert (GET_CODE (src) != MINUS);
1599 /* Rule 4 */
1600 if (REG_P (XEXP (src, 0))
1601 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
1602 && CONST_INT_P (XEXP (src, 1)))
1604 /* Setting a temporary CFA register that will be copied
1605 into the FP later on. */
1606 offset = - INTVAL (XEXP (src, 1));
1607 cur_cfa->offset += offset;
1608 cur_cfa->reg = dwf_regno (dest);
1609 /* Or used to save regs to the stack. */
1610 cur_trace->cfa_temp.reg = cur_cfa->reg;
1611 cur_trace->cfa_temp.offset = cur_cfa->offset;
1614 /* Rule 5 */
1615 else if (REG_P (XEXP (src, 0))
1616 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1617 && XEXP (src, 1) == stack_pointer_rtx)
1619 /* Setting a scratch register that we will use instead
1620 of SP for saving registers to the stack. */
1621 gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum);
1622 cur_trace->cfa_store.reg = dwf_regno (dest);
1623 cur_trace->cfa_store.offset
1624 = cur_cfa->offset - cur_trace->cfa_temp.offset;
1627 /* Rule 9 */
1628 else if (GET_CODE (src) == LO_SUM
1629 && CONST_INT_P (XEXP (src, 1)))
1631 cur_trace->cfa_temp.reg = dwf_regno (dest);
1632 cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1));
1634 else
1635 gcc_unreachable ();
1637 break;
1639 /* Rule 6 */
1640 case CONST_INT:
1641 cur_trace->cfa_temp.reg = dwf_regno (dest);
1642 cur_trace->cfa_temp.offset = INTVAL (src);
1643 break;
1645 /* Rule 7 */
1646 case IOR:
1647 gcc_assert (REG_P (XEXP (src, 0))
1648 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1649 && CONST_INT_P (XEXP (src, 1)));
1651 cur_trace->cfa_temp.reg = dwf_regno (dest);
1652 cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1));
1653 break;
1655 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1656 which will fill in all of the bits. */
1657 /* Rule 8 */
1658 case HIGH:
1659 break;
1661 /* Rule 15 */
1662 case UNSPEC:
1663 case UNSPEC_VOLATILE:
1664 /* All unspecs should be represented by REG_CFA_* notes. */
1665 gcc_unreachable ();
1666 return;
1668 /* Rule 16 */
1669 case AND:
1670 /* If this AND operation happens on stack pointer in prologue,
1671 we assume the stack is realigned and we extract the
1672 alignment. */
1673 if (fde && XEXP (src, 0) == stack_pointer_rtx)
1675 /* We interpret reg_save differently with stack_realign set.
1676 Thus we must flush whatever we have queued first. */
1677 dwarf2out_flush_queued_reg_saves ();
1679 gcc_assert (cur_trace->cfa_store.reg
1680 == dwf_regno (XEXP (src, 0)));
1681 fde->stack_realign = 1;
1682 fde->stack_realignment = INTVAL (XEXP (src, 1));
1683 cur_trace->cfa_store.offset = 0;
1685 if (cur_cfa->reg != dw_stack_pointer_regnum
1686 && cur_cfa->reg != dw_frame_pointer_regnum)
1687 fde->drap_reg = cur_cfa->reg;
1689 return;
1691 default:
1692 gcc_unreachable ();
1694 break;
1696 case MEM:
1698 /* Saving a register to the stack. Make sure dest is relative to the
1699 CFA register. */
1700 switch (GET_CODE (XEXP (dest, 0)))
1702 /* Rule 10 */
1703 /* With a push. */
1704 case PRE_MODIFY:
1705 case POST_MODIFY:
1706 /* We can't handle variable size modifications. */
1707 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1))
1708 == CONST_INT);
1709 offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1));
1711 gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM
1712 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1714 cur_trace->cfa_store.offset += offset;
1715 if (cur_cfa->reg == dw_stack_pointer_regnum)
1716 cur_cfa->offset = cur_trace->cfa_store.offset;
1718 if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY)
1719 offset -= cur_trace->cfa_store.offset;
1720 else
1721 offset = -cur_trace->cfa_store.offset;
1722 break;
1724 /* Rule 11 */
1725 case PRE_INC:
1726 case PRE_DEC:
1727 case POST_DEC:
1728 offset = GET_MODE_SIZE (GET_MODE (dest));
1729 if (GET_CODE (XEXP (dest, 0)) == PRE_INC)
1730 offset = -offset;
1732 gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0))
1733 == STACK_POINTER_REGNUM)
1734 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1736 cur_trace->cfa_store.offset += offset;
1738 /* Rule 18: If stack is aligned, we will use FP as a
1739 reference to represent the address of the stored
1740 regiser. */
1741 if (fde
1742 && fde->stack_realign
1743 && REG_P (src)
1744 && REGNO (src) == HARD_FRAME_POINTER_REGNUM)
1746 gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum);
1747 cur_trace->cfa_store.offset = 0;
1750 if (cur_cfa->reg == dw_stack_pointer_regnum)
1751 cur_cfa->offset = cur_trace->cfa_store.offset;
1753 if (GET_CODE (XEXP (dest, 0)) == POST_DEC)
1754 offset += -cur_trace->cfa_store.offset;
1755 else
1756 offset = -cur_trace->cfa_store.offset;
1757 break;
1759 /* Rule 12 */
1760 /* With an offset. */
1761 case PLUS:
1762 case MINUS:
1763 case LO_SUM:
1765 unsigned int regno;
1767 gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1))
1768 && REG_P (XEXP (XEXP (dest, 0), 0)));
1769 offset = INTVAL (XEXP (XEXP (dest, 0), 1));
1770 if (GET_CODE (XEXP (dest, 0)) == MINUS)
1771 offset = -offset;
1773 regno = dwf_regno (XEXP (XEXP (dest, 0), 0));
1775 if (cur_cfa->reg == regno)
1776 offset -= cur_cfa->offset;
1777 else if (cur_trace->cfa_store.reg == regno)
1778 offset -= cur_trace->cfa_store.offset;
1779 else
1781 gcc_assert (cur_trace->cfa_temp.reg == regno);
1782 offset -= cur_trace->cfa_temp.offset;
1785 break;
1787 /* Rule 13 */
1788 /* Without an offset. */
1789 case REG:
1791 unsigned int regno = dwf_regno (XEXP (dest, 0));
1793 if (cur_cfa->reg == regno)
1794 offset = -cur_cfa->offset;
1795 else if (cur_trace->cfa_store.reg == regno)
1796 offset = -cur_trace->cfa_store.offset;
1797 else
1799 gcc_assert (cur_trace->cfa_temp.reg == regno);
1800 offset = -cur_trace->cfa_temp.offset;
1803 break;
1805 /* Rule 14 */
1806 case POST_INC:
1807 gcc_assert (cur_trace->cfa_temp.reg
1808 == dwf_regno (XEXP (XEXP (dest, 0), 0)));
1809 offset = -cur_trace->cfa_temp.offset;
1810 cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
1811 break;
1813 default:
1814 gcc_unreachable ();
1817 /* Rule 17 */
1818 /* If the source operand of this MEM operation is a memory,
1819 we only care how much stack grew. */
1820 if (MEM_P (src))
1821 break;
1823 if (REG_P (src)
1824 && REGNO (src) != STACK_POINTER_REGNUM
1825 && REGNO (src) != HARD_FRAME_POINTER_REGNUM
1826 && dwf_regno (src) == cur_cfa->reg)
1828 /* We're storing the current CFA reg into the stack. */
1830 if (cur_cfa->offset == 0)
1832 /* Rule 19 */
1833 /* If stack is aligned, putting CFA reg into stack means
1834 we can no longer use reg + offset to represent CFA.
1835 Here we use DW_CFA_def_cfa_expression instead. The
1836 result of this expression equals to the original CFA
1837 value. */
1838 if (fde
1839 && fde->stack_realign
1840 && cur_cfa->indirect == 0
1841 && cur_cfa->reg != dw_frame_pointer_regnum)
1843 gcc_assert (fde->drap_reg == cur_cfa->reg);
1845 cur_cfa->indirect = 1;
1846 cur_cfa->reg = dw_frame_pointer_regnum;
1847 cur_cfa->base_offset = offset;
1848 cur_cfa->offset = 0;
1850 fde->drap_reg_saved = 1;
1851 break;
1854 /* If the source register is exactly the CFA, assume
1855 we're saving SP like any other register; this happens
1856 on the ARM. */
1857 queue_reg_save (stack_pointer_rtx, NULL_RTX, offset);
1858 break;
1860 else
1862 /* Otherwise, we'll need to look in the stack to
1863 calculate the CFA. */
1864 rtx x = XEXP (dest, 0);
1866 if (!REG_P (x))
1867 x = XEXP (x, 0);
1868 gcc_assert (REG_P (x));
1870 cur_cfa->reg = dwf_regno (x);
1871 cur_cfa->base_offset = offset;
1872 cur_cfa->indirect = 1;
1873 break;
1877 span = NULL;
1878 if (REG_P (src))
1879 span = targetm.dwarf_register_span (src);
1880 if (!span)
1881 queue_reg_save (src, NULL_RTX, offset);
1882 else
1884 /* We have a PARALLEL describing where the contents of SRC live.
1885 Queue register saves for each piece of the PARALLEL. */
1886 int par_index;
1887 int limit;
1888 HOST_WIDE_INT span_offset = offset;
1890 gcc_assert (GET_CODE (span) == PARALLEL);
1892 limit = XVECLEN (span, 0);
1893 for (par_index = 0; par_index < limit; par_index++)
1895 rtx elem = XVECEXP (span, 0, par_index);
1896 queue_reg_save (elem, NULL_RTX, span_offset);
1897 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1900 break;
1902 default:
1903 gcc_unreachable ();
1907 /* Record call frame debugging information for INSN, which either sets
1908 SP or FP (adjusting how we calculate the frame address) or saves a
1909 register to the stack. */
1911 static void
1912 dwarf2out_frame_debug (rtx insn)
1914 rtx note, n;
1915 bool handled_one = false;
1917 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1918 switch (REG_NOTE_KIND (note))
1920 case REG_FRAME_RELATED_EXPR:
1921 insn = XEXP (note, 0);
1922 goto do_frame_expr;
1924 case REG_CFA_DEF_CFA:
1925 dwarf2out_frame_debug_def_cfa (XEXP (note, 0));
1926 handled_one = true;
1927 break;
1929 case REG_CFA_ADJUST_CFA:
1930 n = XEXP (note, 0);
1931 if (n == NULL)
1933 n = PATTERN (insn);
1934 if (GET_CODE (n) == PARALLEL)
1935 n = XVECEXP (n, 0, 0);
1937 dwarf2out_frame_debug_adjust_cfa (n);
1938 handled_one = true;
1939 break;
1941 case REG_CFA_OFFSET:
1942 n = XEXP (note, 0);
1943 if (n == NULL)
1944 n = single_set (insn);
1945 dwarf2out_frame_debug_cfa_offset (n);
1946 handled_one = true;
1947 break;
1949 case REG_CFA_REGISTER:
1950 n = XEXP (note, 0);
1951 if (n == NULL)
1953 n = PATTERN (insn);
1954 if (GET_CODE (n) == PARALLEL)
1955 n = XVECEXP (n, 0, 0);
1957 dwarf2out_frame_debug_cfa_register (n);
1958 handled_one = true;
1959 break;
1961 case REG_CFA_EXPRESSION:
1962 n = XEXP (note, 0);
1963 if (n == NULL)
1964 n = single_set (insn);
1965 dwarf2out_frame_debug_cfa_expression (n);
1966 handled_one = true;
1967 break;
1969 case REG_CFA_RESTORE:
1970 n = XEXP (note, 0);
1971 if (n == NULL)
1973 n = PATTERN (insn);
1974 if (GET_CODE (n) == PARALLEL)
1975 n = XVECEXP (n, 0, 0);
1976 n = XEXP (n, 0);
1978 dwarf2out_frame_debug_cfa_restore (n);
1979 handled_one = true;
1980 break;
1982 case REG_CFA_SET_VDRAP:
1983 n = XEXP (note, 0);
1984 if (REG_P (n))
1986 dw_fde_ref fde = cfun->fde;
1987 if (fde)
1989 gcc_assert (fde->vdrap_reg == INVALID_REGNUM);
1990 if (REG_P (n))
1991 fde->vdrap_reg = dwf_regno (n);
1994 handled_one = true;
1995 break;
1997 case REG_CFA_WINDOW_SAVE:
1998 dwarf2out_frame_debug_cfa_window_save ();
1999 handled_one = true;
2000 break;
2002 case REG_CFA_FLUSH_QUEUE:
2003 /* The actual flush happens elsewhere. */
2004 handled_one = true;
2005 break;
2007 default:
2008 break;
2011 if (!handled_one)
2013 insn = PATTERN (insn);
2014 do_frame_expr:
2015 dwarf2out_frame_debug_expr (insn);
2017 /* Check again. A parallel can save and update the same register.
2018 We could probably check just once, here, but this is safer than
2019 removing the check at the start of the function. */
2020 if (clobbers_queued_reg_save (insn))
2021 dwarf2out_flush_queued_reg_saves ();
2025 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2027 static void
2028 change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row)
2030 size_t i, n_old, n_new, n_max;
2031 dw_cfi_ref cfi;
2033 if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi))
2034 add_cfi (new_row->cfa_cfi);
2035 else
2037 cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa);
2038 if (cfi)
2039 add_cfi (cfi);
2042 n_old = vec_safe_length (old_row->reg_save);
2043 n_new = vec_safe_length (new_row->reg_save);
2044 n_max = MAX (n_old, n_new);
2046 for (i = 0; i < n_max; ++i)
2048 dw_cfi_ref r_old = NULL, r_new = NULL;
2050 if (i < n_old)
2051 r_old = (*old_row->reg_save)[i];
2052 if (i < n_new)
2053 r_new = (*new_row->reg_save)[i];
2055 if (r_old == r_new)
2057 else if (r_new == NULL)
2058 add_cfi_restore (i);
2059 else if (!cfi_equal_p (r_old, r_new))
2060 add_cfi (r_new);
2064 /* Examine CFI and return true if a cfi label and set_loc is needed
2065 beforehand. Even when generating CFI assembler instructions, we
2066 still have to add the cfi to the list so that lookup_cfa_1 works
2067 later on. When -g2 and above we even need to force emitting of
2068 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2069 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2070 and so don't use convert_cfa_to_fb_loc_list. */
2072 static bool
2073 cfi_label_required_p (dw_cfi_ref cfi)
2075 if (!dwarf2out_do_cfi_asm ())
2076 return true;
2078 if (dwarf_version == 2
2079 && debug_info_level > DINFO_LEVEL_TERSE
2080 && (write_symbols == DWARF2_DEBUG
2081 || write_symbols == VMS_AND_DWARF2_DEBUG))
2083 switch (cfi->dw_cfi_opc)
2085 case DW_CFA_def_cfa_offset:
2086 case DW_CFA_def_cfa_offset_sf:
2087 case DW_CFA_def_cfa_register:
2088 case DW_CFA_def_cfa:
2089 case DW_CFA_def_cfa_sf:
2090 case DW_CFA_def_cfa_expression:
2091 case DW_CFA_restore_state:
2092 return true;
2093 default:
2094 return false;
2097 return false;
2100 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2101 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2102 necessary. */
2103 static void
2104 add_cfis_to_fde (void)
2106 dw_fde_ref fde = cfun->fde;
2107 rtx insn, next;
2108 /* We always start with a function_begin label. */
2109 bool first = false;
2111 for (insn = get_insns (); insn; insn = next)
2113 next = NEXT_INSN (insn);
2115 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2117 fde->dw_fde_switch_cfi_index = vec_safe_length (fde->dw_fde_cfi);
2118 /* Don't attempt to advance_loc4 between labels
2119 in different sections. */
2120 first = true;
2123 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2125 bool required = cfi_label_required_p (NOTE_CFI (insn));
2126 while (next)
2127 if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
2129 required |= cfi_label_required_p (NOTE_CFI (next));
2130 next = NEXT_INSN (next);
2132 else if (active_insn_p (next)
2133 || (NOTE_P (next) && (NOTE_KIND (next)
2134 == NOTE_INSN_SWITCH_TEXT_SECTIONS)))
2135 break;
2136 else
2137 next = NEXT_INSN (next);
2138 if (required)
2140 int num = dwarf2out_cfi_label_num;
2141 const char *label = dwarf2out_cfi_label ();
2142 dw_cfi_ref xcfi;
2143 rtx tmp;
2145 /* Set the location counter to the new label. */
2146 xcfi = new_cfi ();
2147 xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc
2148 : DW_CFA_advance_loc4);
2149 xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
2150 vec_safe_push (fde->dw_fde_cfi, xcfi);
2152 tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
2153 NOTE_LABEL_NUMBER (tmp) = num;
2158 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2159 vec_safe_push (fde->dw_fde_cfi, NOTE_CFI (insn));
2160 insn = NEXT_INSN (insn);
2162 while (insn != next);
2163 first = false;
2168 /* If LABEL is the start of a trace, then initialize the state of that
2169 trace from CUR_TRACE and CUR_ROW. */
2171 static void
2172 maybe_record_trace_start (rtx start, rtx origin)
2174 dw_trace_info *ti;
2175 HOST_WIDE_INT args_size;
2177 ti = get_trace_info (start);
2178 gcc_assert (ti != NULL);
2180 if (dump_file)
2182 fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n",
2183 cur_trace->id, ti->id,
2184 (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"),
2185 (origin ? INSN_UID (origin) : 0));
2188 args_size = cur_trace->end_true_args_size;
2189 if (ti->beg_row == NULL)
2191 /* This is the first time we've encountered this trace. Propagate
2192 state across the edge and push the trace onto the work list. */
2193 ti->beg_row = copy_cfi_row (cur_row);
2194 ti->beg_true_args_size = args_size;
2196 ti->cfa_store = cur_trace->cfa_store;
2197 ti->cfa_temp = cur_trace->cfa_temp;
2198 ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy ();
2200 trace_work_list.safe_push (ti);
2202 if (dump_file)
2203 fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id);
2205 else
2208 /* We ought to have the same state incoming to a given trace no
2209 matter how we arrive at the trace. Anything else means we've
2210 got some kind of optimization error. */
2211 gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row));
2213 /* The args_size is allowed to conflict if it isn't actually used. */
2214 if (ti->beg_true_args_size != args_size)
2215 ti->args_size_undefined = true;
2219 /* Similarly, but handle the args_size and CFA reset across EH
2220 and non-local goto edges. */
2222 static void
2223 maybe_record_trace_start_abnormal (rtx start, rtx origin)
2225 HOST_WIDE_INT save_args_size, delta;
2226 dw_cfa_location save_cfa;
2228 save_args_size = cur_trace->end_true_args_size;
2229 if (save_args_size == 0)
2231 maybe_record_trace_start (start, origin);
2232 return;
2235 delta = -save_args_size;
2236 cur_trace->end_true_args_size = 0;
2238 save_cfa = cur_row->cfa;
2239 if (cur_row->cfa.reg == dw_stack_pointer_regnum)
2241 /* Convert a change in args_size (always a positive in the
2242 direction of stack growth) to a change in stack pointer. */
2243 #ifndef STACK_GROWS_DOWNWARD
2244 delta = -delta;
2245 #endif
2246 cur_row->cfa.offset += delta;
2249 maybe_record_trace_start (start, origin);
2251 cur_trace->end_true_args_size = save_args_size;
2252 cur_row->cfa = save_cfa;
2255 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2256 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2258 static void
2259 create_trace_edges (rtx insn)
2261 rtx tmp, lab;
2262 int i, n;
2264 if (JUMP_P (insn))
2266 if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
2267 return;
2269 if (tablejump_p (insn, NULL, &tmp))
2271 rtvec vec;
2273 tmp = PATTERN (tmp);
2274 vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
2276 n = GET_NUM_ELEM (vec);
2277 for (i = 0; i < n; ++i)
2279 lab = XEXP (RTVEC_ELT (vec, i), 0);
2280 maybe_record_trace_start (lab, insn);
2283 else if (computed_jump_p (insn))
2285 for (lab = forced_labels; lab; lab = XEXP (lab, 1))
2286 maybe_record_trace_start (XEXP (lab, 0), insn);
2288 else if (returnjump_p (insn))
2290 else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL)
2292 n = ASM_OPERANDS_LABEL_LENGTH (tmp);
2293 for (i = 0; i < n; ++i)
2295 lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
2296 maybe_record_trace_start (lab, insn);
2299 else
2301 lab = JUMP_LABEL (insn);
2302 gcc_assert (lab != NULL);
2303 maybe_record_trace_start (lab, insn);
2306 else if (CALL_P (insn))
2308 /* Sibling calls don't have edges inside this function. */
2309 if (SIBLING_CALL_P (insn))
2310 return;
2312 /* Process non-local goto edges. */
2313 if (can_nonlocal_goto (insn))
2314 for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
2315 maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
2317 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2319 rtx seq = PATTERN (insn);
2320 int i, n = XVECLEN (seq, 0);
2321 for (i = 0; i < n; ++i)
2322 create_trace_edges (XVECEXP (seq, 0, i));
2323 return;
2326 /* Process EH edges. */
2327 if (CALL_P (insn) || cfun->can_throw_non_call_exceptions)
2329 eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn);
2330 if (lp)
2331 maybe_record_trace_start_abnormal (lp->landing_pad, insn);
2335 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2337 static void
2338 scan_insn_after (rtx insn)
2340 if (RTX_FRAME_RELATED_P (insn))
2341 dwarf2out_frame_debug (insn);
2342 notice_args_size (insn);
2345 /* Scan the trace beginning at INSN and create the CFI notes for the
2346 instructions therein. */
2348 static void
2349 scan_trace (dw_trace_info *trace)
2351 rtx prev, insn = trace->head;
2352 dw_cfa_location this_cfa;
2354 if (dump_file)
2355 fprintf (dump_file, "Processing trace %u : start at %s %d\n",
2356 trace->id, rtx_name[(int) GET_CODE (insn)],
2357 INSN_UID (insn));
2359 trace->end_row = copy_cfi_row (trace->beg_row);
2360 trace->end_true_args_size = trace->beg_true_args_size;
2362 cur_trace = trace;
2363 cur_row = trace->end_row;
2365 this_cfa = cur_row->cfa;
2366 cur_cfa = &this_cfa;
2368 for (prev = insn, insn = NEXT_INSN (insn);
2369 insn;
2370 prev = insn, insn = NEXT_INSN (insn))
2372 rtx control;
2374 /* Do everything that happens "before" the insn. */
2375 add_cfi_insn = prev;
2377 /* Notice the end of a trace. */
2378 if (BARRIER_P (insn))
2380 /* Don't bother saving the unneeded queued registers at all. */
2381 queued_reg_saves.truncate (0);
2382 break;
2384 if (save_point_p (insn))
2386 /* Propagate across fallthru edges. */
2387 dwarf2out_flush_queued_reg_saves ();
2388 maybe_record_trace_start (insn, NULL);
2389 break;
2392 if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn))
2393 continue;
2395 /* Handle all changes to the row state. Sequences require special
2396 handling for the positioning of the notes. */
2397 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2399 rtx elt, pat = PATTERN (insn);
2400 int i, n = XVECLEN (pat, 0);
2402 control = XVECEXP (pat, 0, 0);
2403 if (can_throw_internal (control))
2404 notice_eh_throw (control);
2405 dwarf2out_flush_queued_reg_saves ();
2407 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
2409 /* ??? Hopefully multiple delay slots are not annulled. */
2410 gcc_assert (n == 2);
2411 gcc_assert (!RTX_FRAME_RELATED_P (control));
2412 gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL));
2414 elt = XVECEXP (pat, 0, 1);
2416 if (INSN_FROM_TARGET_P (elt))
2418 HOST_WIDE_INT restore_args_size;
2419 cfi_vec save_row_reg_save;
2421 /* If ELT is an instruction from target of an annulled
2422 branch, the effects are for the target only and so
2423 the args_size and CFA along the current path
2424 shouldn't change. */
2425 add_cfi_insn = NULL;
2426 restore_args_size = cur_trace->end_true_args_size;
2427 cur_cfa = &cur_row->cfa;
2428 save_row_reg_save = vec_safe_copy (cur_row->reg_save);
2430 scan_insn_after (elt);
2432 /* ??? Should we instead save the entire row state? */
2433 gcc_assert (!queued_reg_saves.length ());
2435 create_trace_edges (control);
2437 cur_trace->end_true_args_size = restore_args_size;
2438 cur_row->cfa = this_cfa;
2439 cur_row->reg_save = save_row_reg_save;
2440 cur_cfa = &this_cfa;
2442 else
2444 /* If ELT is a annulled branch-taken instruction (i.e.
2445 executed only when branch is not taken), the args_size
2446 and CFA should not change through the jump. */
2447 create_trace_edges (control);
2449 /* Update and continue with the trace. */
2450 add_cfi_insn = insn;
2451 scan_insn_after (elt);
2452 def_cfa_1 (&this_cfa);
2454 continue;
2457 /* The insns in the delay slot should all be considered to happen
2458 "before" a call insn. Consider a call with a stack pointer
2459 adjustment in the delay slot. The backtrace from the callee
2460 should include the sp adjustment. Unfortunately, that leaves
2461 us with an unavoidable unwinding error exactly at the call insn
2462 itself. For jump insns we'd prefer to avoid this error by
2463 placing the notes after the sequence. */
2464 if (JUMP_P (control))
2465 add_cfi_insn = insn;
2467 for (i = 1; i < n; ++i)
2469 elt = XVECEXP (pat, 0, i);
2470 scan_insn_after (elt);
2473 /* Make sure any register saves are visible at the jump target. */
2474 dwarf2out_flush_queued_reg_saves ();
2475 any_cfis_emitted = false;
2477 /* However, if there is some adjustment on the call itself, e.g.
2478 a call_pop, that action should be considered to happen after
2479 the call returns. */
2480 add_cfi_insn = insn;
2481 scan_insn_after (control);
2483 else
2485 /* Flush data before calls and jumps, and of course if necessary. */
2486 if (can_throw_internal (insn))
2488 notice_eh_throw (insn);
2489 dwarf2out_flush_queued_reg_saves ();
2491 else if (!NONJUMP_INSN_P (insn)
2492 || clobbers_queued_reg_save (insn)
2493 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
2494 dwarf2out_flush_queued_reg_saves ();
2495 any_cfis_emitted = false;
2497 add_cfi_insn = insn;
2498 scan_insn_after (insn);
2499 control = insn;
2502 /* Between frame-related-p and args_size we might have otherwise
2503 emitted two cfa adjustments. Do it now. */
2504 def_cfa_1 (&this_cfa);
2506 /* Minimize the number of advances by emitting the entire queue
2507 once anything is emitted. */
2508 if (any_cfis_emitted
2509 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
2510 dwarf2out_flush_queued_reg_saves ();
2512 /* Note that a test for control_flow_insn_p does exactly the
2513 same tests as are done to actually create the edges. So
2514 always call the routine and let it not create edges for
2515 non-control-flow insns. */
2516 create_trace_edges (control);
2519 add_cfi_insn = NULL;
2520 cur_row = NULL;
2521 cur_trace = NULL;
2522 cur_cfa = NULL;
2525 /* Scan the function and create the initial set of CFI notes. */
2527 static void
2528 create_cfi_notes (void)
2530 dw_trace_info *ti;
2532 gcc_checking_assert (!queued_reg_saves.exists ());
2533 gcc_checking_assert (!trace_work_list.exists ());
2535 /* Always begin at the entry trace. */
2536 ti = &trace_info[0];
2537 scan_trace (ti);
2539 while (!trace_work_list.is_empty ())
2541 ti = trace_work_list.pop ();
2542 scan_trace (ti);
2545 queued_reg_saves.release ();
2546 trace_work_list.release ();
2549 /* Return the insn before the first NOTE_INSN_CFI after START. */
2551 static rtx
2552 before_next_cfi_note (rtx start)
2554 rtx prev = start;
2555 while (start)
2557 if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
2558 return prev;
2559 prev = start;
2560 start = NEXT_INSN (start);
2562 gcc_unreachable ();
2565 /* Insert CFI notes between traces to properly change state between them. */
2567 static void
2568 connect_traces (void)
2570 unsigned i, n = trace_info.length ();
2571 dw_trace_info *prev_ti, *ti;
2573 /* ??? Ideally, we should have both queued and processed every trace.
2574 However the current representation of constant pools on various targets
2575 is indistinguishable from unreachable code. Assume for the moment that
2576 we can simply skip over such traces. */
2577 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2578 these are not "real" instructions, and should not be considered.
2579 This could be generically useful for tablejump data as well. */
2580 /* Remove all unprocessed traces from the list. */
2581 for (i = n - 1; i > 0; --i)
2583 ti = &trace_info[i];
2584 if (ti->beg_row == NULL)
2586 trace_info.ordered_remove (i);
2587 n -= 1;
2589 else
2590 gcc_assert (ti->end_row != NULL);
2593 /* Work from the end back to the beginning. This lets us easily insert
2594 remember/restore_state notes in the correct order wrt other notes. */
2595 prev_ti = &trace_info[n - 1];
2596 for (i = n - 1; i > 0; --i)
2598 dw_cfi_row *old_row;
2600 ti = prev_ti;
2601 prev_ti = &trace_info[i - 1];
2603 add_cfi_insn = ti->head;
2605 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2606 for the portion of the function in the alternate text
2607 section. The row state at the very beginning of that
2608 new FDE will be exactly the row state from the CIE. */
2609 if (ti->switch_sections)
2610 old_row = cie_cfi_row;
2611 else
2613 old_row = prev_ti->end_row;
2614 /* If there's no change from the previous end state, fine. */
2615 if (cfi_row_equal_p (old_row, ti->beg_row))
2617 /* Otherwise check for the common case of sharing state with
2618 the beginning of an epilogue, but not the end. Insert
2619 remember/restore opcodes in that case. */
2620 else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row))
2622 dw_cfi_ref cfi;
2624 /* Note that if we blindly insert the remember at the
2625 start of the trace, we can wind up increasing the
2626 size of the unwind info due to extra advance opcodes.
2627 Instead, put the remember immediately before the next
2628 state change. We know there must be one, because the
2629 state at the beginning and head of the trace differ. */
2630 add_cfi_insn = before_next_cfi_note (prev_ti->head);
2631 cfi = new_cfi ();
2632 cfi->dw_cfi_opc = DW_CFA_remember_state;
2633 add_cfi (cfi);
2635 add_cfi_insn = ti->head;
2636 cfi = new_cfi ();
2637 cfi->dw_cfi_opc = DW_CFA_restore_state;
2638 add_cfi (cfi);
2640 old_row = prev_ti->beg_row;
2642 /* Otherwise, we'll simply change state from the previous end. */
2645 change_cfi_row (old_row, ti->beg_row);
2647 if (dump_file && add_cfi_insn != ti->head)
2649 rtx note;
2651 fprintf (dump_file, "Fixup between trace %u and %u:\n",
2652 prev_ti->id, ti->id);
2654 note = ti->head;
2657 note = NEXT_INSN (note);
2658 gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI);
2659 output_cfi_directive (dump_file, NOTE_CFI (note));
2661 while (note != add_cfi_insn);
2665 /* Connect args_size between traces that have can_throw_internal insns. */
2666 if (cfun->eh->lp_array)
2668 HOST_WIDE_INT prev_args_size = 0;
2670 for (i = 0; i < n; ++i)
2672 ti = &trace_info[i];
2674 if (ti->switch_sections)
2675 prev_args_size = 0;
2676 if (ti->eh_head == NULL)
2677 continue;
2678 gcc_assert (!ti->args_size_undefined);
2680 if (ti->beg_delay_args_size != prev_args_size)
2682 /* ??? Search back to previous CFI note. */
2683 add_cfi_insn = PREV_INSN (ti->eh_head);
2684 add_cfi_args_size (ti->beg_delay_args_size);
2687 prev_args_size = ti->end_delay_args_size;
2692 /* Set up the pseudo-cfg of instruction traces, as described at the
2693 block comment at the top of the file. */
2695 static void
2696 create_pseudo_cfg (void)
2698 bool saw_barrier, switch_sections;
2699 dw_trace_info ti;
2700 rtx insn;
2701 unsigned i;
2703 /* The first trace begins at the start of the function,
2704 and begins with the CIE row state. */
2705 trace_info.create (16);
2706 memset (&ti, 0, sizeof (ti));
2707 ti.head = get_insns ();
2708 ti.beg_row = cie_cfi_row;
2709 ti.cfa_store = cie_cfi_row->cfa;
2710 ti.cfa_temp.reg = INVALID_REGNUM;
2711 trace_info.quick_push (ti);
2713 if (cie_return_save)
2714 ti.regs_saved_in_regs.safe_push (*cie_return_save);
2716 /* Walk all the insns, collecting start of trace locations. */
2717 saw_barrier = false;
2718 switch_sections = false;
2719 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2721 if (BARRIER_P (insn))
2722 saw_barrier = true;
2723 else if (NOTE_P (insn)
2724 && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2726 /* We should have just seen a barrier. */
2727 gcc_assert (saw_barrier);
2728 switch_sections = true;
2730 /* Watch out for save_point notes between basic blocks.
2731 In particular, a note after a barrier. Do not record these,
2732 delaying trace creation until the label. */
2733 else if (save_point_p (insn)
2734 && (LABEL_P (insn) || !saw_barrier))
2736 memset (&ti, 0, sizeof (ti));
2737 ti.head = insn;
2738 ti.switch_sections = switch_sections;
2739 ti.id = trace_info.length () - 1;
2740 trace_info.safe_push (ti);
2742 saw_barrier = false;
2743 switch_sections = false;
2747 /* Create the trace index after we've finished building trace_info,
2748 avoiding stale pointer problems due to reallocation. */
2749 trace_index = htab_create (trace_info.length (),
2750 dw_trace_info_hash, dw_trace_info_eq, NULL);
2751 dw_trace_info *tp;
2752 FOR_EACH_VEC_ELT (trace_info, i, tp)
2754 void **slot;
2756 if (dump_file)
2757 fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i,
2758 rtx_name[(int) GET_CODE (tp->head)], INSN_UID (tp->head),
2759 tp->switch_sections ? " (section switch)" : "");
2761 slot = htab_find_slot_with_hash (trace_index, tp,
2762 INSN_UID (tp->head), INSERT);
2763 gcc_assert (*slot == NULL);
2764 *slot = (void *) tp;
2768 /* Record the initial position of the return address. RTL is
2769 INCOMING_RETURN_ADDR_RTX. */
2771 static void
2772 initial_return_save (rtx rtl)
2774 unsigned int reg = INVALID_REGNUM;
2775 HOST_WIDE_INT offset = 0;
2777 switch (GET_CODE (rtl))
2779 case REG:
2780 /* RA is in a register. */
2781 reg = dwf_regno (rtl);
2782 break;
2784 case MEM:
2785 /* RA is on the stack. */
2786 rtl = XEXP (rtl, 0);
2787 switch (GET_CODE (rtl))
2789 case REG:
2790 gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM);
2791 offset = 0;
2792 break;
2794 case PLUS:
2795 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2796 offset = INTVAL (XEXP (rtl, 1));
2797 break;
2799 case MINUS:
2800 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2801 offset = -INTVAL (XEXP (rtl, 1));
2802 break;
2804 default:
2805 gcc_unreachable ();
2808 break;
2810 case PLUS:
2811 /* The return address is at some offset from any value we can
2812 actually load. For instance, on the SPARC it is in %i7+8. Just
2813 ignore the offset for now; it doesn't matter for unwinding frames. */
2814 gcc_assert (CONST_INT_P (XEXP (rtl, 1)));
2815 initial_return_save (XEXP (rtl, 0));
2816 return;
2818 default:
2819 gcc_unreachable ();
2822 if (reg != DWARF_FRAME_RETURN_COLUMN)
2824 if (reg != INVALID_REGNUM)
2825 record_reg_saved_in_reg (rtl, pc_rtx);
2826 reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset);
2830 static void
2831 create_cie_data (void)
2833 dw_cfa_location loc;
2834 dw_trace_info cie_trace;
2836 dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
2837 dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM);
2839 memset (&cie_trace, 0, sizeof(cie_trace));
2840 cur_trace = &cie_trace;
2842 add_cfi_vec = &cie_cfi_vec;
2843 cie_cfi_row = cur_row = new_cfi_row ();
2845 /* On entry, the Canonical Frame Address is at SP. */
2846 memset(&loc, 0, sizeof (loc));
2847 loc.reg = dw_stack_pointer_regnum;
2848 loc.offset = INCOMING_FRAME_SP_OFFSET;
2849 def_cfa_1 (&loc);
2851 if (targetm.debug_unwind_info () == UI_DWARF2
2852 || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
2854 initial_return_save (INCOMING_RETURN_ADDR_RTX);
2856 /* For a few targets, we have the return address incoming into a
2857 register, but choose a different return column. This will result
2858 in a DW_CFA_register for the return, and an entry in
2859 regs_saved_in_regs to match. If the target later stores that
2860 return address register to the stack, we want to be able to emit
2861 the DW_CFA_offset against the return column, not the intermediate
2862 save register. Save the contents of regs_saved_in_regs so that
2863 we can re-initialize it at the start of each function. */
2864 switch (cie_trace.regs_saved_in_regs.length ())
2866 case 0:
2867 break;
2868 case 1:
2869 cie_return_save = ggc_alloc_reg_saved_in_data ();
2870 *cie_return_save = cie_trace.regs_saved_in_regs[0];
2871 cie_trace.regs_saved_in_regs.release ();
2872 break;
2873 default:
2874 gcc_unreachable ();
2878 add_cfi_vec = NULL;
2879 cur_row = NULL;
2880 cur_trace = NULL;
2883 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2884 state at each location within the function. These notes will be
2885 emitted during pass_final. */
2887 static unsigned int
2888 execute_dwarf2_frame (void)
2890 /* The first time we're called, compute the incoming frame state. */
2891 if (cie_cfi_vec == NULL)
2892 create_cie_data ();
2894 dwarf2out_alloc_current_fde ();
2896 create_pseudo_cfg ();
2898 /* Do the work. */
2899 create_cfi_notes ();
2900 connect_traces ();
2901 add_cfis_to_fde ();
2903 /* Free all the data we allocated. */
2905 size_t i;
2906 dw_trace_info *ti;
2908 FOR_EACH_VEC_ELT (trace_info, i, ti)
2909 ti->regs_saved_in_regs.release ();
2911 trace_info.release ();
2913 htab_delete (trace_index);
2914 trace_index = NULL;
2916 return 0;
2919 /* Convert a DWARF call frame info. operation to its string name */
2921 static const char *
2922 dwarf_cfi_name (unsigned int cfi_opc)
2924 const char *name = get_DW_CFA_name (cfi_opc);
2926 if (name != NULL)
2927 return name;
2929 return "DW_CFA_<unknown>";
2932 /* This routine will generate the correct assembly data for a location
2933 description based on a cfi entry with a complex address. */
2935 static void
2936 output_cfa_loc (dw_cfi_ref cfi, int for_eh)
2938 dw_loc_descr_ref loc;
2939 unsigned long size;
2941 if (cfi->dw_cfi_opc == DW_CFA_expression)
2943 unsigned r =
2944 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
2945 dw2_asm_output_data (1, r, NULL);
2946 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
2948 else
2949 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
2951 /* Output the size of the block. */
2952 size = size_of_locs (loc);
2953 dw2_asm_output_data_uleb128 (size, NULL);
2955 /* Now output the operations themselves. */
2956 output_loc_sequence (loc, for_eh);
2959 /* Similar, but used for .cfi_escape. */
2961 static void
2962 output_cfa_loc_raw (dw_cfi_ref cfi)
2964 dw_loc_descr_ref loc;
2965 unsigned long size;
2967 if (cfi->dw_cfi_opc == DW_CFA_expression)
2969 unsigned r =
2970 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
2971 fprintf (asm_out_file, "%#x,", r);
2972 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
2974 else
2975 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
2977 /* Output the size of the block. */
2978 size = size_of_locs (loc);
2979 dw2_asm_output_data_uleb128_raw (size);
2980 fputc (',', asm_out_file);
2982 /* Now output the operations themselves. */
2983 output_loc_sequence_raw (loc);
2986 /* Output a Call Frame Information opcode and its operand(s). */
2988 void
2989 output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh)
2991 unsigned long r;
2992 HOST_WIDE_INT off;
2994 if (cfi->dw_cfi_opc == DW_CFA_advance_loc)
2995 dw2_asm_output_data (1, (cfi->dw_cfi_opc
2996 | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)),
2997 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX,
2998 ((unsigned HOST_WIDE_INT)
2999 cfi->dw_cfi_oprnd1.dw_cfi_offset));
3000 else if (cfi->dw_cfi_opc == DW_CFA_offset)
3002 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3003 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3004 "DW_CFA_offset, column %#lx", r);
3005 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3006 dw2_asm_output_data_uleb128 (off, NULL);
3008 else if (cfi->dw_cfi_opc == DW_CFA_restore)
3010 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3011 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3012 "DW_CFA_restore, column %#lx", r);
3014 else
3016 dw2_asm_output_data (1, cfi->dw_cfi_opc,
3017 "%s", dwarf_cfi_name (cfi->dw_cfi_opc));
3019 switch (cfi->dw_cfi_opc)
3021 case DW_CFA_set_loc:
3022 if (for_eh)
3023 dw2_asm_output_encoded_addr_rtx (
3024 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3025 gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr),
3026 false, NULL);
3027 else
3028 dw2_asm_output_addr (DWARF2_ADDR_SIZE,
3029 cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL);
3030 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3031 break;
3033 case DW_CFA_advance_loc1:
3034 dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3035 fde->dw_fde_current_label, NULL);
3036 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3037 break;
3039 case DW_CFA_advance_loc2:
3040 dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3041 fde->dw_fde_current_label, NULL);
3042 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3043 break;
3045 case DW_CFA_advance_loc4:
3046 dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3047 fde->dw_fde_current_label, NULL);
3048 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3049 break;
3051 case DW_CFA_MIPS_advance_loc8:
3052 dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3053 fde->dw_fde_current_label, NULL);
3054 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3055 break;
3057 case DW_CFA_offset_extended:
3058 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3059 dw2_asm_output_data_uleb128 (r, NULL);
3060 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3061 dw2_asm_output_data_uleb128 (off, NULL);
3062 break;
3064 case DW_CFA_def_cfa:
3065 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3066 dw2_asm_output_data_uleb128 (r, NULL);
3067 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL);
3068 break;
3070 case DW_CFA_offset_extended_sf:
3071 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3072 dw2_asm_output_data_uleb128 (r, NULL);
3073 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3074 dw2_asm_output_data_sleb128 (off, NULL);
3075 break;
3077 case DW_CFA_def_cfa_sf:
3078 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3079 dw2_asm_output_data_uleb128 (r, NULL);
3080 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3081 dw2_asm_output_data_sleb128 (off, NULL);
3082 break;
3084 case DW_CFA_restore_extended:
3085 case DW_CFA_undefined:
3086 case DW_CFA_same_value:
3087 case DW_CFA_def_cfa_register:
3088 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3089 dw2_asm_output_data_uleb128 (r, NULL);
3090 break;
3092 case DW_CFA_register:
3093 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3094 dw2_asm_output_data_uleb128 (r, NULL);
3095 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh);
3096 dw2_asm_output_data_uleb128 (r, NULL);
3097 break;
3099 case DW_CFA_def_cfa_offset:
3100 case DW_CFA_GNU_args_size:
3101 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL);
3102 break;
3104 case DW_CFA_def_cfa_offset_sf:
3105 off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3106 dw2_asm_output_data_sleb128 (off, NULL);
3107 break;
3109 case DW_CFA_GNU_window_save:
3110 break;
3112 case DW_CFA_def_cfa_expression:
3113 case DW_CFA_expression:
3114 output_cfa_loc (cfi, for_eh);
3115 break;
3117 case DW_CFA_GNU_negative_offset_extended:
3118 /* Obsoleted by DW_CFA_offset_extended_sf. */
3119 gcc_unreachable ();
3121 default:
3122 break;
3127 /* Similar, but do it via assembler directives instead. */
3129 void
3130 output_cfi_directive (FILE *f, dw_cfi_ref cfi)
3132 unsigned long r, r2;
3134 switch (cfi->dw_cfi_opc)
3136 case DW_CFA_advance_loc:
3137 case DW_CFA_advance_loc1:
3138 case DW_CFA_advance_loc2:
3139 case DW_CFA_advance_loc4:
3140 case DW_CFA_MIPS_advance_loc8:
3141 case DW_CFA_set_loc:
3142 /* Should only be created in a code path not followed when emitting
3143 via directives. The assembler is going to take care of this for
3144 us. But this routines is also used for debugging dumps, so
3145 print something. */
3146 gcc_assert (f != asm_out_file);
3147 fprintf (f, "\t.cfi_advance_loc\n");
3148 break;
3150 case DW_CFA_offset:
3151 case DW_CFA_offset_extended:
3152 case DW_CFA_offset_extended_sf:
3153 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3154 fprintf (f, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3155 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3156 break;
3158 case DW_CFA_restore:
3159 case DW_CFA_restore_extended:
3160 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3161 fprintf (f, "\t.cfi_restore %lu\n", r);
3162 break;
3164 case DW_CFA_undefined:
3165 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3166 fprintf (f, "\t.cfi_undefined %lu\n", r);
3167 break;
3169 case DW_CFA_same_value:
3170 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3171 fprintf (f, "\t.cfi_same_value %lu\n", r);
3172 break;
3174 case DW_CFA_def_cfa:
3175 case DW_CFA_def_cfa_sf:
3176 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3177 fprintf (f, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3178 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3179 break;
3181 case DW_CFA_def_cfa_register:
3182 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3183 fprintf (f, "\t.cfi_def_cfa_register %lu\n", r);
3184 break;
3186 case DW_CFA_register:
3187 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3188 r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1);
3189 fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2);
3190 break;
3192 case DW_CFA_def_cfa_offset:
3193 case DW_CFA_def_cfa_offset_sf:
3194 fprintf (f, "\t.cfi_def_cfa_offset "
3195 HOST_WIDE_INT_PRINT_DEC"\n",
3196 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3197 break;
3199 case DW_CFA_remember_state:
3200 fprintf (f, "\t.cfi_remember_state\n");
3201 break;
3202 case DW_CFA_restore_state:
3203 fprintf (f, "\t.cfi_restore_state\n");
3204 break;
3206 case DW_CFA_GNU_args_size:
3207 if (f == asm_out_file)
3209 fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size);
3210 dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3211 if (flag_debug_asm)
3212 fprintf (f, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC,
3213 ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset);
3214 fputc ('\n', f);
3216 else
3218 fprintf (f, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC "\n",
3219 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3221 break;
3223 case DW_CFA_GNU_window_save:
3224 fprintf (f, "\t.cfi_window_save\n");
3225 break;
3227 case DW_CFA_def_cfa_expression:
3228 if (f != asm_out_file)
3230 fprintf (f, "\t.cfi_def_cfa_expression ...\n");
3231 break;
3233 /* FALLTHRU */
3234 case DW_CFA_expression:
3235 if (f != asm_out_file)
3237 fprintf (f, "\t.cfi_cfa_expression ...\n");
3238 break;
3240 fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc);
3241 output_cfa_loc_raw (cfi);
3242 fputc ('\n', f);
3243 break;
3245 default:
3246 gcc_unreachable ();
3250 void
3251 dwarf2out_emit_cfi (dw_cfi_ref cfi)
3253 if (dwarf2out_do_cfi_asm ())
3254 output_cfi_directive (asm_out_file, cfi);
3257 static void
3258 dump_cfi_row (FILE *f, dw_cfi_row *row)
3260 dw_cfi_ref cfi;
3261 unsigned i;
3263 cfi = row->cfa_cfi;
3264 if (!cfi)
3266 dw_cfa_location dummy;
3267 memset(&dummy, 0, sizeof(dummy));
3268 dummy.reg = INVALID_REGNUM;
3269 cfi = def_cfa_0 (&dummy, &row->cfa);
3271 output_cfi_directive (f, cfi);
3273 FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi)
3274 if (cfi)
3275 output_cfi_directive (f, cfi);
3278 void debug_cfi_row (dw_cfi_row *row);
3280 void
3281 debug_cfi_row (dw_cfi_row *row)
3283 dump_cfi_row (stderr, row);
3287 /* Save the result of dwarf2out_do_frame across PCH.
3288 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3289 static GTY(()) signed char saved_do_cfi_asm = 0;
3291 /* Decide whether we want to emit frame unwind information for the current
3292 translation unit. */
3294 bool
3295 dwarf2out_do_frame (void)
3297 /* We want to emit correct CFA location expressions or lists, so we
3298 have to return true if we're going to output debug info, even if
3299 we're not going to output frame or unwind info. */
3300 if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
3301 return true;
3303 if (saved_do_cfi_asm > 0)
3304 return true;
3306 if (targetm.debug_unwind_info () == UI_DWARF2)
3307 return true;
3309 if ((flag_unwind_tables || flag_exceptions)
3310 && targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
3311 return true;
3313 return false;
3316 /* Decide whether to emit frame unwind via assembler directives. */
3318 bool
3319 dwarf2out_do_cfi_asm (void)
3321 int enc;
3323 if (saved_do_cfi_asm != 0)
3324 return saved_do_cfi_asm > 0;
3326 /* Assume failure for a moment. */
3327 saved_do_cfi_asm = -1;
3329 if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ())
3330 return false;
3331 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
3332 return false;
3334 /* Make sure the personality encoding is one the assembler can support.
3335 In particular, aligned addresses can't be handled. */
3336 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3337 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3338 return false;
3339 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3340 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3341 return false;
3343 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3344 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3345 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3346 && !flag_unwind_tables && !flag_exceptions
3347 && targetm_common.except_unwind_info (&global_options) != UI_DWARF2)
3348 return false;
3350 /* Success! */
3351 saved_do_cfi_asm = 1;
3352 return true;
3355 static bool
3356 gate_dwarf2_frame (void)
3358 #ifndef HAVE_prologue
3359 /* Targets which still implement the prologue in assembler text
3360 cannot use the generic dwarf2 unwinding. */
3361 return false;
3362 #endif
3364 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3365 from the optimized shrink-wrapping annotations that we will compute.
3366 For now, only produce the CFI notes for dwarf2. */
3367 return dwarf2out_do_frame ();
3370 struct rtl_opt_pass pass_dwarf2_frame =
3373 RTL_PASS,
3374 "dwarf2", /* name */
3375 OPTGROUP_NONE, /* optinfo_flags */
3376 gate_dwarf2_frame, /* gate */
3377 execute_dwarf2_frame, /* execute */
3378 NULL, /* sub */
3379 NULL, /* next */
3380 0, /* static_pass_number */
3381 TV_FINAL, /* tv_id */
3382 0, /* properties_required */
3383 0, /* properties_provided */
3384 0, /* properties_destroyed */
3385 0, /* todo_flags_start */
3386 0 /* todo_flags_finish */
3390 #include "gt-dwarf2cfi.h"