* rtl.h (rtunion_def): Constify member `rtstr'.
[official-gcc.git] / gcc / caller-save.c
blob305894ede91be8c8cee910d48807f095cf187177
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "insn-config.h"
26 #include "flags.h"
27 #include "regs.h"
28 #include "hard-reg-set.h"
29 #include "recog.h"
30 #include "basic-block.h"
31 #include "reload.h"
32 #include "function.h"
33 #include "expr.h"
34 #include "toplev.h"
35 #include "tm_p.h"
37 #ifndef MAX_MOVE_MAX
38 #define MAX_MOVE_MAX MOVE_MAX
39 #endif
41 #ifndef MIN_UNITS_PER_WORD
42 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
43 #endif
45 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
47 /* Modes for each hard register that we can save. The smallest mode is wide
48 enough to save the entire contents of the register. When saving the
49 register because it is live we first try to save in multi-register modes.
50 If that is not possible the save is done one register at a time. */
52 static enum machine_mode
53 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* For each hard register, a place on the stack where it can be saved,
56 if needed. */
58 static rtx
59 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
61 /* We will only make a register eligible for caller-save if it can be
62 saved in its widest mode with a simple SET insn as long as the memory
63 address is valid. We record the INSN_CODE is those insns here since
64 when we emit them, the addresses might not be valid, so they might not
65 be recognized. */
67 static enum insn_code
68 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
69 static enum insn_code
70 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
72 /* Set of hard regs currently residing in save area (during insn scan). */
74 static HARD_REG_SET hard_regs_saved;
76 /* Number of registers currently in hard_regs_saved. */
78 static int n_regs_saved;
80 /* Computed by mark_referenced_regs, all regs referenced in a given
81 insn. */
82 static HARD_REG_SET referenced_regs;
84 /* Computed in mark_set_regs, holds all registers set by the current
85 instruction. */
86 static HARD_REG_SET this_insn_sets;
89 static void mark_set_regs PARAMS ((rtx, rtx, void *));
90 static void mark_referenced_regs PARAMS ((rtx));
91 static int insert_save PARAMS ((struct insn_chain *, int, int,
92 HARD_REG_SET *));
93 static int insert_restore PARAMS ((struct insn_chain *, int, int,
94 int));
95 static struct insn_chain *insert_one_insn PARAMS ((struct insn_chain *, int,
96 enum insn_code, rtx));
97 static void add_stored_regs PARAMS ((rtx, rtx, void *));
99 /* Initialize for caller-save.
101 Look at all the hard registers that are used by a call and for which
102 regclass.c has not already excluded from being used across a call.
104 Ensure that we can find a mode to save the register and that there is a
105 simple insn to save and restore the register. This latter check avoids
106 problems that would occur if we tried to save the MQ register of some
107 machines directly into memory. */
109 void
110 init_caller_save ()
112 char *first_obj = (char *) oballoc (0);
113 rtx addr_reg;
114 int offset;
115 rtx address;
116 int i, j;
118 /* First find all the registers that we need to deal with and all
119 the modes that they can have. If we can't find a mode to use,
120 we can't have the register live over calls. */
122 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
124 if (call_used_regs[i] && ! call_fixed_regs[i])
126 for (j = 1; j <= MOVE_MAX_WORDS; j++)
128 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j);
129 if (regno_save_mode[i][j] == VOIDmode && j == 1)
131 call_fixed_regs[i] = 1;
132 SET_HARD_REG_BIT (call_fixed_reg_set, i);
136 else
137 regno_save_mode[i][1] = VOIDmode;
140 /* The following code tries to approximate the conditions under which
141 we can easily save and restore a register without scratch registers or
142 other complexities. It will usually work, except under conditions where
143 the validity of an insn operand is dependent on the address offset.
144 No such cases are currently known.
146 We first find a typical offset from some BASE_REG_CLASS register.
147 This address is chosen by finding the first register in the class
148 and by finding the smallest power of two that is a valid offset from
149 that register in every mode we will use to save registers. */
151 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
152 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
153 break;
155 if (i == FIRST_PSEUDO_REGISTER)
156 abort ();
158 addr_reg = gen_rtx_REG (Pmode, i);
160 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
162 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
164 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
165 if (regno_save_mode[i][1] != VOIDmode
166 && ! strict_memory_address_p (regno_save_mode[i][1], address))
167 break;
169 if (i == FIRST_PSEUDO_REGISTER)
170 break;
173 /* If we didn't find a valid address, we must use register indirect. */
174 if (offset == 0)
175 address = addr_reg;
177 /* Next we try to form an insn to save and restore the register. We
178 see if such an insn is recognized and meets its constraints. */
180 start_sequence ();
182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
183 for (j = 1; j <= MOVE_MAX_WORDS; j++)
184 if (regno_save_mode[i][j] != VOIDmode)
186 rtx mem = gen_rtx_MEM (regno_save_mode[i][j], address);
187 rtx reg = gen_rtx_REG (regno_save_mode[i][j], i);
188 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
189 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
190 rtx saveinsn = emit_insn (savepat);
191 rtx restinsn = emit_insn (restpat);
192 int ok;
194 reg_save_code[i][j] = recog_memoized (saveinsn);
195 reg_restore_code[i][j] = recog_memoized (restinsn);
197 /* Now extract both insns and see if we can meet their
198 constraints. */
199 ok = (reg_save_code[i][j] != (enum insn_code)-1
200 && reg_restore_code[i][j] != (enum insn_code)-1);
201 if (ok)
203 extract_insn (saveinsn);
204 ok = constrain_operands (1);
205 extract_insn (restinsn);
206 ok &= constrain_operands (1);
209 if (! ok)
211 regno_save_mode[i][j] = VOIDmode;
212 if (j == 1)
214 call_fixed_regs[i] = 1;
215 SET_HARD_REG_BIT (call_fixed_reg_set, i);
220 end_sequence ();
222 obfree (first_obj);
225 /* Initialize save areas by showing that we haven't allocated any yet. */
227 void
228 init_save_areas ()
230 int i, j;
232 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
233 for (j = 1; j <= MOVE_MAX_WORDS; j++)
234 regno_save_mem[i][j] = 0;
237 /* Allocate save areas for any hard registers that might need saving.
238 We take a conservative approach here and look for call-clobbered hard
239 registers that are assigned to pseudos that cross calls. This may
240 overestimate slightly (especially if some of these registers are later
241 used as spill registers), but it should not be significant.
243 Future work:
245 In the fallback case we should iterate backwards across all possible
246 modes for the save, choosing the largest available one instead of
247 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
249 We do not try to use "move multiple" instructions that exist
250 on some machines (such as the 68k moveml). It could be a win to try
251 and use them when possible. The hard part is doing it in a way that is
252 machine independent since they might be saving non-consecutive
253 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
255 void
256 setup_save_areas ()
258 int i, j, k;
259 HARD_REG_SET hard_regs_used;
261 /* Allocate space in the save area for the largest multi-register
262 pseudos first, then work backwards to single register
263 pseudos. */
265 /* Find and record all call-used hard-registers in this function. */
266 CLEAR_HARD_REG_SET (hard_regs_used);
267 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
268 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
270 int regno = reg_renumber[i];
271 int endregno
272 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
273 int nregs = endregno - regno;
275 for (j = 0; j < nregs; j++)
277 if (call_used_regs[regno+j])
278 SET_HARD_REG_BIT (hard_regs_used, regno+j);
282 /* Now run through all the call-used hard-registers and allocate
283 space for them in the caller-save area. Try to allocate space
284 in a manner which allows multi-register saves/restores to be done. */
286 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
287 for (j = MOVE_MAX_WORDS; j > 0; j--)
289 int do_save = 1;
291 /* If no mode exists for this size, try another. Also break out
292 if we have already saved this hard register. */
293 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
294 continue;
296 /* See if any register in this group has been saved. */
297 for (k = 0; k < j; k++)
298 if (regno_save_mem[i + k][1])
300 do_save = 0;
301 break;
303 if (! do_save)
304 continue;
306 for (k = 0; k < j; k++)
307 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
309 do_save = 0;
310 break;
312 if (! do_save)
313 continue;
315 /* We have found an acceptable mode to store in. */
316 regno_save_mem[i][j]
317 = assign_stack_local (regno_save_mode[i][j],
318 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
320 /* Setup single word save area just in case... */
321 for (k = 0; k < j; k++)
323 /* This should not depend on WORDS_BIG_ENDIAN.
324 The order of words in regs is the same as in memory. */
325 rtx temp = gen_rtx_MEM (regno_save_mode[i+k][1],
326 XEXP (regno_save_mem[i][j], 0));
328 regno_save_mem[i+k][1]
329 = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
334 /* Find the places where hard regs are live across calls and save them. */
335 void
336 save_call_clobbered_regs ()
338 struct insn_chain *chain, *next;
340 CLEAR_HARD_REG_SET (hard_regs_saved);
341 n_regs_saved = 0;
343 for (chain = reload_insn_chain; chain != 0; chain = next)
345 rtx insn = chain->insn;
346 enum rtx_code code = GET_CODE (insn);
348 next = chain->next;
350 if (chain->is_caller_save_insn)
351 abort ();
353 if (GET_RTX_CLASS (code) == 'i')
355 /* If some registers have been saved, see if INSN references
356 any of them. We must restore them before the insn if so. */
358 if (n_regs_saved)
360 int regno;
362 if (code == JUMP_INSN)
363 /* Restore all registers if this is a JUMP_INSN. */
364 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
365 else
367 CLEAR_HARD_REG_SET (referenced_regs);
368 mark_referenced_regs (PATTERN (insn));
369 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
372 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
373 if (TEST_HARD_REG_BIT (referenced_regs, regno))
374 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS);
377 if (code == CALL_INSN)
379 int regno;
380 HARD_REG_SET hard_regs_to_save;
382 /* Use the register life information in CHAIN to compute which
383 regs are live during the call. */
384 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
385 &chain->live_throughout);
386 compute_use_by_pseudos (&hard_regs_to_save,
387 &chain->live_throughout);
389 /* Record all registers set in this call insn. These don't need
390 to be saved. N.B. the call insn might set a subreg of a
391 multi-hard-reg pseudo; then the pseudo is considered live
392 during the call, but the subreg that is set isn't. */
393 CLEAR_HARD_REG_SET (this_insn_sets);
394 note_stores (PATTERN (insn), mark_set_regs, NULL);
396 /* Compute which hard regs must be saved before this call. */
397 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
398 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
399 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
400 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
402 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
403 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
404 regno += insert_save (chain, 1, regno, &hard_regs_to_save);
406 /* Must recompute n_regs_saved. */
407 n_regs_saved = 0;
408 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
409 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
410 n_regs_saved++;
414 if (chain->next == 0 || chain->next->block > chain->block)
416 int regno;
417 /* At the end of the basic block, we must restore any registers that
418 remain saved. If the last insn in the block is a JUMP_INSN, put
419 the restore before the insn, otherwise, put it after the insn. */
421 if (n_regs_saved)
422 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
423 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
424 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
425 regno, MOVE_MAX_WORDS);
430 /* Here from note_stores when an insn stores a value in a register.
431 Set the proper bit or bits in this_insn_sets. All pseudos that have
432 been assigned hard regs have had their register number changed already,
433 so we can ignore pseudos. */
434 static void
435 mark_set_regs (reg, setter, data)
436 rtx reg;
437 rtx setter ATTRIBUTE_UNUSED;
438 void *data ATTRIBUTE_UNUSED;
440 register int regno, endregno, i;
441 enum machine_mode mode = GET_MODE (reg);
442 int word = 0;
444 if (GET_CODE (reg) == SUBREG)
446 word = SUBREG_WORD (reg);
447 reg = SUBREG_REG (reg);
450 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
451 return;
453 regno = REGNO (reg) + word;
454 endregno = regno + HARD_REGNO_NREGS (regno, mode);
456 for (i = regno; i < endregno; i++)
457 SET_HARD_REG_BIT (this_insn_sets, i);
460 /* Here from note_stores when an insn stores a value in a register.
461 Set the proper bit or bits in the passed regset. All pseudos that have
462 been assigned hard regs have had their register number changed already,
463 so we can ignore pseudos. */
464 static void
465 add_stored_regs (reg, setter, data)
466 rtx reg;
467 rtx setter;
468 void *data;
470 register int regno, endregno, i;
471 enum machine_mode mode = GET_MODE (reg);
472 int word = 0;
474 if (GET_CODE (setter) == CLOBBER)
475 return;
477 while (GET_CODE (reg) == SUBREG)
479 word += SUBREG_WORD (reg);
480 reg = SUBREG_REG (reg);
483 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
484 return;
486 regno = REGNO (reg) + word;
487 endregno = regno + HARD_REGNO_NREGS (regno, mode);
489 for (i = regno; i < endregno; i++)
490 SET_REGNO_REG_SET ((regset) data, i);
493 /* Walk X and record all referenced registers in REFERENCED_REGS. */
494 static void
495 mark_referenced_regs (x)
496 rtx x;
498 enum rtx_code code = GET_CODE (x);
499 const char *fmt;
500 int i, j;
502 if (code == SET)
503 mark_referenced_regs (SET_SRC (x));
504 if (code == SET || code == CLOBBER)
506 x = SET_DEST (x);
507 code = GET_CODE (x);
508 if (code == REG || code == PC || code == CC0
509 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
510 return;
512 if (code == MEM || code == SUBREG)
514 x = XEXP (x, 0);
515 code = GET_CODE (x);
518 if (code == REG)
520 int regno = REGNO (x);
521 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
522 : reg_renumber[regno]);
524 if (hardregno >= 0)
526 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
527 while (nregs-- > 0)
528 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
530 /* If this is a pseudo that did not get a hard register, scan its
531 memory location, since it might involve the use of another
532 register, which might be saved. */
533 else if (reg_equiv_mem[regno] != 0)
534 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
535 else if (reg_equiv_address[regno] != 0)
536 mark_referenced_regs (reg_equiv_address[regno]);
537 return;
540 fmt = GET_RTX_FORMAT (code);
541 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
543 if (fmt[i] == 'e')
544 mark_referenced_regs (XEXP (x, i));
545 else if (fmt[i] == 'E')
546 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
547 mark_referenced_regs (XVECEXP (x, i, j));
551 /* Insert a sequence of insns to restore. Place these insns in front of
552 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
553 the maximum number of registers which should be restored during this call.
554 It should never be less than 1 since we only work with entire registers.
556 Note that we have verified in init_caller_save that we can do this
557 with a simple SET, so use it. Set INSN_CODE to what we save there
558 since the address might not be valid so the insn might not be recognized.
559 These insns will be reloaded and have register elimination done by
560 find_reload, so we need not worry about that here.
562 Return the extra number of registers saved. */
564 static int
565 insert_restore (chain, before_p, regno, maxrestore)
566 struct insn_chain *chain;
567 int before_p;
568 int regno;
569 int maxrestore;
571 int i, k;
572 rtx pat = NULL_RTX;
573 enum insn_code code = CODE_FOR_nothing;
574 int numregs = 0;
575 struct insn_chain *new;
577 /* A common failure mode if register status is not correct in the RTL
578 is for this routine to be called with a REGNO we didn't expect to
579 save. That will cause us to write an insn with a (nil) SET_DEST
580 or SET_SRC. Instead of doing so and causing a crash later, check
581 for this common case and abort here instead. This will remove one
582 step in debugging such problems. */
584 if (regno_save_mem[regno][1] == 0)
585 abort ();
587 /* Get the pattern to emit and update our status.
589 See if we can restore `maxrestore' registers at once. Work
590 backwards to the single register case. */
591 for (i = maxrestore; i > 0; i--)
593 int j;
594 int ok = 1;
596 if (regno_save_mem[regno][i] == 0)
597 continue;
599 for (j = 0; j < i; j++)
600 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
602 ok = 0;
603 break;
605 /* Must do this one restore at a time */
606 if (! ok)
607 continue;
609 numregs = i;
610 break;
613 pat = gen_rtx_SET (VOIDmode,
614 gen_rtx_REG (GET_MODE (regno_save_mem[regno][numregs]),
615 regno),
616 regno_save_mem[regno][numregs]);
617 code = reg_restore_code[regno][numregs];
618 new = insert_one_insn (chain, before_p, code, pat);
620 /* Clear status for all registers we restored. */
621 for (k = 0; k < i; k++)
623 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
624 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
625 n_regs_saved--;
630 /* Tell our callers how many extra registers we saved/restored */
631 return numregs - 1;
634 /* Like insert_restore above, but save registers instead. */
635 static int
636 insert_save (chain, before_p, regno, to_save)
637 struct insn_chain *chain;
638 int before_p;
639 int regno;
640 HARD_REG_SET *to_save;
642 int i, k;
643 rtx pat = NULL_RTX;
644 enum insn_code code = CODE_FOR_nothing;
645 int numregs = 0;
646 struct insn_chain *new;
648 /* A common failure mode if register status is not correct in the RTL
649 is for this routine to be called with a REGNO we didn't expect to
650 save. That will cause us to write an insn with a (nil) SET_DEST
651 or SET_SRC. Instead of doing so and causing a crash later, check
652 for this common case and abort here instead. This will remove one
653 step in debugging such problems. */
655 if (regno_save_mem[regno][1] == 0)
656 abort ();
658 /* Get the pattern to emit and update our status.
660 See if we can save several registers with a single instruction.
661 Work backwards to the single register case. */
662 for (i = MOVE_MAX_WORDS; i > 0; i--)
664 int j;
665 int ok = 1;
666 if (regno_save_mem[regno][i] == 0)
667 continue;
669 for (j = 0; j < i; j++)
670 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
672 ok = 0;
673 break;
675 /* Must do this one save at a time */
676 if (! ok)
677 continue;
679 numregs = i;
680 break;
683 pat = gen_rtx_SET (VOIDmode, regno_save_mem[regno][numregs],
684 gen_rtx_REG (GET_MODE (regno_save_mem[regno][numregs]),
685 regno));
686 code = reg_save_code[regno][numregs];
687 new = insert_one_insn (chain, before_p, code, pat);
689 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
690 for (k = 0; k < numregs; k++)
692 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
693 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
694 n_regs_saved++;
697 /* Tell our callers how many extra registers we saved/restored */
698 return numregs - 1;
701 /* Emit a new caller-save insn and set the code. */
702 static struct insn_chain *
703 insert_one_insn (chain, before_p, code, pat)
704 struct insn_chain *chain;
705 int before_p;
706 enum insn_code code;
707 rtx pat;
709 rtx insn = chain->insn;
710 struct insn_chain *new;
712 #ifdef HAVE_cc0
713 /* If INSN references CC0, put our insns in front of the insn that sets
714 CC0. This is always safe, since the only way we could be passed an
715 insn that references CC0 is for a restore, and doing a restore earlier
716 isn't a problem. We do, however, assume here that CALL_INSNs don't
717 reference CC0. Guard against non-INSN's like CODE_LABEL. */
719 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
720 && before_p
721 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
722 chain = chain->prev, insn = chain->insn;
723 #endif
725 new = new_insn_chain ();
726 if (before_p)
728 rtx link;
730 new->prev = chain->prev;
731 if (new->prev != 0)
732 new->prev->next = new;
733 else
734 reload_insn_chain = new;
736 chain->prev = new;
737 new->next = chain;
738 new->insn = emit_insn_before (pat, insn);
739 /* ??? It would be nice if we could exclude the already / still saved
740 registers from the live sets. */
741 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
742 /* Registers that die in CHAIN->INSN still live in the new insn. */
743 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
745 if (REG_NOTE_KIND (link) == REG_DEAD)
747 rtx reg = XEXP (link, 0);
748 int regno, i;
750 if (GET_CODE (reg) != REG)
751 abort ();
753 regno = REGNO (reg);
754 if (regno >= FIRST_PSEUDO_REGISTER)
755 regno = reg_renumber[regno];
756 if (regno < 0)
757 continue;
758 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
759 i >= 0; i--)
760 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
763 CLEAR_REG_SET (&new->dead_or_set);
764 if (chain->insn == BLOCK_HEAD (chain->block))
765 BLOCK_HEAD (chain->block) = new->insn;
767 else
769 new->next = chain->next;
770 if (new->next != 0)
771 new->next->prev = new;
772 chain->next = new;
773 new->prev = chain;
774 new->insn = emit_insn_after (pat, insn);
775 /* ??? It would be nice if we could exclude the already / still saved
776 registers from the live sets, and observe REG_UNUSED notes. */
777 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
778 /* Registers that are set in CHAIN->INSN live in the new insn.
779 (Unless there is a REG_UNUSED note for them, but we don't
780 look for them here.) */
781 note_stores (PATTERN (chain->insn), add_stored_regs,
782 &new->live_throughout);
783 CLEAR_REG_SET (&new->dead_or_set);
784 if (chain->insn == BLOCK_END (chain->block))
785 BLOCK_END (chain->block) = new->insn;
787 new->block = chain->block;
788 new->is_caller_save_insn = 1;
790 INSN_CODE (new->insn) = code;
791 return new;