gcc/testsuite/gcc.target/powerpc/fold-vec-store-vec_vsx_st-short.c

   1 /* Verify that overloaded built-ins for vec_vsx_st with short
   2    inputs produce the right code.  */
   3
   4 /* { dg-require-effective-target powerpc_vsx_ok } */
   5 /* { dg-options "-mvsx -O2" } */
   6
   7 #include <altivec.h>
   8
   9 #define BUILD_VAR_TEST(TESTNAME1, VALUE, VAR_OFFSET, SAVETO)            \
  10 void                                                                    \
  11 TESTNAME1 ## _var (VALUE value, VAR_OFFSET offset, SAVETO * saveto)     \
  12 {                                                                       \
  13         vec_vsx_st (value, offset, saveto);             \
  14 }
  15
  16 #define BUILD_CST_TEST(TESTNAME1, VALUE, CST_OFFSET, SAVETO)            \
  17 void                                                                    \
  18 TESTNAME1 ## _cst (VALUE value, SAVETO * saveto)                        \
  19 {                                                                       \
  20         vec_vsx_st (value, CST_OFFSET, saveto);         \
  21 }
  22
  23 BUILD_VAR_TEST( test1,  vector signed short, signed long long, signed short );
  24 BUILD_VAR_TEST( test2,  vector signed short, signed int, signed short );
  25 BUILD_CST_TEST( test3,  vector signed short, 12, signed short );
  26
  27 BUILD_VAR_TEST( test4,  vector unsigned short, signed long long, unsigned short );
  28 BUILD_VAR_TEST( test5,  vector unsigned short, signed int, unsigned short );
  29 BUILD_CST_TEST( test6,  vector unsigned short, 12, unsigned short );
  30
  31 BUILD_VAR_TEST( test7,  vector signed short, signed long long, vector signed short );
  32 BUILD_VAR_TEST( test8,  vector signed short, signed int, vector signed short );
  33 BUILD_CST_TEST( test9,  vector signed short, 12, vector signed short );
  34
  35 BUILD_VAR_TEST( test10, vector unsigned short, signed long long, vector unsigned short );
  36 BUILD_VAR_TEST( test11, vector unsigned short, signed int, vector unsigned short );
  37 BUILD_CST_TEST( test12, vector unsigned short, 12, vector unsigned short );
  38
  39 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstxvd2x\M|\mstxvx\M|\mstvx\M} 12 } } */