1 /* Verify that overloaded built-ins for vec_sl with char
2 inputs produce the right results. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_altivec_ok } */
6 /* { dg-options "-maltivec -O2" } */
10 //# vec_sl - shift left
11 //# vec_sr - shift right
12 //# vec_sra - shift right algebraic
13 //# vec_rl - rotate left
16 testsl_signed (vector
signed char x
, vector
unsigned char y
)
22 testsl_unsigned (vector
unsigned char x
, vector
unsigned char y
)
28 testsr_signed (vector
signed char x
, vector
unsigned char y
)
34 testsr_unsigned (vector
unsigned char x
, vector
unsigned char y
)
40 testsra_signed (vector
signed char x
, vector
unsigned char y
)
42 return vec_sra (x
, y
);
46 testsra_unsigned (vector
unsigned char x
, vector
unsigned char y
)
48 return vec_sra (x
, y
);
52 testrl_signed (vector
signed char x
, vector
unsigned char y
)
58 testrl_unsigned (vector
unsigned char x
, vector
unsigned char y
)
63 /* { dg-final { scan-assembler-times "vslb" 2 } } */
64 /* { dg-final { scan-assembler-times "vsrb" 2 } } */
65 /* { dg-final { scan-assembler-times "vsrab" 2 } } */
66 /* { dg-final { scan-assembler-times "vrlb" 2 } } */