1 /* Verify that overloaded built-ins for vec_extract() with int
2 inputs produce the right code with a P7 (BE) target. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_vsx_ok } */
6 /* { dg-options "-mdejagnu-cpu=power7 -O2 " } */
8 // Targeting P7 (BE). 6 tests total.
9 // P7 constant: li, addi, stxvw4x, rldic, addi, lwzx/lwax
10 // P7 variables: li, addi, stxvw4x, lwa/lwz
12 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
13 /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */
14 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */
15 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
16 /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */
21 testbi_var (vector
bool int vbi2
, signed int si
)
23 return vec_extract (vbi2
, si
);
27 testsi_var (vector
signed int vsi2
, signed int si
)
29 return vec_extract (vsi2
, si
);
33 testui_var (vector
unsigned int vui2
, signed int si
)
35 return vec_extract (vui2
, si
);
39 testbi_cst (vector
bool int vbi2
)
41 return vec_extract (vbi2
, 12);
45 testsi_cst (vector
signed int vsi2
)
47 return vec_extract (vsi2
, 12);
51 testui_cst (vector
unsigned int vui2
)
53 return vec_extract (vui2
, 12);