1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
43 #include "insn-config.h"
44 #include "insn-flags.h"
46 #include "hard-reg-set.h"
54 /* Information about the loop being processed used to compute
55 the number of loop iterations for loop unrolling and doloop
57 static struct loop_info this_loop_info
;
59 /* Vector mapping INSN_UIDs to luids.
60 The luids are like uids but increase monotonically always.
61 We use them to see whether a jump comes from outside a given loop. */
65 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
66 number the insn is contained in. */
70 /* 1 + largest uid of any insn. */
74 /* 1 + luid of last insn. */
78 /* Number of loops detected in current function. Used as index to the
81 static int max_loop_num
;
83 /* Indexed by loop number, contains the first and last insn of each loop. */
85 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
87 /* Likewise for the continue insn */
88 static rtx
*loop_number_loop_cont
;
90 /* The first code_label that is reached in every loop iteration.
91 0 when not computed yet, initially const0_rtx if a jump couldn't be
93 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
94 of this loop, or in verify_dominator, if a jump couldn't be followed. */
95 static rtx
*loop_number_cont_dominator
;
97 /* For each loop, gives the containing loop number, -1 if none. */
101 #ifdef HAVE_decrement_and_branch_on_count
102 /* Records whether resource in use by inner loop. */
104 int *loop_used_count_register
;
105 #endif /* HAVE_decrement_and_branch_on_count */
107 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
108 really a loop (an insn outside the loop branches into it). */
110 static char *loop_invalid
;
112 /* Indexed by loop number, links together all LABEL_REFs which refer to
113 code labels outside the loop. Used by routines that need to know all
114 loop exits, such as final_biv_value and final_giv_value.
116 This does not include loop exits due to return instructions. This is
117 because all bivs and givs are pseudos, and hence must be dead after a
118 return, so the presense of a return does not affect any of the
119 optimizations that use this info. It is simpler to just not include return
120 instructions on this list. */
122 rtx
*loop_number_exit_labels
;
124 /* Indexed by loop number, counts the number of LABEL_REFs on
125 loop_number_exit_labels for this loop and all loops nested inside it. */
127 int *loop_number_exit_count
;
129 /* Indexed by register number, contains the number of times the reg
130 is set during the loop being scanned.
131 During code motion, a negative value indicates a reg that has been
132 made a candidate; in particular -2 means that it is an candidate that
133 we know is equal to a constant and -1 means that it is an candidate
134 not known equal to a constant.
135 After code motion, regs moved have 0 (which is accurate now)
136 while the failed candidates have the original number of times set.
138 Therefore, at all times, == 0 indicates an invariant register;
139 < 0 a conditionally invariant one. */
141 static varray_type set_in_loop
;
143 /* Original value of set_in_loop; same except that this value
144 is not set negative for a reg whose sets have been made candidates
145 and not set to 0 for a reg that is moved. */
147 static varray_type n_times_set
;
149 /* Index by register number, 1 indicates that the register
150 cannot be moved or strength reduced. */
152 static varray_type may_not_optimize
;
154 /* Contains the insn in which a register was used if it was used
155 exactly once; contains const0_rtx if it was used more than once. */
157 static varray_type reg_single_usage
;
159 /* Nonzero means reg N has already been moved out of one loop.
160 This reduces the desire to move it out of another. */
162 static char *moved_once
;
164 /* List of MEMs that are stored in this loop. */
166 static rtx loop_store_mems
;
168 /* The insn where the first of these was found. */
169 static rtx first_loop_store_insn
;
171 typedef struct loop_mem_info
{
172 rtx mem
; /* The MEM itself. */
173 rtx reg
; /* Corresponding pseudo, if any. */
174 int optimize
; /* Nonzero if we can optimize access to this MEM. */
177 /* Array of MEMs that are used (read or written) in this loop, but
178 cannot be aliased by anything in this loop, except perhaps
179 themselves. In other words, if loop_mems[i] is altered during the
180 loop, it is altered by an expression that is rtx_equal_p to it. */
182 static loop_mem_info
*loop_mems
;
184 /* The index of the next available slot in LOOP_MEMS. */
186 static int loop_mems_idx
;
188 /* The number of elements allocated in LOOP_MEMs. */
190 static int loop_mems_allocated
;
192 /* Nonzero if we don't know what MEMs were changed in the current
193 loop. This happens if the loop contains a call (in which case
194 `loop_info->has_call' will also be set) or if we store into more
195 than NUM_STORES MEMs. */
197 static int unknown_address_altered
;
199 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
200 static int num_movables
;
202 /* Count of memory write instructions discovered in the loop. */
203 static int num_mem_sets
;
205 /* Bound on pseudo register number before loop optimization.
206 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
207 int max_reg_before_loop
;
209 /* This obstack is used in product_cheap_p to allocate its rtl. It
210 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
211 If we used the same obstack that it did, we would be deallocating
214 static struct obstack temp_obstack
;
216 /* This is where the pointer to the obstack being used for RTL is stored. */
218 extern struct obstack
*rtl_obstack
;
220 #define obstack_chunk_alloc xmalloc
221 #define obstack_chunk_free free
223 /* During the analysis of a loop, a chain of `struct movable's
224 is made to record all the movable insns found.
225 Then the entire chain can be scanned to decide which to move. */
229 rtx insn
; /* A movable insn */
230 rtx set_src
; /* The expression this reg is set from. */
231 rtx set_dest
; /* The destination of this SET. */
232 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
233 of any registers used within the LIBCALL. */
234 int consec
; /* Number of consecutive following insns
235 that must be moved with this one. */
236 int regno
; /* The register it sets */
237 short lifetime
; /* lifetime of that register;
238 may be adjusted when matching movables
239 that load the same value are found. */
240 short savings
; /* Number of insns we can move for this reg,
241 including other movables that force this
242 or match this one. */
243 unsigned int cond
: 1; /* 1 if only conditionally movable */
244 unsigned int force
: 1; /* 1 means MUST move this insn */
245 unsigned int global
: 1; /* 1 means reg is live outside this loop */
246 /* If PARTIAL is 1, GLOBAL means something different:
247 that the reg is live outside the range from where it is set
248 to the following label. */
249 unsigned int done
: 1; /* 1 inhibits further processing of this */
251 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
252 In particular, moving it does not make it
254 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
255 load SRC, rather than copying INSN. */
256 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
257 first insn of a consecutive sets group. */
258 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
259 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
260 that we should avoid changing when clearing
261 the rest of the reg. */
262 struct movable
*match
; /* First entry for same value */
263 struct movable
*forces
; /* An insn that must be moved if this is */
264 struct movable
*next
;
267 static struct movable
*the_movables
;
269 FILE *loop_dump_stream
;
271 /* Forward declarations. */
273 static void verify_dominator
PROTO((int));
274 static void find_and_verify_loops
PROTO((rtx
));
275 static void mark_loop_jump
PROTO((rtx
, int));
276 static void prescan_loop
PROTO((rtx
, rtx
, struct loop_info
*));
277 static int reg_in_basic_block_p
PROTO((rtx
, rtx
));
278 static int consec_sets_invariant_p
PROTO((rtx
, int, rtx
));
279 static int labels_in_range_p
PROTO((rtx
, int));
280 static void count_one_set
PROTO((rtx
, rtx
, varray_type
, rtx
*));
282 static void count_loop_regs_set
PROTO((rtx
, rtx
, varray_type
, varray_type
,
284 static void note_addr_stored
PROTO((rtx
, rtx
));
285 static int loop_reg_used_before_p
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
));
286 static void scan_loop
PROTO((rtx
, rtx
, rtx
, int, int));
288 static void replace_call_address
PROTO((rtx
, rtx
, rtx
));
290 static rtx skip_consec_insns
PROTO((rtx
, int));
291 static int libcall_benefit
PROTO((rtx
));
292 static void ignore_some_movables
PROTO((struct movable
*));
293 static void force_movables
PROTO((struct movable
*));
294 static void combine_movables
PROTO((struct movable
*, int));
295 static int regs_match_p
PROTO((rtx
, rtx
, struct movable
*));
296 static int rtx_equal_for_loop_p
PROTO((rtx
, rtx
, struct movable
*));
297 static void add_label_notes
PROTO((rtx
, rtx
));
298 static void move_movables
PROTO((struct movable
*, int, int, rtx
, rtx
, int));
299 static int count_nonfixed_reads
PROTO((rtx
));
300 static void strength_reduce
PROTO((rtx
, rtx
, rtx
, int, rtx
, rtx
,
301 struct loop_info
*, rtx
, int, int));
302 static void find_single_use_in_loop
PROTO((rtx
, rtx
, varray_type
));
303 static int valid_initial_value_p
PROTO((rtx
, rtx
, int, rtx
));
304 static void find_mem_givs
PROTO((rtx
, rtx
, int, int, rtx
, rtx
));
305 static void record_biv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
*, int, int));
306 static void check_final_value
PROTO((struct induction
*, rtx
, rtx
,
307 unsigned HOST_WIDE_INT
));
308 static void record_giv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, int, rtx
*, rtx
, rtx
));
309 static void update_giv_derive
PROTO((rtx
));
310 static int basic_induction_var
PROTO((rtx
, enum machine_mode
, rtx
, rtx
, rtx
*, rtx
*, rtx
**));
311 static rtx simplify_giv_expr
PROTO((rtx
, int *));
312 static int general_induction_var
PROTO((rtx
, rtx
*, rtx
*, rtx
*, int, int *));
313 static int consec_sets_giv
PROTO((int, rtx
, rtx
, rtx
, rtx
*, rtx
*, rtx
*));
314 static int check_dbra_loop
PROTO((rtx
, int, rtx
, struct loop_info
*));
315 static rtx express_from_1
PROTO((rtx
, rtx
, rtx
));
316 static rtx combine_givs_p
PROTO((struct induction
*, struct induction
*));
317 static void combine_givs
PROTO((struct iv_class
*));
318 struct recombine_givs_stats
;
319 static int find_life_end
PROTO((rtx
, struct recombine_givs_stats
*, rtx
, rtx
));
320 static void recombine_givs
PROTO((struct iv_class
*, rtx
, rtx
, int));
321 static int product_cheap_p
PROTO((rtx
, rtx
));
322 static int maybe_eliminate_biv
PROTO((struct iv_class
*, rtx
, rtx
, int, int, int));
323 static int maybe_eliminate_biv_1
PROTO((rtx
, rtx
, struct iv_class
*, int, rtx
));
324 static int last_use_this_basic_block
PROTO((rtx
, rtx
));
325 static void record_initial
PROTO((rtx
, rtx
));
326 static void update_reg_last_use
PROTO((rtx
, rtx
));
327 static rtx next_insn_in_loop
PROTO((rtx
, rtx
, rtx
, rtx
));
328 static void load_mems_and_recount_loop_regs_set
PROTO((rtx
, rtx
, rtx
,
330 static void load_mems
PROTO((rtx
, rtx
, rtx
, rtx
));
331 static int insert_loop_mem
PROTO((rtx
*, void *));
332 static int replace_loop_mem
PROTO((rtx
*, void *));
333 static int replace_label
PROTO((rtx
*, void *));
335 typedef struct rtx_and_int
{
340 typedef struct rtx_pair
{
345 /* Nonzero iff INSN is between START and END, inclusive. */
346 #define INSN_IN_RANGE_P(INSN, START, END) \
347 (INSN_UID (INSN) < max_uid_for_loop \
348 && INSN_LUID (INSN) >= INSN_LUID (START) \
349 && INSN_LUID (INSN) <= INSN_LUID (END))
351 #ifdef HAVE_decrement_and_branch_on_count
352 /* Test whether BCT applicable and safe. */
353 static void insert_bct
PROTO((rtx
, rtx
, struct loop_info
*));
355 /* Auxiliary function that inserts the BCT pattern into the loop. */
356 static void instrument_loop_bct
PROTO((rtx
, rtx
, rtx
));
357 #endif /* HAVE_decrement_and_branch_on_count */
359 /* Indirect_jump_in_function is computed once per function. */
360 int indirect_jump_in_function
= 0;
361 static int indirect_jump_in_function_p
PROTO((rtx
));
363 static int compute_luids
PROTO((rtx
, rtx
, int));
365 static int biv_elimination_giv_has_0_offset
PROTO((struct induction
*,
366 struct induction
*, rtx
));
368 /* Relative gain of eliminating various kinds of operations. */
371 static int shift_cost
;
372 static int mult_cost
;
375 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
376 copy the value of the strength reduced giv to its original register. */
377 static int copy_cost
;
379 /* Cost of using a register, to normalize the benefits of a giv. */
380 static int reg_address_cost
;
386 char *free_point
= (char *) oballoc (1);
387 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
389 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
392 reg_address_cost
= ADDRESS_COST (reg
);
394 reg_address_cost
= rtx_cost (reg
, MEM
);
397 /* We multiply by 2 to reconcile the difference in scale between
398 these two ways of computing costs. Otherwise the cost of a copy
399 will be far less than the cost of an add. */
403 /* Free the objects we just allocated. */
406 /* Initialize the obstack used for rtl in product_cheap_p. */
407 gcc_obstack_init (&temp_obstack
);
410 /* Compute the mapping from uids to luids.
411 LUIDs are numbers assigned to insns, like uids,
412 except that luids increase monotonically through the code.
413 Start at insn START and stop just before END. Assign LUIDs
414 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
416 compute_luids (start
, end
, prev_luid
)
423 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
425 if (INSN_UID (insn
) >= max_uid_for_loop
)
427 /* Don't assign luids to line-number NOTEs, so that the distance in
428 luids between two insns is not affected by -g. */
429 if (GET_CODE (insn
) != NOTE
430 || NOTE_LINE_NUMBER (insn
) <= 0)
431 uid_luid
[INSN_UID (insn
)] = ++i
;
433 /* Give a line number note the same luid as preceding insn. */
434 uid_luid
[INSN_UID (insn
)] = i
;
439 /* Entry point of this file. Perform loop optimization
440 on the current function. F is the first insn of the function
441 and DUMPFILE is a stream for output of a trace of actions taken
442 (or 0 if none should be output). */
445 loop_optimize (f
, dumpfile
, unroll_p
, bct_p
)
446 /* f is the first instruction of a chain of insns for one function */
454 loop_dump_stream
= dumpfile
;
456 init_recog_no_volatile ();
458 max_reg_before_loop
= max_reg_num ();
460 moved_once
= (char *) alloca (max_reg_before_loop
);
461 bzero (moved_once
, max_reg_before_loop
);
465 /* Count the number of loops. */
468 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
470 if (GET_CODE (insn
) == NOTE
471 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
475 /* Don't waste time if no loops. */
476 if (max_loop_num
== 0)
479 /* Get size to use for tables indexed by uids.
480 Leave some space for labels allocated by find_and_verify_loops. */
481 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
483 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
484 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
486 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
487 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
489 /* Allocate tables for recording each loop. We set each entry, so they need
491 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
492 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
493 loop_number_loop_cont
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
494 loop_number_cont_dominator
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
495 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
496 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
497 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
498 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
500 #ifdef HAVE_decrement_and_branch_on_count
501 /* Allocate for BCT optimization */
502 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
503 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
504 #endif /* HAVE_decrement_and_branch_on_count */
506 /* Find and process each loop.
507 First, find them, and record them in order of their beginnings. */
508 find_and_verify_loops (f
);
510 /* Now find all register lifetimes. This must be done after
511 find_and_verify_loops, because it might reorder the insns in the
513 reg_scan (f
, max_reg_num (), 1);
515 /* This must occur after reg_scan so that registers created by gcse
516 will have entries in the register tables.
518 We could have added a call to reg_scan after gcse_main in toplev.c,
519 but moving this call to init_alias_analysis is more efficient. */
520 init_alias_analysis ();
522 /* See if we went too far. Note that get_max_uid already returns
523 one more that the maximum uid of all insn. */
524 if (get_max_uid () > max_uid_for_loop
)
526 /* Now reset it to the actual size we need. See above. */
527 max_uid_for_loop
= get_max_uid ();
529 /* find_and_verify_loops has already called compute_luids, but it might
530 have rearranged code afterwards, so we need to recompute the luids now. */
531 max_luid
= compute_luids (f
, NULL_RTX
, 0);
533 /* Don't leave gaps in uid_luid for insns that have been
534 deleted. It is possible that the first or last insn
535 using some register has been deleted by cross-jumping.
536 Make sure that uid_luid for that former insn's uid
537 points to the general area where that insn used to be. */
538 for (i
= 0; i
< max_uid_for_loop
; i
++)
540 uid_luid
[0] = uid_luid
[i
];
541 if (uid_luid
[0] != 0)
544 for (i
= 0; i
< max_uid_for_loop
; i
++)
545 if (uid_luid
[i
] == 0)
546 uid_luid
[i
] = uid_luid
[i
- 1];
548 /* Create a mapping from loops to BLOCK tree nodes. */
549 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
550 find_loop_tree_blocks ();
552 /* Determine if the function has indirect jump. On some systems
553 this prevents low overhead loop instructions from being used. */
554 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
556 /* Now scan the loops, last ones first, since this means inner ones are done
557 before outer ones. */
558 for (i
= max_loop_num
-1; i
>= 0; i
--)
559 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
560 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
561 loop_number_loop_cont
[i
], unroll_p
, bct_p
);
563 /* If debugging and unrolling loops, we must replicate the tree nodes
564 corresponding to the blocks inside the loop, so that the original one
565 to one mapping will remain. */
566 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
567 unroll_block_trees ();
569 end_alias_analysis ();
572 /* Returns the next insn, in execution order, after INSN. START and
573 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
574 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
575 insn-stream; it is used with loops that are entered near the
579 next_insn_in_loop (insn
, start
, end
, loop_top
)
585 insn
= NEXT_INSN (insn
);
590 /* Go to the top of the loop, and continue there. */
604 /* Optimize one loop whose start is LOOP_START and end is END.
605 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
607 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
609 /* ??? Could also move memory writes out of loops if the destination address
610 is invariant, the source is invariant, the memory write is not volatile,
611 and if we can prove that no read inside the loop can read this address
612 before the write occurs. If there is a read of this address after the
613 write, then we can also mark the memory read as invariant. */
616 scan_loop (loop_start
, end
, loop_cont
, unroll_p
, bct_p
)
617 rtx loop_start
, end
, loop_cont
;
622 /* 1 if we are scanning insns that could be executed zero times. */
624 /* 1 if we are scanning insns that might never be executed
625 due to a subroutine call which might exit before they are reached. */
627 /* For a rotated loop that is entered near the bottom,
628 this is the label at the top. Otherwise it is zero. */
630 /* Jump insn that enters the loop, or 0 if control drops in. */
631 rtx loop_entry_jump
= 0;
632 /* Place in the loop where control enters. */
634 /* Number of insns in the loop. */
639 /* The SET from an insn, if it is the only SET in the insn. */
641 /* Chain describing insns movable in current loop. */
642 struct movable
*movables
= 0;
643 /* Last element in `movables' -- so we can add elements at the end. */
644 struct movable
*last_movable
= 0;
645 /* Ratio of extra register life span we can justify
646 for saving an instruction. More if loop doesn't call subroutines
647 since in that case saving an insn makes more difference
648 and more registers are available. */
650 /* Nonzero if we are scanning instructions in a sub-loop. */
653 struct loop_info
*loop_info
= &this_loop_info
;
655 /* Determine whether this loop starts with a jump down to a test at
656 the end. This will occur for a small number of loops with a test
657 that is too complex to duplicate in front of the loop.
659 We search for the first insn or label in the loop, skipping NOTEs.
660 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
661 (because we might have a loop executed only once that contains a
662 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
663 (in case we have a degenerate loop).
665 Note that if we mistakenly think that a loop is entered at the top
666 when, in fact, it is entered at the exit test, the only effect will be
667 slightly poorer optimization. Making the opposite error can generate
668 incorrect code. Since very few loops now start with a jump to the
669 exit test, the code here to detect that case is very conservative. */
671 for (p
= NEXT_INSN (loop_start
);
673 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
674 && (GET_CODE (p
) != NOTE
675 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
676 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
682 /* Set up variables describing this loop. */
683 prescan_loop (loop_start
, end
, loop_info
);
684 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
686 /* If loop has a jump before the first label,
687 the true entry is the target of that jump.
688 Start scan from there.
689 But record in LOOP_TOP the place where the end-test jumps
690 back to so we can scan that after the end of the loop. */
691 if (GET_CODE (p
) == JUMP_INSN
)
695 /* Loop entry must be unconditional jump (and not a RETURN) */
697 && JUMP_LABEL (p
) != 0
698 /* Check to see whether the jump actually
699 jumps out of the loop (meaning it's no loop).
700 This case can happen for things like
701 do {..} while (0). If this label was generated previously
702 by loop, we can't tell anything about it and have to reject
704 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, end
))
706 loop_top
= next_label (scan_start
);
707 scan_start
= JUMP_LABEL (p
);
711 /* If SCAN_START was an insn created by loop, we don't know its luid
712 as required by loop_reg_used_before_p. So skip such loops. (This
713 test may never be true, but it's best to play it safe.)
715 Also, skip loops where we do not start scanning at a label. This
716 test also rejects loops starting with a JUMP_INSN that failed the
719 if (INSN_UID (scan_start
) >= max_uid_for_loop
720 || GET_CODE (scan_start
) != CODE_LABEL
)
722 if (loop_dump_stream
)
723 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
724 INSN_UID (loop_start
), INSN_UID (end
));
728 /* Count number of times each reg is set during this loop.
729 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
730 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
732 /* Allocate extra space for REGS that might be created by
733 load_mems. We allocate a little extra slop as well, in the hopes
734 that even after the moving of movables creates some new registers
735 we won't have to reallocate these arrays. However, we do grow
736 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
737 nregs
= max_reg_num () + loop_mems_idx
+ 16;
738 VARRAY_INT_INIT (set_in_loop
, nregs
, "set_in_loop");
739 VARRAY_INT_INIT (n_times_set
, nregs
, "n_times_set");
740 VARRAY_CHAR_INIT (may_not_optimize
, nregs
, "may_not_optimize");
741 VARRAY_RTX_INIT (reg_single_usage
, nregs
, "reg_single_usage");
743 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
744 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
746 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
748 VARRAY_CHAR (may_not_optimize
, i
) = 1;
749 VARRAY_INT (set_in_loop
, i
) = 1;
752 #ifdef AVOID_CCMODE_COPIES
753 /* Don't try to move insns which set CC registers if we should not
754 create CCmode register copies. */
755 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
756 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
757 VARRAY_CHAR (may_not_optimize
, i
) = 1;
760 bcopy ((char *) &set_in_loop
->data
,
761 (char *) &n_times_set
->data
, nregs
* sizeof (int));
763 if (loop_dump_stream
)
765 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
766 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
768 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
769 INSN_UID (loop_info
->cont
));
772 /* Scan through the loop finding insns that are safe to move.
773 Set set_in_loop negative for the reg being set, so that
774 this reg will be considered invariant for subsequent insns.
775 We consider whether subsequent insns use the reg
776 in deciding whether it is worth actually moving.
778 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
779 and therefore it is possible that the insns we are scanning
780 would never be executed. At such times, we must make sure
781 that it is safe to execute the insn once instead of zero times.
782 When MAYBE_NEVER is 0, all insns will be executed at least once
783 so that is not a problem. */
785 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
787 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
789 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
790 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
792 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
793 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
796 if (GET_CODE (p
) == INSN
797 && (set
= single_set (p
))
798 && GET_CODE (SET_DEST (set
)) == REG
799 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
804 rtx src
= SET_SRC (set
);
805 rtx dependencies
= 0;
807 /* Figure out what to use as a source of this insn. If a REG_EQUIV
808 note is given or if a REG_EQUAL note with a constant operand is
809 specified, use it as the source and mark that we should move
810 this insn by calling emit_move_insn rather that duplicating the
813 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
815 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
817 src
= XEXP (temp
, 0), move_insn
= 1;
820 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
821 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
822 src
= XEXP (temp
, 0), move_insn
= 1;
823 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
825 src
= XEXP (temp
, 0);
826 /* A libcall block can use regs that don't appear in
827 the equivalent expression. To move the libcall,
828 we must move those regs too. */
829 dependencies
= libcall_other_reg (p
, src
);
833 /* Don't try to optimize a register that was made
834 by loop-optimization for an inner loop.
835 We don't know its life-span, so we can't compute the benefit. */
836 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
838 else if (/* The register is used in basic blocks other
839 than the one where it is set (meaning that
840 something after this point in the loop might
841 depend on its value before the set). */
842 ! reg_in_basic_block_p (p
, SET_DEST (set
))
843 /* And the set is not guaranteed to be executed one
844 the loop starts, or the value before the set is
845 needed before the set occurs...
847 ??? Note we have quadratic behaviour here, mitigated
848 by the fact that the previous test will often fail for
849 large loops. Rather than re-scanning the entire loop
850 each time for register usage, we should build tables
851 of the register usage and use them here instead. */
853 || loop_reg_used_before_p (set
, p
, loop_start
,
855 /* It is unsafe to move the set.
857 This code used to consider it OK to move a set of a variable
858 which was not created by the user and not used in an exit test.
859 That behavior is incorrect and was removed. */
861 else if ((tem
= invariant_p (src
))
862 && (dependencies
== 0
863 || (tem2
= invariant_p (dependencies
)) != 0)
864 && (VARRAY_INT (set_in_loop
,
865 REGNO (SET_DEST (set
))) == 1
867 = consec_sets_invariant_p
869 VARRAY_INT (set_in_loop
, REGNO (SET_DEST (set
))),
871 /* If the insn can cause a trap (such as divide by zero),
872 can't move it unless it's guaranteed to be executed
873 once loop is entered. Even a function call might
874 prevent the trap insn from being reached
875 (since it might exit!) */
876 && ! ((maybe_never
|| call_passed
)
877 && may_trap_p (src
)))
879 register struct movable
*m
;
880 register int regno
= REGNO (SET_DEST (set
));
882 /* A potential lossage is where we have a case where two insns
883 can be combined as long as they are both in the loop, but
884 we move one of them outside the loop. For large loops,
885 this can lose. The most common case of this is the address
886 of a function being called.
888 Therefore, if this register is marked as being used exactly
889 once if we are in a loop with calls (a "large loop"), see if
890 we can replace the usage of this register with the source
891 of this SET. If we can, delete this insn.
893 Don't do this if P has a REG_RETVAL note or if we have
894 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
896 if (loop_info
->has_call
897 && VARRAY_RTX (reg_single_usage
, regno
) != 0
898 && VARRAY_RTX (reg_single_usage
, regno
) != const0_rtx
899 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
900 && (REGNO_LAST_UID (regno
)
901 == INSN_UID (VARRAY_RTX (reg_single_usage
, regno
)))
902 && VARRAY_INT (set_in_loop
, regno
) == 1
903 && ! side_effects_p (SET_SRC (set
))
904 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
905 && (! SMALL_REGISTER_CLASSES
906 || (! (GET_CODE (SET_SRC (set
)) == REG
907 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
908 /* This test is not redundant; SET_SRC (set) might be
909 a call-clobbered register and the life of REGNO
910 might span a call. */
911 && ! modified_between_p (SET_SRC (set
), p
,
913 (reg_single_usage
, regno
))
914 && no_labels_between_p (p
, VARRAY_RTX (reg_single_usage
, regno
))
915 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
917 (reg_single_usage
, regno
)))
919 /* Replace any usage in a REG_EQUAL note. Must copy the
920 new source, so that we don't get rtx sharing between the
921 SET_SOURCE and REG_NOTES of insn p. */
922 REG_NOTES (VARRAY_RTX (reg_single_usage
, regno
))
923 = replace_rtx (REG_NOTES (VARRAY_RTX
924 (reg_single_usage
, regno
)),
925 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
928 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
929 NOTE_SOURCE_FILE (p
) = 0;
930 VARRAY_INT (set_in_loop
, regno
) = 0;
934 m
= (struct movable
*) alloca (sizeof (struct movable
));
938 m
->dependencies
= dependencies
;
939 m
->set_dest
= SET_DEST (set
);
941 m
->consec
= VARRAY_INT (set_in_loop
,
942 REGNO (SET_DEST (set
))) - 1;
946 m
->move_insn
= move_insn
;
947 m
->move_insn_first
= 0;
948 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
949 m
->savemode
= VOIDmode
;
951 /* Set M->cond if either invariant_p or consec_sets_invariant_p
952 returned 2 (only conditionally invariant). */
953 m
->cond
= ((tem
| tem1
| tem2
) > 1);
954 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
955 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
957 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
958 - uid_luid
[REGNO_FIRST_UID (regno
)]);
959 m
->savings
= VARRAY_INT (n_times_set
, regno
);
960 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
961 m
->savings
+= libcall_benefit (p
);
962 VARRAY_INT (set_in_loop
, regno
) = move_insn
? -2 : -1;
963 /* Add M to the end of the chain MOVABLES. */
967 last_movable
->next
= m
;
972 /* It is possible for the first instruction to have a
973 REG_EQUAL note but a non-invariant SET_SRC, so we must
974 remember the status of the first instruction in case
975 the last instruction doesn't have a REG_EQUAL note. */
976 m
->move_insn_first
= m
->move_insn
;
978 /* Skip this insn, not checking REG_LIBCALL notes. */
979 p
= next_nonnote_insn (p
);
980 /* Skip the consecutive insns, if there are any. */
981 p
= skip_consec_insns (p
, m
->consec
);
982 /* Back up to the last insn of the consecutive group. */
983 p
= prev_nonnote_insn (p
);
985 /* We must now reset m->move_insn, m->is_equiv, and possibly
986 m->set_src to correspond to the effects of all the
988 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
990 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
993 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
994 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
995 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
1000 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
1003 /* If this register is always set within a STRICT_LOW_PART
1004 or set to zero, then its high bytes are constant.
1005 So clear them outside the loop and within the loop
1006 just load the low bytes.
1007 We must check that the machine has an instruction to do so.
1008 Also, if the value loaded into the register
1009 depends on the same register, this cannot be done. */
1010 else if (SET_SRC (set
) == const0_rtx
1011 && GET_CODE (NEXT_INSN (p
)) == INSN
1012 && (set1
= single_set (NEXT_INSN (p
)))
1013 && GET_CODE (set1
) == SET
1014 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
1015 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
1016 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
1018 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
1020 register int regno
= REGNO (SET_DEST (set
));
1021 if (VARRAY_INT (set_in_loop
, regno
) == 2)
1023 register struct movable
*m
;
1024 m
= (struct movable
*) alloca (sizeof (struct movable
));
1027 m
->set_dest
= SET_DEST (set
);
1028 m
->dependencies
= 0;
1034 m
->move_insn_first
= 0;
1036 /* If the insn may not be executed on some cycles,
1037 we can't clear the whole reg; clear just high part.
1038 Not even if the reg is used only within this loop.
1045 Clearing x before the inner loop could clobber a value
1046 being saved from the last time around the outer loop.
1047 However, if the reg is not used outside this loop
1048 and all uses of the register are in the same
1049 basic block as the store, there is no problem.
1051 If this insn was made by loop, we don't know its
1052 INSN_LUID and hence must make a conservative
1054 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1055 || (uid_luid
[REGNO_LAST_UID (regno
)]
1057 || (uid_luid
[REGNO_FIRST_UID (regno
)]
1059 || (labels_in_range_p
1060 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
1061 if (maybe_never
&& m
->global
)
1062 m
->savemode
= GET_MODE (SET_SRC (set1
));
1064 m
->savemode
= VOIDmode
;
1068 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
1069 - uid_luid
[REGNO_FIRST_UID (regno
)]);
1071 VARRAY_INT (set_in_loop
, regno
) = -1;
1072 /* Add M to the end of the chain MOVABLES. */
1076 last_movable
->next
= m
;
1081 /* Past a call insn, we get to insns which might not be executed
1082 because the call might exit. This matters for insns that trap.
1083 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1084 so they don't count. */
1085 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1087 /* Past a label or a jump, we get to insns for which we
1088 can't count on whether or how many times they will be
1089 executed during each iteration. Therefore, we can
1090 only move out sets of trivial variables
1091 (those not used after the loop). */
1092 /* Similar code appears twice in strength_reduce. */
1093 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1094 /* If we enter the loop in the middle, and scan around to the
1095 beginning, don't set maybe_never for that. This must be an
1096 unconditional jump, otherwise the code at the top of the
1097 loop might never be executed. Unconditional jumps are
1098 followed a by barrier then loop end. */
1099 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1100 && NEXT_INSN (NEXT_INSN (p
)) == end
1101 && simplejump_p (p
)))
1103 else if (GET_CODE (p
) == NOTE
)
1105 /* At the virtual top of a converted loop, insns are again known to
1106 be executed: logically, the loop begins here even though the exit
1107 code has been duplicated. */
1108 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1109 maybe_never
= call_passed
= 0;
1110 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1112 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1117 /* If one movable subsumes another, ignore that other. */
1119 ignore_some_movables (movables
);
1121 /* For each movable insn, see if the reg that it loads
1122 leads when it dies right into another conditionally movable insn.
1123 If so, record that the second insn "forces" the first one,
1124 since the second can be moved only if the first is. */
1126 force_movables (movables
);
1128 /* See if there are multiple movable insns that load the same value.
1129 If there are, make all but the first point at the first one
1130 through the `match' field, and add the priorities of them
1131 all together as the priority of the first. */
1133 combine_movables (movables
, nregs
);
1135 /* Now consider each movable insn to decide whether it is worth moving.
1136 Store 0 in set_in_loop for each reg that is moved.
1138 Generally this increases code size, so do not move moveables when
1139 optimizing for code size. */
1141 if (! optimize_size
)
1142 move_movables (movables
, threshold
,
1143 insn_count
, loop_start
, end
, nregs
);
1145 /* Now candidates that still are negative are those not moved.
1146 Change set_in_loop to indicate that those are not actually invariant. */
1147 for (i
= 0; i
< nregs
; i
++)
1148 if (VARRAY_INT (set_in_loop
, i
) < 0)
1149 VARRAY_INT (set_in_loop
, i
) = VARRAY_INT (n_times_set
, i
);
1151 /* Now that we've moved some things out of the loop, we might be able to
1152 hoist even more memory references. */
1153 load_mems_and_recount_loop_regs_set (scan_start
, end
, loop_top
,
1154 loop_start
, &insn_count
);
1156 if (flag_strength_reduce
)
1158 the_movables
= movables
;
1159 strength_reduce (scan_start
, end
, loop_top
,
1160 insn_count
, loop_start
, end
,
1161 loop_info
, loop_cont
, unroll_p
, bct_p
);
1164 VARRAY_FREE (reg_single_usage
);
1165 VARRAY_FREE (set_in_loop
);
1166 VARRAY_FREE (n_times_set
);
1167 VARRAY_FREE (may_not_optimize
);
1170 /* Add elements to *OUTPUT to record all the pseudo-regs
1171 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1174 record_excess_regs (in_this
, not_in_this
, output
)
1175 rtx in_this
, not_in_this
;
1182 code
= GET_CODE (in_this
);
1196 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1197 && ! reg_mentioned_p (in_this
, not_in_this
))
1198 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1205 fmt
= GET_RTX_FORMAT (code
);
1206 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1213 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1214 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1218 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1224 /* Check what regs are referred to in the libcall block ending with INSN,
1225 aside from those mentioned in the equivalent value.
1226 If there are none, return 0.
1227 If there are one or more, return an EXPR_LIST containing all of them. */
1230 libcall_other_reg (insn
, equiv
)
1233 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1234 rtx p
= XEXP (note
, 0);
1237 /* First, find all the regs used in the libcall block
1238 that are not mentioned as inputs to the result. */
1242 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1243 || GET_CODE (p
) == CALL_INSN
)
1244 record_excess_regs (PATTERN (p
), equiv
, &output
);
1251 /* Return 1 if all uses of REG
1252 are between INSN and the end of the basic block. */
1255 reg_in_basic_block_p (insn
, reg
)
1258 int regno
= REGNO (reg
);
1261 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1264 /* Search this basic block for the already recorded last use of the reg. */
1265 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1267 switch (GET_CODE (p
))
1274 /* Ordinary insn: if this is the last use, we win. */
1275 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1280 /* Jump insn: if this is the last use, we win. */
1281 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1283 /* Otherwise, it's the end of the basic block, so we lose. */
1288 /* It's the end of the basic block, so we lose. */
1296 /* The "last use" doesn't follow the "first use"?? */
1300 /* Compute the benefit of eliminating the insns in the block whose
1301 last insn is LAST. This may be a group of insns used to compute a
1302 value directly or can contain a library call. */
1305 libcall_benefit (last
)
1311 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1312 insn
!= last
; insn
= NEXT_INSN (insn
))
1314 if (GET_CODE (insn
) == CALL_INSN
)
1315 benefit
+= 10; /* Assume at least this many insns in a library
1317 else if (GET_CODE (insn
) == INSN
1318 && GET_CODE (PATTERN (insn
)) != USE
1319 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1326 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1329 skip_consec_insns (insn
, count
)
1333 for (; count
> 0; count
--)
1337 /* If first insn of libcall sequence, skip to end. */
1338 /* Do this at start of loop, since INSN is guaranteed to
1340 if (GET_CODE (insn
) != NOTE
1341 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1342 insn
= XEXP (temp
, 0);
1344 do insn
= NEXT_INSN (insn
);
1345 while (GET_CODE (insn
) == NOTE
);
1351 /* Ignore any movable whose insn falls within a libcall
1352 which is part of another movable.
1353 We make use of the fact that the movable for the libcall value
1354 was made later and so appears later on the chain. */
1357 ignore_some_movables (movables
)
1358 struct movable
*movables
;
1360 register struct movable
*m
, *m1
;
1362 for (m
= movables
; m
; m
= m
->next
)
1364 /* Is this a movable for the value of a libcall? */
1365 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1369 /* Check for earlier movables inside that range,
1370 and mark them invalid. We cannot use LUIDs here because
1371 insns created by loop.c for prior loops don't have LUIDs.
1372 Rather than reject all such insns from movables, we just
1373 explicitly check each insn in the libcall (since invariant
1374 libcalls aren't that common). */
1375 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1376 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1377 if (m1
->insn
== insn
)
1383 /* For each movable insn, see if the reg that it loads
1384 leads when it dies right into another conditionally movable insn.
1385 If so, record that the second insn "forces" the first one,
1386 since the second can be moved only if the first is. */
1389 force_movables (movables
)
1390 struct movable
*movables
;
1392 register struct movable
*m
, *m1
;
1393 for (m1
= movables
; m1
; m1
= m1
->next
)
1394 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1395 if (!m1
->partial
&& !m1
->done
)
1397 int regno
= m1
->regno
;
1398 for (m
= m1
->next
; m
; m
= m
->next
)
1399 /* ??? Could this be a bug? What if CSE caused the
1400 register of M1 to be used after this insn?
1401 Since CSE does not update regno_last_uid,
1402 this insn M->insn might not be where it dies.
1403 But very likely this doesn't matter; what matters is
1404 that M's reg is computed from M1's reg. */
1405 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1408 if (m
!= 0 && m
->set_src
== m1
->set_dest
1409 /* If m->consec, m->set_src isn't valid. */
1413 /* Increase the priority of the moving the first insn
1414 since it permits the second to be moved as well. */
1418 m1
->lifetime
+= m
->lifetime
;
1419 m1
->savings
+= m
->savings
;
1424 /* Find invariant expressions that are equal and can be combined into
1428 combine_movables (movables
, nregs
)
1429 struct movable
*movables
;
1432 register struct movable
*m
;
1433 char *matched_regs
= (char *) alloca (nregs
);
1434 enum machine_mode mode
;
1436 /* Regs that are set more than once are not allowed to match
1437 or be matched. I'm no longer sure why not. */
1438 /* Perhaps testing m->consec_sets would be more appropriate here? */
1440 for (m
= movables
; m
; m
= m
->next
)
1441 if (m
->match
== 0 && VARRAY_INT (n_times_set
, m
->regno
) == 1 && !m
->partial
)
1443 register struct movable
*m1
;
1444 int regno
= m
->regno
;
1446 bzero (matched_regs
, nregs
);
1447 matched_regs
[regno
] = 1;
1449 /* We want later insns to match the first one. Don't make the first
1450 one match any later ones. So start this loop at m->next. */
1451 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1452 if (m
!= m1
&& m1
->match
== 0 && VARRAY_INT (n_times_set
, m1
->regno
) == 1
1453 /* A reg used outside the loop mustn't be eliminated. */
1455 /* A reg used for zero-extending mustn't be eliminated. */
1457 && (matched_regs
[m1
->regno
]
1460 /* Can combine regs with different modes loaded from the
1461 same constant only if the modes are the same or
1462 if both are integer modes with M wider or the same
1463 width as M1. The check for integer is redundant, but
1464 safe, since the only case of differing destination
1465 modes with equal sources is when both sources are
1466 VOIDmode, i.e., CONST_INT. */
1467 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1468 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1469 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1470 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1471 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1472 /* See if the source of M1 says it matches M. */
1473 && ((GET_CODE (m1
->set_src
) == REG
1474 && matched_regs
[REGNO (m1
->set_src
)])
1475 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1477 && ((m
->dependencies
== m1
->dependencies
)
1478 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1480 m
->lifetime
+= m1
->lifetime
;
1481 m
->savings
+= m1
->savings
;
1484 matched_regs
[m1
->regno
] = 1;
1488 /* Now combine the regs used for zero-extension.
1489 This can be done for those not marked `global'
1490 provided their lives don't overlap. */
1492 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1493 mode
= GET_MODE_WIDER_MODE (mode
))
1495 register struct movable
*m0
= 0;
1497 /* Combine all the registers for extension from mode MODE.
1498 Don't combine any that are used outside this loop. */
1499 for (m
= movables
; m
; m
= m
->next
)
1500 if (m
->partial
&& ! m
->global
1501 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1503 register struct movable
*m1
;
1504 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1505 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1509 /* First one: don't check for overlap, just record it. */
1514 /* Make sure they extend to the same mode.
1515 (Almost always true.) */
1516 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1519 /* We already have one: check for overlap with those
1520 already combined together. */
1521 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1522 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1523 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1524 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1527 /* No overlap: we can combine this with the others. */
1528 m0
->lifetime
+= m
->lifetime
;
1529 m0
->savings
+= m
->savings
;
1538 /* Return 1 if regs X and Y will become the same if moved. */
1541 regs_match_p (x
, y
, movables
)
1543 struct movable
*movables
;
1547 struct movable
*mx
, *my
;
1549 for (mx
= movables
; mx
; mx
= mx
->next
)
1550 if (mx
->regno
== xn
)
1553 for (my
= movables
; my
; my
= my
->next
)
1554 if (my
->regno
== yn
)
1558 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1560 || mx
== my
->match
));
1563 /* Return 1 if X and Y are identical-looking rtx's.
1564 This is the Lisp function EQUAL for rtx arguments.
1566 If two registers are matching movables or a movable register and an
1567 equivalent constant, consider them equal. */
1570 rtx_equal_for_loop_p (x
, y
, movables
)
1572 struct movable
*movables
;
1576 register struct movable
*m
;
1577 register enum rtx_code code
;
1578 register const char *fmt
;
1582 if (x
== 0 || y
== 0)
1585 code
= GET_CODE (x
);
1587 /* If we have a register and a constant, they may sometimes be
1589 if (GET_CODE (x
) == REG
&& VARRAY_INT (set_in_loop
, REGNO (x
)) == -2
1592 for (m
= movables
; m
; m
= m
->next
)
1593 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1594 && rtx_equal_p (m
->set_src
, y
))
1597 else if (GET_CODE (y
) == REG
&& VARRAY_INT (set_in_loop
, REGNO (y
)) == -2
1600 for (m
= movables
; m
; m
= m
->next
)
1601 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1602 && rtx_equal_p (m
->set_src
, x
))
1606 /* Otherwise, rtx's of different codes cannot be equal. */
1607 if (code
!= GET_CODE (y
))
1610 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1611 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1613 if (GET_MODE (x
) != GET_MODE (y
))
1616 /* These three types of rtx's can be compared nonrecursively. */
1618 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1620 if (code
== LABEL_REF
)
1621 return XEXP (x
, 0) == XEXP (y
, 0);
1622 if (code
== SYMBOL_REF
)
1623 return XSTR (x
, 0) == XSTR (y
, 0);
1625 /* Compare the elements. If any pair of corresponding elements
1626 fail to match, return 0 for the whole things. */
1628 fmt
= GET_RTX_FORMAT (code
);
1629 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1634 if (XWINT (x
, i
) != XWINT (y
, i
))
1639 if (XINT (x
, i
) != XINT (y
, i
))
1644 /* Two vectors must have the same length. */
1645 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1648 /* And the corresponding elements must match. */
1649 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1650 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1655 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1660 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1665 /* These are just backpointers, so they don't matter. */
1671 /* It is believed that rtx's at this level will never
1672 contain anything but integers and other rtx's,
1673 except for within LABEL_REFs and SYMBOL_REFs. */
1681 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1682 insns in INSNS which use the reference. */
1685 add_label_notes (x
, insns
)
1689 enum rtx_code code
= GET_CODE (x
);
1694 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1696 /* This code used to ignore labels that referred to dispatch tables to
1697 avoid flow generating (slighly) worse code.
1699 We no longer ignore such label references (see LABEL_REF handling in
1700 mark_jump_label for additional information). */
1701 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1702 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1703 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1707 fmt
= GET_RTX_FORMAT (code
);
1708 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1711 add_label_notes (XEXP (x
, i
), insns
);
1712 else if (fmt
[i
] == 'E')
1713 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1714 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1718 /* Scan MOVABLES, and move the insns that deserve to be moved.
1719 If two matching movables are combined, replace one reg with the
1720 other throughout. */
1723 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1724 struct movable
*movables
;
1732 register struct movable
*m
;
1734 /* Map of pseudo-register replacements to handle combining
1735 when we move several insns that load the same value
1736 into different pseudo-registers. */
1737 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1738 char *already_moved
= (char *) alloca (nregs
);
1740 bzero (already_moved
, nregs
);
1741 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1745 for (m
= movables
; m
; m
= m
->next
)
1747 /* Describe this movable insn. */
1749 if (loop_dump_stream
)
1751 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1752 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1754 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1756 fprintf (loop_dump_stream
, "cond ");
1758 fprintf (loop_dump_stream
, "force ");
1760 fprintf (loop_dump_stream
, "global ");
1762 fprintf (loop_dump_stream
, "done ");
1764 fprintf (loop_dump_stream
, "move-insn ");
1766 fprintf (loop_dump_stream
, "matches %d ",
1767 INSN_UID (m
->match
->insn
));
1769 fprintf (loop_dump_stream
, "forces %d ",
1770 INSN_UID (m
->forces
->insn
));
1773 /* Count movables. Value used in heuristics in strength_reduce. */
1776 /* Ignore the insn if it's already done (it matched something else).
1777 Otherwise, see if it is now safe to move. */
1781 || (1 == invariant_p (m
->set_src
)
1782 && (m
->dependencies
== 0
1783 || 1 == invariant_p (m
->dependencies
))
1785 || 1 == consec_sets_invariant_p (m
->set_dest
,
1788 && (! m
->forces
|| m
->forces
->done
))
1792 int savings
= m
->savings
;
1794 /* We have an insn that is safe to move.
1795 Compute its desirability. */
1800 if (loop_dump_stream
)
1801 fprintf (loop_dump_stream
, "savings %d ", savings
);
1803 if (moved_once
[regno
] && loop_dump_stream
)
1804 fprintf (loop_dump_stream
, "halved since already moved ");
1806 /* An insn MUST be moved if we already moved something else
1807 which is safe only if this one is moved too: that is,
1808 if already_moved[REGNO] is nonzero. */
1810 /* An insn is desirable to move if the new lifetime of the
1811 register is no more than THRESHOLD times the old lifetime.
1812 If it's not desirable, it means the loop is so big
1813 that moving won't speed things up much,
1814 and it is liable to make register usage worse. */
1816 /* It is also desirable to move if it can be moved at no
1817 extra cost because something else was already moved. */
1819 if (already_moved
[regno
]
1820 || flag_move_all_movables
1821 || (threshold
* savings
* m
->lifetime
) >=
1822 (moved_once
[regno
] ? insn_count
* 2 : insn_count
)
1823 || (m
->forces
&& m
->forces
->done
1824 && VARRAY_INT (n_times_set
, m
->forces
->regno
) == 1))
1827 register struct movable
*m1
;
1828 rtx first
= NULL_RTX
;
1830 /* Now move the insns that set the reg. */
1832 if (m
->partial
&& m
->match
)
1836 /* Find the end of this chain of matching regs.
1837 Thus, we load each reg in the chain from that one reg.
1838 And that reg is loaded with 0 directly,
1839 since it has ->match == 0. */
1840 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1841 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1842 SET_DEST (PATTERN (m1
->insn
)));
1843 i1
= emit_insn_before (newpat
, loop_start
);
1845 /* Mark the moved, invariant reg as being allowed to
1846 share a hard reg with the other matching invariant. */
1847 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1848 r1
= SET_DEST (PATTERN (m
->insn
));
1849 r2
= SET_DEST (PATTERN (m1
->insn
));
1851 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1852 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1854 delete_insn (m
->insn
);
1859 if (loop_dump_stream
)
1860 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1862 /* If we are to re-generate the item being moved with a
1863 new move insn, first delete what we have and then emit
1864 the move insn before the loop. */
1865 else if (m
->move_insn
)
1869 for (count
= m
->consec
; count
>= 0; count
--)
1871 /* If this is the first insn of a library call sequence,
1873 if (GET_CODE (p
) != NOTE
1874 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1877 /* If this is the last insn of a libcall sequence, then
1878 delete every insn in the sequence except the last.
1879 The last insn is handled in the normal manner. */
1880 if (GET_CODE (p
) != NOTE
1881 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1883 temp
= XEXP (temp
, 0);
1885 temp
= delete_insn (temp
);
1889 p
= delete_insn (p
);
1891 /* simplify_giv_expr expects that it can walk the insns
1892 at m->insn forwards and see this old sequence we are
1893 tossing here. delete_insn does preserve the next
1894 pointers, but when we skip over a NOTE we must fix
1895 it up. Otherwise that code walks into the non-deleted
1897 while (p
&& GET_CODE (p
) == NOTE
)
1898 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1902 emit_move_insn (m
->set_dest
, m
->set_src
);
1903 temp
= get_insns ();
1906 add_label_notes (m
->set_src
, temp
);
1908 i1
= emit_insns_before (temp
, loop_start
);
1909 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1911 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1912 m
->set_src
, REG_NOTES (i1
));
1914 if (loop_dump_stream
)
1915 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1917 /* The more regs we move, the less we like moving them. */
1922 for (count
= m
->consec
; count
>= 0; count
--)
1926 /* If first insn of libcall sequence, skip to end. */
1927 /* Do this at start of loop, since p is guaranteed to
1929 if (GET_CODE (p
) != NOTE
1930 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1933 /* If last insn of libcall sequence, move all
1934 insns except the last before the loop. The last
1935 insn is handled in the normal manner. */
1936 if (GET_CODE (p
) != NOTE
1937 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1941 rtx fn_address_insn
= 0;
1944 for (temp
= XEXP (temp
, 0); temp
!= p
;
1945 temp
= NEXT_INSN (temp
))
1951 if (GET_CODE (temp
) == NOTE
)
1954 body
= PATTERN (temp
);
1956 /* Find the next insn after TEMP,
1957 not counting USE or NOTE insns. */
1958 for (next
= NEXT_INSN (temp
); next
!= p
;
1959 next
= NEXT_INSN (next
))
1960 if (! (GET_CODE (next
) == INSN
1961 && GET_CODE (PATTERN (next
)) == USE
)
1962 && GET_CODE (next
) != NOTE
)
1965 /* If that is the call, this may be the insn
1966 that loads the function address.
1968 Extract the function address from the insn
1969 that loads it into a register.
1970 If this insn was cse'd, we get incorrect code.
1972 So emit a new move insn that copies the
1973 function address into the register that the
1974 call insn will use. flow.c will delete any
1975 redundant stores that we have created. */
1976 if (GET_CODE (next
) == CALL_INSN
1977 && GET_CODE (body
) == SET
1978 && GET_CODE (SET_DEST (body
)) == REG
1979 && (n
= find_reg_note (temp
, REG_EQUAL
,
1982 fn_reg
= SET_SRC (body
);
1983 if (GET_CODE (fn_reg
) != REG
)
1984 fn_reg
= SET_DEST (body
);
1985 fn_address
= XEXP (n
, 0);
1986 fn_address_insn
= temp
;
1988 /* We have the call insn.
1989 If it uses the register we suspect it might,
1990 load it with the correct address directly. */
1991 if (GET_CODE (temp
) == CALL_INSN
1993 && reg_referenced_p (fn_reg
, body
))
1994 emit_insn_after (gen_move_insn (fn_reg
,
1998 if (GET_CODE (temp
) == CALL_INSN
)
2000 i1
= emit_call_insn_before (body
, loop_start
);
2001 /* Because the USAGE information potentially
2002 contains objects other than hard registers
2003 we need to copy it. */
2004 if (CALL_INSN_FUNCTION_USAGE (temp
))
2005 CALL_INSN_FUNCTION_USAGE (i1
)
2006 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2009 i1
= emit_insn_before (body
, loop_start
);
2012 if (temp
== fn_address_insn
)
2013 fn_address_insn
= i1
;
2014 REG_NOTES (i1
) = REG_NOTES (temp
);
2020 if (m
->savemode
!= VOIDmode
)
2022 /* P sets REG to zero; but we should clear only
2023 the bits that are not covered by the mode
2025 rtx reg
= m
->set_dest
;
2031 (GET_MODE (reg
), and_optab
, reg
,
2032 GEN_INT ((((HOST_WIDE_INT
) 1
2033 << GET_MODE_BITSIZE (m
->savemode
)))
2035 reg
, 1, OPTAB_LIB_WIDEN
);
2039 emit_move_insn (reg
, tem
);
2040 sequence
= gen_sequence ();
2042 i1
= emit_insn_before (sequence
, loop_start
);
2044 else if (GET_CODE (p
) == CALL_INSN
)
2046 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
2047 /* Because the USAGE information potentially
2048 contains objects other than hard registers
2049 we need to copy it. */
2050 if (CALL_INSN_FUNCTION_USAGE (p
))
2051 CALL_INSN_FUNCTION_USAGE (i1
)
2052 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2054 else if (count
== m
->consec
&& m
->move_insn_first
)
2056 /* The SET_SRC might not be invariant, so we must
2057 use the REG_EQUAL note. */
2059 emit_move_insn (m
->set_dest
, m
->set_src
);
2060 temp
= get_insns ();
2063 add_label_notes (m
->set_src
, temp
);
2065 i1
= emit_insns_before (temp
, loop_start
);
2066 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2068 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
2070 m
->set_src
, REG_NOTES (i1
));
2073 i1
= emit_insn_before (PATTERN (p
), loop_start
);
2075 if (REG_NOTES (i1
) == 0)
2077 REG_NOTES (i1
) = REG_NOTES (p
);
2079 /* If there is a REG_EQUAL note present whose value
2080 is not loop invariant, then delete it, since it
2081 may cause problems with later optimization passes.
2082 It is possible for cse to create such notes
2083 like this as a result of record_jump_cond. */
2085 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2086 && ! invariant_p (XEXP (temp
, 0)))
2087 remove_note (i1
, temp
);
2093 if (loop_dump_stream
)
2094 fprintf (loop_dump_stream
, " moved to %d",
2097 /* If library call, now fix the REG_NOTES that contain
2098 insn pointers, namely REG_LIBCALL on FIRST
2099 and REG_RETVAL on I1. */
2100 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2102 XEXP (temp
, 0) = first
;
2103 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2104 XEXP (temp
, 0) = i1
;
2111 /* simplify_giv_expr expects that it can walk the insns
2112 at m->insn forwards and see this old sequence we are
2113 tossing here. delete_insn does preserve the next
2114 pointers, but when we skip over a NOTE we must fix
2115 it up. Otherwise that code walks into the non-deleted
2117 while (p
&& GET_CODE (p
) == NOTE
)
2118 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2121 /* The more regs we move, the less we like moving them. */
2125 /* Any other movable that loads the same register
2127 already_moved
[regno
] = 1;
2129 /* This reg has been moved out of one loop. */
2130 moved_once
[regno
] = 1;
2132 /* The reg set here is now invariant. */
2134 VARRAY_INT (set_in_loop
, regno
) = 0;
2138 /* Change the length-of-life info for the register
2139 to say it lives at least the full length of this loop.
2140 This will help guide optimizations in outer loops. */
2142 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2143 /* This is the old insn before all the moved insns.
2144 We can't use the moved insn because it is out of range
2145 in uid_luid. Only the old insns have luids. */
2146 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2147 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2148 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2150 /* Combine with this moved insn any other matching movables. */
2153 for (m1
= movables
; m1
; m1
= m1
->next
)
2158 /* Schedule the reg loaded by M1
2159 for replacement so that shares the reg of M.
2160 If the modes differ (only possible in restricted
2161 circumstances, make a SUBREG.
2163 Note this assumes that the target dependent files
2164 treat REG and SUBREG equally, including within
2165 GO_IF_LEGITIMATE_ADDRESS and in all the
2166 predicates since we never verify that replacing the
2167 original register with a SUBREG results in a
2168 recognizable insn. */
2169 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2170 reg_map
[m1
->regno
] = m
->set_dest
;
2173 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2176 /* Get rid of the matching insn
2177 and prevent further processing of it. */
2180 /* if library call, delete all insn except last, which
2182 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2185 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2186 temp
= NEXT_INSN (temp
))
2189 delete_insn (m1
->insn
);
2191 /* Any other movable that loads the same register
2193 already_moved
[m1
->regno
] = 1;
2195 /* The reg merged here is now invariant,
2196 if the reg it matches is invariant. */
2198 VARRAY_INT (set_in_loop
, m1
->regno
) = 0;
2201 else if (loop_dump_stream
)
2202 fprintf (loop_dump_stream
, "not desirable");
2204 else if (loop_dump_stream
&& !m
->match
)
2205 fprintf (loop_dump_stream
, "not safe");
2207 if (loop_dump_stream
)
2208 fprintf (loop_dump_stream
, "\n");
2212 new_start
= loop_start
;
2214 /* Go through all the instructions in the loop, making
2215 all the register substitutions scheduled in REG_MAP. */
2216 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2217 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2218 || GET_CODE (p
) == CALL_INSN
)
2220 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2221 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2227 /* Scan X and replace the address of any MEM in it with ADDR.
2228 REG is the address that MEM should have before the replacement. */
2231 replace_call_address (x
, reg
, addr
)
2234 register enum rtx_code code
;
2236 register const char *fmt
;
2240 code
= GET_CODE (x
);
2254 /* Short cut for very common case. */
2255 replace_call_address (XEXP (x
, 1), reg
, addr
);
2259 /* Short cut for very common case. */
2260 replace_call_address (XEXP (x
, 0), reg
, addr
);
2264 /* If this MEM uses a reg other than the one we expected,
2265 something is wrong. */
2266 if (XEXP (x
, 0) != reg
)
2275 fmt
= GET_RTX_FORMAT (code
);
2276 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2279 replace_call_address (XEXP (x
, i
), reg
, addr
);
2283 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2284 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2290 /* Return the number of memory refs to addresses that vary
2294 count_nonfixed_reads (x
)
2297 register enum rtx_code code
;
2299 register const char *fmt
;
2305 code
= GET_CODE (x
);
2319 return ((invariant_p (XEXP (x
, 0)) != 1)
2320 + count_nonfixed_reads (XEXP (x
, 0)));
2327 fmt
= GET_RTX_FORMAT (code
);
2328 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2331 value
+= count_nonfixed_reads (XEXP (x
, i
));
2335 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2336 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2344 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2345 Replace it with an instruction to load just the low bytes
2346 if the machine supports such an instruction,
2347 and insert above LOOP_START an instruction to clear the register. */
2350 constant_high_bytes (p
, loop_start
)
2354 register int insn_code_number
;
2356 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2357 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2362 gen_rtx_STRICT_LOW_PART
2364 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2365 SET_DEST (PATTERN (p
)), 0)),
2366 XEXP (SET_SRC (PATTERN (p
)), 0));
2368 insn_code_number
= recog (new, p
);
2370 if (insn_code_number
)
2374 /* Clear destination register before the loop. */
2375 emit_insn_before (gen_rtx_SET (VOIDmode
,
2376 SET_DEST (PATTERN (p
)), const0_rtx
),
2379 /* Inside the loop, just load the low part. */
2385 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2386 `has_call', `has_volatile', and `has_tablejump' within LOOP_INFO.
2387 Set the global variables `unknown_address_altered' and
2388 `num_mem_sets'. Also, fill in the array `loop_mems' and the list
2389 `loop_store_mems'. */
2392 prescan_loop (start
, end
, loop_info
)
2394 struct loop_info
*loop_info
;
2396 register int level
= 1;
2398 /* The label after END. Jumping here is just like falling off the
2399 end of the loop. We use next_nonnote_insn instead of next_label
2400 as a hedge against the (pathological) case where some actual insn
2401 might end up between the two. */
2402 rtx exit_target
= next_nonnote_insn (end
);
2404 loop_info
->num
= uid_loop_num
[INSN_UID (start
)];
2405 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2406 loop_info
->has_call
= 0;
2407 loop_info
->has_volatile
= 0;
2408 loop_info
->has_tablejump
= 0;
2409 loop_info
->loops_enclosed
= 1;
2410 loop_info
->has_multiple_exit_targets
= 0;
2411 loop_info
->cont
= 0;
2412 loop_info
->vtop
= 0;
2414 unknown_address_altered
= 0;
2415 loop_store_mems
= NULL_RTX
;
2416 first_loop_store_insn
= NULL_RTX
;
2420 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2421 insn
= NEXT_INSN (insn
))
2423 if (GET_CODE (insn
) == NOTE
)
2425 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2428 /* Count number of loops contained in this one. */
2429 loop_info
->loops_enclosed
++;
2431 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2440 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2443 loop_info
->cont
= insn
;
2445 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_VTOP
)
2447 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2448 or while style loop, with a loop exit test at the
2449 start. Thus, we can assume that the loop condition
2450 was true when the loop was entered. */
2452 loop_info
->vtop
= insn
;
2455 else if (GET_CODE (insn
) == CALL_INSN
)
2457 if (! CONST_CALL_P (insn
))
2458 unknown_address_altered
= 1;
2459 loop_info
->has_call
= 1;
2461 else if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2463 rtx label1
= NULL_RTX
;
2464 rtx label2
= NULL_RTX
;
2466 if (volatile_refs_p (PATTERN (insn
)))
2467 loop_info
->has_volatile
= 1;
2469 if (GET_CODE (insn
) == JUMP_INSN
2470 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2471 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2472 loop_info
->has_tablejump
= 1;
2474 note_stores (PATTERN (insn
), note_addr_stored
);
2475 if (! first_loop_store_insn
&& loop_store_mems
)
2476 first_loop_store_insn
= insn
;
2478 if (! loop_info
->has_multiple_exit_targets
2479 && GET_CODE (insn
) == JUMP_INSN
2480 && GET_CODE (PATTERN (insn
)) == SET
2481 && SET_DEST (PATTERN (insn
)) == pc_rtx
)
2483 if (GET_CODE (SET_SRC (PATTERN (insn
))) == IF_THEN_ELSE
)
2485 label1
= XEXP (SET_SRC (PATTERN (insn
)), 1);
2486 label2
= XEXP (SET_SRC (PATTERN (insn
)), 2);
2490 label1
= SET_SRC (PATTERN (insn
));
2494 if (label1
&& label1
!= pc_rtx
)
2496 if (GET_CODE (label1
) != LABEL_REF
)
2498 /* Something tricky. */
2499 loop_info
->has_multiple_exit_targets
= 1;
2502 else if (XEXP (label1
, 0) != exit_target
2503 && LABEL_OUTSIDE_LOOP_P (label1
))
2505 /* A jump outside the current loop. */
2506 loop_info
->has_multiple_exit_targets
= 1;
2516 else if (GET_CODE (insn
) == RETURN
)
2517 loop_info
->has_multiple_exit_targets
= 1;
2520 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2521 if (/* We can't tell what MEMs are aliased by what. */
2522 !unknown_address_altered
2523 /* An exception thrown by a called function might land us
2525 && !loop_info
->has_call
2526 /* We don't want loads for MEMs moved to a location before the
2527 one at which their stack memory becomes allocated. (Note
2528 that this is not a problem for malloc, etc., since those
2529 require actual function calls. */
2530 && !current_function_calls_alloca
2531 /* There are ways to leave the loop other than falling off the
2533 && !loop_info
->has_multiple_exit_targets
)
2534 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2535 insn
= NEXT_INSN (insn
))
2536 for_each_rtx (&insn
, insert_loop_mem
, 0);
2539 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2540 and the continue note that is a the destination of a (cond)jump after
2541 the continue note. If there is any (cond)jump between the loop start
2542 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2543 target between LOOP_DOMINATOR and the continue note, move
2544 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2545 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2548 verify_dominator (loop_number
)
2553 if (! loop_number_cont_dominator
[loop_number
])
2554 /* This can happen for an empty loop, e.g. in
2555 gcc.c-torture/compile/920410-2.c */
2557 if (loop_number_cont_dominator
[loop_number
] == const0_rtx
)
2559 loop_number_cont_dominator
[loop_number
] = 0;
2562 for (insn
= loop_number_loop_starts
[loop_number
];
2563 insn
!= loop_number_cont_dominator
[loop_number
];
2564 insn
= NEXT_INSN (insn
))
2566 if (GET_CODE (insn
) == JUMP_INSN
2567 && GET_CODE (PATTERN (insn
)) != RETURN
)
2569 rtx label
= JUMP_LABEL (insn
);
2572 /* If it is not a jump we can easily understand or for
2573 which we do not have jump target information in the JUMP_LABEL
2574 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2575 LOOP_NUMBER_CONT_DOMINATOR. */
2576 if ((! condjump_p (insn
)
2577 && ! condjump_in_parallel_p (insn
))
2578 || label
== NULL_RTX
)
2580 loop_number_cont_dominator
[loop_number
] = NULL_RTX
;
2584 label_luid
= INSN_LUID (label
);
2585 if (label_luid
< INSN_LUID (loop_number_loop_cont
[loop_number
])
2587 > INSN_LUID (loop_number_cont_dominator
[loop_number
])))
2588 loop_number_cont_dominator
[loop_number
] = label
;
2593 /* Scan the function looking for loops. Record the start and end of each loop.
2594 Also mark as invalid loops any loops that contain a setjmp or are branched
2595 to from outside the loop. */
2598 find_and_verify_loops (f
)
2602 int current_loop
= -1;
2606 compute_luids (f
, NULL_RTX
, 0);
2608 /* If there are jumps to undefined labels,
2609 treat them as jumps out of any/all loops.
2610 This also avoids writing past end of tables when there are no loops. */
2611 uid_loop_num
[0] = -1;
2613 /* Find boundaries of loops, mark which loops are contained within
2614 loops, and invalidate loops that have setjmp. */
2616 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2618 if (GET_CODE (insn
) == NOTE
)
2619 switch (NOTE_LINE_NUMBER (insn
))
2621 case NOTE_INSN_LOOP_BEG
:
2622 loop_number_loop_starts
[++next_loop
] = insn
;
2623 loop_number_loop_ends
[next_loop
] = 0;
2624 loop_number_loop_cont
[next_loop
] = 0;
2625 loop_number_cont_dominator
[next_loop
] = 0;
2626 loop_outer_loop
[next_loop
] = current_loop
;
2627 loop_invalid
[next_loop
] = 0;
2628 loop_number_exit_labels
[next_loop
] = 0;
2629 loop_number_exit_count
[next_loop
] = 0;
2630 current_loop
= next_loop
;
2633 case NOTE_INSN_SETJMP
:
2634 /* In this case, we must invalidate our current loop and any
2636 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2638 loop_invalid
[loop
] = 1;
2639 if (loop_dump_stream
)
2640 fprintf (loop_dump_stream
,
2641 "\nLoop at %d ignored due to setjmp.\n",
2642 INSN_UID (loop_number_loop_starts
[loop
]));
2646 case NOTE_INSN_LOOP_CONT
:
2647 loop_number_loop_cont
[current_loop
] = insn
;
2649 case NOTE_INSN_LOOP_END
:
2650 if (current_loop
== -1)
2653 loop_number_loop_ends
[current_loop
] = insn
;
2654 verify_dominator (current_loop
);
2655 current_loop
= loop_outer_loop
[current_loop
];
2661 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2662 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2663 else if (GET_CODE (insn
) == JUMP_INSN
2664 && GET_CODE (PATTERN (insn
)) != RETURN
2665 && current_loop
>= 0)
2668 rtx label
= JUMP_LABEL (insn
);
2670 if (! condjump_p (insn
) && ! condjump_in_parallel_p (insn
))
2673 this_loop_num
= current_loop
;
2676 /* First see if we care about this loop. */
2677 if (loop_number_loop_cont
[this_loop_num
]
2678 && loop_number_cont_dominator
[this_loop_num
] != const0_rtx
)
2680 /* If the jump destination is not known, invalidate
2681 loop_number_const_dominator. */
2683 loop_number_cont_dominator
[this_loop_num
] = const0_rtx
;
2685 /* Check if the destination is between loop start and
2687 if ((INSN_LUID (label
)
2688 < INSN_LUID (loop_number_loop_cont
[this_loop_num
]))
2689 && (INSN_LUID (label
)
2690 > INSN_LUID (loop_number_loop_starts
[this_loop_num
]))
2691 /* And if there is no later destination already
2693 && (! loop_number_cont_dominator
[this_loop_num
]
2694 || (INSN_LUID (label
)
2695 > INSN_LUID (loop_number_cont_dominator
2697 loop_number_cont_dominator
[this_loop_num
] = label
;
2699 this_loop_num
= loop_outer_loop
[this_loop_num
];
2701 while (this_loop_num
>= 0);
2704 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2705 enclosing loop, but this doesn't matter. */
2706 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2709 /* Any loop containing a label used in an initializer must be invalidated,
2710 because it can be jumped into from anywhere. */
2712 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2716 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2718 loop_num
= loop_outer_loop
[loop_num
])
2719 loop_invalid
[loop_num
] = 1;
2722 /* Any loop containing a label used for an exception handler must be
2723 invalidated, because it can be jumped into from anywhere. */
2725 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2729 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2731 loop_num
= loop_outer_loop
[loop_num
])
2732 loop_invalid
[loop_num
] = 1;
2735 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2736 loop that it is not contained within, that loop is marked invalid.
2737 If any INSN or CALL_INSN uses a label's address, then the loop containing
2738 that label is marked invalid, because it could be jumped into from
2741 Also look for blocks of code ending in an unconditional branch that
2742 exits the loop. If such a block is surrounded by a conditional
2743 branch around the block, move the block elsewhere (see below) and
2744 invert the jump to point to the code block. This may eliminate a
2745 label in our loop and will simplify processing by both us and a
2746 possible second cse pass. */
2748 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2749 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2751 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2753 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2755 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2760 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2762 loop_num
= loop_outer_loop
[loop_num
])
2763 loop_invalid
[loop_num
] = 1;
2767 if (GET_CODE (insn
) != JUMP_INSN
)
2770 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2772 /* See if this is an unconditional branch outside the loop. */
2773 if (this_loop_num
!= -1
2774 && (GET_CODE (PATTERN (insn
)) == RETURN
2775 || (simplejump_p (insn
)
2776 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2778 && get_max_uid () < max_uid_for_loop
)
2781 rtx our_next
= next_real_insn (insn
);
2783 int outer_loop
= -1;
2785 /* Go backwards until we reach the start of the loop, a label,
2787 for (p
= PREV_INSN (insn
);
2788 GET_CODE (p
) != CODE_LABEL
2789 && ! (GET_CODE (p
) == NOTE
2790 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2791 && GET_CODE (p
) != JUMP_INSN
;
2795 /* Check for the case where we have a jump to an inner nested
2796 loop, and do not perform the optimization in that case. */
2798 if (JUMP_LABEL (insn
))
2800 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2801 if (dest_loop
!= -1)
2803 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2804 outer_loop
= loop_outer_loop
[outer_loop
])
2805 if (outer_loop
== this_loop_num
)
2810 /* Make sure that the target of P is within the current loop. */
2812 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2813 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2814 outer_loop
= this_loop_num
;
2816 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2817 we have a block of code to try to move.
2819 We look backward and then forward from the target of INSN
2820 to find a BARRIER at the same loop depth as the target.
2821 If we find such a BARRIER, we make a new label for the start
2822 of the block, invert the jump in P and point it to that label,
2823 and move the block of code to the spot we found. */
2825 if (outer_loop
== -1
2826 && GET_CODE (p
) == JUMP_INSN
2827 && JUMP_LABEL (p
) != 0
2828 /* Just ignore jumps to labels that were never emitted.
2829 These always indicate compilation errors. */
2830 && INSN_UID (JUMP_LABEL (p
)) != 0
2832 && ! simplejump_p (p
)
2833 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2836 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2837 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2840 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2841 if (GET_CODE (loc
) == BARRIER
2842 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2846 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2847 if (GET_CODE (loc
) == BARRIER
2848 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2853 rtx cond_label
= JUMP_LABEL (p
);
2854 rtx new_label
= get_label_after (p
);
2856 /* Ensure our label doesn't go away. */
2857 LABEL_NUSES (cond_label
)++;
2859 /* Verify that uid_loop_num is large enough and that
2861 if (invert_jump (p
, new_label
))
2865 /* If no suitable BARRIER was found, create a suitable
2866 one before TARGET. Since TARGET is a fall through
2867 path, we'll need to insert an jump around our block
2868 and a add a BARRIER before TARGET.
2870 This creates an extra unconditional jump outside
2871 the loop. However, the benefits of removing rarely
2872 executed instructions from inside the loop usually
2873 outweighs the cost of the extra unconditional jump
2874 outside the loop. */
2879 temp
= gen_jump (JUMP_LABEL (insn
));
2880 temp
= emit_jump_insn_before (temp
, target
);
2881 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2882 LABEL_NUSES (JUMP_LABEL (insn
))++;
2883 loc
= emit_barrier_before (target
);
2886 /* Include the BARRIER after INSN and copy the
2888 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2889 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2891 /* All those insns are now in TARGET_LOOP_NUM. */
2892 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2894 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2896 /* The label jumped to by INSN is no longer a loop exit.
2897 Unless INSN does not have a label (e.g., it is a
2898 RETURN insn), search loop_number_exit_labels to find
2899 its label_ref, and remove it. Also turn off
2900 LABEL_OUTSIDE_LOOP_P bit. */
2901 if (JUMP_LABEL (insn
))
2906 r
= loop_number_exit_labels
[this_loop_num
];
2907 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2908 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2910 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2912 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2914 loop_number_exit_labels
[this_loop_num
]
2915 = LABEL_NEXTREF (r
);
2919 for (loop_num
= this_loop_num
;
2920 loop_num
!= -1 && loop_num
!= target_loop_num
;
2921 loop_num
= loop_outer_loop
[loop_num
])
2922 loop_number_exit_count
[loop_num
]--;
2924 /* If we didn't find it, then something is wrong. */
2929 /* P is now a jump outside the loop, so it must be put
2930 in loop_number_exit_labels, and marked as such.
2931 The easiest way to do this is to just call
2932 mark_loop_jump again for P. */
2933 mark_loop_jump (PATTERN (p
), this_loop_num
);
2935 /* If INSN now jumps to the insn after it,
2937 if (JUMP_LABEL (insn
) != 0
2938 && (next_real_insn (JUMP_LABEL (insn
))
2939 == next_real_insn (insn
)))
2943 /* Continue the loop after where the conditional
2944 branch used to jump, since the only branch insn
2945 in the block (if it still remains) is an inter-loop
2946 branch and hence needs no processing. */
2947 insn
= NEXT_INSN (cond_label
);
2949 if (--LABEL_NUSES (cond_label
) == 0)
2950 delete_insn (cond_label
);
2952 /* This loop will be continued with NEXT_INSN (insn). */
2953 insn
= PREV_INSN (insn
);
2960 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2961 loops it is contained in, mark the target loop invalid.
2963 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2966 mark_loop_jump (x
, loop_num
)
2974 switch (GET_CODE (x
))
2987 /* There could be a label reference in here. */
2988 mark_loop_jump (XEXP (x
, 0), loop_num
);
2994 mark_loop_jump (XEXP (x
, 0), loop_num
);
2995 mark_loop_jump (XEXP (x
, 1), loop_num
);
2999 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3000 mark_loop_jump (XEXP (x
, 1), loop_num
);
3005 mark_loop_jump (XEXP (x
, 0), loop_num
);
3009 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
3011 /* Link together all labels that branch outside the loop. This
3012 is used by final_[bg]iv_value and the loop unrolling code. Also
3013 mark this LABEL_REF so we know that this branch should predict
3016 /* A check to make sure the label is not in an inner nested loop,
3017 since this does not count as a loop exit. */
3018 if (dest_loop
!= -1)
3020 for (outer_loop
= dest_loop
; outer_loop
!= -1;
3021 outer_loop
= loop_outer_loop
[outer_loop
])
3022 if (outer_loop
== loop_num
)
3028 if (loop_num
!= -1 && outer_loop
== -1)
3030 LABEL_OUTSIDE_LOOP_P (x
) = 1;
3031 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
3032 loop_number_exit_labels
[loop_num
] = x
;
3034 for (outer_loop
= loop_num
;
3035 outer_loop
!= -1 && outer_loop
!= dest_loop
;
3036 outer_loop
= loop_outer_loop
[outer_loop
])
3037 loop_number_exit_count
[outer_loop
]++;
3040 /* If this is inside a loop, but not in the current loop or one enclosed
3041 by it, it invalidates at least one loop. */
3043 if (dest_loop
== -1)
3046 /* We must invalidate every nested loop containing the target of this
3047 label, except those that also contain the jump insn. */
3049 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
3051 /* Stop when we reach a loop that also contains the jump insn. */
3052 for (outer_loop
= loop_num
; outer_loop
!= -1;
3053 outer_loop
= loop_outer_loop
[outer_loop
])
3054 if (dest_loop
== outer_loop
)
3057 /* If we get here, we know we need to invalidate a loop. */
3058 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
3059 fprintf (loop_dump_stream
,
3060 "\nLoop at %d ignored due to multiple entry points.\n",
3061 INSN_UID (loop_number_loop_starts
[dest_loop
]));
3063 loop_invalid
[dest_loop
] = 1;
3068 /* If this is not setting pc, ignore. */
3069 if (SET_DEST (x
) == pc_rtx
)
3070 mark_loop_jump (SET_SRC (x
), loop_num
);
3074 mark_loop_jump (XEXP (x
, 1), loop_num
);
3075 mark_loop_jump (XEXP (x
, 2), loop_num
);
3080 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
3081 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
3085 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
3086 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
3090 /* Strictly speaking this is not a jump into the loop, only a possible
3091 jump out of the loop. However, we have no way to link the destination
3092 of this jump onto the list of exit labels. To be safe we mark this
3093 loop and any containing loops as invalid. */
3096 for (outer_loop
= loop_num
; outer_loop
!= -1;
3097 outer_loop
= loop_outer_loop
[outer_loop
])
3099 if (loop_dump_stream
&& ! loop_invalid
[outer_loop
])
3100 fprintf (loop_dump_stream
,
3101 "\nLoop at %d ignored due to unknown exit jump.\n",
3102 INSN_UID (loop_number_loop_starts
[outer_loop
]));
3103 loop_invalid
[outer_loop
] = 1;
3110 /* Return nonzero if there is a label in the range from
3111 insn INSN to and including the insn whose luid is END
3112 INSN must have an assigned luid (i.e., it must not have
3113 been previously created by loop.c). */
3116 labels_in_range_p (insn
, end
)
3120 while (insn
&& INSN_LUID (insn
) <= end
)
3122 if (GET_CODE (insn
) == CODE_LABEL
)
3124 insn
= NEXT_INSN (insn
);
3130 /* Record that a memory reference X is being set. */
3133 note_addr_stored (x
, y
)
3135 rtx y ATTRIBUTE_UNUSED
;
3137 if (x
== 0 || GET_CODE (x
) != MEM
)
3140 /* Count number of memory writes.
3141 This affects heuristics in strength_reduce. */
3144 /* BLKmode MEM means all memory is clobbered. */
3145 if (GET_MODE (x
) == BLKmode
)
3146 unknown_address_altered
= 1;
3148 if (unknown_address_altered
)
3151 loop_store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
, loop_store_mems
);
3154 /* Return nonzero if the rtx X is invariant over the current loop.
3156 The value is 2 if we refer to something only conditionally invariant.
3158 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3159 Otherwise, a memory ref is invariant if it does not conflict with
3160 anything stored in `loop_store_mems'. */
3167 register enum rtx_code code
;
3168 register const char *fmt
;
3169 int conditional
= 0;
3174 code
= GET_CODE (x
);
3184 /* A LABEL_REF is normally invariant, however, if we are unrolling
3185 loops, and this label is inside the loop, then it isn't invariant.
3186 This is because each unrolled copy of the loop body will have
3187 a copy of this label. If this was invariant, then an insn loading
3188 the address of this label into a register might get moved outside
3189 the loop, and then each loop body would end up using the same label.
3191 We don't know the loop bounds here though, so just fail for all
3193 if (flag_unroll_loops
)
3200 case UNSPEC_VOLATILE
:
3204 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3205 since the reg might be set by initialization within the loop. */
3207 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3208 || x
== arg_pointer_rtx
)
3209 && ! current_function_has_nonlocal_goto
)
3212 if (this_loop_info
.has_call
3213 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3216 if (VARRAY_INT (set_in_loop
, REGNO (x
)) < 0)
3219 return VARRAY_INT (set_in_loop
, REGNO (x
)) == 0;
3222 /* Volatile memory references must be rejected. Do this before
3223 checking for read-only items, so that volatile read-only items
3224 will be rejected also. */
3225 if (MEM_VOLATILE_P (x
))
3228 /* Read-only items (such as constants in a constant pool) are
3229 invariant if their address is. */
3230 if (RTX_UNCHANGING_P (x
))
3233 /* If we had a subroutine call, any location in memory could have been
3235 if (unknown_address_altered
)
3238 /* See if there is any dependence between a store and this load. */
3239 mem_list_entry
= loop_store_mems
;
3240 while (mem_list_entry
)
3242 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3245 mem_list_entry
= XEXP (mem_list_entry
, 1);
3248 /* It's not invalidated by a store in memory
3249 but we must still verify the address is invariant. */
3253 /* Don't mess with insns declared volatile. */
3254 if (MEM_VOLATILE_P (x
))
3262 fmt
= GET_RTX_FORMAT (code
);
3263 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3267 int tem
= invariant_p (XEXP (x
, i
));
3273 else if (fmt
[i
] == 'E')
3276 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3278 int tem
= invariant_p (XVECEXP (x
, i
, j
));
3288 return 1 + conditional
;
3292 /* Return nonzero if all the insns in the loop that set REG
3293 are INSN and the immediately following insns,
3294 and if each of those insns sets REG in an invariant way
3295 (not counting uses of REG in them).
3297 The value is 2 if some of these insns are only conditionally invariant.
3299 We assume that INSN itself is the first set of REG
3300 and that its source is invariant. */
3303 consec_sets_invariant_p (reg
, n_sets
, insn
)
3307 register rtx p
= insn
;
3308 register int regno
= REGNO (reg
);
3310 /* Number of sets we have to insist on finding after INSN. */
3311 int count
= n_sets
- 1;
3312 int old
= VARRAY_INT (set_in_loop
, regno
);
3316 /* If N_SETS hit the limit, we can't rely on its value. */
3320 VARRAY_INT (set_in_loop
, regno
) = 0;
3324 register enum rtx_code code
;
3328 code
= GET_CODE (p
);
3330 /* If library call, skip to end of it. */
3331 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3336 && (set
= single_set (p
))
3337 && GET_CODE (SET_DEST (set
)) == REG
3338 && REGNO (SET_DEST (set
)) == regno
)
3340 this = invariant_p (SET_SRC (set
));
3343 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3345 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3346 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3348 this = (CONSTANT_P (XEXP (temp
, 0))
3349 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3350 && invariant_p (XEXP (temp
, 0))));
3357 else if (code
!= NOTE
)
3359 VARRAY_INT (set_in_loop
, regno
) = old
;
3364 VARRAY_INT (set_in_loop
, regno
) = old
;
3365 /* If invariant_p ever returned 2, we return 2. */
3366 return 1 + (value
& 2);
3370 /* I don't think this condition is sufficient to allow INSN
3371 to be moved, so we no longer test it. */
3373 /* Return 1 if all insns in the basic block of INSN and following INSN
3374 that set REG are invariant according to TABLE. */
3377 all_sets_invariant_p (reg
, insn
, table
)
3381 register rtx p
= insn
;
3382 register int regno
= REGNO (reg
);
3386 register enum rtx_code code
;
3388 code
= GET_CODE (p
);
3389 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3391 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3392 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3393 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3395 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3402 /* Look at all uses (not sets) of registers in X. For each, if it is
3403 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3404 a different insn, set USAGE[REGNO] to const0_rtx. */
3407 find_single_use_in_loop (insn
, x
, usage
)
3412 enum rtx_code code
= GET_CODE (x
);
3413 const char *fmt
= GET_RTX_FORMAT (code
);
3417 VARRAY_RTX (usage
, REGNO (x
))
3418 = (VARRAY_RTX (usage
, REGNO (x
)) != 0
3419 && VARRAY_RTX (usage
, REGNO (x
)) != insn
)
3420 ? const0_rtx
: insn
;
3422 else if (code
== SET
)
3424 /* Don't count SET_DEST if it is a REG; otherwise count things
3425 in SET_DEST because if a register is partially modified, it won't
3426 show up as a potential movable so we don't care how USAGE is set
3428 if (GET_CODE (SET_DEST (x
)) != REG
)
3429 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3430 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3433 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3435 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3436 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3437 else if (fmt
[i
] == 'E')
3438 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3439 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3443 /* Count and record any set in X which is contained in INSN. Update
3444 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3447 count_one_set (insn
, x
, may_not_move
, last_set
)
3449 varray_type may_not_move
;
3452 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3453 /* Don't move a reg that has an explicit clobber.
3454 It's not worth the pain to try to do it correctly. */
3455 VARRAY_CHAR (may_not_move
, REGNO (XEXP (x
, 0))) = 1;
3457 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3459 rtx dest
= SET_DEST (x
);
3460 while (GET_CODE (dest
) == SUBREG
3461 || GET_CODE (dest
) == ZERO_EXTRACT
3462 || GET_CODE (dest
) == SIGN_EXTRACT
3463 || GET_CODE (dest
) == STRICT_LOW_PART
)
3464 dest
= XEXP (dest
, 0);
3465 if (GET_CODE (dest
) == REG
)
3467 register int regno
= REGNO (dest
);
3468 /* If this is the first setting of this reg
3469 in current basic block, and it was set before,
3470 it must be set in two basic blocks, so it cannot
3471 be moved out of the loop. */
3472 if (VARRAY_INT (set_in_loop
, regno
) > 0
3473 && last_set
[regno
] == 0)
3474 VARRAY_CHAR (may_not_move
, regno
) = 1;
3475 /* If this is not first setting in current basic block,
3476 see if reg was used in between previous one and this.
3477 If so, neither one can be moved. */
3478 if (last_set
[regno
] != 0
3479 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3480 VARRAY_CHAR (may_not_move
, regno
) = 1;
3481 if (VARRAY_INT (set_in_loop
, regno
) < 127)
3482 ++VARRAY_INT (set_in_loop
, regno
);
3483 last_set
[regno
] = insn
;
3488 /* Increment SET_IN_LOOP at the index of each register
3489 that is modified by an insn between FROM and TO.
3490 If the value of an element of SET_IN_LOOP becomes 127 or more,
3491 stop incrementing it, to avoid overflow.
3493 Store in SINGLE_USAGE[I] the single insn in which register I is
3494 used, if it is only used once. Otherwise, it is set to 0 (for no
3495 uses) or const0_rtx for more than one use. This parameter may be zero,
3496 in which case this processing is not done.
3498 Store in *COUNT_PTR the number of actual instruction
3499 in the loop. We use this to decide what is worth moving out. */
3501 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3502 In that case, it is the insn that last set reg n. */
3505 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3506 register rtx from
, to
;
3507 varray_type may_not_move
;
3508 varray_type single_usage
;
3512 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3514 register int count
= 0;
3516 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3517 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3519 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3523 /* Record registers that have exactly one use. */
3524 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3526 /* Include uses in REG_EQUAL notes. */
3527 if (REG_NOTES (insn
))
3528 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3530 if (GET_CODE (PATTERN (insn
)) == SET
3531 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3532 count_one_set (insn
, PATTERN (insn
), may_not_move
, last_set
);
3533 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3536 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3537 count_one_set (insn
, XVECEXP (PATTERN (insn
), 0, i
),
3538 may_not_move
, last_set
);
3542 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3543 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3548 /* Given a loop that is bounded by LOOP_START and LOOP_END
3549 and that is entered at SCAN_START,
3550 return 1 if the register set in SET contained in insn INSN is used by
3551 any insn that precedes INSN in cyclic order starting
3552 from the loop entry point.
3554 We don't want to use INSN_LUID here because if we restrict INSN to those
3555 that have a valid INSN_LUID, it means we cannot move an invariant out
3556 from an inner loop past two loops. */
3559 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3560 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3562 rtx reg
= SET_DEST (set
);
3565 /* Scan forward checking for register usage. If we hit INSN, we
3566 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3567 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3569 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3570 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3580 /* A "basic induction variable" or biv is a pseudo reg that is set
3581 (within this loop) only by incrementing or decrementing it. */
3582 /* A "general induction variable" or giv is a pseudo reg whose
3583 value is a linear function of a biv. */
3585 /* Bivs are recognized by `basic_induction_var';
3586 Givs by `general_induction_var'. */
3588 /* Indexed by register number, indicates whether or not register is an
3589 induction variable, and if so what type. */
3591 varray_type reg_iv_type
;
3593 /* Indexed by register number, contains pointer to `struct induction'
3594 if register is an induction variable. This holds general info for
3595 all induction variables. */
3597 varray_type reg_iv_info
;
3599 /* Indexed by register number, contains pointer to `struct iv_class'
3600 if register is a basic induction variable. This holds info describing
3601 the class (a related group) of induction variables that the biv belongs
3604 struct iv_class
**reg_biv_class
;
3606 /* The head of a list which links together (via the next field)
3607 every iv class for the current loop. */
3609 struct iv_class
*loop_iv_list
;
3611 /* Givs made from biv increments are always splittable for loop unrolling.
3612 Since there is no regscan info for them, we have to keep track of them
3614 int first_increment_giv
, last_increment_giv
;
3616 /* Communication with routines called via `note_stores'. */
3618 static rtx note_insn
;
3620 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3622 static rtx addr_placeholder
;
3624 /* ??? Unfinished optimizations, and possible future optimizations,
3625 for the strength reduction code. */
3627 /* ??? The interaction of biv elimination, and recognition of 'constant'
3628 bivs, may cause problems. */
3630 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3631 performance problems.
3633 Perhaps don't eliminate things that can be combined with an addressing
3634 mode. Find all givs that have the same biv, mult_val, and add_val;
3635 then for each giv, check to see if its only use dies in a following
3636 memory address. If so, generate a new memory address and check to see
3637 if it is valid. If it is valid, then store the modified memory address,
3638 otherwise, mark the giv as not done so that it will get its own iv. */
3640 /* ??? Could try to optimize branches when it is known that a biv is always
3643 /* ??? When replace a biv in a compare insn, we should replace with closest
3644 giv so that an optimized branch can still be recognized by the combiner,
3645 e.g. the VAX acb insn. */
3647 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3648 was rerun in loop_optimize whenever a register was added or moved.
3649 Also, some of the optimizations could be a little less conservative. */
3651 /* Perform strength reduction and induction variable elimination.
3653 Pseudo registers created during this function will be beyond the last
3654 valid index in several tables including n_times_set and regno_last_uid.
3655 This does not cause a problem here, because the added registers cannot be
3656 givs outside of their loop, and hence will never be reconsidered.
3657 But scan_loop must check regnos to make sure they are in bounds.
3659 SCAN_START is the first instruction in the loop, as the loop would
3660 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3661 the first instruction in the loop, as it is layed out in the
3662 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3663 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3666 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3667 loop_start
, loop_end
, loop_info
, loop_cont
, unroll_p
, bct_p
)
3674 struct loop_info
*loop_info
;
3676 int unroll_p
, bct_p ATTRIBUTE_UNUSED
;
3684 /* This is 1 if current insn is not executed at least once for every loop
3686 int not_every_iteration
= 0;
3687 /* This is 1 if current insn may be executed more than once for every
3689 int maybe_multiple
= 0;
3690 /* This is 1 if we have past a branch back to the top of the loop
3691 (aka a loop latch). */
3692 int past_loop_latch
= 0;
3693 /* Temporary list pointers for traversing loop_iv_list. */
3694 struct iv_class
*bl
, **backbl
;
3695 /* Ratio of extra register life span we can justify
3696 for saving an instruction. More if loop doesn't call subroutines
3697 since in that case saving an insn makes more difference
3698 and more registers are available. */
3699 /* ??? could set this to last value of threshold in move_movables */
3700 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3701 /* Map of pseudo-register replacements. */
3706 rtx end_insert_before
;
3708 int n_extra_increment
;
3709 int unrolled_insn_copies
;
3711 /* If scan_start points to the loop exit test, we have to be wary of
3712 subversive use of gotos inside expression statements. */
3713 if (prev_nonnote_insn (scan_start
) != prev_nonnote_insn (loop_start
))
3714 maybe_multiple
= back_branch_in_range_p (scan_start
, loop_start
, loop_end
);
3716 VARRAY_INT_INIT (reg_iv_type
, max_reg_before_loop
, "reg_iv_type");
3717 VARRAY_GENERIC_PTR_INIT (reg_iv_info
, max_reg_before_loop
, "reg_iv_info");
3718 reg_biv_class
= (struct iv_class
**)
3719 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3720 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3721 * sizeof (struct iv_class
*)));
3724 addr_placeholder
= gen_reg_rtx (Pmode
);
3726 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3727 must be put before this insn, so that they will appear in the right
3728 order (i.e. loop order).
3730 If loop_end is the end of the current function, then emit a
3731 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3733 if (NEXT_INSN (loop_end
) != 0)
3734 end_insert_before
= NEXT_INSN (loop_end
);
3736 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3738 /* Scan through loop to find all possible bivs. */
3740 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
3742 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
3744 if (GET_CODE (p
) == INSN
3745 && (set
= single_set (p
))
3746 && GET_CODE (SET_DEST (set
)) == REG
)
3748 dest_reg
= SET_DEST (set
);
3749 if (REGNO (dest_reg
) < max_reg_before_loop
3750 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3751 && REG_IV_TYPE (REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
3753 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3754 dest_reg
, p
, &inc_val
, &mult_val
,
3757 /* It is a possible basic induction variable.
3758 Create and initialize an induction structure for it. */
3761 = (struct induction
*) alloca (sizeof (struct induction
));
3763 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
, location
,
3764 not_every_iteration
, maybe_multiple
);
3765 REG_IV_TYPE (REGNO (dest_reg
)) = BASIC_INDUCT
;
3767 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3768 REG_IV_TYPE (REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
3772 /* Past CODE_LABEL, we get to insns that may be executed multiple
3773 times. The only way we can be sure that they can't is if every
3774 jump insn between here and the end of the loop either
3775 returns, exits the loop, is a jump to a location that is still
3776 behind the label, or is a jump to the loop start. */
3778 if (GET_CODE (p
) == CODE_LABEL
)
3786 insn
= NEXT_INSN (insn
);
3787 if (insn
== scan_start
)
3795 if (insn
== scan_start
)
3799 if (GET_CODE (insn
) == JUMP_INSN
3800 && GET_CODE (PATTERN (insn
)) != RETURN
3801 && (! condjump_p (insn
)
3802 || (JUMP_LABEL (insn
) != 0
3803 && JUMP_LABEL (insn
) != scan_start
3804 && ! loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
3812 /* Past a jump, we get to insns for which we can't count
3813 on whether they will be executed during each iteration. */
3814 /* This code appears twice in strength_reduce. There is also similar
3815 code in scan_loop. */
3816 if (GET_CODE (p
) == JUMP_INSN
3817 /* If we enter the loop in the middle, and scan around to the
3818 beginning, don't set not_every_iteration for that.
3819 This can be any kind of jump, since we want to know if insns
3820 will be executed if the loop is executed. */
3821 && ! (JUMP_LABEL (p
) == loop_top
3822 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3823 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3827 /* If this is a jump outside the loop, then it also doesn't
3828 matter. Check to see if the target of this branch is on the
3829 loop_number_exits_labels list. */
3831 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3833 label
= LABEL_NEXTREF (label
))
3834 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3838 not_every_iteration
= 1;
3841 else if (GET_CODE (p
) == NOTE
)
3843 /* At the virtual top of a converted loop, insns are again known to
3844 be executed each iteration: logically, the loop begins here
3845 even though the exit code has been duplicated.
3847 Insns are also again known to be executed each iteration at
3848 the LOOP_CONT note. */
3849 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
3850 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
3852 not_every_iteration
= 0;
3853 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3855 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3859 /* Note if we pass a loop latch. If we do, then we can not clear
3860 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3861 a loop since a jump before the last CODE_LABEL may have started
3862 a new loop iteration.
3864 Note that LOOP_TOP is only set for rotated loops and we need
3865 this check for all loops, so compare against the CODE_LABEL
3866 which immediately follows LOOP_START. */
3867 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == NEXT_INSN (loop_start
))
3868 past_loop_latch
= 1;
3870 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3871 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3872 or not an insn is known to be executed each iteration of the
3873 loop, whether or not any iterations are known to occur.
3875 Therefore, if we have just passed a label and have no more labels
3876 between here and the test insn of the loop, and we have not passed
3877 a jump to the top of the loop, then we know these insns will be
3878 executed each iteration. */
3880 if (not_every_iteration
3881 && ! past_loop_latch
3882 && GET_CODE (p
) == CODE_LABEL
3883 && no_labels_between_p (p
, loop_end
)
3884 && loop_insn_first_p (p
, loop_cont
))
3885 not_every_iteration
= 0;
3888 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3889 Make a sanity check against n_times_set. */
3890 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3892 if (REG_IV_TYPE (bl
->regno
) != BASIC_INDUCT
3893 /* Above happens if register modified by subreg, etc. */
3894 /* Make sure it is not recognized as a basic induction var: */
3895 || VARRAY_INT (n_times_set
, bl
->regno
) != bl
->biv_count
3896 /* If never incremented, it is invariant that we decided not to
3897 move. So leave it alone. */
3898 || ! bl
->incremented
)
3900 if (loop_dump_stream
)
3901 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3903 (REG_IV_TYPE (bl
->regno
) != BASIC_INDUCT
3904 ? "not induction variable"
3905 : (! bl
->incremented
? "never incremented"
3908 REG_IV_TYPE (bl
->regno
) = NOT_BASIC_INDUCT
;
3915 if (loop_dump_stream
)
3916 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3920 /* Exit if there are no bivs. */
3923 /* Can still unroll the loop anyways, but indicate that there is no
3924 strength reduction info available. */
3926 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
,
3932 /* Find initial value for each biv by searching backwards from loop_start,
3933 halting at first label. Also record any test condition. */
3936 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3940 if (GET_CODE (p
) == CALL_INSN
)
3943 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3944 || GET_CODE (p
) == CALL_INSN
)
3945 note_stores (PATTERN (p
), record_initial
);
3947 /* Record any test of a biv that branches around the loop if no store
3948 between it and the start of loop. We only care about tests with
3949 constants and registers and only certain of those. */
3950 if (GET_CODE (p
) == JUMP_INSN
3951 && JUMP_LABEL (p
) != 0
3952 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3953 && (test
= get_condition_for_loop (p
)) != 0
3954 && GET_CODE (XEXP (test
, 0)) == REG
3955 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3956 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3957 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3958 && bl
->init_insn
== 0)
3960 /* If an NE test, we have an initial value! */
3961 if (GET_CODE (test
) == NE
)
3964 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3965 XEXP (test
, 0), XEXP (test
, 1));
3968 bl
->initial_test
= test
;
3972 /* Look at the each biv and see if we can say anything better about its
3973 initial value from any initializing insns set up above. (This is done
3974 in two passes to avoid missing SETs in a PARALLEL.) */
3975 for (backbl
= &loop_iv_list
; (bl
= *backbl
); backbl
= &bl
->next
)
3980 if (! bl
->init_insn
)
3983 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3984 is a constant, use the value of that. */
3985 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3986 && CONSTANT_P (XEXP (note
, 0)))
3987 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3988 && CONSTANT_P (XEXP (note
, 0))))
3989 src
= XEXP (note
, 0);
3991 src
= SET_SRC (bl
->init_set
);
3993 if (loop_dump_stream
)
3994 fprintf (loop_dump_stream
,
3995 "Biv %d initialized at insn %d: initial value ",
3996 bl
->regno
, INSN_UID (bl
->init_insn
));
3998 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3999 || GET_MODE (src
) == VOIDmode
)
4000 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
4002 bl
->initial_value
= src
;
4004 if (loop_dump_stream
)
4006 if (GET_CODE (src
) == CONST_INT
)
4008 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
4009 fputc ('\n', loop_dump_stream
);
4013 print_rtl (loop_dump_stream
, src
);
4014 fprintf (loop_dump_stream
, "\n");
4020 struct iv_class
*bl2
= 0;
4021 rtx increment
= NULL_RTX
;
4023 /* Biv initial value is not a simple move. If it is the sum of
4024 another biv and a constant, check if both bivs are incremented
4025 in lockstep. Then we are actually looking at a giv.
4026 For simplicity, we only handle the case where there is but a
4027 single increment, and the register is not used elsewhere. */
4028 if (bl
->biv_count
== 1
4029 && bl
->regno
< max_reg_before_loop
4030 && uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4031 && GET_CODE (src
) == PLUS
4032 && GET_CODE (XEXP (src
, 0)) == REG
4033 && CONSTANT_P (XEXP (src
, 1))
4034 && ((increment
= biv_total_increment (bl
, loop_start
, loop_end
))
4037 int regno
= REGNO (XEXP (src
, 0));
4039 for (bl2
= loop_iv_list
; bl2
; bl2
= bl2
->next
)
4040 if (bl2
->regno
== regno
)
4044 /* Now, can we transform this biv into a giv? */
4046 && bl2
->biv_count
== 1
4047 && rtx_equal_p (increment
,
4048 biv_total_increment (bl2
, loop_start
, loop_end
))
4049 /* init_insn is only set to insns that are before loop_start
4050 without any intervening labels. */
4051 && ! reg_set_between_p (bl2
->biv
->src_reg
,
4052 PREV_INSN (bl
->init_insn
), loop_start
)
4053 /* The register from BL2 must be set before the register from
4054 BL is set, or we must be able to move the latter set after
4055 the former set. Currently there can't be any labels
4056 in-between when biv_toal_increment returns nonzero both times
4057 but we test it here in case some day some real cfg analysis
4058 gets used to set always_computable. */
4059 && ((loop_insn_first_p (bl2
->biv
->insn
, bl
->biv
->insn
)
4060 && no_labels_between_p (bl2
->biv
->insn
, bl
->biv
->insn
))
4061 || (! reg_used_between_p (bl
->biv
->src_reg
, bl
->biv
->insn
,
4063 && no_jumps_between_p (bl
->biv
->insn
, bl2
->biv
->insn
)))
4064 && validate_change (bl
->biv
->insn
,
4065 &SET_SRC (single_set (bl
->biv
->insn
)),
4068 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
4069 rtx dominator
= loop_number_cont_dominator
[loop_num
];
4070 rtx giv
= bl
->biv
->src_reg
;
4071 rtx giv_insn
= bl
->biv
->insn
;
4072 rtx after_giv
= NEXT_INSN (giv_insn
);
4074 if (loop_dump_stream
)
4075 fprintf (loop_dump_stream
, "is giv of biv %d\n", bl2
->regno
);
4076 /* Let this giv be discovered by the generic code. */
4077 REG_IV_TYPE (bl
->regno
) = UNKNOWN_INDUCT
;
4078 reg_biv_class
[bl
->regno
] = NULL_PTR
;
4079 /* We can get better optimization if we can move the giv setting
4080 before the first giv use. */
4082 && ! loop_insn_first_p (dominator
, scan_start
)
4083 && ! reg_set_between_p (bl2
->biv
->src_reg
, loop_start
,
4085 && ! reg_used_between_p (giv
, loop_start
, dominator
)
4086 && ! reg_used_between_p (giv
, giv_insn
, loop_end
))
4091 for (next
= NEXT_INSN (dominator
); ; next
= NEXT_INSN (next
))
4093 if ((GET_RTX_CLASS (GET_CODE (next
)) == 'i'
4094 && (reg_mentioned_p (giv
, PATTERN (next
))
4095 || reg_set_p (bl2
->biv
->src_reg
, next
)))
4096 || GET_CODE (next
) == JUMP_INSN
)
4099 if (GET_RTX_CLASS (GET_CODE (next
)) != 'i'
4100 || ! sets_cc0_p (PATTERN (next
)))
4104 if (loop_dump_stream
)
4105 fprintf (loop_dump_stream
, "move after insn %d\n",
4106 INSN_UID (dominator
));
4107 /* Avoid problems with luids by actually moving the insn
4108 and adjusting all luids in the range. */
4109 reorder_insns (giv_insn
, giv_insn
, dominator
);
4110 for (p
= dominator
; INSN_UID (p
) >= max_uid_for_loop
; )
4112 compute_luids (giv_insn
, after_giv
, INSN_LUID (p
));
4113 /* If the only purpose of the init insn is to initialize
4114 this giv, delete it. */
4115 if (single_set (bl
->init_insn
)
4116 && ! reg_used_between_p (giv
, bl
->init_insn
, loop_start
))
4117 delete_insn (bl
->init_insn
);
4119 else if (! loop_insn_first_p (bl2
->biv
->insn
, bl
->biv
->insn
))
4121 rtx p
= PREV_INSN (giv_insn
);
4122 while (INSN_UID (p
) >= max_uid_for_loop
)
4124 reorder_insns (giv_insn
, giv_insn
, bl2
->biv
->insn
);
4125 compute_luids (after_giv
, NEXT_INSN (giv_insn
),
4128 /* Remove this biv from the chain. */
4131 /* We move the following giv from *bl->next into *bl.
4132 We have to update reg_biv_class for that moved biv
4133 to point to its new address. */
4135 reg_biv_class
[bl
->regno
] = bl
;
4144 /* If we can't make it a giv,
4145 let biv keep initial value of "itself". */
4146 else if (loop_dump_stream
)
4147 fprintf (loop_dump_stream
, "is complex\n");
4151 /* If a biv is unconditionally incremented several times in a row, convert
4152 all but the last increment into a giv. */
4154 /* Get an upper bound for the number of registers
4155 we might have after all bivs have been processed. */
4156 first_increment_giv
= max_reg_num ();
4157 for (n_extra_increment
= 0, bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4158 n_extra_increment
+= bl
->biv_count
- 1;
4160 /* If the loop contains volatile memory references do not allow any
4161 replacements to take place, since this could loose the volatile markers. */
4162 if (n_extra_increment
&& ! loop_info
->has_volatile
)
4164 int nregs
= first_increment_giv
+ n_extra_increment
;
4166 /* Reallocate reg_iv_type and reg_iv_info. */
4167 VARRAY_GROW (reg_iv_type
, nregs
);
4168 VARRAY_GROW (reg_iv_info
, nregs
);
4170 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4172 struct induction
**vp
, *v
, *next
;
4173 int biv_dead_after_loop
= 0;
4175 /* The biv increments lists are in reverse order. Fix this first. */
4176 for (v
= bl
->biv
, bl
->biv
= 0; v
; v
= next
)
4179 v
->next_iv
= bl
->biv
;
4183 /* We must guard against the case that an early exit between v->insn
4184 and next->insn leaves the biv live after the loop, since that
4185 would mean that we'd be missing an increment for the final
4186 value. The following test to set biv_dead_after_loop is like
4187 the first part of the test to set bl->eliminable.
4188 We don't check here if we can calculate the final value, since
4189 this can't succeed if we already know that there is a jump
4190 between v->insn and next->insn, yet next->always_executed is
4191 set and next->maybe_multiple is cleared. Such a combination
4192 implies that the jump destination is outside the loop.
4193 If we want to make this check more sophisticated, we should
4194 check each branch between v->insn and next->insn individually
4195 to see if the biv is dead at its destination. */
4197 if (uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4199 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4200 && (uid_luid
[REGNO_FIRST_UID (bl
->regno
)]
4201 >= INSN_LUID (bl
->init_insn
))
4202 #ifdef HAVE_decrement_and_branch_until_zero
4205 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4206 biv_dead_after_loop
= 1;
4208 for (vp
= &bl
->biv
, next
= *vp
; v
= next
, next
= v
->next_iv
;)
4210 HOST_WIDE_INT offset
;
4211 rtx set
, add_val
, old_reg
, dest_reg
, last_use_insn
, note
;
4212 int old_regno
, new_regno
;
4214 if (! v
->always_executed
4215 || v
->maybe_multiple
4216 || GET_CODE (v
->add_val
) != CONST_INT
4217 || ! next
->always_executed
4218 || next
->maybe_multiple
4219 || ! CONSTANT_P (next
->add_val
)
4220 || v
->mult_val
!= const1_rtx
4221 || next
->mult_val
!= const1_rtx
4222 || ! (biv_dead_after_loop
4223 || no_jumps_between_p (v
->insn
, next
->insn
)))
4228 offset
= INTVAL (v
->add_val
);
4229 set
= single_set (v
->insn
);
4230 add_val
= plus_constant (next
->add_val
, offset
);
4231 old_reg
= v
->dest_reg
;
4232 dest_reg
= gen_reg_rtx (v
->mode
);
4234 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4235 have been allocated with some slop space, so we may not
4236 actually need to reallocate them. If we do, the following
4237 if statement will be executed just once in this loop. */
4238 if ((unsigned) max_reg_num () > n_times_set
->num_elements
)
4240 /* Grow all the remaining arrays. */
4241 VARRAY_GROW (set_in_loop
, nregs
);
4242 VARRAY_GROW (n_times_set
, nregs
);
4243 VARRAY_GROW (may_not_optimize
, nregs
);
4244 VARRAY_GROW (reg_single_usage
, nregs
);
4247 if (! validate_change (next
->insn
, next
->location
, add_val
, 0))
4253 /* Here we can try to eliminate the increment by combining
4254 it into the uses. */
4256 /* Set last_use_insn so that we can check against it. */
4258 for (last_use_insn
= v
->insn
, p
= NEXT_INSN (v
->insn
);
4260 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
4262 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
4264 if (reg_mentioned_p (old_reg
, PATTERN (p
)))
4270 /* If we can't get the LUIDs for the insns, we can't
4271 calculate the lifetime. This is likely from unrolling
4272 of an inner loop, so there is little point in making this
4273 a DEST_REG giv anyways. */
4274 if (INSN_UID (v
->insn
) >= max_uid_for_loop
4275 || INSN_UID (last_use_insn
) >= max_uid_for_loop
4276 || ! validate_change (v
->insn
, &SET_DEST (set
), dest_reg
, 0))
4278 /* Change the increment at NEXT back to what it was. */
4279 if (! validate_change (next
->insn
, next
->location
,
4285 next
->add_val
= add_val
;
4286 v
->dest_reg
= dest_reg
;
4287 v
->giv_type
= DEST_REG
;
4288 v
->location
= &SET_SRC (set
);
4290 v
->combined_with
= 0;
4292 v
->derive_adjustment
= 0;
4298 v
->auto_inc_opt
= 0;
4301 v
->derived_from
= 0;
4302 v
->always_computable
= 1;
4303 v
->always_executed
= 1;
4305 v
->no_const_addval
= 0;
4307 old_regno
= REGNO (old_reg
);
4308 new_regno
= REGNO (dest_reg
);
4309 VARRAY_INT (set_in_loop
, old_regno
)--;
4310 VARRAY_INT (set_in_loop
, new_regno
) = 1;
4311 VARRAY_INT (n_times_set
, old_regno
)--;
4312 VARRAY_INT (n_times_set
, new_regno
) = 1;
4313 VARRAY_CHAR (may_not_optimize
, new_regno
) = 0;
4315 REG_IV_TYPE (new_regno
) = GENERAL_INDUCT
;
4316 REG_IV_INFO (new_regno
) = v
;
4318 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4319 it must be replaced. */
4320 note
= find_reg_note (next
->insn
, REG_EQUAL
, NULL_RTX
);
4321 if (note
&& reg_mentioned_p (old_reg
, XEXP (note
, 0)))
4322 XEXP (note
, 0) = copy_rtx (SET_SRC (single_set (next
->insn
)));
4324 /* Remove the increment from the list of biv increments,
4325 and record it as a giv. */
4328 v
->next_iv
= bl
->giv
;
4331 v
->benefit
= rtx_cost (SET_SRC (set
), SET
);
4332 bl
->total_benefit
+= v
->benefit
;
4334 /* Now replace the biv with DEST_REG in all insns between
4335 the replaced increment and the next increment, and
4336 remember the last insn that needed a replacement. */
4337 for (last_use_insn
= v
->insn
, p
= NEXT_INSN (v
->insn
);
4339 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
4343 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
4345 if (reg_mentioned_p (old_reg
, PATTERN (p
)))
4348 if (! validate_replace_rtx (old_reg
, dest_reg
, p
))
4351 for (note
= REG_NOTES (p
); note
; note
= XEXP (note
, 1))
4353 if (GET_CODE (note
) == EXPR_LIST
)
4355 = replace_rtx (XEXP (note
, 0), old_reg
, dest_reg
);
4359 v
->last_use
= last_use_insn
;
4360 v
->lifetime
= INSN_LUID (v
->insn
) - INSN_LUID (last_use_insn
);
4361 /* If the lifetime is zero, it means that this register is really
4362 a dead store. So mark this as a giv that can be ignored.
4363 This will not prevent the biv from being eliminated. */
4364 if (v
->lifetime
== 0)
4367 if (loop_dump_stream
)
4368 fprintf (loop_dump_stream
,
4369 "Increment %d of biv %d converted to giv %d.\n\n",
4370 INSN_UID (v
->insn
), old_regno
, new_regno
);
4374 last_increment_giv
= max_reg_num () - 1;
4376 /* Search the loop for general induction variables. */
4378 /* A register is a giv if: it is only set once, it is a function of a
4379 biv and a constant (or invariant), and it is not a biv. */
4381 not_every_iteration
= 0;
4388 /* At end of a straight-in loop, we are done.
4389 At end of a loop entered at the bottom, scan the top. */
4390 if (p
== scan_start
)
4398 if (p
== scan_start
)
4402 /* Look for a general induction variable in a register. */
4403 if (GET_CODE (p
) == INSN
4404 && (set
= single_set (p
))
4405 && GET_CODE (SET_DEST (set
)) == REG
4406 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
4413 rtx last_consec_insn
;
4415 dest_reg
= SET_DEST (set
);
4416 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
4419 if (/* SET_SRC is a giv. */
4420 (general_induction_var (SET_SRC (set
), &src_reg
, &add_val
,
4421 &mult_val
, 0, &benefit
)
4422 /* Equivalent expression is a giv. */
4423 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
4424 && general_induction_var (XEXP (regnote
, 0), &src_reg
,
4425 &add_val
, &mult_val
, 0,
4427 /* Don't try to handle any regs made by loop optimization.
4428 We have nothing on them in regno_first_uid, etc. */
4429 && REGNO (dest_reg
) < max_reg_before_loop
4430 /* Don't recognize a BASIC_INDUCT_VAR here. */
4431 && dest_reg
!= src_reg
4432 /* This must be the only place where the register is set. */
4433 && (VARRAY_INT (n_times_set
, REGNO (dest_reg
)) == 1
4434 /* or all sets must be consecutive and make a giv. */
4435 || (benefit
= consec_sets_giv (benefit
, p
,
4437 &add_val
, &mult_val
,
4438 &last_consec_insn
))))
4441 = (struct induction
*) alloca (sizeof (struct induction
));
4443 /* If this is a library call, increase benefit. */
4444 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
4445 benefit
+= libcall_benefit (p
);
4447 /* Skip the consecutive insns, if there are any. */
4448 if (VARRAY_INT (n_times_set
, REGNO (dest_reg
)) != 1)
4449 p
= last_consec_insn
;
4451 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4452 DEST_REG
, not_every_iteration
, maybe_multiple
,
4453 NULL_PTR
, loop_start
, loop_end
);
4458 #ifndef DONT_REDUCE_ADDR
4459 /* Look for givs which are memory addresses. */
4460 /* This resulted in worse code on a VAX 8600. I wonder if it
4462 if (GET_CODE (p
) == INSN
)
4463 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, maybe_multiple
,
4464 loop_start
, loop_end
);
4467 /* Update the status of whether giv can derive other givs. This can
4468 change when we pass a label or an insn that updates a biv. */
4469 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4470 || GET_CODE (p
) == CODE_LABEL
)
4471 update_giv_derive (p
);
4473 /* Past CODE_LABEL, we get to insns that may be executed multiple
4474 times. The only way we can be sure that they can't is if every
4475 every jump insn between here and the end of the loop either
4476 returns, exits the loop, is a forward jump, or is a jump
4477 to the loop start. */
4479 if (GET_CODE (p
) == CODE_LABEL
)
4487 insn
= NEXT_INSN (insn
);
4488 if (insn
== scan_start
)
4496 if (insn
== scan_start
)
4500 if (GET_CODE (insn
) == JUMP_INSN
4501 && GET_CODE (PATTERN (insn
)) != RETURN
4502 && (! condjump_p (insn
)
4503 || (JUMP_LABEL (insn
) != 0
4504 && JUMP_LABEL (insn
) != scan_start
4505 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
4506 || INSN_UID (insn
) >= max_uid_for_loop
4507 || (INSN_LUID (JUMP_LABEL (insn
))
4508 < INSN_LUID (insn
))))))
4516 /* Past a jump, we get to insns for which we can't count
4517 on whether they will be executed during each iteration. */
4518 /* This code appears twice in strength_reduce. There is also similar
4519 code in scan_loop. */
4520 if (GET_CODE (p
) == JUMP_INSN
4521 /* If we enter the loop in the middle, and scan around to the
4522 beginning, don't set not_every_iteration for that.
4523 This can be any kind of jump, since we want to know if insns
4524 will be executed if the loop is executed. */
4525 && ! (JUMP_LABEL (p
) == loop_top
4526 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
4527 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
4531 /* If this is a jump outside the loop, then it also doesn't
4532 matter. Check to see if the target of this branch is on the
4533 loop_number_exits_labels list. */
4535 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
4537 label
= LABEL_NEXTREF (label
))
4538 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4542 not_every_iteration
= 1;
4545 else if (GET_CODE (p
) == NOTE
)
4547 /* At the virtual top of a converted loop, insns are again known to
4548 be executed each iteration: logically, the loop begins here
4549 even though the exit code has been duplicated.
4551 Insns are also again known to be executed each iteration at
4552 the LOOP_CONT note. */
4553 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
4554 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
4556 not_every_iteration
= 0;
4557 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4559 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4563 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4564 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4565 or not an insn is known to be executed each iteration of the
4566 loop, whether or not any iterations are known to occur.
4568 Therefore, if we have just passed a label and have no more labels
4569 between here and the test insn of the loop, we know these insns
4570 will be executed each iteration. */
4572 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
4573 && no_labels_between_p (p
, loop_end
)
4574 && loop_insn_first_p (p
, loop_cont
))
4575 not_every_iteration
= 0;
4578 /* Try to calculate and save the number of loop iterations. This is
4579 set to zero if the actual number can not be calculated. This must
4580 be called after all giv's have been identified, since otherwise it may
4581 fail if the iteration variable is a giv. */
4583 loop_iterations (loop_start
, loop_end
, loop_info
);
4585 /* Now for each giv for which we still don't know whether or not it is
4586 replaceable, check to see if it is replaceable because its final value
4587 can be calculated. This must be done after loop_iterations is called,
4588 so that final_giv_value will work correctly. */
4590 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4592 struct induction
*v
;
4594 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4595 if (! v
->replaceable
&& ! v
->not_replaceable
)
4596 check_final_value (v
, loop_start
, loop_end
, loop_info
->n_iterations
);
4599 /* Try to prove that the loop counter variable (if any) is always
4600 nonnegative; if so, record that fact with a REG_NONNEG note
4601 so that "decrement and branch until zero" insn can be used. */
4602 check_dbra_loop (loop_end
, insn_count
, loop_start
, loop_info
);
4604 /* Create reg_map to hold substitutions for replaceable giv regs.
4605 Some givs might have been made from biv increments, so look at
4606 reg_iv_type for a suitable size. */
4607 reg_map_size
= reg_iv_type
->num_elements
;
4608 reg_map
= (rtx
*) alloca (reg_map_size
* sizeof (rtx
));
4609 bzero ((char *) reg_map
, reg_map_size
* sizeof (rtx
));
4611 /* Examine each iv class for feasibility of strength reduction/induction
4612 variable elimination. */
4614 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4616 struct induction
*v
;
4619 rtx final_value
= 0;
4622 /* Test whether it will be possible to eliminate this biv
4623 provided all givs are reduced. This is possible if either
4624 the reg is not used outside the loop, or we can compute
4625 what its final value will be.
4627 For architectures with a decrement_and_branch_until_zero insn,
4628 don't do this if we put a REG_NONNEG note on the endtest for
4631 /* Compare against bl->init_insn rather than loop_start.
4632 We aren't concerned with any uses of the biv between
4633 init_insn and loop_start since these won't be affected
4634 by the value of the biv elsewhere in the function, so
4635 long as init_insn doesn't use the biv itself.
4636 March 14, 1989 -- self@bayes.arc.nasa.gov */
4638 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4640 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4641 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
4642 #ifdef HAVE_decrement_and_branch_until_zero
4645 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4646 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
,
4647 loop_info
->n_iterations
))
4648 #ifdef HAVE_decrement_and_branch_until_zero
4652 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
4653 threshold
, insn_count
);
4656 if (loop_dump_stream
)
4658 fprintf (loop_dump_stream
,
4659 "Cannot eliminate biv %d.\n",
4661 fprintf (loop_dump_stream
,
4662 "First use: insn %d, last use: insn %d.\n",
4663 REGNO_FIRST_UID (bl
->regno
),
4664 REGNO_LAST_UID (bl
->regno
));
4668 /* Combine all giv's for this iv_class. */
4671 /* This will be true at the end, if all givs which depend on this
4672 biv have been strength reduced.
4673 We can't (currently) eliminate the biv unless this is so. */
4676 /* Check each giv in this class to see if we will benefit by reducing
4677 it. Skip giv's combined with others. */
4678 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4680 struct induction
*tv
;
4682 if (v
->ignore
|| v
->same
)
4685 benefit
= v
->benefit
;
4687 /* Reduce benefit if not replaceable, since we will insert
4688 a move-insn to replace the insn that calculates this giv.
4689 Don't do this unless the giv is a user variable, since it
4690 will often be marked non-replaceable because of the duplication
4691 of the exit code outside the loop. In such a case, the copies
4692 we insert are dead and will be deleted. So they don't have
4693 a cost. Similar situations exist. */
4694 /* ??? The new final_[bg]iv_value code does a much better job
4695 of finding replaceable giv's, and hence this code may no longer
4697 if (! v
->replaceable
&& ! bl
->eliminable
4698 && REG_USERVAR_P (v
->dest_reg
))
4699 benefit
-= copy_cost
;
4701 /* Decrease the benefit to count the add-insns that we will
4702 insert to increment the reduced reg for the giv. */
4703 benefit
-= add_cost
* bl
->biv_count
;
4705 /* Decide whether to strength-reduce this giv or to leave the code
4706 unchanged (recompute it from the biv each time it is used).
4707 This decision can be made independently for each giv. */
4710 /* Attempt to guess whether autoincrement will handle some of the
4711 new add insns; if so, increase BENEFIT (undo the subtraction of
4712 add_cost that was done above). */
4713 if (v
->giv_type
== DEST_ADDR
4714 && GET_CODE (v
->mult_val
) == CONST_INT
)
4716 if (HAVE_POST_INCREMENT
4717 && INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4718 benefit
+= add_cost
* bl
->biv_count
;
4719 else if (HAVE_PRE_INCREMENT
4720 && INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4721 benefit
+= add_cost
* bl
->biv_count
;
4722 else if (HAVE_POST_DECREMENT
4723 && -INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4724 benefit
+= add_cost
* bl
->biv_count
;
4725 else if (HAVE_PRE_DECREMENT
4726 && -INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4727 benefit
+= add_cost
* bl
->biv_count
;
4731 /* If an insn is not to be strength reduced, then set its ignore
4732 flag, and clear all_reduced. */
4734 /* A giv that depends on a reversed biv must be reduced if it is
4735 used after the loop exit, otherwise, it would have the wrong
4736 value after the loop exit. To make it simple, just reduce all
4737 of such giv's whether or not we know they are used after the loop
4740 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4743 if (loop_dump_stream
)
4744 fprintf (loop_dump_stream
,
4745 "giv of insn %d not worth while, %d vs %d.\n",
4747 v
->lifetime
* threshold
* benefit
, insn_count
);
4753 /* Check that we can increment the reduced giv without a
4754 multiply insn. If not, reject it. */
4756 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4757 if (tv
->mult_val
== const1_rtx
4758 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4760 if (loop_dump_stream
)
4761 fprintf (loop_dump_stream
,
4762 "giv of insn %d: would need a multiply.\n",
4763 INSN_UID (v
->insn
));
4771 /* Check for givs whose first use is their definition and whose
4772 last use is the definition of another giv. If so, it is likely
4773 dead and should not be used to derive another giv nor to
4775 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4778 || (v
->same
&& v
->same
->ignore
))
4783 struct induction
*v1
;
4785 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4786 if (v
->last_use
== v1
->insn
)
4789 else if (v
->giv_type
== DEST_REG
4790 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4792 struct induction
*v1
;
4794 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4795 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4800 /* Now that we know which givs will be reduced, try to rearrange the
4801 combinations to reduce register pressure.
4802 recombine_givs calls find_life_end, which needs reg_iv_type and
4803 reg_iv_info to be valid for all pseudos. We do the necessary
4804 reallocation here since it allows to check if there are still
4805 more bivs to process. */
4806 nregs
= max_reg_num ();
4807 if (nregs
> reg_iv_type
->num_elements
)
4809 /* If there are still more bivs to process, allocate some slack
4810 space so that we're not constantly reallocating these arrays. */
4813 /* Reallocate reg_iv_type and reg_iv_info. */
4814 VARRAY_GROW (reg_iv_type
, nregs
);
4815 VARRAY_GROW (reg_iv_info
, nregs
);
4817 recombine_givs (bl
, loop_start
, loop_end
, unroll_p
);
4819 /* Reduce each giv that we decided to reduce. */
4821 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4823 struct induction
*tv
;
4824 if (! v
->ignore
&& v
->same
== 0)
4826 int auto_inc_opt
= 0;
4828 /* If the code for derived givs immediately below has already
4829 allocated a new_reg, we must keep it. */
4831 v
->new_reg
= gen_reg_rtx (v
->mode
);
4833 if (v
->derived_from
)
4835 struct induction
*d
= v
->derived_from
;
4837 /* In case d->dest_reg is not replaceable, we have
4838 to replace it in v->insn now. */
4840 d
->new_reg
= gen_reg_rtx (d
->mode
);
4842 = replace_rtx (PATTERN (v
->insn
), d
->dest_reg
, d
->new_reg
);
4844 = replace_rtx (PATTERN (v
->insn
), v
->dest_reg
, v
->new_reg
);
4845 /* For each place where the biv is incremented, add an
4846 insn to set the new, reduced reg for the giv.
4847 We used to do this only for biv_count != 1, but
4848 this fails when there is a giv after a single biv
4849 increment, e.g. when the last giv was expressed as
4851 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4853 /* We always emit reduced giv increments before the
4854 biv increment when bl->biv_count != 1. So by
4855 emitting the add insns for derived givs after the
4856 biv increment, they pick up the updated value of
4858 If the reduced giv is processed with
4859 auto_inc_opt == 1, then it is incremented earlier
4860 than the biv, hence we'll still pick up the right
4862 If it's processed with auto_inc_opt == -1,
4863 that implies that the biv increment is before the
4864 first reduced giv's use. The derived giv's lifetime
4865 is after the reduced giv's lifetime, hence in this
4866 case, the biv increment doesn't matter. */
4867 emit_insn_after (copy_rtx (PATTERN (v
->insn
)), tv
->insn
);
4873 /* If the target has auto-increment addressing modes, and
4874 this is an address giv, then try to put the increment
4875 immediately after its use, so that flow can create an
4876 auto-increment addressing mode. */
4877 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4878 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4879 /* We don't handle reversed biv's because bl->biv->insn
4880 does not have a valid INSN_LUID. */
4882 && v
->always_executed
&& ! v
->maybe_multiple
4883 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4885 /* If other giv's have been combined with this one, then
4886 this will work only if all uses of the other giv's occur
4887 before this giv's insn. This is difficult to check.
4889 We simplify this by looking for the common case where
4890 there is one DEST_REG giv, and this giv's insn is the
4891 last use of the dest_reg of that DEST_REG giv. If the
4892 increment occurs after the address giv, then we can
4893 perform the optimization. (Otherwise, the increment
4894 would have to go before other_giv, and we would not be
4895 able to combine it with the address giv to get an
4896 auto-inc address.) */
4897 if (v
->combined_with
)
4899 struct induction
*other_giv
= 0;
4901 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4909 if (! tv
&& other_giv
4910 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4911 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4912 == INSN_UID (v
->insn
))
4913 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4916 /* Check for case where increment is before the address
4917 giv. Do this test in "loop order". */
4918 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4919 && (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4920 || (INSN_LUID (bl
->biv
->insn
)
4921 > INSN_LUID (scan_start
))))
4922 || (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4923 && (INSN_LUID (scan_start
)
4924 < INSN_LUID (bl
->biv
->insn
))))
4933 /* We can't put an insn immediately after one setting
4934 cc0, or immediately before one using cc0. */
4935 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4936 || (auto_inc_opt
== -1
4937 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4938 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4939 && sets_cc0_p (PATTERN (prev
))))
4945 v
->auto_inc_opt
= 1;
4949 /* For each place where the biv is incremented, add an insn
4950 to increment the new, reduced reg for the giv. */
4951 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4956 insert_before
= tv
->insn
;
4957 else if (auto_inc_opt
== 1)
4958 insert_before
= NEXT_INSN (v
->insn
);
4960 insert_before
= v
->insn
;
4962 if (tv
->mult_val
== const1_rtx
)
4963 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4964 v
->new_reg
, v
->new_reg
, insert_before
);
4965 else /* tv->mult_val == const0_rtx */
4966 /* A multiply is acceptable here
4967 since this is presumed to be seldom executed. */
4968 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4969 v
->add_val
, v
->new_reg
, insert_before
);
4972 /* Add code at loop start to initialize giv's reduced reg. */
4974 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4975 v
->add_val
, v
->new_reg
, loop_start
);
4979 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4982 For each giv register that can be reduced now: if replaceable,
4983 substitute reduced reg wherever the old giv occurs;
4984 else add new move insn "giv_reg = reduced_reg". */
4986 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4988 if (v
->same
&& v
->same
->ignore
)
4994 /* Update expression if this was combined, in case other giv was
4997 v
->new_reg
= replace_rtx (v
->new_reg
,
4998 v
->same
->dest_reg
, v
->same
->new_reg
);
5000 if (v
->giv_type
== DEST_ADDR
)
5001 /* Store reduced reg as the address in the memref where we found
5003 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
5004 else if (v
->replaceable
)
5006 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
5009 /* I can no longer duplicate the original problem. Perhaps
5010 this is unnecessary now? */
5012 /* Replaceable; it isn't strictly necessary to delete the old
5013 insn and emit a new one, because v->dest_reg is now dead.
5015 However, especially when unrolling loops, the special
5016 handling for (set REG0 REG1) in the second cse pass may
5017 make v->dest_reg live again. To avoid this problem, emit
5018 an insn to set the original giv reg from the reduced giv.
5019 We can not delete the original insn, since it may be part
5020 of a LIBCALL, and the code in flow that eliminates dead
5021 libcalls will fail if it is deleted. */
5022 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
5028 /* Not replaceable; emit an insn to set the original giv reg from
5029 the reduced giv, same as above. */
5030 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
5034 /* When a loop is reversed, givs which depend on the reversed
5035 biv, and which are live outside the loop, must be set to their
5036 correct final value. This insn is only needed if the giv is
5037 not replaceable. The correct final value is the same as the
5038 value that the giv starts the reversed loop with. */
5039 if (bl
->reversed
&& ! v
->replaceable
)
5040 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
5041 v
->add_val
, v
->dest_reg
, end_insert_before
);
5042 else if (v
->final_value
)
5046 /* If the loop has multiple exits, emit the insn before the
5047 loop to ensure that it will always be executed no matter
5048 how the loop exits. Otherwise, emit the insn after the loop,
5049 since this is slightly more efficient. */
5050 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
5051 insert_before
= loop_start
;
5053 insert_before
= end_insert_before
;
5054 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
5058 /* If the insn to set the final value of the giv was emitted
5059 before the loop, then we must delete the insn inside the loop
5060 that sets it. If this is a LIBCALL, then we must delete
5061 every insn in the libcall. Note, however, that
5062 final_giv_value will only succeed when there are multiple
5063 exits if the giv is dead at each exit, hence it does not
5064 matter that the original insn remains because it is dead
5066 /* Delete the insn inside the loop that sets the giv since
5067 the giv is now set before (or after) the loop. */
5068 delete_insn (v
->insn
);
5072 if (loop_dump_stream
)
5074 fprintf (loop_dump_stream
, "giv at %d reduced to ",
5075 INSN_UID (v
->insn
));
5076 print_rtl (loop_dump_stream
, v
->new_reg
);
5077 fprintf (loop_dump_stream
, "\n");
5081 /* All the givs based on the biv bl have been reduced if they
5084 /* For each giv not marked as maybe dead that has been combined with a
5085 second giv, clear any "maybe dead" mark on that second giv.
5086 v->new_reg will either be or refer to the register of the giv it
5089 Doing this clearing avoids problems in biv elimination where a
5090 giv's new_reg is a complex value that can't be put in the insn but
5091 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5092 Since the register will be used in either case, we'd prefer it be
5093 used from the simpler giv. */
5095 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5096 if (! v
->maybe_dead
&& v
->same
)
5097 v
->same
->maybe_dead
= 0;
5099 /* Try to eliminate the biv, if it is a candidate.
5100 This won't work if ! all_reduced,
5101 since the givs we planned to use might not have been reduced.
5103 We have to be careful that we didn't initially think we could eliminate
5104 this biv because of a giv that we now think may be dead and shouldn't
5105 be used as a biv replacement.
5107 Also, there is the possibility that we may have a giv that looks
5108 like it can be used to eliminate a biv, but the resulting insn
5109 isn't valid. This can happen, for example, on the 88k, where a
5110 JUMP_INSN can compare a register only with zero. Attempts to
5111 replace it with a compare with a constant will fail.
5113 Note that in cases where this call fails, we may have replaced some
5114 of the occurrences of the biv with a giv, but no harm was done in
5115 doing so in the rare cases where it can occur. */
5117 if (all_reduced
== 1 && bl
->eliminable
5118 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
5119 threshold
, insn_count
))
5122 /* ?? If we created a new test to bypass the loop entirely,
5123 or otherwise drop straight in, based on this test, then
5124 we might want to rewrite it also. This way some later
5125 pass has more hope of removing the initialization of this
5128 /* If final_value != 0, then the biv may be used after loop end
5129 and we must emit an insn to set it just in case.
5131 Reversed bivs already have an insn after the loop setting their
5132 value, so we don't need another one. We can't calculate the
5133 proper final value for such a biv here anyways. */
5134 if (final_value
!= 0 && ! bl
->reversed
)
5138 /* If the loop has multiple exits, emit the insn before the
5139 loop to ensure that it will always be executed no matter
5140 how the loop exits. Otherwise, emit the insn after the
5141 loop, since this is slightly more efficient. */
5142 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
5143 insert_before
= loop_start
;
5145 insert_before
= end_insert_before
;
5147 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
5152 /* Delete all of the instructions inside the loop which set
5153 the biv, as they are all dead. If is safe to delete them,
5154 because an insn setting a biv will never be part of a libcall. */
5155 /* However, deleting them will invalidate the regno_last_uid info,
5156 so keeping them around is more convenient. Final_biv_value
5157 will only succeed when there are multiple exits if the biv
5158 is dead at each exit, hence it does not matter that the original
5159 insn remains, because it is dead anyways. */
5160 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
5161 delete_insn (v
->insn
);
5164 if (loop_dump_stream
)
5165 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
5170 /* Go through all the instructions in the loop, making all the
5171 register substitutions scheduled in REG_MAP. */
5173 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
5174 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5175 || GET_CODE (p
) == CALL_INSN
)
5177 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
5178 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
5182 if (loop_info
->n_iterations
> 0)
5184 /* When we completely unroll a loop we will likely not need the increment
5185 of the loop BIV and we will not need the conditional branch at the
5187 unrolled_insn_copies
= insn_count
- 2;
5190 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5191 need the comparison before the conditional branch at the end of the
5193 unrolled_insn_copies
-= 1;
5196 /* We'll need one copy for each loop iteration. */
5197 unrolled_insn_copies
*= loop_info
->n_iterations
;
5199 /* A little slop to account for the ability to remove initialization
5200 code, better CSE, and other secondary benefits of completely
5201 unrolling some loops. */
5202 unrolled_insn_copies
-= 1;
5204 /* Clamp the value. */
5205 if (unrolled_insn_copies
< 0)
5206 unrolled_insn_copies
= 0;
5209 /* Unroll loops from within strength reduction so that we can use the
5210 induction variable information that strength_reduce has already
5211 collected. Always unroll loops that would be as small or smaller
5212 unrolled than when rolled. */
5214 || (loop_info
->n_iterations
> 0
5215 && unrolled_insn_copies
<= insn_count
))
5216 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
,
5219 #ifdef HAVE_decrement_and_branch_on_count
5220 /* Instrument the loop with BCT insn. */
5221 if (HAVE_decrement_and_branch_on_count
&& bct_p
5222 && flag_branch_on_count_reg
)
5223 insert_bct (loop_start
, loop_end
, loop_info
);
5224 #endif /* HAVE_decrement_and_branch_on_count */
5226 if (loop_dump_stream
)
5227 fprintf (loop_dump_stream
, "\n");
5228 VARRAY_FREE (reg_iv_type
);
5229 VARRAY_FREE (reg_iv_info
);
5232 /* Return 1 if X is a valid source for an initial value (or as value being
5233 compared against in an initial test).
5235 X must be either a register or constant and must not be clobbered between
5236 the current insn and the start of the loop.
5238 INSN is the insn containing X. */
5241 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
5250 /* Only consider pseudos we know about initialized in insns whose luids
5252 if (GET_CODE (x
) != REG
5253 || REGNO (x
) >= max_reg_before_loop
)
5256 /* Don't use call-clobbered registers across a call which clobbers it. On
5257 some machines, don't use any hard registers at all. */
5258 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
5259 && (SMALL_REGISTER_CLASSES
5260 || (call_used_regs
[REGNO (x
)] && call_seen
)))
5263 /* Don't use registers that have been clobbered before the start of the
5265 if (reg_set_between_p (x
, insn
, loop_start
))
5271 /* Scan X for memory refs and check each memory address
5272 as a possible giv. INSN is the insn whose pattern X comes from.
5273 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5274 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5275 more thanonce in each loop iteration. */
5278 find_mem_givs (x
, insn
, not_every_iteration
, maybe_multiple
, loop_start
,
5282 int not_every_iteration
, maybe_multiple
;
5283 rtx loop_start
, loop_end
;
5286 register enum rtx_code code
;
5287 register const char *fmt
;
5292 code
= GET_CODE (x
);
5316 /* This code used to disable creating GIVs with mult_val == 1 and
5317 add_val == 0. However, this leads to lost optimizations when
5318 it comes time to combine a set of related DEST_ADDR GIVs, since
5319 this one would not be seen. */
5321 if (general_induction_var (XEXP (x
, 0), &src_reg
, &add_val
,
5322 &mult_val
, 1, &benefit
))
5324 /* Found one; record it. */
5326 = (struct induction
*) oballoc (sizeof (struct induction
));
5328 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
5329 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
5330 maybe_multiple
, &XEXP (x
, 0), loop_start
, loop_end
);
5332 v
->mem_mode
= GET_MODE (x
);
5341 /* Recursively scan the subexpressions for other mem refs. */
5343 fmt
= GET_RTX_FORMAT (code
);
5344 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5346 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, maybe_multiple
,
5347 loop_start
, loop_end
);
5348 else if (fmt
[i
] == 'E')
5349 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
5350 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
5351 maybe_multiple
, loop_start
, loop_end
);
5354 /* Fill in the data about one biv update.
5355 V is the `struct induction' in which we record the biv. (It is
5356 allocated by the caller, with alloca.)
5357 INSN is the insn that sets it.
5358 DEST_REG is the biv's reg.
5360 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5361 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5362 being set to INC_VAL.
5364 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5365 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5366 can be executed more than once per iteration. If MAYBE_MULTIPLE
5367 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5368 executed exactly once per iteration. */
5371 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
, location
,
5372 not_every_iteration
, maybe_multiple
)
5373 struct induction
*v
;
5379 int not_every_iteration
;
5382 struct iv_class
*bl
;
5385 v
->src_reg
= dest_reg
;
5386 v
->dest_reg
= dest_reg
;
5387 v
->mult_val
= mult_val
;
5388 v
->add_val
= inc_val
;
5389 v
->location
= location
;
5390 v
->mode
= GET_MODE (dest_reg
);
5391 v
->always_computable
= ! not_every_iteration
;
5392 v
->always_executed
= ! not_every_iteration
;
5393 v
->maybe_multiple
= maybe_multiple
;
5395 /* Add this to the reg's iv_class, creating a class
5396 if this is the first incrementation of the reg. */
5398 bl
= reg_biv_class
[REGNO (dest_reg
)];
5401 /* Create and initialize new iv_class. */
5403 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
5405 bl
->regno
= REGNO (dest_reg
);
5411 /* Set initial value to the reg itself. */
5412 bl
->initial_value
= dest_reg
;
5413 /* We haven't seen the initializing insn yet */
5416 bl
->initial_test
= 0;
5417 bl
->incremented
= 0;
5421 bl
->total_benefit
= 0;
5423 /* Add this class to loop_iv_list. */
5424 bl
->next
= loop_iv_list
;
5427 /* Put it in the array of biv register classes. */
5428 reg_biv_class
[REGNO (dest_reg
)] = bl
;
5431 /* Update IV_CLASS entry for this biv. */
5432 v
->next_iv
= bl
->biv
;
5435 if (mult_val
== const1_rtx
)
5436 bl
->incremented
= 1;
5438 if (loop_dump_stream
)
5440 fprintf (loop_dump_stream
,
5441 "Insn %d: possible biv, reg %d,",
5442 INSN_UID (insn
), REGNO (dest_reg
));
5443 if (GET_CODE (inc_val
) == CONST_INT
)
5445 fprintf (loop_dump_stream
, " const =");
5446 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
5447 fputc ('\n', loop_dump_stream
);
5451 fprintf (loop_dump_stream
, " const = ");
5452 print_rtl (loop_dump_stream
, inc_val
);
5453 fprintf (loop_dump_stream
, "\n");
5458 /* Fill in the data about one giv.
5459 V is the `struct induction' in which we record the giv. (It is
5460 allocated by the caller, with alloca.)
5461 INSN is the insn that sets it.
5462 BENEFIT estimates the savings from deleting this insn.
5463 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5464 into a register or is used as a memory address.
5466 SRC_REG is the biv reg which the giv is computed from.
5467 DEST_REG is the giv's reg (if the giv is stored in a reg).
5468 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5469 LOCATION points to the place where this giv's value appears in INSN. */
5472 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
5473 type
, not_every_iteration
, maybe_multiple
, location
, loop_start
,
5475 struct induction
*v
;
5479 rtx mult_val
, add_val
;
5482 int not_every_iteration
, maybe_multiple
;
5484 rtx loop_start
, loop_end
;
5486 struct induction
*b
;
5487 struct iv_class
*bl
;
5488 rtx set
= single_set (insn
);
5491 v
->src_reg
= src_reg
;
5493 v
->dest_reg
= dest_reg
;
5494 v
->mult_val
= mult_val
;
5495 v
->add_val
= add_val
;
5496 v
->benefit
= benefit
;
5497 v
->location
= location
;
5499 v
->combined_with
= 0;
5500 v
->maybe_multiple
= maybe_multiple
;
5502 v
->derive_adjustment
= 0;
5508 v
->auto_inc_opt
= 0;
5511 v
->derived_from
= 0;
5514 /* The v->always_computable field is used in update_giv_derive, to
5515 determine whether a giv can be used to derive another giv. For a
5516 DEST_REG giv, INSN computes a new value for the giv, so its value
5517 isn't computable if INSN insn't executed every iteration.
5518 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5519 it does not compute a new value. Hence the value is always computable
5520 regardless of whether INSN is executed each iteration. */
5522 if (type
== DEST_ADDR
)
5523 v
->always_computable
= 1;
5525 v
->always_computable
= ! not_every_iteration
;
5527 v
->always_executed
= ! not_every_iteration
;
5529 if (type
== DEST_ADDR
)
5531 v
->mode
= GET_MODE (*location
);
5534 else /* type == DEST_REG */
5536 v
->mode
= GET_MODE (SET_DEST (set
));
5538 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
5539 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
5541 /* If the lifetime is zero, it means that this register is
5542 really a dead store. So mark this as a giv that can be
5543 ignored. This will not prevent the biv from being eliminated. */
5544 if (v
->lifetime
== 0)
5547 REG_IV_TYPE (REGNO (dest_reg
)) = GENERAL_INDUCT
;
5548 REG_IV_INFO (REGNO (dest_reg
)) = v
;
5551 /* Add the giv to the class of givs computed from one biv. */
5553 bl
= reg_biv_class
[REGNO (src_reg
)];
5556 v
->next_iv
= bl
->giv
;
5558 /* Don't count DEST_ADDR. This is supposed to count the number of
5559 insns that calculate givs. */
5560 if (type
== DEST_REG
)
5562 bl
->total_benefit
+= benefit
;
5565 /* Fatal error, biv missing for this giv? */
5568 if (type
== DEST_ADDR
)
5572 /* The giv can be replaced outright by the reduced register only if all
5573 of the following conditions are true:
5574 - the insn that sets the giv is always executed on any iteration
5575 on which the giv is used at all
5576 (there are two ways to deduce this:
5577 either the insn is executed on every iteration,
5578 or all uses follow that insn in the same basic block),
5579 - the giv is not used outside the loop
5580 - no assignments to the biv occur during the giv's lifetime. */
5582 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
5583 /* Previous line always fails if INSN was moved by loop opt. */
5584 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
5585 && (! not_every_iteration
5586 || last_use_this_basic_block (dest_reg
, insn
)))
5588 /* Now check that there are no assignments to the biv within the
5589 giv's lifetime. This requires two separate checks. */
5591 /* Check each biv update, and fail if any are between the first
5592 and last use of the giv.
5594 If this loop contains an inner loop that was unrolled, then
5595 the insn modifying the biv may have been emitted by the loop
5596 unrolling code, and hence does not have a valid luid. Just
5597 mark the biv as not replaceable in this case. It is not very
5598 useful as a biv, because it is used in two different loops.
5599 It is very unlikely that we would be able to optimize the giv
5600 using this biv anyways. */
5603 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5605 if (INSN_UID (b
->insn
) >= max_uid_for_loop
5606 || ((uid_luid
[INSN_UID (b
->insn
)]
5607 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
5608 && (uid_luid
[INSN_UID (b
->insn
)]
5609 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
5612 v
->not_replaceable
= 1;
5617 /* If there are any backwards branches that go from after the
5618 biv update to before it, then this giv is not replaceable. */
5620 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5621 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
5624 v
->not_replaceable
= 1;
5630 /* May still be replaceable, we don't have enough info here to
5633 v
->not_replaceable
= 0;
5637 /* Record whether the add_val contains a const_int, for later use by
5642 v
->no_const_addval
= 1;
5643 if (tem
== const0_rtx
)
5645 else if (GET_CODE (tem
) == CONST_INT
)
5646 v
->no_const_addval
= 0;
5647 else if (GET_CODE (tem
) == PLUS
)
5651 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5652 tem
= XEXP (tem
, 0);
5653 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5654 tem
= XEXP (tem
, 1);
5658 if (GET_CODE (XEXP (tem
, 1)) == CONST_INT
)
5659 v
->no_const_addval
= 0;
5663 if (loop_dump_stream
)
5665 if (type
== DEST_REG
)
5666 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
5667 INSN_UID (insn
), REGNO (dest_reg
));
5669 fprintf (loop_dump_stream
, "Insn %d: dest address",
5672 fprintf (loop_dump_stream
, " src reg %d benefit %d",
5673 REGNO (src_reg
), v
->benefit
);
5674 fprintf (loop_dump_stream
, " lifetime %d",
5678 fprintf (loop_dump_stream
, " replaceable");
5680 if (v
->no_const_addval
)
5681 fprintf (loop_dump_stream
, " ncav");
5683 if (GET_CODE (mult_val
) == CONST_INT
)
5685 fprintf (loop_dump_stream
, " mult ");
5686 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
5690 fprintf (loop_dump_stream
, " mult ");
5691 print_rtl (loop_dump_stream
, mult_val
);
5694 if (GET_CODE (add_val
) == CONST_INT
)
5696 fprintf (loop_dump_stream
, " add ");
5697 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
5701 fprintf (loop_dump_stream
, " add ");
5702 print_rtl (loop_dump_stream
, add_val
);
5706 if (loop_dump_stream
)
5707 fprintf (loop_dump_stream
, "\n");
5712 /* All this does is determine whether a giv can be made replaceable because
5713 its final value can be calculated. This code can not be part of record_giv
5714 above, because final_giv_value requires that the number of loop iterations
5715 be known, and that can not be accurately calculated until after all givs
5716 have been identified. */
5719 check_final_value (v
, loop_start
, loop_end
, n_iterations
)
5720 struct induction
*v
;
5721 rtx loop_start
, loop_end
;
5722 unsigned HOST_WIDE_INT n_iterations
;
5724 struct iv_class
*bl
;
5725 rtx final_value
= 0;
5727 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
5729 /* DEST_ADDR givs will never reach here, because they are always marked
5730 replaceable above in record_giv. */
5732 /* The giv can be replaced outright by the reduced register only if all
5733 of the following conditions are true:
5734 - the insn that sets the giv is always executed on any iteration
5735 on which the giv is used at all
5736 (there are two ways to deduce this:
5737 either the insn is executed on every iteration,
5738 or all uses follow that insn in the same basic block),
5739 - its final value can be calculated (this condition is different
5740 than the one above in record_giv)
5741 - no assignments to the biv occur during the giv's lifetime. */
5744 /* This is only called now when replaceable is known to be false. */
5745 /* Clear replaceable, so that it won't confuse final_giv_value. */
5749 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
, n_iterations
))
5750 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5752 int biv_increment_seen
= 0;
5758 /* When trying to determine whether or not a biv increment occurs
5759 during the lifetime of the giv, we can ignore uses of the variable
5760 outside the loop because final_value is true. Hence we can not
5761 use regno_last_uid and regno_first_uid as above in record_giv. */
5763 /* Search the loop to determine whether any assignments to the
5764 biv occur during the giv's lifetime. Start with the insn
5765 that sets the giv, and search around the loop until we come
5766 back to that insn again.
5768 Also fail if there is a jump within the giv's lifetime that jumps
5769 to somewhere outside the lifetime but still within the loop. This
5770 catches spaghetti code where the execution order is not linear, and
5771 hence the above test fails. Here we assume that the giv lifetime
5772 does not extend from one iteration of the loop to the next, so as
5773 to make the test easier. Since the lifetime isn't known yet,
5774 this requires two loops. See also record_giv above. */
5776 last_giv_use
= v
->insn
;
5782 p
= NEXT_INSN (loop_start
);
5786 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5787 || GET_CODE (p
) == CALL_INSN
)
5789 if (biv_increment_seen
)
5791 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5794 v
->not_replaceable
= 1;
5798 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
5799 biv_increment_seen
= 1;
5800 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5805 /* Now that the lifetime of the giv is known, check for branches
5806 from within the lifetime to outside the lifetime if it is still
5816 p
= NEXT_INSN (loop_start
);
5817 if (p
== last_giv_use
)
5820 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5821 && LABEL_NAME (JUMP_LABEL (p
))
5822 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
5823 && loop_insn_first_p (loop_start
, JUMP_LABEL (p
)))
5824 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
5825 && loop_insn_first_p (JUMP_LABEL (p
), loop_end
))))
5828 v
->not_replaceable
= 1;
5830 if (loop_dump_stream
)
5831 fprintf (loop_dump_stream
,
5832 "Found branch outside giv lifetime.\n");
5839 /* If it is replaceable, then save the final value. */
5841 v
->final_value
= final_value
;
5844 if (loop_dump_stream
&& v
->replaceable
)
5845 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5846 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5849 /* Update the status of whether a giv can derive other givs.
5851 We need to do something special if there is or may be an update to the biv
5852 between the time the giv is defined and the time it is used to derive
5855 In addition, a giv that is only conditionally set is not allowed to
5856 derive another giv once a label has been passed.
5858 The cases we look at are when a label or an update to a biv is passed. */
5861 update_giv_derive (p
)
5864 struct iv_class
*bl
;
5865 struct induction
*biv
, *giv
;
5869 /* Search all IV classes, then all bivs, and finally all givs.
5871 There are three cases we are concerned with. First we have the situation
5872 of a giv that is only updated conditionally. In that case, it may not
5873 derive any givs after a label is passed.
5875 The second case is when a biv update occurs, or may occur, after the
5876 definition of a giv. For certain biv updates (see below) that are
5877 known to occur between the giv definition and use, we can adjust the
5878 giv definition. For others, or when the biv update is conditional,
5879 we must prevent the giv from deriving any other givs. There are two
5880 sub-cases within this case.
5882 If this is a label, we are concerned with any biv update that is done
5883 conditionally, since it may be done after the giv is defined followed by
5884 a branch here (actually, we need to pass both a jump and a label, but
5885 this extra tracking doesn't seem worth it).
5887 If this is a jump, we are concerned about any biv update that may be
5888 executed multiple times. We are actually only concerned about
5889 backward jumps, but it is probably not worth performing the test
5890 on the jump again here.
5892 If this is a biv update, we must adjust the giv status to show that a
5893 subsequent biv update was performed. If this adjustment cannot be done,
5894 the giv cannot derive further givs. */
5896 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5897 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5898 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5901 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5903 /* If cant_derive is already true, there is no point in
5904 checking all of these conditions again. */
5905 if (giv
->cant_derive
)
5908 /* If this giv is conditionally set and we have passed a label,
5909 it cannot derive anything. */
5910 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5911 giv
->cant_derive
= 1;
5913 /* Skip givs that have mult_val == 0, since
5914 they are really invariants. Also skip those that are
5915 replaceable, since we know their lifetime doesn't contain
5917 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5920 /* The only way we can allow this giv to derive another
5921 is if this is a biv increment and we can form the product
5922 of biv->add_val and giv->mult_val. In this case, we will
5923 be able to compute a compensation. */
5924 else if (biv
->insn
== p
)
5928 if (biv
->mult_val
== const1_rtx
)
5929 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5934 if (tem
&& giv
->derive_adjustment
)
5935 tem
= simplify_giv_expr
5936 (gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
5940 giv
->derive_adjustment
= tem
;
5942 giv
->cant_derive
= 1;
5944 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5945 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5946 giv
->cant_derive
= 1;
5951 /* Check whether an insn is an increment legitimate for a basic induction var.
5952 X is the source of insn P, or a part of it.
5953 MODE is the mode in which X should be interpreted.
5955 DEST_REG is the putative biv, also the destination of the insn.
5956 We accept patterns of these forms:
5957 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5958 REG = INVARIANT + REG
5960 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5961 store the additive term into *INC_VAL, and store the place where
5962 we found the additive term into *LOCATION.
5964 If X is an assignment of an invariant into DEST_REG, we set
5965 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5967 We also want to detect a BIV when it corresponds to a variable
5968 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5969 of the variable may be a PLUS that adds a SUBREG of that variable to
5970 an invariant and then sign- or zero-extends the result of the PLUS
5973 Most GIVs in such cases will be in the promoted mode, since that is the
5974 probably the natural computation mode (and almost certainly the mode
5975 used for addresses) on the machine. So we view the pseudo-reg containing
5976 the variable as the BIV, as if it were simply incremented.
5978 Note that treating the entire pseudo as a BIV will result in making
5979 simple increments to any GIVs based on it. However, if the variable
5980 overflows in its declared mode but not its promoted mode, the result will
5981 be incorrect. This is acceptable if the variable is signed, since
5982 overflows in such cases are undefined, but not if it is unsigned, since
5983 those overflows are defined. So we only check for SIGN_EXTEND and
5986 If we cannot find a biv, we return 0. */
5989 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
, location
)
5991 enum machine_mode mode
;
5998 register enum rtx_code code
;
6002 code
= GET_CODE (x
);
6003 *location
= NULL_RTX
;
6007 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
6008 || (GET_CODE (XEXP (x
, 0)) == SUBREG
6009 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
6010 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
6012 argp
= &XEXP (x
, 1);
6014 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
6015 || (GET_CODE (XEXP (x
, 1)) == SUBREG
6016 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
6017 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
6019 argp
= &XEXP (x
, 0);
6025 if (invariant_p (arg
) != 1)
6028 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
6029 *mult_val
= const1_rtx
;
6034 /* If this is a SUBREG for a promoted variable, check the inner
6036 if (SUBREG_PROMOTED_VAR_P (x
))
6037 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
6038 dest_reg
, p
, inc_val
, mult_val
, location
);
6042 /* If this register is assigned in a previous insn, look at its
6043 source, but don't go outside the loop or past a label. */
6049 insn
= PREV_INSN (insn
);
6050 } while (insn
&& GET_CODE (insn
) == NOTE
6051 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6055 set
= single_set (insn
);
6059 if ((SET_DEST (set
) == x
6060 || (GET_CODE (SET_DEST (set
)) == SUBREG
6061 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
6063 && SUBREG_REG (SET_DEST (set
)) == x
))
6064 && basic_induction_var (SET_SRC (set
),
6065 (GET_MODE (SET_SRC (set
)) == VOIDmode
6067 : GET_MODE (SET_SRC (set
))),
6069 inc_val
, mult_val
, location
))
6072 /* ... fall through ... */
6074 /* Can accept constant setting of biv only when inside inner most loop.
6075 Otherwise, a biv of an inner loop may be incorrectly recognized
6076 as a biv of the outer loop,
6077 causing code to be moved INTO the inner loop. */
6079 if (invariant_p (x
) != 1)
6084 /* convert_modes aborts if we try to convert to or from CCmode, so just
6085 exclude that case. It is very unlikely that a condition code value
6086 would be a useful iterator anyways. */
6087 if (this_loop_info
.loops_enclosed
== 1
6088 && GET_MODE_CLASS (mode
) != MODE_CC
6089 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
6091 /* Possible bug here? Perhaps we don't know the mode of X. */
6092 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
6093 *mult_val
= const0_rtx
;
6100 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
6101 dest_reg
, p
, inc_val
, mult_val
, location
);
6104 /* Similar, since this can be a sign extension. */
6105 for (insn
= PREV_INSN (p
);
6106 (insn
&& GET_CODE (insn
) == NOTE
6107 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6108 insn
= PREV_INSN (insn
))
6112 set
= single_set (insn
);
6114 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
6115 && GET_CODE (XEXP (x
, 1)) == CONST_INT
6116 && INTVAL (XEXP (x
, 1)) >= 0
6117 && GET_CODE (SET_SRC (set
)) == ASHIFT
6118 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
6119 return basic_induction_var (XEXP (SET_SRC (set
), 0),
6120 GET_MODE (XEXP (x
, 0)),
6121 dest_reg
, insn
, inc_val
, mult_val
,
6130 /* A general induction variable (giv) is any quantity that is a linear
6131 function of a basic induction variable,
6132 i.e. giv = biv * mult_val + add_val.
6133 The coefficients can be any loop invariant quantity.
6134 A giv need not be computed directly from the biv;
6135 it can be computed by way of other givs. */
6137 /* Determine whether X computes a giv.
6138 If it does, return a nonzero value
6139 which is the benefit from eliminating the computation of X;
6140 set *SRC_REG to the register of the biv that it is computed from;
6141 set *ADD_VAL and *MULT_VAL to the coefficients,
6142 such that the value of X is biv * mult + add; */
6145 general_induction_var (x
, src_reg
, add_val
, mult_val
, is_addr
, pbenefit
)
6156 /* If this is an invariant, forget it, it isn't a giv. */
6157 if (invariant_p (x
) == 1)
6160 /* See if the expression could be a giv and get its form.
6161 Mark our place on the obstack in case we don't find a giv. */
6162 storage
= (char *) oballoc (0);
6164 x
= simplify_giv_expr (x
, pbenefit
);
6171 switch (GET_CODE (x
))
6175 /* Since this is now an invariant and wasn't before, it must be a giv
6176 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6178 *src_reg
= loop_iv_list
->biv
->dest_reg
;
6179 *mult_val
= const0_rtx
;
6184 /* This is equivalent to a BIV. */
6186 *mult_val
= const1_rtx
;
6187 *add_val
= const0_rtx
;
6191 /* Either (plus (biv) (invar)) or
6192 (plus (mult (biv) (invar_1)) (invar_2)). */
6193 if (GET_CODE (XEXP (x
, 0)) == MULT
)
6195 *src_reg
= XEXP (XEXP (x
, 0), 0);
6196 *mult_val
= XEXP (XEXP (x
, 0), 1);
6200 *src_reg
= XEXP (x
, 0);
6201 *mult_val
= const1_rtx
;
6203 *add_val
= XEXP (x
, 1);
6207 /* ADD_VAL is zero. */
6208 *src_reg
= XEXP (x
, 0);
6209 *mult_val
= XEXP (x
, 1);
6210 *add_val
= const0_rtx
;
6217 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6218 unless they are CONST_INT). */
6219 if (GET_CODE (*add_val
) == USE
)
6220 *add_val
= XEXP (*add_val
, 0);
6221 if (GET_CODE (*mult_val
) == USE
)
6222 *mult_val
= XEXP (*mult_val
, 0);
6227 *pbenefit
+= ADDRESS_COST (orig_x
) - reg_address_cost
;
6229 *pbenefit
+= rtx_cost (orig_x
, MEM
) - reg_address_cost
;
6233 *pbenefit
+= rtx_cost (orig_x
, SET
);
6235 /* Always return true if this is a giv so it will be detected as such,
6236 even if the benefit is zero or negative. This allows elimination
6237 of bivs that might otherwise not be eliminated. */
6241 /* Given an expression, X, try to form it as a linear function of a biv.
6242 We will canonicalize it to be of the form
6243 (plus (mult (BIV) (invar_1))
6245 with possible degeneracies.
6247 The invariant expressions must each be of a form that can be used as a
6248 machine operand. We surround then with a USE rtx (a hack, but localized
6249 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6250 routine; it is the caller's responsibility to strip them.
6252 If no such canonicalization is possible (i.e., two biv's are used or an
6253 expression that is neither invariant nor a biv or giv), this routine
6256 For a non-zero return, the result will have a code of CONST_INT, USE,
6257 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6259 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6261 static rtx sge_plus
PROTO ((enum machine_mode
, rtx
, rtx
));
6262 static rtx sge_plus_constant
PROTO ((rtx
, rtx
));
6265 simplify_giv_expr (x
, benefit
)
6269 enum machine_mode mode
= GET_MODE (x
);
6273 /* If this is not an integer mode, or if we cannot do arithmetic in this
6274 mode, this can't be a giv. */
6275 if (mode
!= VOIDmode
6276 && (GET_MODE_CLASS (mode
) != MODE_INT
6277 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
6280 switch (GET_CODE (x
))
6283 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
6284 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
6285 if (arg0
== 0 || arg1
== 0)
6288 /* Put constant last, CONST_INT last if both constant. */
6289 if ((GET_CODE (arg0
) == USE
6290 || GET_CODE (arg0
) == CONST_INT
)
6291 && ! ((GET_CODE (arg0
) == USE
6292 && GET_CODE (arg1
) == USE
)
6293 || GET_CODE (arg1
) == CONST_INT
))
6294 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6296 /* Handle addition of zero, then addition of an invariant. */
6297 if (arg1
== const0_rtx
)
6299 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
6300 switch (GET_CODE (arg0
))
6304 /* Adding two invariants must result in an invariant, so enclose
6305 addition operation inside a USE and return it. */
6306 if (GET_CODE (arg0
) == USE
)
6307 arg0
= XEXP (arg0
, 0);
6308 if (GET_CODE (arg1
) == USE
)
6309 arg1
= XEXP (arg1
, 0);
6311 if (GET_CODE (arg0
) == CONST_INT
)
6312 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6313 if (GET_CODE (arg1
) == CONST_INT
)
6314 tem
= sge_plus_constant (arg0
, arg1
);
6316 tem
= sge_plus (mode
, arg0
, arg1
);
6318 if (GET_CODE (tem
) != CONST_INT
)
6319 tem
= gen_rtx_USE (mode
, tem
);
6324 /* biv + invar or mult + invar. Return sum. */
6325 return gen_rtx_PLUS (mode
, arg0
, arg1
);
6328 /* (a + invar_1) + invar_2. Associate. */
6330 simplify_giv_expr (gen_rtx_PLUS (mode
,
6341 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6342 MULT to reduce cases. */
6343 if (GET_CODE (arg0
) == REG
)
6344 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
6345 if (GET_CODE (arg1
) == REG
)
6346 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
6348 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6349 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6350 Recurse to associate the second PLUS. */
6351 if (GET_CODE (arg1
) == MULT
)
6352 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6354 if (GET_CODE (arg1
) == PLUS
)
6356 simplify_giv_expr (gen_rtx_PLUS (mode
,
6357 gen_rtx_PLUS (mode
, arg0
,
6362 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6363 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
6366 if (!rtx_equal_p (arg0
, arg1
))
6369 return simplify_giv_expr (gen_rtx_MULT (mode
,
6377 /* Handle "a - b" as "a + b * (-1)". */
6378 return simplify_giv_expr (gen_rtx_PLUS (mode
,
6386 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
6387 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
6388 if (arg0
== 0 || arg1
== 0)
6391 /* Put constant last, CONST_INT last if both constant. */
6392 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
6393 && GET_CODE (arg1
) != CONST_INT
)
6394 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6396 /* If second argument is not now constant, not giv. */
6397 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
6400 /* Handle multiply by 0 or 1. */
6401 if (arg1
== const0_rtx
)
6404 else if (arg1
== const1_rtx
)
6407 switch (GET_CODE (arg0
))
6410 /* biv * invar. Done. */
6411 return gen_rtx_MULT (mode
, arg0
, arg1
);
6414 /* Product of two constants. */
6415 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
6418 /* invar * invar. It is a giv, but very few of these will
6419 actually pay off, so limit to simple registers. */
6420 if (GET_CODE (arg1
) != CONST_INT
)
6423 arg0
= XEXP (arg0
, 0);
6424 if (GET_CODE (arg0
) == REG
)
6425 tem
= gen_rtx_MULT (mode
, arg0
, arg1
);
6426 else if (GET_CODE (arg0
) == MULT
6427 && GET_CODE (XEXP (arg0
, 0)) == REG
6428 && GET_CODE (XEXP (arg0
, 1)) == CONST_INT
)
6430 tem
= gen_rtx_MULT (mode
, XEXP (arg0
, 0),
6431 GEN_INT (INTVAL (XEXP (arg0
, 1))
6436 return gen_rtx_USE (mode
, tem
);
6439 /* (a * invar_1) * invar_2. Associate. */
6440 return simplify_giv_expr (gen_rtx_MULT (mode
,
6448 /* (a + invar_1) * invar_2. Distribute. */
6449 return simplify_giv_expr (gen_rtx_PLUS (mode
,
6463 /* Shift by constant is multiply by power of two. */
6464 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
6468 simplify_giv_expr (gen_rtx_MULT (mode
,
6470 GEN_INT ((HOST_WIDE_INT
) 1
6471 << INTVAL (XEXP (x
, 1)))),
6475 /* "-a" is "a * (-1)" */
6476 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
6480 /* "~a" is "-a - 1". Silly, but easy. */
6481 return simplify_giv_expr (gen_rtx_MINUS (mode
,
6482 gen_rtx_NEG (mode
, XEXP (x
, 0)),
6487 /* Already in proper form for invariant. */
6491 /* If this is a new register, we can't deal with it. */
6492 if (REGNO (x
) >= max_reg_before_loop
)
6495 /* Check for biv or giv. */
6496 switch (REG_IV_TYPE (REGNO (x
)))
6500 case GENERAL_INDUCT
:
6502 struct induction
*v
= REG_IV_INFO (REGNO (x
));
6504 /* Form expression from giv and add benefit. Ensure this giv
6505 can derive another and subtract any needed adjustment if so. */
6506 *benefit
+= v
->benefit
;
6510 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
6511 v
->src_reg
, v
->mult_val
),
6514 if (v
->derive_adjustment
)
6515 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
6516 return simplify_giv_expr (tem
, benefit
);
6520 /* If it isn't an induction variable, and it is invariant, we
6521 may be able to simplify things further by looking through
6522 the bits we just moved outside the loop. */
6523 if (invariant_p (x
) == 1)
6527 for (m
= the_movables
; m
; m
= m
->next
)
6528 if (rtx_equal_p (x
, m
->set_dest
))
6530 /* Ok, we found a match. Substitute and simplify. */
6532 /* If we match another movable, we must use that, as
6533 this one is going away. */
6535 return simplify_giv_expr (m
->match
->set_dest
, benefit
);
6537 /* If consec is non-zero, this is a member of a group of
6538 instructions that were moved together. We handle this
6539 case only to the point of seeking to the last insn and
6540 looking for a REG_EQUAL. Fail if we don't find one. */
6545 do { tem
= NEXT_INSN (tem
); } while (--i
> 0);
6547 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
6549 tem
= XEXP (tem
, 0);
6553 tem
= single_set (m
->insn
);
6555 tem
= SET_SRC (tem
);
6560 /* What we are most interested in is pointer
6561 arithmetic on invariants -- only take
6562 patterns we may be able to do something with. */
6563 if (GET_CODE (tem
) == PLUS
6564 || GET_CODE (tem
) == MULT
6565 || GET_CODE (tem
) == ASHIFT
6566 || GET_CODE (tem
) == CONST_INT
6567 || GET_CODE (tem
) == SYMBOL_REF
)
6569 tem
= simplify_giv_expr (tem
, benefit
);
6573 else if (GET_CODE (tem
) == CONST
6574 && GET_CODE (XEXP (tem
, 0)) == PLUS
6575 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
6576 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
6578 tem
= simplify_giv_expr (XEXP (tem
, 0), benefit
);
6589 /* Fall through to general case. */
6591 /* If invariant, return as USE (unless CONST_INT).
6592 Otherwise, not giv. */
6593 if (GET_CODE (x
) == USE
)
6596 if (invariant_p (x
) == 1)
6598 if (GET_CODE (x
) == CONST_INT
)
6600 if (GET_CODE (x
) == CONST
6601 && GET_CODE (XEXP (x
, 0)) == PLUS
6602 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
6603 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
6605 return gen_rtx_USE (mode
, x
);
6612 /* This routine folds invariants such that there is only ever one
6613 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6616 sge_plus_constant (x
, c
)
6619 if (GET_CODE (x
) == CONST_INT
)
6620 return GEN_INT (INTVAL (x
) + INTVAL (c
));
6621 else if (GET_CODE (x
) != PLUS
)
6622 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
6623 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
6625 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
6626 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
6628 else if (GET_CODE (XEXP (x
, 0)) == PLUS
6629 || GET_CODE (XEXP (x
, 1)) != PLUS
)
6631 return gen_rtx_PLUS (GET_MODE (x
),
6632 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
6636 return gen_rtx_PLUS (GET_MODE (x
),
6637 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
6642 sge_plus (mode
, x
, y
)
6643 enum machine_mode mode
;
6646 while (GET_CODE (y
) == PLUS
)
6648 rtx a
= XEXP (y
, 0);
6649 if (GET_CODE (a
) == CONST_INT
)
6650 x
= sge_plus_constant (x
, a
);
6652 x
= gen_rtx_PLUS (mode
, x
, a
);
6655 if (GET_CODE (y
) == CONST_INT
)
6656 x
= sge_plus_constant (x
, y
);
6658 x
= gen_rtx_PLUS (mode
, x
, y
);
6662 /* Help detect a giv that is calculated by several consecutive insns;
6666 The caller has already identified the first insn P as having a giv as dest;
6667 we check that all other insns that set the same register follow
6668 immediately after P, that they alter nothing else,
6669 and that the result of the last is still a giv.
6671 The value is 0 if the reg set in P is not really a giv.
6672 Otherwise, the value is the amount gained by eliminating
6673 all the consecutive insns that compute the value.
6675 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6676 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6678 The coefficients of the ultimate giv value are stored in
6679 *MULT_VAL and *ADD_VAL. */
6682 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
6683 add_val
, mult_val
, last_consec_insn
)
6690 rtx
*last_consec_insn
;
6698 /* Indicate that this is a giv so that we can update the value produced in
6699 each insn of the multi-insn sequence.
6701 This induction structure will be used only by the call to
6702 general_induction_var below, so we can allocate it on our stack.
6703 If this is a giv, our caller will replace the induct var entry with
6704 a new induction structure. */
6706 = (struct induction
*) alloca (sizeof (struct induction
));
6707 v
->src_reg
= src_reg
;
6708 v
->mult_val
= *mult_val
;
6709 v
->add_val
= *add_val
;
6710 v
->benefit
= first_benefit
;
6712 v
->derive_adjustment
= 0;
6714 REG_IV_TYPE (REGNO (dest_reg
)) = GENERAL_INDUCT
;
6715 REG_IV_INFO (REGNO (dest_reg
)) = v
;
6717 count
= VARRAY_INT (n_times_set
, REGNO (dest_reg
)) - 1;
6722 code
= GET_CODE (p
);
6724 /* If libcall, skip to end of call sequence. */
6725 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
6729 && (set
= single_set (p
))
6730 && GET_CODE (SET_DEST (set
)) == REG
6731 && SET_DEST (set
) == dest_reg
6732 && (general_induction_var (SET_SRC (set
), &src_reg
,
6733 add_val
, mult_val
, 0, &benefit
)
6734 /* Giv created by equivalent expression. */
6735 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
6736 && general_induction_var (XEXP (temp
, 0), &src_reg
,
6737 add_val
, mult_val
, 0, &benefit
)))
6738 && src_reg
== v
->src_reg
)
6740 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
6741 benefit
+= libcall_benefit (p
);
6744 v
->mult_val
= *mult_val
;
6745 v
->add_val
= *add_val
;
6746 v
->benefit
= benefit
;
6748 else if (code
!= NOTE
)
6750 /* Allow insns that set something other than this giv to a
6751 constant. Such insns are needed on machines which cannot
6752 include long constants and should not disqualify a giv. */
6754 && (set
= single_set (p
))
6755 && SET_DEST (set
) != dest_reg
6756 && CONSTANT_P (SET_SRC (set
)))
6759 REG_IV_TYPE (REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
6764 *last_consec_insn
= p
;
6768 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6769 represented by G1. If no such expression can be found, or it is clear that
6770 it cannot possibly be a valid address, 0 is returned.
6772 To perform the computation, we note that
6775 where `v' is the biv.
6777 So G2 = (y/b) * G1 + (b - a*y/x).
6779 Note that MULT = y/x.
6781 Update: A and B are now allowed to be additive expressions such that
6782 B contains all variables in A. That is, computing B-A will not require
6783 subtracting variables. */
6786 express_from_1 (a
, b
, mult
)
6789 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6791 if (mult
== const0_rtx
)
6794 /* If MULT is not 1, we cannot handle A with non-constants, since we
6795 would then be required to subtract multiples of the registers in A.
6796 This is theoretically possible, and may even apply to some Fortran
6797 constructs, but it is a lot of work and we do not attempt it here. */
6799 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
6802 /* In general these structures are sorted top to bottom (down the PLUS
6803 chain), but not left to right across the PLUS. If B is a higher
6804 order giv than A, we can strip one level and recurse. If A is higher
6805 order, we'll eventually bail out, but won't know that until the end.
6806 If they are the same, we'll strip one level around this loop. */
6808 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
6810 rtx ra
, rb
, oa
, ob
, tmp
;
6812 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6813 if (GET_CODE (ra
) == PLUS
)
6814 tmp
= ra
, ra
= oa
, oa
= tmp
;
6816 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
6817 if (GET_CODE (rb
) == PLUS
)
6818 tmp
= rb
, rb
= ob
, ob
= tmp
;
6820 if (rtx_equal_p (ra
, rb
))
6821 /* We matched: remove one reg completely. */
6823 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
6824 /* An alternate match. */
6826 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
6827 /* An alternate match. */
6831 /* Indicates an extra register in B. Strip one level from B and
6832 recurse, hoping B was the higher order expression. */
6833 ob
= express_from_1 (a
, ob
, mult
);
6836 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
6840 /* Here we are at the last level of A, go through the cases hoping to
6841 get rid of everything but a constant. */
6843 if (GET_CODE (a
) == PLUS
)
6847 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6848 if (rtx_equal_p (oa
, b
))
6850 else if (!rtx_equal_p (ra
, b
))
6853 if (GET_CODE (oa
) != CONST_INT
)
6856 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
6858 else if (GET_CODE (a
) == CONST_INT
)
6860 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
6862 else if (GET_CODE (b
) == PLUS
)
6864 if (rtx_equal_p (a
, XEXP (b
, 0)))
6866 else if (rtx_equal_p (a
, XEXP (b
, 1)))
6871 else if (rtx_equal_p (a
, b
))
6878 express_from (g1
, g2
)
6879 struct induction
*g1
, *g2
;
6883 /* The value that G1 will be multiplied by must be a constant integer. Also,
6884 the only chance we have of getting a valid address is if b*c/a (see above
6885 for notation) is also an integer. */
6886 if (GET_CODE (g1
->mult_val
) == CONST_INT
6887 && GET_CODE (g2
->mult_val
) == CONST_INT
)
6889 if (g1
->mult_val
== const0_rtx
6890 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
6892 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
6894 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
6898 /* ??? Find out if the one is a multiple of the other? */
6902 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
6903 if (add
== NULL_RTX
)
6905 /* Failed. If we've got a multiplication factor between G1 and G2,
6906 scale G1's addend and try again. */
6907 if (INTVAL (mult
) > 1)
6909 rtx g1_add_val
= g1
->add_val
;
6910 if (GET_CODE (g1_add_val
) == MULT
6911 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
6914 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
6915 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
6916 XEXP (g1_add_val
, 0), GEN_INT (m
));
6920 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
6924 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
6927 if (add
== NULL_RTX
)
6930 /* Form simplified final result. */
6931 if (mult
== const0_rtx
)
6933 else if (mult
== const1_rtx
)
6934 mult
= g1
->dest_reg
;
6936 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
6938 if (add
== const0_rtx
)
6942 if (GET_CODE (add
) == PLUS
6943 && CONSTANT_P (XEXP (add
, 1)))
6945 rtx tem
= XEXP (add
, 1);
6946 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
6950 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
6955 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6956 represented by G1. This indicates that G2 should be combined with G1 and
6957 that G2 can use (either directly or via an address expression) a register
6958 used to represent G1. */
6961 combine_givs_p (g1
, g2
)
6962 struct induction
*g1
, *g2
;
6964 rtx tem
= express_from (g1
, g2
);
6966 /* If these givs are identical, they can be combined. We use the results
6967 of express_from because the addends are not in a canonical form, so
6968 rtx_equal_p is a weaker test. */
6969 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6970 combination to be the other way round. */
6971 if (tem
== g1
->dest_reg
6972 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
6974 return g1
->dest_reg
;
6977 /* If G2 can be expressed as a function of G1 and that function is valid
6978 as an address and no more expensive than using a register for G2,
6979 the expression of G2 in terms of G1 can be used. */
6981 && g2
->giv_type
== DEST_ADDR
6982 && memory_address_p (g2
->mem_mode
, tem
)
6983 /* ??? Looses, especially with -fforce-addr, where *g2->location
6984 will always be a register, and so anything more complicated
6988 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
6990 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
7001 struct combine_givs_stats
7008 cmp_combine_givs_stats (x
, y
)
7009 struct combine_givs_stats
*x
, *y
;
7012 d
= y
->total_benefit
- x
->total_benefit
;
7013 /* Stabilize the sort. */
7015 d
= x
->giv_number
- y
->giv_number
;
7019 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7020 any other. If so, point SAME to the giv combined with and set NEW_REG to
7021 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7022 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7026 struct iv_class
*bl
;
7028 /* Additional benefit to add for being combined multiple times. */
7029 const int extra_benefit
= 3;
7031 struct induction
*g1
, *g2
, **giv_array
;
7032 int i
, j
, k
, giv_count
;
7033 struct combine_givs_stats
*stats
;
7036 /* Count givs, because bl->giv_count is incorrect here. */
7038 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7043 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
7045 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7047 giv_array
[i
++] = g1
;
7049 stats
= (struct combine_givs_stats
*) alloca (giv_count
* sizeof (*stats
));
7050 bzero ((char *) stats
, giv_count
* sizeof (*stats
));
7052 can_combine
= (rtx
*) alloca (giv_count
* giv_count
* sizeof(rtx
));
7053 bzero ((char *) can_combine
, giv_count
* giv_count
* sizeof(rtx
));
7055 for (i
= 0; i
< giv_count
; i
++)
7061 stats
[i
].giv_number
= i
;
7063 /* If a DEST_REG GIV is used only once, do not allow it to combine
7064 with anything, for in doing so we will gain nothing that cannot
7065 be had by simply letting the GIV with which we would have combined
7066 to be reduced on its own. The losage shows up in particular with
7067 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7068 be seen elsewhere as well. */
7069 if (g1
->giv_type
== DEST_REG
7070 && (single_use
= VARRAY_RTX (reg_single_usage
, REGNO (g1
->dest_reg
)))
7071 && single_use
!= const0_rtx
)
7074 this_benefit
= g1
->benefit
;
7075 /* Add an additional weight for zero addends. */
7076 if (g1
->no_const_addval
)
7079 for (j
= 0; j
< giv_count
; j
++)
7085 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
7087 can_combine
[i
*giv_count
+ j
] = this_combine
;
7088 this_benefit
+= g2
->benefit
+ extra_benefit
;
7091 stats
[i
].total_benefit
= this_benefit
;
7094 /* Iterate, combining until we can't. */
7096 qsort (stats
, giv_count
, sizeof(*stats
), cmp_combine_givs_stats
);
7098 if (loop_dump_stream
)
7100 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
7101 for (k
= 0; k
< giv_count
; k
++)
7103 g1
= giv_array
[stats
[k
].giv_number
];
7104 if (!g1
->combined_with
&& !g1
->same
)
7105 fprintf (loop_dump_stream
, " {%d, %d}",
7106 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
7107 stats
[k
].total_benefit
);
7109 putc ('\n', loop_dump_stream
);
7112 for (k
= 0; k
< giv_count
; k
++)
7114 int g1_add_benefit
= 0;
7116 i
= stats
[k
].giv_number
;
7119 /* If it has already been combined, skip. */
7120 if (g1
->combined_with
|| g1
->same
)
7123 for (j
= 0; j
< giv_count
; j
++)
7126 if (g1
!= g2
&& can_combine
[i
*giv_count
+ j
]
7127 /* If it has already been combined, skip. */
7128 && ! g2
->same
&& ! g2
->combined_with
)
7132 g2
->new_reg
= can_combine
[i
*giv_count
+ j
];
7134 g1
->combined_with
++;
7135 g1
->lifetime
+= g2
->lifetime
;
7137 g1_add_benefit
+= g2
->benefit
;
7139 /* ??? The new final_[bg]iv_value code does a much better job
7140 of finding replaceable giv's, and hence this code may no
7141 longer be necessary. */
7142 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
7143 g1_add_benefit
-= copy_cost
;
7145 /* To help optimize the next set of combinations, remove
7146 this giv from the benefits of other potential mates. */
7147 for (l
= 0; l
< giv_count
; ++l
)
7149 int m
= stats
[l
].giv_number
;
7150 if (can_combine
[m
*giv_count
+ j
])
7151 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
7154 if (loop_dump_stream
)
7155 fprintf (loop_dump_stream
,
7156 "giv at %d combined with giv at %d\n",
7157 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
7161 /* To help optimize the next set of combinations, remove
7162 this giv from the benefits of other potential mates. */
7163 if (g1
->combined_with
)
7165 for (j
= 0; j
< giv_count
; ++j
)
7167 int m
= stats
[j
].giv_number
;
7168 if (can_combine
[m
*giv_count
+ i
])
7169 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
7172 g1
->benefit
+= g1_add_benefit
;
7174 /* We've finished with this giv, and everything it touched.
7175 Restart the combination so that proper weights for the
7176 rest of the givs are properly taken into account. */
7177 /* ??? Ideally we would compact the arrays at this point, so
7178 as to not cover old ground. But sanely compacting
7179 can_combine is tricky. */
7185 struct recombine_givs_stats
7188 int start_luid
, end_luid
;
7191 /* Used below as comparison function for qsort. We want a ascending luid
7192 when scanning the array starting at the end, thus the arguments are
7195 cmp_recombine_givs_stats (x
, y
)
7196 struct recombine_givs_stats
*x
, *y
;
7199 d
= y
->start_luid
- x
->start_luid
;
7200 /* Stabilize the sort. */
7202 d
= y
->giv_number
- x
->giv_number
;
7206 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7207 look for the start of life of a giv where the start has not been seen
7208 yet to unlock the search for the end of its life.
7209 Only consider givs that belong to BIV.
7210 Return the total number of lifetime ends that have been found. */
7212 find_life_end (x
, stats
, insn
, biv
)
7214 struct recombine_givs_stats
*stats
;
7221 code
= GET_CODE (x
);
7226 rtx reg
= SET_DEST (x
);
7227 if (GET_CODE (reg
) == REG
)
7229 int regno
= REGNO (reg
);
7230 struct induction
*v
= REG_IV_INFO (regno
);
7232 if (REG_IV_TYPE (regno
) == GENERAL_INDUCT
7234 && v
->src_reg
== biv
7235 && stats
[v
->ix
].end_luid
<= 0)
7237 /* If we see a 0 here for end_luid, it means that we have
7238 scanned the entire loop without finding any use at all.
7239 We must not predicate this code on a start_luid match
7240 since that would make the test fail for givs that have
7241 been hoisted out of inner loops. */
7242 if (stats
[v
->ix
].end_luid
== 0)
7244 stats
[v
->ix
].end_luid
= stats
[v
->ix
].start_luid
;
7245 return 1 + find_life_end (SET_SRC (x
), stats
, insn
, biv
);
7247 else if (stats
[v
->ix
].start_luid
== INSN_LUID (insn
))
7248 stats
[v
->ix
].end_luid
= 0;
7250 return find_life_end (SET_SRC (x
), stats
, insn
, biv
);
7256 int regno
= REGNO (x
);
7257 struct induction
*v
= REG_IV_INFO (regno
);
7259 if (REG_IV_TYPE (regno
) == GENERAL_INDUCT
7261 && v
->src_reg
== biv
7262 && stats
[v
->ix
].end_luid
== 0)
7264 while (INSN_UID (insn
) >= max_uid_for_loop
)
7265 insn
= NEXT_INSN (insn
);
7266 stats
[v
->ix
].end_luid
= INSN_LUID (insn
);
7279 fmt
= GET_RTX_FORMAT (code
);
7281 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7284 retval
+= find_life_end (XEXP (x
, i
), stats
, insn
, biv
);
7286 else if (fmt
[i
] == 'E')
7287 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7288 retval
+= find_life_end (XVECEXP (x
, i
, j
), stats
, insn
, biv
);
7293 /* For each giv that has been combined with another, look if
7294 we can combine it with the most recently used one instead.
7295 This tends to shorten giv lifetimes, and helps the next step:
7296 try to derive givs from other givs. */
7298 recombine_givs (bl
, loop_start
, loop_end
, unroll_p
)
7299 struct iv_class
*bl
;
7300 rtx loop_start
, loop_end
;
7303 struct induction
*v
, **giv_array
, *last_giv
;
7304 struct recombine_givs_stats
*stats
;
7307 int ends_need_computing
;
7309 for (giv_count
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
)
7315 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
7316 stats
= (struct recombine_givs_stats
*) alloca (giv_count
* sizeof *stats
);
7318 /* Initialize stats and set up the ix field for each giv in stats to name
7319 the corresponding index into stats. */
7320 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
)
7327 stats
[i
].giv_number
= i
;
7328 /* If this giv has been hoisted out of an inner loop, use the luid of
7329 the previous insn. */
7330 for (p
= v
->insn
; INSN_UID (p
) >= max_uid_for_loop
; )
7332 stats
[i
].start_luid
= INSN_LUID (p
);
7336 qsort (stats
, giv_count
, sizeof(*stats
), cmp_recombine_givs_stats
);
7338 /* Set up the ix field for each giv in stats to name
7339 the corresponding index into stats, and
7340 do the actual most-recently-used recombination. */
7341 for (last_giv
= 0, i
= giv_count
- 1; i
>= 0; i
--)
7343 v
= giv_array
[stats
[i
].giv_number
];
7347 struct induction
*old_same
= v
->same
;
7350 /* combine_givs_p actually says if we can make this transformation.
7351 The other tests are here only to avoid keeping a giv alive
7352 that could otherwise be eliminated. */
7354 && ((old_same
->maybe_dead
&& ! old_same
->combined_with
)
7355 || ! last_giv
->maybe_dead
7356 || last_giv
->combined_with
)
7357 && (new_combine
= combine_givs_p (last_giv
, v
)))
7359 old_same
->combined_with
--;
7360 v
->new_reg
= new_combine
;
7362 last_giv
->combined_with
++;
7363 /* No need to update lifetimes / benefits here since we have
7364 already decided what to reduce. */
7366 if (loop_dump_stream
)
7368 fprintf (loop_dump_stream
,
7369 "giv at %d recombined with giv at %d as ",
7370 INSN_UID (v
->insn
), INSN_UID (last_giv
->insn
));
7371 print_rtl (loop_dump_stream
, v
->new_reg
);
7372 putc ('\n', loop_dump_stream
);
7378 else if (v
->giv_type
!= DEST_REG
)
7381 || (last_giv
->maybe_dead
&& ! last_giv
->combined_with
)
7383 || v
->combined_with
)
7387 ends_need_computing
= 0;
7388 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7389 lifetime ends from regscan info. */
7390 for (i
= giv_count
- 1; i
>= 0; i
--)
7392 v
= giv_array
[stats
[i
].giv_number
];
7395 if (v
->giv_type
== DEST_ADDR
)
7397 /* Loop unrolling of an inner loop can even create new DEST_REG
7400 for (p
= v
->insn
; INSN_UID (p
) >= max_uid_for_loop
; )
7402 stats
[i
].start_luid
= stats
[i
].end_luid
= INSN_LUID (p
);
7404 stats
[i
].end_luid
++;
7406 else /* v->giv_type == DEST_REG */
7410 stats
[i
].start_luid
= INSN_LUID (v
->insn
);
7411 stats
[i
].end_luid
= INSN_LUID (v
->last_use
);
7413 else if (INSN_UID (v
->insn
) >= max_uid_for_loop
)
7416 /* This insn has been created by loop optimization on an inner
7417 loop. We don't have a proper start_luid that will match
7418 when we see the first set. But we do know that there will
7419 be no use before the set, so we can set end_luid to 0 so that
7420 we'll start looking for the last use right away. */
7421 for (p
= PREV_INSN (v
->insn
); INSN_UID (p
) >= max_uid_for_loop
; )
7423 stats
[i
].start_luid
= INSN_LUID (p
);
7424 stats
[i
].end_luid
= 0;
7425 ends_need_computing
++;
7429 int regno
= REGNO (v
->dest_reg
);
7430 int count
= VARRAY_INT (n_times_set
, regno
) - 1;
7433 /* Find the first insn that sets the giv, so that we can verify
7434 if this giv's lifetime wraps around the loop. We also need
7435 the luid of the first setting insn in order to detect the
7436 last use properly. */
7439 p
= prev_nonnote_insn (p
);
7440 if (reg_set_p (v
->dest_reg
, p
))
7444 stats
[i
].start_luid
= INSN_LUID (p
);
7445 if (stats
[i
].start_luid
> uid_luid
[REGNO_FIRST_UID (regno
)])
7447 stats
[i
].end_luid
= -1;
7448 ends_need_computing
++;
7452 stats
[i
].end_luid
= uid_luid
[REGNO_LAST_UID (regno
)];
7453 if (stats
[i
].end_luid
> INSN_LUID (loop_end
))
7455 stats
[i
].end_luid
= -1;
7456 ends_need_computing
++;
7463 /* If the regscan information was unconclusive for one or more DEST_REG
7464 givs, scan the all insn in the loop to find out lifetime ends. */
7465 if (ends_need_computing
)
7467 rtx biv
= bl
->biv
->src_reg
;
7472 if (p
== loop_start
)
7475 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
7477 ends_need_computing
-= find_life_end (PATTERN (p
), stats
, p
, biv
);
7479 while (ends_need_computing
);
7482 /* Set start_luid back to the last insn that sets the giv. This allows
7483 more combinations. */
7484 for (i
= giv_count
- 1; i
>= 0; i
--)
7486 v
= giv_array
[stats
[i
].giv_number
];
7489 if (INSN_UID (v
->insn
) < max_uid_for_loop
)
7490 stats
[i
].start_luid
= INSN_LUID (v
->insn
);
7493 /* Now adjust lifetime ends by taking combined givs into account. */
7494 for (i
= giv_count
- 1; i
>= 0; i
--)
7499 v
= giv_array
[stats
[i
].giv_number
];
7502 if (v
->same
&& ! v
->same
->ignore
)
7505 luid
= stats
[i
].start_luid
;
7506 /* Use unsigned arithmetic to model loop wrap-around. */
7507 if (luid
- stats
[j
].start_luid
7508 > (unsigned) stats
[j
].end_luid
- stats
[j
].start_luid
)
7509 stats
[j
].end_luid
= luid
;
7513 qsort (stats
, giv_count
, sizeof(*stats
), cmp_recombine_givs_stats
);
7515 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7516 same mult_val and non-overlapping lifetime. This reduces register
7518 Once we find a DEST_REG giv that is suitable to derive others from,
7519 we set last_giv to this giv, and try to derive as many other DEST_REG
7520 givs from it without joining overlapping lifetimes. If we then
7521 encounter a DEST_REG giv that we can't derive, we set rescan to the
7522 index for this giv (unless rescan is already set).
7523 When we are finished with the current LAST_GIV (i.e. the inner loop
7524 terminates), we start again with rescan, which then becomes the new
7526 for (i
= giv_count
- 1; i
>= 0; i
= rescan
)
7528 int life_start
, life_end
;
7530 for (last_giv
= 0, rescan
= -1; i
>= 0; i
--)
7534 v
= giv_array
[stats
[i
].giv_number
];
7535 if (v
->giv_type
!= DEST_REG
|| v
->derived_from
|| v
->same
)
7539 /* Don't use a giv that's likely to be dead to derive
7540 others - that would be likely to keep that giv alive. */
7541 if (! v
->maybe_dead
|| v
->combined_with
)
7544 life_start
= stats
[i
].start_luid
;
7545 life_end
= stats
[i
].end_luid
;
7549 /* Use unsigned arithmetic to model loop wrap around. */
7550 if (((unsigned) stats
[i
].start_luid
- life_start
7551 >= (unsigned) life_end
- life_start
)
7552 && ((unsigned) stats
[i
].end_luid
- life_start
7553 > (unsigned) life_end
- life_start
)
7554 /* Check that the giv insn we're about to use for deriving
7555 precedes all uses of that giv. Note that initializing the
7556 derived giv would defeat the purpose of reducing register
7558 ??? We could arrange to move the insn. */
7559 && ((unsigned) stats
[i
].end_luid
- INSN_LUID (loop_start
)
7560 > (unsigned) stats
[i
].start_luid
- INSN_LUID (loop_start
))
7561 && rtx_equal_p (last_giv
->mult_val
, v
->mult_val
)
7562 /* ??? Could handle libcalls, but would need more logic. */
7563 && ! find_reg_note (v
->insn
, REG_RETVAL
, NULL_RTX
)
7564 /* We would really like to know if for any giv that v
7565 is combined with, v->insn or any intervening biv increment
7566 dominates that combined giv. However, we
7567 don't have this detailed control flow information.
7568 N.B. since last_giv will be reduced, it is valid
7569 anywhere in the loop, so we don't need to check the
7570 validity of last_giv.
7571 We rely here on the fact that v->always_executed implies that
7572 there is no jump to someplace else in the loop before the
7573 giv insn, and hence any insn that is executed before the
7574 giv insn in the loop will have a lower luid. */
7575 && (v
->always_executed
|| ! v
->combined_with
)
7576 && (sum
= express_from (last_giv
, v
))
7577 /* Make sure we don't make the add more expensive. ADD_COST
7578 doesn't take different costs of registers and constants into
7579 account, so compare the cost of the actual SET_SRCs. */
7580 && (rtx_cost (sum
, SET
)
7581 <= rtx_cost (SET_SRC (single_set (v
->insn
)), SET
))
7582 /* ??? unroll can't understand anything but reg + const_int
7583 sums. It would be cleaner to fix unroll. */
7584 && ((GET_CODE (sum
) == PLUS
7585 && GET_CODE (XEXP (sum
, 0)) == REG
7586 && GET_CODE (XEXP (sum
, 1)) == CONST_INT
)
7588 && validate_change (v
->insn
, &PATTERN (v
->insn
),
7589 gen_rtx_SET (VOIDmode
, v
->dest_reg
, sum
), 0))
7591 v
->derived_from
= last_giv
;
7592 life_end
= stats
[i
].end_luid
;
7594 if (loop_dump_stream
)
7596 fprintf (loop_dump_stream
,
7597 "giv at %d derived from %d as ",
7598 INSN_UID (v
->insn
), INSN_UID (last_giv
->insn
));
7599 print_rtl (loop_dump_stream
, sum
);
7600 putc ('\n', loop_dump_stream
);
7603 else if (rescan
< 0)
7609 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7612 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
7613 rtx b
; /* initial value of basic induction variable */
7614 rtx m
; /* multiplicative constant */
7615 rtx a
; /* additive constant */
7616 rtx reg
; /* destination register */
7622 /* Prevent unexpected sharing of these rtx. */
7626 /* Increase the lifetime of any invariants moved further in code. */
7627 update_reg_last_use (a
, insert_before
);
7628 update_reg_last_use (b
, insert_before
);
7629 update_reg_last_use (m
, insert_before
);
7632 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
7634 emit_move_insn (reg
, result
);
7635 seq
= gen_sequence ();
7638 emit_insn_before (seq
, insert_before
);
7640 /* It is entirely possible that the expansion created lots of new
7641 registers. Iterate over the sequence we just created and
7644 if (GET_CODE (seq
) == SEQUENCE
)
7647 for (i
= 0; i
< XVECLEN (seq
, 0); ++i
)
7649 rtx set
= single_set (XVECEXP (seq
, 0, i
));
7650 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
7651 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
7654 else if (GET_CODE (seq
) == SET
7655 && GET_CODE (SET_DEST (seq
)) == REG
)
7656 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
7659 /* Test whether A * B can be computed without
7660 an actual multiply insn. Value is 1 if so. */
7663 product_cheap_p (a
, b
)
7669 struct obstack
*old_rtl_obstack
= rtl_obstack
;
7670 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
7673 /* If only one is constant, make it B. */
7674 if (GET_CODE (a
) == CONST_INT
)
7675 tmp
= a
, a
= b
, b
= tmp
;
7677 /* If first constant, both constant, so don't need multiply. */
7678 if (GET_CODE (a
) == CONST_INT
)
7681 /* If second not constant, neither is constant, so would need multiply. */
7682 if (GET_CODE (b
) != CONST_INT
)
7685 /* One operand is constant, so might not need multiply insn. Generate the
7686 code for the multiply and see if a call or multiply, or long sequence
7687 of insns is generated. */
7689 rtl_obstack
= &temp_obstack
;
7691 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
7692 tmp
= gen_sequence ();
7695 if (GET_CODE (tmp
) == SEQUENCE
)
7697 if (XVEC (tmp
, 0) == 0)
7699 else if (XVECLEN (tmp
, 0) > 3)
7702 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
7704 rtx insn
= XVECEXP (tmp
, 0, i
);
7706 if (GET_CODE (insn
) != INSN
7707 || (GET_CODE (PATTERN (insn
)) == SET
7708 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
7709 || (GET_CODE (PATTERN (insn
)) == PARALLEL
7710 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
7711 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
7718 else if (GET_CODE (tmp
) == SET
7719 && GET_CODE (SET_SRC (tmp
)) == MULT
)
7721 else if (GET_CODE (tmp
) == PARALLEL
7722 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
7723 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
7726 /* Free any storage we obtained in generating this multiply and restore rtl
7727 allocation to its normal obstack. */
7728 obstack_free (&temp_obstack
, storage
);
7729 rtl_obstack
= old_rtl_obstack
;
7734 /* Check to see if loop can be terminated by a "decrement and branch until
7735 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7736 Also try reversing an increment loop to a decrement loop
7737 to see if the optimization can be performed.
7738 Value is nonzero if optimization was performed. */
7740 /* This is useful even if the architecture doesn't have such an insn,
7741 because it might change a loops which increments from 0 to n to a loop
7742 which decrements from n to 0. A loop that decrements to zero is usually
7743 faster than one that increments from zero. */
7745 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7746 such as approx_final_value, biv_total_increment, loop_iterations, and
7747 final_[bg]iv_value. */
7750 check_dbra_loop (loop_end
, insn_count
, loop_start
, loop_info
)
7754 struct loop_info
*loop_info
;
7756 struct iv_class
*bl
;
7763 rtx before_comparison
;
7767 int compare_and_branch
;
7769 /* If last insn is a conditional branch, and the insn before tests a
7770 register value, try to optimize it. Otherwise, we can't do anything. */
7772 jump
= PREV_INSN (loop_end
);
7773 comparison
= get_condition_for_loop (jump
);
7774 if (comparison
== 0)
7777 /* Try to compute whether the compare/branch at the loop end is one or
7778 two instructions. */
7779 get_condition (jump
, &first_compare
);
7780 if (first_compare
== jump
)
7781 compare_and_branch
= 1;
7782 else if (first_compare
== prev_nonnote_insn (jump
))
7783 compare_and_branch
= 2;
7787 /* Check all of the bivs to see if the compare uses one of them.
7788 Skip biv's set more than once because we can't guarantee that
7789 it will be zero on the last iteration. Also skip if the biv is
7790 used between its update and the test insn. */
7792 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
7794 if (bl
->biv_count
== 1
7795 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
7796 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
7804 /* Look for the case where the basic induction variable is always
7805 nonnegative, and equals zero on the last iteration.
7806 In this case, add a reg_note REG_NONNEG, which allows the
7807 m68k DBRA instruction to be used. */
7809 if (((GET_CODE (comparison
) == GT
7810 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
7811 && INTVAL (XEXP (comparison
, 1)) == -1)
7812 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
7813 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
7814 && INTVAL (bl
->biv
->add_val
) < 0)
7816 /* Initial value must be greater than 0,
7817 init_val % -dec_value == 0 to ensure that it equals zero on
7818 the last iteration */
7820 if (GET_CODE (bl
->initial_value
) == CONST_INT
7821 && INTVAL (bl
->initial_value
) > 0
7822 && (INTVAL (bl
->initial_value
)
7823 % (-INTVAL (bl
->biv
->add_val
))) == 0)
7825 /* register always nonnegative, add REG_NOTE to branch */
7826 REG_NOTES (PREV_INSN (loop_end
))
7827 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
7828 REG_NOTES (PREV_INSN (loop_end
)));
7834 /* If the decrement is 1 and the value was tested as >= 0 before
7835 the loop, then we can safely optimize. */
7836 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
7838 if (GET_CODE (p
) == CODE_LABEL
)
7840 if (GET_CODE (p
) != JUMP_INSN
)
7843 before_comparison
= get_condition_for_loop (p
);
7844 if (before_comparison
7845 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
7846 && GET_CODE (before_comparison
) == LT
7847 && XEXP (before_comparison
, 1) == const0_rtx
7848 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
7849 && INTVAL (bl
->biv
->add_val
) == -1)
7851 REG_NOTES (PREV_INSN (loop_end
))
7852 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
7853 REG_NOTES (PREV_INSN (loop_end
)));
7860 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
7861 && INTVAL (bl
->biv
->add_val
) > 0)
7863 /* Try to change inc to dec, so can apply above optimization. */
7865 all registers modified are induction variables or invariant,
7866 all memory references have non-overlapping addresses
7867 (obviously true if only one write)
7868 allow 2 insns for the compare/jump at the end of the loop. */
7869 /* Also, we must avoid any instructions which use both the reversed
7870 biv and another biv. Such instructions will fail if the loop is
7871 reversed. We meet this condition by requiring that either
7872 no_use_except_counting is true, or else that there is only
7874 int num_nonfixed_reads
= 0;
7875 /* 1 if the iteration var is used only to count iterations. */
7876 int no_use_except_counting
= 0;
7877 /* 1 if the loop has no memory store, or it has a single memory store
7878 which is reversible. */
7879 int reversible_mem_store
= 1;
7881 if (bl
->giv_count
== 0
7882 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
7884 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
7886 /* If there are no givs for this biv, and the only exit is the
7887 fall through at the end of the loop, then
7888 see if perhaps there are no uses except to count. */
7889 no_use_except_counting
= 1;
7890 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
7891 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
7893 rtx set
= single_set (p
);
7895 if (set
&& GET_CODE (SET_DEST (set
)) == REG
7896 && REGNO (SET_DEST (set
)) == bl
->regno
)
7897 /* An insn that sets the biv is okay. */
7899 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
7900 || p
== prev_nonnote_insn (loop_end
))
7901 /* Don't bother about the end test. */
7903 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
7905 no_use_except_counting
= 0;
7911 if (no_use_except_counting
)
7912 ; /* no need to worry about MEMs. */
7913 else if (num_mem_sets
<= 1)
7915 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
7916 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
7917 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
7919 /* If the loop has a single store, and the destination address is
7920 invariant, then we can't reverse the loop, because this address
7921 might then have the wrong value at loop exit.
7922 This would work if the source was invariant also, however, in that
7923 case, the insn should have been moved out of the loop. */
7925 if (num_mem_sets
== 1)
7927 struct induction
*v
;
7929 reversible_mem_store
7930 = (! unknown_address_altered
7931 && ! invariant_p (XEXP (XEXP (loop_store_mems
, 0), 0)));
7933 /* If the store depends on a register that is set after the
7934 store, it depends on the initial value, and is thus not
7936 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
7938 if (v
->giv_type
== DEST_REG
7939 && reg_mentioned_p (v
->dest_reg
,
7940 XEXP (loop_store_mems
, 0))
7941 && loop_insn_first_p (first_loop_store_insn
, v
->insn
))
7942 reversible_mem_store
= 0;
7949 /* This code only acts for innermost loops. Also it simplifies
7950 the memory address check by only reversing loops with
7951 zero or one memory access.
7952 Two memory accesses could involve parts of the same array,
7953 and that can't be reversed.
7954 If the biv is used only for counting, than we don't need to worry
7955 about all these things. */
7957 if ((num_nonfixed_reads
<= 1
7958 && ! loop_info
->has_call
7959 && ! loop_info
->has_volatile
7960 && reversible_mem_store
7961 && (bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
7962 + num_movables
+ compare_and_branch
== insn_count
)
7963 && (bl
== loop_iv_list
&& bl
->next
== 0))
7964 || no_use_except_counting
)
7968 /* Loop can be reversed. */
7969 if (loop_dump_stream
)
7970 fprintf (loop_dump_stream
, "Can reverse loop\n");
7972 /* Now check other conditions:
7974 The increment must be a constant, as must the initial value,
7975 and the comparison code must be LT.
7977 This test can probably be improved since +/- 1 in the constant
7978 can be obtained by changing LT to LE and vice versa; this is
7982 /* for constants, LE gets turned into LT */
7983 && (GET_CODE (comparison
) == LT
7984 || (GET_CODE (comparison
) == LE
7985 && no_use_except_counting
)))
7987 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
;
7988 rtx initial_value
, comparison_value
;
7990 enum rtx_code cmp_code
;
7991 int comparison_const_width
;
7992 unsigned HOST_WIDE_INT comparison_sign_mask
;
7994 add_val
= INTVAL (bl
->biv
->add_val
);
7995 comparison_value
= XEXP (comparison
, 1);
7996 if (GET_MODE (comparison_value
) == VOIDmode
)
7997 comparison_const_width
7998 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
8000 comparison_const_width
8001 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
8002 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
8003 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
8004 comparison_sign_mask
8005 = (unsigned HOST_WIDE_INT
)1 << (comparison_const_width
- 1);
8007 /* If the comparison value is not a loop invariant, then we
8008 can not reverse this loop.
8010 ??? If the insns which initialize the comparison value as
8011 a whole compute an invariant result, then we could move
8012 them out of the loop and proceed with loop reversal. */
8013 if (!invariant_p (comparison_value
))
8016 if (GET_CODE (comparison_value
) == CONST_INT
)
8017 comparison_val
= INTVAL (comparison_value
);
8018 initial_value
= bl
->initial_value
;
8020 /* Normalize the initial value if it is an integer and
8021 has no other use except as a counter. This will allow
8022 a few more loops to be reversed. */
8023 if (no_use_except_counting
8024 && GET_CODE (comparison_value
) == CONST_INT
8025 && GET_CODE (initial_value
) == CONST_INT
)
8027 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
8028 /* The code below requires comparison_val to be a multiple
8029 of add_val in order to do the loop reversal, so
8030 round up comparison_val to a multiple of add_val.
8031 Since comparison_value is constant, we know that the
8032 current comparison code is LT. */
8033 comparison_val
= comparison_val
+ add_val
- 1;
8035 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
8036 /* We postpone overflow checks for COMPARISON_VAL here;
8037 even if there is an overflow, we might still be able to
8038 reverse the loop, if converting the loop exit test to
8040 initial_value
= const0_rtx
;
8043 /* First check if we can do a vanilla loop reversal. */
8044 if (initial_value
== const0_rtx
8045 /* If we have a decrement_and_branch_on_count,
8046 prefer the NE test, since this will allow that
8047 instruction to be generated. Note that we must
8048 use a vanilla loop reversal if the biv is used to
8049 calculate a giv or has a non-counting use. */
8050 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8051 && defined (HAVE_decrement_and_branch_on_count)
8052 && (! (add_val
== 1 && loop_info
->vtop
8053 && (bl
->biv_count
== 0
8054 || no_use_except_counting
)))
8056 && GET_CODE (comparison_value
) == CONST_INT
8057 /* Now do postponed overflow checks on COMPARISON_VAL. */
8058 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
8059 & comparison_sign_mask
))
8061 /* Register will always be nonnegative, with value
8062 0 on last iteration */
8063 add_adjust
= add_val
;
8067 else if (add_val
== 1 && loop_info
->vtop
8068 && (bl
->biv_count
== 0
8069 || no_use_except_counting
))
8077 if (GET_CODE (comparison
) == LE
)
8078 add_adjust
-= add_val
;
8080 /* If the initial value is not zero, or if the comparison
8081 value is not an exact multiple of the increment, then we
8082 can not reverse this loop. */
8083 if (initial_value
== const0_rtx
8084 && GET_CODE (comparison_value
) == CONST_INT
)
8086 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
8091 if (! no_use_except_counting
|| add_val
!= 1)
8095 final_value
= comparison_value
;
8097 /* Reset these in case we normalized the initial value
8098 and comparison value above. */
8099 if (GET_CODE (comparison_value
) == CONST_INT
8100 && GET_CODE (initial_value
) == CONST_INT
)
8102 comparison_value
= GEN_INT (comparison_val
);
8104 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
8106 bl
->initial_value
= initial_value
;
8108 /* Save some info needed to produce the new insns. */
8109 reg
= bl
->biv
->dest_reg
;
8110 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
8111 if (jump_label
== pc_rtx
)
8112 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
8113 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
8115 /* Set start_value; if this is not a CONST_INT, we need
8117 Initialize biv to start_value before loop start.
8118 The old initializing insn will be deleted as a
8119 dead store by flow.c. */
8120 if (initial_value
== const0_rtx
8121 && GET_CODE (comparison_value
) == CONST_INT
)
8123 start_value
= GEN_INT (comparison_val
- add_adjust
);
8124 emit_insn_before (gen_move_insn (reg
, start_value
),
8127 else if (GET_CODE (initial_value
) == CONST_INT
)
8129 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
8130 enum machine_mode mode
= GET_MODE (reg
);
8131 enum insn_code icode
8132 = add_optab
->handlers
[(int) mode
].insn_code
;
8133 if (! (*insn_operand_predicate
[icode
][0]) (reg
, mode
)
8134 || ! ((*insn_operand_predicate
[icode
][1])
8135 (comparison_value
, mode
))
8136 || ! (*insn_operand_predicate
[icode
][2]) (offset
, mode
))
8139 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
8140 emit_insn_before ((GEN_FCN (icode
)
8141 (reg
, comparison_value
, offset
)),
8143 if (GET_CODE (comparison
) == LE
)
8144 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
8147 else if (! add_adjust
)
8149 enum machine_mode mode
= GET_MODE (reg
);
8150 enum insn_code icode
8151 = sub_optab
->handlers
[(int) mode
].insn_code
;
8152 if (! (*insn_operand_predicate
[icode
][0]) (reg
, mode
)
8153 || ! ((*insn_operand_predicate
[icode
][1])
8154 (comparison_value
, mode
))
8155 || ! ((*insn_operand_predicate
[icode
][2])
8156 (initial_value
, mode
)))
8159 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
8160 emit_insn_before ((GEN_FCN (icode
)
8161 (reg
, comparison_value
, initial_value
)),
8165 /* We could handle the other cases too, but it'll be
8166 better to have a testcase first. */
8169 /* We may not have a single insn which can increment a reg, so
8170 create a sequence to hold all the insns from expand_inc. */
8172 expand_inc (reg
, new_add_val
);
8173 tem
= gen_sequence ();
8176 p
= emit_insn_before (tem
, bl
->biv
->insn
);
8177 delete_insn (bl
->biv
->insn
);
8179 /* Update biv info to reflect its new status. */
8181 bl
->initial_value
= start_value
;
8182 bl
->biv
->add_val
= new_add_val
;
8184 /* Update loop info. */
8185 loop_info
->initial_value
= reg
;
8186 loop_info
->initial_equiv_value
= reg
;
8187 loop_info
->final_value
= const0_rtx
;
8188 loop_info
->final_equiv_value
= const0_rtx
;
8189 loop_info
->comparison_value
= const0_rtx
;
8190 loop_info
->comparison_code
= cmp_code
;
8191 loop_info
->increment
= new_add_val
;
8193 /* Inc LABEL_NUSES so that delete_insn will
8194 not delete the label. */
8195 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
8197 /* Emit an insn after the end of the loop to set the biv's
8198 proper exit value if it is used anywhere outside the loop. */
8199 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
8201 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
8202 emit_insn_after (gen_move_insn (reg
, final_value
),
8205 /* Delete compare/branch at end of loop. */
8206 delete_insn (PREV_INSN (loop_end
));
8207 if (compare_and_branch
== 2)
8208 delete_insn (first_compare
);
8210 /* Add new compare/branch insn at end of loop. */
8212 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
8213 GET_MODE (reg
), 0, 0,
8214 XEXP (jump_label
, 0));
8215 tem
= gen_sequence ();
8217 emit_jump_insn_before (tem
, loop_end
);
8219 for (tem
= PREV_INSN (loop_end
);
8220 tem
&& GET_CODE (tem
) != JUMP_INSN
;
8221 tem
= PREV_INSN (tem
))
8225 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
8231 /* Increment of LABEL_NUSES done above. */
8232 /* Register is now always nonnegative,
8233 so add REG_NONNEG note to the branch. */
8234 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
8240 /* No insn may reference both the reversed and another biv or it
8241 will fail (see comment near the top of the loop reversal
8243 Earlier on, we have verified that the biv has no use except
8244 counting, or it is the only biv in this function.
8245 However, the code that computes no_use_except_counting does
8246 not verify reg notes. It's possible to have an insn that
8247 references another biv, and has a REG_EQUAL note with an
8248 expression based on the reversed biv. To avoid this case,
8249 remove all REG_EQUAL notes based on the reversed biv
8251 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8252 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
8255 rtx set
= single_set (p
);
8256 /* If this is a set of a GIV based on the reversed biv, any
8257 REG_EQUAL notes should still be correct. */
8259 || GET_CODE (SET_DEST (set
)) != REG
8260 || (size_t) REGNO (SET_DEST (set
)) >= reg_iv_type
->num_elements
8261 || REG_IV_TYPE (REGNO (SET_DEST (set
))) != GENERAL_INDUCT
8262 || REG_IV_INFO (REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
8263 for (pnote
= ®_NOTES (p
); *pnote
;)
8265 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
8266 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
8268 *pnote
= XEXP (*pnote
, 1);
8270 pnote
= &XEXP (*pnote
, 1);
8274 /* Mark that this biv has been reversed. Each giv which depends
8275 on this biv, and which is also live past the end of the loop
8276 will have to be fixed up. */
8280 if (loop_dump_stream
)
8282 fprintf (loop_dump_stream
, "Reversed loop");
8284 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
8286 fprintf (loop_dump_stream
, "\n");
8297 /* Verify whether the biv BL appears to be eliminable,
8298 based on the insns in the loop that refer to it.
8299 LOOP_START is the first insn of the loop, and END is the end insn.
8301 If ELIMINATE_P is non-zero, actually do the elimination.
8303 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8304 determine whether invariant insns should be placed inside or at the
8305 start of the loop. */
8308 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
8309 struct iv_class
*bl
;
8313 int threshold
, insn_count
;
8315 rtx reg
= bl
->biv
->dest_reg
;
8318 /* Scan all insns in the loop, stopping if we find one that uses the
8319 biv in a way that we cannot eliminate. */
8321 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
8323 enum rtx_code code
= GET_CODE (p
);
8324 rtx where
= threshold
>= insn_count
? loop_start
: p
;
8326 /* If this is a libcall that sets a giv, skip ahead to its end. */
8327 if (GET_RTX_CLASS (code
) == 'i')
8329 rtx note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
8333 rtx last
= XEXP (note
, 0);
8334 rtx set
= single_set (last
);
8336 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
8338 int regno
= REGNO (SET_DEST (set
));
8340 if (regno
< max_reg_before_loop
8341 && REG_IV_TYPE (regno
) == GENERAL_INDUCT
8342 && REG_IV_INFO (regno
)->src_reg
== bl
->biv
->src_reg
)
8347 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
8348 && reg_mentioned_p (reg
, PATTERN (p
))
8349 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
8351 if (loop_dump_stream
)
8352 fprintf (loop_dump_stream
,
8353 "Cannot eliminate biv %d: biv used in insn %d.\n",
8354 bl
->regno
, INSN_UID (p
));
8361 if (loop_dump_stream
)
8362 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
8363 bl
->regno
, eliminate_p
? "was" : "can be");
8370 /* INSN and REFERENCE are instructions in the same insn chain.
8371 Return non-zero if INSN is first. */
8374 loop_insn_first_p (insn
, reference
)
8375 rtx insn
, reference
;
8379 for (p
= insn
, q
= reference
; ;)
8381 /* Start with test for not first so that INSN == REFERENCE yields not
8383 if (q
== insn
|| ! p
)
8385 if (p
== reference
|| ! q
)
8388 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8389 previous insn, hence the <= comparison below does not work if
8391 if (INSN_UID (p
) < max_uid_for_loop
8392 && INSN_UID (q
) < max_uid_for_loop
8393 && GET_CODE (p
) != NOTE
)
8394 return INSN_LUID (p
) <= INSN_LUID (q
);
8396 if (INSN_UID (p
) >= max_uid_for_loop
8397 || GET_CODE (p
) == NOTE
)
8399 if (INSN_UID (q
) >= max_uid_for_loop
)
8404 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8405 the offset that we have to take into account due to auto-increment /
8406 div derivation is zero. */
8408 biv_elimination_giv_has_0_offset (biv
, giv
, insn
)
8409 struct induction
*biv
, *giv
;
8412 /* If the giv V had the auto-inc address optimization applied
8413 to it, and INSN occurs between the giv insn and the biv
8414 insn, then we'd have to adjust the value used here.
8415 This is rare, so we don't bother to make this possible. */
8416 if (giv
->auto_inc_opt
8417 && ((loop_insn_first_p (giv
->insn
, insn
)
8418 && loop_insn_first_p (insn
, biv
->insn
))
8419 || (loop_insn_first_p (biv
->insn
, insn
)
8420 && loop_insn_first_p (insn
, giv
->insn
))))
8423 /* If the giv V was derived from another giv, and INSN does
8424 not occur between the giv insn and the biv insn, then we'd
8425 have to adjust the value used here. This is rare, so we don't
8426 bother to make this possible. */
8427 if (giv
->derived_from
8428 && ! (giv
->always_executed
8429 && loop_insn_first_p (giv
->insn
, insn
)
8430 && loop_insn_first_p (insn
, biv
->insn
)))
8433 && giv
->same
->derived_from
8434 && ! (giv
->same
->always_executed
8435 && loop_insn_first_p (giv
->same
->insn
, insn
)
8436 && loop_insn_first_p (insn
, biv
->insn
)))
8442 /* If BL appears in X (part of the pattern of INSN), see if we can
8443 eliminate its use. If so, return 1. If not, return 0.
8445 If BIV does not appear in X, return 1.
8447 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8448 where extra insns should be added. Depending on how many items have been
8449 moved out of the loop, it will either be before INSN or at the start of
8453 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
8455 struct iv_class
*bl
;
8459 enum rtx_code code
= GET_CODE (x
);
8460 rtx reg
= bl
->biv
->dest_reg
;
8461 enum machine_mode mode
= GET_MODE (reg
);
8462 struct induction
*v
;
8474 /* If we haven't already been able to do something with this BIV,
8475 we can't eliminate it. */
8481 /* If this sets the BIV, it is not a problem. */
8482 if (SET_DEST (x
) == reg
)
8485 /* If this is an insn that defines a giv, it is also ok because
8486 it will go away when the giv is reduced. */
8487 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8488 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
8492 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
8494 /* Can replace with any giv that was reduced and
8495 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8496 Require a constant for MULT_VAL, so we know it's nonzero.
8497 ??? We disable this optimization to avoid potential
8500 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8501 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
8502 && v
->add_val
== const0_rtx
8503 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8507 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8513 /* If the giv has the opposite direction of change,
8514 then reverse the comparison. */
8515 if (INTVAL (v
->mult_val
) < 0)
8516 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
8517 const0_rtx
, v
->new_reg
);
8521 /* We can probably test that giv's reduced reg. */
8522 if (validate_change (insn
, &SET_SRC (x
), new, 0))
8526 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8527 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8528 Require a constant for MULT_VAL, so we know it's nonzero.
8529 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8530 overflow problem. */
8532 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8533 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
8534 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8536 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8537 || GET_CODE (v
->add_val
) == LABEL_REF
8538 || GET_CODE (v
->add_val
) == CONST
8539 || (GET_CODE (v
->add_val
) == REG
8540 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
8542 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8548 /* If the giv has the opposite direction of change,
8549 then reverse the comparison. */
8550 if (INTVAL (v
->mult_val
) < 0)
8551 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
8554 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
8555 copy_rtx (v
->add_val
));
8557 /* Replace biv with the giv's reduced register. */
8558 update_reg_last_use (v
->add_val
, insn
);
8559 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8562 /* Insn doesn't support that constant or invariant. Copy it
8563 into a register (it will be a loop invariant.) */
8564 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
8566 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
8569 /* Substitute the new register for its invariant value in
8570 the compare expression. */
8571 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
8572 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8581 case GT
: case GE
: case GTU
: case GEU
:
8582 case LT
: case LE
: case LTU
: case LEU
:
8583 /* See if either argument is the biv. */
8584 if (XEXP (x
, 0) == reg
)
8585 arg
= XEXP (x
, 1), arg_operand
= 1;
8586 else if (XEXP (x
, 1) == reg
)
8587 arg
= XEXP (x
, 0), arg_operand
= 0;
8591 if (CONSTANT_P (arg
))
8593 /* First try to replace with any giv that has constant positive
8594 mult_val and constant add_val. We might be able to support
8595 negative mult_val, but it seems complex to do it in general. */
8597 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8598 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
8599 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8600 || GET_CODE (v
->add_val
) == LABEL_REF
8601 || GET_CODE (v
->add_val
) == CONST
8602 || (GET_CODE (v
->add_val
) == REG
8603 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
8604 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8607 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8613 /* Replace biv with the giv's reduced reg. */
8614 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
8616 /* If all constants are actually constant integers and
8617 the derived constant can be directly placed in the COMPARE,
8619 if (GET_CODE (arg
) == CONST_INT
8620 && GET_CODE (v
->mult_val
) == CONST_INT
8621 && GET_CODE (v
->add_val
) == CONST_INT
8622 && validate_change (insn
, &XEXP (x
, arg_operand
),
8623 GEN_INT (INTVAL (arg
)
8624 * INTVAL (v
->mult_val
)
8625 + INTVAL (v
->add_val
)), 0))
8628 /* Otherwise, load it into a register. */
8629 tem
= gen_reg_rtx (mode
);
8630 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
8631 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
8634 /* If that failed, put back the change we made above. */
8635 XEXP (x
, 1-arg_operand
) = reg
;
8638 /* Look for giv with positive constant mult_val and nonconst add_val.
8639 Insert insns to calculate new compare value.
8640 ??? Turn this off due to possible overflow. */
8642 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8643 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
8644 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8650 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8656 tem
= gen_reg_rtx (mode
);
8658 /* Replace biv with giv's reduced register. */
8659 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8662 /* Compute value to compare against. */
8663 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
8664 /* Use it in this insn. */
8665 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8666 if (apply_change_group ())
8670 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
8672 if (invariant_p (arg
) == 1)
8674 /* Look for giv with constant positive mult_val and nonconst
8675 add_val. Insert insns to compute new compare value.
8676 ??? Turn this off due to possible overflow. */
8678 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8679 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
8680 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8686 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8692 tem
= gen_reg_rtx (mode
);
8694 /* Replace biv with giv's reduced register. */
8695 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8698 /* Compute value to compare against. */
8699 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
8701 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8702 if (apply_change_group ())
8707 /* This code has problems. Basically, you can't know when
8708 seeing if we will eliminate BL, whether a particular giv
8709 of ARG will be reduced. If it isn't going to be reduced,
8710 we can't eliminate BL. We can try forcing it to be reduced,
8711 but that can generate poor code.
8713 The problem is that the benefit of reducing TV, below should
8714 be increased if BL can actually be eliminated, but this means
8715 we might have to do a topological sort of the order in which
8716 we try to process biv. It doesn't seem worthwhile to do
8717 this sort of thing now. */
8720 /* Otherwise the reg compared with had better be a biv. */
8721 if (GET_CODE (arg
) != REG
8722 || REG_IV_TYPE (REGNO (arg
)) != BASIC_INDUCT
)
8725 /* Look for a pair of givs, one for each biv,
8726 with identical coefficients. */
8727 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8729 struct induction
*tv
;
8731 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
8734 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
8735 if (! tv
->ignore
&& ! tv
->maybe_dead
8736 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
8737 && rtx_equal_p (tv
->add_val
, v
->add_val
)
8738 && tv
->mode
== mode
)
8740 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8746 /* Replace biv with its giv's reduced reg. */
8747 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
8748 /* Replace other operand with the other giv's
8750 XEXP (x
, arg_operand
) = tv
->new_reg
;
8757 /* If we get here, the biv can't be eliminated. */
8761 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8762 biv is used in it, since it will be replaced. */
8763 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8764 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
8772 /* See if any subexpression fails elimination. */
8773 fmt
= GET_RTX_FORMAT (code
);
8774 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8779 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
8780 eliminate_p
, where
))
8785 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8786 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
8787 eliminate_p
, where
))
8796 /* Return nonzero if the last use of REG
8797 is in an insn following INSN in the same basic block. */
8800 last_use_this_basic_block (reg
, insn
)
8806 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
8809 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
8815 /* Called via `note_stores' to record the initial value of a biv. Here we
8816 just record the location of the set and process it later. */
8819 record_initial (dest
, set
)
8823 struct iv_class
*bl
;
8825 if (GET_CODE (dest
) != REG
8826 || REGNO (dest
) >= max_reg_before_loop
8827 || REG_IV_TYPE (REGNO (dest
)) != BASIC_INDUCT
)
8830 bl
= reg_biv_class
[REGNO (dest
)];
8832 /* If this is the first set found, record it. */
8833 if (bl
->init_insn
== 0)
8835 bl
->init_insn
= note_insn
;
8840 /* If any of the registers in X are "old" and currently have a last use earlier
8841 than INSN, update them to have a last use of INSN. Their actual last use
8842 will be the previous insn but it will not have a valid uid_luid so we can't
8846 update_reg_last_use (x
, insn
)
8850 /* Check for the case where INSN does not have a valid luid. In this case,
8851 there is no need to modify the regno_last_uid, as this can only happen
8852 when code is inserted after the loop_end to set a pseudo's final value,
8853 and hence this insn will never be the last use of x. */
8854 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
8855 && INSN_UID (insn
) < max_uid_for_loop
8856 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
8857 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
8861 register const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
8862 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
8865 update_reg_last_use (XEXP (x
, i
), insn
);
8866 else if (fmt
[i
] == 'E')
8867 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8868 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
8873 /* Given a jump insn JUMP, return the condition that will cause it to branch
8874 to its JUMP_LABEL. If the condition cannot be understood, or is an
8875 inequality floating-point comparison which needs to be reversed, 0 will
8878 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8879 insn used in locating the condition was found. If a replacement test
8880 of the condition is desired, it should be placed in front of that
8881 insn and we will be sure that the inputs are still valid.
8883 The condition will be returned in a canonical form to simplify testing by
8884 callers. Specifically:
8886 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8887 (2) Both operands will be machine operands; (cc0) will have been replaced.
8888 (3) If an operand is a constant, it will be the second operand.
8889 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8890 for GE, GEU, and LEU. */
8893 get_condition (jump
, earliest
)
8902 int reverse_code
= 0;
8903 int did_reverse_condition
= 0;
8904 enum machine_mode mode
;
8906 /* If this is not a standard conditional jump, we can't parse it. */
8907 if (GET_CODE (jump
) != JUMP_INSN
8908 || ! condjump_p (jump
) || simplejump_p (jump
))
8911 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
8912 mode
= GET_MODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
8913 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
8914 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
8919 /* If this branches to JUMP_LABEL when the condition is false, reverse
8921 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
8922 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
8923 code
= reverse_condition (code
), did_reverse_condition
^= 1;
8925 /* If we are comparing a register with zero, see if the register is set
8926 in the previous insn to a COMPARE or a comparison operation. Perform
8927 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8930 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
8932 /* Set non-zero when we find something of interest. */
8936 /* If comparison with cc0, import actual comparison from compare
8940 if ((prev
= prev_nonnote_insn (prev
)) == 0
8941 || GET_CODE (prev
) != INSN
8942 || (set
= single_set (prev
)) == 0
8943 || SET_DEST (set
) != cc0_rtx
)
8946 op0
= SET_SRC (set
);
8947 op1
= CONST0_RTX (GET_MODE (op0
));
8953 /* If this is a COMPARE, pick up the two things being compared. */
8954 if (GET_CODE (op0
) == COMPARE
)
8956 op1
= XEXP (op0
, 1);
8957 op0
= XEXP (op0
, 0);
8960 else if (GET_CODE (op0
) != REG
)
8963 /* Go back to the previous insn. Stop if it is not an INSN. We also
8964 stop if it isn't a single set or if it has a REG_INC note because
8965 we don't want to bother dealing with it. */
8967 if ((prev
= prev_nonnote_insn (prev
)) == 0
8968 || GET_CODE (prev
) != INSN
8969 || FIND_REG_INC_NOTE (prev
, 0)
8970 || (set
= single_set (prev
)) == 0)
8973 /* If this is setting OP0, get what it sets it to if it looks
8975 if (rtx_equal_p (SET_DEST (set
), op0
))
8977 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
8979 /* ??? We may not combine comparisons done in a CCmode with
8980 comparisons not done in a CCmode. This is to aid targets
8981 like Alpha that have an IEEE compliant EQ instruction, and
8982 a non-IEEE compliant BEQ instruction. The use of CCmode is
8983 actually artificial, simply to prevent the combination, but
8984 should not affect other platforms.
8986 However, we must allow VOIDmode comparisons to match either
8987 CCmode or non-CCmode comparison, because some ports have
8988 modeless comparisons inside branch patterns.
8990 ??? This mode check should perhaps look more like the mode check
8991 in simplify_comparison in combine. */
8993 if ((GET_CODE (SET_SRC (set
)) == COMPARE
8996 && GET_MODE_CLASS (inner_mode
) == MODE_INT
8997 && (GET_MODE_BITSIZE (inner_mode
)
8998 <= HOST_BITS_PER_WIDE_INT
)
8999 && (STORE_FLAG_VALUE
9000 & ((HOST_WIDE_INT
) 1
9001 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9002 #ifdef FLOAT_STORE_FLAG_VALUE
9004 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9005 && FLOAT_STORE_FLAG_VALUE
< 0)
9008 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
9009 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9010 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9011 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9013 else if (((code
== EQ
9015 && (GET_MODE_BITSIZE (inner_mode
)
9016 <= HOST_BITS_PER_WIDE_INT
)
9017 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9018 && (STORE_FLAG_VALUE
9019 & ((HOST_WIDE_INT
) 1
9020 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9021 #ifdef FLOAT_STORE_FLAG_VALUE
9023 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9024 && FLOAT_STORE_FLAG_VALUE
< 0)
9027 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
9028 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9029 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9030 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9033 /* We might have reversed a LT to get a GE here. But this wasn't
9034 actually the comparison of data, so we don't flag that we
9035 have had to reverse the condition. */
9036 did_reverse_condition
^= 1;
9044 else if (reg_set_p (op0
, prev
))
9045 /* If this sets OP0, but not directly, we have to give up. */
9050 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
9051 code
= GET_CODE (x
);
9054 code
= reverse_condition (code
);
9055 did_reverse_condition
^= 1;
9059 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
9065 /* If constant is first, put it last. */
9066 if (CONSTANT_P (op0
))
9067 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
9069 /* If OP0 is the result of a comparison, we weren't able to find what
9070 was really being compared, so fail. */
9071 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
9074 /* Canonicalize any ordered comparison with integers involving equality
9075 if we can do computations in the relevant mode and we do not
9078 if (GET_CODE (op1
) == CONST_INT
9079 && GET_MODE (op0
) != VOIDmode
9080 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
9082 HOST_WIDE_INT const_val
= INTVAL (op1
);
9083 unsigned HOST_WIDE_INT uconst_val
= const_val
;
9084 unsigned HOST_WIDE_INT max_val
9085 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
9090 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
9091 code
= LT
, op1
= GEN_INT (const_val
+ 1);
9094 /* When cross-compiling, const_val might be sign-extended from
9095 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9097 if ((HOST_WIDE_INT
) (const_val
& max_val
)
9098 != (((HOST_WIDE_INT
) 1
9099 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
9100 code
= GT
, op1
= GEN_INT (const_val
- 1);
9104 if (uconst_val
< max_val
)
9105 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
9109 if (uconst_val
!= 0)
9110 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
9118 /* If this was floating-point and we reversed anything other than an
9119 EQ or NE, return zero. */
9120 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
9121 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
9123 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
9127 /* Never return CC0; return zero instead. */
9132 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
9135 /* Similar to above routine, except that we also put an invariant last
9136 unless both operands are invariants. */
9139 get_condition_for_loop (x
)
9142 rtx comparison
= get_condition (x
, NULL_PTR
);
9145 || ! invariant_p (XEXP (comparison
, 0))
9146 || invariant_p (XEXP (comparison
, 1)))
9149 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
9150 XEXP (comparison
, 1), XEXP (comparison
, 0));
9153 #ifdef HAVE_decrement_and_branch_on_count
9154 /* Instrument loop for insertion of bct instruction. We distinguish between
9155 loops with compile-time bounds and those with run-time bounds.
9156 Information from loop_iterations() is used to compute compile-time bounds.
9157 Run-time bounds should use loop preconditioning, but currently ignored.
9161 insert_bct (loop_start
, loop_end
, loop_info
)
9162 rtx loop_start
, loop_end
;
9163 struct loop_info
*loop_info
;
9166 unsigned HOST_WIDE_INT n_iterations
;
9168 int increment_direction
, compare_direction
;
9170 /* If the loop condition is <= or >=, the number of iteration
9171 is 1 more than the range of the bounds of the loop. */
9172 int add_iteration
= 0;
9174 enum machine_mode loop_var_mode
= word_mode
;
9176 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
9178 /* It's impossible to instrument a competely unrolled loop. */
9179 if (loop_info
->unroll_number
== loop_info
->n_iterations
)
9182 /* Make sure that the count register is not in use. */
9183 if (loop_used_count_register
[loop_num
])
9185 if (loop_dump_stream
)
9186 fprintf (loop_dump_stream
,
9187 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9192 /* Make sure that the function has no indirect jumps. */
9193 if (indirect_jump_in_function
)
9195 if (loop_dump_stream
)
9196 fprintf (loop_dump_stream
,
9197 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9202 /* Make sure that the last loop insn is a conditional jump. */
9203 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
9204 || ! condjump_p (PREV_INSN (loop_end
))
9205 || simplejump_p (PREV_INSN (loop_end
)))
9207 if (loop_dump_stream
)
9208 fprintf (loop_dump_stream
,
9209 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9214 /* Make sure that the loop does not contain a function call
9215 (the count register might be altered by the called function). */
9216 if (loop_info
->has_call
)
9218 if (loop_dump_stream
)
9219 fprintf (loop_dump_stream
,
9220 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9225 /* Make sure that the loop does not jump via a table.
9226 (the count register might be used to perform the branch on table). */
9227 if (loop_info
->has_tablejump
)
9229 if (loop_dump_stream
)
9230 fprintf (loop_dump_stream
,
9231 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9236 /* Account for loop unrolling in instrumented iteration count. */
9237 if (loop_info
->unroll_number
> 1)
9238 n_iterations
= loop_info
->n_iterations
/ loop_info
->unroll_number
;
9240 n_iterations
= loop_info
->n_iterations
;
9242 if (n_iterations
!= 0 && n_iterations
< 3)
9244 /* Allow an enclosing outer loop to benefit if possible. */
9245 if (loop_dump_stream
)
9246 fprintf (loop_dump_stream
,
9247 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9252 /* Try to instrument the loop. */
9254 /* Handle the simpler case, where the bounds are known at compile time. */
9255 if (n_iterations
> 0)
9257 /* Mark all enclosing loops that they cannot use count register. */
9258 for (i
= loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
9259 loop_used_count_register
[i
] = 1;
9260 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
9264 /* Handle the more complex case, that the bounds are NOT known
9265 at compile time. In this case we generate run_time calculation
9266 of the number of iterations. */
9268 if (loop_info
->iteration_var
== 0)
9270 if (loop_dump_stream
)
9271 fprintf (loop_dump_stream
,
9272 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9277 if (GET_MODE_CLASS (GET_MODE (loop_info
->iteration_var
)) != MODE_INT
9278 || GET_MODE_SIZE (GET_MODE (loop_info
->iteration_var
)) != UNITS_PER_WORD
)
9280 if (loop_dump_stream
)
9281 fprintf (loop_dump_stream
,
9282 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9287 /* With runtime bounds, if the compare is of the form '!=' we give up */
9288 if (loop_info
->comparison_code
== NE
)
9290 if (loop_dump_stream
)
9291 fprintf (loop_dump_stream
,
9292 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9296 /* Use common loop preconditioning code instead. */
9300 /* We rely on the existence of run-time guard to ensure that the
9301 loop executes at least once. */
9303 rtx iterations_num_reg
;
9305 unsigned HOST_WIDE_INT increment_value_abs
9306 = INTVAL (increment
) * increment_direction
;
9308 /* make sure that the increment is a power of two, otherwise (an
9309 expensive) divide is needed. */
9310 if (exact_log2 (increment_value_abs
) == -1)
9312 if (loop_dump_stream
)
9313 fprintf (loop_dump_stream
,
9314 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9318 /* compute the number of iterations */
9323 /* Again, the number of iterations is calculated by:
9325 ; compare-val - initial-val + (increment -1) + additional-iteration
9326 ; num_iterations = -----------------------------------------------------------------
9329 /* ??? Do we have to call copy_rtx here before passing rtx to
9331 if (compare_direction
> 0)
9333 /* <, <= :the loop variable is increasing */
9334 temp_reg
= expand_binop (loop_var_mode
, sub_optab
,
9335 comparison_value
, initial_value
,
9336 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9340 temp_reg
= expand_binop (loop_var_mode
, sub_optab
,
9341 initial_value
, comparison_value
,
9342 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9345 if (increment_value_abs
- 1 + add_iteration
!= 0)
9346 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
9347 GEN_INT (increment_value_abs
- 1
9349 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9351 if (increment_value_abs
!= 1)
9352 iterations_num_reg
= expand_binop (loop_var_mode
, asr_optab
,
9354 GEN_INT (exact_log2 (increment_value_abs
)),
9355 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9357 iterations_num_reg
= temp_reg
;
9359 sequence
= gen_sequence ();
9361 emit_insn_before (sequence
, loop_start
);
9362 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
9366 #endif /* Complex case */
9369 /* Instrument loop by inserting a bct in it as follows:
9370 1. A new counter register is created.
9371 2. In the head of the loop the new variable is initialized to the value
9372 passed in the loop_num_iterations parameter.
9373 3. At the end of the loop, comparison of the register with 0 is generated.
9374 The created comparison follows the pattern defined for the
9375 decrement_and_branch_on_count insn, so this insn will be generated.
9376 4. The branch on the old variable are deleted. The compare must remain
9377 because it might be used elsewhere. If the loop-variable or condition
9378 register are used elsewhere, they will be eliminated by flow. */
9381 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
9382 rtx loop_start
, loop_end
;
9383 rtx loop_num_iterations
;
9389 if (HAVE_decrement_and_branch_on_count
)
9391 if (loop_dump_stream
)
9393 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream
);
9394 if (GET_CODE (loop_num_iterations
) == CONST_INT
)
9395 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
,
9396 INTVAL (loop_num_iterations
));
9398 fputs ("runtime", loop_dump_stream
);
9399 fputs (" iterations)", loop_dump_stream
);
9402 /* Discard original jump to continue loop. Original compare result
9403 may still be live, so it cannot be discarded explicitly. */
9404 delete_insn (PREV_INSN (loop_end
));
9406 /* Insert the label which will delimit the start of the loop. */
9407 start_label
= gen_label_rtx ();
9408 emit_label_after (start_label
, loop_start
);
9410 /* Insert initialization of the count register into the loop header. */
9412 counter_reg
= gen_reg_rtx (word_mode
);
9413 emit_insn (gen_move_insn (counter_reg
, loop_num_iterations
));
9414 sequence
= gen_sequence ();
9416 emit_insn_before (sequence
, loop_start
);
9418 /* Insert new comparison on the count register instead of the
9419 old one, generating the needed BCT pattern (that will be
9420 later recognized by assembly generation phase). */
9421 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg
,
9424 LABEL_NUSES (start_label
)++;
9428 #endif /* HAVE_decrement_and_branch_on_count */
9430 /* Scan the function and determine whether it has indirect (computed) jumps.
9432 This is taken mostly from flow.c; similar code exists elsewhere
9433 in the compiler. It may be useful to put this into rtlanal.c. */
9435 indirect_jump_in_function_p (start
)
9440 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
9441 if (computed_jump_p (insn
))
9447 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9448 documentation for LOOP_MEMS for the definition of `appropriate'.
9449 This function is called from prescan_loop via for_each_rtx. */
9452 insert_loop_mem (mem
, data
)
9454 void *data ATTRIBUTE_UNUSED
;
9462 switch (GET_CODE (m
))
9468 /* We're not interested in the MEM associated with a
9469 CONST_DOUBLE, so there's no need to traverse into this. */
9473 /* This is not a MEM. */
9477 /* See if we've already seen this MEM. */
9478 for (i
= 0; i
< loop_mems_idx
; ++i
)
9479 if (rtx_equal_p (m
, loop_mems
[i
].mem
))
9481 if (GET_MODE (m
) != GET_MODE (loop_mems
[i
].mem
))
9482 /* The modes of the two memory accesses are different. If
9483 this happens, something tricky is going on, and we just
9484 don't optimize accesses to this MEM. */
9485 loop_mems
[i
].optimize
= 0;
9490 /* Resize the array, if necessary. */
9491 if (loop_mems_idx
== loop_mems_allocated
)
9493 if (loop_mems_allocated
!= 0)
9494 loop_mems_allocated
*= 2;
9496 loop_mems_allocated
= 32;
9498 loop_mems
= (loop_mem_info
*)
9499 xrealloc (loop_mems
,
9500 loop_mems_allocated
* sizeof (loop_mem_info
));
9503 /* Actually insert the MEM. */
9504 loop_mems
[loop_mems_idx
].mem
= m
;
9505 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9506 because we can't put it in a register. We still store it in the
9507 table, though, so that if we see the same address later, but in a
9508 non-BLK mode, we'll not think we can optimize it at that point. */
9509 loop_mems
[loop_mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
9510 loop_mems
[loop_mems_idx
].reg
= NULL_RTX
;
9516 /* Like load_mems, but also ensures that SET_IN_LOOP,
9517 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9518 values after load_mems. */
9521 load_mems_and_recount_loop_regs_set (scan_start
, end
, loop_top
, start
,
9529 int nregs
= max_reg_num ();
9531 load_mems (scan_start
, end
, loop_top
, start
);
9533 /* Recalculate set_in_loop and friends since load_mems may have
9534 created new registers. */
9535 if (max_reg_num () > nregs
)
9541 nregs
= max_reg_num ();
9543 if ((unsigned) nregs
> set_in_loop
->num_elements
)
9545 /* Grow all the arrays. */
9546 VARRAY_GROW (set_in_loop
, nregs
);
9547 VARRAY_GROW (n_times_set
, nregs
);
9548 VARRAY_GROW (may_not_optimize
, nregs
);
9549 VARRAY_GROW (reg_single_usage
, nregs
);
9551 /* Clear the arrays */
9552 bzero ((char *) &set_in_loop
->data
, nregs
* sizeof (int));
9553 bzero ((char *) &may_not_optimize
->data
, nregs
* sizeof (char));
9554 bzero ((char *) ®_single_usage
->data
, nregs
* sizeof (rtx
));
9556 count_loop_regs_set (loop_top
? loop_top
: start
, end
,
9557 may_not_optimize
, reg_single_usage
,
9560 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
9562 VARRAY_CHAR (may_not_optimize
, i
) = 1;
9563 VARRAY_INT (set_in_loop
, i
) = 1;
9566 #ifdef AVOID_CCMODE_COPIES
9567 /* Don't try to move insns which set CC registers if we should not
9568 create CCmode register copies. */
9569 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
9570 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
9571 VARRAY_CHAR (may_not_optimize
, i
) = 1;
9574 /* Set n_times_set for the new registers. */
9575 bcopy ((char *) (&set_in_loop
->data
.i
[0] + old_nregs
),
9576 (char *) (&n_times_set
->data
.i
[0] + old_nregs
),
9577 (nregs
- old_nregs
) * sizeof (int));
9581 /* Move MEMs into registers for the duration of the loop. SCAN_START
9582 is the first instruction in the loop (as it is executed). The
9583 other parameters are as for next_insn_in_loop. */
9586 load_mems (scan_start
, end
, loop_top
, start
)
9592 int maybe_never
= 0;
9595 rtx label
= NULL_RTX
;
9596 rtx end_label
= NULL_RTX
;
9598 if (loop_mems_idx
> 0)
9600 /* Nonzero if the next instruction may never be executed. */
9601 int next_maybe_never
= 0;
9603 /* Check to see if it's possible that some instructions in the
9604 loop are never executed. */
9605 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
9606 p
!= NULL_RTX
&& !maybe_never
;
9607 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
9609 if (GET_CODE (p
) == CODE_LABEL
)
9611 else if (GET_CODE (p
) == JUMP_INSN
9612 /* If we enter the loop in the middle, and scan
9613 around to the beginning, don't set maybe_never
9614 for that. This must be an unconditional jump,
9615 otherwise the code at the top of the loop might
9616 never be executed. Unconditional jumps are
9617 followed a by barrier then loop end. */
9618 && ! (GET_CODE (p
) == JUMP_INSN
9619 && JUMP_LABEL (p
) == loop_top
9620 && NEXT_INSN (NEXT_INSN (p
)) == end
9621 && simplejump_p (p
)))
9623 if (!condjump_p (p
))
9624 /* Something complicated. */
9627 /* If there are any more instructions in the loop, they
9628 might not be reached. */
9629 next_maybe_never
= 1;
9631 else if (next_maybe_never
)
9635 /* Actually move the MEMs. */
9636 for (i
= 0; i
< loop_mems_idx
; ++i
)
9640 rtx mem
= loop_mems
[i
].mem
;
9643 if (MEM_VOLATILE_P (mem
)
9644 || invariant_p (XEXP (mem
, 0)) != 1)
9645 /* There's no telling whether or not MEM is modified. */
9646 loop_mems
[i
].optimize
= 0;
9648 /* Go through the MEMs written to in the loop to see if this
9649 one is aliased by one of them. */
9650 mem_list_entry
= loop_store_mems
;
9651 while (mem_list_entry
)
9653 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
9655 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
9658 /* MEM is indeed aliased by this store. */
9659 loop_mems
[i
].optimize
= 0;
9662 mem_list_entry
= XEXP (mem_list_entry
, 1);
9665 /* If this MEM is written to, we must be sure that there
9666 are no reads from another MEM that aliases this one. */
9667 if (loop_mems
[i
].optimize
&& written
)
9671 for (j
= 0; j
< loop_mems_idx
; ++j
)
9675 else if (true_dependence (mem
,
9680 /* It's not safe to hoist loop_mems[i] out of
9681 the loop because writes to it might not be
9682 seen by reads from loop_mems[j]. */
9683 loop_mems
[i
].optimize
= 0;
9689 if (maybe_never
&& may_trap_p (mem
))
9690 /* We can't access the MEM outside the loop; it might
9691 cause a trap that wouldn't have happened otherwise. */
9692 loop_mems
[i
].optimize
= 0;
9694 if (!loop_mems
[i
].optimize
)
9695 /* We thought we were going to lift this MEM out of the
9696 loop, but later discovered that we could not. */
9699 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9700 order to keep scan_loop from moving stores to this MEM
9701 out of the loop just because this REG is neither a
9702 user-variable nor used in the loop test. */
9703 reg
= gen_reg_rtx (GET_MODE (mem
));
9704 REG_USERVAR_P (reg
) = 1;
9705 loop_mems
[i
].reg
= reg
;
9707 /* Now, replace all references to the MEM with the
9708 corresponding pesudos. */
9709 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
9711 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
9716 for_each_rtx (&p
, replace_loop_mem
, &ri
);
9719 if (!apply_change_group ())
9720 /* We couldn't replace all occurrences of the MEM. */
9721 loop_mems
[i
].optimize
= 0;
9726 /* Load the memory immediately before START, which is
9727 the NOTE_LOOP_BEG. */
9728 set
= gen_move_insn (reg
, mem
);
9729 emit_insn_before (set
, start
);
9733 if (label
== NULL_RTX
)
9735 /* We must compute the former
9736 right-after-the-end label before we insert
9738 end_label
= next_label (end
);
9739 label
= gen_label_rtx ();
9740 emit_label_after (label
, end
);
9743 /* Store the memory immediately after END, which is
9744 the NOTE_LOOP_END. */
9745 set
= gen_move_insn (copy_rtx (mem
), reg
);
9746 emit_insn_after (set
, label
);
9749 if (loop_dump_stream
)
9751 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
9752 REGNO (reg
), (written
? "r/w" : "r/o"));
9753 print_rtl (loop_dump_stream
, mem
);
9754 fputc ('\n', loop_dump_stream
);
9760 if (label
!= NULL_RTX
)
9762 /* Now, we need to replace all references to the previous exit
9763 label with the new one. */
9768 for (p
= start
; p
!= end
; p
= NEXT_INSN (p
))
9770 for_each_rtx (&p
, replace_label
, &rr
);
9772 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9773 field. This is not handled by for_each_rtx because it doesn't
9774 handle unprinted ('0') fields. We need to update JUMP_LABEL
9775 because the immediately following unroll pass will use it.
9776 replace_label would not work anyways, because that only handles
9778 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
9779 JUMP_LABEL (p
) = label
;
9784 /* Replace MEM with its associated pseudo register. This function is
9785 called from load_mems via for_each_rtx. DATA is actually an
9786 rtx_and_int * describing the instruction currently being scanned
9787 and the MEM we are currently replacing. */
9790 replace_loop_mem (mem
, data
)
9802 switch (GET_CODE (m
))
9808 /* We're not interested in the MEM associated with a
9809 CONST_DOUBLE, so there's no need to traverse into one. */
9813 /* This is not a MEM. */
9817 ri
= (rtx_and_int
*) data
;
9820 if (!rtx_equal_p (loop_mems
[i
].mem
, m
))
9821 /* This is not the MEM we are currently replacing. */
9826 /* Actually replace the MEM. */
9827 validate_change (insn
, mem
, loop_mems
[i
].reg
, 1);
9832 /* Replace occurrences of the old exit label for the loop with the new
9833 one. DATA is an rtx_pair containing the old and new labels,
9837 replace_label (x
, data
)
9842 rtx old_label
= ((rtx_pair
*) data
)->r1
;
9843 rtx new_label
= ((rtx_pair
*) data
)->r2
;
9848 if (GET_CODE (l
) != LABEL_REF
)
9851 if (XEXP (l
, 0) != old_label
)
9854 XEXP (l
, 0) = new_label
;
9855 ++LABEL_NUSES (new_label
);
9856 --LABEL_NUSES (old_label
);