1 /* Verify that overloaded built-ins for vec_extract() with short
2 inputs produce the right code for a P7 (BE) target. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_vsx_ok } */
6 /* { dg-options "-mdejagnu-cpu=power7 -O2" } */
8 // six tests total. Targeting P7 BE.
9 // p7 (be) vars: li, addi, stxvw4x, rldic, addi, lhax/lhzx
10 // P7 (be) constants: li, addi, stxvw4x, lha/lhz
12 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
13 /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
14 /* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
15 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
16 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */
17 /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */
22 testbi_cst (vector
bool short vbs2
)
24 return vec_extract (vbs2
, 12);
28 testsi_cst (vector
signed short vss2
)
30 return vec_extract (vss2
, 12);
34 testui_cst12 (vector
unsigned short vus2
)
36 return vec_extract (vus2
, 12);
40 testbi_var (vector
bool short vbs2
, signed int si
)
42 return vec_extract (vbs2
, si
);
46 testsi_var (vector
signed short vss2
, signed int si
)
48 return vec_extract (vss2
, si
);
52 testui_var (vector
unsigned short vus2
, signed int si
)
54 return vec_extract (vus2
, si
);