1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with CHECKING_P, since it is awfully slow. */
93 #include "coretypes.h"
105 #include "rtl-error.h"
107 #include "addresses.h"
110 /* True if X is a constant that can be forced into the constant pool.
111 MODE is the mode of the operand, or VOIDmode if not known. */
112 #define CONST_POOL_OK_P(MODE, X) \
113 ((MODE) != VOIDmode \
115 && GET_CODE (X) != HIGH \
116 && !targetm.cannot_force_const_mem (MODE, X))
118 /* True if C is a non-empty register class that has too few registers
119 to be safely used as a reload target class. */
122 small_register_class_p (reg_class_t rclass
)
124 return (reg_class_size
[(int) rclass
] == 1
125 || (reg_class_size
[(int) rclass
] >= 1
126 && targetm
.class_likely_spilled_p (rclass
)));
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld
[MAX_RELOADS
];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
140 int reload_n_operands
;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads
;
152 /* Each replacement is recorded with a structure like this. */
155 rtx
*where
; /* Location to store in */
156 int what
; /* which reload this is for */
157 machine_mode mode
; /* mode it must have */
160 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
162 /* Number of replacements currently recorded. */
163 static int n_replacements
;
165 /* Used to track what is modified by an operand. */
168 int reg_flag
; /* Nonzero if referencing a register. */
169 int safe
; /* Nonzero if this can't conflict with anything. */
170 rtx base
; /* Base address for MEM. */
171 HOST_WIDE_INT start
; /* Starting offset or register number. */
172 HOST_WIDE_INT end
; /* Ending offset or register number. */
175 #ifdef SECONDARY_MEMORY_NEEDED
177 /* Save MEMs needed to copy from one class of registers to another. One MEM
178 is used per mode, but normally only one or two modes are ever used.
180 We keep two versions, before and after register elimination. The one
181 after register elimination is record separately for each operand. This
182 is done in case the address is not valid to be sure that we separately
185 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
186 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
187 static int secondary_memlocs_elim_used
= 0;
190 /* The instruction we are doing reloads for;
191 so we can test whether a register dies in it. */
192 static rtx_insn
*this_insn
;
194 /* Nonzero if this instruction is a user-specified asm with operands. */
195 static int this_insn_is_asm
;
197 /* If hard_regs_live_known is nonzero,
198 we can tell which hard regs are currently live,
199 at least enough to succeed in choosing dummy reloads. */
200 static int hard_regs_live_known
;
202 /* Indexed by hard reg number,
203 element is nonnegative if hard reg has been spilled.
204 This vector is passed to `find_reloads' as an argument
205 and is not changed here. */
206 static short *static_reload_reg_p
;
208 /* Set to 1 in subst_reg_equivs if it changes anything. */
209 static int subst_reg_equivs_changed
;
211 /* On return from push_reload, holds the reload-number for the OUT
212 operand, which can be different for that from the input operand. */
213 static int output_reloadnum
;
215 /* Compare two RTX's. */
216 #define MATCHES(x, y) \
217 (x == y || (x != 0 && (REG_P (x) \
218 ? REG_P (y) && REGNO (x) == REGNO (y) \
219 : rtx_equal_p (x, y) && ! side_effects_p (x))))
221 /* Indicates if two reloads purposes are for similar enough things that we
222 can merge their reloads. */
223 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
224 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
225 || ((when1) == (when2) && (op1) == (op2)) \
226 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
227 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
228 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
229 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
230 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
232 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
233 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
234 ((when1) != (when2) \
235 || ! ((op1) == (op2) \
236 || (when1) == RELOAD_FOR_INPUT \
237 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
238 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
240 /* If we are going to reload an address, compute the reload type to
242 #define ADDR_TYPE(type) \
243 ((type) == RELOAD_FOR_INPUT_ADDRESS \
244 ? RELOAD_FOR_INPADDR_ADDRESS \
245 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
246 ? RELOAD_FOR_OUTADDR_ADDRESS \
249 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
250 machine_mode
, enum reload_type
,
251 enum insn_code
*, secondary_reload_info
*);
252 static enum reg_class
find_valid_class (machine_mode
, machine_mode
,
254 static void push_replacement (rtx
*, int, machine_mode
);
255 static void dup_replacements (rtx
*, rtx
*);
256 static void combine_reloads (void);
257 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
258 enum reload_type
, int, int);
259 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, machine_mode
,
260 machine_mode
, reg_class_t
, int, int);
261 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
262 static struct decomposition
decompose (rtx
);
263 static int immune_p (rtx
, rtx
, struct decomposition
);
264 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
265 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int,
267 static rtx
make_memloc (rtx
, int);
268 static int maybe_memory_address_addr_space_p (machine_mode
, rtx
,
269 addr_space_t
, rtx
*);
270 static int find_reloads_address (machine_mode
, rtx
*, rtx
, rtx
*,
271 int, enum reload_type
, int, rtx_insn
*);
272 static rtx
subst_reg_equivs (rtx
, rtx_insn
*);
273 static rtx
subst_indexed_address (rtx
);
274 static void update_auto_inc_notes (rtx_insn
*, int, int);
275 static int find_reloads_address_1 (machine_mode
, addr_space_t
, rtx
, int,
276 enum rtx_code
, enum rtx_code
, rtx
*,
277 int, enum reload_type
,int, rtx_insn
*);
278 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
280 enum reload_type
, int);
281 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
282 int, rtx_insn
*, int *);
283 static void copy_replacements_1 (rtx
*, rtx
*, int);
284 static int find_inc_amount (rtx
, rtx
);
285 static int refers_to_mem_for_reload_p (rtx
);
286 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
289 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
293 push_reg_equiv_alt_mem (int regno
, rtx mem
)
297 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
298 if (rtx_equal_p (XEXP (it
, 0), mem
))
301 reg_equiv_alt_mem_list (regno
)
302 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
303 reg_equiv_alt_mem_list (regno
));
306 /* Determine if any secondary reloads are needed for loading (if IN_P is
307 nonzero) or storing (if IN_P is zero) X to or from a reload register of
308 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
309 are needed, push them.
311 Return the reload number of the secondary reload we made, or -1 if
312 we didn't need one. *PICODE is set to the insn_code to use if we do
313 need a secondary reload. */
316 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
317 enum reg_class reload_class
,
318 machine_mode reload_mode
, enum reload_type type
,
319 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
321 enum reg_class rclass
= NO_REGS
;
322 enum reg_class scratch_class
;
323 machine_mode mode
= reload_mode
;
324 enum insn_code icode
= CODE_FOR_nothing
;
325 enum insn_code t_icode
= CODE_FOR_nothing
;
326 enum reload_type secondary_type
;
327 int s_reload
, t_reload
= -1;
328 const char *scratch_constraint
;
329 secondary_reload_info sri
;
331 if (type
== RELOAD_FOR_INPUT_ADDRESS
332 || type
== RELOAD_FOR_OUTPUT_ADDRESS
333 || type
== RELOAD_FOR_INPADDR_ADDRESS
334 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
335 secondary_type
= type
;
337 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
339 *picode
= CODE_FOR_nothing
;
341 /* If X is a paradoxical SUBREG, use the inner value to determine both the
342 mode and object being reloaded. */
343 if (paradoxical_subreg_p (x
))
346 reload_mode
= GET_MODE (x
);
349 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
350 is still a pseudo-register by now, it *must* have an equivalent MEM
351 but we don't want to assume that), use that equivalent when seeing if
352 a secondary reload is needed since whether or not a reload is needed
353 might be sensitive to the form of the MEM. */
355 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
356 && reg_equiv_mem (REGNO (x
)))
357 x
= reg_equiv_mem (REGNO (x
));
359 sri
.icode
= CODE_FOR_nothing
;
360 sri
.prev_sri
= prev_sri
;
361 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
363 icode
= (enum insn_code
) sri
.icode
;
365 /* If we don't need any secondary registers, done. */
366 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
369 if (rclass
!= NO_REGS
)
370 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
371 reload_mode
, type
, &t_icode
, &sri
);
373 /* If we will be using an insn, the secondary reload is for a
376 if (icode
!= CODE_FOR_nothing
)
378 /* If IN_P is nonzero, the reload register will be the output in
379 operand 0. If IN_P is zero, the reload register will be the input
380 in operand 1. Outputs should have an initial "=", which we must
383 /* ??? It would be useful to be able to handle only two, or more than
384 three, operands, but for now we can only handle the case of having
385 exactly three: output, input and one temp/scratch. */
386 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
388 /* ??? We currently have no way to represent a reload that needs
389 an icode to reload from an intermediate tertiary reload register.
390 We should probably have a new field in struct reload to tag a
391 chain of scratch operand reloads onto. */
392 gcc_assert (rclass
== NO_REGS
);
394 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
395 gcc_assert (*scratch_constraint
== '=');
396 scratch_constraint
++;
397 if (*scratch_constraint
== '&')
398 scratch_constraint
++;
399 scratch_class
= (reg_class_for_constraint
400 (lookup_constraint (scratch_constraint
)));
402 rclass
= scratch_class
;
403 mode
= insn_data
[(int) icode
].operand
[2].mode
;
406 /* This case isn't valid, so fail. Reload is allowed to use the same
407 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
408 in the case of a secondary register, we actually need two different
409 registers for correct code. We fail here to prevent the possibility of
410 silently generating incorrect code later.
412 The convention is that secondary input reloads are valid only if the
413 secondary_class is different from class. If you have such a case, you
414 can not use secondary reloads, you must work around the problem some
417 Allow this when a reload_in/out pattern is being used. I.e. assume
418 that the generated code handles this case. */
420 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
421 || t_icode
!= CODE_FOR_nothing
);
423 /* See if we can reuse an existing secondary reload. */
424 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
425 if (rld
[s_reload
].secondary_p
426 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
427 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
428 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
429 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
430 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
431 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
432 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
433 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
434 && (small_register_class_p (rclass
)
435 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
436 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
437 opnum
, rld
[s_reload
].opnum
))
440 rld
[s_reload
].inmode
= mode
;
442 rld
[s_reload
].outmode
= mode
;
444 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
445 rld
[s_reload
].rclass
= rclass
;
447 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
448 rld
[s_reload
].optional
&= optional
;
449 rld
[s_reload
].secondary_p
= 1;
450 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
451 opnum
, rld
[s_reload
].opnum
))
452 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
457 if (s_reload
== n_reloads
)
459 #ifdef SECONDARY_MEMORY_NEEDED
460 /* If we need a memory location to copy between the two reload regs,
461 set it up now. Note that we do the input case before making
462 the reload and the output case after. This is due to the
463 way reloads are output. */
465 if (in_p
&& icode
== CODE_FOR_nothing
466 && SECONDARY_MEMORY_NEEDED (rclass
, reload_class
, mode
))
468 get_secondary_mem (x
, reload_mode
, opnum
, type
);
470 /* We may have just added new reloads. Make sure we add
471 the new reload at the end. */
472 s_reload
= n_reloads
;
476 /* We need to make a new secondary reload for this register class. */
477 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
478 rld
[s_reload
].rclass
= rclass
;
480 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
481 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
482 rld
[s_reload
].reg_rtx
= 0;
483 rld
[s_reload
].optional
= optional
;
484 rld
[s_reload
].inc
= 0;
485 /* Maybe we could combine these, but it seems too tricky. */
486 rld
[s_reload
].nocombine
= 1;
487 rld
[s_reload
].in_reg
= 0;
488 rld
[s_reload
].out_reg
= 0;
489 rld
[s_reload
].opnum
= opnum
;
490 rld
[s_reload
].when_needed
= secondary_type
;
491 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
492 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
493 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
494 rld
[s_reload
].secondary_out_icode
495 = ! in_p
? t_icode
: CODE_FOR_nothing
;
496 rld
[s_reload
].secondary_p
= 1;
500 #ifdef SECONDARY_MEMORY_NEEDED
501 if (! in_p
&& icode
== CODE_FOR_nothing
502 && SECONDARY_MEMORY_NEEDED (reload_class
, rclass
, mode
))
503 get_secondary_mem (x
, mode
, opnum
, type
);
511 /* If a secondary reload is needed, return its class. If both an intermediate
512 register and a scratch register is needed, we return the class of the
513 intermediate register. */
515 secondary_reload_class (bool in_p
, reg_class_t rclass
, machine_mode mode
,
518 enum insn_code icode
;
519 secondary_reload_info sri
;
521 sri
.icode
= CODE_FOR_nothing
;
524 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
525 icode
= (enum insn_code
) sri
.icode
;
527 /* If there are no secondary reloads at all, we return NO_REGS.
528 If an intermediate register is needed, we return its class. */
529 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
532 /* No intermediate register is needed, but we have a special reload
533 pattern, which we assume for now needs a scratch register. */
534 return scratch_reload_class (icode
);
537 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
538 three operands, verify that operand 2 is an output operand, and return
540 ??? We'd like to be able to handle any pattern with at least 2 operands,
541 for zero or more scratch registers, but that needs more infrastructure. */
543 scratch_reload_class (enum insn_code icode
)
545 const char *scratch_constraint
;
546 enum reg_class rclass
;
548 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
549 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
550 gcc_assert (*scratch_constraint
== '=');
551 scratch_constraint
++;
552 if (*scratch_constraint
== '&')
553 scratch_constraint
++;
554 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
555 gcc_assert (rclass
!= NO_REGS
);
559 #ifdef SECONDARY_MEMORY_NEEDED
561 /* Return a memory location that will be used to copy X in mode MODE.
562 If we haven't already made a location for this mode in this insn,
563 call find_reloads_address on the location being returned. */
566 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, machine_mode mode
,
567 int opnum
, enum reload_type type
)
572 /* By default, if MODE is narrower than a word, widen it to a word.
573 This is required because most machines that require these memory
574 locations do not support short load and stores from all registers
575 (e.g., FP registers). */
577 #ifdef SECONDARY_MEMORY_NEEDED_MODE
578 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
580 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
581 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
584 /* If we already have made a MEM for this operand in MODE, return it. */
585 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
586 return secondary_memlocs_elim
[(int) mode
][opnum
];
588 /* If this is the first time we've tried to get a MEM for this mode,
589 allocate a new one. `something_changed' in reload will get set
590 by noticing that the frame size has changed. */
592 if (secondary_memlocs
[(int) mode
] == 0)
594 #ifdef SECONDARY_MEMORY_NEEDED_RTX
595 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
597 secondary_memlocs
[(int) mode
]
598 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
602 /* Get a version of the address doing any eliminations needed. If that
603 didn't give us a new MEM, make a new one if it isn't valid. */
605 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
606 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
607 MEM_ADDR_SPACE (loc
));
609 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
610 loc
= copy_rtx (loc
);
612 /* The only time the call below will do anything is if the stack
613 offset is too large. In that case IND_LEVELS doesn't matter, so we
614 can just pass a zero. Adjust the type to be the address of the
615 corresponding object. If the address was valid, save the eliminated
616 address. If it wasn't valid, we need to make a reload each time, so
621 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
622 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
625 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
629 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
630 if (secondary_memlocs_elim_used
<= (int)mode
)
631 secondary_memlocs_elim_used
= (int)mode
+ 1;
635 /* Clear any secondary memory locations we've made. */
638 clear_secondary_mem (void)
640 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
642 #endif /* SECONDARY_MEMORY_NEEDED */
645 /* Find the largest class which has at least one register valid in
646 mode INNER, and which for every such register, that register number
647 plus N is also valid in OUTER (if in range) and is cheap to move
648 into REGNO. Such a class must exist. */
650 static enum reg_class
651 find_valid_class (machine_mode outer ATTRIBUTE_UNUSED
,
652 machine_mode inner ATTRIBUTE_UNUSED
, int n
,
653 unsigned int dest_regno ATTRIBUTE_UNUSED
)
658 enum reg_class best_class
= NO_REGS
;
659 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
660 unsigned int best_size
= 0;
663 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
667 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
668 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
670 if (targetm
.hard_regno_mode_ok (regno
, inner
))
673 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
674 && !targetm
.hard_regno_mode_ok (regno
+ n
, outer
))
681 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
683 if ((reg_class_size
[rclass
] > best_size
684 && (best_cost
< 0 || best_cost
>= cost
))
687 best_class
= (enum reg_class
) rclass
;
688 best_size
= reg_class_size
[rclass
];
689 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
694 gcc_assert (best_size
!= 0);
699 /* We are trying to reload a subreg of something that is not a register.
700 Find the largest class which contains only registers valid in
701 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
702 which we would eventually like to obtain the object. */
704 static enum reg_class
705 find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED
,
706 machine_mode mode ATTRIBUTE_UNUSED
,
707 enum reg_class dest_class ATTRIBUTE_UNUSED
)
712 enum reg_class best_class
= NO_REGS
;
713 unsigned int best_size
= 0;
716 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
718 unsigned int computed_rclass_size
= 0;
720 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
722 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
723 && targetm
.hard_regno_mode_ok (regno
, mode
))
724 computed_rclass_size
++;
727 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
729 if ((computed_rclass_size
> best_size
730 && (best_cost
< 0 || best_cost
>= cost
))
733 best_class
= (enum reg_class
) rclass
;
734 best_size
= computed_rclass_size
;
735 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
740 gcc_assert (best_size
!= 0);
742 #ifdef LIMIT_RELOAD_CLASS
743 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
748 /* Return the number of a previously made reload that can be combined with
749 a new one, or n_reloads if none of the existing reloads can be used.
750 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
751 push_reload, they determine the kind of the new reload that we try to
752 combine. P_IN points to the corresponding value of IN, which can be
753 modified by this function.
754 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
757 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
758 enum reload_type type
, int opnum
, int dont_share
)
762 /* We can't merge two reloads if the output of either one is
765 if (earlyclobber_operand_p (out
))
768 /* We can use an existing reload if the class is right
769 and at least one of IN and OUT is a match
770 and the other is at worst neutral.
771 (A zero compared against anything is neutral.)
773 For targets with small register classes, don't use existing reloads
774 unless they are for the same thing since that can cause us to need
775 more reload registers than we otherwise would. */
777 for (i
= 0; i
< n_reloads
; i
++)
778 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
779 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
780 /* If the existing reload has a register, it must fit our class. */
781 && (rld
[i
].reg_rtx
== 0
782 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
783 true_regnum (rld
[i
].reg_rtx
)))
784 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
785 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
786 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
787 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
788 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
789 && (small_register_class_p (rclass
)
790 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
791 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
794 /* Reloading a plain reg for input can match a reload to postincrement
795 that reg, since the postincrement's value is the right value.
796 Likewise, it can match a preincrement reload, since we regard
797 the preincrementation as happening before any ref in this insn
799 for (i
= 0; i
< n_reloads
; i
++)
800 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
801 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
802 /* If the existing reload has a register, it must fit our
804 && (rld
[i
].reg_rtx
== 0
805 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
806 true_regnum (rld
[i
].reg_rtx
)))
807 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
809 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
810 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
811 || (REG_P (rld
[i
].in
)
812 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
813 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
814 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
815 && (small_register_class_p (rclass
)
816 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
817 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
818 opnum
, rld
[i
].opnum
))
820 /* Make sure reload_in ultimately has the increment,
821 not the plain register. */
829 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
830 expression. MODE is the mode that X will be used in. OUTPUT is true if
831 the function is invoked for the output part of an enclosing reload. */
834 reload_inner_reg_of_subreg (rtx x
, machine_mode mode
, bool output
)
838 /* Only SUBREGs are problematical. */
839 if (GET_CODE (x
) != SUBREG
)
842 inner
= SUBREG_REG (x
);
844 /* If INNER is a constant or PLUS, then INNER will need reloading. */
845 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
848 /* If INNER is not a hard register, then INNER will not need reloading. */
849 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
852 /* If INNER is not ok for MODE, then INNER will need reloading. */
853 if (!targetm
.hard_regno_mode_ok (subreg_regno (x
), mode
))
856 /* If this is for an output, and the outer part is a word or smaller,
857 INNER is larger than a word and the number of registers in INNER is
858 not the same as the number of words in INNER, then INNER will need
859 reloading (with an in-out reload). */
861 && GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
862 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
863 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
864 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
867 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
868 requiring an extra reload register. The caller has already found that
869 IN contains some reference to REGNO, so check that we can produce the
870 new value in a single step. E.g. if we have
871 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
872 instruction that adds one to a register, this should succeed.
873 However, if we have something like
874 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
875 needs to be loaded into a register first, we need a separate reload
877 Such PLUS reloads are generated by find_reload_address_part.
878 The out-of-range PLUS expressions are usually introduced in the instruction
879 patterns by register elimination and substituting pseudos without a home
880 by their function-invariant equivalences. */
882 can_reload_into (rtx in
, int regno
, machine_mode mode
)
887 struct recog_data_d save_recog_data
;
889 /* For matching constraints, we often get notional input reloads where
890 we want to use the original register as the reload register. I.e.
891 technically this is a non-optional input-output reload, but IN is
892 already a valid register, and has been chosen as the reload register.
893 Speed this up, since it trivially works. */
897 /* To test MEMs properly, we'd have to take into account all the reloads
898 that are already scheduled, which can become quite complicated.
899 And since we've already handled address reloads for this MEM, it
900 should always succeed anyway. */
904 /* If we can make a simple SET insn that does the job, everything should
906 dst
= gen_rtx_REG (mode
, regno
);
907 test_insn
= make_insn_raw (gen_rtx_SET (dst
, in
));
908 save_recog_data
= recog_data
;
909 if (recog_memoized (test_insn
) >= 0)
911 extract_insn (test_insn
);
912 r
= constrain_operands (1, get_enabled_alternatives (test_insn
));
914 recog_data
= save_recog_data
;
918 /* Record one reload that needs to be performed.
919 IN is an rtx saying where the data are to be found before this instruction.
920 OUT says where they must be stored after the instruction.
921 (IN is zero for data not read, and OUT is zero for data not written.)
922 INLOC and OUTLOC point to the places in the instructions where
923 IN and OUT were found.
924 If IN and OUT are both nonzero, it means the same register must be used
925 to reload both IN and OUT.
927 RCLASS is a register class required for the reloaded data.
928 INMODE is the machine mode that the instruction requires
929 for the reg that replaces IN and OUTMODE is likewise for OUT.
931 If IN is zero, then OUT's location and mode should be passed as
934 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
936 OPTIONAL nonzero means this reload does not need to be performed:
937 it can be discarded if that is more convenient.
939 OPNUM and TYPE say what the purpose of this reload is.
941 The return value is the reload-number for this reload.
943 If both IN and OUT are nonzero, in some rare cases we might
944 want to make two separate reloads. (Actually we never do this now.)
945 Therefore, the reload-number for OUT is stored in
946 output_reloadnum when we return; the return value applies to IN.
947 Usually (presently always), when IN and OUT are nonzero,
948 the two reload-numbers are equal, but the caller should be careful to
952 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
953 enum reg_class rclass
, machine_mode inmode
,
954 machine_mode outmode
, int strict_low
, int optional
,
955 int opnum
, enum reload_type type
)
959 int dont_remove_subreg
= 0;
960 #ifdef LIMIT_RELOAD_CLASS
961 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
963 int secondary_in_reload
= -1, secondary_out_reload
= -1;
964 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
965 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
966 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
967 subreg_in_class
= NO_REGS
;
969 /* INMODE and/or OUTMODE could be VOIDmode if no mode
970 has been specified for the operand. In that case,
971 use the operand's mode as the mode to reload. */
972 if (inmode
== VOIDmode
&& in
!= 0)
973 inmode
= GET_MODE (in
);
974 if (outmode
== VOIDmode
&& out
!= 0)
975 outmode
= GET_MODE (out
);
977 /* If find_reloads and friends until now missed to replace a pseudo
978 with a constant of reg_equiv_constant something went wrong
980 Note that it can't simply be done here if we missed it earlier
981 since the constant might need to be pushed into the literal pool
982 and the resulting memref would probably need further
984 if (in
!= 0 && REG_P (in
))
986 int regno
= REGNO (in
);
988 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
989 || reg_renumber
[regno
] >= 0
990 || reg_equiv_constant (regno
) == NULL_RTX
);
993 /* reg_equiv_constant only contains constants which are obviously
994 not appropriate as destination. So if we would need to replace
995 the destination pseudo with a constant we are in real
997 if (out
!= 0 && REG_P (out
))
999 int regno
= REGNO (out
);
1001 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1002 || reg_renumber
[regno
] >= 0
1003 || reg_equiv_constant (regno
) == NULL_RTX
);
1006 /* If we have a read-write operand with an address side-effect,
1007 change either IN or OUT so the side-effect happens only once. */
1008 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1009 switch (GET_CODE (XEXP (in
, 0)))
1011 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1012 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1015 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1016 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1023 /* If we are reloading a (SUBREG constant ...), really reload just the
1024 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1025 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1026 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1027 register is a pseudo, also reload the inside expression.
1028 For machines that extend byte loads, do this for any SUBREG of a pseudo
1029 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1030 M2 is an integral mode that gets extended when loaded.
1031 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1032 where either M1 is not valid for R or M2 is wider than a word but we
1033 only need one register to store an M2-sized quantity in R.
1034 (However, if OUT is nonzero, we need to reload the reg *and*
1035 the subreg, so do nothing here, and let following statement handle it.)
1037 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1038 we can't handle it here because CONST_INT does not indicate a mode.
1040 Similarly, we must reload the inside expression if we have a
1041 STRICT_LOW_PART (presumably, in == out in this case).
1043 Also reload the inner expression if it does not require a secondary
1044 reload but the SUBREG does.
1046 Finally, reload the inner expression if it is a register that is in
1047 the class whose registers cannot be referenced in a different size
1048 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1049 cannot reload just the inside since we might end up with the wrong
1050 register class. But if it is inside a STRICT_LOW_PART, we have
1051 no choice, so we hope we do get the right register class there. */
1053 scalar_int_mode inner_mode
;
1054 if (in
!= 0 && GET_CODE (in
) == SUBREG
1055 && (subreg_lowpart_p (in
) || strict_low
)
1056 #ifdef CANNOT_CHANGE_MODE_CLASS
1057 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, rclass
)
1059 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (in
))]
1060 && (CONSTANT_P (SUBREG_REG (in
))
1061 || GET_CODE (SUBREG_REG (in
)) == PLUS
1063 || (((REG_P (SUBREG_REG (in
))
1064 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1065 || MEM_P (SUBREG_REG (in
)))
1066 && (paradoxical_subreg_p (inmode
, GET_MODE (SUBREG_REG (in
)))
1067 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1068 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG (in
)),
1070 && GET_MODE_SIZE (inner_mode
) <= UNITS_PER_WORD
1071 && paradoxical_subreg_p (inmode
, inner_mode
)
1072 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)
1073 || (WORD_REGISTER_OPERATIONS
1074 && partial_subreg_p (inmode
, GET_MODE (SUBREG_REG (in
)))
1075 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1076 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1077 / UNITS_PER_WORD
)))))
1078 || (REG_P (SUBREG_REG (in
))
1079 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1080 /* The case where out is nonzero
1081 is handled differently in the following statement. */
1082 && (out
== 0 || subreg_lowpart_p (in
))
1083 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1084 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1086 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1088 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1089 [GET_MODE (SUBREG_REG (in
))]))
1090 || !targetm
.hard_regno_mode_ok (subreg_regno (in
), inmode
)))
1091 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1092 && (secondary_reload_class (1, rclass
, GET_MODE (SUBREG_REG (in
)),
1095 #ifdef CANNOT_CHANGE_MODE_CLASS
1096 || (REG_P (SUBREG_REG (in
))
1097 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1098 && REG_CANNOT_CHANGE_MODE_P
1099 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1103 #ifdef LIMIT_RELOAD_CLASS
1104 in_subreg_loc
= inloc
;
1106 inloc
= &SUBREG_REG (in
);
1109 if (!WORD_REGISTER_OPERATIONS
1110 && LOAD_EXTEND_OP (GET_MODE (in
)) == UNKNOWN
1112 /* This is supposed to happen only for paradoxical subregs made by
1113 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1114 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1116 inmode
= GET_MODE (in
);
1119 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1120 where M1 is not valid for R if it was not handled by the code above.
1122 Similar issue for (SUBREG constant ...) if it was not handled by the
1123 code above. This can happen if SUBREG_BYTE != 0.
1125 However, we must reload the inner reg *as well as* the subreg in
1128 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1130 if (REG_P (SUBREG_REG (in
)))
1132 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1133 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1134 GET_MODE (SUBREG_REG (in
)),
1137 REGNO (SUBREG_REG (in
)));
1138 else if (CONSTANT_P (SUBREG_REG (in
))
1139 || GET_CODE (SUBREG_REG (in
)) == PLUS
)
1140 subreg_in_class
= find_valid_class_1 (inmode
,
1141 GET_MODE (SUBREG_REG (in
)),
1144 /* This relies on the fact that emit_reload_insns outputs the
1145 instructions for input reloads of type RELOAD_OTHER in the same
1146 order as the reloads. Thus if the outer reload is also of type
1147 RELOAD_OTHER, we are guaranteed that this inner reload will be
1148 output before the outer reload. */
1149 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1150 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1151 dont_remove_subreg
= 1;
1154 /* Similarly for paradoxical and problematical SUBREGs on the output.
1155 Note that there is no reason we need worry about the previous value
1156 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1157 entitled to clobber it all (except in the case of a word mode subreg
1158 or of a STRICT_LOW_PART, in that latter case the constraint should
1159 label it input-output.) */
1160 if (out
!= 0 && GET_CODE (out
) == SUBREG
1161 && (subreg_lowpart_p (out
) || strict_low
)
1162 #ifdef CANNOT_CHANGE_MODE_CLASS
1163 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, rclass
)
1165 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (out
))]
1166 && (CONSTANT_P (SUBREG_REG (out
))
1168 || (((REG_P (SUBREG_REG (out
))
1169 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1170 || MEM_P (SUBREG_REG (out
)))
1171 && (paradoxical_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1172 || (WORD_REGISTER_OPERATIONS
1173 && partial_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1174 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1175 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1176 / UNITS_PER_WORD
)))))
1177 || (REG_P (SUBREG_REG (out
))
1178 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1179 /* The case of a word mode subreg
1180 is handled differently in the following statement. */
1181 && ! (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1182 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1184 && !targetm
.hard_regno_mode_ok (subreg_regno (out
), outmode
))
1185 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1186 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1189 #ifdef CANNOT_CHANGE_MODE_CLASS
1190 || (REG_P (SUBREG_REG (out
))
1191 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1192 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1193 GET_MODE (SUBREG_REG (out
)),
1198 #ifdef LIMIT_RELOAD_CLASS
1199 out_subreg_loc
= outloc
;
1201 outloc
= &SUBREG_REG (out
);
1203 gcc_assert (WORD_REGISTER_OPERATIONS
|| !MEM_P (out
)
1204 || GET_MODE_SIZE (GET_MODE (out
))
1205 <= GET_MODE_SIZE (outmode
));
1206 outmode
= GET_MODE (out
);
1209 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1210 where either M1 is not valid for R or M2 is wider than a word but we
1211 only need one register to store an M2-sized quantity in R.
1213 However, we must reload the inner reg *as well as* the subreg in
1214 that case and the inner reg is an in-out reload. */
1216 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1218 enum reg_class in_out_class
1219 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1220 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1221 GET_MODE (SUBREG_REG (out
)),
1224 REGNO (SUBREG_REG (out
)));
1226 /* This relies on the fact that emit_reload_insns outputs the
1227 instructions for output reloads of type RELOAD_OTHER in reverse
1228 order of the reloads. Thus if the outer reload is also of type
1229 RELOAD_OTHER, we are guaranteed that this inner reload will be
1230 output after the outer reload. */
1231 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1232 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1233 0, 0, opnum
, RELOAD_OTHER
);
1234 dont_remove_subreg
= 1;
1237 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1238 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1239 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1240 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1243 /* If IN is a SUBREG of a hard register, make a new REG. This
1244 simplifies some of the cases below. */
1246 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1247 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1248 && ! dont_remove_subreg
)
1249 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1251 /* Similarly for OUT. */
1252 if (out
!= 0 && GET_CODE (out
) == SUBREG
1253 && REG_P (SUBREG_REG (out
))
1254 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1255 && ! dont_remove_subreg
)
1256 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1258 /* Narrow down the class of register wanted if that is
1259 desirable on this machine for efficiency. */
1261 reg_class_t preferred_class
= rclass
;
1264 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1266 /* Output reloads may need analogous treatment, different in detail. */
1269 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1271 /* Discard what the target said if we cannot do it. */
1272 if (preferred_class
!= NO_REGS
1273 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1274 rclass
= (enum reg_class
) preferred_class
;
1277 /* Make sure we use a class that can handle the actual pseudo
1278 inside any subreg. For example, on the 386, QImode regs
1279 can appear within SImode subregs. Although GENERAL_REGS
1280 can handle SImode, QImode needs a smaller class. */
1281 #ifdef LIMIT_RELOAD_CLASS
1283 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1284 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1285 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1288 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1289 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1290 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1293 /* Verify that this class is at least possible for the mode that
1295 if (this_insn_is_asm
)
1298 if (paradoxical_subreg_p (inmode
, outmode
))
1302 if (mode
== VOIDmode
)
1304 error_for_asm (this_insn
, "cannot reload integer constant "
1305 "operand in %<asm%>");
1310 outmode
= word_mode
;
1312 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1313 if (targetm
.hard_regno_mode_ok (i
, mode
)
1314 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1316 if (i
== FIRST_PSEUDO_REGISTER
)
1318 error_for_asm (this_insn
, "impossible register constraint "
1320 /* Avoid further trouble with this insn. */
1321 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1322 /* We used to continue here setting class to ALL_REGS, but it triggers
1323 sanity check on i386 for:
1324 void foo(long double d)
1328 Returning zero here ought to be safe as we take care in
1329 find_reloads to not process the reloads when instruction was
1336 /* Optional output reloads are always OK even if we have no register class,
1337 since the function of these reloads is only to have spill_reg_store etc.
1338 set, so that the storing insn can be deleted later. */
1339 gcc_assert (rclass
!= NO_REGS
1340 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1342 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1346 /* See if we need a secondary reload register to move between CLASS
1347 and IN or CLASS and OUT. Get the icode and push any required reloads
1348 needed for each of them if so. */
1352 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1353 &secondary_in_icode
, NULL
);
1354 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1355 secondary_out_reload
1356 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1357 type
, &secondary_out_icode
, NULL
);
1359 /* We found no existing reload suitable for re-use.
1360 So add an additional reload. */
1362 #ifdef SECONDARY_MEMORY_NEEDED
1363 if (subreg_in_class
== NO_REGS
1366 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1367 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1368 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1369 /* If a memory location is needed for the copy, make one. */
1370 if (subreg_in_class
!= NO_REGS
1371 && SECONDARY_MEMORY_NEEDED (subreg_in_class
, rclass
, inmode
))
1372 get_secondary_mem (in
, inmode
, opnum
, type
);
1378 rld
[i
].rclass
= rclass
;
1379 rld
[i
].inmode
= inmode
;
1380 rld
[i
].outmode
= outmode
;
1382 rld
[i
].optional
= optional
;
1384 rld
[i
].nocombine
= 0;
1385 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1386 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1387 rld
[i
].opnum
= opnum
;
1388 rld
[i
].when_needed
= type
;
1389 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1390 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1391 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1392 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1393 rld
[i
].secondary_p
= 0;
1397 #ifdef SECONDARY_MEMORY_NEEDED
1400 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1401 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1402 && SECONDARY_MEMORY_NEEDED (rclass
,
1403 REGNO_REG_CLASS (reg_or_subregno (out
)),
1405 get_secondary_mem (out
, outmode
, opnum
, type
);
1410 /* We are reusing an existing reload,
1411 but we may have additional information for it.
1412 For example, we may now have both IN and OUT
1413 while the old one may have just one of them. */
1415 /* The modes can be different. If they are, we want to reload in
1416 the larger mode, so that the value is valid for both modes. */
1417 if (inmode
!= VOIDmode
1418 && partial_subreg_p (rld
[i
].inmode
, inmode
))
1419 rld
[i
].inmode
= inmode
;
1420 if (outmode
!= VOIDmode
1421 && partial_subreg_p (rld
[i
].outmode
, outmode
))
1422 rld
[i
].outmode
= outmode
;
1425 rtx in_reg
= inloc
? *inloc
: 0;
1426 /* If we merge reloads for two distinct rtl expressions that
1427 are identical in content, there might be duplicate address
1428 reloads. Remove the extra set now, so that if we later find
1429 that we can inherit this reload, we can get rid of the
1430 address reloads altogether.
1432 Do not do this if both reloads are optional since the result
1433 would be an optional reload which could potentially leave
1434 unresolved address replacements.
1436 It is not sufficient to call transfer_replacements since
1437 choose_reload_regs will remove the replacements for address
1438 reloads of inherited reloads which results in the same
1440 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1441 && ! (rld
[i
].optional
&& optional
))
1443 /* We must keep the address reload with the lower operand
1445 if (opnum
> rld
[i
].opnum
)
1447 remove_address_replacements (in
);
1449 in_reg
= rld
[i
].in_reg
;
1452 remove_address_replacements (rld
[i
].in
);
1454 /* When emitting reloads we don't necessarily look at the in-
1455 and outmode, but also directly at the operands (in and out).
1456 So we can't simply overwrite them with whatever we have found
1457 for this (to-be-merged) reload, we have to "merge" that too.
1458 Reusing another reload already verified that we deal with the
1459 same operands, just possibly in different modes. So we
1460 overwrite the operands only when the new mode is larger.
1461 See also PR33613. */
1463 || partial_subreg_p (GET_MODE (rld
[i
].in
), GET_MODE (in
)))
1467 && partial_subreg_p (GET_MODE (rld
[i
].in_reg
),
1468 GET_MODE (in_reg
))))
1469 rld
[i
].in_reg
= in_reg
;
1475 && partial_subreg_p (GET_MODE (rld
[i
].out
),
1480 || partial_subreg_p (GET_MODE (rld
[i
].out_reg
),
1481 GET_MODE (*outloc
))))
1482 rld
[i
].out_reg
= *outloc
;
1484 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1485 rld
[i
].rclass
= rclass
;
1486 rld
[i
].optional
&= optional
;
1487 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1488 opnum
, rld
[i
].opnum
))
1489 rld
[i
].when_needed
= RELOAD_OTHER
;
1490 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1493 /* If the ostensible rtx being reloaded differs from the rtx found
1494 in the location to substitute, this reload is not safe to combine
1495 because we cannot reliably tell whether it appears in the insn. */
1497 if (in
!= 0 && in
!= *inloc
)
1498 rld
[i
].nocombine
= 1;
1501 /* This was replaced by changes in find_reloads_address_1 and the new
1502 function inc_for_reload, which go with a new meaning of reload_inc. */
1504 /* If this is an IN/OUT reload in an insn that sets the CC,
1505 it must be for an autoincrement. It doesn't work to store
1506 the incremented value after the insn because that would clobber the CC.
1507 So we must do the increment of the value reloaded from,
1508 increment it, store it back, then decrement again. */
1509 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1513 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1514 /* If we did not find a nonzero amount-to-increment-by,
1515 that contradicts the belief that IN is being incremented
1516 in an address in this insn. */
1517 gcc_assert (rld
[i
].inc
!= 0);
1521 /* If we will replace IN and OUT with the reload-reg,
1522 record where they are located so that substitution need
1523 not do a tree walk. */
1525 if (replace_reloads
)
1529 struct replacement
*r
= &replacements
[n_replacements
++];
1534 if (outloc
!= 0 && outloc
!= inloc
)
1536 struct replacement
*r
= &replacements
[n_replacements
++];
1543 /* If this reload is just being introduced and it has both
1544 an incoming quantity and an outgoing quantity that are
1545 supposed to be made to match, see if either one of the two
1546 can serve as the place to reload into.
1548 If one of them is acceptable, set rld[i].reg_rtx
1551 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1553 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1556 earlyclobber_operand_p (out
));
1558 /* If the outgoing register already contains the same value
1559 as the incoming one, we can dispense with loading it.
1560 The easiest way to tell the caller that is to give a phony
1561 value for the incoming operand (same as outgoing one). */
1562 if (rld
[i
].reg_rtx
== out
1563 && (REG_P (in
) || CONSTANT_P (in
))
1564 && 0 != find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1565 static_reload_reg_p
, i
, inmode
))
1569 /* If this is an input reload and the operand contains a register that
1570 dies in this insn and is used nowhere else, see if it is the right class
1571 to be used for this reload. Use it if so. (This occurs most commonly
1572 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1573 this if it is also an output reload that mentions the register unless
1574 the output is a SUBREG that clobbers an entire register.
1576 Note that the operand might be one of the spill regs, if it is a
1577 pseudo reg and we are in a block where spilling has not taken place.
1578 But if there is no spilling in this block, that is OK.
1579 An explicitly used hard reg cannot be a spill reg. */
1581 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1585 machine_mode rel_mode
= inmode
;
1587 if (out
&& partial_subreg_p (rel_mode
, outmode
))
1590 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1591 if (REG_NOTE_KIND (note
) == REG_DEAD
1592 && REG_P (XEXP (note
, 0))
1593 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1594 && reg_mentioned_p (XEXP (note
, 0), in
)
1595 /* Check that a former pseudo is valid; see find_dummy_reload. */
1596 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1597 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1598 ORIGINAL_REGNO (XEXP (note
, 0)))
1599 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1600 && ! refers_to_regno_for_reload_p (regno
,
1601 end_hard_regno (rel_mode
,
1603 PATTERN (this_insn
), inloc
)
1604 && ! find_reg_fusage (this_insn
, USE
, XEXP (note
, 0))
1605 /* If this is also an output reload, IN cannot be used as
1606 the reload register if it is set in this insn unless IN
1608 && (out
== 0 || in
== out
1609 || ! hard_reg_set_here_p (regno
,
1610 end_hard_regno (rel_mode
, regno
),
1611 PATTERN (this_insn
)))
1612 /* ??? Why is this code so different from the previous?
1613 Is there any simple coherent way to describe the two together?
1614 What's going on here. */
1616 || (GET_CODE (in
) == SUBREG
1617 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1619 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1620 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1621 /* Make sure the operand fits in the reg that dies. */
1622 && (GET_MODE_SIZE (rel_mode
)
1623 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1624 && targetm
.hard_regno_mode_ok (regno
, inmode
)
1625 && targetm
.hard_regno_mode_ok (regno
, outmode
))
1628 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1629 hard_regno_nregs
[regno
][outmode
]);
1631 for (offs
= 0; offs
< nregs
; offs
++)
1632 if (fixed_regs
[regno
+ offs
]
1633 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1638 && (! (refers_to_regno_for_reload_p
1639 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1640 || can_reload_into (in
, regno
, inmode
)))
1642 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1649 output_reloadnum
= i
;
1654 /* Record an additional place we must replace a value
1655 for which we have already recorded a reload.
1656 RELOADNUM is the value returned by push_reload
1657 when the reload was recorded.
1658 This is used in insn patterns that use match_dup. */
1661 push_replacement (rtx
*loc
, int reloadnum
, machine_mode mode
)
1663 if (replace_reloads
)
1665 struct replacement
*r
= &replacements
[n_replacements
++];
1666 r
->what
= reloadnum
;
1672 /* Duplicate any replacement we have recorded to apply at
1673 location ORIG_LOC to also be performed at DUP_LOC.
1674 This is used in insn patterns that use match_dup. */
1677 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1679 int i
, n
= n_replacements
;
1681 for (i
= 0; i
< n
; i
++)
1683 struct replacement
*r
= &replacements
[i
];
1684 if (r
->where
== orig_loc
)
1685 push_replacement (dup_loc
, r
->what
, r
->mode
);
1689 /* Transfer all replacements that used to be in reload FROM to be in
1693 transfer_replacements (int to
, int from
)
1697 for (i
= 0; i
< n_replacements
; i
++)
1698 if (replacements
[i
].what
== from
)
1699 replacements
[i
].what
= to
;
1702 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1703 or a subpart of it. If we have any replacements registered for IN_RTX,
1704 cancel the reloads that were supposed to load them.
1705 Return nonzero if we canceled any reloads. */
1707 remove_address_replacements (rtx in_rtx
)
1710 char reload_flags
[MAX_RELOADS
];
1711 int something_changed
= 0;
1713 memset (reload_flags
, 0, sizeof reload_flags
);
1714 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1716 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1717 reload_flags
[replacements
[i
].what
] |= 1;
1720 replacements
[j
++] = replacements
[i
];
1721 reload_flags
[replacements
[i
].what
] |= 2;
1724 /* Note that the following store must be done before the recursive calls. */
1727 for (i
= n_reloads
- 1; i
>= 0; i
--)
1729 if (reload_flags
[i
] == 1)
1731 deallocate_reload_reg (i
);
1732 remove_address_replacements (rld
[i
].in
);
1734 something_changed
= 1;
1737 return something_changed
;
1740 /* If there is only one output reload, and it is not for an earlyclobber
1741 operand, try to combine it with a (logically unrelated) input reload
1742 to reduce the number of reload registers needed.
1744 This is safe if the input reload does not appear in
1745 the value being output-reloaded, because this implies
1746 it is not needed any more once the original insn completes.
1748 If that doesn't work, see we can use any of the registers that
1749 die in this insn as a reload register. We can if it is of the right
1750 class and does not appear in the value being output-reloaded. */
1753 combine_reloads (void)
1756 int output_reload
= -1;
1757 int secondary_out
= -1;
1760 /* Find the output reload; return unless there is exactly one
1761 and that one is mandatory. */
1763 for (i
= 0; i
< n_reloads
; i
++)
1764 if (rld
[i
].out
!= 0)
1766 if (output_reload
>= 0)
1771 if (output_reload
< 0 || rld
[output_reload
].optional
)
1774 /* An input-output reload isn't combinable. */
1776 if (rld
[output_reload
].in
!= 0)
1779 /* If this reload is for an earlyclobber operand, we can't do anything. */
1780 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1783 /* If there is a reload for part of the address of this operand, we would
1784 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1785 its life to the point where doing this combine would not lower the
1786 number of spill registers needed. */
1787 for (i
= 0; i
< n_reloads
; i
++)
1788 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1789 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1790 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1793 /* Check each input reload; can we combine it? */
1795 for (i
= 0; i
< n_reloads
; i
++)
1796 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1797 /* Life span of this reload must not extend past main insn. */
1798 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1799 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1800 && rld
[i
].when_needed
!= RELOAD_OTHER
1801 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1802 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1803 [(int) rld
[output_reload
].outmode
])
1805 && rld
[i
].reg_rtx
== 0
1806 #ifdef SECONDARY_MEMORY_NEEDED
1807 /* Don't combine two reloads with different secondary
1808 memory locations. */
1809 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1810 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1811 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1812 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1814 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1815 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1816 : (reg_class_subset_p (rld
[i
].rclass
,
1817 rld
[output_reload
].rclass
)
1818 || reg_class_subset_p (rld
[output_reload
].rclass
,
1820 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1821 /* Args reversed because the first arg seems to be
1822 the one that we imagine being modified
1823 while the second is the one that might be affected. */
1824 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1826 /* However, if the input is a register that appears inside
1827 the output, then we also can't share.
1828 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1829 If the same reload reg is used for both reg 69 and the
1830 result to be stored in memory, then that result
1831 will clobber the address of the memory ref. */
1832 && ! (REG_P (rld
[i
].in
)
1833 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1834 rld
[output_reload
].out
))))
1835 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1836 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1837 && (reg_class_size
[(int) rld
[i
].rclass
]
1838 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1839 /* We will allow making things slightly worse by combining an
1840 input and an output, but no worse than that. */
1841 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1842 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1846 /* We have found a reload to combine with! */
1847 rld
[i
].out
= rld
[output_reload
].out
;
1848 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1849 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1850 /* Mark the old output reload as inoperative. */
1851 rld
[output_reload
].out
= 0;
1852 /* The combined reload is needed for the entire insn. */
1853 rld
[i
].when_needed
= RELOAD_OTHER
;
1854 /* If the output reload had a secondary reload, copy it. */
1855 if (rld
[output_reload
].secondary_out_reload
!= -1)
1857 rld
[i
].secondary_out_reload
1858 = rld
[output_reload
].secondary_out_reload
;
1859 rld
[i
].secondary_out_icode
1860 = rld
[output_reload
].secondary_out_icode
;
1863 #ifdef SECONDARY_MEMORY_NEEDED
1864 /* Copy any secondary MEM. */
1865 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1866 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1867 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1869 /* If required, minimize the register class. */
1870 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1872 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1874 /* Transfer all replacements from the old reload to the combined. */
1875 for (j
= 0; j
< n_replacements
; j
++)
1876 if (replacements
[j
].what
== output_reload
)
1877 replacements
[j
].what
= i
;
1882 /* If this insn has only one operand that is modified or written (assumed
1883 to be the first), it must be the one corresponding to this reload. It
1884 is safe to use anything that dies in this insn for that output provided
1885 that it does not occur in the output (we already know it isn't an
1886 earlyclobber. If this is an asm insn, give up. */
1888 if (INSN_CODE (this_insn
) == -1)
1891 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1892 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1893 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1896 /* See if some hard register that dies in this insn and is not used in
1897 the output is the right class. Only works if the register we pick
1898 up can fully hold our output reload. */
1899 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1900 if (REG_NOTE_KIND (note
) == REG_DEAD
1901 && REG_P (XEXP (note
, 0))
1902 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1903 rld
[output_reload
].out
)
1904 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1905 && targetm
.hard_regno_mode_ok (regno
, rld
[output_reload
].outmode
)
1906 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1908 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1909 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1910 /* Ensure that a secondary or tertiary reload for this output
1911 won't want this register. */
1912 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1913 || (!(TEST_HARD_REG_BIT
1914 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1915 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1916 || !(TEST_HARD_REG_BIT
1917 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1919 && !fixed_regs
[regno
]
1920 /* Check that a former pseudo is valid; see find_dummy_reload. */
1921 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1922 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1923 ORIGINAL_REGNO (XEXP (note
, 0)))
1924 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1926 rld
[output_reload
].reg_rtx
1927 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1932 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1933 See if one of IN and OUT is a register that may be used;
1934 this is desirable since a spill-register won't be needed.
1935 If so, return the register rtx that proves acceptable.
1937 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1938 RCLASS is the register class required for the reload.
1940 If FOR_REAL is >= 0, it is the number of the reload,
1941 and in some cases when it can be discovered that OUT doesn't need
1942 to be computed, clear out rld[FOR_REAL].out.
1944 If FOR_REAL is -1, this should not be done, because this call
1945 is just to see if a register can be found, not to find and install it.
1947 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1948 puts an additional constraint on being able to use IN for OUT since
1949 IN must not appear elsewhere in the insn (it is assumed that IN itself
1950 is safe from the earlyclobber). */
1953 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1954 machine_mode inmode
, machine_mode outmode
,
1955 reg_class_t rclass
, int for_real
, int earlyclobber
)
1963 /* If operands exceed a word, we can't use either of them
1964 unless they have the same size. */
1965 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1966 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1967 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1970 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1971 respectively refers to a hard register. */
1973 /* Find the inside of any subregs. */
1974 while (GET_CODE (out
) == SUBREG
)
1976 if (REG_P (SUBREG_REG (out
))
1977 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1978 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1979 GET_MODE (SUBREG_REG (out
)),
1982 out
= SUBREG_REG (out
);
1984 while (GET_CODE (in
) == SUBREG
)
1986 if (REG_P (SUBREG_REG (in
))
1987 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1988 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1989 GET_MODE (SUBREG_REG (in
)),
1992 in
= SUBREG_REG (in
);
1995 /* Narrow down the reg class, the same way push_reload will;
1996 otherwise we might find a dummy now, but push_reload won't. */
1998 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1999 if (preferred_class
!= NO_REGS
)
2000 rclass
= (enum reg_class
) preferred_class
;
2003 /* See if OUT will do. */
2005 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
2007 unsigned int regno
= REGNO (out
) + out_offset
;
2008 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
2011 /* When we consider whether the insn uses OUT,
2012 ignore references within IN. They don't prevent us
2013 from copying IN into OUT, because those refs would
2014 move into the insn that reloads IN.
2016 However, we only ignore IN in its role as this reload.
2017 If the insn uses IN elsewhere and it contains OUT,
2018 that counts. We can't be sure it's the "same" operand
2019 so it might not go through this reload.
2021 We also need to avoid using OUT if it, or part of it, is a
2022 fixed register. Modifying such registers, even transiently,
2023 may have undefined effects on the machine, such as modifying
2024 the stack pointer. */
2026 *inloc
= const0_rtx
;
2028 if (regno
< FIRST_PSEUDO_REGISTER
2029 && targetm
.hard_regno_mode_ok (regno
, outmode
)
2030 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2031 PATTERN (this_insn
), outloc
))
2035 for (i
= 0; i
< nwords
; i
++)
2036 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2038 || fixed_regs
[regno
+ i
])
2043 if (REG_P (real_out
))
2046 value
= gen_rtx_REG (outmode
, regno
);
2053 /* Consider using IN if OUT was not acceptable
2054 or if OUT dies in this insn (like the quotient in a divmod insn).
2055 We can't use IN unless it is dies in this insn,
2056 which means we must know accurately which hard regs are live.
2057 Also, the result can't go in IN if IN is used within OUT,
2058 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2059 if (hard_regs_live_known
2061 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2063 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2064 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2065 && !fixed_regs
[REGNO (in
)]
2066 && targetm
.hard_regno_mode_ok (REGNO (in
),
2067 /* The only case where out and real_out
2068 might have different modes is where
2069 real_out is a subreg, and in that
2070 case, out has a real mode. */
2071 (GET_MODE (out
) != VOIDmode
2072 ? GET_MODE (out
) : outmode
))
2073 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2074 /* However only do this if we can be sure that this input
2075 operand doesn't correspond with an uninitialized pseudo.
2076 global can assign some hardreg to it that is the same as
2077 the one assigned to a different, also live pseudo (as it
2078 can ignore the conflict). We must never introduce writes
2079 to such hardregs, as they would clobber the other live
2080 pseudo. See PR 20973. */
2081 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2082 ORIGINAL_REGNO (in
))
2083 /* Similarly, only do this if we can be sure that the death
2084 note is still valid. global can assign some hardreg to
2085 the pseudo referenced in the note and simultaneously a
2086 subword of this hardreg to a different, also live pseudo,
2087 because only another subword of the hardreg is actually
2088 used in the insn. This cannot happen if the pseudo has
2089 been assigned exactly one hardreg. See PR 33732. */
2090 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2092 unsigned int regno
= REGNO (in
) + in_offset
;
2093 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2095 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2096 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2097 PATTERN (this_insn
))
2099 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2100 PATTERN (this_insn
), inloc
)))
2104 for (i
= 0; i
< nwords
; i
++)
2105 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2111 /* If we were going to use OUT as the reload reg
2112 and changed our mind, it means OUT is a dummy that
2113 dies here. So don't bother copying value to it. */
2114 if (for_real
>= 0 && value
== real_out
)
2115 rld
[for_real
].out
= 0;
2116 if (REG_P (real_in
))
2119 value
= gen_rtx_REG (inmode
, regno
);
2127 /* This page contains subroutines used mainly for determining
2128 whether the IN or an OUT of a reload can serve as the
2131 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2134 earlyclobber_operand_p (rtx x
)
2138 for (i
= 0; i
< n_earlyclobbers
; i
++)
2139 if (reload_earlyclobbers
[i
] == x
)
2145 /* Return 1 if expression X alters a hard reg in the range
2146 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2147 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2148 X should be the body of an instruction. */
2151 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2153 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2155 rtx op0
= SET_DEST (x
);
2157 while (GET_CODE (op0
) == SUBREG
)
2158 op0
= SUBREG_REG (op0
);
2161 unsigned int r
= REGNO (op0
);
2163 /* See if this reg overlaps range under consideration. */
2165 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2169 else if (GET_CODE (x
) == PARALLEL
)
2171 int i
= XVECLEN (x
, 0) - 1;
2174 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2181 /* Return 1 if ADDR is a valid memory address for mode MODE
2182 in address space AS, and check that each pseudo reg has the
2183 proper kind of hard reg. */
2186 strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED
,
2187 rtx addr
, addr_space_t as
)
2189 #ifdef GO_IF_LEGITIMATE_ADDRESS
2190 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2191 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2197 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2201 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2202 if they are the same hard reg, and has special hacks for
2203 autoincrement and autodecrement.
2204 This is specifically intended for find_reloads to use
2205 in determining whether two operands match.
2206 X is the operand whose number is the lower of the two.
2208 The value is 2 if Y contains a pre-increment that matches
2209 a non-incrementing address in X. */
2211 /* ??? To be completely correct, we should arrange to pass
2212 for X the output operand and for Y the input operand.
2213 For now, we assume that the output operand has the lower number
2214 because that is natural in (SET output (... input ...)). */
2217 operands_match_p (rtx x
, rtx y
)
2220 RTX_CODE code
= GET_CODE (x
);
2226 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2227 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2228 && REG_P (SUBREG_REG (y
)))))
2234 i
= REGNO (SUBREG_REG (x
));
2235 if (i
>= FIRST_PSEUDO_REGISTER
)
2237 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2238 GET_MODE (SUBREG_REG (x
)),
2245 if (GET_CODE (y
) == SUBREG
)
2247 j
= REGNO (SUBREG_REG (y
));
2248 if (j
>= FIRST_PSEUDO_REGISTER
)
2250 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2251 GET_MODE (SUBREG_REG (y
)),
2258 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2259 multiple hard register group of scalar integer registers, so that
2260 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2262 scalar_int_mode xmode
;
2263 if (REG_WORDS_BIG_ENDIAN
2264 && is_a
<scalar_int_mode
> (GET_MODE (x
), &xmode
)
2265 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
2266 && i
< FIRST_PSEUDO_REGISTER
)
2267 i
+= hard_regno_nregs
[i
][xmode
] - 1;
2268 scalar_int_mode ymode
;
2269 if (REG_WORDS_BIG_ENDIAN
2270 && is_a
<scalar_int_mode
> (GET_MODE (y
), &ymode
)
2271 && GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
2272 && j
< FIRST_PSEUDO_REGISTER
)
2273 j
+= hard_regno_nregs
[j
][ymode
] - 1;
2277 /* If two operands must match, because they are really a single
2278 operand of an assembler insn, then two postincrements are invalid
2279 because the assembler insn would increment only once.
2280 On the other hand, a postincrement matches ordinary indexing
2281 if the postincrement is the output operand. */
2282 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2283 return operands_match_p (XEXP (x
, 0), y
);
2284 /* Two preincrements are invalid
2285 because the assembler insn would increment only once.
2286 On the other hand, a preincrement matches ordinary indexing
2287 if the preincrement is the input operand.
2288 In this case, return 2, since some callers need to do special
2289 things when this happens. */
2290 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2291 || GET_CODE (y
) == PRE_MODIFY
)
2292 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2296 /* Now we have disposed of all the cases in which different rtx codes
2298 if (code
!= GET_CODE (y
))
2301 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2302 if (GET_MODE (x
) != GET_MODE (y
))
2305 /* MEMs referring to different address space are not equivalent. */
2306 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2315 return label_ref_label (x
) == label_ref_label (y
);
2317 return XSTR (x
, 0) == XSTR (y
, 0);
2323 /* Compare the elements. If any pair of corresponding elements
2324 fail to match, return 0 for the whole things. */
2327 fmt
= GET_RTX_FORMAT (code
);
2328 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2334 if (XWINT (x
, i
) != XWINT (y
, i
))
2339 if (XINT (x
, i
) != XINT (y
, i
))
2344 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2347 /* If any subexpression returns 2,
2348 we should return 2 if we are successful. */
2357 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2359 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2361 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2369 /* It is believed that rtx's at this level will never
2370 contain anything but integers and other rtx's,
2371 except for within LABEL_REFs and SYMBOL_REFs. */
2376 return 1 + success_2
;
2379 /* Describe the range of registers or memory referenced by X.
2380 If X is a register, set REG_FLAG and put the first register
2381 number into START and the last plus one into END.
2382 If X is a memory reference, put a base address into BASE
2383 and a range of integer offsets into START and END.
2384 If X is pushing on the stack, we can assume it causes no trouble,
2385 so we set the SAFE field. */
2387 static struct decomposition
2390 struct decomposition val
;
2393 memset (&val
, 0, sizeof (val
));
2395 switch (GET_CODE (x
))
2399 rtx base
= NULL_RTX
, offset
= 0;
2400 rtx addr
= XEXP (x
, 0);
2402 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2403 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2405 val
.base
= XEXP (addr
, 0);
2406 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2407 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2408 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2412 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2414 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2415 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2416 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2418 val
.base
= XEXP (addr
, 0);
2419 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2420 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2421 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2426 if (GET_CODE (addr
) == CONST
)
2428 addr
= XEXP (addr
, 0);
2431 if (GET_CODE (addr
) == PLUS
)
2433 if (CONSTANT_P (XEXP (addr
, 0)))
2435 base
= XEXP (addr
, 1);
2436 offset
= XEXP (addr
, 0);
2438 else if (CONSTANT_P (XEXP (addr
, 1)))
2440 base
= XEXP (addr
, 0);
2441 offset
= XEXP (addr
, 1);
2448 offset
= const0_rtx
;
2450 if (GET_CODE (offset
) == CONST
)
2451 offset
= XEXP (offset
, 0);
2452 if (GET_CODE (offset
) == PLUS
)
2454 if (CONST_INT_P (XEXP (offset
, 0)))
2456 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2457 offset
= XEXP (offset
, 0);
2459 else if (CONST_INT_P (XEXP (offset
, 1)))
2461 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2462 offset
= XEXP (offset
, 1);
2466 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2467 offset
= const0_rtx
;
2470 else if (!CONST_INT_P (offset
))
2472 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2473 offset
= const0_rtx
;
2476 if (all_const
&& GET_CODE (base
) == PLUS
)
2477 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2479 gcc_assert (CONST_INT_P (offset
));
2481 val
.start
= INTVAL (offset
);
2482 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2489 val
.start
= true_regnum (x
);
2490 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2492 /* A pseudo with no hard reg. */
2493 val
.start
= REGNO (x
);
2494 val
.end
= val
.start
+ 1;
2498 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2502 if (!REG_P (SUBREG_REG (x
)))
2503 /* This could be more precise, but it's good enough. */
2504 return decompose (SUBREG_REG (x
));
2506 val
.start
= true_regnum (x
);
2507 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2508 return decompose (SUBREG_REG (x
));
2511 val
.end
= val
.start
+ subreg_nregs (x
);
2515 /* This hasn't been assigned yet, so it can't conflict yet. */
2520 gcc_assert (CONSTANT_P (x
));
2527 /* Return 1 if altering Y will not modify the value of X.
2528 Y is also described by YDATA, which should be decompose (Y). */
2531 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2533 struct decomposition xdata
;
2536 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2540 gcc_assert (MEM_P (y
));
2541 /* If Y is memory and X is not, Y can't affect X. */
2545 xdata
= decompose (x
);
2547 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2549 /* If bases are distinct symbolic constants, there is no overlap. */
2550 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2552 /* Constants and stack slots never overlap. */
2553 if (CONSTANT_P (xdata
.base
)
2554 && (ydata
.base
== frame_pointer_rtx
2555 || ydata
.base
== hard_frame_pointer_rtx
2556 || ydata
.base
== stack_pointer_rtx
))
2558 if (CONSTANT_P (ydata
.base
)
2559 && (xdata
.base
== frame_pointer_rtx
2560 || xdata
.base
== hard_frame_pointer_rtx
2561 || xdata
.base
== stack_pointer_rtx
))
2563 /* If either base is variable, we don't know anything. */
2567 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2570 /* Similar, but calls decompose. */
2573 safe_from_earlyclobber (rtx op
, rtx clobber
)
2575 struct decomposition early_data
;
2577 early_data
= decompose (clobber
);
2578 return immune_p (op
, clobber
, early_data
);
2581 /* Main entry point of this file: search the body of INSN
2582 for values that need reloading and record them with push_reload.
2583 REPLACE nonzero means record also where the values occur
2584 so that subst_reloads can be used.
2586 IND_LEVELS says how many levels of indirection are supported by this
2587 machine; a value of zero means that a memory reference is not a valid
2590 LIVE_KNOWN says we have valid information about which hard
2591 regs are live at each point in the program; this is true when
2592 we are called from global_alloc but false when stupid register
2593 allocation has been done.
2595 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2596 which is nonnegative if the reg has been commandeered for reloading into.
2597 It is copied into STATIC_RELOAD_REG_P and referenced from there
2598 by various subroutines.
2600 Return TRUE if some operands need to be changed, because of swapping
2601 commutative operands, reg_equiv_address substitution, or whatever. */
2604 find_reloads (rtx_insn
*insn
, int replace
, int ind_levels
, int live_known
,
2605 short *reload_reg_p
)
2607 int insn_code_number
;
2610 /* These start out as the constraints for the insn
2611 and they are chewed up as we consider alternatives. */
2612 const char *constraints
[MAX_RECOG_OPERANDS
];
2613 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2615 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2616 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2617 /* Nonzero for a MEM operand whose entire address needs a reload.
2618 May be -1 to indicate the entire address may or may not need a reload. */
2619 int address_reloaded
[MAX_RECOG_OPERANDS
];
2620 /* Nonzero for an address operand that needs to be completely reloaded.
2621 May be -1 to indicate the entire operand may or may not need a reload. */
2622 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2623 /* Value of enum reload_type to use for operand. */
2624 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2625 /* Value of enum reload_type to use within address of operand. */
2626 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2627 /* Save the usage of each operand. */
2628 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2629 int no_input_reloads
= 0, no_output_reloads
= 0;
2631 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2632 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2633 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2634 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2635 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2636 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2637 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2638 int this_alternative_number
;
2639 int goal_alternative_number
= 0;
2640 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2641 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2642 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2643 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2644 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2645 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2646 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2647 int goal_alternative_swapped
;
2650 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2651 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2652 rtx body
= PATTERN (insn
);
2653 rtx set
= single_set (insn
);
2654 int goal_earlyclobber
= 0, this_earlyclobber
;
2655 machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2661 n_earlyclobbers
= 0;
2662 replace_reloads
= replace
;
2663 hard_regs_live_known
= live_known
;
2664 static_reload_reg_p
= reload_reg_p
;
2666 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2667 neither are insns that SET cc0. Insns that use CC0 are not allowed
2668 to have any input reloads. */
2669 if (JUMP_P (insn
) || CALL_P (insn
))
2670 no_output_reloads
= 1;
2672 if (HAVE_cc0
&& reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2673 no_input_reloads
= 1;
2674 if (HAVE_cc0
&& reg_set_p (cc0_rtx
, PATTERN (insn
)))
2675 no_output_reloads
= 1;
2677 #ifdef SECONDARY_MEMORY_NEEDED
2678 /* The eliminated forms of any secondary memory locations are per-insn, so
2679 clear them out here. */
2681 if (secondary_memlocs_elim_used
)
2683 memset (secondary_memlocs_elim
, 0,
2684 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2685 secondary_memlocs_elim_used
= 0;
2689 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2690 is cheap to move between them. If it is not, there may not be an insn
2691 to do the copy, so we may need a reload. */
2692 if (GET_CODE (body
) == SET
2693 && REG_P (SET_DEST (body
))
2694 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2695 && REG_P (SET_SRC (body
))
2696 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2697 && register_move_cost (GET_MODE (SET_SRC (body
)),
2698 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2699 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2702 extract_insn (insn
);
2704 noperands
= reload_n_operands
= recog_data
.n_operands
;
2705 n_alternatives
= recog_data
.n_alternatives
;
2707 /* Just return "no reloads" if insn has no operands with constraints. */
2708 if (noperands
== 0 || n_alternatives
== 0)
2711 insn_code_number
= INSN_CODE (insn
);
2712 this_insn_is_asm
= insn_code_number
< 0;
2714 memcpy (operand_mode
, recog_data
.operand_mode
,
2715 noperands
* sizeof (machine_mode
));
2716 memcpy (constraints
, recog_data
.constraints
,
2717 noperands
* sizeof (const char *));
2721 /* If we will need to know, later, whether some pair of operands
2722 are the same, we must compare them now and save the result.
2723 Reloading the base and index registers will clobber them
2724 and afterward they will fail to match. */
2726 for (i
= 0; i
< noperands
; i
++)
2732 substed_operand
[i
] = recog_data
.operand
[i
];
2735 modified
[i
] = RELOAD_READ
;
2737 /* Scan this operand's constraint to see if it is an output operand,
2738 an in-out operand, is commutative, or should match another. */
2742 p
+= CONSTRAINT_LEN (c
, p
);
2746 modified
[i
] = RELOAD_WRITE
;
2749 modified
[i
] = RELOAD_READ_WRITE
;
2753 /* The last operand should not be marked commutative. */
2754 gcc_assert (i
!= noperands
- 1);
2756 /* We currently only support one commutative pair of
2757 operands. Some existing asm code currently uses more
2758 than one pair. Previously, that would usually work,
2759 but sometimes it would crash the compiler. We
2760 continue supporting that case as well as we can by
2761 silently ignoring all but the first pair. In the
2762 future we may handle it correctly. */
2763 if (commutative
< 0)
2766 gcc_assert (this_insn_is_asm
);
2769 /* Use of ISDIGIT is tempting here, but it may get expensive because
2770 of locale support we don't want. */
2771 case '0': case '1': case '2': case '3': case '4':
2772 case '5': case '6': case '7': case '8': case '9':
2774 c
= strtoul (p
- 1, &end
, 10);
2777 operands_match
[c
][i
]
2778 = operands_match_p (recog_data
.operand
[c
],
2779 recog_data
.operand
[i
]);
2781 /* An operand may not match itself. */
2782 gcc_assert (c
!= i
);
2784 /* If C can be commuted with C+1, and C might need to match I,
2785 then C+1 might also need to match I. */
2786 if (commutative
>= 0)
2788 if (c
== commutative
|| c
== commutative
+ 1)
2790 int other
= c
+ (c
== commutative
? 1 : -1);
2791 operands_match
[other
][i
]
2792 = operands_match_p (recog_data
.operand
[other
],
2793 recog_data
.operand
[i
]);
2795 if (i
== commutative
|| i
== commutative
+ 1)
2797 int other
= i
+ (i
== commutative
? 1 : -1);
2798 operands_match
[c
][other
]
2799 = operands_match_p (recog_data
.operand
[c
],
2800 recog_data
.operand
[other
]);
2802 /* Note that C is supposed to be less than I.
2803 No need to consider altering both C and I because in
2804 that case we would alter one into the other. */
2811 /* Examine each operand that is a memory reference or memory address
2812 and reload parts of the addresses into index registers.
2813 Also here any references to pseudo regs that didn't get hard regs
2814 but are equivalent to constants get replaced in the insn itself
2815 with those constants. Nobody will ever see them again.
2817 Finally, set up the preferred classes of each operand. */
2819 for (i
= 0; i
< noperands
; i
++)
2821 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2823 address_reloaded
[i
] = 0;
2824 address_operand_reloaded
[i
] = 0;
2825 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2826 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2829 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2830 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2833 if (*constraints
[i
] == 0)
2834 /* Ignore things like match_operator operands. */
2836 else if (insn_extra_address_constraint
2837 (lookup_constraint (constraints
[i
])))
2839 address_operand_reloaded
[i
]
2840 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2841 recog_data
.operand
[i
],
2842 recog_data
.operand_loc
[i
],
2843 i
, operand_type
[i
], ind_levels
, insn
);
2845 /* If we now have a simple operand where we used to have a
2846 PLUS or MULT, re-recognize and try again. */
2847 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2848 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2849 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2850 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2852 INSN_CODE (insn
) = -1;
2853 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2858 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2859 substed_operand
[i
] = recog_data
.operand
[i
];
2861 /* Address operands are reloaded in their existing mode,
2862 no matter what is specified in the machine description. */
2863 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2865 /* If the address is a single CONST_INT pick address mode
2866 instead otherwise we will later not know in which mode
2867 the reload should be performed. */
2868 if (operand_mode
[i
] == VOIDmode
)
2869 operand_mode
[i
] = Pmode
;
2872 else if (code
== MEM
)
2875 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2876 recog_data
.operand_loc
[i
],
2877 XEXP (recog_data
.operand
[i
], 0),
2878 &XEXP (recog_data
.operand
[i
], 0),
2879 i
, address_type
[i
], ind_levels
, insn
);
2880 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2881 substed_operand
[i
] = recog_data
.operand
[i
];
2883 else if (code
== SUBREG
)
2885 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2887 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2890 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2892 &address_reloaded
[i
]);
2894 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2895 that didn't get a hard register, emit a USE with a REG_EQUAL
2896 note in front so that we might inherit a previous, possibly
2902 && (GET_MODE_SIZE (GET_MODE (reg
))
2903 >= GET_MODE_SIZE (GET_MODE (op
)))
2904 && reg_equiv_constant (REGNO (reg
)) == 0)
2905 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2907 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2909 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2911 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2912 /* We can get a PLUS as an "operand" as a result of register
2913 elimination. See eliminate_regs and gen_reload. We handle
2914 a unary operator by reloading the operand. */
2915 substed_operand
[i
] = recog_data
.operand
[i
]
2916 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2917 ind_levels
, 0, insn
,
2918 &address_reloaded
[i
]);
2919 else if (code
== REG
)
2921 /* This is equivalent to calling find_reloads_toplev.
2922 The code is duplicated for speed.
2923 When we find a pseudo always equivalent to a constant,
2924 we replace it by the constant. We must be sure, however,
2925 that we don't try to replace it in the insn in which it
2927 int regno
= REGNO (recog_data
.operand
[i
]);
2928 if (reg_equiv_constant (regno
) != 0
2929 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2931 /* Record the existing mode so that the check if constants are
2932 allowed will work when operand_mode isn't specified. */
2934 if (operand_mode
[i
] == VOIDmode
)
2935 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2937 substed_operand
[i
] = recog_data
.operand
[i
]
2938 = reg_equiv_constant (regno
);
2940 if (reg_equiv_memory_loc (regno
) != 0
2941 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2942 /* We need not give a valid is_set_dest argument since the case
2943 of a constant equivalence was checked above. */
2944 substed_operand
[i
] = recog_data
.operand
[i
]
2945 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2946 ind_levels
, 0, insn
,
2947 &address_reloaded
[i
]);
2949 /* If the operand is still a register (we didn't replace it with an
2950 equivalent), get the preferred class to reload it into. */
2951 code
= GET_CODE (recog_data
.operand
[i
]);
2953 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2954 >= FIRST_PSEUDO_REGISTER
)
2955 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2959 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2960 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2963 /* If this is simply a copy from operand 1 to operand 0, merge the
2964 preferred classes for the operands. */
2965 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2966 && recog_data
.operand
[1] == SET_SRC (set
))
2968 preferred_class
[0] = preferred_class
[1]
2969 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2970 pref_or_nothing
[0] |= pref_or_nothing
[1];
2971 pref_or_nothing
[1] |= pref_or_nothing
[0];
2974 /* Now see what we need for pseudo-regs that didn't get hard regs
2975 or got the wrong kind of hard reg. For this, we must consider
2976 all the operands together against the register constraints. */
2978 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2980 goal_alternative_swapped
= 0;
2982 /* The constraints are made of several alternatives.
2983 Each operand's constraint looks like foo,bar,... with commas
2984 separating the alternatives. The first alternatives for all
2985 operands go together, the second alternatives go together, etc.
2987 First loop over alternatives. */
2989 alternative_mask enabled
= get_enabled_alternatives (insn
);
2990 for (this_alternative_number
= 0;
2991 this_alternative_number
< n_alternatives
;
2992 this_alternative_number
++)
2996 if (!TEST_BIT (enabled
, this_alternative_number
))
3000 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3001 constraints
[i
] = skip_alternative (constraints
[i
]);
3006 /* If insn is commutative (it's safe to exchange a certain pair
3007 of operands) then we need to try each alternative twice, the
3008 second time matching those two operands as if we had
3009 exchanged them. To do this, really exchange them in
3011 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3013 /* Loop over operands for one constraint alternative. */
3014 /* LOSERS counts those that don't fit this alternative
3015 and would require loading. */
3017 /* BAD is set to 1 if it some operand can't fit this alternative
3018 even after reloading. */
3020 /* REJECT is a count of how undesirable this alternative says it is
3021 if any reloading is required. If the alternative matches exactly
3022 then REJECT is ignored, but otherwise it gets this much
3023 counted against it in addition to the reloading needed. Each
3024 ? counts three times here since we want the disparaging caused by
3025 a bad register class to only count 1/3 as much. */
3030 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3031 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3032 /* Swap the duplicates too. */
3033 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3034 if (recog_data
.dup_num
[i
] == commutative
3035 || recog_data
.dup_num
[i
] == commutative
+ 1)
3036 *recog_data
.dup_loc
[i
]
3037 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3039 std::swap (preferred_class
[commutative
],
3040 preferred_class
[commutative
+ 1]);
3041 std::swap (pref_or_nothing
[commutative
],
3042 pref_or_nothing
[commutative
+ 1]);
3043 std::swap (address_reloaded
[commutative
],
3044 address_reloaded
[commutative
+ 1]);
3047 this_earlyclobber
= 0;
3049 for (i
= 0; i
< noperands
; i
++)
3051 const char *p
= constraints
[i
];
3056 /* 0 => this operand can be reloaded somehow for this alternative. */
3058 /* 0 => this operand can be reloaded if the alternative allows regs. */
3062 rtx operand
= recog_data
.operand
[i
];
3064 /* Nonzero means this is a MEM that must be reloaded into a reg
3065 regardless of what the constraint says. */
3066 int force_reload
= 0;
3068 /* Nonzero if a constant forced into memory would be OK for this
3071 int earlyclobber
= 0;
3072 enum constraint_num cn
;
3075 /* If the predicate accepts a unary operator, it means that
3076 we need to reload the operand, but do not do this for
3077 match_operator and friends. */
3078 if (UNARY_P (operand
) && *p
!= 0)
3079 operand
= XEXP (operand
, 0);
3081 /* If the operand is a SUBREG, extract
3082 the REG or MEM (or maybe even a constant) within.
3083 (Constants can occur as a result of reg_equiv_constant.) */
3085 while (GET_CODE (operand
) == SUBREG
)
3087 /* Offset only matters when operand is a REG and
3088 it is a hard reg. This is because it is passed
3089 to reg_fits_class_p if it is a REG and all pseudos
3090 return 0 from that function. */
3091 if (REG_P (SUBREG_REG (operand
))
3092 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3094 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3095 GET_MODE (SUBREG_REG (operand
)),
3096 SUBREG_BYTE (operand
),
3097 GET_MODE (operand
)) < 0)
3099 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3100 GET_MODE (SUBREG_REG (operand
)),
3101 SUBREG_BYTE (operand
),
3102 GET_MODE (operand
));
3104 operand
= SUBREG_REG (operand
);
3105 /* Force reload if this is a constant or PLUS or if there may
3106 be a problem accessing OPERAND in the outer mode. */
3107 scalar_int_mode inner_mode
;
3108 if (CONSTANT_P (operand
)
3109 || GET_CODE (operand
) == PLUS
3110 /* We must force a reload of paradoxical SUBREGs
3111 of a MEM because the alignment of the inner value
3112 may not be enough to do the outer reference. On
3113 big-endian machines, it may also reference outside
3116 On machines that extend byte operations and we have a
3117 SUBREG where both the inner and outer modes are no wider
3118 than a word and the inner mode is narrower, is integral,
3119 and gets extended when loaded from memory, combine.c has
3120 made assumptions about the behavior of the machine in such
3121 register access. If the data is, in fact, in memory we
3122 must always load using the size assumed to be in the
3123 register and let the insn do the different-sized
3126 This is doubly true if WORD_REGISTER_OPERATIONS. In
3127 this case eliminate_regs has left non-paradoxical
3128 subregs for push_reload to see. Make sure it does
3129 by forcing the reload.
3131 ??? When is it right at this stage to have a subreg
3132 of a mem that is _not_ to be handled specially? IMO
3133 those should have been reduced to just a mem. */
3134 || ((MEM_P (operand
)
3136 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3137 && (WORD_REGISTER_OPERATIONS
3138 || ((GET_MODE_BITSIZE (GET_MODE (operand
))
3139 < BIGGEST_ALIGNMENT
)
3140 && paradoxical_subreg_p (operand_mode
[i
],
3141 GET_MODE (operand
)))
3143 || ((GET_MODE_SIZE (operand_mode
[i
])
3145 && (is_a
<scalar_int_mode
>
3146 (GET_MODE (operand
), &inner_mode
))
3147 && (GET_MODE_SIZE (inner_mode
)
3149 && paradoxical_subreg_p (operand_mode
[i
],
3151 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)))
3156 this_alternative
[i
] = NO_REGS
;
3157 this_alternative_win
[i
] = 0;
3158 this_alternative_match_win
[i
] = 0;
3159 this_alternative_offmemok
[i
] = 0;
3160 this_alternative_earlyclobber
[i
] = 0;
3161 this_alternative_matches
[i
] = -1;
3163 /* An empty constraint or empty alternative
3164 allows anything which matched the pattern. */
3165 if (*p
== 0 || *p
== ',')
3168 /* Scan this alternative's specs for this operand;
3169 set WIN if the operand fits any letter in this alternative.
3170 Otherwise, clear BADOP if this operand could
3171 fit some letter after reloads,
3172 or set WINREG if this operand could fit after reloads
3173 provided the constraint allows some registers. */
3176 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3194 /* Ignore rest of this alternative as far as
3195 reloading is concerned. */
3198 while (*p
&& *p
!= ',');
3202 case '0': case '1': case '2': case '3': case '4':
3203 case '5': case '6': case '7': case '8': case '9':
3204 m
= strtoul (p
, &end
, 10);
3208 this_alternative_matches
[i
] = m
;
3209 /* We are supposed to match a previous operand.
3210 If we do, we win if that one did.
3211 If we do not, count both of the operands as losers.
3212 (This is too conservative, since most of the time
3213 only a single reload insn will be needed to make
3214 the two operands win. As a result, this alternative
3215 may be rejected when it is actually desirable.) */
3216 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3217 /* If we are matching as if two operands were swapped,
3218 also pretend that operands_match had been computed
3220 But if I is the second of those and C is the first,
3221 don't exchange them, because operands_match is valid
3222 only on one side of its diagonal. */
3224 [(m
== commutative
|| m
== commutative
+ 1)
3225 ? 2 * commutative
+ 1 - m
: m
]
3226 [(i
== commutative
|| i
== commutative
+ 1)
3227 ? 2 * commutative
+ 1 - i
: i
])
3228 : operands_match
[m
][i
])
3230 /* If we are matching a non-offsettable address where an
3231 offsettable address was expected, then we must reject
3232 this combination, because we can't reload it. */
3233 if (this_alternative_offmemok
[m
]
3234 && MEM_P (recog_data
.operand
[m
])
3235 && this_alternative
[m
] == NO_REGS
3236 && ! this_alternative_win
[m
])
3239 did_match
= this_alternative_win
[m
];
3243 /* Operands don't match. */
3246 /* Retroactively mark the operand we had to match
3247 as a loser, if it wasn't already. */
3248 if (this_alternative_win
[m
])
3250 this_alternative_win
[m
] = 0;
3251 if (this_alternative
[m
] == NO_REGS
)
3253 /* But count the pair only once in the total badness of
3254 this alternative, if the pair can be a dummy reload.
3255 The pointers in operand_loc are not swapped; swap
3256 them by hand if necessary. */
3257 if (swapped
&& i
== commutative
)
3258 loc1
= commutative
+ 1;
3259 else if (swapped
&& i
== commutative
+ 1)
3263 if (swapped
&& m
== commutative
)
3264 loc2
= commutative
+ 1;
3265 else if (swapped
&& m
== commutative
+ 1)
3270 = find_dummy_reload (recog_data
.operand
[i
],
3271 recog_data
.operand
[m
],
3272 recog_data
.operand_loc
[loc1
],
3273 recog_data
.operand_loc
[loc2
],
3274 operand_mode
[i
], operand_mode
[m
],
3275 this_alternative
[m
], -1,
3276 this_alternative_earlyclobber
[m
]);
3281 /* This can be fixed with reloads if the operand
3282 we are supposed to match can be fixed with reloads. */
3284 this_alternative
[i
] = this_alternative
[m
];
3286 /* If we have to reload this operand and some previous
3287 operand also had to match the same thing as this
3288 operand, we don't know how to do that. So reject this
3290 if (! did_match
|| force_reload
)
3291 for (j
= 0; j
< i
; j
++)
3292 if (this_alternative_matches
[j
]
3293 == this_alternative_matches
[i
])
3301 /* All necessary reloads for an address_operand
3302 were handled in find_reloads_address. */
3304 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3310 case TARGET_MEM_CONSTRAINT
:
3315 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3316 && reg_renumber
[REGNO (operand
)] < 0))
3318 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3325 && ! address_reloaded
[i
]
3326 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3327 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3333 && ! address_reloaded
[i
]
3334 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3335 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3339 /* Memory operand whose address is not offsettable. */
3344 && ! (ind_levels
? offsettable_memref_p (operand
)
3345 : offsettable_nonstrict_memref_p (operand
))
3346 /* Certain mem addresses will become offsettable
3347 after they themselves are reloaded. This is important;
3348 we don't want our own handling of unoffsettables
3349 to override the handling of reg_equiv_address. */
3350 && !(REG_P (XEXP (operand
, 0))
3352 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3356 /* Memory operand whose address is offsettable. */
3360 if ((MEM_P (operand
)
3361 /* If IND_LEVELS, find_reloads_address won't reload a
3362 pseudo that didn't get a hard reg, so we have to
3363 reject that case. */
3364 && ((ind_levels
? offsettable_memref_p (operand
)
3365 : offsettable_nonstrict_memref_p (operand
))
3366 /* A reloaded address is offsettable because it is now
3367 just a simple register indirect. */
3368 || address_reloaded
[i
] == 1))
3370 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3371 && reg_renumber
[REGNO (operand
)] < 0
3372 /* If reg_equiv_address is nonzero, we will be
3373 loading it into a register; hence it will be
3374 offsettable, but we cannot say that reg_equiv_mem
3375 is offsettable without checking. */
3376 && ((reg_equiv_mem (REGNO (operand
)) != 0
3377 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3378 || (reg_equiv_address (REGNO (operand
)) != 0))))
3380 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3388 /* Output operand that is stored before the need for the
3389 input operands (and their index registers) is over. */
3390 earlyclobber
= 1, this_earlyclobber
= 1;
3400 /* A PLUS is never a valid operand, but reload can make
3401 it from a register when eliminating registers. */
3402 && GET_CODE (operand
) != PLUS
3403 /* A SCRATCH is not a valid operand. */
3404 && GET_CODE (operand
) != SCRATCH
3405 && (! CONSTANT_P (operand
)
3407 || LEGITIMATE_PIC_OPERAND_P (operand
))
3408 && (GENERAL_REGS
== ALL_REGS
3410 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3411 && reg_renumber
[REGNO (operand
)] < 0)))
3417 cn
= lookup_constraint (p
);
3418 switch (get_constraint_type (cn
))
3421 cl
= reg_class_for_constraint (cn
);
3427 if (CONST_INT_P (operand
)
3428 && (insn_const_int_ok_for_constraint
3429 (INTVAL (operand
), cn
)))
3436 if (constraint_satisfied_p (operand
, cn
))
3438 /* If the address was already reloaded,
3440 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3442 /* Likewise if the address will be reloaded because
3443 reg_equiv_address is nonzero. For reg_equiv_mem
3444 we have to check. */
3445 else if (REG_P (operand
)
3446 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3447 && reg_renumber
[REGNO (operand
)] < 0
3448 && ((reg_equiv_mem (REGNO (operand
)) != 0
3449 && (constraint_satisfied_p
3450 (reg_equiv_mem (REGNO (operand
)),
3452 || (reg_equiv_address (REGNO (operand
))
3456 /* If we didn't already win, we can reload
3457 constants via force_const_mem, and other
3458 MEMs by reloading the address like for 'o'. */
3459 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3466 case CT_SPECIAL_MEMORY
:
3469 if (constraint_satisfied_p (operand
, cn
))
3471 /* Likewise if the address will be reloaded because
3472 reg_equiv_address is nonzero. For reg_equiv_mem
3473 we have to check. */
3474 else if (REG_P (operand
)
3475 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3476 && reg_renumber
[REGNO (operand
)] < 0
3477 && reg_equiv_mem (REGNO (operand
)) != 0
3478 && (constraint_satisfied_p
3479 (reg_equiv_mem (REGNO (operand
)), cn
)))
3484 if (constraint_satisfied_p (operand
, cn
))
3487 /* If we didn't already win, we can reload
3488 the address into a base register. */
3490 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3496 if (constraint_satisfied_p (operand
, cn
))
3504 = reg_class_subunion
[this_alternative
[i
]][cl
];
3505 if (GET_MODE (operand
) == BLKmode
)
3509 && reg_fits_class_p (operand
, this_alternative
[i
],
3510 offset
, GET_MODE (recog_data
.operand
[i
])))
3514 while ((p
+= len
), c
);
3516 if (swapped
== (commutative
>= 0 ? 1 : 0))
3519 /* If this operand could be handled with a reg,
3520 and some reg is allowed, then this operand can be handled. */
3521 if (winreg
&& this_alternative
[i
] != NO_REGS
3522 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3525 /* Record which operands fit this alternative. */
3526 this_alternative_earlyclobber
[i
] = earlyclobber
;
3527 if (win
&& ! force_reload
)
3528 this_alternative_win
[i
] = 1;
3529 else if (did_match
&& ! force_reload
)
3530 this_alternative_match_win
[i
] = 1;
3533 int const_to_mem
= 0;
3535 this_alternative_offmemok
[i
] = offmemok
;
3539 /* Alternative loses if it has no regs for a reg operand. */
3541 && this_alternative
[i
] == NO_REGS
3542 && this_alternative_matches
[i
] < 0)
3545 /* If this is a constant that is reloaded into the desired
3546 class by copying it to memory first, count that as another
3547 reload. This is consistent with other code and is
3548 required to avoid choosing another alternative when
3549 the constant is moved into memory by this function on
3550 an early reload pass. Note that the test here is
3551 precisely the same as in the code below that calls
3553 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3554 && ((targetm
.preferred_reload_class (operand
,
3555 this_alternative
[i
])
3557 || no_input_reloads
))
3560 if (this_alternative
[i
] != NO_REGS
)
3564 /* Alternative loses if it requires a type of reload not
3565 permitted for this insn. We can always reload SCRATCH
3566 and objects with a REG_UNUSED note. */
3567 if (GET_CODE (operand
) != SCRATCH
3568 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3569 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3571 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3575 /* If we can't reload this value at all, reject this
3576 alternative. Note that we could also lose due to
3577 LIMIT_RELOAD_CLASS, but we don't check that
3580 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3582 if (targetm
.preferred_reload_class (operand
,
3583 this_alternative
[i
])
3587 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3588 && (targetm
.preferred_output_reload_class (operand
,
3589 this_alternative
[i
])
3594 /* We prefer to reload pseudos over reloading other things,
3595 since such reloads may be able to be eliminated later.
3596 If we are reloading a SCRATCH, we won't be generating any
3597 insns, just using a register, so it is also preferred.
3598 So bump REJECT in other cases. Don't do this in the
3599 case where we are forcing a constant into memory and
3600 it will then win since we don't want to have a different
3601 alternative match then. */
3602 if (! (REG_P (operand
)
3603 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3604 && GET_CODE (operand
) != SCRATCH
3605 && ! (const_to_mem
&& constmemok
))
3608 /* Input reloads can be inherited more often than output
3609 reloads can be removed, so penalize output reloads. */
3610 if (operand_type
[i
] != RELOAD_FOR_INPUT
3611 && GET_CODE (operand
) != SCRATCH
)
3615 /* If this operand is a pseudo register that didn't get
3616 a hard reg and this alternative accepts some
3617 register, see if the class that we want is a subset
3618 of the preferred class for this register. If not,
3619 but it intersects that class, use the preferred class
3620 instead. If it does not intersect the preferred
3621 class, show that usage of this alternative should be
3622 discouraged; it will be discouraged more still if the
3623 register is `preferred or nothing'. We do this
3624 because it increases the chance of reusing our spill
3625 register in a later insn and avoiding a pair of
3626 memory stores and loads.
3628 Don't bother with this if this alternative will
3629 accept this operand.
3631 Don't do this for a multiword operand, since it is
3632 only a small win and has the risk of requiring more
3633 spill registers, which could cause a large loss.
3635 Don't do this if the preferred class has only one
3636 register because we might otherwise exhaust the
3639 if (! win
&& ! did_match
3640 && this_alternative
[i
] != NO_REGS
3641 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3642 && reg_class_size
[(int) preferred_class
[i
]] > 0
3643 && ! small_register_class_p (preferred_class
[i
]))
3645 if (! reg_class_subset_p (this_alternative
[i
],
3646 preferred_class
[i
]))
3648 /* Since we don't have a way of forming the intersection,
3649 we just do something special if the preferred class
3650 is a subset of the class we have; that's the most
3651 common case anyway. */
3652 if (reg_class_subset_p (preferred_class
[i
],
3653 this_alternative
[i
]))
3654 this_alternative
[i
] = preferred_class
[i
];
3656 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3661 /* Now see if any output operands that are marked "earlyclobber"
3662 in this alternative conflict with any input operands
3663 or any memory addresses. */
3665 for (i
= 0; i
< noperands
; i
++)
3666 if (this_alternative_earlyclobber
[i
]
3667 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3669 struct decomposition early_data
;
3671 early_data
= decompose (recog_data
.operand
[i
]);
3673 gcc_assert (modified
[i
] != RELOAD_READ
);
3675 if (this_alternative
[i
] == NO_REGS
)
3677 this_alternative_earlyclobber
[i
] = 0;
3678 gcc_assert (this_insn_is_asm
);
3679 error_for_asm (this_insn
,
3680 "%<&%> constraint used with no register class");
3683 for (j
= 0; j
< noperands
; j
++)
3684 /* Is this an input operand or a memory ref? */
3685 if ((MEM_P (recog_data
.operand
[j
])
3686 || modified
[j
] != RELOAD_WRITE
)
3688 /* Ignore things like match_operator operands. */
3689 && !recog_data
.is_operator
[j
]
3690 /* Don't count an input operand that is constrained to match
3691 the early clobber operand. */
3692 && ! (this_alternative_matches
[j
] == i
3693 && rtx_equal_p (recog_data
.operand
[i
],
3694 recog_data
.operand
[j
]))
3695 /* Is it altered by storing the earlyclobber operand? */
3696 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3699 /* If the output is in a non-empty few-regs class,
3700 it's costly to reload it, so reload the input instead. */
3701 if (small_register_class_p (this_alternative
[i
])
3702 && (REG_P (recog_data
.operand
[j
])
3703 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3706 this_alternative_win
[j
] = 0;
3707 this_alternative_match_win
[j
] = 0;
3712 /* If an earlyclobber operand conflicts with something,
3713 it must be reloaded, so request this and count the cost. */
3717 this_alternative_win
[i
] = 0;
3718 this_alternative_match_win
[j
] = 0;
3719 for (j
= 0; j
< noperands
; j
++)
3720 if (this_alternative_matches
[j
] == i
3721 && this_alternative_match_win
[j
])
3723 this_alternative_win
[j
] = 0;
3724 this_alternative_match_win
[j
] = 0;
3730 /* If one alternative accepts all the operands, no reload required,
3731 choose that alternative; don't consider the remaining ones. */
3734 /* Unswap these so that they are never swapped at `finish'. */
3737 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3738 recog_data
.operand
[commutative
+ 1]
3739 = substed_operand
[commutative
+ 1];
3741 for (i
= 0; i
< noperands
; i
++)
3743 goal_alternative_win
[i
] = this_alternative_win
[i
];
3744 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3745 goal_alternative
[i
] = this_alternative
[i
];
3746 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3747 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3748 goal_alternative_earlyclobber
[i
]
3749 = this_alternative_earlyclobber
[i
];
3751 goal_alternative_number
= this_alternative_number
;
3752 goal_alternative_swapped
= swapped
;
3753 goal_earlyclobber
= this_earlyclobber
;
3757 /* REJECT, set by the ! and ? constraint characters and when a register
3758 would be reloaded into a non-preferred class, discourages the use of
3759 this alternative for a reload goal. REJECT is incremented by six
3760 for each ? and two for each non-preferred class. */
3761 losers
= losers
* 6 + reject
;
3763 /* If this alternative can be made to work by reloading,
3764 and it needs less reloading than the others checked so far,
3765 record it as the chosen goal for reloading. */
3770 for (i
= 0; i
< noperands
; i
++)
3772 goal_alternative
[i
] = this_alternative
[i
];
3773 goal_alternative_win
[i
] = this_alternative_win
[i
];
3774 goal_alternative_match_win
[i
]
3775 = this_alternative_match_win
[i
];
3776 goal_alternative_offmemok
[i
]
3777 = this_alternative_offmemok
[i
];
3778 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3779 goal_alternative_earlyclobber
[i
]
3780 = this_alternative_earlyclobber
[i
];
3782 goal_alternative_swapped
= swapped
;
3784 goal_alternative_number
= this_alternative_number
;
3785 goal_earlyclobber
= this_earlyclobber
;
3791 /* If the commutative operands have been swapped, swap
3792 them back in order to check the next alternative. */
3793 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3794 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3795 /* Unswap the duplicates too. */
3796 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3797 if (recog_data
.dup_num
[i
] == commutative
3798 || recog_data
.dup_num
[i
] == commutative
+ 1)
3799 *recog_data
.dup_loc
[i
]
3800 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3802 /* Unswap the operand related information as well. */
3803 std::swap (preferred_class
[commutative
],
3804 preferred_class
[commutative
+ 1]);
3805 std::swap (pref_or_nothing
[commutative
],
3806 pref_or_nothing
[commutative
+ 1]);
3807 std::swap (address_reloaded
[commutative
],
3808 address_reloaded
[commutative
+ 1]);
3813 /* The operands don't meet the constraints.
3814 goal_alternative describes the alternative
3815 that we could reach by reloading the fewest operands.
3816 Reload so as to fit it. */
3818 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3820 /* No alternative works with reloads?? */
3821 if (insn_code_number
>= 0)
3822 fatal_insn ("unable to generate reloads for:", insn
);
3823 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3824 /* Avoid further trouble with this insn. */
3825 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3830 /* Jump to `finish' from above if all operands are valid already.
3831 In that case, goal_alternative_win is all 1. */
3834 /* Right now, for any pair of operands I and J that are required to match,
3836 goal_alternative_matches[J] is I.
3837 Set up goal_alternative_matched as the inverse function:
3838 goal_alternative_matched[I] = J. */
3840 for (i
= 0; i
< noperands
; i
++)
3841 goal_alternative_matched
[i
] = -1;
3843 for (i
= 0; i
< noperands
; i
++)
3844 if (! goal_alternative_win
[i
]
3845 && goal_alternative_matches
[i
] >= 0)
3846 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3848 for (i
= 0; i
< noperands
; i
++)
3849 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3851 /* If the best alternative is with operands 1 and 2 swapped,
3852 consider them swapped before reporting the reloads. Update the
3853 operand numbers of any reloads already pushed. */
3855 if (goal_alternative_swapped
)
3857 std::swap (substed_operand
[commutative
],
3858 substed_operand
[commutative
+ 1]);
3859 std::swap (recog_data
.operand
[commutative
],
3860 recog_data
.operand
[commutative
+ 1]);
3861 std::swap (*recog_data
.operand_loc
[commutative
],
3862 *recog_data
.operand_loc
[commutative
+ 1]);
3864 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3865 if (recog_data
.dup_num
[i
] == commutative
3866 || recog_data
.dup_num
[i
] == commutative
+ 1)
3867 *recog_data
.dup_loc
[i
]
3868 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3870 for (i
= 0; i
< n_reloads
; i
++)
3872 if (rld
[i
].opnum
== commutative
)
3873 rld
[i
].opnum
= commutative
+ 1;
3874 else if (rld
[i
].opnum
== commutative
+ 1)
3875 rld
[i
].opnum
= commutative
;
3879 for (i
= 0; i
< noperands
; i
++)
3881 operand_reloadnum
[i
] = -1;
3883 /* If this is an earlyclobber operand, we need to widen the scope.
3884 The reload must remain valid from the start of the insn being
3885 reloaded until after the operand is stored into its destination.
3886 We approximate this with RELOAD_OTHER even though we know that we
3887 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3889 One special case that is worth checking is when we have an
3890 output that is earlyclobber but isn't used past the insn (typically
3891 a SCRATCH). In this case, we only need have the reload live
3892 through the insn itself, but not for any of our input or output
3894 But we must not accidentally narrow the scope of an existing
3895 RELOAD_OTHER reload - leave these alone.
3897 In any case, anything needed to address this operand can remain
3898 however they were previously categorized. */
3900 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3902 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3903 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3906 /* Any constants that aren't allowed and can't be reloaded
3907 into registers are here changed into memory references. */
3908 for (i
= 0; i
< noperands
; i
++)
3909 if (! goal_alternative_win
[i
])
3911 rtx op
= recog_data
.operand
[i
];
3912 rtx subreg
= NULL_RTX
;
3913 rtx plus
= NULL_RTX
;
3914 machine_mode mode
= operand_mode
[i
];
3916 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3917 push_reload so we have to let them pass here. */
3918 if (GET_CODE (op
) == SUBREG
)
3921 op
= SUBREG_REG (op
);
3922 mode
= GET_MODE (op
);
3925 if (GET_CODE (op
) == PLUS
)
3931 if (CONST_POOL_OK_P (mode
, op
)
3932 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3934 || no_input_reloads
))
3936 int this_address_reloaded
;
3937 rtx tem
= force_const_mem (mode
, op
);
3939 /* If we stripped a SUBREG or a PLUS above add it back. */
3940 if (plus
!= NULL_RTX
)
3941 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3943 if (subreg
!= NULL_RTX
)
3944 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3946 this_address_reloaded
= 0;
3947 substed_operand
[i
] = recog_data
.operand
[i
]
3948 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3949 0, insn
, &this_address_reloaded
);
3951 /* If the alternative accepts constant pool refs directly
3952 there will be no reload needed at all. */
3953 if (plus
== NULL_RTX
3954 && subreg
== NULL_RTX
3955 && alternative_allows_const_pool_ref (this_address_reloaded
!= 1
3956 ? substed_operand
[i
]
3958 recog_data
.constraints
[i
],
3959 goal_alternative_number
))
3960 goal_alternative_win
[i
] = 1;
3964 /* Record the values of the earlyclobber operands for the caller. */
3965 if (goal_earlyclobber
)
3966 for (i
= 0; i
< noperands
; i
++)
3967 if (goal_alternative_earlyclobber
[i
])
3968 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3970 /* Now record reloads for all the operands that need them. */
3971 for (i
= 0; i
< noperands
; i
++)
3972 if (! goal_alternative_win
[i
])
3974 /* Operands that match previous ones have already been handled. */
3975 if (goal_alternative_matches
[i
] >= 0)
3977 /* Handle an operand with a nonoffsettable address
3978 appearing where an offsettable address will do
3979 by reloading the address into a base register.
3981 ??? We can also do this when the operand is a register and
3982 reg_equiv_mem is not offsettable, but this is a bit tricky,
3983 so we don't bother with it. It may not be worth doing. */
3984 else if (goal_alternative_matched
[i
] == -1
3985 && goal_alternative_offmemok
[i
]
3986 && MEM_P (recog_data
.operand
[i
]))
3988 /* If the address to be reloaded is a VOIDmode constant,
3989 use the default address mode as mode of the reload register,
3990 as would have been done by find_reloads_address. */
3991 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
3992 machine_mode address_mode
;
3994 address_mode
= get_address_mode (recog_data
.operand
[i
]);
3995 operand_reloadnum
[i
]
3996 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3997 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3998 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4000 VOIDmode
, 0, 0, i
, RELOAD_OTHER
);
4001 rld
[operand_reloadnum
[i
]].inc
4002 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4004 /* If this operand is an output, we will have made any
4005 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4006 now we are treating part of the operand as an input, so
4007 we must change these to RELOAD_FOR_OTHER_ADDRESS. */
4009 if (modified
[i
] == RELOAD_WRITE
)
4011 for (j
= 0; j
< n_reloads
; j
++)
4013 if (rld
[j
].opnum
== i
)
4015 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4016 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4017 else if (rld
[j
].when_needed
4018 == RELOAD_FOR_OUTADDR_ADDRESS
)
4019 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4024 else if (goal_alternative_matched
[i
] == -1)
4026 operand_reloadnum
[i
]
4027 = push_reload ((modified
[i
] != RELOAD_WRITE
4028 ? recog_data
.operand
[i
] : 0),
4029 (modified
[i
] != RELOAD_READ
4030 ? recog_data
.operand
[i
] : 0),
4031 (modified
[i
] != RELOAD_WRITE
4032 ? recog_data
.operand_loc
[i
] : 0),
4033 (modified
[i
] != RELOAD_READ
4034 ? recog_data
.operand_loc
[i
] : 0),
4035 (enum reg_class
) goal_alternative
[i
],
4036 (modified
[i
] == RELOAD_WRITE
4037 ? VOIDmode
: operand_mode
[i
]),
4038 (modified
[i
] == RELOAD_READ
4039 ? VOIDmode
: operand_mode
[i
]),
4040 (insn_code_number
< 0 ? 0
4041 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4042 0, i
, operand_type
[i
]);
4044 /* In a matching pair of operands, one must be input only
4045 and the other must be output only.
4046 Pass the input operand as IN and the other as OUT. */
4047 else if (modified
[i
] == RELOAD_READ
4048 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4050 operand_reloadnum
[i
]
4051 = push_reload (recog_data
.operand
[i
],
4052 recog_data
.operand
[goal_alternative_matched
[i
]],
4053 recog_data
.operand_loc
[i
],
4054 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4055 (enum reg_class
) goal_alternative
[i
],
4057 operand_mode
[goal_alternative_matched
[i
]],
4058 0, 0, i
, RELOAD_OTHER
);
4059 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4061 else if (modified
[i
] == RELOAD_WRITE
4062 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4064 operand_reloadnum
[goal_alternative_matched
[i
]]
4065 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4066 recog_data
.operand
[i
],
4067 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4068 recog_data
.operand_loc
[i
],
4069 (enum reg_class
) goal_alternative
[i
],
4070 operand_mode
[goal_alternative_matched
[i
]],
4072 0, 0, i
, RELOAD_OTHER
);
4073 operand_reloadnum
[i
] = output_reloadnum
;
4077 gcc_assert (insn_code_number
< 0);
4078 error_for_asm (insn
, "inconsistent operand constraints "
4080 /* Avoid further trouble with this insn. */
4081 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4086 else if (goal_alternative_matched
[i
] < 0
4087 && goal_alternative_matches
[i
] < 0
4088 && address_operand_reloaded
[i
] != 1
4091 /* For each non-matching operand that's a MEM or a pseudo-register
4092 that didn't get a hard register, make an optional reload.
4093 This may get done even if the insn needs no reloads otherwise. */
4095 rtx operand
= recog_data
.operand
[i
];
4097 while (GET_CODE (operand
) == SUBREG
)
4098 operand
= SUBREG_REG (operand
);
4099 if ((MEM_P (operand
)
4101 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4102 /* If this is only for an output, the optional reload would not
4103 actually cause us to use a register now, just note that
4104 something is stored here. */
4105 && (goal_alternative
[i
] != NO_REGS
4106 || modified
[i
] == RELOAD_WRITE
)
4107 && ! no_input_reloads
4108 /* An optional output reload might allow to delete INSN later.
4109 We mustn't make in-out reloads on insns that are not permitted
4111 If this is an asm, we can't delete it; we must not even call
4112 push_reload for an optional output reload in this case,
4113 because we can't be sure that the constraint allows a register,
4114 and push_reload verifies the constraints for asms. */
4115 && (modified
[i
] == RELOAD_READ
4116 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4117 operand_reloadnum
[i
]
4118 = push_reload ((modified
[i
] != RELOAD_WRITE
4119 ? recog_data
.operand
[i
] : 0),
4120 (modified
[i
] != RELOAD_READ
4121 ? recog_data
.operand
[i
] : 0),
4122 (modified
[i
] != RELOAD_WRITE
4123 ? recog_data
.operand_loc
[i
] : 0),
4124 (modified
[i
] != RELOAD_READ
4125 ? recog_data
.operand_loc
[i
] : 0),
4126 (enum reg_class
) goal_alternative
[i
],
4127 (modified
[i
] == RELOAD_WRITE
4128 ? VOIDmode
: operand_mode
[i
]),
4129 (modified
[i
] == RELOAD_READ
4130 ? VOIDmode
: operand_mode
[i
]),
4131 (insn_code_number
< 0 ? 0
4132 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4133 1, i
, operand_type
[i
]);
4134 /* If a memory reference remains (either as a MEM or a pseudo that
4135 did not get a hard register), yet we can't make an optional
4136 reload, check if this is actually a pseudo register reference;
4137 we then need to emit a USE and/or a CLOBBER so that reload
4138 inheritance will do the right thing. */
4142 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4143 && reg_renumber
[REGNO (operand
)] < 0)))
4145 operand
= *recog_data
.operand_loc
[i
];
4147 while (GET_CODE (operand
) == SUBREG
)
4148 operand
= SUBREG_REG (operand
);
4149 if (REG_P (operand
))
4151 if (modified
[i
] != RELOAD_WRITE
)
4152 /* We mark the USE with QImode so that we recognize
4153 it as one that can be safely deleted at the end
4155 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4157 if (modified
[i
] != RELOAD_READ
)
4158 emit_insn_after (gen_clobber (operand
), insn
);
4162 else if (goal_alternative_matches
[i
] >= 0
4163 && goal_alternative_win
[goal_alternative_matches
[i
]]
4164 && modified
[i
] == RELOAD_READ
4165 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4166 && ! no_input_reloads
&& ! no_output_reloads
4169 /* Similarly, make an optional reload for a pair of matching
4170 objects that are in MEM or a pseudo that didn't get a hard reg. */
4172 rtx operand
= recog_data
.operand
[i
];
4174 while (GET_CODE (operand
) == SUBREG
)
4175 operand
= SUBREG_REG (operand
);
4176 if ((MEM_P (operand
)
4178 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4179 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4180 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4181 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4182 recog_data
.operand
[i
],
4183 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4184 recog_data
.operand_loc
[i
],
4185 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4186 operand_mode
[goal_alternative_matches
[i
]],
4188 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4191 /* Perform whatever substitutions on the operands we are supposed
4192 to make due to commutativity or replacement of registers
4193 with equivalent constants or memory slots. */
4195 for (i
= 0; i
< noperands
; i
++)
4197 /* We only do this on the last pass through reload, because it is
4198 possible for some data (like reg_equiv_address) to be changed during
4199 later passes. Moreover, we lose the opportunity to get a useful
4200 reload_{in,out}_reg when we do these replacements. */
4204 rtx substitution
= substed_operand
[i
];
4206 *recog_data
.operand_loc
[i
] = substitution
;
4208 /* If we're replacing an operand with a LABEL_REF, we need to
4209 make sure that there's a REG_LABEL_OPERAND note attached to
4210 this instruction. */
4211 if (GET_CODE (substitution
) == LABEL_REF
4212 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4213 label_ref_label (substitution
))
4214 /* For a JUMP_P, if it was a branch target it must have
4215 already been recorded as such. */
4217 || !label_is_jump_target_p (label_ref_label (substitution
),
4220 add_reg_note (insn
, REG_LABEL_OPERAND
,
4221 label_ref_label (substitution
));
4222 if (LABEL_P (label_ref_label (substitution
)))
4223 ++LABEL_NUSES (label_ref_label (substitution
));
4228 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4231 /* If this insn pattern contains any MATCH_DUP's, make sure that
4232 they will be substituted if the operands they match are substituted.
4233 Also do now any substitutions we already did on the operands.
4235 Don't do this if we aren't making replacements because we might be
4236 propagating things allocated by frame pointer elimination into places
4237 it doesn't expect. */
4239 if (insn_code_number
>= 0 && replace
)
4240 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4242 int opno
= recog_data
.dup_num
[i
];
4243 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4244 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4248 /* This loses because reloading of prior insns can invalidate the equivalence
4249 (or at least find_equiv_reg isn't smart enough to find it any more),
4250 causing this insn to need more reload regs than it needed before.
4251 It may be too late to make the reload regs available.
4252 Now this optimization is done safely in choose_reload_regs. */
4254 /* For each reload of a reg into some other class of reg,
4255 search for an existing equivalent reg (same value now) in the right class.
4256 We can use it as long as we don't need to change its contents. */
4257 for (i
= 0; i
< n_reloads
; i
++)
4258 if (rld
[i
].reg_rtx
== 0
4260 && REG_P (rld
[i
].in
)
4264 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4265 static_reload_reg_p
, 0, rld
[i
].inmode
);
4266 /* Prevent generation of insn to load the value
4267 because the one we found already has the value. */
4269 rld
[i
].in
= rld
[i
].reg_rtx
;
4273 /* If we detected error and replaced asm instruction by USE, forget about the
4275 if (GET_CODE (PATTERN (insn
)) == USE
4276 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4279 /* Perhaps an output reload can be combined with another
4280 to reduce needs by one. */
4281 if (!goal_earlyclobber
)
4284 /* If we have a pair of reloads for parts of an address, they are reloading
4285 the same object, the operands themselves were not reloaded, and they
4286 are for two operands that are supposed to match, merge the reloads and
4287 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4289 for (i
= 0; i
< n_reloads
; i
++)
4293 for (j
= i
+ 1; j
< n_reloads
; j
++)
4294 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4295 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4296 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4297 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4298 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4299 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4300 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4301 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4302 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4303 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4304 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4305 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4306 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4307 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4308 || (goal_alternative_matches
[rld
[j
].opnum
]
4311 for (k
= 0; k
< n_replacements
; k
++)
4312 if (replacements
[k
].what
== j
)
4313 replacements
[k
].what
= i
;
4315 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4316 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4317 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4319 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4324 /* Scan all the reloads and update their type.
4325 If a reload is for the address of an operand and we didn't reload
4326 that operand, change the type. Similarly, change the operand number
4327 of a reload when two operands match. If a reload is optional, treat it
4328 as though the operand isn't reloaded.
4330 ??? This latter case is somewhat odd because if we do the optional
4331 reload, it means the object is hanging around. Thus we need only
4332 do the address reload if the optional reload was NOT done.
4334 Change secondary reloads to be the address type of their operand, not
4337 If an operand's reload is now RELOAD_OTHER, change any
4338 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4339 RELOAD_FOR_OTHER_ADDRESS. */
4341 for (i
= 0; i
< n_reloads
; i
++)
4343 if (rld
[i
].secondary_p
4344 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4345 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4347 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4348 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4349 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4350 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4351 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4352 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4354 /* If we have a secondary reload to go along with this reload,
4355 change its type to RELOAD_FOR_OPADDR_ADDR. */
4357 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4358 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4359 && rld
[i
].secondary_in_reload
!= -1)
4361 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4363 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4365 /* If there's a tertiary reload we have to change it also. */
4366 if (secondary_in_reload
> 0
4367 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4368 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4369 = RELOAD_FOR_OPADDR_ADDR
;
4372 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4373 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4374 && rld
[i
].secondary_out_reload
!= -1)
4376 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4378 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4380 /* If there's a tertiary reload we have to change it also. */
4381 if (secondary_out_reload
4382 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4383 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4384 = RELOAD_FOR_OPADDR_ADDR
;
4387 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4388 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4389 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4391 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4394 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4395 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4396 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4397 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4399 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4401 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4402 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4405 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4406 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4407 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4409 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4410 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4411 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4412 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4413 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4414 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4415 This is complicated by the fact that a single operand can have more
4416 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4417 choose_reload_regs without affecting code quality, and cases that
4418 actually fail are extremely rare, so it turns out to be better to fix
4419 the problem here by not generating cases that choose_reload_regs will
4421 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4422 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4424 We can reduce the register pressure by exploiting that a
4425 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4426 does not conflict with any of them, if it is only used for the first of
4427 the RELOAD_FOR_X_ADDRESS reloads. */
4429 int first_op_addr_num
= -2;
4430 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4431 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4432 int need_change
= 0;
4433 /* We use last_op_addr_reload and the contents of the above arrays
4434 first as flags - -2 means no instance encountered, -1 means exactly
4435 one instance encountered.
4436 If more than one instance has been encountered, we store the reload
4437 number of the first reload of the kind in question; reload numbers
4438 are known to be non-negative. */
4439 for (i
= 0; i
< noperands
; i
++)
4440 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4441 for (i
= n_reloads
- 1; i
>= 0; i
--)
4443 switch (rld
[i
].when_needed
)
4445 case RELOAD_FOR_OPERAND_ADDRESS
:
4446 if (++first_op_addr_num
>= 0)
4448 first_op_addr_num
= i
;
4452 case RELOAD_FOR_INPUT_ADDRESS
:
4453 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4455 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4459 case RELOAD_FOR_OUTPUT_ADDRESS
:
4460 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4462 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4473 for (i
= 0; i
< n_reloads
; i
++)
4476 enum reload_type type
;
4478 switch (rld
[i
].when_needed
)
4480 case RELOAD_FOR_OPADDR_ADDR
:
4481 first_num
= first_op_addr_num
;
4482 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4484 case RELOAD_FOR_INPADDR_ADDRESS
:
4485 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4486 type
= RELOAD_FOR_INPUT_ADDRESS
;
4488 case RELOAD_FOR_OUTADDR_ADDRESS
:
4489 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4490 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4497 else if (i
> first_num
)
4498 rld
[i
].when_needed
= type
;
4501 /* Check if the only TYPE reload that uses reload I is
4502 reload FIRST_NUM. */
4503 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4505 if (rld
[j
].when_needed
== type
4506 && (rld
[i
].secondary_p
4507 ? rld
[j
].secondary_in_reload
== i
4508 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4510 rld
[i
].when_needed
= type
;
4519 /* See if we have any reloads that are now allowed to be merged
4520 because we've changed when the reload is needed to
4521 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4522 check for the most common cases. */
4524 for (i
= 0; i
< n_reloads
; i
++)
4525 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4526 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4527 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4528 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4529 for (j
= 0; j
< n_reloads
; j
++)
4530 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4531 && rld
[j
].when_needed
== rld
[i
].when_needed
4532 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4533 && rld
[i
].rclass
== rld
[j
].rclass
4534 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4535 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4537 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4538 transfer_replacements (i
, j
);
4542 /* If we made any reloads for addresses, see if they violate a
4543 "no input reloads" requirement for this insn. But loads that we
4544 do after the insn (such as for output addresses) are fine. */
4545 if (HAVE_cc0
&& no_input_reloads
)
4546 for (i
= 0; i
< n_reloads
; i
++)
4547 gcc_assert (rld
[i
].in
== 0
4548 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4549 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4551 /* Compute reload_mode and reload_nregs. */
4552 for (i
= 0; i
< n_reloads
; i
++)
4554 rld
[i
].mode
= rld
[i
].inmode
;
4555 if (rld
[i
].mode
== VOIDmode
4556 || partial_subreg_p (rld
[i
].mode
, rld
[i
].outmode
))
4557 rld
[i
].mode
= rld
[i
].outmode
;
4559 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4562 /* Special case a simple move with an input reload and a
4563 destination of a hard reg, if the hard reg is ok, use it. */
4564 for (i
= 0; i
< n_reloads
; i
++)
4565 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4566 && GET_CODE (PATTERN (insn
)) == SET
4567 && REG_P (SET_DEST (PATTERN (insn
)))
4568 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4569 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4570 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4572 rtx dest
= SET_DEST (PATTERN (insn
));
4573 unsigned int regno
= REGNO (dest
);
4575 if (regno
< FIRST_PSEUDO_REGISTER
4576 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4577 && targetm
.hard_regno_mode_ok (regno
, rld
[i
].mode
))
4579 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4582 for (nri
= 1; nri
< nr
; nri
++)
4583 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4590 rld
[i
].reg_rtx
= dest
;
4597 /* Return true if alternative number ALTNUM in constraint-string
4598 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4599 MEM gives the reference if its address hasn't been fully reloaded,
4600 otherwise it is NULL. */
4603 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4604 const char *constraint
, int altnum
)
4608 /* Skip alternatives before the one requested. */
4611 while (*constraint
++ != ',')
4615 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4616 If one of them is present, this alternative accepts the result of
4617 passing a constant-pool reference through find_reloads_toplev.
4619 The same is true of extra memory constraints if the address
4620 was reloaded into a register. However, the target may elect
4621 to disallow the original constant address, forcing it to be
4622 reloaded into a register instead. */
4623 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4624 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4626 enum constraint_num cn
= lookup_constraint (constraint
);
4627 if (insn_extra_memory_constraint (cn
)
4628 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4634 /* Scan X for memory references and scan the addresses for reloading.
4635 Also checks for references to "constant" regs that we want to eliminate
4636 and replaces them with the values they stand for.
4637 We may alter X destructively if it contains a reference to such.
4638 If X is just a constant reg, we return the equivalent value
4641 IND_LEVELS says how many levels of indirect addressing this machine
4644 OPNUM and TYPE identify the purpose of the reload.
4646 IS_SET_DEST is true if X is the destination of a SET, which is not
4647 appropriate to be replaced by a constant.
4649 INSN, if nonzero, is the insn in which we do the reload. It is used
4650 to determine if we may generate output reloads, and where to put USEs
4651 for pseudos that we have to replace with stack slots.
4653 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4654 result of find_reloads_address. */
4657 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4658 int ind_levels
, int is_set_dest
, rtx_insn
*insn
,
4659 int *address_reloaded
)
4661 RTX_CODE code
= GET_CODE (x
);
4663 const char *fmt
= GET_RTX_FORMAT (code
);
4669 /* This code is duplicated for speed in find_reloads. */
4670 int regno
= REGNO (x
);
4671 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4672 x
= reg_equiv_constant (regno
);
4674 /* This creates (subreg (mem...)) which would cause an unnecessary
4675 reload of the mem. */
4676 else if (reg_equiv_mem (regno
) != 0)
4677 x
= reg_equiv_mem (regno
);
4679 else if (reg_equiv_memory_loc (regno
)
4680 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4682 rtx mem
= make_memloc (x
, regno
);
4683 if (reg_equiv_address (regno
)
4684 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4686 /* If this is not a toplevel operand, find_reloads doesn't see
4687 this substitution. We have to emit a USE of the pseudo so
4688 that delete_output_reload can see it. */
4689 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4690 /* We mark the USE with QImode so that we recognize it
4691 as one that can be safely deleted at the end of
4693 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4696 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4697 opnum
, type
, ind_levels
, insn
);
4698 if (!rtx_equal_p (x
, mem
))
4699 push_reg_equiv_alt_mem (regno
, x
);
4700 if (address_reloaded
)
4701 *address_reloaded
= i
;
4710 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4711 opnum
, type
, ind_levels
, insn
);
4712 if (address_reloaded
)
4713 *address_reloaded
= i
;
4718 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4720 /* Check for SUBREG containing a REG that's equivalent to a
4721 constant. If the constant has a known value, truncate it
4722 right now. Similarly if we are extracting a single-word of a
4723 multi-word constant. If the constant is symbolic, allow it
4724 to be substituted normally. push_reload will strip the
4725 subreg later. The constant must not be VOIDmode, because we
4726 will lose the mode of the register (this should never happen
4727 because one of the cases above should handle it). */
4729 int regno
= REGNO (SUBREG_REG (x
));
4732 if (regno
>= FIRST_PSEUDO_REGISTER
4733 && reg_renumber
[regno
] < 0
4734 && reg_equiv_constant (regno
) != 0)
4737 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4738 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4740 if (CONSTANT_P (tem
)
4741 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4743 tem
= force_const_mem (GET_MODE (x
), tem
);
4744 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4745 &XEXP (tem
, 0), opnum
, type
,
4747 if (address_reloaded
)
4748 *address_reloaded
= i
;
4753 /* If the subreg contains a reg that will be converted to a mem,
4754 attempt to convert the whole subreg to a (narrower or wider)
4755 memory reference instead. If this succeeds, we're done --
4756 otherwise fall through to check whether the inner reg still
4757 needs address reloads anyway. */
4759 if (regno
>= FIRST_PSEUDO_REGISTER
4760 && reg_equiv_memory_loc (regno
) != 0)
4762 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4763 insn
, address_reloaded
);
4769 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4773 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4774 ind_levels
, is_set_dest
, insn
,
4776 /* If we have replaced a reg with it's equivalent memory loc -
4777 that can still be handled here e.g. if it's in a paradoxical
4778 subreg - we must make the change in a copy, rather than using
4779 a destructive change. This way, find_reloads can still elect
4780 not to do the change. */
4781 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4783 x
= shallow_copy_rtx (x
);
4786 XEXP (x
, i
) = new_part
;
4792 /* Return a mem ref for the memory equivalent of reg REGNO.
4793 This mem ref is not shared with anything. */
4796 make_memloc (rtx ad
, int regno
)
4798 /* We must rerun eliminate_regs, in case the elimination
4799 offsets have changed. */
4801 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4804 /* If TEM might contain a pseudo, we must copy it to avoid
4805 modifying it when we do the substitution for the reload. */
4806 if (rtx_varies_p (tem
, 0))
4807 tem
= copy_rtx (tem
);
4809 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4810 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4812 /* Copy the result if it's still the same as the equivalence, to avoid
4813 modifying it when we do the substitution for the reload. */
4814 if (tem
== reg_equiv_memory_loc (regno
))
4815 tem
= copy_rtx (tem
);
4819 /* Returns true if AD could be turned into a valid memory reference
4820 to mode MODE in address space AS by reloading the part pointed to
4821 by PART into a register. */
4824 maybe_memory_address_addr_space_p (machine_mode mode
, rtx ad
,
4825 addr_space_t as
, rtx
*part
)
4829 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4832 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4838 /* Record all reloads needed for handling memory address AD
4839 which appears in *LOC in a memory reference to mode MODE
4840 which itself is found in location *MEMREFLOC.
4841 Note that we take shortcuts assuming that no multi-reg machine mode
4842 occurs as part of an address.
4844 OPNUM and TYPE specify the purpose of this reload.
4846 IND_LEVELS says how many levels of indirect addressing this machine
4849 INSN, if nonzero, is the insn in which we do the reload. It is used
4850 to determine if we may generate output reloads, and where to put USEs
4851 for pseudos that we have to replace with stack slots.
4853 Value is one if this address is reloaded or replaced as a whole; it is
4854 zero if the top level of this address was not reloaded or replaced, and
4855 it is -1 if it may or may not have been reloaded or replaced.
4857 Note that there is no verification that the address will be valid after
4858 this routine does its work. Instead, we rely on the fact that the address
4859 was valid when reload started. So we need only undo things that reload
4860 could have broken. These are wrong register types, pseudos not allocated
4861 to a hard register, and frame pointer elimination. */
4864 find_reloads_address (machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4865 rtx
*loc
, int opnum
, enum reload_type type
,
4866 int ind_levels
, rtx_insn
*insn
)
4868 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4869 : ADDR_SPACE_GENERIC
;
4871 int removed_and
= 0;
4875 /* If the address is a register, see if it is a legitimate address and
4876 reload if not. We first handle the cases where we need not reload
4877 or where we must reload in a non-standard way. */
4883 if (reg_equiv_constant (regno
) != 0)
4885 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4886 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4887 GET_MODE (ad
), opnum
, type
, ind_levels
);
4891 tem
= reg_equiv_memory_loc (regno
);
4894 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4896 tem
= make_memloc (ad
, regno
);
4897 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4899 MEM_ADDR_SPACE (tem
)))
4903 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4904 &XEXP (tem
, 0), opnum
,
4905 ADDR_TYPE (type
), ind_levels
, insn
);
4906 if (!rtx_equal_p (tem
, orig
))
4907 push_reg_equiv_alt_mem (regno
, tem
);
4909 /* We can avoid a reload if the register's equivalent memory
4910 expression is valid as an indirect memory address.
4911 But not all addresses are valid in a mem used as an indirect
4912 address: only reg or reg+constant. */
4915 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4916 && (REG_P (XEXP (tem
, 0))
4917 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4918 && REG_P (XEXP (XEXP (tem
, 0), 0))
4919 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4921 /* TEM is not the same as what we'll be replacing the
4922 pseudo with after reload, put a USE in front of INSN
4923 in the final reload pass. */
4925 && num_not_at_initial_offset
4926 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4929 /* We mark the USE with QImode so that we
4930 recognize it as one that can be safely
4931 deleted at the end of reload. */
4932 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4935 /* This doesn't really count as replacing the address
4936 as a whole, since it is still a memory access. */
4944 /* The only remaining case where we can avoid a reload is if this is a
4945 hard register that is valid as a base register and which is not the
4946 subject of a CLOBBER in this insn. */
4948 else if (regno
< FIRST_PSEUDO_REGISTER
4949 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
4950 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4953 /* If we do not have one of the cases above, we must do the reload. */
4954 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
4955 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4956 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4960 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4962 /* The address appears valid, so reloads are not needed.
4963 But the address may contain an eliminable register.
4964 This can happen because a machine with indirect addressing
4965 may consider a pseudo register by itself a valid address even when
4966 it has failed to get a hard reg.
4967 So do a tree-walk to find and eliminate all such regs. */
4969 /* But first quickly dispose of a common case. */
4970 if (GET_CODE (ad
) == PLUS
4971 && CONST_INT_P (XEXP (ad
, 1))
4972 && REG_P (XEXP (ad
, 0))
4973 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
4976 subst_reg_equivs_changed
= 0;
4977 *loc
= subst_reg_equivs (ad
, insn
);
4979 if (! subst_reg_equivs_changed
)
4982 /* Check result for validity after substitution. */
4983 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4987 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4990 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
4992 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4997 *memrefloc
= copy_rtx (*memrefloc
);
4998 XEXP (*memrefloc
, 0) = ad
;
4999 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5005 /* The address is not valid. We have to figure out why. First see if
5006 we have an outer AND and remove it if so. Then analyze what's inside. */
5008 if (GET_CODE (ad
) == AND
)
5011 loc
= &XEXP (ad
, 0);
5015 /* One possibility for why the address is invalid is that it is itself
5016 a MEM. This can happen when the frame pointer is being eliminated, a
5017 pseudo is not allocated to a hard register, and the offset between the
5018 frame and stack pointers is not its initial value. In that case the
5019 pseudo will have been replaced by a MEM referring to the
5023 /* First ensure that the address in this MEM is valid. Then, unless
5024 indirect addresses are valid, reload the MEM into a register. */
5026 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5027 opnum
, ADDR_TYPE (type
),
5028 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5030 /* If tem was changed, then we must create a new memory reference to
5031 hold it and store it back into memrefloc. */
5032 if (tem
!= ad
&& memrefloc
)
5034 *memrefloc
= copy_rtx (*memrefloc
);
5035 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5036 loc
= &XEXP (*memrefloc
, 0);
5038 loc
= &XEXP (*loc
, 0);
5041 /* Check similar cases as for indirect addresses as above except
5042 that we can allow pseudos and a MEM since they should have been
5043 taken care of above. */
5046 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5047 || MEM_P (XEXP (tem
, 0))
5048 || ! (REG_P (XEXP (tem
, 0))
5049 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5050 && REG_P (XEXP (XEXP (tem
, 0), 0))
5051 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5053 /* Must use TEM here, not AD, since it is the one that will
5054 have any subexpressions reloaded, if needed. */
5055 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5056 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5059 return ! removed_and
;
5065 /* If we have address of a stack slot but it's not valid because the
5066 displacement is too large, compute the sum in a register.
5067 Handle all base registers here, not just fp/ap/sp, because on some
5068 targets (namely SH) we can also get too large displacements from
5069 big-endian corrections. */
5070 else if (GET_CODE (ad
) == PLUS
5071 && REG_P (XEXP (ad
, 0))
5072 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5073 && CONST_INT_P (XEXP (ad
, 1))
5074 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5076 /* Similarly, if we were to reload the base register and the
5077 mem+offset address is still invalid, then we want to reload
5078 the whole address, not just the base register. */
5079 || ! maybe_memory_address_addr_space_p
5080 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5083 /* Unshare the MEM rtx so we can safely alter it. */
5086 *memrefloc
= copy_rtx (*memrefloc
);
5087 loc
= &XEXP (*memrefloc
, 0);
5089 loc
= &XEXP (*loc
, 0);
5092 if (double_reg_address_ok
[mode
]
5093 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5096 /* Unshare the sum as well. */
5097 *loc
= ad
= copy_rtx (ad
);
5099 /* Reload the displacement into an index reg.
5100 We assume the frame pointer or arg pointer is a base reg. */
5101 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5102 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5108 /* If the sum of two regs is not necessarily valid,
5109 reload the sum into a base reg.
5110 That will at least work. */
5111 find_reloads_address_part (ad
, loc
,
5112 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5113 GET_MODE (ad
), opnum
, type
, ind_levels
);
5115 return ! removed_and
;
5118 /* If we have an indexed stack slot, there are three possible reasons why
5119 it might be invalid: The index might need to be reloaded, the address
5120 might have been made by frame pointer elimination and hence have a
5121 constant out of range, or both reasons might apply.
5123 We can easily check for an index needing reload, but even if that is the
5124 case, we might also have an invalid constant. To avoid making the
5125 conservative assumption and requiring two reloads, we see if this address
5126 is valid when not interpreted strictly. If it is, the only problem is
5127 that the index needs a reload and find_reloads_address_1 will take care
5130 Handle all base registers here, not just fp/ap/sp, because on some
5131 targets (namely SPARC) we can also get invalid addresses from preventive
5132 subreg big-endian corrections made by find_reloads_toplev. We
5133 can also get expressions involving LO_SUM (rather than PLUS) from
5134 find_reloads_subreg_address.
5136 If we decide to do something, it must be that `double_reg_address_ok'
5137 is true. We generate a reload of the base register + constant and
5138 rework the sum so that the reload register will be added to the index.
5139 This is safe because we know the address isn't shared.
5141 We check for the base register as both the first and second operand of
5142 the innermost PLUS and/or LO_SUM. */
5144 for (op_index
= 0; op_index
< 2; ++op_index
)
5146 rtx operand
, addend
;
5147 enum rtx_code inner_code
;
5149 if (GET_CODE (ad
) != PLUS
)
5152 inner_code
= GET_CODE (XEXP (ad
, 0));
5153 if (!(GET_CODE (ad
) == PLUS
5154 && CONST_INT_P (XEXP (ad
, 1))
5155 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5158 operand
= XEXP (XEXP (ad
, 0), op_index
);
5159 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5162 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5164 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5166 || operand
== frame_pointer_rtx
5167 || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
5168 && operand
== hard_frame_pointer_rtx
)
5169 || (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
5170 && operand
== arg_pointer_rtx
)
5171 || operand
== stack_pointer_rtx
)
5172 && ! maybe_memory_address_addr_space_p
5173 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5178 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5179 INTVAL (XEXP (ad
, 1)));
5181 /* Form the adjusted address. */
5182 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5183 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5184 op_index
== 0 ? offset_reg
: addend
,
5185 op_index
== 0 ? addend
: offset_reg
);
5187 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5188 op_index
== 0 ? offset_reg
: addend
,
5189 op_index
== 0 ? addend
: offset_reg
);
5192 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5193 find_reloads_address_part (XEXP (ad
, op_index
),
5194 &XEXP (ad
, op_index
), cls
,
5195 GET_MODE (ad
), opnum
, type
, ind_levels
);
5196 find_reloads_address_1 (mode
, as
,
5197 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5198 GET_CODE (XEXP (ad
, op_index
)),
5199 &XEXP (ad
, 1 - op_index
), opnum
,
5206 /* See if address becomes valid when an eliminable register
5207 in a sum is replaced. */
5210 if (GET_CODE (ad
) == PLUS
)
5211 tem
= subst_indexed_address (ad
);
5212 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5214 /* Ok, we win that way. Replace any additional eliminable
5217 subst_reg_equivs_changed
= 0;
5218 tem
= subst_reg_equivs (tem
, insn
);
5220 /* Make sure that didn't make the address invalid again. */
5222 if (! subst_reg_equivs_changed
5223 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5230 /* If constants aren't valid addresses, reload the constant address
5232 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5234 machine_mode address_mode
= GET_MODE (ad
);
5235 if (address_mode
== VOIDmode
)
5236 address_mode
= targetm
.addr_space
.address_mode (as
);
5238 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5239 Unshare it so we can safely alter it. */
5240 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5241 && CONSTANT_POOL_ADDRESS_P (ad
))
5243 *memrefloc
= copy_rtx (*memrefloc
);
5244 loc
= &XEXP (*memrefloc
, 0);
5246 loc
= &XEXP (*loc
, 0);
5249 find_reloads_address_part (ad
, loc
,
5250 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5251 address_mode
, opnum
, type
, ind_levels
);
5252 return ! removed_and
;
5255 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5256 opnum
, type
, ind_levels
, insn
);
5259 /* Find all pseudo regs appearing in AD
5260 that are eliminable in favor of equivalent values
5261 and do not have hard regs; replace them by their equivalents.
5262 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5263 front of it for pseudos that we have to replace with stack slots. */
5266 subst_reg_equivs (rtx ad
, rtx_insn
*insn
)
5268 RTX_CODE code
= GET_CODE (ad
);
5285 int regno
= REGNO (ad
);
5287 if (reg_equiv_constant (regno
) != 0)
5289 subst_reg_equivs_changed
= 1;
5290 return reg_equiv_constant (regno
);
5292 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5294 rtx mem
= make_memloc (ad
, regno
);
5295 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5297 subst_reg_equivs_changed
= 1;
5298 /* We mark the USE with QImode so that we recognize it
5299 as one that can be safely deleted at the end of
5301 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5310 /* Quickly dispose of a common case. */
5311 if (XEXP (ad
, 0) == frame_pointer_rtx
5312 && CONST_INT_P (XEXP (ad
, 1)))
5320 fmt
= GET_RTX_FORMAT (code
);
5321 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5323 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5327 /* Compute the sum of X and Y, making canonicalizations assumed in an
5328 address, namely: sum constant integers, surround the sum of two
5329 constants with a CONST, put the constant as the second operand, and
5330 group the constant on the outermost sum.
5332 This routine assumes both inputs are already in canonical form. */
5335 form_sum (machine_mode mode
, rtx x
, rtx y
)
5339 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5340 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5342 if (CONST_INT_P (x
))
5343 return plus_constant (mode
, y
, INTVAL (x
));
5344 else if (CONST_INT_P (y
))
5345 return plus_constant (mode
, x
, INTVAL (y
));
5346 else if (CONSTANT_P (x
))
5347 tem
= x
, x
= y
, y
= tem
;
5349 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5350 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5352 /* Note that if the operands of Y are specified in the opposite
5353 order in the recursive calls below, infinite recursion will occur. */
5354 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5355 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5357 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5358 constant will have been placed second. */
5359 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5361 if (GET_CODE (x
) == CONST
)
5363 if (GET_CODE (y
) == CONST
)
5366 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5369 return gen_rtx_PLUS (mode
, x
, y
);
5372 /* If ADDR is a sum containing a pseudo register that should be
5373 replaced with a constant (from reg_equiv_constant),
5374 return the result of doing so, and also apply the associative
5375 law so that the result is more likely to be a valid address.
5376 (But it is not guaranteed to be one.)
5378 Note that at most one register is replaced, even if more are
5379 replaceable. Also, we try to put the result into a canonical form
5380 so it is more likely to be a valid address.
5382 In all other cases, return ADDR. */
5385 subst_indexed_address (rtx addr
)
5387 rtx op0
= 0, op1
= 0, op2
= 0;
5391 if (GET_CODE (addr
) == PLUS
)
5393 /* Try to find a register to replace. */
5394 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5396 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5397 && reg_renumber
[regno
] < 0
5398 && reg_equiv_constant (regno
) != 0)
5399 op0
= reg_equiv_constant (regno
);
5400 else if (REG_P (op1
)
5401 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5402 && reg_renumber
[regno
] < 0
5403 && reg_equiv_constant (regno
) != 0)
5404 op1
= reg_equiv_constant (regno
);
5405 else if (GET_CODE (op0
) == PLUS
5406 && (tem
= subst_indexed_address (op0
)) != op0
)
5408 else if (GET_CODE (op1
) == PLUS
5409 && (tem
= subst_indexed_address (op1
)) != op1
)
5414 /* Pick out up to three things to add. */
5415 if (GET_CODE (op1
) == PLUS
)
5416 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5417 else if (GET_CODE (op0
) == PLUS
)
5418 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5420 /* Compute the sum. */
5422 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5424 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5431 /* Update the REG_INC notes for an insn. It updates all REG_INC
5432 notes for the instruction which refer to REGNO the to refer
5433 to the reload number.
5435 INSN is the insn for which any REG_INC notes need updating.
5437 REGNO is the register number which has been reloaded.
5439 RELOADNUM is the reload number. */
5442 update_auto_inc_notes (rtx_insn
*insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5443 int reloadnum ATTRIBUTE_UNUSED
)
5448 for (rtx link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5449 if (REG_NOTE_KIND (link
) == REG_INC
5450 && (int) REGNO (XEXP (link
, 0)) == regno
)
5451 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5454 /* Record the pseudo registers we must reload into hard registers in a
5455 subexpression of a would-be memory address, X referring to a value
5456 in mode MODE. (This function is not called if the address we find
5459 CONTEXT = 1 means we are considering regs as index regs,
5460 = 0 means we are considering them as base regs.
5461 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5463 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5464 is the code of the index part of the address. Otherwise, pass SCRATCH
5466 OPNUM and TYPE specify the purpose of any reloads made.
5468 IND_LEVELS says how many levels of indirect addressing are
5469 supported at this point in the address.
5471 INSN, if nonzero, is the insn in which we do the reload. It is used
5472 to determine if we may generate output reloads.
5474 We return nonzero if X, as a whole, is reloaded or replaced. */
5476 /* Note that we take shortcuts assuming that no multi-reg machine mode
5477 occurs as part of an address.
5478 Also, this is not fully machine-customizable; it works for machines
5479 such as VAXen and 68000's and 32000's, but other possible machines
5480 could have addressing modes that this does not handle right.
5481 If you add push_reload calls here, you need to make sure gen_reload
5482 handles those cases gracefully. */
5485 find_reloads_address_1 (machine_mode mode
, addr_space_t as
,
5487 enum rtx_code outer_code
, enum rtx_code index_code
,
5488 rtx
*loc
, int opnum
, enum reload_type type
,
5489 int ind_levels
, rtx_insn
*insn
)
5491 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5493 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5494 : REGNO_OK_FOR_INDEX_P (REGNO))
5496 enum reg_class context_reg_class
;
5497 RTX_CODE code
= GET_CODE (x
);
5498 bool reloaded_inner_of_autoinc
= false;
5501 context_reg_class
= INDEX_REG_CLASS
;
5503 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5509 rtx orig_op0
= XEXP (x
, 0);
5510 rtx orig_op1
= XEXP (x
, 1);
5511 RTX_CODE code0
= GET_CODE (orig_op0
);
5512 RTX_CODE code1
= GET_CODE (orig_op1
);
5516 if (GET_CODE (op0
) == SUBREG
)
5518 op0
= SUBREG_REG (op0
);
5519 code0
= GET_CODE (op0
);
5520 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5521 op0
= gen_rtx_REG (word_mode
,
5523 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5524 GET_MODE (SUBREG_REG (orig_op0
)),
5525 SUBREG_BYTE (orig_op0
),
5526 GET_MODE (orig_op0
))));
5529 if (GET_CODE (op1
) == SUBREG
)
5531 op1
= SUBREG_REG (op1
);
5532 code1
= GET_CODE (op1
);
5533 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5534 /* ??? Why is this given op1's mode and above for
5535 ??? op0 SUBREGs we use word_mode? */
5536 op1
= gen_rtx_REG (GET_MODE (op1
),
5538 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5539 GET_MODE (SUBREG_REG (orig_op1
)),
5540 SUBREG_BYTE (orig_op1
),
5541 GET_MODE (orig_op1
))));
5543 /* Plus in the index register may be created only as a result of
5544 register rematerialization for expression like &localvar*4. Reload it.
5545 It may be possible to combine the displacement on the outer level,
5546 but it is probably not worthwhile to do so. */
5549 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5550 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5551 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5553 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5557 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5558 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5560 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5561 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5563 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5564 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5568 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5569 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5571 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5572 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5574 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5575 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5579 else if (code0
== CONST_INT
|| code0
== CONST
5580 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5581 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5582 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5585 else if (code1
== CONST_INT
|| code1
== CONST
5586 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5587 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5588 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5591 else if (code0
== REG
&& code1
== REG
)
5593 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5594 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5596 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5597 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5599 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5600 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5601 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5603 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5604 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5605 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5607 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5608 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5609 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5611 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5612 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5613 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5617 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5618 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5620 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5621 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5626 else if (code0
== REG
)
5628 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5629 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5631 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5632 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5636 else if (code1
== REG
)
5638 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5639 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5641 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5642 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5652 rtx op0
= XEXP (x
, 0);
5653 rtx op1
= XEXP (x
, 1);
5654 enum rtx_code index_code
;
5658 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5661 /* Currently, we only support {PRE,POST}_MODIFY constructs
5662 where a base register is {inc,dec}remented by the contents
5663 of another register or by a constant value. Thus, these
5664 operands must match. */
5665 gcc_assert (op0
== XEXP (op1
, 0));
5667 /* Require index register (or constant). Let's just handle the
5668 register case in the meantime... If the target allows
5669 auto-modify by a constant then we could try replacing a pseudo
5670 register with its equivalent constant where applicable.
5672 We also handle the case where the register was eliminated
5673 resulting in a PLUS subexpression.
5675 If we later decide to reload the whole PRE_MODIFY or
5676 POST_MODIFY, inc_for_reload might clobber the reload register
5677 before reading the index. The index register might therefore
5678 need to live longer than a TYPE reload normally would, so be
5679 conservative and class it as RELOAD_OTHER. */
5680 if ((REG_P (XEXP (op1
, 1))
5681 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5682 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5683 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5684 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5687 gcc_assert (REG_P (XEXP (op1
, 0)));
5689 regno
= REGNO (XEXP (op1
, 0));
5690 index_code
= GET_CODE (XEXP (op1
, 1));
5692 /* A register that is incremented cannot be constant! */
5693 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5694 || reg_equiv_constant (regno
) == 0);
5696 /* Handle a register that is equivalent to a memory location
5697 which cannot be addressed directly. */
5698 if (reg_equiv_memory_loc (regno
) != 0
5699 && (reg_equiv_address (regno
) != 0
5700 || num_not_at_initial_offset
))
5702 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5704 if (reg_equiv_address (regno
)
5705 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5709 /* First reload the memory location's address.
5710 We can't use ADDR_TYPE (type) here, because we need to
5711 write back the value after reading it, hence we actually
5712 need two registers. */
5713 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5714 &XEXP (tem
, 0), opnum
,
5718 if (!rtx_equal_p (tem
, orig
))
5719 push_reg_equiv_alt_mem (regno
, tem
);
5721 /* Then reload the memory location into a base
5723 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5725 base_reg_class (mode
, as
,
5727 GET_MODE (x
), GET_MODE (x
), 0,
5728 0, opnum
, RELOAD_OTHER
);
5730 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5735 if (reg_renumber
[regno
] >= 0)
5736 regno
= reg_renumber
[regno
];
5738 /* We require a base register here... */
5739 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5741 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5742 &XEXP (op1
, 0), &XEXP (x
, 0),
5743 base_reg_class (mode
, as
,
5745 GET_MODE (x
), GET_MODE (x
), 0, 0,
5746 opnum
, RELOAD_OTHER
);
5748 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5758 if (REG_P (XEXP (x
, 0)))
5760 int regno
= REGNO (XEXP (x
, 0));
5764 /* A register that is incremented cannot be constant! */
5765 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5766 || reg_equiv_constant (regno
) == 0);
5768 /* Handle a register that is equivalent to a memory location
5769 which cannot be addressed directly. */
5770 if (reg_equiv_memory_loc (regno
) != 0
5771 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5773 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5774 if (reg_equiv_address (regno
)
5775 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5779 /* First reload the memory location's address.
5780 We can't use ADDR_TYPE (type) here, because we need to
5781 write back the value after reading it, hence we actually
5782 need two registers. */
5783 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5784 &XEXP (tem
, 0), opnum
, type
,
5786 reloaded_inner_of_autoinc
= true;
5787 if (!rtx_equal_p (tem
, orig
))
5788 push_reg_equiv_alt_mem (regno
, tem
);
5789 /* Put this inside a new increment-expression. */
5790 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5791 /* Proceed to reload that, as if it contained a register. */
5795 /* If we have a hard register that is ok in this incdec context,
5796 don't make a reload. If the register isn't nice enough for
5797 autoincdec, we can reload it. But, if an autoincrement of a
5798 register that we here verified as playing nice, still outside
5799 isn't "valid", it must be that no autoincrement is "valid".
5800 If that is true and something made an autoincrement anyway,
5801 this must be a special context where one is allowed.
5802 (For example, a "push" instruction.)
5803 We can't improve this address, so leave it alone. */
5805 /* Otherwise, reload the autoincrement into a suitable hard reg
5806 and record how much to increment by. */
5808 if (reg_renumber
[regno
] >= 0)
5809 regno
= reg_renumber
[regno
];
5810 if (regno
>= FIRST_PSEUDO_REGISTER
5811 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5816 /* If we can output the register afterwards, do so, this
5817 saves the extra update.
5818 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5819 CALL_INSN - and it does not set CC0.
5820 But don't do this if we cannot directly address the
5821 memory location, since this will make it harder to
5822 reuse address reloads, and increases register pressure.
5823 Also don't do this if we can probably update x directly. */
5824 rtx equiv
= (MEM_P (XEXP (x
, 0))
5826 : reg_equiv_mem (regno
));
5827 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5828 if (insn
&& NONJUMP_INSN_P (insn
)
5830 && ! sets_cc0_p (PATTERN (insn
))
5832 && (regno
< FIRST_PSEUDO_REGISTER
5834 && memory_operand (equiv
, GET_MODE (equiv
))
5835 && ! (icode
!= CODE_FOR_nothing
5836 && insn_operand_matches (icode
, 0, equiv
)
5837 && insn_operand_matches (icode
, 1, equiv
))))
5838 /* Using RELOAD_OTHER means we emit this and the reload we
5839 made earlier in the wrong order. */
5840 && !reloaded_inner_of_autoinc
)
5842 /* We use the original pseudo for loc, so that
5843 emit_reload_insns() knows which pseudo this
5844 reload refers to and updates the pseudo rtx, not
5845 its equivalent memory location, as well as the
5846 corresponding entry in reg_last_reload_reg. */
5847 loc
= &XEXP (x_orig
, 0);
5850 = push_reload (x
, x
, loc
, loc
,
5852 GET_MODE (x
), GET_MODE (x
), 0, 0,
5853 opnum
, RELOAD_OTHER
);
5858 = push_reload (x
, x
, loc
, (rtx
*) 0,
5860 GET_MODE (x
), GET_MODE (x
), 0, 0,
5863 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5868 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5878 /* Look for parts to reload in the inner expression and reload them
5879 too, in addition to this operation. Reloading all inner parts in
5880 addition to this one shouldn't be necessary, but at this point,
5881 we don't know if we can possibly omit any part that *can* be
5882 reloaded. Targets that are better off reloading just either part
5883 (or perhaps even a different part of an outer expression), should
5884 define LEGITIMIZE_RELOAD_ADDRESS. */
5885 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5886 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5887 type
, ind_levels
, insn
);
5888 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5890 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5894 /* This is probably the result of a substitution, by eliminate_regs, of
5895 an equivalent address for a pseudo that was not allocated to a hard
5896 register. Verify that the specified address is valid and reload it
5899 Since we know we are going to reload this item, don't decrement for
5900 the indirection level.
5902 Note that this is actually conservative: it would be slightly more
5903 efficient to use the value of SPILL_INDIRECT_LEVELS from
5906 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5907 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5908 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5910 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5915 int regno
= REGNO (x
);
5917 if (reg_equiv_constant (regno
) != 0)
5919 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5921 GET_MODE (x
), opnum
, type
, ind_levels
);
5925 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5926 that feeds this insn. */
5927 if (reg_equiv_mem (regno
) != 0)
5929 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5931 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5936 if (reg_equiv_memory_loc (regno
)
5937 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5939 rtx tem
= make_memloc (x
, regno
);
5940 if (reg_equiv_address (regno
) != 0
5941 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5944 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5945 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5947 if (!rtx_equal_p (x
, tem
))
5948 push_reg_equiv_alt_mem (regno
, x
);
5952 if (reg_renumber
[regno
] >= 0)
5953 regno
= reg_renumber
[regno
];
5955 if (regno
>= FIRST_PSEUDO_REGISTER
5956 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5959 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5961 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5965 /* If a register appearing in an address is the subject of a CLOBBER
5966 in this insn, reload it into some other register to be safe.
5967 The CLOBBER is supposed to make the register unavailable
5968 from before this insn to after it. */
5969 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5971 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5973 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5980 if (REG_P (SUBREG_REG (x
)))
5982 /* If this is a SUBREG of a hard register and the resulting register
5983 is of the wrong class, reload the whole SUBREG. This avoids
5984 needless copies if SUBREG_REG is multi-word. */
5985 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5987 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5989 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5992 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5994 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5998 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5999 is larger than the class size, then reload the whole SUBREG. */
6002 enum reg_class rclass
= context_reg_class
;
6003 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6004 > reg_class_size
[(int) rclass
])
6006 /* If the inner register will be replaced by a memory
6007 reference, we can do this only if we can replace the
6008 whole subreg by a (narrower) memory reference. If
6009 this is not possible, fall through and reload just
6010 the inner register (including address reloads). */
6011 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6013 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6019 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6020 GET_MODE (tem
), VOIDmode
, 0, 0,
6027 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6028 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6041 const char *fmt
= GET_RTX_FORMAT (code
);
6044 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6047 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6049 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6050 code
, SCRATCH
, &XEXP (x
, i
),
6051 opnum
, type
, ind_levels
, insn
);
6055 #undef REG_OK_FOR_CONTEXT
6059 /* X, which is found at *LOC, is a part of an address that needs to be
6060 reloaded into a register of class RCLASS. If X is a constant, or if
6061 X is a PLUS that contains a constant, check that the constant is a
6062 legitimate operand and that we are supposed to be able to load
6063 it into the register.
6065 If not, force the constant into memory and reload the MEM instead.
6067 MODE is the mode to use, in case X is an integer constant.
6069 OPNUM and TYPE describe the purpose of any reloads made.
6071 IND_LEVELS says how many levels of indirect addressing this machine
6075 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6076 machine_mode mode
, int opnum
,
6077 enum reload_type type
, int ind_levels
)
6080 && (!targetm
.legitimate_constant_p (mode
, x
)
6081 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6083 x
= force_const_mem (mode
, x
);
6084 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6085 opnum
, type
, ind_levels
, 0);
6088 else if (GET_CODE (x
) == PLUS
6089 && CONSTANT_P (XEXP (x
, 1))
6090 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6091 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6096 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6097 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6098 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6099 opnum
, type
, ind_levels
, 0);
6102 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6103 mode
, VOIDmode
, 0, 0, opnum
, type
);
6106 /* X, a subreg of a pseudo, is a part of an address that needs to be
6107 reloaded, and the pseusdo is equivalent to a memory location.
6109 Attempt to replace the whole subreg by a (possibly narrower or wider)
6110 memory reference. If this is possible, return this new memory
6111 reference, and push all required address reloads. Otherwise,
6114 OPNUM and TYPE identify the purpose of the reload.
6116 IND_LEVELS says how many levels of indirect addressing are
6117 supported at this point in the address.
6119 INSN, if nonzero, is the insn in which we do the reload. It is used
6120 to determine where to put USEs for pseudos that we have to replace with
6124 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6125 int ind_levels
, rtx_insn
*insn
,
6126 int *address_reloaded
)
6128 machine_mode outer_mode
= GET_MODE (x
);
6129 machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6130 int regno
= REGNO (SUBREG_REG (x
));
6135 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6137 /* We cannot replace the subreg with a modified memory reference if:
6139 - we have a paradoxical subreg that implicitly acts as a zero or
6140 sign extension operation due to LOAD_EXTEND_OP;
6142 - we have a subreg that is implicitly supposed to act on the full
6143 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6145 - the address of the equivalent memory location is mode-dependent; or
6147 - we have a paradoxical subreg and the resulting memory is not
6148 sufficiently aligned to allow access in the wider mode.
6150 In addition, we choose not to perform the replacement for *any*
6151 paradoxical subreg, even if it were possible in principle. This
6152 is to avoid generating wider memory references than necessary.
6154 This corresponds to how previous versions of reload used to handle
6155 paradoxical subregs where no address reload was required. */
6157 if (paradoxical_subreg_p (x
))
6160 if (WORD_REGISTER_OPERATIONS
6161 && partial_subreg_p (outer_mode
, inner_mode
)
6162 && ((GET_MODE_SIZE (outer_mode
) - 1) / UNITS_PER_WORD
6163 == (GET_MODE_SIZE (inner_mode
) - 1) / UNITS_PER_WORD
))
6166 /* Since we don't attempt to handle paradoxical subregs, we can just
6167 call into simplify_subreg, which will handle all remaining checks
6169 orig
= make_memloc (SUBREG_REG (x
), regno
);
6170 offset
= SUBREG_BYTE (x
);
6171 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6172 if (!tem
|| !MEM_P (tem
))
6175 /* Now push all required address reloads, if any. */
6176 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6177 XEXP (tem
, 0), &XEXP (tem
, 0),
6178 opnum
, type
, ind_levels
, insn
);
6179 /* ??? Do we need to handle nonzero offsets somehow? */
6180 if (!offset
&& !rtx_equal_p (tem
, orig
))
6181 push_reg_equiv_alt_mem (regno
, tem
);
6183 /* For some processors an address may be valid in the original mode but
6184 not in a smaller mode. For example, ARM accepts a scaled index register
6185 in SImode but not in HImode. Note that this is only a problem if the
6186 address in reg_equiv_mem is already invalid in the new mode; other
6187 cases would be fixed by find_reloads_address as usual.
6189 ??? We attempt to handle such cases here by doing an additional reload
6190 of the full address after the usual processing by find_reloads_address.
6191 Note that this may not work in the general case, but it seems to cover
6192 the cases where this situation currently occurs. A more general fix
6193 might be to reload the *value* instead of the address, but this would
6194 not be expected by the callers of this routine as-is.
6196 If find_reloads_address already completed replaced the address, there
6197 is nothing further to do. */
6199 && reg_equiv_mem (regno
) != 0
6200 && !strict_memory_address_addr_space_p
6201 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6202 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6204 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6205 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6207 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6211 /* If this is not a toplevel operand, find_reloads doesn't see this
6212 substitution. We have to emit a USE of the pseudo so that
6213 delete_output_reload can see it. */
6214 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6215 /* We mark the USE with QImode so that we recognize it as one that
6216 can be safely deleted at the end of reload. */
6217 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6220 if (address_reloaded
)
6221 *address_reloaded
= reloaded
;
6226 /* Substitute into the current INSN the registers into which we have reloaded
6227 the things that need reloading. The array `replacements'
6228 contains the locations of all pointers that must be changed
6229 and says what to replace them with.
6231 Return the rtx that X translates into; usually X, but modified. */
6234 subst_reloads (rtx_insn
*insn
)
6238 for (i
= 0; i
< n_replacements
; i
++)
6240 struct replacement
*r
= &replacements
[i
];
6241 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6245 /* This checking takes a very long time on some platforms
6246 causing the gcc.c-torture/compile/limits-fnargs.c test
6247 to time out during testing. See PR 31850.
6249 Internal consistency test. Check that we don't modify
6250 anything in the equivalence arrays. Whenever something from
6251 those arrays needs to be reloaded, it must be unshared before
6252 being substituted into; the equivalence must not be modified.
6253 Otherwise, if the equivalence is used after that, it will
6254 have been modified, and the thing substituted (probably a
6255 register) is likely overwritten and not a usable equivalence. */
6258 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6260 #define CHECK_MODF(ARRAY) \
6261 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6262 || !loc_mentioned_in_p (r->where, \
6263 (*reg_equivs)[check_regno].ARRAY))
6265 CHECK_MODF (constant
);
6266 CHECK_MODF (memory_loc
);
6267 CHECK_MODF (address
);
6271 #endif /* DEBUG_RELOAD */
6273 /* If we're replacing a LABEL_REF with a register, there must
6274 already be an indication (to e.g. flow) which label this
6275 register refers to. */
6276 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6278 || find_reg_note (insn
,
6280 XEXP (*r
->where
, 0))
6281 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6283 /* Encapsulate RELOADREG so its machine mode matches what
6284 used to be there. Note that gen_lowpart_common will
6285 do the wrong thing if RELOADREG is multi-word. RELOADREG
6286 will always be a REG here. */
6287 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6288 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6290 *r
->where
= reloadreg
;
6292 /* If reload got no reg and isn't optional, something's wrong. */
6294 gcc_assert (rld
[r
->what
].optional
);
6298 /* Make a copy of any replacements being done into X and move those
6299 copies to locations in Y, a copy of X. */
6302 copy_replacements (rtx x
, rtx y
)
6304 copy_replacements_1 (&x
, &y
, n_replacements
);
6308 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6312 struct replacement
*r
;
6316 for (j
= 0; j
< orig_replacements
; j
++)
6317 if (replacements
[j
].where
== px
)
6319 r
= &replacements
[n_replacements
++];
6321 r
->what
= replacements
[j
].what
;
6322 r
->mode
= replacements
[j
].mode
;
6327 code
= GET_CODE (x
);
6328 fmt
= GET_RTX_FORMAT (code
);
6330 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6333 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6334 else if (fmt
[i
] == 'E')
6335 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6336 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6341 /* Change any replacements being done to *X to be done to *Y. */
6344 move_replacements (rtx
*x
, rtx
*y
)
6348 for (i
= 0; i
< n_replacements
; i
++)
6349 if (replacements
[i
].where
== x
)
6350 replacements
[i
].where
= y
;
6353 /* If LOC was scheduled to be replaced by something, return the replacement.
6354 Otherwise, return *LOC. */
6357 find_replacement (rtx
*loc
)
6359 struct replacement
*r
;
6361 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6363 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6365 if (reloadreg
&& r
->where
== loc
)
6367 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6368 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6372 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6373 && r
->where
== &SUBREG_REG (*loc
))
6375 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6376 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6378 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6379 GET_MODE (SUBREG_REG (*loc
)),
6380 SUBREG_BYTE (*loc
));
6384 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6385 what's inside and make a new rtl if so. */
6386 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6387 || GET_CODE (*loc
) == MULT
)
6389 rtx x
= find_replacement (&XEXP (*loc
, 0));
6390 rtx y
= find_replacement (&XEXP (*loc
, 1));
6392 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6393 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6399 /* Return nonzero if register in range [REGNO, ENDREGNO)
6400 appears either explicitly or implicitly in X
6401 other than being stored into (except for earlyclobber operands).
6403 References contained within the substructure at LOC do not count.
6404 LOC may be zero, meaning don't ignore anything.
6406 This is similar to refers_to_regno_p in rtlanal.c except that we
6407 look at equivalences for pseudos that didn't get hard registers. */
6410 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6422 code
= GET_CODE (x
);
6429 /* If this is a pseudo, a hard register must not have been allocated.
6430 X must therefore either be a constant or be in memory. */
6431 if (r
>= FIRST_PSEUDO_REGISTER
)
6433 if (reg_equiv_memory_loc (r
))
6434 return refers_to_regno_for_reload_p (regno
, endregno
,
6435 reg_equiv_memory_loc (r
),
6438 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6442 return (endregno
> r
6443 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6444 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6448 /* If this is a SUBREG of a hard reg, we can see exactly which
6449 registers are being modified. Otherwise, handle normally. */
6450 if (REG_P (SUBREG_REG (x
))
6451 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6453 unsigned int inner_regno
= subreg_regno (x
);
6454 unsigned int inner_endregno
6455 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6456 ? subreg_nregs (x
) : 1);
6458 return endregno
> inner_regno
&& regno
< inner_endregno
;
6464 if (&SET_DEST (x
) != loc
6465 /* Note setting a SUBREG counts as referring to the REG it is in for
6466 a pseudo but not for hard registers since we can
6467 treat each word individually. */
6468 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6469 && loc
!= &SUBREG_REG (SET_DEST (x
))
6470 && REG_P (SUBREG_REG (SET_DEST (x
)))
6471 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6472 && refers_to_regno_for_reload_p (regno
, endregno
,
6473 SUBREG_REG (SET_DEST (x
)),
6475 /* If the output is an earlyclobber operand, this is
6477 || ((!REG_P (SET_DEST (x
))
6478 || earlyclobber_operand_p (SET_DEST (x
)))
6479 && refers_to_regno_for_reload_p (regno
, endregno
,
6480 SET_DEST (x
), loc
))))
6483 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6492 /* X does not match, so try its subexpressions. */
6494 fmt
= GET_RTX_FORMAT (code
);
6495 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6497 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6505 if (refers_to_regno_for_reload_p (regno
, endregno
,
6509 else if (fmt
[i
] == 'E')
6512 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6513 if (loc
!= &XVECEXP (x
, i
, j
)
6514 && refers_to_regno_for_reload_p (regno
, endregno
,
6515 XVECEXP (x
, i
, j
), loc
))
6522 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6523 we check if any register number in X conflicts with the relevant register
6524 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6525 contains a MEM (we don't bother checking for memory addresses that can't
6526 conflict because we expect this to be a rare case.
6528 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6529 that we look at equivalences for pseudos that didn't get hard registers. */
6532 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6534 int regno
, endregno
;
6536 /* Overly conservative. */
6537 if (GET_CODE (x
) == STRICT_LOW_PART
6538 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6541 /* If either argument is a constant, then modifying X can not affect IN. */
6542 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6544 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6545 return refers_to_mem_for_reload_p (in
);
6546 else if (GET_CODE (x
) == SUBREG
)
6548 regno
= REGNO (SUBREG_REG (x
));
6549 if (regno
< FIRST_PSEUDO_REGISTER
)
6550 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6551 GET_MODE (SUBREG_REG (x
)),
6554 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6555 ? subreg_nregs (x
) : 1);
6557 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6563 /* If this is a pseudo, it must not have been assigned a hard register.
6564 Therefore, it must either be in memory or be a constant. */
6566 if (regno
>= FIRST_PSEUDO_REGISTER
)
6568 if (reg_equiv_memory_loc (regno
))
6569 return refers_to_mem_for_reload_p (in
);
6570 gcc_assert (reg_equiv_constant (regno
));
6574 endregno
= END_REGNO (x
);
6576 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6579 return refers_to_mem_for_reload_p (in
);
6580 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6581 || GET_CODE (x
) == CC0
)
6582 return reg_mentioned_p (x
, in
);
6585 gcc_assert (GET_CODE (x
) == PLUS
);
6587 /* We actually want to know if X is mentioned somewhere inside IN.
6588 We must not say that (plus (sp) (const_int 124)) is in
6589 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6590 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6591 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6596 else if (GET_CODE (in
) == PLUS
)
6597 return (rtx_equal_p (x
, in
)
6598 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6599 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6600 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6601 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6607 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6611 refers_to_mem_for_reload_p (rtx x
)
6620 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6621 && reg_equiv_memory_loc (REGNO (x
)));
6623 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6624 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6626 && (MEM_P (XEXP (x
, i
))
6627 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6633 /* Check the insns before INSN to see if there is a suitable register
6634 containing the same value as GOAL.
6635 If OTHER is -1, look for a register in class RCLASS.
6636 Otherwise, just see if register number OTHER shares GOAL's value.
6638 Return an rtx for the register found, or zero if none is found.
6640 If RELOAD_REG_P is (short *)1,
6641 we reject any hard reg that appears in reload_reg_rtx
6642 because such a hard reg is also needed coming into this insn.
6644 If RELOAD_REG_P is any other nonzero value,
6645 it is a vector indexed by hard reg number
6646 and we reject any hard reg whose element in the vector is nonnegative
6647 as well as any that appears in reload_reg_rtx.
6649 If GOAL is zero, then GOALREG is a register number; we look
6650 for an equivalent for that register.
6652 MODE is the machine mode of the value we want an equivalence for.
6653 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6655 This function is used by jump.c as well as in the reload pass.
6657 If GOAL is the sum of the stack pointer and a constant, we treat it
6658 as if it were a constant except that sp is required to be unchanging. */
6661 find_equiv_reg (rtx goal
, rtx_insn
*insn
, enum reg_class rclass
, int other
,
6662 short *reload_reg_p
, int goalreg
, machine_mode mode
)
6665 rtx goaltry
, valtry
, value
;
6672 int goal_mem_addr_varies
= 0;
6673 int need_stable_sp
= 0;
6680 else if (REG_P (goal
))
6681 regno
= REGNO (goal
);
6682 else if (MEM_P (goal
))
6684 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6685 if (MEM_VOLATILE_P (goal
))
6687 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6689 /* An address with side effects must be reexecuted. */
6704 else if (CONSTANT_P (goal
))
6706 else if (GET_CODE (goal
) == PLUS
6707 && XEXP (goal
, 0) == stack_pointer_rtx
6708 && CONSTANT_P (XEXP (goal
, 1)))
6709 goal_const
= need_stable_sp
= 1;
6710 else if (GET_CODE (goal
) == PLUS
6711 && XEXP (goal
, 0) == frame_pointer_rtx
6712 && CONSTANT_P (XEXP (goal
, 1)))
6718 /* Scan insns back from INSN, looking for one that copies
6719 a value into or out of GOAL.
6720 Stop and give up if we reach a label. */
6725 if (p
&& DEBUG_INSN_P (p
))
6728 if (p
== 0 || LABEL_P (p
)
6729 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6732 /* Don't reuse register contents from before a setjmp-type
6733 function call; on the second return (from the longjmp) it
6734 might have been clobbered by a later reuse. It doesn't
6735 seem worthwhile to actually go and see if it is actually
6736 reused even if that information would be readily available;
6737 just don't reuse it across the setjmp call. */
6738 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6741 if (NONJUMP_INSN_P (p
)
6742 /* If we don't want spill regs ... */
6743 && (! (reload_reg_p
!= 0
6744 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6745 /* ... then ignore insns introduced by reload; they aren't
6746 useful and can cause results in reload_as_needed to be
6747 different from what they were when calculating the need for
6748 spills. If we notice an input-reload insn here, we will
6749 reject it below, but it might hide a usable equivalent.
6750 That makes bad code. It may even fail: perhaps no reg was
6751 spilled for this insn because it was assumed we would find
6753 || INSN_UID (p
) < reload_first_uid
))
6756 pat
= single_set (p
);
6758 /* First check for something that sets some reg equal to GOAL. */
6761 && true_regnum (SET_SRC (pat
)) == regno
6762 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6765 && true_regnum (SET_DEST (pat
)) == regno
6766 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6768 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6769 /* When looking for stack pointer + const,
6770 make sure we don't use a stack adjust. */
6771 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6772 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6774 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6775 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6777 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6778 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6779 /* If we are looking for a constant,
6780 and something equivalent to that constant was copied
6781 into a reg, we can use that reg. */
6782 || (goal_const
&& REG_NOTES (p
) != 0
6783 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6784 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6786 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6787 || (REG_P (SET_DEST (pat
))
6788 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6789 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6790 && CONST_INT_P (goal
)
6792 = operand_subword (XEXP (tem
, 0), 0, 0,
6794 && rtx_equal_p (goal
, goaltry
)
6796 = operand_subword (SET_DEST (pat
), 0, 0,
6798 && (valueno
= true_regnum (valtry
)) >= 0)))
6799 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6801 && REG_P (SET_DEST (pat
))
6802 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6803 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6804 && CONST_INT_P (goal
)
6805 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6807 && rtx_equal_p (goal
, goaltry
)
6809 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6810 && (valueno
= true_regnum (valtry
)) >= 0)))
6814 if (valueno
!= other
)
6817 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6819 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6829 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6830 (or copying VALUE into GOAL, if GOAL is also a register).
6831 Now verify that VALUE is really valid. */
6833 /* VALUENO is the register number of VALUE; a hard register. */
6835 /* Don't try to re-use something that is killed in this insn. We want
6836 to be able to trust REG_UNUSED notes. */
6837 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6840 /* If we propose to get the value from the stack pointer or if GOAL is
6841 a MEM based on the stack pointer, we need a stable SP. */
6842 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6843 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6847 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6848 if (GET_MODE (value
) != mode
)
6851 /* Reject VALUE if it was loaded from GOAL
6852 and is also a register that appears in the address of GOAL. */
6854 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6855 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6859 /* Reject registers that overlap GOAL. */
6861 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6862 nregs
= hard_regno_nregs
[regno
][mode
];
6865 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6867 if (!goal_mem
&& !goal_const
6868 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6871 /* Reject VALUE if it is one of the regs reserved for reloads.
6872 Reload1 knows how to reuse them anyway, and it would get
6873 confused if we allocated one without its knowledge.
6874 (Now that insns introduced by reload are ignored above,
6875 this case shouldn't happen, but I'm not positive.) */
6877 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6880 for (i
= 0; i
< valuenregs
; ++i
)
6881 if (reload_reg_p
[valueno
+ i
] >= 0)
6885 /* Reject VALUE if it is a register being used for an input reload
6886 even if it is not one of those reserved. */
6888 if (reload_reg_p
!= 0)
6891 for (i
= 0; i
< n_reloads
; i
++)
6892 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6894 int regno1
= REGNO (rld
[i
].reg_rtx
);
6895 int nregs1
= hard_regno_nregs
[regno1
]
6896 [GET_MODE (rld
[i
].reg_rtx
)];
6897 if (regno1
< valueno
+ valuenregs
6898 && regno1
+ nregs1
> valueno
)
6904 /* We must treat frame pointer as varying here,
6905 since it can vary--in a nonlocal goto as generated by expand_goto. */
6906 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6908 /* Now verify that the values of GOAL and VALUE remain unaltered
6909 until INSN is reached. */
6918 /* Don't trust the conversion past a function call
6919 if either of the two is in a call-clobbered register, or memory. */
6924 if (goal_mem
|| need_stable_sp
)
6927 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6928 for (i
= 0; i
< nregs
; ++i
)
6929 if (call_used_regs
[regno
+ i
]
6930 || targetm
.hard_regno_call_part_clobbered (regno
+ i
, mode
))
6933 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6934 for (i
= 0; i
< valuenregs
; ++i
)
6935 if (call_used_regs
[valueno
+ i
]
6936 || targetm
.hard_regno_call_part_clobbered (valueno
+ i
,
6945 /* Watch out for unspec_volatile, and volatile asms. */
6946 if (volatile_insn_p (pat
))
6949 /* If this insn P stores in either GOAL or VALUE, return 0.
6950 If GOAL is a memory ref and this insn writes memory, return 0.
6951 If GOAL is a memory ref and its address is not constant,
6952 and this insn P changes a register used in GOAL, return 0. */
6954 if (GET_CODE (pat
) == COND_EXEC
)
6955 pat
= COND_EXEC_CODE (pat
);
6956 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6958 rtx dest
= SET_DEST (pat
);
6959 while (GET_CODE (dest
) == SUBREG
6960 || GET_CODE (dest
) == ZERO_EXTRACT
6961 || GET_CODE (dest
) == STRICT_LOW_PART
)
6962 dest
= XEXP (dest
, 0);
6965 int xregno
= REGNO (dest
);
6967 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6968 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6971 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6973 if (xregno
< valueno
+ valuenregs
6974 && xregno
+ xnregs
> valueno
)
6976 if (goal_mem_addr_varies
6977 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6979 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6982 else if (goal_mem
&& MEM_P (dest
)
6983 && ! push_operand (dest
, GET_MODE (dest
)))
6985 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6986 && reg_equiv_memory_loc (regno
) != 0)
6988 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6991 else if (GET_CODE (pat
) == PARALLEL
)
6994 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6996 rtx v1
= XVECEXP (pat
, 0, i
);
6997 if (GET_CODE (v1
) == COND_EXEC
)
6998 v1
= COND_EXEC_CODE (v1
);
6999 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7001 rtx dest
= SET_DEST (v1
);
7002 while (GET_CODE (dest
) == SUBREG
7003 || GET_CODE (dest
) == ZERO_EXTRACT
7004 || GET_CODE (dest
) == STRICT_LOW_PART
)
7005 dest
= XEXP (dest
, 0);
7008 int xregno
= REGNO (dest
);
7010 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7011 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7014 if (xregno
< regno
+ nregs
7015 && xregno
+ xnregs
> regno
)
7017 if (xregno
< valueno
+ valuenregs
7018 && xregno
+ xnregs
> valueno
)
7020 if (goal_mem_addr_varies
7021 && reg_overlap_mentioned_for_reload_p (dest
,
7024 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7027 else if (goal_mem
&& MEM_P (dest
)
7028 && ! push_operand (dest
, GET_MODE (dest
)))
7030 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7031 && reg_equiv_memory_loc (regno
) != 0)
7033 else if (need_stable_sp
7034 && push_operand (dest
, GET_MODE (dest
)))
7040 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7044 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7045 link
= XEXP (link
, 1))
7047 pat
= XEXP (link
, 0);
7048 if (GET_CODE (pat
) == CLOBBER
)
7050 rtx dest
= SET_DEST (pat
);
7054 int xregno
= REGNO (dest
);
7056 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7058 if (xregno
< regno
+ nregs
7059 && xregno
+ xnregs
> regno
)
7061 else if (xregno
< valueno
+ valuenregs
7062 && xregno
+ xnregs
> valueno
)
7064 else if (goal_mem_addr_varies
7065 && reg_overlap_mentioned_for_reload_p (dest
,
7070 else if (goal_mem
&& MEM_P (dest
)
7071 && ! push_operand (dest
, GET_MODE (dest
)))
7073 else if (need_stable_sp
7074 && push_operand (dest
, GET_MODE (dest
)))
7081 /* If this insn auto-increments or auto-decrements
7082 either regno or valueno, return 0 now.
7083 If GOAL is a memory ref and its address is not constant,
7084 and this insn P increments a register used in GOAL, return 0. */
7088 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7089 if (REG_NOTE_KIND (link
) == REG_INC
7090 && REG_P (XEXP (link
, 0)))
7092 int incno
= REGNO (XEXP (link
, 0));
7093 if (incno
< regno
+ nregs
&& incno
>= regno
)
7095 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7097 if (goal_mem_addr_varies
7098 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7108 /* Find a place where INCED appears in an increment or decrement operator
7109 within X, and return the amount INCED is incremented or decremented by.
7110 The value is always positive. */
7113 find_inc_amount (rtx x
, rtx inced
)
7115 enum rtx_code code
= GET_CODE (x
);
7121 rtx addr
= XEXP (x
, 0);
7122 if ((GET_CODE (addr
) == PRE_DEC
7123 || GET_CODE (addr
) == POST_DEC
7124 || GET_CODE (addr
) == PRE_INC
7125 || GET_CODE (addr
) == POST_INC
)
7126 && XEXP (addr
, 0) == inced
)
7127 return GET_MODE_SIZE (GET_MODE (x
));
7128 else if ((GET_CODE (addr
) == PRE_MODIFY
7129 || GET_CODE (addr
) == POST_MODIFY
)
7130 && GET_CODE (XEXP (addr
, 1)) == PLUS
7131 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7132 && XEXP (addr
, 0) == inced
7133 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7135 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7136 return i
< 0 ? -i
: i
;
7140 fmt
= GET_RTX_FORMAT (code
);
7141 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7145 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7152 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7154 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7164 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7165 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7168 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7178 if (! INSN_P (insn
))
7181 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7182 if (REG_NOTE_KIND (link
) == REG_INC
)
7184 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7185 if (test
>= regno
&& test
< endregno
)
7191 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7192 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7193 REG_INC. REGNO must refer to a hard register. */
7196 regno_clobbered_p (unsigned int regno
, rtx_insn
*insn
, machine_mode mode
,
7199 unsigned int nregs
, endregno
;
7201 /* regno must be a hard register. */
7202 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7204 nregs
= hard_regno_nregs
[regno
][mode
];
7205 endregno
= regno
+ nregs
;
7207 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7208 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7209 && REG_P (XEXP (PATTERN (insn
), 0)))
7211 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7213 return test
>= regno
&& test
< endregno
;
7216 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7219 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7221 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7225 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7226 if ((GET_CODE (elt
) == CLOBBER
7227 || (sets
== 1 && GET_CODE (elt
) == SET
))
7228 && REG_P (XEXP (elt
, 0)))
7230 unsigned int test
= REGNO (XEXP (elt
, 0));
7232 if (test
>= regno
&& test
< endregno
)
7236 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7244 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7246 reload_adjust_reg_for_mode (rtx reloadreg
, machine_mode mode
)
7250 if (GET_MODE (reloadreg
) == mode
)
7253 regno
= REGNO (reloadreg
);
7255 if (REG_WORDS_BIG_ENDIAN
)
7256 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7257 - (int) hard_regno_nregs
[regno
][mode
];
7259 return gen_rtx_REG (mode
, regno
);
7262 static const char *const reload_when_needed_name
[] =
7265 "RELOAD_FOR_OUTPUT",
7267 "RELOAD_FOR_INPUT_ADDRESS",
7268 "RELOAD_FOR_INPADDR_ADDRESS",
7269 "RELOAD_FOR_OUTPUT_ADDRESS",
7270 "RELOAD_FOR_OUTADDR_ADDRESS",
7271 "RELOAD_FOR_OPERAND_ADDRESS",
7272 "RELOAD_FOR_OPADDR_ADDR",
7274 "RELOAD_FOR_OTHER_ADDRESS"
7277 /* These functions are used to print the variables set by 'find_reloads' */
7280 debug_reload_to_stream (FILE *f
)
7287 for (r
= 0; r
< n_reloads
; r
++)
7289 fprintf (f
, "Reload %d: ", r
);
7293 fprintf (f
, "reload_in (%s) = ",
7294 GET_MODE_NAME (rld
[r
].inmode
));
7295 print_inline_rtx (f
, rld
[r
].in
, 24);
7296 fprintf (f
, "\n\t");
7299 if (rld
[r
].out
!= 0)
7301 fprintf (f
, "reload_out (%s) = ",
7302 GET_MODE_NAME (rld
[r
].outmode
));
7303 print_inline_rtx (f
, rld
[r
].out
, 24);
7304 fprintf (f
, "\n\t");
7307 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7309 fprintf (f
, "%s (opnum = %d)",
7310 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7313 if (rld
[r
].optional
)
7314 fprintf (f
, ", optional");
7316 if (rld
[r
].nongroup
)
7317 fprintf (f
, ", nongroup");
7319 if (rld
[r
].inc
!= 0)
7320 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7322 if (rld
[r
].nocombine
)
7323 fprintf (f
, ", can't combine");
7325 if (rld
[r
].secondary_p
)
7326 fprintf (f
, ", secondary_reload_p");
7328 if (rld
[r
].in_reg
!= 0)
7330 fprintf (f
, "\n\treload_in_reg: ");
7331 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7334 if (rld
[r
].out_reg
!= 0)
7336 fprintf (f
, "\n\treload_out_reg: ");
7337 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7340 if (rld
[r
].reg_rtx
!= 0)
7342 fprintf (f
, "\n\treload_reg_rtx: ");
7343 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7347 if (rld
[r
].secondary_in_reload
!= -1)
7349 fprintf (f
, "%ssecondary_in_reload = %d",
7350 prefix
, rld
[r
].secondary_in_reload
);
7354 if (rld
[r
].secondary_out_reload
!= -1)
7355 fprintf (f
, "%ssecondary_out_reload = %d\n",
7356 prefix
, rld
[r
].secondary_out_reload
);
7359 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7361 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7362 insn_data
[rld
[r
].secondary_in_icode
].name
);
7366 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7367 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7368 insn_data
[rld
[r
].secondary_out_icode
].name
);
7377 debug_reload_to_stream (stderr
);