1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2023 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "tree-pass.h"
31 #include "stor-layout.h"
33 #include "dwarf2out.h"
34 #include "dwarf2asm.h"
35 #include "common/common-target.h"
37 #include "except.h" /* expand_builtin_dwarf_sp_column */
38 #include "profile-count.h" /* For expr.h */
39 #include "expr.h" /* expand_normal, emit_move_insn */
40 #include "output.h" /* asm_out_file */
41 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
42 #include "flags.h" /* dwarf_debuginfo_p */
44 /* ??? Poison these here until it can be done generically. They've been
45 totally replaced in this file; make sure it stays that way. */
46 #undef DWARF2_UNWIND_INFO
47 #undef DWARF2_FRAME_INFO
48 #if (GCC_VERSION >= 3000)
49 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
52 #ifndef INCOMING_RETURN_ADDR_RTX
53 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
56 #ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET
57 #define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET
60 /* A collected description of an entire row of the abstract CFI table. */
61 struct GTY(()) dw_cfi_row
63 /* The expression that computes the CFA, expressed in two different ways.
64 The CFA member for the simple cases, and the full CFI expression for
65 the complex cases. The later will be a DW_CFA_cfa_expression. */
69 /* The expressions for any register column that is saved. */
72 /* True if the register window is saved. */
75 /* True if the return address is in a mangled state. */
79 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
80 struct GTY(()) reg_saved_in_data
{
86 /* Since we no longer have a proper CFG, we're going to create a facsimile
87 of one on the fly while processing the frame-related insns.
89 We create dw_trace_info structures for each extended basic block beginning
90 and ending at a "save point". Save points are labels, barriers, certain
91 notes, and of course the beginning and end of the function.
93 As we encounter control transfer insns, we propagate the "current"
94 row state across the edges to the starts of traces. When checking is
95 enabled, we validate that we propagate the same data from all sources.
97 All traces are members of the TRACE_INFO array, in the order in which
98 they appear in the instruction stream.
100 All save points are present in the TRACE_INDEX hash, mapping the insn
101 starting a trace to the dw_trace_info describing the trace. */
105 /* The insn that begins the trace. */
108 /* The row state at the beginning and end of the trace. */
109 dw_cfi_row
*beg_row
, *end_row
;
111 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
112 while scanning insns. However, the args_size value is irrelevant at
113 any point except can_throw_internal_p insns. Therefore the "delay"
114 sizes the values that must actually be emitted for this trace. */
115 poly_int64_pod beg_true_args_size
, end_true_args_size
;
116 poly_int64_pod beg_delay_args_size
, end_delay_args_size
;
118 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
121 /* The following variables contain data used in interpreting frame related
122 expressions. These are not part of the "real" row state as defined by
123 Dwarf, but it seems like they need to be propagated into a trace in case
124 frame related expressions have been sunk. */
125 /* ??? This seems fragile. These variables are fragments of a larger
126 expression. If we do not keep the entire expression together, we risk
127 not being able to put it together properly. Consider forcing targets
128 to generate self-contained expressions and dropping all of the magic
129 interpretation code in this file. Or at least refusing to shrink wrap
130 any frame related insn that doesn't contain a complete expression. */
132 /* The register used for saving registers to the stack, and its offset
134 dw_cfa_location cfa_store
;
136 /* A temporary register holding an integral value used in adjusting SP
137 or setting up the store_reg. The "offset" field holds the integer
138 value, not an offset. */
139 dw_cfa_location cfa_temp
;
141 /* A set of registers saved in other registers. This is the inverse of
142 the row->reg_save info, if the entry is a DW_CFA_register. This is
143 implemented as a flat array because it normally contains zero or 1
144 entry, depending on the target. IA-64 is the big spender here, using
145 a maximum of 5 entries. */
146 vec
<reg_saved_in_data
> regs_saved_in_regs
;
148 /* An identifier for this trace. Used only for debugging dumps. */
151 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
152 bool switch_sections
;
154 /* True if we've seen different values incoming to beg_true_args_size. */
155 bool args_size_undefined
;
157 /* True if we've seen an insn with a REG_ARGS_SIZE note before EH_HEAD. */
158 bool args_size_defined_for_eh
;
162 /* Hashtable helpers. */
164 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
166 static inline hashval_t
hash (const dw_trace_info
*);
167 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
171 trace_info_hasher::hash (const dw_trace_info
*ti
)
173 return INSN_UID (ti
->head
);
177 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
179 return a
->head
== b
->head
;
183 /* The variables making up the pseudo-cfg, as described above. */
184 static vec
<dw_trace_info
> trace_info
;
185 static vec
<dw_trace_info
*> trace_work_list
;
186 static hash_table
<trace_info_hasher
> *trace_index
;
188 /* A vector of call frame insns for the CIE. */
191 /* The state of the first row of the FDE table, which includes the
192 state provided by the CIE. */
193 static GTY(()) dw_cfi_row
*cie_cfi_row
;
195 static GTY(()) reg_saved_in_data
*cie_return_save
;
197 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
199 /* The insn after which a new CFI note should be emitted. */
200 static rtx_insn
*add_cfi_insn
;
202 /* When non-null, add_cfi will add the CFI to this vector. */
203 static cfi_vec
*add_cfi_vec
;
205 /* The current instruction trace. */
206 static dw_trace_info
*cur_trace
;
208 /* The current, i.e. most recently generated, row of the CFI table. */
209 static dw_cfi_row
*cur_row
;
211 /* A copy of the current CFA, for use during the processing of a
213 static dw_cfa_location
*cur_cfa
;
215 /* We delay emitting a register save until either (a) we reach the end
216 of the prologue or (b) the register is clobbered. This clusters
217 register saves so that there are fewer pc advances. */
219 struct queued_reg_save
{
222 poly_int64_pod cfa_offset
;
226 static vec
<queued_reg_save
> queued_reg_saves
;
228 /* True if any CFI directives were emitted at the current insn. */
229 static bool any_cfis_emitted
;
231 /* Short-hand for commonly used register numbers. */
232 static struct cfa_reg dw_stack_pointer_regnum
;
233 static struct cfa_reg dw_frame_pointer_regnum
;
235 /* Hook used by __throw. */
238 expand_builtin_dwarf_sp_column (void)
240 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
241 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
244 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
245 init_one_dwarf_reg_size to communicate on what has been done by the
248 struct init_one_dwarf_reg_state
250 /* Whether the dwarf return column was initialized. */
251 bool wrote_return_column
;
253 /* For each hard register REGNO, whether init_one_dwarf_reg_size
254 was given REGNO to process already. */
255 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
259 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
260 initialize the dwarf register size table entry corresponding to register
261 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
262 use for the size entry to initialize, and INIT_STATE is the communication
263 datastructure conveying what we're doing to our caller. */
266 init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
268 init_one_dwarf_reg_state
*init_state
)
270 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
271 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
272 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
274 init_state
->processed_regno
[regno
] = true;
276 if (rnum
>= DWARF_FRAME_REGISTERS
)
279 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
281 if (regmode
== VOIDmode
)
283 init_state
->wrote_return_column
= true;
286 table
[dcol
] = GET_MODE_SIZE (regmode
);
289 /* Fill SIZES with size information for each DWARF register. */
292 generate_dwarf_reg_sizes (poly_uint16
*sizes
)
294 for (unsigned int i
= 0; i
< DWARF_FRAME_REGISTERS
; i
++)
295 sizes
[i
] = poly_uint16
{};
297 init_one_dwarf_reg_state init_state
{};
298 memset ((char *)&init_state
, 0, sizeof (init_state
));
300 for (unsigned int i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
302 /* No point in processing a register multiple times. This could happen
303 with register spans, e.g. when a reg is first processed as a piece of
304 a span, then as a register on its own later on. */
306 if (init_state
.processed_regno
[i
])
309 machine_mode save_mode
= targetm
.dwarf_frame_reg_mode (i
);
310 rtx span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
313 init_one_dwarf_reg_size (i
, save_mode
, sizes
, &init_state
);
316 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
318 rtx reg
= XVECEXP (span
, 0, si
);
320 init_one_dwarf_reg_size
321 (REGNO (reg
), GET_MODE (reg
), sizes
, &init_state
);
326 if (!init_state
.wrote_return_column
)
327 sizes
[DWARF_FRAME_RETURN_COLUMN
] = GET_MODE_SIZE (Pmode
);
329 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
330 sizes
[DWARF_ALT_FRAME_RETURN_COLUMN
] = GET_MODE_SIZE (Pmode
);
333 if (targetm
.init_dwarf_reg_sizes_extra
!= nullptr)
334 targetm
.init_dwarf_reg_sizes_extra (sizes
);
337 /* Return 0 if the DWARF register sizes are not constant, otherwise
338 return the size constant. */
341 dwarf_reg_sizes_constant ()
343 poly_uint16
*sizes
= XALLOCAVEC (poly_uint16
, DWARF_FRAME_REGISTERS
);
344 generate_dwarf_reg_sizes (sizes
);
347 for (unsigned int i
= 0; i
< DWARF_FRAME_REGISTERS
; i
++)
349 unsigned short value
;
350 if (!sizes
[i
].is_constant (&value
))
354 else if (result
!= value
)
360 /* Generate code to initialize the dwarf register size table located
361 at the provided ADDRESS. */
364 expand_builtin_init_dwarf_reg_sizes (tree address
)
366 poly_uint16
*sizes
= XALLOCAVEC (poly_uint16
, DWARF_FRAME_REGISTERS
);
367 generate_dwarf_reg_sizes (sizes
);
369 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (char_type_node
);
370 rtx addr
= expand_normal (address
);
371 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
372 for (unsigned int i
= 0; i
< DWARF_FRAME_REGISTERS
; ++i
)
374 unsigned short value
;
375 if (sizes
[i
].is_constant (&value
) && value
== 0)
376 /* No need to set the value to zero again. */
379 HOST_WIDE_INT offset
= i
* GET_MODE_SIZE (mode
);
380 emit_move_insn (adjust_address (mem
, mode
, offset
),
381 gen_int_mode (sizes
[i
], mode
));
386 static dw_trace_info
*
387 get_trace_info (rtx_insn
*insn
)
391 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
395 save_point_p (rtx_insn
*insn
)
397 /* Labels, except those that are really jump tables. */
399 return inside_basic_block_p (insn
);
401 /* We split traces at the prologue/epilogue notes because those
402 are points at which the unwind info is usually stable. This
403 makes it easier to find spots with identical unwind info so
404 that we can use remember/restore_state opcodes. */
406 switch (NOTE_KIND (insn
))
408 case NOTE_INSN_PROLOGUE_END
:
409 case NOTE_INSN_EPILOGUE_BEG
:
416 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
418 static inline HOST_WIDE_INT
419 div_data_align (HOST_WIDE_INT off
)
421 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
422 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
426 /* Return true if we need a signed version of a given opcode
427 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
430 need_data_align_sf_opcode (HOST_WIDE_INT off
)
432 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
435 /* Return a pointer to a newly allocated Call Frame Instruction. */
437 static inline dw_cfi_ref
440 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
442 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
443 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
448 /* Return a newly allocated CFI row, with no defined data. */
453 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
455 row
->cfa
.reg
.set_by_dwreg (INVALID_REGNUM
);
460 /* Return a copy of an existing CFI row. */
463 copy_cfi_row (dw_cfi_row
*src
)
465 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
468 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
473 /* Return a copy of an existing CFA location. */
475 static dw_cfa_location
*
476 copy_cfa (dw_cfa_location
*src
)
478 dw_cfa_location
*dst
= ggc_alloc
<dw_cfa_location
> ();
483 /* Generate a new label for the CFI info to refer to. */
486 dwarf2out_cfi_label (void)
488 int num
= dwarf2out_cfi_label_num
++;
491 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
493 return xstrdup (label
);
496 /* Add CFI either to the current insn stream or to a vector, or both. */
499 add_cfi (dw_cfi_ref cfi
)
501 any_cfis_emitted
= true;
503 if (add_cfi_insn
!= NULL
)
505 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
506 NOTE_CFI (add_cfi_insn
) = cfi
;
509 if (add_cfi_vec
!= NULL
)
510 vec_safe_push (*add_cfi_vec
, cfi
);
514 add_cfi_args_size (poly_int64 size
)
516 /* We don't yet have a representation for polynomial sizes. */
517 HOST_WIDE_INT const_size
= size
.to_constant ();
519 dw_cfi_ref cfi
= new_cfi ();
521 /* While we can occasionally have args_size < 0 internally, this state
522 should not persist at a point we actually need an opcode. */
523 gcc_assert (const_size
>= 0);
525 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
526 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_size
;
532 add_cfi_restore (unsigned reg
)
534 dw_cfi_ref cfi
= new_cfi ();
536 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
537 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
542 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
543 that the register column is no longer saved. */
546 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
548 if (vec_safe_length (row
->reg_save
) <= column
)
549 vec_safe_grow_cleared (row
->reg_save
, column
+ 1, true);
550 (*row
->reg_save
)[column
] = cfi
;
553 /* This function fills in aa dw_cfa_location structure from a dwarf location
554 descriptor sequence. */
557 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
559 struct dw_loc_descr_node
*ptr
;
561 cfa
->base_offset
= 0;
563 cfa
->reg
.set_by_dwreg (INVALID_REGNUM
);
565 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
567 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
603 cfa
->reg
.set_by_dwreg (op
- DW_OP_reg0
);
606 cfa
->reg
.set_by_dwreg (ptr
->dw_loc_oprnd1
.v
.val_int
);
641 if (cfa
->reg
.reg
== INVALID_REGNUM
)
645 ? ptr
->dw_loc_oprnd1
.v
.val_int
: op
- DW_OP_breg0
);
646 cfa
->reg
.set_by_dwreg (regno
);
647 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
651 /* Handle case when span can cover multiple registers. We
652 only support the simple case of consecutive registers
653 all with the same size. DWARF that we are dealing with
654 will look something like:
655 <DW_OP_bregx: (r49) 0; DW_OP_const1u: 32; DW_OP_shl;
656 DW_OP_bregx: (r48) 0; DW_OP_plus> */
660 ? ptr
->dw_loc_oprnd1
.v
.val_int
: op
- DW_OP_breg0
);
661 gcc_assert (regno
== cfa
->reg
.reg
- 1);
663 /* From all the consecutive registers used, we want to set
664 cfa->reg.reg to lower number register. */
665 cfa
->reg
.reg
= regno
;
666 /* The offset was the shift value. Use it to get the
667 span_width and then set it to 0. */
668 cfa
->reg
.span_width
= cfa
->offset
.to_constant () / 8;
709 gcc_assert (known_eq (cfa
->offset
, 0));
710 cfa
->offset
= op
- DW_OP_lit0
;
720 gcc_assert (known_eq (cfa
->offset
, 0));
721 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
724 cfa
->offset
= -cfa
->offset
;
727 /* The offset is already in place. */
729 case DW_OP_plus_uconst
:
730 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
738 /* Find the previous value for the CFA, iteratively. CFI is the opcode
739 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
740 one level of remember/restore state processing. */
743 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
745 switch (cfi
->dw_cfi_opc
)
747 case DW_CFA_def_cfa_offset
:
748 case DW_CFA_def_cfa_offset_sf
:
749 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
751 case DW_CFA_def_cfa_register
:
752 loc
->reg
.set_by_dwreg (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
);
755 case DW_CFA_def_cfa_sf
:
756 loc
->reg
.set_by_dwreg (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
);
757 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
759 case DW_CFA_def_cfa_expression
:
760 if (cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
)
761 *loc
= *cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
;
763 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
766 case DW_CFA_remember_state
:
767 gcc_assert (!remember
->in_use
);
769 remember
->in_use
= 1;
771 case DW_CFA_restore_state
:
772 gcc_assert (remember
->in_use
);
774 remember
->in_use
= 0;
782 /* Determine if two dw_cfa_location structures define the same data. */
785 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
787 return (loc1
->reg
== loc2
->reg
788 && known_eq (loc1
->offset
, loc2
->offset
)
789 && loc1
->indirect
== loc2
->indirect
790 && (loc1
->indirect
== 0
791 || known_eq (loc1
->base_offset
, loc2
->base_offset
)));
794 /* Determine if two CFI operands are identical. */
797 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
801 case dw_cfi_oprnd_unused
:
803 case dw_cfi_oprnd_reg_num
:
804 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
805 case dw_cfi_oprnd_offset
:
806 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
807 case dw_cfi_oprnd_addr
:
808 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
809 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
810 case dw_cfi_oprnd_loc
:
811 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
812 case dw_cfi_oprnd_cfa_loc
:
813 /* If any of them is NULL, don't dereference either. */
814 if (!a
->dw_cfi_cfa_loc
|| !b
->dw_cfi_cfa_loc
)
815 return a
->dw_cfi_cfa_loc
== b
->dw_cfi_cfa_loc
;
816 return cfa_equal_p (a
->dw_cfi_cfa_loc
, b
->dw_cfi_cfa_loc
);
821 /* Determine if two CFI entries are identical. */
824 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
826 enum dwarf_call_frame_info opc
;
828 /* Make things easier for our callers, including missing operands. */
831 if (a
== NULL
|| b
== NULL
)
834 /* Obviously, the opcodes must match. */
836 if (opc
!= b
->dw_cfi_opc
)
839 /* Compare the two operands, re-using the type of the operands as
840 already exposed elsewhere. */
841 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
842 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
843 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
844 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
847 /* Determine if two CFI_ROW structures are identical. */
850 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
852 size_t i
, n_a
, n_b
, n_max
;
856 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
859 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
862 n_a
= vec_safe_length (a
->reg_save
);
863 n_b
= vec_safe_length (b
->reg_save
);
864 n_max
= MAX (n_a
, n_b
);
866 for (i
= 0; i
< n_max
; ++i
)
868 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
871 r_a
= (*a
->reg_save
)[i
];
873 r_b
= (*b
->reg_save
)[i
];
875 if (!cfi_equal_p (r_a
, r_b
))
879 if (a
->window_save
!= b
->window_save
)
882 if (a
->ra_mangled
!= b
->ra_mangled
)
888 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
889 what opcode to emit. Returns the CFI opcode to effect the change, or
890 NULL if NEW_CFA == OLD_CFA. */
893 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
897 /* If nothing changed, no need to issue any call frame instructions. */
898 if (cfa_equal_p (old_cfa
, new_cfa
))
903 HOST_WIDE_INT const_offset
;
904 if (new_cfa
->reg
== old_cfa
->reg
905 && new_cfa
->reg
.span
== 1
906 && !new_cfa
->indirect
907 && !old_cfa
->indirect
908 && new_cfa
->offset
.is_constant (&const_offset
))
910 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
911 the CFA register did not change but the offset did. The data
912 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
913 in the assembler via the .cfi_def_cfa_offset directive. */
914 if (const_offset
< 0)
915 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
917 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
918 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_offset
;
920 else if (new_cfa
->offset
.is_constant ()
921 && known_eq (new_cfa
->offset
, old_cfa
->offset
)
922 && old_cfa
->reg
.reg
!= INVALID_REGNUM
923 && new_cfa
->reg
.span
== 1
924 && !new_cfa
->indirect
925 && !old_cfa
->indirect
)
927 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
928 indicating the CFA register has changed to <register> but the
929 offset has not changed. This requires the old CFA to have
930 been set as a register plus offset rather than a general
931 DW_CFA_def_cfa_expression. */
932 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
933 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
.reg
;
935 else if (new_cfa
->indirect
== 0
936 && new_cfa
->offset
.is_constant (&const_offset
)
937 && new_cfa
->reg
.span
== 1)
939 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
940 indicating the CFA register has changed to <register> with
941 the specified offset. The data factoring for DW_CFA_def_cfa_sf
942 happens in output_cfi, or in the assembler via the .cfi_def_cfa
944 if (const_offset
< 0)
945 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
947 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
948 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
.reg
;
949 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
953 /* Construct a DW_CFA_def_cfa_expression instruction to
954 calculate the CFA using a full location expression since no
955 register-offset pair is available. */
956 struct dw_loc_descr_node
*loc_list
;
958 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
959 loc_list
= build_cfa_loc (new_cfa
, 0);
960 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
961 if (!new_cfa
->offset
.is_constant ()
962 || !new_cfa
->base_offset
.is_constant ())
963 /* It's hard to reconstruct the CFA location for a polynomial
964 expression, so just cache it instead. */
965 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= copy_cfa (new_cfa
);
967 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= NULL
;
973 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
976 def_cfa_1 (dw_cfa_location
*new_cfa
)
980 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
981 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
983 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
986 cur_row
->cfa
= *new_cfa
;
987 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
994 /* Add the CFI for saving a register. REG is the CFA column number.
995 If SREG is INVALID_REGISTER, the register is saved at OFFSET from the CFA;
996 otherwise it is saved in SREG. */
999 reg_save (unsigned int reg
, struct cfa_reg sreg
, poly_int64 offset
)
1001 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
1002 dw_cfi_ref cfi
= new_cfi ();
1004 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
1006 if (sreg
.reg
== INVALID_REGNUM
)
1008 HOST_WIDE_INT const_offset
;
1009 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
1010 if (fde
&& fde
->stack_realign
)
1012 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1013 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
1014 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1015 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
1016 fde
->stack_realignment
);
1018 else if (offset
.is_constant (&const_offset
))
1020 if (need_data_align_sf_opcode (const_offset
))
1021 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
1022 else if (reg
& ~0x3f)
1023 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
1025 cfi
->dw_cfi_opc
= DW_CFA_offset
;
1026 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
1030 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1031 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
1032 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1033 = build_cfa_loc (&cur_row
->cfa
, offset
);
1036 else if (sreg
.reg
== reg
)
1038 /* While we could emit something like DW_CFA_same_value or
1039 DW_CFA_restore, we never expect to see something like that
1040 in a prologue. This is more likely to be a bug. A backend
1041 can always bypass this by using REG_CFA_RESTORE directly. */
1044 else if (sreg
.span
> 1)
1046 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1047 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
1048 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
= build_span_loc (sreg
);
1052 cfi
->dw_cfi_opc
= DW_CFA_register
;
1053 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
.reg
;
1057 update_row_reg_save (cur_row
, reg
, cfi
);
1060 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
1061 and adjust data structures to match. */
1064 notice_args_size (rtx_insn
*insn
)
1066 poly_int64 args_size
, delta
;
1069 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
1073 if (!cur_trace
->eh_head
)
1074 cur_trace
->args_size_defined_for_eh
= true;
1076 args_size
= get_args_size (note
);
1077 delta
= args_size
- cur_trace
->end_true_args_size
;
1078 if (known_eq (delta
, 0))
1081 cur_trace
->end_true_args_size
= args_size
;
1083 /* If the CFA is computed off the stack pointer, then we must adjust
1084 the computation of the CFA as well. */
1085 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1087 gcc_assert (!cur_cfa
->indirect
);
1089 /* Convert a change in args_size (always a positive in the
1090 direction of stack growth) to a change in stack pointer. */
1091 if (!STACK_GROWS_DOWNWARD
)
1094 cur_cfa
->offset
+= delta
;
1098 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
1099 data within the trace related to EH insns and args_size. */
1102 notice_eh_throw (rtx_insn
*insn
)
1104 poly_int64 args_size
= cur_trace
->end_true_args_size
;
1105 if (cur_trace
->eh_head
== NULL
)
1107 cur_trace
->eh_head
= insn
;
1108 cur_trace
->beg_delay_args_size
= args_size
;
1109 cur_trace
->end_delay_args_size
= args_size
;
1111 else if (maybe_ne (cur_trace
->end_delay_args_size
, args_size
))
1113 cur_trace
->end_delay_args_size
= args_size
;
1115 /* ??? If the CFA is the stack pointer, search backward for the last
1116 CFI note and insert there. Given that the stack changed for the
1117 args_size change, there *must* be such a note in between here and
1118 the last eh insn. */
1119 add_cfi_args_size (args_size
);
1123 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
1124 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
1125 used in places where rtl is prohibited. */
1127 static inline unsigned
1128 dwf_regno (const_rtx reg
)
1130 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
1131 return DWARF_FRAME_REGNUM (REGNO (reg
));
1134 /* Like dwf_regno, but when the value can span multiple registers. */
1136 static struct cfa_reg
1137 dwf_cfa_reg (rtx reg
)
1139 struct cfa_reg result
;
1141 result
.reg
= dwf_regno (reg
);
1143 result
.span_width
= 0;
1145 rtx span
= targetm
.dwarf_register_span (reg
);
1148 /* We only support the simple case of consecutive registers all with the
1150 result
.span
= XVECLEN (span
, 0);
1151 result
.span_width
= GET_MODE_SIZE (GET_MODE (XVECEXP (span
, 0, 0)))
1156 /* Ensure that the above assumption is accurate. */
1157 for (unsigned int i
= 0; i
< result
.span
; i
++)
1159 gcc_assert (GET_MODE_SIZE (GET_MODE (XVECEXP (span
, 0, i
)))
1160 .to_constant () == result
.span_width
);
1161 gcc_assert (REG_P (XVECEXP (span
, 0, i
)));
1162 gcc_assert (dwf_regno (XVECEXP (span
, 0, i
)) == result
.reg
+ i
);
1170 /* More efficient comparisons that don't call targetm.dwarf_register_span
1171 unnecessarily. These cfa_reg vs. rtx comparisons should be done at
1172 least for call-saved REGs that might not be CFA related (like stack
1173 pointer, hard frame pointer or DRAP registers are), in other cases it is
1174 just a compile time and memory optimization. */
1177 operator== (cfa_reg
&cfa
, rtx reg
)
1179 unsigned int regno
= dwf_regno (reg
);
1180 if (cfa
.reg
!= regno
)
1182 struct cfa_reg other
= dwf_cfa_reg (reg
);
1183 return cfa
== other
;
1187 operator!= (cfa_reg
&cfa
, rtx reg
)
1189 return !(cfa
== reg
);
1192 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1195 compare_reg_or_pc (rtx x
, rtx y
)
1197 if (REG_P (x
) && REG_P (y
))
1198 return REGNO (x
) == REGNO (y
);
1202 /* Record SRC as being saved in DEST. DEST may be null to delete an
1203 existing entry. SRC may be a register or PC_RTX. */
1206 record_reg_saved_in_reg (rtx dest
, rtx src
)
1208 reg_saved_in_data
*elt
;
1211 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
1212 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1215 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1217 elt
->saved_in_reg
= dest
;
1224 reg_saved_in_data e
= {src
, dest
};
1225 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1228 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1229 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1232 queue_reg_save (rtx reg
, rtx sreg
, poly_int64 offset
)
1235 queued_reg_save e
= {reg
, sreg
, offset
};
1238 /* Duplicates waste space, but it's also necessary to remove them
1239 for correctness, since the queue gets output in reverse order. */
1240 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1241 if (compare_reg_or_pc (q
->reg
, reg
))
1247 queued_reg_saves
.safe_push (e
);
1250 /* Output all the entries in QUEUED_REG_SAVES. */
1253 dwarf2out_flush_queued_reg_saves (void)
1258 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1261 struct cfa_reg sreg
;
1263 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1265 if (q
->reg
== pc_rtx
)
1266 reg
= DWARF_FRAME_RETURN_COLUMN
;
1268 reg
= dwf_regno (q
->reg
);
1270 sreg
= dwf_cfa_reg (q
->saved_reg
);
1272 sreg
.set_by_dwreg (INVALID_REGNUM
);
1273 reg_save (reg
, sreg
, q
->cfa_offset
);
1276 queued_reg_saves
.truncate (0);
1279 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1280 location for? Or, does it clobber a register which we've previously
1281 said that some other register is saved in, and for which we now
1282 have a new location for? */
1285 clobbers_queued_reg_save (const_rtx insn
)
1290 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1293 reg_saved_in_data
*rir
;
1295 if (modified_in_p (q
->reg
, insn
))
1298 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1299 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1300 && modified_in_p (rir
->saved_in_reg
, insn
))
1307 /* What register, if any, is currently saved in REG? */
1310 reg_saved_in (rtx reg
)
1312 unsigned int regn
= REGNO (reg
);
1314 reg_saved_in_data
*rir
;
1317 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1318 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1321 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1322 if (regn
== REGNO (rir
->saved_in_reg
))
1323 return rir
->orig_reg
;
1328 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1331 dwarf2out_frame_debug_def_cfa (rtx pat
)
1333 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1335 pat
= strip_offset (pat
, &cur_cfa
->offset
);
1338 cur_cfa
->indirect
= 1;
1339 pat
= strip_offset (XEXP (pat
, 0), &cur_cfa
->base_offset
);
1341 /* ??? If this fails, we could be calling into the _loc functions to
1342 define a full expression. So far no port does that. */
1343 gcc_assert (REG_P (pat
));
1344 cur_cfa
->reg
= dwf_cfa_reg (pat
);
1347 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1350 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1354 gcc_assert (GET_CODE (pat
) == SET
);
1355 dest
= XEXP (pat
, 0);
1356 src
= XEXP (pat
, 1);
1358 switch (GET_CODE (src
))
1361 gcc_assert (cur_cfa
->reg
== XEXP (src
, 0));
1362 cur_cfa
->offset
-= rtx_to_poly_int64 (XEXP (src
, 1));
1372 cur_cfa
->reg
= dwf_cfa_reg (dest
);
1373 gcc_assert (cur_cfa
->indirect
== 0);
1376 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1379 dwarf2out_frame_debug_cfa_offset (rtx set
)
1382 rtx src
, addr
, span
;
1383 unsigned int sregno
;
1385 src
= XEXP (set
, 1);
1386 addr
= XEXP (set
, 0);
1387 gcc_assert (MEM_P (addr
));
1388 addr
= XEXP (addr
, 0);
1390 /* As documented, only consider extremely simple addresses. */
1391 switch (GET_CODE (addr
))
1394 gcc_assert (cur_cfa
->reg
== addr
);
1395 offset
= -cur_cfa
->offset
;
1398 gcc_assert (cur_cfa
->reg
== XEXP (addr
, 0));
1399 offset
= rtx_to_poly_int64 (XEXP (addr
, 1)) - cur_cfa
->offset
;
1408 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1412 span
= targetm
.dwarf_register_span (src
);
1413 sregno
= dwf_regno (src
);
1416 /* ??? We'd like to use queue_reg_save, but we need to come up with
1417 a different flushing heuristic for epilogues. */
1418 struct cfa_reg invalid
;
1419 invalid
.set_by_dwreg (INVALID_REGNUM
);
1421 reg_save (sregno
, invalid
, offset
);
1424 /* We have a PARALLEL describing where the contents of SRC live.
1425 Adjust the offset for each piece of the PARALLEL. */
1426 poly_int64 span_offset
= offset
;
1428 gcc_assert (GET_CODE (span
) == PARALLEL
);
1430 const int par_len
= XVECLEN (span
, 0);
1431 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1433 rtx elem
= XVECEXP (span
, 0, par_index
);
1434 sregno
= dwf_regno (src
);
1435 reg_save (sregno
, invalid
, span_offset
);
1436 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1441 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1444 dwarf2out_frame_debug_cfa_register (rtx set
)
1448 struct cfa_reg dregno
;
1450 src
= XEXP (set
, 1);
1451 dest
= XEXP (set
, 0);
1453 record_reg_saved_in_reg (dest
, src
);
1455 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1457 sregno
= dwf_regno (src
);
1459 dregno
= dwf_cfa_reg (dest
);
1461 /* ??? We'd like to use queue_reg_save, but we need to come up with
1462 a different flushing heuristic for epilogues. */
1463 reg_save (sregno
, dregno
, 0);
1466 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1469 dwarf2out_frame_debug_cfa_expression (rtx set
)
1471 rtx src
, dest
, span
;
1472 dw_cfi_ref cfi
= new_cfi ();
1475 dest
= SET_DEST (set
);
1476 src
= SET_SRC (set
);
1478 gcc_assert (REG_P (src
));
1479 gcc_assert (MEM_P (dest
));
1481 span
= targetm
.dwarf_register_span (src
);
1484 regno
= dwf_regno (src
);
1486 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1487 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1488 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1489 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1490 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1492 /* ??? We'd like to use queue_reg_save, were the interface different,
1493 and, as above, we could manage flushing for epilogues. */
1495 update_row_reg_save (cur_row
, regno
, cfi
);
1498 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION
1502 dwarf2out_frame_debug_cfa_val_expression (rtx set
)
1504 rtx dest
= SET_DEST (set
);
1505 gcc_assert (REG_P (dest
));
1507 rtx span
= targetm
.dwarf_register_span (dest
);
1510 rtx src
= SET_SRC (set
);
1511 dw_cfi_ref cfi
= new_cfi ();
1512 cfi
->dw_cfi_opc
= DW_CFA_val_expression
;
1513 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= dwf_regno (dest
);
1514 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1515 = mem_loc_descriptor (src
, GET_MODE (src
),
1516 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1518 update_row_reg_save (cur_row
, dwf_regno (dest
), cfi
);
1521 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1524 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1526 gcc_assert (REG_P (reg
));
1528 rtx span
= targetm
.dwarf_register_span (reg
);
1531 unsigned int regno
= dwf_regno (reg
);
1532 add_cfi_restore (regno
);
1533 update_row_reg_save (cur_row
, regno
, NULL
);
1537 /* We have a PARALLEL describing where the contents of REG live.
1538 Restore the register for each piece of the PARALLEL. */
1539 gcc_assert (GET_CODE (span
) == PARALLEL
);
1541 const int par_len
= XVECLEN (span
, 0);
1542 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1544 reg
= XVECEXP (span
, 0, par_index
);
1545 gcc_assert (REG_P (reg
));
1546 unsigned int regno
= dwf_regno (reg
);
1547 add_cfi_restore (regno
);
1548 update_row_reg_save (cur_row
, regno
, NULL
);
1553 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1555 ??? Perhaps we should note in the CIE where windows are saved (instead
1556 of assuming 0(cfa)) and what registers are in the window. */
1559 dwarf2out_frame_debug_cfa_window_save (void)
1561 dw_cfi_ref cfi
= new_cfi ();
1563 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1565 cur_row
->window_save
= true;
1568 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_TOGGLE_RA_MANGLE.
1569 Note: DW_CFA_GNU_window_save dwarf opcode is reused for toggling RA mangle
1570 state, this is a target specific operation on AArch64 and can only be used
1571 on other targets if they don't use the window save operation otherwise. */
1574 dwarf2out_frame_debug_cfa_toggle_ra_mangle (void)
1576 dw_cfi_ref cfi
= new_cfi ();
1578 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1580 cur_row
->ra_mangled
= !cur_row
->ra_mangled
;
1583 /* Record call frame debugging information for an expression EXPR,
1584 which either sets SP or FP (adjusting how we calculate the frame
1585 address) or saves a register to the stack or another register.
1586 LABEL indicates the address of EXPR.
1588 This function encodes a state machine mapping rtxes to actions on
1589 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1590 users need not read the source code.
1592 The High-Level Picture
1594 Changes in the register we use to calculate the CFA: Currently we
1595 assume that if you copy the CFA register into another register, we
1596 should take the other one as the new CFA register; this seems to
1597 work pretty well. If it's wrong for some target, it's simple
1598 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1600 Changes in the register we use for saving registers to the stack:
1601 This is usually SP, but not always. Again, we deduce that if you
1602 copy SP into another register (and SP is not the CFA register),
1603 then the new register is the one we will be using for register
1604 saves. This also seems to work.
1606 Register saves: There's not much guesswork about this one; if
1607 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1608 register save, and the register used to calculate the destination
1609 had better be the one we think we're using for this purpose.
1610 It's also assumed that a copy from a call-saved register to another
1611 register is saving that register if RTX_FRAME_RELATED_P is set on
1612 that instruction. If the copy is from a call-saved register to
1613 the *same* register, that means that the register is now the same
1614 value as in the caller.
1616 Except: If the register being saved is the CFA register, and the
1617 offset is nonzero, we are saving the CFA, so we assume we have to
1618 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1619 the intent is to save the value of SP from the previous frame.
1621 In addition, if a register has previously been saved to a different
1624 Invariants / Summaries of Rules
1626 cfa current rule for calculating the CFA. It usually
1627 consists of a register and an offset. This is
1628 actually stored in *cur_cfa, but abbreviated
1629 for the purposes of this documentation.
1630 cfa_store register used by prologue code to save things to the stack
1631 cfa_store.offset is the offset from the value of
1632 cfa_store.reg to the actual CFA
1633 cfa_temp register holding an integral value. cfa_temp.offset
1634 stores the value, which will be used to adjust the
1635 stack pointer. cfa_temp is also used like cfa_store,
1636 to track stores to the stack via fp or a temp reg.
1638 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1639 with cfa.reg as the first operand changes the cfa.reg and its
1640 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1643 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1644 expression yielding a constant. This sets cfa_temp.reg
1645 and cfa_temp.offset.
1647 Rule 5: Create a new register cfa_store used to save items to the
1650 Rules 10-14: Save a register to the stack. Define offset as the
1651 difference of the original location and cfa_store's
1652 location (or cfa_temp's location if cfa_temp is used).
1654 Rules 16-20: If AND operation happens on sp in prologue, we assume
1655 stack is realigned. We will use a group of DW_OP_XXX
1656 expressions to represent the location of the stored
1657 register instead of CFA+offset.
1661 "{a,b}" indicates a choice of a xor b.
1662 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1665 (set <reg1> <reg2>:cfa.reg)
1666 effects: cfa.reg = <reg1>
1667 cfa.offset unchanged
1668 cfa_temp.reg = <reg1>
1669 cfa_temp.offset = cfa.offset
1672 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1673 {<const_int>,<reg>:cfa_temp.reg}))
1674 effects: cfa.reg = sp if fp used
1675 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1676 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1677 if cfa_store.reg==sp
1680 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1681 effects: cfa.reg = fp
1682 cfa_offset += +/- <const_int>
1685 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1686 constraints: <reg1> != fp
1688 effects: cfa.reg = <reg1>
1689 cfa_temp.reg = <reg1>
1690 cfa_temp.offset = cfa.offset
1693 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1694 constraints: <reg1> != fp
1696 effects: cfa_store.reg = <reg1>
1697 cfa_store.offset = cfa.offset - cfa_temp.offset
1700 (set <reg> <const_int>)
1701 effects: cfa_temp.reg = <reg>
1702 cfa_temp.offset = <const_int>
1705 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1706 effects: cfa_temp.reg = <reg1>
1707 cfa_temp.offset |= <const_int>
1710 (set <reg> (high <exp>))
1714 (set <reg> (lo_sum <exp> <const_int>))
1715 effects: cfa_temp.reg = <reg>
1716 cfa_temp.offset = <const_int>
1719 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1720 effects: cfa_store.offset -= <const_int>
1721 cfa.offset = cfa_store.offset if cfa.reg == sp
1723 cfa.base_offset = -cfa_store.offset
1726 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1727 effects: cfa_store.offset += -/+ mode_size(mem)
1728 cfa.offset = cfa_store.offset if cfa.reg == sp
1730 cfa.base_offset = -cfa_store.offset
1733 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1736 effects: cfa.reg = <reg1>
1737 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1740 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1741 effects: cfa.reg = <reg1>
1742 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1745 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1746 effects: cfa.reg = <reg1>
1747 cfa.base_offset = -cfa_temp.offset
1748 cfa_temp.offset -= mode_size(mem)
1751 (set <reg> {unspec, unspec_volatile})
1752 effects: target-dependent
1755 (set sp (and: sp <const_int>))
1756 constraints: cfa_store.reg == sp
1757 effects: cfun->fde.stack_realign = 1
1758 cfa_store.offset = 0
1759 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1762 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1763 effects: cfa_store.offset += -/+ mode_size(mem)
1766 (set (mem ({pre_inc, pre_dec} sp)) fp)
1767 constraints: fde->stack_realign == 1
1768 effects: cfa_store.offset = 0
1769 cfa.reg != HARD_FRAME_POINTER_REGNUM
1772 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1773 constraints: fde->stack_realign == 1
1775 && cfa.indirect == 0
1776 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1777 effects: Use DW_CFA_def_cfa_expression to define cfa
1778 cfa.reg == fde->drap_reg */
1781 dwarf2out_frame_debug_expr (rtx expr
)
1783 rtx src
, dest
, span
;
1787 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1788 the PARALLEL independently. The first element is always processed if
1789 it is a SET. This is for backward compatibility. Other elements
1790 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1791 flag is set in them. */
1792 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1795 int limit
= XVECLEN (expr
, 0);
1798 /* PARALLELs have strict read-modify-write semantics, so we
1799 ought to evaluate every rvalue before changing any lvalue.
1800 It's cumbersome to do that in general, but there's an
1801 easy approximation that is enough for all current users:
1802 handle register saves before register assignments. */
1803 if (GET_CODE (expr
) == PARALLEL
)
1804 for (par_index
= 0; par_index
< limit
; par_index
++)
1806 elem
= XVECEXP (expr
, 0, par_index
);
1807 if (GET_CODE (elem
) == SET
1808 && MEM_P (SET_DEST (elem
))
1809 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1810 dwarf2out_frame_debug_expr (elem
);
1813 for (par_index
= 0; par_index
< limit
; par_index
++)
1815 elem
= XVECEXP (expr
, 0, par_index
);
1816 if (GET_CODE (elem
) == SET
1817 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1818 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1819 dwarf2out_frame_debug_expr (elem
);
1824 gcc_assert (GET_CODE (expr
) == SET
);
1826 src
= SET_SRC (expr
);
1827 dest
= SET_DEST (expr
);
1831 rtx rsi
= reg_saved_in (src
);
1838 switch (GET_CODE (dest
))
1841 switch (GET_CODE (src
))
1843 /* Setting FP from SP. */
1845 if (cur_cfa
->reg
== src
)
1848 /* Update the CFA rule wrt SP or FP. Make sure src is
1849 relative to the current CFA register.
1851 We used to require that dest be either SP or FP, but the
1852 ARM copies SP to a temporary register, and from there to
1853 FP. So we just rely on the backends to only set
1854 RTX_FRAME_RELATED_P on appropriate insns. */
1855 cur_cfa
->reg
= dwf_cfa_reg (dest
);
1856 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1857 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1861 /* Saving a register in a register. */
1862 gcc_assert (!fixed_regs
[REGNO (dest
)]
1863 /* For the SPARC and its register window. */
1864 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1866 /* After stack is aligned, we can only save SP in FP
1867 if drap register is used. In this case, we have
1868 to restore stack pointer with the CFA value and we
1869 don't generate this DWARF information. */
1871 && fde
->stack_realign
1872 && REGNO (src
) == STACK_POINTER_REGNUM
)
1874 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1875 && fde
->drap_reg
!= INVALID_REGNUM
1876 && cur_cfa
->reg
!= src
1879 /* The save of hard frame pointer has been deferred
1880 until this point when Rule 18 applied. Emit it now. */
1881 queue_reg_save (dest
, NULL_RTX
, 0);
1882 /* And as the instruction modifies the hard frame pointer,
1883 flush the queue as well. */
1884 dwarf2out_flush_queued_reg_saves ();
1887 queue_reg_save (src
, dest
, 0);
1894 if (dest
== stack_pointer_rtx
)
1898 if (REG_P (XEXP (src
, 1)))
1900 gcc_assert (cur_trace
->cfa_temp
.reg
== XEXP (src
, 1));
1901 offset
= cur_trace
->cfa_temp
.offset
;
1903 else if (!poly_int_rtx_p (XEXP (src
, 1), &offset
))
1906 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1908 /* Restoring SP from FP in the epilogue. */
1909 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1910 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1912 else if (GET_CODE (src
) == LO_SUM
)
1913 /* Assume we've set the source reg of the LO_SUM from sp. */
1916 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1918 if (GET_CODE (src
) != MINUS
)
1920 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1921 cur_cfa
->offset
+= offset
;
1922 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1923 cur_trace
->cfa_store
.offset
+= offset
;
1925 else if (dest
== hard_frame_pointer_rtx
)
1928 /* Either setting the FP from an offset of the SP,
1929 or adjusting the FP */
1930 gcc_assert (frame_pointer_needed
);
1932 gcc_assert (REG_P (XEXP (src
, 0))
1933 && cur_cfa
->reg
== XEXP (src
, 0));
1934 offset
= rtx_to_poly_int64 (XEXP (src
, 1));
1935 if (GET_CODE (src
) != MINUS
)
1937 cur_cfa
->offset
+= offset
;
1938 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1942 gcc_assert (GET_CODE (src
) != MINUS
);
1945 if (REG_P (XEXP (src
, 0))
1946 && cur_cfa
->reg
== XEXP (src
, 0)
1947 && poly_int_rtx_p (XEXP (src
, 1), &offset
))
1949 /* Setting a temporary CFA register that will be copied
1950 into the FP later on. */
1952 cur_cfa
->offset
+= offset
;
1953 cur_cfa
->reg
= dwf_cfa_reg (dest
);
1954 /* Or used to save regs to the stack. */
1955 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1956 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1960 else if (REG_P (XEXP (src
, 0))
1961 && cur_trace
->cfa_temp
.reg
== XEXP (src
, 0)
1962 && XEXP (src
, 1) == stack_pointer_rtx
)
1964 /* Setting a scratch register that we will use instead
1965 of SP for saving registers to the stack. */
1966 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1967 cur_trace
->cfa_store
.reg
= dwf_cfa_reg (dest
);
1968 cur_trace
->cfa_store
.offset
1969 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1973 else if (GET_CODE (src
) == LO_SUM
1974 && poly_int_rtx_p (XEXP (src
, 1),
1975 &cur_trace
->cfa_temp
.offset
))
1976 cur_trace
->cfa_temp
.reg
= dwf_cfa_reg (dest
);
1984 case CONST_POLY_INT
:
1985 cur_trace
->cfa_temp
.reg
= dwf_cfa_reg (dest
);
1986 cur_trace
->cfa_temp
.offset
= rtx_to_poly_int64 (src
);
1991 gcc_assert (REG_P (XEXP (src
, 0))
1992 && cur_trace
->cfa_temp
.reg
== XEXP (src
, 0)
1993 && CONST_INT_P (XEXP (src
, 1)));
1995 cur_trace
->cfa_temp
.reg
= dwf_cfa_reg (dest
);
1996 if (!can_ior_p (cur_trace
->cfa_temp
.offset
, INTVAL (XEXP (src
, 1)),
1997 &cur_trace
->cfa_temp
.offset
))
1998 /* The target shouldn't generate this kind of CFI note if we
1999 can't represent it. */
2003 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
2004 which will fill in all of the bits. */
2011 case UNSPEC_VOLATILE
:
2012 /* All unspecs should be represented by REG_CFA_* notes. */
2018 /* If this AND operation happens on stack pointer in prologue,
2019 we assume the stack is realigned and we extract the
2021 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
2023 /* We interpret reg_save differently with stack_realign set.
2024 Thus we must flush whatever we have queued first. */
2025 dwarf2out_flush_queued_reg_saves ();
2027 gcc_assert (cur_trace
->cfa_store
.reg
2029 fde
->stack_realign
= 1;
2030 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
2031 cur_trace
->cfa_store
.offset
= 0;
2033 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
2034 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
2036 gcc_assert (cur_cfa
->reg
.span
== 1);
2037 fde
->drap_reg
= cur_cfa
->reg
.reg
;
2049 /* Saving a register to the stack. Make sure dest is relative to the
2051 switch (GET_CODE (XEXP (dest
, 0)))
2057 /* We can't handle variable size modifications. */
2058 offset
= -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
2060 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
2061 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
2063 cur_trace
->cfa_store
.offset
+= offset
;
2064 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
2065 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
2067 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
2068 offset
-= cur_trace
->cfa_store
.offset
;
2070 offset
= -cur_trace
->cfa_store
.offset
;
2077 offset
= GET_MODE_SIZE (GET_MODE (dest
));
2078 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
2081 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
2082 == STACK_POINTER_REGNUM
)
2083 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
2085 cur_trace
->cfa_store
.offset
+= offset
;
2087 /* Rule 18: If stack is aligned, we will use FP as a
2088 reference to represent the address of the stored
2091 && fde
->stack_realign
2093 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
2095 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
2096 cur_trace
->cfa_store
.offset
= 0;
2100 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
2101 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
2103 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
2104 offset
+= -cur_trace
->cfa_store
.offset
;
2106 offset
= -cur_trace
->cfa_store
.offset
;
2110 /* With an offset. */
2115 struct cfa_reg regno
;
2117 gcc_assert (REG_P (XEXP (XEXP (dest
, 0), 0)));
2118 offset
= rtx_to_poly_int64 (XEXP (XEXP (dest
, 0), 1));
2119 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
2122 regno
= dwf_cfa_reg (XEXP (XEXP (dest
, 0), 0));
2124 if (cur_cfa
->reg
== regno
)
2125 offset
-= cur_cfa
->offset
;
2126 else if (cur_trace
->cfa_store
.reg
== regno
)
2127 offset
-= cur_trace
->cfa_store
.offset
;
2130 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
2131 offset
-= cur_trace
->cfa_temp
.offset
;
2137 /* Without an offset. */
2140 struct cfa_reg regno
= dwf_cfa_reg (XEXP (dest
, 0));
2142 if (cur_cfa
->reg
== regno
)
2143 offset
= -cur_cfa
->offset
;
2144 else if (cur_trace
->cfa_store
.reg
== regno
)
2145 offset
= -cur_trace
->cfa_store
.offset
;
2148 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
2149 offset
= -cur_trace
->cfa_temp
.offset
;
2156 gcc_assert (cur_trace
->cfa_temp
.reg
== XEXP (XEXP (dest
, 0), 0));
2157 offset
= -cur_trace
->cfa_temp
.offset
;
2158 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
2166 /* If the source operand of this MEM operation is a memory,
2167 we only care how much stack grew. */
2172 && REGNO (src
) != STACK_POINTER_REGNUM
2173 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
2174 && cur_cfa
->reg
== src
)
2176 /* We're storing the current CFA reg into the stack. */
2178 if (known_eq (cur_cfa
->offset
, 0))
2181 /* If stack is aligned, putting CFA reg into stack means
2182 we can no longer use reg + offset to represent CFA.
2183 Here we use DW_CFA_def_cfa_expression instead. The
2184 result of this expression equals to the original CFA
2187 && fde
->stack_realign
2188 && cur_cfa
->indirect
== 0
2189 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
2191 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
.reg
);
2193 cur_cfa
->indirect
= 1;
2194 cur_cfa
->reg
= dw_frame_pointer_regnum
;
2195 cur_cfa
->base_offset
= offset
;
2196 cur_cfa
->offset
= 0;
2198 fde
->drap_reg_saved
= 1;
2202 /* If the source register is exactly the CFA, assume
2203 we're saving SP like any other register; this happens
2205 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
2210 /* Otherwise, we'll need to look in the stack to
2211 calculate the CFA. */
2212 rtx x
= XEXP (dest
, 0);
2216 gcc_assert (REG_P (x
));
2218 cur_cfa
->reg
= dwf_cfa_reg (x
);
2219 cur_cfa
->base_offset
= offset
;
2220 cur_cfa
->indirect
= 1;
2226 span
= targetm
.dwarf_register_span (src
);
2233 /* Just verify the hard frame pointer save when doing dynamic
2234 realignment uses expected offset. The actual queue_reg_save
2235 needs to be deferred until the instruction that sets
2236 hard frame pointer to stack pointer, see PR99334 for
2238 gcc_assert (known_eq (offset
, 0));
2240 queue_reg_save (src
, NULL_RTX
, offset
);
2244 /* We have a PARALLEL describing where the contents of SRC live.
2245 Queue register saves for each piece of the PARALLEL. */
2246 poly_int64 span_offset
= offset
;
2248 gcc_assert (GET_CODE (span
) == PARALLEL
);
2250 const int par_len
= XVECLEN (span
, 0);
2251 for (int par_index
= 0; par_index
< par_len
; par_index
++)
2253 rtx elem
= XVECEXP (span
, 0, par_index
);
2254 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2255 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2265 /* Record call frame debugging information for INSN, which either sets
2266 SP or FP (adjusting how we calculate the frame address) or saves a
2267 register to the stack. */
2270 dwarf2out_frame_debug (rtx_insn
*insn
)
2273 bool handled_one
= false;
2275 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2276 switch (REG_NOTE_KIND (note
))
2278 case REG_FRAME_RELATED_EXPR
:
2279 pat
= XEXP (note
, 0);
2282 case REG_CFA_DEF_CFA
:
2283 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2287 case REG_CFA_ADJUST_CFA
:
2292 if (GET_CODE (n
) == PARALLEL
)
2293 n
= XVECEXP (n
, 0, 0);
2295 dwarf2out_frame_debug_adjust_cfa (n
);
2299 case REG_CFA_OFFSET
:
2302 n
= single_set (insn
);
2303 dwarf2out_frame_debug_cfa_offset (n
);
2307 case REG_CFA_REGISTER
:
2312 if (GET_CODE (n
) == PARALLEL
)
2313 n
= XVECEXP (n
, 0, 0);
2315 dwarf2out_frame_debug_cfa_register (n
);
2319 case REG_CFA_EXPRESSION
:
2320 case REG_CFA_VAL_EXPRESSION
:
2323 n
= single_set (insn
);
2325 if (REG_NOTE_KIND (note
) == REG_CFA_EXPRESSION
)
2326 dwarf2out_frame_debug_cfa_expression (n
);
2328 dwarf2out_frame_debug_cfa_val_expression (n
);
2333 case REG_CFA_RESTORE
:
2338 if (GET_CODE (n
) == PARALLEL
)
2339 n
= XVECEXP (n
, 0, 0);
2342 dwarf2out_frame_debug_cfa_restore (n
);
2346 case REG_CFA_SET_VDRAP
:
2350 dw_fde_ref fde
= cfun
->fde
;
2353 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2355 fde
->vdrap_reg
= dwf_regno (n
);
2361 case REG_CFA_TOGGLE_RA_MANGLE
:
2362 dwarf2out_frame_debug_cfa_toggle_ra_mangle ();
2366 case REG_CFA_WINDOW_SAVE
:
2367 dwarf2out_frame_debug_cfa_window_save ();
2371 case REG_CFA_FLUSH_QUEUE
:
2372 /* The actual flush happens elsewhere. */
2382 pat
= PATTERN (insn
);
2384 dwarf2out_frame_debug_expr (pat
);
2386 /* Check again. A parallel can save and update the same register.
2387 We could probably check just once, here, but this is safer than
2388 removing the check at the start of the function. */
2389 if (clobbers_queued_reg_save (pat
))
2390 dwarf2out_flush_queued_reg_saves ();
2394 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2397 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2399 size_t i
, n_old
, n_new
, n_max
;
2402 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2403 add_cfi (new_row
->cfa_cfi
);
2406 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2411 n_old
= vec_safe_length (old_row
->reg_save
);
2412 n_new
= vec_safe_length (new_row
->reg_save
);
2413 n_max
= MAX (n_old
, n_new
);
2415 for (i
= 0; i
< n_max
; ++i
)
2417 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2420 r_old
= (*old_row
->reg_save
)[i
];
2422 r_new
= (*new_row
->reg_save
)[i
];
2426 else if (r_new
== NULL
)
2427 add_cfi_restore (i
);
2428 else if (!cfi_equal_p (r_old
, r_new
))
2432 if (!old_row
->window_save
&& new_row
->window_save
)
2434 dw_cfi_ref cfi
= new_cfi ();
2436 gcc_assert (!old_row
->ra_mangled
&& !new_row
->ra_mangled
);
2437 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
2441 if (old_row
->ra_mangled
!= new_row
->ra_mangled
)
2443 dw_cfi_ref cfi
= new_cfi ();
2445 gcc_assert (!old_row
->window_save
&& !new_row
->window_save
);
2446 /* DW_CFA_GNU_window_save is reused for toggling RA mangle state. */
2447 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
2452 /* Examine CFI and return true if a cfi label and set_loc is needed
2453 beforehand. Even when generating CFI assembler instructions, we
2454 still have to add the cfi to the list so that lookup_cfa_1 works
2455 later on. When -g2 and above we even need to force emitting of
2456 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2457 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2458 and so don't use convert_cfa_to_fb_loc_list. */
2461 cfi_label_required_p (dw_cfi_ref cfi
)
2463 if (!dwarf2out_do_cfi_asm ())
2466 if (dwarf_version
== 2
2467 && debug_info_level
> DINFO_LEVEL_TERSE
2468 && dwarf_debuginfo_p ())
2470 switch (cfi
->dw_cfi_opc
)
2472 case DW_CFA_def_cfa_offset
:
2473 case DW_CFA_def_cfa_offset_sf
:
2474 case DW_CFA_def_cfa_register
:
2475 case DW_CFA_def_cfa
:
2476 case DW_CFA_def_cfa_sf
:
2477 case DW_CFA_def_cfa_expression
:
2478 case DW_CFA_restore_state
:
2487 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2488 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2491 add_cfis_to_fde (void)
2493 dw_fde_ref fde
= cfun
->fde
;
2494 rtx_insn
*insn
, *next
;
2496 for (insn
= get_insns (); insn
; insn
= next
)
2498 next
= NEXT_INSN (insn
);
2500 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2501 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2503 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2505 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2507 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2509 required
|= cfi_label_required_p (NOTE_CFI (next
));
2510 next
= NEXT_INSN (next
);
2512 else if (active_insn_p (next
)
2513 || (NOTE_P (next
) && (NOTE_KIND (next
)
2514 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2517 next
= NEXT_INSN (next
);
2520 int num
= dwarf2out_cfi_label_num
;
2521 const char *label
= dwarf2out_cfi_label ();
2524 /* Set the location counter to the new label. */
2526 xcfi
->dw_cfi_opc
= DW_CFA_advance_loc4
;
2527 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2528 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2530 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2531 NOTE_LABEL_NUMBER (tmp
) = num
;
2536 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2537 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2538 insn
= NEXT_INSN (insn
);
2540 while (insn
!= next
);
2545 static void dump_cfi_row (FILE *f
, dw_cfi_row
*row
);
2547 /* If LABEL is the start of a trace, then initialize the state of that
2548 trace from CUR_TRACE and CUR_ROW. */
2551 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2555 ti
= get_trace_info (start
);
2556 gcc_assert (ti
!= NULL
);
2560 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2561 cur_trace
->id
, ti
->id
,
2562 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2563 (origin
? INSN_UID (origin
) : 0));
2566 poly_int64 args_size
= cur_trace
->end_true_args_size
;
2567 if (ti
->beg_row
== NULL
)
2569 /* This is the first time we've encountered this trace. Propagate
2570 state across the edge and push the trace onto the work list. */
2571 ti
->beg_row
= copy_cfi_row (cur_row
);
2572 ti
->beg_true_args_size
= args_size
;
2574 ti
->cfa_store
= cur_trace
->cfa_store
;
2575 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2576 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2578 trace_work_list
.safe_push (ti
);
2581 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2586 /* We ought to have the same state incoming to a given trace no
2587 matter how we arrive at the trace. Anything else means we've
2588 got some kind of optimization error. */
2590 if (!cfi_row_equal_p (cur_row
, ti
->beg_row
))
2594 fprintf (dump_file
, "Inconsistent CFI state!\n");
2595 fprintf (dump_file
, "SHOULD have:\n");
2596 dump_cfi_row (dump_file
, ti
->beg_row
);
2597 fprintf (dump_file
, "DO have:\n");
2598 dump_cfi_row (dump_file
, cur_row
);
2605 /* The args_size is allowed to conflict if it isn't actually used. */
2606 if (maybe_ne (ti
->beg_true_args_size
, args_size
))
2607 ti
->args_size_undefined
= true;
2611 /* Similarly, but handle the args_size and CFA reset across EH
2612 and non-local goto edges. */
2615 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2617 poly_int64 save_args_size
, delta
;
2618 dw_cfa_location save_cfa
;
2620 save_args_size
= cur_trace
->end_true_args_size
;
2621 if (known_eq (save_args_size
, 0))
2623 maybe_record_trace_start (start
, origin
);
2627 delta
= -save_args_size
;
2628 cur_trace
->end_true_args_size
= 0;
2630 save_cfa
= cur_row
->cfa
;
2631 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2633 /* Convert a change in args_size (always a positive in the
2634 direction of stack growth) to a change in stack pointer. */
2635 if (!STACK_GROWS_DOWNWARD
)
2638 cur_row
->cfa
.offset
+= delta
;
2641 maybe_record_trace_start (start
, origin
);
2643 cur_trace
->end_true_args_size
= save_args_size
;
2644 cur_row
->cfa
= save_cfa
;
2647 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2648 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2651 create_trace_edges (rtx_insn
*insn
)
2658 rtx_jump_table_data
*table
;
2660 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2663 if (tablejump_p (insn
, NULL
, &table
))
2665 rtvec vec
= table
->get_labels ();
2667 n
= GET_NUM_ELEM (vec
);
2668 for (i
= 0; i
< n
; ++i
)
2670 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2671 maybe_record_trace_start (lab
, insn
);
2674 /* Handle casesi dispatch insns. */
2675 if ((tmp
= tablejump_casesi_pattern (insn
)) != NULL_RTX
)
2677 rtx_insn
* lab
= label_ref_label (XEXP (SET_SRC (tmp
), 2));
2678 maybe_record_trace_start (lab
, insn
);
2681 else if (computed_jump_p (insn
))
2685 FOR_EACH_VEC_SAFE_ELT (forced_labels
, i
, temp
)
2686 maybe_record_trace_start (temp
, insn
);
2688 else if (returnjump_p (insn
))
2690 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2692 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2693 for (i
= 0; i
< n
; ++i
)
2696 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2697 maybe_record_trace_start (lab
, insn
);
2702 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2703 gcc_assert (lab
!= NULL
);
2704 maybe_record_trace_start (lab
, insn
);
2707 else if (CALL_P (insn
))
2709 /* Sibling calls don't have edges inside this function. */
2710 if (SIBLING_CALL_P (insn
))
2713 /* Process non-local goto edges. */
2714 if (can_nonlocal_goto (insn
))
2715 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2718 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2720 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2722 int i
, n
= seq
->len ();
2723 for (i
= 0; i
< n
; ++i
)
2724 create_trace_edges (seq
->insn (i
));
2728 /* Process EH edges. */
2729 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2731 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2733 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2737 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2740 scan_insn_after (rtx_insn
*insn
)
2742 if (RTX_FRAME_RELATED_P (insn
))
2743 dwarf2out_frame_debug (insn
);
2744 notice_args_size (insn
);
2747 /* Scan the trace beginning at INSN and create the CFI notes for the
2748 instructions therein. */
2751 scan_trace (dw_trace_info
*trace
, bool entry
)
2753 rtx_insn
*prev
, *insn
= trace
->head
;
2754 dw_cfa_location this_cfa
;
2757 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2758 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2761 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2762 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2765 cur_row
= trace
->end_row
;
2767 this_cfa
= cur_row
->cfa
;
2768 cur_cfa
= &this_cfa
;
2770 /* If the current function starts with a non-standard incoming frame
2771 sp offset, emit a note before the first instruction. */
2773 && DEFAULT_INCOMING_FRAME_SP_OFFSET
!= INCOMING_FRAME_SP_OFFSET
)
2775 add_cfi_insn
= insn
;
2776 gcc_assert (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_DELETED
);
2777 this_cfa
.offset
= INCOMING_FRAME_SP_OFFSET
;
2778 def_cfa_1 (&this_cfa
);
2781 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2783 prev
= insn
, insn
= NEXT_INSN (insn
))
2787 /* Do everything that happens "before" the insn. */
2788 add_cfi_insn
= prev
;
2790 /* Notice the end of a trace. */
2791 if (BARRIER_P (insn
))
2793 /* Don't bother saving the unneeded queued registers at all. */
2794 queued_reg_saves
.truncate (0);
2797 if (save_point_p (insn
))
2799 /* Propagate across fallthru edges. */
2800 dwarf2out_flush_queued_reg_saves ();
2801 maybe_record_trace_start (insn
, NULL
);
2805 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2808 /* Handle all changes to the row state. Sequences require special
2809 handling for the positioning of the notes. */
2810 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2813 int i
, n
= pat
->len ();
2815 control
= pat
->insn (0);
2816 if (can_throw_internal (control
))
2817 notice_eh_throw (control
);
2818 dwarf2out_flush_queued_reg_saves ();
2820 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2822 /* ??? Hopefully multiple delay slots are not annulled. */
2823 gcc_assert (n
== 2);
2824 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2825 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2827 elt
= pat
->insn (1);
2829 if (INSN_FROM_TARGET_P (elt
))
2831 cfi_vec save_row_reg_save
;
2833 /* If ELT is an instruction from target of an annulled
2834 branch, the effects are for the target only and so
2835 the args_size and CFA along the current path
2836 shouldn't change. */
2837 add_cfi_insn
= NULL
;
2838 poly_int64 restore_args_size
= cur_trace
->end_true_args_size
;
2839 cur_cfa
= &cur_row
->cfa
;
2840 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2842 scan_insn_after (elt
);
2844 /* ??? Should we instead save the entire row state? */
2845 gcc_assert (!queued_reg_saves
.length ());
2847 create_trace_edges (control
);
2849 cur_trace
->end_true_args_size
= restore_args_size
;
2850 cur_row
->cfa
= this_cfa
;
2851 cur_row
->reg_save
= save_row_reg_save
;
2852 cur_cfa
= &this_cfa
;
2856 /* If ELT is a annulled branch-taken instruction (i.e.
2857 executed only when branch is not taken), the args_size
2858 and CFA should not change through the jump. */
2859 create_trace_edges (control
);
2861 /* Update and continue with the trace. */
2862 add_cfi_insn
= insn
;
2863 scan_insn_after (elt
);
2864 def_cfa_1 (&this_cfa
);
2869 /* The insns in the delay slot should all be considered to happen
2870 "before" a call insn. Consider a call with a stack pointer
2871 adjustment in the delay slot. The backtrace from the callee
2872 should include the sp adjustment. Unfortunately, that leaves
2873 us with an unavoidable unwinding error exactly at the call insn
2874 itself. For jump insns we'd prefer to avoid this error by
2875 placing the notes after the sequence. */
2876 if (JUMP_P (control
))
2877 add_cfi_insn
= insn
;
2879 for (i
= 1; i
< n
; ++i
)
2881 elt
= pat
->insn (i
);
2882 scan_insn_after (elt
);
2885 /* Make sure any register saves are visible at the jump target. */
2886 dwarf2out_flush_queued_reg_saves ();
2887 any_cfis_emitted
= false;
2889 /* However, if there is some adjustment on the call itself, e.g.
2890 a call_pop, that action should be considered to happen after
2891 the call returns. */
2892 add_cfi_insn
= insn
;
2893 scan_insn_after (control
);
2897 /* Flush data before calls and jumps, and of course if necessary. */
2898 if (can_throw_internal (insn
))
2900 notice_eh_throw (insn
);
2901 dwarf2out_flush_queued_reg_saves ();
2903 else if (!NONJUMP_INSN_P (insn
)
2904 || clobbers_queued_reg_save (insn
)
2905 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2906 dwarf2out_flush_queued_reg_saves ();
2907 any_cfis_emitted
= false;
2909 add_cfi_insn
= insn
;
2910 scan_insn_after (insn
);
2914 /* Between frame-related-p and args_size we might have otherwise
2915 emitted two cfa adjustments. Do it now. */
2916 def_cfa_1 (&this_cfa
);
2918 /* Minimize the number of advances by emitting the entire queue
2919 once anything is emitted. */
2920 if (any_cfis_emitted
2921 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2922 dwarf2out_flush_queued_reg_saves ();
2924 /* Note that a test for control_flow_insn_p does exactly the
2925 same tests as are done to actually create the edges. So
2926 always call the routine and let it not create edges for
2927 non-control-flow insns. */
2928 create_trace_edges (control
);
2931 gcc_assert (!cfun
->fde
|| !cfun
->fde
->rule18
);
2932 add_cfi_insn
= NULL
;
2938 /* Scan the function and create the initial set of CFI notes. */
2941 create_cfi_notes (void)
2945 gcc_checking_assert (!queued_reg_saves
.exists ());
2946 gcc_checking_assert (!trace_work_list
.exists ());
2948 /* Always begin at the entry trace. */
2949 ti
= &trace_info
[0];
2950 scan_trace (ti
, true);
2952 while (!trace_work_list
.is_empty ())
2954 ti
= trace_work_list
.pop ();
2955 scan_trace (ti
, false);
2958 queued_reg_saves
.release ();
2959 trace_work_list
.release ();
2962 /* Return the insn before the first NOTE_INSN_CFI after START. */
2965 before_next_cfi_note (rtx_insn
*start
)
2967 rtx_insn
*prev
= start
;
2970 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2973 start
= NEXT_INSN (start
);
2978 /* Insert CFI notes between traces to properly change state between them. */
2981 connect_traces (void)
2984 dw_trace_info
*prev_ti
, *ti
;
2986 /* ??? Ideally, we should have both queued and processed every trace.
2987 However the current representation of constant pools on various targets
2988 is indistinguishable from unreachable code. Assume for the moment that
2989 we can simply skip over such traces. */
2990 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2991 these are not "real" instructions, and should not be considered.
2992 This could be generically useful for tablejump data as well. */
2993 /* Remove all unprocessed traces from the list. */
2995 VEC_ORDERED_REMOVE_IF_FROM_TO (trace_info
, ix
, ix2
, ti
, 1,
2996 trace_info
.length (), ti
->beg_row
== NULL
);
2997 FOR_EACH_VEC_ELT (trace_info
, ix
, ti
)
2998 gcc_assert (ti
->end_row
!= NULL
);
3000 /* Work from the end back to the beginning. This lets us easily insert
3001 remember/restore_state notes in the correct order wrt other notes. */
3002 n
= trace_info
.length ();
3003 prev_ti
= &trace_info
[n
- 1];
3004 for (i
= n
- 1; i
> 0; --i
)
3006 dw_cfi_row
*old_row
;
3009 prev_ti
= &trace_info
[i
- 1];
3011 add_cfi_insn
= ti
->head
;
3013 /* In dwarf2out_switch_text_section, we'll begin a new FDE
3014 for the portion of the function in the alternate text
3015 section. The row state at the very beginning of that
3016 new FDE will be exactly the row state from the CIE. */
3017 if (ti
->switch_sections
)
3018 old_row
= cie_cfi_row
;
3021 old_row
= prev_ti
->end_row
;
3022 /* If there's no change from the previous end state, fine. */
3023 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
3025 /* Otherwise check for the common case of sharing state with
3026 the beginning of an epilogue, but not the end. Insert
3027 remember/restore opcodes in that case. */
3028 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
3032 /* Note that if we blindly insert the remember at the
3033 start of the trace, we can wind up increasing the
3034 size of the unwind info due to extra advance opcodes.
3035 Instead, put the remember immediately before the next
3036 state change. We know there must be one, because the
3037 state at the beginning and head of the trace differ. */
3038 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
3040 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
3043 add_cfi_insn
= ti
->head
;
3045 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
3048 /* If the target unwinder does not save the CFA as part of the
3049 register state, we need to restore it separately. */
3050 if (targetm
.asm_out
.should_restore_cfa_state ()
3051 && (cfi
= def_cfa_0 (&old_row
->cfa
, &ti
->beg_row
->cfa
)))
3054 old_row
= prev_ti
->beg_row
;
3056 /* Otherwise, we'll simply change state from the previous end. */
3059 change_cfi_row (old_row
, ti
->beg_row
);
3061 if (dump_file
&& add_cfi_insn
!= ti
->head
)
3065 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
3066 prev_ti
->id
, ti
->id
);
3071 note
= NEXT_INSN (note
);
3072 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
3073 output_cfi_directive (dump_file
, NOTE_CFI (note
));
3075 while (note
!= add_cfi_insn
);
3079 /* Connect args_size between traces that have can_throw_internal insns. */
3080 if (cfun
->eh
->lp_array
)
3082 poly_int64 prev_args_size
= 0;
3084 for (i
= 0; i
< n
; ++i
)
3086 ti
= &trace_info
[i
];
3088 if (ti
->switch_sections
)
3091 if (ti
->eh_head
== NULL
)
3094 /* We require either the incoming args_size values to match or the
3095 presence of an insn setting it before the first EH insn. */
3096 gcc_assert (!ti
->args_size_undefined
|| ti
->args_size_defined_for_eh
);
3098 /* In the latter case, we force the creation of a CFI note. */
3099 if (ti
->args_size_undefined
3100 || maybe_ne (ti
->beg_delay_args_size
, prev_args_size
))
3102 /* ??? Search back to previous CFI note. */
3103 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
3104 add_cfi_args_size (ti
->beg_delay_args_size
);
3107 prev_args_size
= ti
->end_delay_args_size
;
3112 /* Set up the pseudo-cfg of instruction traces, as described at the
3113 block comment at the top of the file. */
3116 create_pseudo_cfg (void)
3118 bool saw_barrier
, switch_sections
;
3123 /* The first trace begins at the start of the function,
3124 and begins with the CIE row state. */
3125 trace_info
.create (16);
3126 memset (&ti
, 0, sizeof (ti
));
3127 ti
.head
= get_insns ();
3128 ti
.beg_row
= cie_cfi_row
;
3129 ti
.cfa_store
= cie_cfi_row
->cfa
;
3130 ti
.cfa_temp
.reg
.set_by_dwreg (INVALID_REGNUM
);
3131 trace_info
.quick_push (ti
);
3133 if (cie_return_save
)
3134 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
3136 /* Walk all the insns, collecting start of trace locations. */
3137 saw_barrier
= false;
3138 switch_sections
= false;
3139 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3141 if (BARRIER_P (insn
))
3143 else if (NOTE_P (insn
)
3144 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
3146 /* We should have just seen a barrier. */
3147 gcc_assert (saw_barrier
);
3148 switch_sections
= true;
3150 /* Watch out for save_point notes between basic blocks.
3151 In particular, a note after a barrier. Do not record these,
3152 delaying trace creation until the label. */
3153 else if (save_point_p (insn
)
3154 && (LABEL_P (insn
) || !saw_barrier
))
3156 memset (&ti
, 0, sizeof (ti
));
3158 ti
.switch_sections
= switch_sections
;
3159 ti
.id
= trace_info
.length ();
3160 trace_info
.safe_push (ti
);
3162 saw_barrier
= false;
3163 switch_sections
= false;
3167 /* Create the trace index after we've finished building trace_info,
3168 avoiding stale pointer problems due to reallocation. */
3170 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
3172 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
3174 dw_trace_info
**slot
;
3177 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
3178 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
3179 tp
->switch_sections
? " (section switch)" : "");
3181 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
3182 gcc_assert (*slot
== NULL
);
3187 /* Record the initial position of the return address. RTL is
3188 INCOMING_RETURN_ADDR_RTX. */
3191 initial_return_save (rtx rtl
)
3194 reg
.set_by_dwreg (INVALID_REGNUM
);
3195 poly_int64 offset
= 0;
3197 switch (GET_CODE (rtl
))
3200 /* RA is in a register. */
3201 reg
= dwf_cfa_reg (rtl
);
3205 /* RA is on the stack. */
3206 rtl
= XEXP (rtl
, 0);
3207 switch (GET_CODE (rtl
))
3210 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
3215 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
3216 offset
= rtx_to_poly_int64 (XEXP (rtl
, 1));
3220 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
3221 offset
= -rtx_to_poly_int64 (XEXP (rtl
, 1));
3231 /* The return address is at some offset from any value we can
3232 actually load. For instance, on the SPARC it is in %i7+8. Just
3233 ignore the offset for now; it doesn't matter for unwinding frames. */
3234 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
3235 initial_return_save (XEXP (rtl
, 0));
3242 if (reg
.reg
!= DWARF_FRAME_RETURN_COLUMN
)
3244 if (reg
.reg
!= INVALID_REGNUM
)
3245 record_reg_saved_in_reg (rtl
, pc_rtx
);
3246 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
3251 create_cie_data (void)
3253 dw_cfa_location loc
;
3254 dw_trace_info cie_trace
;
3256 dw_stack_pointer_regnum
= dwf_cfa_reg (stack_pointer_rtx
);
3258 memset (&cie_trace
, 0, sizeof (cie_trace
));
3259 cur_trace
= &cie_trace
;
3261 add_cfi_vec
= &cie_cfi_vec
;
3262 cie_cfi_row
= cur_row
= new_cfi_row ();
3264 /* On entry, the Canonical Frame Address is at SP. */
3265 memset (&loc
, 0, sizeof (loc
));
3266 loc
.reg
= dw_stack_pointer_regnum
;
3267 /* create_cie_data is called just once per TU, and when using .cfi_startproc
3268 is even done by the assembler rather than the compiler. If the target
3269 has different incoming frame sp offsets depending on what kind of
3270 function it is, use a single constant offset for the target and
3271 if needed, adjust before the first instruction in insn stream. */
3272 loc
.offset
= DEFAULT_INCOMING_FRAME_SP_OFFSET
;
3275 if (targetm
.debug_unwind_info () == UI_DWARF2
3276 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3278 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
3280 /* For a few targets, we have the return address incoming into a
3281 register, but choose a different return column. This will result
3282 in a DW_CFA_register for the return, and an entry in
3283 regs_saved_in_regs to match. If the target later stores that
3284 return address register to the stack, we want to be able to emit
3285 the DW_CFA_offset against the return column, not the intermediate
3286 save register. Save the contents of regs_saved_in_regs so that
3287 we can re-initialize it at the start of each function. */
3288 switch (cie_trace
.regs_saved_in_regs
.length ())
3293 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
3294 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
3295 cie_trace
.regs_saved_in_regs
.release ();
3307 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
3308 state at each location within the function. These notes will be
3309 emitted during pass_final. */
3312 execute_dwarf2_frame (void)
3314 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
3315 dw_frame_pointer_regnum
= dwf_cfa_reg (hard_frame_pointer_rtx
);
3317 /* The first time we're called, compute the incoming frame state. */
3318 if (cie_cfi_vec
== NULL
)
3321 dwarf2out_alloc_current_fde ();
3323 create_pseudo_cfg ();
3326 create_cfi_notes ();
3330 /* Free all the data we allocated. */
3335 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3336 ti
->regs_saved_in_regs
.release ();
3338 trace_info
.release ();
3346 /* Convert a DWARF call frame info. operation to its string name */
3349 dwarf_cfi_name (unsigned int cfi_opc
)
3351 const char *name
= get_DW_CFA_name (cfi_opc
);
3356 return "DW_CFA_<unknown>";
3359 /* This routine will generate the correct assembly data for a location
3360 description based on a cfi entry with a complex address. */
3363 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3365 dw_loc_descr_ref loc
;
3368 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3369 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3372 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3373 dw2_asm_output_data (1, r
, NULL
);
3374 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3377 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3379 /* Output the size of the block. */
3380 size
= size_of_locs (loc
);
3381 dw2_asm_output_data_uleb128 (size
, NULL
);
3383 /* Now output the operations themselves. */
3384 output_loc_sequence (loc
, for_eh
);
3387 /* Similar, but used for .cfi_escape. */
3390 output_cfa_loc_raw (dw_cfi_ref cfi
)
3392 dw_loc_descr_ref loc
;
3395 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3396 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3399 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3400 fprintf (asm_out_file
, "%#x,", r
);
3401 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3404 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3406 /* Output the size of the block. */
3407 size
= size_of_locs (loc
);
3408 dw2_asm_output_data_uleb128_raw (size
);
3409 fputc (',', asm_out_file
);
3411 /* Now output the operations themselves. */
3412 output_loc_sequence_raw (loc
);
3415 /* Output a Call Frame Information opcode and its operand(s). */
3418 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3423 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3424 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3425 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3426 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3427 ((unsigned HOST_WIDE_INT
)
3428 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3429 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3431 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3432 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3433 "DW_CFA_offset, column %#lx", r
);
3434 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3435 dw2_asm_output_data_uleb128 (off
, NULL
);
3437 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3439 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3440 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3441 "DW_CFA_restore, column %#lx", r
);
3445 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3446 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3448 switch (cfi
->dw_cfi_opc
)
3450 case DW_CFA_set_loc
:
3452 dw2_asm_output_encoded_addr_rtx (
3453 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3454 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3457 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3458 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3459 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3462 case DW_CFA_advance_loc1
:
3463 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3464 fde
->dw_fde_current_label
, NULL
);
3465 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3468 case DW_CFA_advance_loc2
:
3469 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3470 fde
->dw_fde_current_label
, NULL
);
3471 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3474 case DW_CFA_advance_loc4
:
3475 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3476 fde
->dw_fde_current_label
, NULL
);
3477 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3480 case DW_CFA_MIPS_advance_loc8
:
3481 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3482 fde
->dw_fde_current_label
, NULL
);
3483 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3486 case DW_CFA_offset_extended
:
3487 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3488 dw2_asm_output_data_uleb128 (r
, NULL
);
3489 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3490 dw2_asm_output_data_uleb128 (off
, NULL
);
3493 case DW_CFA_def_cfa
:
3494 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3495 dw2_asm_output_data_uleb128 (r
, NULL
);
3496 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3499 case DW_CFA_offset_extended_sf
:
3500 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3501 dw2_asm_output_data_uleb128 (r
, NULL
);
3502 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3503 dw2_asm_output_data_sleb128 (off
, NULL
);
3506 case DW_CFA_def_cfa_sf
:
3507 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3508 dw2_asm_output_data_uleb128 (r
, NULL
);
3509 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3510 dw2_asm_output_data_sleb128 (off
, NULL
);
3513 case DW_CFA_restore_extended
:
3514 case DW_CFA_undefined
:
3515 case DW_CFA_same_value
:
3516 case DW_CFA_def_cfa_register
:
3517 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3518 dw2_asm_output_data_uleb128 (r
, NULL
);
3521 case DW_CFA_register
:
3522 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3523 dw2_asm_output_data_uleb128 (r
, NULL
);
3524 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3525 dw2_asm_output_data_uleb128 (r
, NULL
);
3528 case DW_CFA_def_cfa_offset
:
3529 case DW_CFA_GNU_args_size
:
3530 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3533 case DW_CFA_def_cfa_offset_sf
:
3534 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3535 dw2_asm_output_data_sleb128 (off
, NULL
);
3538 case DW_CFA_GNU_window_save
:
3541 case DW_CFA_def_cfa_expression
:
3542 case DW_CFA_expression
:
3543 case DW_CFA_val_expression
:
3544 output_cfa_loc (cfi
, for_eh
);
3547 case DW_CFA_GNU_negative_offset_extended
:
3548 /* Obsoleted by DW_CFA_offset_extended_sf. */
3557 /* Similar, but do it via assembler directives instead. */
3560 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3562 unsigned long r
, r2
;
3564 switch (cfi
->dw_cfi_opc
)
3566 case DW_CFA_advance_loc
:
3567 case DW_CFA_advance_loc1
:
3568 case DW_CFA_advance_loc2
:
3569 case DW_CFA_advance_loc4
:
3570 case DW_CFA_MIPS_advance_loc8
:
3571 case DW_CFA_set_loc
:
3572 /* Should only be created in a code path not followed when emitting
3573 via directives. The assembler is going to take care of this for
3574 us. But this routines is also used for debugging dumps, so
3576 gcc_assert (f
!= asm_out_file
);
3577 fprintf (f
, "\t.cfi_advance_loc\n");
3581 case DW_CFA_offset_extended
:
3582 case DW_CFA_offset_extended_sf
:
3583 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3584 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3585 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3588 case DW_CFA_restore
:
3589 case DW_CFA_restore_extended
:
3590 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3591 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3594 case DW_CFA_undefined
:
3595 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3596 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3599 case DW_CFA_same_value
:
3600 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3601 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3604 case DW_CFA_def_cfa
:
3605 case DW_CFA_def_cfa_sf
:
3606 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3607 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3608 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3611 case DW_CFA_def_cfa_register
:
3612 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3613 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3616 case DW_CFA_register
:
3617 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3618 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3619 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3622 case DW_CFA_def_cfa_offset
:
3623 case DW_CFA_def_cfa_offset_sf
:
3624 fprintf (f
, "\t.cfi_def_cfa_offset "
3625 HOST_WIDE_INT_PRINT_DEC
"\n",
3626 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3629 case DW_CFA_remember_state
:
3630 fprintf (f
, "\t.cfi_remember_state\n");
3632 case DW_CFA_restore_state
:
3633 fprintf (f
, "\t.cfi_restore_state\n");
3636 case DW_CFA_GNU_args_size
:
3637 if (f
== asm_out_file
)
3639 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3640 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3642 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3643 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3648 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3649 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3653 case DW_CFA_GNU_window_save
:
3654 fprintf (f
, "\t.cfi_window_save\n");
3657 case DW_CFA_def_cfa_expression
:
3658 case DW_CFA_expression
:
3659 case DW_CFA_val_expression
:
3660 if (f
!= asm_out_file
)
3662 fprintf (f
, "\t.cfi_%scfa_%sexpression ...\n",
3663 cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
? "def_" : "",
3664 cfi
->dw_cfi_opc
== DW_CFA_val_expression
? "val_" : "");
3667 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3668 output_cfa_loc_raw (cfi
);
3678 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3680 if (dwarf2out_do_cfi_asm ())
3681 output_cfi_directive (asm_out_file
, cfi
);
3685 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3693 dw_cfa_location dummy
;
3694 memset (&dummy
, 0, sizeof (dummy
));
3695 dummy
.reg
.set_by_dwreg (INVALID_REGNUM
);
3696 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3698 output_cfi_directive (f
, cfi
);
3700 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3702 output_cfi_directive (f
, cfi
);
3705 void debug_cfi_row (dw_cfi_row
*row
);
3708 debug_cfi_row (dw_cfi_row
*row
)
3710 dump_cfi_row (stderr
, row
);
3714 /* Save the result of dwarf2out_do_frame across PCH.
3715 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3716 static GTY(()) signed char saved_do_cfi_asm
= 0;
3718 /* Decide whether to emit EH frame unwind information for the current
3719 translation unit. */
3722 dwarf2out_do_eh_frame (void)
3725 (flag_unwind_tables
|| flag_exceptions
)
3726 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
;
3729 /* Decide whether we want to emit frame unwind information for the current
3730 translation unit. */
3733 dwarf2out_do_frame (void)
3735 /* We want to emit correct CFA location expressions or lists, so we
3736 have to return true if we're going to generate debug info, even if
3737 we're not going to output frame or unwind info. */
3738 if (dwarf_debuginfo_p () || dwarf_based_debuginfo_p ())
3741 if (saved_do_cfi_asm
> 0)
3744 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3747 if (dwarf2out_do_eh_frame ())
3753 /* Decide whether to emit frame unwind via assembler directives. */
3756 dwarf2out_do_cfi_asm (void)
3760 if (saved_do_cfi_asm
!= 0)
3761 return saved_do_cfi_asm
> 0;
3763 /* Assume failure for a moment. */
3764 saved_do_cfi_asm
= -1;
3766 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3768 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3771 /* Make sure the personality encoding is one the assembler can support.
3772 In particular, aligned addresses can't be handled. */
3773 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3774 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3776 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3777 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3780 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3781 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3782 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
&& !dwarf2out_do_eh_frame ())
3786 saved_do_cfi_asm
= 1;
3792 const pass_data pass_data_dwarf2_frame
=
3794 RTL_PASS
, /* type */
3795 "dwarf2", /* name */
3796 OPTGROUP_NONE
, /* optinfo_flags */
3797 TV_FINAL
, /* tv_id */
3798 0, /* properties_required */
3799 0, /* properties_provided */
3800 0, /* properties_destroyed */
3801 0, /* todo_flags_start */
3802 0, /* todo_flags_finish */
3805 class pass_dwarf2_frame
: public rtl_opt_pass
3808 pass_dwarf2_frame (gcc::context
*ctxt
)
3809 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3812 /* opt_pass methods: */
3813 bool gate (function
*) final override
;
3814 unsigned int execute (function
*) final override
3816 return execute_dwarf2_frame ();
3819 }; // class pass_dwarf2_frame
3822 pass_dwarf2_frame::gate (function
*)
3824 /* Targets which still implement the prologue in assembler text
3825 cannot use the generic dwarf2 unwinding. */
3826 if (!targetm
.have_prologue ())
3829 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3830 from the optimized shrink-wrapping annotations that we will compute.
3831 For now, only produce the CFI notes for dwarf2. */
3832 return dwarf2out_do_frame ();
3838 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3840 return new pass_dwarf2_frame (ctxt
);
3843 #include "gt-dwarf2cfi.h"