1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "coretypes.h"
32 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
34 #include "insn-config.h"
38 #include "hard-reg-set.h"
42 #include "basic-block.h"
47 #include "tree-pass.h"
50 static int perhaps_ends_bb_p (rtx
);
51 static int optimize_reg_copy_1 (rtx
, rtx
, rtx
);
52 static void optimize_reg_copy_2 (rtx
, rtx
, rtx
);
53 static void optimize_reg_copy_3 (rtx
, rtx
, rtx
);
54 static void copy_src_to_dest (rtx
, rtx
, rtx
);
57 int with
[MAX_RECOG_OPERANDS
];
58 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
59 int commutative
[MAX_RECOG_OPERANDS
];
60 int early_clobber
[MAX_RECOG_OPERANDS
];
63 static rtx
discover_flags_reg (void);
64 static void mark_flags_life_zones (rtx
);
65 static void flags_set_1 (rtx
, rtx
, void *);
67 static int try_auto_increment (rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int);
68 static int find_matches (rtx
, struct match
*);
69 static void replace_in_call_usage (rtx
*, unsigned int, rtx
, rtx
);
70 static int fixup_match_1 (rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int);
71 static int stable_and_no_regs_but_for_p (rtx
, rtx
, rtx
);
72 static int regclass_compatible_p (int, int);
73 static int replacement_quality (rtx
);
74 static int fixup_match_2 (rtx
, rtx
, rtx
, rtx
);
76 /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without
77 causing too much register allocation problems. */
79 regclass_compatible_p (int class0
, int class1
)
81 return (class0
== class1
82 || (reg_class_subset_p (class0
, class1
)
83 && ! CLASS_LIKELY_SPILLED_P (class0
))
84 || (reg_class_subset_p (class1
, class0
)
85 && ! CLASS_LIKELY_SPILLED_P (class1
)));
88 /* INC_INSN is an instruction that adds INCREMENT to REG.
89 Try to fold INC_INSN as a post/pre in/decrement into INSN.
90 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
91 Return nonzero for success. */
93 try_auto_increment (rtx insn
, rtx inc_insn
, rtx inc_insn_set
, rtx reg
,
94 HOST_WIDE_INT increment
, int pre
)
96 enum rtx_code inc_code
;
98 rtx pset
= single_set (insn
);
101 /* Can't use the size of SET_SRC, we might have something like
102 (sign_extend:SI (mem:QI ... */
103 rtx use
= find_use_as_address (pset
, reg
, 0);
104 if (use
!= 0 && use
!= (rtx
) (size_t) 1)
106 int size
= GET_MODE_SIZE (GET_MODE (use
));
108 || (HAVE_POST_INCREMENT
109 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
110 || (HAVE_PRE_INCREMENT
111 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
112 || (HAVE_POST_DECREMENT
113 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
114 || (HAVE_PRE_DECREMENT
115 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
121 &SET_SRC (inc_insn_set
),
122 XEXP (SET_SRC (inc_insn_set
), 0), 1);
123 validate_change (insn
, &XEXP (use
, 0),
124 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
125 if (apply_change_group ())
127 /* If there is a REG_DEAD note on this insn, we must
128 change this not to REG_UNUSED meaning that the register
129 is set, but the value is dead. Failure to do so will
130 result in a sched1 dieing -- when it recomputes lifetime
131 information, the number of REG_DEAD notes will have
133 rtx note
= find_reg_note (insn
, REG_DEAD
, reg
);
135 PUT_MODE (note
, REG_UNUSED
);
138 = gen_rtx_EXPR_LIST (REG_INC
,
139 reg
, REG_NOTES (insn
));
141 delete_insn (inc_insn
);
150 /* Determine if the pattern generated by add_optab has a clobber,
151 such as might be issued for a flags hard register. To make the
152 code elsewhere simpler, we handle cc0 in this same framework.
154 Return the register if one was discovered. Return NULL_RTX if
155 if no flags were found. Return pc_rtx if we got confused. */
158 discover_flags_reg (void)
161 tmp
= gen_rtx_REG (word_mode
, 10000);
162 tmp
= gen_add3_insn (tmp
, tmp
, const2_rtx
);
164 /* If we get something that isn't a simple set, or a
165 [(set ..) (clobber ..)], this whole function will go wrong. */
166 if (GET_CODE (tmp
) == SET
)
168 else if (GET_CODE (tmp
) == PARALLEL
)
172 if (XVECLEN (tmp
, 0) != 2)
174 tmp
= XVECEXP (tmp
, 0, 1);
175 if (GET_CODE (tmp
) != CLOBBER
)
179 /* Don't do anything foolish if the md wanted to clobber a
180 scratch or something. We only care about hard regs.
181 Moreover we don't like the notion of subregs of hard regs. */
182 if (GET_CODE (tmp
) == SUBREG
183 && REG_P (SUBREG_REG (tmp
))
184 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
186 found
= (REG_P (tmp
) && REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
188 return (found
? tmp
: NULL_RTX
);
194 /* It is a tedious task identifying when the flags register is live and
195 when it is safe to optimize. Since we process the instruction stream
196 multiple times, locate and record these live zones by marking the
197 mode of the instructions --
199 QImode is used on the instruction at which the flags becomes live.
201 HImode is used within the range (exclusive) that the flags are
202 live. Thus the user of the flags is not marked.
204 All other instructions are cleared to VOIDmode. */
206 /* Used to communicate with flags_set_1. */
207 static rtx flags_set_1_rtx
;
208 static int flags_set_1_set
;
211 mark_flags_life_zones (rtx flags
)
218 /* If we found a flags register on a cc0 host, bail. */
219 if (flags
== NULL_RTX
)
221 else if (flags
!= cc0_rtx
)
225 /* Simple cases first: if no flags, clear all modes. If confusing,
226 mark the entire function as being in a flags shadow. */
227 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
229 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
231 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
232 PUT_MODE (insn
, mode
);
240 flags_regno
= REGNO (flags
);
241 flags_nregs
= hard_regno_nregs
[flags_regno
][GET_MODE (flags
)];
243 flags_set_1_rtx
= flags
;
245 /* Process each basic block. */
246 FOR_EACH_BB_REVERSE (block
)
251 insn
= BB_HEAD (block
);
252 end
= BB_END (block
);
254 /* Look out for the (unlikely) case of flags being live across
255 basic block boundaries. */
260 for (i
= 0; i
< flags_nregs
; ++i
)
261 live
|= REGNO_REG_SET_P (block
->il
.rtl
->global_live_at_start
,
268 /* Process liveness in reverse order of importance --
269 alive, death, birth. This lets more important info
270 overwrite the mode of lesser info. */
275 /* In the cc0 case, death is not marked in reg notes,
276 but is instead the mere use of cc0 when it is alive. */
277 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
280 /* In the hard reg case, we watch death notes. */
281 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
284 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
286 /* In either case, birth is denoted simply by its presence
287 as the destination of a set. */
289 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
293 PUT_MODE (insn
, QImode
);
297 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
301 insn
= NEXT_INSN (insn
);
306 /* A subroutine of mark_flags_life_zones, called through note_stores. */
309 flags_set_1 (rtx x
, rtx pat
, void *data ATTRIBUTE_UNUSED
)
311 if (GET_CODE (pat
) == SET
312 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
316 static int *regno_src_regno
;
318 /* Indicate how good a choice REG (which appears as a source) is to replace
319 a destination register with. The higher the returned value, the better
320 the choice. The main objective is to avoid using a register that is
321 a candidate for tying to a hard register, since the output might in
322 turn be a candidate to be tied to a different hard register. */
324 replacement_quality (rtx reg
)
328 /* Bad if this isn't a register at all. */
332 /* If this register is not meant to get a hard register,
333 it is a poor choice. */
334 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
337 src_regno
= regno_src_regno
[REGNO (reg
)];
339 /* If it was not copied from another register, it is fine. */
343 /* Copied from a hard register? */
344 if (src_regno
< FIRST_PSEUDO_REGISTER
)
347 /* Copied from a pseudo register - not as bad as from a hard register,
348 yet still cumbersome, since the register live length will be lengthened
349 when the registers get tied. */
353 /* Return 1 if INSN might end a basic block. */
355 static int perhaps_ends_bb_p (rtx insn
)
357 switch (GET_CODE (insn
))
361 /* These always end a basic block. */
365 /* A CALL_INSN might be the last insn of a basic block, if it is inside
366 an EH region or if there are nonlocal gotos. Note that this test is
367 very conservative. */
368 if (nonlocal_goto_handler_labels
)
372 return can_throw_internal (insn
);
376 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
379 Search forward to see if SRC dies before either it or DEST is modified,
380 but don't scan past the end of a basic block. If so, we can replace SRC
381 with DEST and let SRC die in INSN.
383 This will reduce the number of registers live in that range and may enable
384 DEST to be tied to SRC, thus often saving one register in addition to a
385 register-register copy. */
388 optimize_reg_copy_1 (rtx insn
, rtx dest
, rtx src
)
393 int sregno
= REGNO (src
);
394 int dregno
= REGNO (dest
);
396 /* We don't want to mess with hard regs if register classes are small. */
398 || (SMALL_REGISTER_CLASSES
399 && (sregno
< FIRST_PSEUDO_REGISTER
400 || dregno
< FIRST_PSEUDO_REGISTER
))
401 /* We don't see all updates to SP if they are in an auto-inc memory
402 reference, so we must disallow this optimization on them. */
403 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
406 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
408 /* ??? We can't scan past the end of a basic block without updating
409 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
410 if (perhaps_ends_bb_p (p
))
412 else if (! INSN_P (p
))
415 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
416 /* If SRC is an asm-declared register, it must not be replaced
417 in any asm. Unfortunately, the REG_EXPR tree for the asm
418 variable may be absent in the SRC rtx, so we can't check the
419 actual register declaration easily (the asm operand will have
420 it, though). To avoid complicating the test for a rare case,
421 we just don't perform register replacement for a hard reg
422 mentioned in an asm. */
423 || (sregno
< FIRST_PSEUDO_REGISTER
424 && asm_noperands (PATTERN (p
)) >= 0
425 && reg_overlap_mentioned_p (src
, PATTERN (p
)))
426 /* Don't change hard registers used by a call. */
427 || (CALL_P (p
) && sregno
< FIRST_PSEUDO_REGISTER
428 && find_reg_fusage (p
, USE
, src
))
429 /* Don't change a USE of a register. */
430 || (GET_CODE (PATTERN (p
)) == USE
431 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
434 /* See if all of SRC dies in P. This test is slightly more
435 conservative than it needs to be. */
436 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
437 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
445 /* We can do the optimization. Scan forward from INSN again,
446 replacing regs as we go. Set FAILED if a replacement can't
447 be done. In that case, we can't move the death note for SRC.
448 This should be rare. */
450 /* Set to stop at next insn. */
451 for (q
= next_real_insn (insn
);
452 q
!= next_real_insn (p
);
453 q
= next_real_insn (q
))
455 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
457 /* If SRC is a hard register, we might miss some
458 overlapping registers with validate_replace_rtx,
459 so we would have to undo it. We can't if DEST is
460 present in the insn, so fail in that combination
462 if (sregno
< FIRST_PSEUDO_REGISTER
463 && reg_mentioned_p (dest
, PATTERN (q
)))
466 /* Attempt to replace all uses. */
467 else if (!validate_replace_rtx (src
, dest
, q
))
470 /* If this succeeded, but some part of the register
471 is still present, undo the replacement. */
472 else if (sregno
< FIRST_PSEUDO_REGISTER
473 && reg_overlap_mentioned_p (src
, PATTERN (q
)))
475 validate_replace_rtx (dest
, src
, q
);
480 /* For SREGNO, count the total number of insns scanned.
481 For DREGNO, count the total number of insns scanned after
482 passing the death note for DREGNO. */
487 /* If the insn in which SRC dies is a CALL_INSN, don't count it
488 as a call that has been crossed. Otherwise, count it. */
489 if (q
!= p
&& CALL_P (q
))
491 /* Similarly, total calls for SREGNO, total calls beyond
492 the death note for DREGNO. */
498 /* If DEST dies here, remove the death note and save it for
499 later. Make sure ALL of DEST dies here; again, this is
500 overly conservative. */
502 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
504 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
505 failed
= 1, dest_death
= 0;
507 remove_note (q
, dest_death
);
513 /* These counters need to be updated if and only if we are
514 going to move the REG_DEAD note. */
515 if (sregno
>= FIRST_PSEUDO_REGISTER
)
517 if (REG_LIVE_LENGTH (sregno
) >= 0)
519 REG_LIVE_LENGTH (sregno
) -= s_length
;
520 /* REG_LIVE_LENGTH is only an approximation after
521 combine if sched is not run, so make sure that we
522 still have a reasonable value. */
523 if (REG_LIVE_LENGTH (sregno
) < 2)
524 REG_LIVE_LENGTH (sregno
) = 2;
527 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
530 /* Move death note of SRC from P to INSN. */
531 remove_note (p
, note
);
532 XEXP (note
, 1) = REG_NOTES (insn
);
533 REG_NOTES (insn
) = note
;
536 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
538 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
540 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
541 remove_note (insn
, dest_death
);
544 /* Put death note of DEST on P if we saw it die. */
547 XEXP (dest_death
, 1) = REG_NOTES (p
);
548 REG_NOTES (p
) = dest_death
;
550 if (dregno
>= FIRST_PSEUDO_REGISTER
)
552 /* If and only if we are moving the death note for DREGNO,
553 then we need to update its counters. */
554 if (REG_LIVE_LENGTH (dregno
) >= 0)
555 REG_LIVE_LENGTH (dregno
) += d_length
;
556 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
563 /* If SRC is a hard register which is set or killed in some other
564 way, we can't do this optimization. */
565 else if (sregno
< FIRST_PSEUDO_REGISTER
566 && dead_or_set_p (p
, src
))
572 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
573 a sequence of insns that modify DEST followed by an insn that sets
574 SRC to DEST in which DEST dies, with no prior modification of DEST.
575 (There is no need to check if the insns in between actually modify
576 DEST. We should not have cases where DEST is not modified, but
577 the optimization is safe if no such modification is detected.)
578 In that case, we can replace all uses of DEST, starting with INSN and
579 ending with the set of SRC to DEST, with SRC. We do not do this
580 optimization if a CALL_INSN is crossed unless SRC already crosses a
581 call or if DEST dies before the copy back to SRC.
583 It is assumed that DEST and SRC are pseudos; it is too complicated to do
584 this for hard registers since the substitutions we may make might fail. */
587 optimize_reg_copy_2 (rtx insn
, rtx dest
, rtx src
)
591 int sregno
= REGNO (src
);
592 int dregno
= REGNO (dest
);
594 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
596 /* ??? We can't scan past the end of a basic block without updating
597 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
598 if (perhaps_ends_bb_p (p
))
600 else if (! INSN_P (p
))
603 set
= single_set (p
);
604 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
605 && find_reg_note (p
, REG_DEAD
, dest
))
607 /* We can do the optimization. Scan forward from INSN again,
608 replacing regs as we go. */
610 /* Set to stop at next insn. */
611 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
614 if (reg_mentioned_p (dest
, PATTERN (q
)))
615 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
619 REG_N_CALLS_CROSSED (dregno
)--;
620 REG_N_CALLS_CROSSED (sregno
)++;
624 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
625 REG_N_DEATHS (dregno
)--;
626 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
627 REG_N_DEATHS (sregno
)--;
631 if (reg_set_p (src
, p
)
632 || find_reg_note (p
, REG_DEAD
, dest
)
633 || (CALL_P (p
) && REG_N_CALLS_CROSSED (sregno
) == 0))
638 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
639 Look if SRC dies there, and if it is only set once, by loading
640 it from memory. If so, try to incorporate the zero/sign extension
641 into the memory read, change SRC to the mode of DEST, and alter
642 the remaining accesses to use the appropriate SUBREG. This allows
643 SRC and DEST to be tied later. */
645 optimize_reg_copy_3 (rtx insn
, rtx dest
, rtx src
)
647 rtx src_reg
= XEXP (src
, 0);
648 int src_no
= REGNO (src_reg
);
649 int dst_no
= REGNO (dest
);
651 enum machine_mode old_mode
;
653 if (src_no
< FIRST_PSEUDO_REGISTER
654 || dst_no
< FIRST_PSEUDO_REGISTER
655 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
656 || REG_N_DEATHS (src_no
) != 1
657 || REG_N_SETS (src_no
) != 1)
659 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
660 /* ??? We can't scan past the end of a basic block without updating
661 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
662 if (perhaps_ends_bb_p (p
))
668 if (! (set
= single_set (p
))
669 || !MEM_P (SET_SRC (set
))
670 /* If there's a REG_EQUIV note, this must be an insn that loads an
671 argument. Prefer keeping the note over doing this optimization. */
672 || find_reg_note (p
, REG_EQUIV
, NULL_RTX
)
673 || SET_DEST (set
) != src_reg
)
676 /* Be conservative: although this optimization is also valid for
677 volatile memory references, that could cause trouble in later passes. */
678 if (MEM_VOLATILE_P (SET_SRC (set
)))
681 /* Do not use a SUBREG to truncate from one mode to another if truncation
683 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
684 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
685 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
688 old_mode
= GET_MODE (src_reg
);
689 PUT_MODE (src_reg
, GET_MODE (src
));
690 XEXP (src
, 0) = SET_SRC (set
);
692 /* Include this change in the group so that it's easily undone if
693 one of the changes in the group is invalid. */
694 validate_change (p
, &SET_SRC (set
), src
, 1);
696 /* Now walk forward making additional replacements. We want to be able
697 to undo all the changes if a later substitution fails. */
698 while (p
= NEXT_INSN (p
), p
!= insn
)
703 /* Make a tentative change. */
704 validate_replace_rtx_group (src_reg
,
705 gen_lowpart_SUBREG (old_mode
, src_reg
),
709 validate_replace_rtx_group (src
, src_reg
, insn
);
711 /* Now see if all the changes are valid. */
712 if (! apply_change_group ())
714 /* One or more changes were no good. Back out everything. */
715 PUT_MODE (src_reg
, old_mode
);
716 XEXP (src
, 0) = src_reg
;
720 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
722 remove_note (p
, note
);
727 /* If we were not able to update the users of src to use dest directly, try
728 instead moving the value to dest directly before the operation. */
731 copy_src_to_dest (rtx insn
, rtx src
, rtx dest
)
745 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
746 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
747 parameter when there is no frame pointer that is not allocated a register.
748 For now, we just reject them, rather than incrementing the live length. */
751 && REG_LIVE_LENGTH (REGNO (src
)) > 0
753 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
754 && (set
= single_set (insn
)) != NULL_RTX
755 && !reg_mentioned_p (dest
, SET_SRC (set
))
756 && GET_MODE (src
) == GET_MODE (dest
))
758 int old_num_regs
= reg_rtx_no
;
760 /* Generate the src->dest move. */
762 emit_move_insn (dest
, src
);
765 /* If this sequence uses new registers, we may not use it. */
766 if (old_num_regs
!= reg_rtx_no
767 || ! validate_replace_rtx (src
, dest
, insn
))
769 /* We have to restore reg_rtx_no to its old value, lest
770 recompute_reg_usage will try to compute the usage of the
771 new regs, yet reg_n_info is not valid for them. */
772 reg_rtx_no
= old_num_regs
;
775 emit_insn_before (seq
, insn
);
776 move_insn
= PREV_INSN (insn
);
777 p_move_notes
= ®_NOTES (move_insn
);
778 p_insn_notes
= ®_NOTES (insn
);
780 /* Move any notes mentioning src to the move instruction. */
781 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
783 next
= XEXP (link
, 1);
784 if (XEXP (link
, 0) == src
)
786 *p_move_notes
= link
;
787 p_move_notes
= &XEXP (link
, 1);
791 *p_insn_notes
= link
;
792 p_insn_notes
= &XEXP (link
, 1);
796 *p_move_notes
= NULL_RTX
;
797 *p_insn_notes
= NULL_RTX
;
799 insn_uid
= INSN_UID (insn
);
800 move_uid
= INSN_UID (move_insn
);
802 /* Update the various register tables. */
803 dest_regno
= REGNO (dest
);
804 REG_N_SETS (dest_regno
) ++;
805 REG_LIVE_LENGTH (dest_regno
)++;
806 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
807 REGNO_FIRST_UID (dest_regno
) = move_uid
;
809 src_regno
= REGNO (src
);
810 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
811 REG_LIVE_LENGTH (src_regno
)++;
813 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
814 REGNO_FIRST_UID (src_regno
) = move_uid
;
816 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
817 REGNO_LAST_UID (src_regno
) = move_uid
;
821 /* reg_set_in_bb[REGNO] points to basic block iff the register is set
822 only once in the given block and has REG_EQUAL note. */
824 basic_block
*reg_set_in_bb
;
826 /* Size of reg_set_in_bb array. */
827 static unsigned int max_reg_computed
;
830 /* Return whether REG is set in only one location, and is set to a
831 constant, but is set in a different basic block from INSN (an
832 instructions which uses REG). In this case REG is equivalent to a
833 constant, and we don't want to break that equivalence, because that
834 may increase register pressure and make reload harder. If REG is
835 set in the same basic block as INSN, we don't worry about it,
836 because we'll probably need a register anyhow (??? but what if REG
837 is used in a different basic block as well as this one?). */
840 reg_is_remote_constant_p (rtx reg
, rtx insn
)
848 max_reg_computed
= max
= max_reg_num ();
849 reg_set_in_bb
= xcalloc (max
, sizeof (*reg_set_in_bb
));
859 /* This is the instruction which sets REG. If there is a
860 REG_EQUAL note, then REG is equivalent to a constant. */
862 && REG_P (SET_DEST (s
))
863 && REG_N_SETS (REGNO (SET_DEST (s
))) == 1
864 && find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
865 reg_set_in_bb
[REGNO (SET_DEST (s
))] = bb
;
869 gcc_assert (REGNO (reg
) < max_reg_computed
);
870 if (reg_set_in_bb
[REGNO (reg
)] == NULL
)
872 return (reg_set_in_bb
[REGNO (reg
)] != BLOCK_FOR_INSN (insn
));
875 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
876 another add immediate instruction with the same source and dest registers,
877 and if we find one, we change INSN to an increment, and return 1. If
878 no changes are made, we return 0.
881 (set (reg100) (plus reg1 offset1))
883 (set (reg100) (plus reg1 offset2))
885 (set (reg100) (plus reg1 offset1))
887 (set (reg100) (plus reg100 offset2-offset1)) */
889 /* ??? What does this comment mean? */
890 /* cse disrupts preincrement / postdecrement sequences when it finds a
891 hard register as ultimate source, like the frame pointer. */
894 fixup_match_2 (rtx insn
, rtx dst
, rtx src
, rtx offset
)
896 rtx p
, dst_death
= 0;
897 int length
, num_calls
= 0;
899 /* If SRC dies in INSN, we'd have to move the death note. This is
900 considered to be very unlikely, so we just skip the optimization
902 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
905 /* Scan backward to find the first instruction that sets DST. */
907 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
911 /* ??? We can't scan past the end of a basic block without updating
912 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
913 if (perhaps_ends_bb_p (p
))
915 else if (! INSN_P (p
))
918 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
923 pset
= single_set (p
);
924 if (pset
&& SET_DEST (pset
) == dst
925 && GET_CODE (SET_SRC (pset
)) == PLUS
926 && XEXP (SET_SRC (pset
), 0) == src
927 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
929 HOST_WIDE_INT newconst
930 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
931 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
933 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
935 /* Remove the death note for DST from DST_DEATH. */
938 remove_death (REGNO (dst
), dst_death
);
939 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
940 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
945 "Fixed operand of insn %d.\n",
949 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
956 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
958 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
963 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
970 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
972 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
981 if (reg_set_p (dst
, PATTERN (p
)))
984 /* If we have passed a call instruction, and the
985 pseudo-reg SRC is not already live across a call,
986 then don't perform the optimization. */
987 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
988 hard regs are clobbered. Thus, we only use it for src for
995 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
998 if (call_used_regs
[REGNO (dst
)]
999 || find_reg_fusage (p
, CLOBBER
, dst
))
1002 else if (reg_set_p (src
, PATTERN (p
)))
1009 /* Main entry for the register move optimization.
1010 F is the first instruction.
1011 NREGS is one plus the highest pseudo-reg number used in the instruction.
1012 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1013 (or 0 if none should be output). */
1016 regmove_optimize (rtx f
, int nregs
)
1022 rtx copy_src
, copy_dst
;
1024 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1025 confused by non-call exceptions ending blocks. */
1026 if (flag_non_call_exceptions
)
1029 /* Find out where a potential flags register is live, and so that we
1030 can suppress some optimizations in those zones. */
1031 mark_flags_life_zones (discover_flags_reg ());
1033 regno_src_regno
= XNEWVEC (int, nregs
);
1034 for (i
= nregs
; --i
>= 0; )
1035 regno_src_regno
[i
] = -1;
1037 /* A forward/backward pass. Replace output operands with input operands. */
1039 for (pass
= 0; pass
<= 2; pass
++)
1041 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1045 fprintf (dump_file
, "Starting %s pass...\n",
1046 pass
? "backward" : "forward");
1048 for (insn
= pass
? get_last_insn () : f
; insn
;
1049 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1052 int op_no
, match_no
;
1054 set
= single_set (insn
);
1058 if (flag_expensive_optimizations
&& ! pass
1059 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1060 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1061 && REG_P (XEXP (SET_SRC (set
), 0))
1062 && REG_P (SET_DEST (set
)))
1063 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1065 if (flag_expensive_optimizations
&& ! pass
1066 && REG_P (SET_SRC (set
))
1067 && REG_P (SET_DEST (set
)))
1069 /* If this is a register-register copy where SRC is not dead,
1070 see if we can optimize it. If this optimization succeeds,
1071 it will become a copy where SRC is dead. */
1072 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1073 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1074 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1076 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1077 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1078 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1079 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1080 && SET_SRC (set
) != SET_DEST (set
))
1082 int srcregno
= REGNO (SET_SRC (set
));
1083 if (regno_src_regno
[srcregno
] >= 0)
1084 srcregno
= regno_src_regno
[srcregno
];
1085 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1092 if (! find_matches (insn
, &match
))
1095 /* Now scan through the operands looking for a source operand
1096 which is supposed to match the destination operand.
1097 Then scan forward for an instruction which uses the dest
1099 If it dies there, then replace the dest in both operands with
1100 the source operand. */
1102 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1104 rtx src
, dst
, src_subreg
;
1105 enum reg_class src_class
, dst_class
;
1107 match_no
= match
.with
[op_no
];
1109 /* Nothing to do if the two operands aren't supposed to match. */
1113 src
= recog_data
.operand
[op_no
];
1114 dst
= recog_data
.operand
[match_no
];
1120 if (GET_CODE (dst
) == SUBREG
1121 && GET_MODE_SIZE (GET_MODE (dst
))
1122 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1124 dst
= SUBREG_REG (dst
);
1125 src_subreg
= lowpart_subreg (GET_MODE (dst
),
1126 src
, GET_MODE (src
));
1131 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1134 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1136 if (match
.commutative
[op_no
] < op_no
)
1137 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1141 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1144 /* op_no/src must be a read-only operand, and
1145 match_operand/dst must be a write-only operand. */
1146 if (match
.use
[op_no
] != READ
1147 || match
.use
[match_no
] != WRITE
)
1150 if (match
.early_clobber
[match_no
]
1151 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1154 /* Make sure match_operand is the destination. */
1155 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1158 /* If the operands already match, then there is nothing to do. */
1159 if (operands_match_p (src
, dst
))
1162 /* But in the commutative case, we might find a better match. */
1163 if (match
.commutative
[op_no
] >= 0)
1165 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1166 if (operands_match_p (comm
, dst
)
1167 && (replacement_quality (comm
)
1168 >= replacement_quality (src
)))
1172 src_class
= reg_preferred_class (REGNO (src
));
1173 dst_class
= reg_preferred_class (REGNO (dst
));
1174 if (! regclass_compatible_p (src_class
, dst_class
))
1177 if (GET_MODE (src
) != GET_MODE (dst
))
1180 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1187 /* A backward pass. Replace input operands with output operands. */
1190 fprintf (dump_file
, "Starting backward pass...\n");
1192 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1196 int op_no
, match_no
;
1199 if (! find_matches (insn
, &match
))
1202 /* Now scan through the operands looking for a destination operand
1203 which is supposed to match a source operand.
1204 Then scan backward for an instruction which sets the source
1205 operand. If safe, then replace the source operand with the
1206 dest operand in both instructions. */
1208 copy_src
= NULL_RTX
;
1209 copy_dst
= NULL_RTX
;
1210 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1212 rtx set
, p
, src
, dst
;
1213 rtx src_note
, dst_note
;
1215 enum reg_class src_class
, dst_class
;
1218 match_no
= match
.with
[op_no
];
1220 /* Nothing to do if the two operands aren't supposed to match. */
1224 dst
= recog_data
.operand
[match_no
];
1225 src
= recog_data
.operand
[op_no
];
1231 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1232 || REG_LIVE_LENGTH (REGNO (dst
)) < 0
1233 || GET_MODE (src
) != GET_MODE (dst
))
1236 /* If the operands already match, then there is nothing to do. */
1237 if (operands_match_p (src
, dst
))
1240 if (match
.commutative
[op_no
] >= 0)
1242 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1243 if (operands_match_p (comm
, dst
))
1247 set
= single_set (insn
);
1251 /* Note that single_set ignores parts of a parallel set for
1252 which one of the destinations is REG_UNUSED. We can't
1253 handle that here, since we can wind up rewriting things
1254 such that a single register is set twice within a single
1256 if (reg_set_p (src
, insn
))
1259 /* match_no/dst must be a write-only operand, and
1260 operand_operand/src must be a read-only operand. */
1261 if (match
.use
[op_no
] != READ
1262 || match
.use
[match_no
] != WRITE
)
1265 if (match
.early_clobber
[match_no
]
1266 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1269 /* Make sure match_no is the destination. */
1270 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1273 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1275 if (GET_CODE (SET_SRC (set
)) == PLUS
1276 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1277 && XEXP (SET_SRC (set
), 0) == src
1278 && fixup_match_2 (insn
, dst
, src
,
1279 XEXP (SET_SRC (set
), 1)))
1283 src_class
= reg_preferred_class (REGNO (src
));
1284 dst_class
= reg_preferred_class (REGNO (dst
));
1286 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1288 /* We used to force the copy here like in other cases, but
1289 it produces worse code, as it eliminates no copy
1290 instructions and the copy emitted will be produced by
1291 reload anyway. On patterns with multiple alternatives,
1292 there may be better solution available.
1294 In particular this change produced slower code for numeric
1300 if (! regclass_compatible_p (src_class
, dst_class
))
1310 /* Can not modify an earlier insn to set dst if this insn
1311 uses an old value in the source. */
1312 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1322 /* If src is set once in a different basic block,
1323 and is set equal to a constant, then do not use
1324 it for this optimization, as this would make it
1325 no longer equivalent to a constant. */
1327 if (reg_is_remote_constant_p (src
, insn
))
1340 "Could fix operand %d of insn %d matching operand %d.\n",
1341 op_no
, INSN_UID (insn
), match_no
);
1343 /* Scan backward to find the first instruction that uses
1344 the input operand. If the operand is set here, then
1345 replace it in both instructions with match_no. */
1347 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1351 /* ??? We can't scan past the end of a basic block without
1352 updating the register lifetime info
1353 (REG_DEAD/basic_block_live_at_start). */
1354 if (perhaps_ends_bb_p (p
))
1356 else if (! INSN_P (p
))
1361 /* ??? See if all of SRC is set in P. This test is much
1362 more conservative than it needs to be. */
1363 pset
= single_set (p
);
1364 if (pset
&& SET_DEST (pset
) == src
)
1366 /* We use validate_replace_rtx, in case there
1367 are multiple identical source operands. All of
1368 them have to be changed at the same time. */
1369 if (validate_replace_rtx (src
, dst
, insn
))
1371 if (validate_change (p
, &SET_DEST (pset
),
1376 /* Change all source operands back.
1377 This modifies the dst as a side-effect. */
1378 validate_replace_rtx (dst
, src
, insn
);
1379 /* Now make sure the dst is right. */
1380 validate_change (insn
,
1381 recog_data
.operand_loc
[match_no
],
1388 /* We can't make this change if SRC is read or
1389 partially written in P, since we are going to
1390 eliminate SRC. We can't make this change
1391 if DST is mentioned at all in P,
1392 since we are going to change its value. */
1393 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1394 || reg_mentioned_p (dst
, PATTERN (p
)))
1397 /* If we have passed a call instruction, and the
1398 pseudo-reg DST is not already live across a call,
1399 then don't perform the optimization. */
1404 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1413 /* Remove the death note for SRC from INSN. */
1414 remove_note (insn
, src_note
);
1415 /* Move the death note for SRC to P if it is used
1417 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1419 XEXP (src_note
, 1) = REG_NOTES (p
);
1420 REG_NOTES (p
) = src_note
;
1422 /* If there is a REG_DEAD note for DST on P, then remove
1423 it, because DST is now set there. */
1424 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1425 remove_note (p
, dst_note
);
1427 dstno
= REGNO (dst
);
1428 srcno
= REGNO (src
);
1430 REG_N_SETS (dstno
)++;
1431 REG_N_SETS (srcno
)--;
1433 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1434 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1436 REG_LIVE_LENGTH (dstno
) += length
;
1437 if (REG_LIVE_LENGTH (srcno
) >= 0)
1439 REG_LIVE_LENGTH (srcno
) -= length
;
1440 /* REG_LIVE_LENGTH is only an approximation after
1441 combine if sched is not run, so make sure that we
1442 still have a reasonable value. */
1443 if (REG_LIVE_LENGTH (srcno
) < 2)
1444 REG_LIVE_LENGTH (srcno
) = 2;
1449 "Fixed operand %d of insn %d matching operand %d.\n",
1450 op_no
, INSN_UID (insn
), match_no
);
1456 /* If we weren't able to replace any of the alternatives, try an
1457 alternative approach of copying the source to the destination. */
1458 if (!success
&& copy_src
!= NULL_RTX
)
1459 copy_src_to_dest (insn
, copy_src
, copy_dst
);
1466 free (regno_src_regno
);
1469 free (reg_set_in_bb
);
1470 reg_set_in_bb
= NULL
;
1474 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1475 Returns 0 if INSN can't be recognized, or if the alternative can't be
1478 Initialize the info in MATCHP based on the constraints. */
1481 find_matches (rtx insn
, struct match
*matchp
)
1483 int likely_spilled
[MAX_RECOG_OPERANDS
];
1485 int any_matches
= 0;
1487 extract_insn (insn
);
1488 if (! constrain_operands (0))
1491 /* Must initialize this before main loop, because the code for
1492 the commutative case may set matches for operands other than
1494 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1495 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1497 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1503 p
= recog_data
.constraints
[op_no
];
1505 likely_spilled
[op_no
] = 0;
1506 matchp
->use
[op_no
] = READ
;
1507 matchp
->early_clobber
[op_no
] = 0;
1509 matchp
->use
[op_no
] = WRITE
;
1511 matchp
->use
[op_no
] = READWRITE
;
1513 for (;*p
&& i
< which_alternative
; p
++)
1517 while ((c
= *p
) != '\0' && c
!= ',')
1526 matchp
->early_clobber
[op_no
] = 1;
1529 matchp
->commutative
[op_no
] = op_no
+ 1;
1530 matchp
->commutative
[op_no
+ 1] = op_no
;
1533 case '0': case '1': case '2': case '3': case '4':
1534 case '5': case '6': case '7': case '8': case '9':
1537 unsigned long match_ul
= strtoul (p
, &end
, 10);
1538 int match
= match_ul
;
1542 if (match
< op_no
&& likely_spilled
[match
])
1544 matchp
->with
[op_no
] = match
;
1546 if (matchp
->commutative
[op_no
] >= 0)
1547 matchp
->with
[matchp
->commutative
[op_no
]] = match
;
1551 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1552 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1553 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1554 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1555 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_CONSTRAINT ((unsigned char) c
, p
) ))
1556 likely_spilled
[op_no
] = 1;
1559 p
+= CONSTRAINT_LEN (c
, p
);
1565 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1566 assumed to be in INSN. */
1569 replace_in_call_usage (rtx
*loc
, unsigned int dst_reg
, rtx src
, rtx insn
)
1579 code
= GET_CODE (x
);
1582 if (REGNO (x
) != dst_reg
)
1585 validate_change (insn
, loc
, src
, 1);
1590 /* Process each of our operands recursively. */
1591 fmt
= GET_RTX_FORMAT (code
);
1592 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++, fmt
++)
1594 replace_in_call_usage (&XEXP (x
, i
), dst_reg
, src
, insn
);
1595 else if (*fmt
== 'E')
1596 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1597 replace_in_call_usage (& XVECEXP (x
, i
, j
), dst_reg
, src
, insn
);
1600 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1601 the only set in INSN. INSN has just been recognized and constrained.
1602 SRC is operand number OPERAND_NUMBER in INSN.
1603 DST is operand number MATCH_NUMBER in INSN.
1604 If BACKWARD is nonzero, we have been called in a backward pass.
1605 Return nonzero for success. */
1608 fixup_match_1 (rtx insn
, rtx set
, rtx src
, rtx src_subreg
, rtx dst
,
1609 int backward
, int operand_number
, int match_number
)
1612 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1614 int num_calls
= 0, s_num_calls
= 0;
1615 enum rtx_code code
= NOTE
;
1616 HOST_WIDE_INT insn_const
= 0, newconst
= 0;
1617 rtx overlap
= 0; /* need to move insn ? */
1618 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1619 int length
, s_length
;
1623 /* Look for (set (regX) (op regA constX))
1624 (set (regY) (op regA constY))
1626 (set (regA) (op regA constX)).
1627 (set (regY) (op regA constY-constX)).
1628 This works for add and shift operations, if
1629 regA is dead after or set by the second insn. */
1631 code
= GET_CODE (SET_SRC (set
));
1632 if ((code
== PLUS
|| code
== LSHIFTRT
1633 || code
== ASHIFT
|| code
== ASHIFTRT
)
1634 && XEXP (SET_SRC (set
), 0) == src
1635 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1636 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1637 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1640 /* We might find a src_note while scanning. */
1646 "Could fix operand %d of insn %d matching operand %d.\n",
1647 operand_number
, INSN_UID (insn
), match_number
);
1649 /* If SRC is equivalent to a constant set in a different basic block,
1650 then do not use it for this optimization. We want the equivalence
1651 so that if we have to reload this register, we can reload the
1652 constant, rather than extending the lifespan of the register. */
1653 if (reg_is_remote_constant_p (src
, insn
))
1656 /* Scan forward to find the next instruction that
1657 uses the output operand. If the operand dies here,
1658 then replace it in both instructions with
1661 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1664 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p
),
1665 REGNO (dst
), src
, p
);
1667 /* ??? We can't scan past the end of a basic block without updating
1668 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1669 if (perhaps_ends_bb_p (p
))
1671 else if (! INSN_P (p
))
1678 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1679 || (GET_CODE (PATTERN (p
)) == USE
1680 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1683 /* See if all of DST dies in P. This test is
1684 slightly more conservative than it needs to be. */
1685 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1686 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1688 /* If we would be moving INSN, check that we won't move it
1689 into the shadow of a live a live flags register. */
1690 /* ??? We only try to move it in front of P, although
1691 we could move it anywhere between OVERLAP and P. */
1692 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1698 rtx set2
= NULL_RTX
;
1700 /* If an optimization is done, the value of SRC while P
1701 is executed will be changed. Check that this is OK. */
1702 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1704 for (q
= p
; q
; q
= NEXT_INSN (q
))
1706 /* ??? We can't scan past the end of a basic block without
1707 updating the register lifetime info
1708 (REG_DEAD/basic_block_live_at_start). */
1709 if (perhaps_ends_bb_p (q
))
1714 else if (! INSN_P (q
))
1716 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1717 || reg_set_p (src
, q
))
1721 set2
= single_set (q
);
1722 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1723 || XEXP (SET_SRC (set2
), 0) != src
1724 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1725 || (SET_DEST (set2
) != src
1726 && ! find_reg_note (q
, REG_DEAD
, src
)))
1728 /* If this is a PLUS, we can still save a register by doing
1731 src -= insn_const; .
1732 This also gives opportunities for subsequent
1733 optimizations in the backward pass, so do it there. */
1734 if (code
== PLUS
&& backward
1735 /* Don't do this if we can likely tie DST to SET_DEST
1736 of P later; we can't do this tying here if we got a
1738 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1740 && REG_P (SET_DEST (single_set (p
)))
1741 && (REGNO (SET_DEST (single_set (p
)))
1742 < FIRST_PSEUDO_REGISTER
))
1743 /* We may only emit an insn directly after P if we
1744 are not in the shadow of a live flags register. */
1745 && GET_MODE (p
) == VOIDmode
)
1750 newconst
= -insn_const
;
1758 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1759 /* Reject out of range shifts. */
1762 || ((unsigned HOST_WIDE_INT
) newconst
1763 >= (GET_MODE_BITSIZE (GET_MODE
1764 (SET_SRC (set2
)))))))
1769 if (SET_DEST (set2
) != src
)
1770 post_inc_set
= set2
;
1773 /* We use 1 as last argument to validate_change so that all
1774 changes are accepted or rejected together by apply_change_group
1775 when it is called by validate_replace_rtx . */
1776 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1777 GEN_INT (newconst
), 1);
1779 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1780 if (validate_replace_rtx (dst
, src_subreg
, p
))
1785 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1787 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1789 /* INSN was already checked to be movable wrt. the registers that it
1790 sets / uses when we found no REG_DEAD note for src on it, but it
1791 still might clobber the flags register. We'll have to check that
1792 we won't insert it into the shadow of a live flags register when
1793 we finally know where we are to move it. */
1795 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1798 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1799 already live across a call, then don't perform the optimization. */
1802 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1816 /* Remove the death note for DST from P. */
1817 remove_note (p
, dst_note
);
1820 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1821 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1823 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1825 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1826 REG_N_SETS (REGNO (src
))++;
1827 REG_LIVE_LENGTH (REGNO (src
))++;
1831 /* The lifetime of src and dest overlap,
1832 but we can change this by moving insn. */
1833 rtx pat
= PATTERN (insn
);
1835 remove_note (overlap
, src_note
);
1836 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1838 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1842 rtx notes
= REG_NOTES (insn
);
1844 p
= emit_insn_after_setloc (pat
, PREV_INSN (p
), INSN_LOCATOR (insn
));
1846 REG_NOTES (p
) = notes
;
1849 /* Sometimes we'd generate src = const; src += n;
1850 if so, replace the instruction that set src
1851 in the first place. */
1853 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1855 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1856 rtx q
, set2
= NULL_RTX
;
1857 int num_calls2
= 0, s_length2
= 0;
1859 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1861 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN (q
))
1863 /* ??? We can't scan past the end of a basic block without
1864 updating the register lifetime info
1865 (REG_DEAD/basic_block_live_at_start). */
1866 if (perhaps_ends_bb_p (q
))
1871 else if (! INSN_P (q
))
1875 if (reg_set_p (src
, q
))
1877 set2
= single_set (q
);
1880 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1888 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1889 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1892 REG_N_SETS (REGNO (src
))--;
1893 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1894 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1900 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1901 && (code
== PLUS
|| code
== MINUS
) && insn_const
1902 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1904 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1906 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1908 /* If post_inc still prevails, try to find an
1909 insn where it can be used as a pre-in/decrement.
1910 If code is MINUS, this was already tried. */
1911 if (post_inc
&& code
== PLUS
1912 /* Check that newconst is likely to be usable
1913 in a pre-in/decrement before starting the search. */
1914 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
1915 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
1916 && exact_log2 (newconst
))
1920 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1921 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
1923 /* ??? We can't scan past the end of a basic block without updating
1924 the register lifetime info
1925 (REG_DEAD/basic_block_live_at_start). */
1926 if (perhaps_ends_bb_p (q
))
1928 else if (! INSN_P (q
))
1930 else if (src
!= inc_dest
1931 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
1932 || reg_set_p (src
, q
)))
1934 else if (reg_set_p (inc_dest
, q
))
1936 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
1938 try_auto_increment (q
, post_inc
,
1939 post_inc_set
, inc_dest
, newconst
, 1);
1945 /* Move the death note for DST to INSN if it is used
1947 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
1949 XEXP (dst_note
, 1) = REG_NOTES (insn
);
1950 REG_NOTES (insn
) = dst_note
;
1955 /* Move the death note for SRC from INSN to P. */
1957 remove_note (insn
, src_note
);
1958 XEXP (src_note
, 1) = REG_NOTES (p
);
1959 REG_NOTES (p
) = src_note
;
1961 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
1964 REG_N_SETS (REGNO (src
))++;
1965 REG_N_SETS (REGNO (dst
))--;
1967 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
1969 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
1970 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
1972 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
1973 /* REG_LIVE_LENGTH is only an approximation after
1974 combine if sched is not run, so make sure that we
1975 still have a reasonable value. */
1976 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
1977 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
1981 "Fixed operand %d of insn %d matching operand %d.\n",
1982 operand_number
, INSN_UID (insn
), match_number
);
1987 /* Return nonzero if X is stable and mentions no registers but for
1988 mentioning SRC or mentioning / changing DST . If in doubt, presume
1990 The rationale is that we want to check if we can move an insn easily
1991 while just paying attention to SRC and DST. */
1993 stable_and_no_regs_but_for_p (rtx x
, rtx src
, rtx dst
)
1995 RTX_CODE code
= GET_CODE (x
);
1996 switch (GET_RTX_CLASS (code
))
2000 case RTX_COMM_ARITH
:
2002 case RTX_COMM_COMPARE
:
2004 case RTX_BITFIELD_OPS
:
2007 const char *fmt
= GET_RTX_FORMAT (code
);
2008 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2010 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2016 return x
== src
|| x
== dst
;
2017 /* If this is a MEM, look inside - there might be a register hidden in
2018 the address of an unchanging MEM. */
2020 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2024 return ! rtx_unstable_p (x
);
2030 gate_handle_regmove (void)
2032 return (optimize
> 0 && flag_regmove
);
2035 /* Register allocation pre-pass, to reduce number of moves necessary
2036 for two-address machines. */
2038 rest_of_handle_regmove (void)
2040 regmove_optimize (get_insns (), max_reg_num ());
2041 cleanup_cfg (CLEANUP_EXPENSIVE
| CLEANUP_UPDATE_LIFE
);
2045 struct tree_opt_pass pass_regmove
=
2047 "regmove", /* name */
2048 gate_handle_regmove
, /* gate */
2049 rest_of_handle_regmove
, /* execute */
2052 0, /* static_pass_number */
2053 TV_REGMOVE
, /* tv_id */
2054 0, /* properties_required */
2055 0, /* properties_provided */
2056 0, /* properties_destroyed */
2057 0, /* todo_flags_start */
2059 TODO_ggc_collect
, /* todo_flags_finish */