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[official-gcc.git] / gcc / lra-spills.c
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1 /* Change pseudos by memory.
2 Copyright (C) 2010-2015 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
22 /* This file contains code for a pass to change spilled pseudos into
23 memory.
25 The pass creates necessary stack slots and assigns spilled pseudos
26 to the stack slots in following way:
28 for all spilled pseudos P most frequently used first do
29 for all stack slots S do
30 if P doesn't conflict with pseudos assigned to S then
31 assign S to P and goto to the next pseudo process
32 end
33 end
34 create new stack slot S and assign P to S
35 end
37 The actual algorithm is bit more complicated because of different
38 pseudo sizes.
40 After that the code changes spilled pseudos (except ones created
41 from scratches) by corresponding stack slot memory in RTL.
43 If at least one stack slot was created, we need to run more passes
44 because we have new addresses which should be checked and because
45 the old address displacements might change and address constraints
46 (or insn memory constraints) might not be satisfied any more.
48 For some targets, the pass can spill some pseudos into hard
49 registers of different class (usually into vector registers)
50 instead of spilling them into memory if it is possible and
51 profitable. Spilling GENERAL_REGS pseudo into SSE registers for
52 Intel Corei7 is an example of such optimization. And this is
53 actually recommended by Intel optimization guide.
55 The file also contains code for final change of pseudos on hard
56 regs correspondingly assigned to them. */
58 #include "config.h"
59 #include "system.h"
60 #include "coretypes.h"
61 #include "tm.h"
62 #include "rtl.h"
63 #include "tm_p.h"
64 #include "insn-config.h"
65 #include "recog.h"
66 #include "output.h"
67 #include "regs.h"
68 #include "hard-reg-set.h"
69 #include "flags.h"
70 #include "function.h"
71 #include "symtab.h"
72 #include "alias.h"
73 #include "tree.h"
74 #include "expmed.h"
75 #include "dojump.h"
76 #include "explow.h"
77 #include "calls.h"
78 #include "emit-rtl.h"
79 #include "varasm.h"
80 #include "stmt.h"
81 #include "expr.h"
82 #include "predict.h"
83 #include "dominance.h"
84 #include "cfg.h"
85 #include "cfgrtl.h"
86 #include "basic-block.h"
87 #include "except.h"
88 #include "timevar.h"
89 #include "target.h"
90 #include "alloc-pool.h"
91 #include "lra-int.h"
92 #include "ira.h"
93 #include "df.h"
96 /* Max regno at the start of the pass. */
97 static int regs_num;
99 /* Map spilled regno -> hard regno used instead of memory for
100 spilling. */
101 static rtx *spill_hard_reg;
103 /* The structure describes stack slot of a spilled pseudo. */
104 struct pseudo_slot
106 /* Number (0, 1, ...) of the stack slot to which given pseudo
107 belongs. */
108 int slot_num;
109 /* First or next slot with the same slot number. */
110 struct pseudo_slot *next, *first;
111 /* Memory representing the spilled pseudo. */
112 rtx mem;
115 /* The stack slots for each spilled pseudo. Indexed by regnos. */
116 static struct pseudo_slot *pseudo_slots;
118 /* The structure describes a register or a stack slot which can be
119 used for several spilled pseudos. */
120 struct slot
122 /* First pseudo with given stack slot. */
123 int regno;
124 /* Hard reg into which the slot pseudos are spilled. The value is
125 negative for pseudos spilled into memory. */
126 int hard_regno;
127 /* Memory representing the all stack slot. It can be different from
128 memory representing a pseudo belonging to give stack slot because
129 pseudo can be placed in a part of the corresponding stack slot.
130 The value is NULL for pseudos spilled into a hard reg. */
131 rtx mem;
132 /* Combined live ranges of all pseudos belonging to given slot. It
133 is used to figure out that a new spilled pseudo can use given
134 stack slot. */
135 lra_live_range_t live_ranges;
138 /* Array containing info about the stack slots. The array element is
139 indexed by the stack slot number in the range [0..slots_num). */
140 static struct slot *slots;
141 /* The number of the stack slots currently existing. */
142 static int slots_num;
144 /* Set up memory of the spilled pseudo I. The function can allocate
145 the corresponding stack slot if it is not done yet. */
146 static void
147 assign_mem_slot (int i)
149 rtx x = NULL_RTX;
150 machine_mode mode = GET_MODE (regno_reg_rtx[i]);
151 unsigned int inherent_size = PSEUDO_REGNO_BYTES (i);
152 unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
153 unsigned int max_ref_width = GET_MODE_SIZE (lra_reg_info[i].biggest_mode);
154 unsigned int total_size = MAX (inherent_size, max_ref_width);
155 unsigned int min_align = max_ref_width * BITS_PER_UNIT;
156 int adjust = 0;
158 lra_assert (regno_reg_rtx[i] != NULL_RTX && REG_P (regno_reg_rtx[i])
159 && lra_reg_info[i].nrefs != 0 && reg_renumber[i] < 0);
161 x = slots[pseudo_slots[i].slot_num].mem;
163 /* We can use a slot already allocated because it is guaranteed the
164 slot provides both enough inherent space and enough total
165 space. */
166 if (x)
168 /* Each pseudo has an inherent size which comes from its own mode,
169 and a total size which provides room for paradoxical subregs
170 which refer to the pseudo reg in wider modes. We allocate a new
171 slot, making sure that it has enough inherent space and total
172 space. */
173 else
175 rtx stack_slot;
177 /* No known place to spill from => no slot to reuse. */
178 x = assign_stack_local (mode, total_size,
179 min_align > inherent_align
180 || total_size > inherent_size ? -1 : 0);
181 stack_slot = x;
182 /* Cancel the big-endian correction done in assign_stack_local.
183 Get the address of the beginning of the slot. This is so we
184 can do a big-endian correction unconditionally below. */
185 if (BYTES_BIG_ENDIAN)
187 adjust = inherent_size - total_size;
188 if (adjust)
189 stack_slot
190 = adjust_address_nv (x,
191 mode_for_size (total_size * BITS_PER_UNIT,
192 MODE_INT, 1),
193 adjust);
195 slots[pseudo_slots[i].slot_num].mem = stack_slot;
198 /* On a big endian machine, the "address" of the slot is the address
199 of the low part that fits its inherent mode. */
200 if (BYTES_BIG_ENDIAN && inherent_size < total_size)
201 adjust += (total_size - inherent_size);
203 x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
205 /* Set all of the memory attributes as appropriate for a spill. */
206 set_mem_attrs_for_spill (x);
207 pseudo_slots[i].mem = x;
210 /* Sort pseudos according their usage frequencies. */
211 static int
212 regno_freq_compare (const void *v1p, const void *v2p)
214 const int regno1 = *(const int *) v1p;
215 const int regno2 = *(const int *) v2p;
216 int diff;
218 if ((diff = lra_reg_info[regno2].freq - lra_reg_info[regno1].freq) != 0)
219 return diff;
220 return regno1 - regno2;
223 /* Sort pseudos according to their slots, putting the slots in the order
224 that they should be allocated. Slots with lower numbers have the highest
225 priority and should get the smallest displacement from the stack or
226 frame pointer (whichever is being used).
228 The first allocated slot is always closest to the frame pointer,
229 so prefer lower slot numbers when frame_pointer_needed. If the stack
230 and frame grow in the same direction, then the first allocated slot is
231 always closest to the initial stack pointer and furthest away from the
232 final stack pointer, so allocate higher numbers first when using the
233 stack pointer in that case. The reverse is true if the stack and
234 frame grow in opposite directions. */
235 static int
236 pseudo_reg_slot_compare (const void *v1p, const void *v2p)
238 const int regno1 = *(const int *) v1p;
239 const int regno2 = *(const int *) v2p;
240 int diff, slot_num1, slot_num2;
241 int total_size1, total_size2;
243 slot_num1 = pseudo_slots[regno1].slot_num;
244 slot_num2 = pseudo_slots[regno2].slot_num;
245 if ((diff = slot_num1 - slot_num2) != 0)
246 return (frame_pointer_needed
247 || (!FRAME_GROWS_DOWNWARD) == STACK_GROWS_DOWNWARD ? diff : -diff);
248 total_size1 = GET_MODE_SIZE (lra_reg_info[regno1].biggest_mode);
249 total_size2 = GET_MODE_SIZE (lra_reg_info[regno2].biggest_mode);
250 if ((diff = total_size2 - total_size1) != 0)
251 return diff;
252 return regno1 - regno2;
255 /* Assign spill hard registers to N pseudos in PSEUDO_REGNOS which is
256 sorted in order of highest frequency first. Put the pseudos which
257 did not get a spill hard register at the beginning of array
258 PSEUDO_REGNOS. Return the number of such pseudos. */
259 static int
260 assign_spill_hard_regs (int *pseudo_regnos, int n)
262 int i, k, p, regno, res, spill_class_size, hard_regno, nr;
263 enum reg_class rclass, spill_class;
264 machine_mode mode;
265 lra_live_range_t r;
266 rtx_insn *insn;
267 rtx set;
268 basic_block bb;
269 HARD_REG_SET conflict_hard_regs;
270 bitmap_head ok_insn_bitmap;
271 bitmap setjump_crosses = regstat_get_setjmp_crosses ();
272 /* Hard registers which can not be used for any purpose at given
273 program point because they are unallocatable or already allocated
274 for other pseudos. */
275 HARD_REG_SET *reserved_hard_regs;
277 if (! lra_reg_spill_p)
278 return n;
279 /* Set up reserved hard regs for every program point. */
280 reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point);
281 for (p = 0; p < lra_live_max_point; p++)
282 COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs);
283 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
284 if (lra_reg_info[i].nrefs != 0
285 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
286 for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
287 for (p = r->start; p <= r->finish; p++)
288 add_to_hard_reg_set (&reserved_hard_regs[p],
289 lra_reg_info[i].biggest_mode, hard_regno);
290 bitmap_initialize (&ok_insn_bitmap, &reg_obstack);
291 FOR_EACH_BB_FN (bb, cfun)
292 FOR_BB_INSNS (bb, insn)
293 if (DEBUG_INSN_P (insn)
294 || ((set = single_set (insn)) != NULL_RTX
295 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))))
296 bitmap_set_bit (&ok_insn_bitmap, INSN_UID (insn));
297 for (res = i = 0; i < n; i++)
299 regno = pseudo_regnos[i];
300 rclass = lra_get_allocno_class (regno);
301 if (bitmap_bit_p (setjump_crosses, regno)
302 || (spill_class
303 = ((enum reg_class)
304 targetm.spill_class ((reg_class_t) rclass,
305 PSEUDO_REGNO_MODE (regno)))) == NO_REGS
306 || bitmap_intersect_compl_p (&lra_reg_info[regno].insn_bitmap,
307 &ok_insn_bitmap))
309 pseudo_regnos[res++] = regno;
310 continue;
312 lra_assert (spill_class != NO_REGS);
313 COPY_HARD_REG_SET (conflict_hard_regs,
314 lra_reg_info[regno].conflict_hard_regs);
315 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
316 for (p = r->start; p <= r->finish; p++)
317 IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]);
318 spill_class_size = ira_class_hard_regs_num[spill_class];
319 mode = lra_reg_info[regno].biggest_mode;
320 for (k = 0; k < spill_class_size; k++)
322 hard_regno = ira_class_hard_regs[spill_class][k];
323 if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno))
324 break;
326 if (k >= spill_class_size)
328 /* There is no available regs -- assign memory later. */
329 pseudo_regnos[res++] = regno;
330 continue;
332 if (lra_dump_file != NULL)
333 fprintf (lra_dump_file, " Spill r%d into hr%d\n", regno, hard_regno);
334 /* Update reserved_hard_regs. */
335 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
336 for (p = r->start; p <= r->finish; p++)
337 add_to_hard_reg_set (&reserved_hard_regs[p],
338 lra_reg_info[regno].biggest_mode, hard_regno);
339 spill_hard_reg[regno]
340 = gen_raw_REG (PSEUDO_REGNO_MODE (regno), hard_regno);
341 for (nr = 0;
342 nr < hard_regno_nregs[hard_regno][lra_reg_info[regno].biggest_mode];
343 nr++)
344 /* Just loop. */
345 df_set_regs_ever_live (hard_regno + nr, true);
347 bitmap_clear (&ok_insn_bitmap);
348 free (reserved_hard_regs);
349 return res;
352 /* Add pseudo REGNO to slot SLOT_NUM. */
353 static void
354 add_pseudo_to_slot (int regno, int slot_num)
356 struct pseudo_slot *first;
358 if (slots[slot_num].regno < 0)
360 /* It is the first pseudo in the slot. */
361 slots[slot_num].regno = regno;
362 pseudo_slots[regno].first = &pseudo_slots[regno];
363 pseudo_slots[regno].next = NULL;
365 else
367 first = pseudo_slots[regno].first = &pseudo_slots[slots[slot_num].regno];
368 pseudo_slots[regno].next = first->next;
369 first->next = &pseudo_slots[regno];
371 pseudo_slots[regno].mem = NULL_RTX;
372 pseudo_slots[regno].slot_num = slot_num;
373 slots[slot_num].live_ranges
374 = lra_merge_live_ranges (slots[slot_num].live_ranges,
375 lra_copy_live_range_list
376 (lra_reg_info[regno].live_ranges));
379 /* Assign stack slot numbers to pseudos in array PSEUDO_REGNOS of
380 length N. Sort pseudos in PSEUDO_REGNOS for subsequent assigning
381 memory stack slots. */
382 static void
383 assign_stack_slot_num_and_sort_pseudos (int *pseudo_regnos, int n)
385 int i, j, regno;
387 slots_num = 0;
388 /* Assign stack slot numbers to spilled pseudos, use smaller numbers
389 for most frequently used pseudos. */
390 for (i = 0; i < n; i++)
392 regno = pseudo_regnos[i];
393 if (! flag_ira_share_spill_slots)
394 j = slots_num;
395 else
397 for (j = 0; j < slots_num; j++)
398 if (slots[j].hard_regno < 0
399 && ! (lra_intersected_live_ranges_p
400 (slots[j].live_ranges,
401 lra_reg_info[regno].live_ranges)))
402 break;
404 if (j >= slots_num)
406 /* New slot. */
407 slots[j].live_ranges = NULL;
408 slots[j].regno = slots[j].hard_regno = -1;
409 slots[j].mem = NULL_RTX;
410 slots_num++;
412 add_pseudo_to_slot (regno, j);
414 /* Sort regnos according to their slot numbers. */
415 qsort (pseudo_regnos, n, sizeof (int), pseudo_reg_slot_compare);
418 /* Recursively process LOC in INSN and change spilled pseudos to the
419 corresponding memory or spilled hard reg. Ignore spilled pseudos
420 created from the scratches. */
421 static void
422 remove_pseudos (rtx *loc, rtx_insn *insn)
424 int i;
425 rtx hard_reg;
426 const char *fmt;
427 enum rtx_code code;
429 if (*loc == NULL_RTX)
430 return;
431 code = GET_CODE (*loc);
432 if (code == REG && (i = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
433 && lra_get_regno_hard_regno (i) < 0
434 /* We do not want to assign memory for former scratches because
435 it might result in an address reload for some targets. In
436 any case we transform such pseudos not getting hard registers
437 into scratches back. */
438 && ! lra_former_scratch_p (i))
440 if ((hard_reg = spill_hard_reg[i]) != NULL_RTX)
441 *loc = copy_rtx (hard_reg);
442 else
444 rtx x = lra_eliminate_regs_1 (insn, pseudo_slots[i].mem,
445 GET_MODE (pseudo_slots[i].mem),
446 false, false, 0, true);
447 *loc = x != pseudo_slots[i].mem ? x : copy_rtx (x);
449 return;
452 fmt = GET_RTX_FORMAT (code);
453 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
455 if (fmt[i] == 'e')
456 remove_pseudos (&XEXP (*loc, i), insn);
457 else if (fmt[i] == 'E')
459 int j;
461 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
462 remove_pseudos (&XVECEXP (*loc, i, j), insn);
467 /* Convert spilled pseudos into their stack slots or spill hard regs,
468 put insns to process on the constraint stack (that is all insns in
469 which pseudos were changed to memory or spill hard regs). */
470 static void
471 spill_pseudos (void)
473 basic_block bb;
474 rtx_insn *insn;
475 int i;
476 bitmap_head spilled_pseudos, changed_insns;
478 bitmap_initialize (&spilled_pseudos, &reg_obstack);
479 bitmap_initialize (&changed_insns, &reg_obstack);
480 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
482 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
483 && ! lra_former_scratch_p (i))
485 bitmap_set_bit (&spilled_pseudos, i);
486 bitmap_ior_into (&changed_insns, &lra_reg_info[i].insn_bitmap);
489 FOR_EACH_BB_FN (bb, cfun)
491 FOR_BB_INSNS (bb, insn)
492 if (bitmap_bit_p (&changed_insns, INSN_UID (insn)))
494 rtx *link_loc, link;
495 remove_pseudos (&PATTERN (insn), insn);
496 if (CALL_P (insn))
497 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
498 for (link_loc = &REG_NOTES (insn);
499 (link = *link_loc) != NULL_RTX;
500 link_loc = &XEXP (link, 1))
502 switch (REG_NOTE_KIND (link))
504 case REG_FRAME_RELATED_EXPR:
505 case REG_CFA_DEF_CFA:
506 case REG_CFA_ADJUST_CFA:
507 case REG_CFA_OFFSET:
508 case REG_CFA_REGISTER:
509 case REG_CFA_EXPRESSION:
510 case REG_CFA_RESTORE:
511 case REG_CFA_SET_VDRAP:
512 remove_pseudos (&XEXP (link, 0), insn);
513 break;
514 default:
515 break;
518 if (lra_dump_file != NULL)
519 fprintf (lra_dump_file,
520 "Changing spilled pseudos to memory in insn #%u\n",
521 INSN_UID (insn));
522 lra_push_insn (insn);
523 if (lra_reg_spill_p || targetm.different_addr_displacement_p ())
524 lra_set_used_insn_alternative (insn, -1);
526 else if (CALL_P (insn))
527 /* Presence of any pseudo in CALL_INSN_FUNCTION_USAGE does
528 not affect value of insn_bitmap of the corresponding
529 lra_reg_info. That is because we don't need to reload
530 pseudos in CALL_INSN_FUNCTION_USAGEs. So if we process
531 only insns in the insn_bitmap of given pseudo here, we
532 can miss the pseudo in some
533 CALL_INSN_FUNCTION_USAGEs. */
534 remove_pseudos (&CALL_INSN_FUNCTION_USAGE (insn), insn);
535 bitmap_and_compl_into (df_get_live_in (bb), &spilled_pseudos);
536 bitmap_and_compl_into (df_get_live_out (bb), &spilled_pseudos);
538 bitmap_clear (&spilled_pseudos);
539 bitmap_clear (&changed_insns);
542 /* Return true if we need to change some pseudos into memory. */
543 bool
544 lra_need_for_spills_p (void)
546 int i; max_regno = max_reg_num ();
548 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
549 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
550 && ! lra_former_scratch_p (i))
551 return true;
552 return false;
555 /* Change spilled pseudos into memory or spill hard regs. Put changed
556 insns on the constraint stack (these insns will be considered on
557 the next constraint pass). The changed insns are all insns in
558 which pseudos were changed. */
559 void
560 lra_spill (void)
562 int i, n, curr_regno;
563 int *pseudo_regnos;
565 regs_num = max_reg_num ();
566 spill_hard_reg = XNEWVEC (rtx, regs_num);
567 pseudo_regnos = XNEWVEC (int, regs_num);
568 for (n = 0, i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
569 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0
570 /* We do not want to assign memory for former scratches. */
571 && ! lra_former_scratch_p (i))
573 spill_hard_reg[i] = NULL_RTX;
574 pseudo_regnos[n++] = i;
576 lra_assert (n > 0);
577 pseudo_slots = XNEWVEC (struct pseudo_slot, regs_num);
578 slots = XNEWVEC (struct slot, regs_num);
579 /* Sort regnos according their usage frequencies. */
580 qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare);
581 n = assign_spill_hard_regs (pseudo_regnos, n);
582 assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n);
583 for (i = 0; i < n; i++)
584 if (pseudo_slots[pseudo_regnos[i]].mem == NULL_RTX)
585 assign_mem_slot (pseudo_regnos[i]);
586 if (n > 0 && crtl->stack_alignment_needed)
587 /* If we have a stack frame, we must align it now. The stack size
588 may be a part of the offset computation for register
589 elimination. */
590 assign_stack_local (BLKmode, 0, crtl->stack_alignment_needed);
591 if (lra_dump_file != NULL)
593 for (i = 0; i < slots_num; i++)
595 fprintf (lra_dump_file, " Slot %d regnos (width = %d):", i,
596 GET_MODE_SIZE (GET_MODE (slots[i].mem)));
597 for (curr_regno = slots[i].regno;;
598 curr_regno = pseudo_slots[curr_regno].next - pseudo_slots)
600 fprintf (lra_dump_file, " %d", curr_regno);
601 if (pseudo_slots[curr_regno].next == NULL)
602 break;
604 fprintf (lra_dump_file, "\n");
607 spill_pseudos ();
608 free (slots);
609 free (pseudo_slots);
610 free (pseudo_regnos);
611 free (spill_hard_reg);
614 /* Apply alter_subreg for subregs of regs in *LOC. Use FINAL_P for
615 alter_subreg calls. Return true if any subreg of reg is
616 processed. */
617 static bool
618 alter_subregs (rtx *loc, bool final_p)
620 int i;
621 rtx x = *loc;
622 bool res;
623 const char *fmt;
624 enum rtx_code code;
626 if (x == NULL_RTX)
627 return false;
628 code = GET_CODE (x);
629 if (code == SUBREG && REG_P (SUBREG_REG (x)))
631 lra_assert (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER);
632 alter_subreg (loc, final_p);
633 return true;
635 fmt = GET_RTX_FORMAT (code);
636 res = false;
637 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
639 if (fmt[i] == 'e')
641 if (alter_subregs (&XEXP (x, i), final_p))
642 res = true;
644 else if (fmt[i] == 'E')
646 int j;
648 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
649 if (alter_subregs (&XVECEXP (x, i, j), final_p))
650 res = true;
653 return res;
656 /* Return true if REGNO is used for return in the current
657 function. */
658 static bool
659 return_regno_p (unsigned int regno)
661 rtx outgoing = crtl->return_rtx;
663 if (! outgoing)
664 return false;
666 if (REG_P (outgoing))
667 return REGNO (outgoing) == regno;
668 else if (GET_CODE (outgoing) == PARALLEL)
670 int i;
672 for (i = 0; i < XVECLEN (outgoing, 0); i++)
674 rtx x = XEXP (XVECEXP (outgoing, 0, i), 0);
676 if (REG_P (x) && REGNO (x) == regno)
677 return true;
680 return false;
683 /* Final change of pseudos got hard registers into the corresponding
684 hard registers and removing temporary clobbers. */
685 void
686 lra_final_code_change (void)
688 int i, hard_regno;
689 basic_block bb;
690 rtx_insn *insn, *curr;
691 int max_regno = max_reg_num ();
693 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
694 if (lra_reg_info[i].nrefs != 0
695 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0)
696 SET_REGNO (regno_reg_rtx[i], hard_regno);
697 FOR_EACH_BB_FN (bb, cfun)
698 FOR_BB_INSNS_SAFE (bb, insn, curr)
699 if (INSN_P (insn))
701 rtx pat = PATTERN (insn);
703 if (GET_CODE (pat) == CLOBBER && LRA_TEMP_CLOBBER_P (pat))
705 /* Remove clobbers temporarily created in LRA. We don't
706 need them anymore and don't want to waste compiler
707 time processing them in a few subsequent passes. */
708 lra_invalidate_insn_data (insn);
709 delete_insn (insn);
710 continue;
713 /* IRA can generate move insns involving pseudos. It is
714 better remove them earlier to speed up compiler a bit.
715 It is also better to do it here as they might not pass
716 final RTL check in LRA, (e.g. insn moving a control
717 register into itself). So remove an useless move insn
718 unless next insn is USE marking the return reg (we should
719 save this as some subsequent optimizations assume that
720 such original insns are saved). */
721 if (NONJUMP_INSN_P (insn) && GET_CODE (pat) == SET
722 && REG_P (SET_SRC (pat)) && REG_P (SET_DEST (pat))
723 && REGNO (SET_SRC (pat)) == REGNO (SET_DEST (pat))
724 && ! return_regno_p (REGNO (SET_SRC (pat))))
726 lra_invalidate_insn_data (insn);
727 delete_insn (insn);
728 continue;
731 lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
732 struct lra_static_insn_data *static_id = id->insn_static_data;
733 bool insn_change_p = false;
735 for (i = id->insn_static_data->n_operands - 1; i >= 0; i--)
736 if ((DEBUG_INSN_P (insn) || ! static_id->operand[i].is_operator)
737 && alter_subregs (id->operand_loc[i], ! DEBUG_INSN_P (insn)))
739 lra_update_dup (id, i);
740 insn_change_p = true;
742 if (insn_change_p)
743 lra_update_operator_dups (id);