gcc/testsuite/gcc.dg/lsr-div1.c

   1 /* Test division by const int generates only one shift.  */
   2 /* { dg-do run } */
   3 /* { dg-options "-O2 -fdump-rtl-combine-all" } */
   4 /* { dg-options "-O2 -fdump-rtl-combine-all -mtune=cortex-a53" { target aarch64*-*-* } } */
   5 /* { dg-require-effective-target int32plus } */
   6
   7 extern void abort (void);
   8
   9 #define NOINLINE __attribute__((noinline))
  10
  11 static NOINLINE int
  12 f1 (unsigned int n)
  13 {
  14   return n % 0x33;
  15 }
  16
  17 static NOINLINE int
  18 f2 (unsigned int n)
  19 {
  20   return n % 0x12;
  21 }
  22
  23 int
  24 main ()
  25 {
  26   int a = 0xaaaaaaaa;
  27   int b = 0x55555555;
  28   int c;
  29   c = f1 (a);
  30   if (c != 0x11)
  31     abort ();
  32   c = f1 (b);
  33   if (c != 0x22)
  34     abort ();
  35   c = f2 (a);
  36   if (c != 0xE)
  37     abort ();
  38   c = f2 (b);
  39   if (c != 0x7)
  40     abort ();
  41   return 0;
  42 }
  43
  44 /* Following replacement pattern of intger division by constant, GCC is expected
  45    to generate UMULL and (x)SHIFTRT.  This test checks that considering division
  46    by const 0x33, gcc generates a single LSHIFTRT by 37, instead of
  47    two - LSHIFTRT by 32 and LSHIFTRT by 5.  */
  48
  49 /* { dg-final { scan-rtl-dump "\\(set \\(subreg:DI \\(reg:SI" "combine" { target aarch64*-*-* } } } */
  50 /* { dg-final { scan-rtl-dump "\\(lshiftrt:DI \\(reg:DI" "combine" { target aarch64*-*-* } } } */
  51 /* { dg-final { scan-rtl-dump "\\(const_int 37 " "combine" { target aarch64*-*-* } } } */
  52
  53 /* Similarly, considering division by const 0x12, gcc generates a
  54    single LSHIFTRT by 34, instead of two - LSHIFTRT by 32 and LSHIFTRT by 2.  */
  55
  56 /* { dg-final { scan-rtl-dump "\\(const_int 34 " "combine" { target aarch64*-*-* } } } */
  57