2015-07-02 Steven G. Kargl <kargl@gcc.gnu.org>
[official-gcc.git] / gcc / store-motion.c
blob802c6004d4edaf929f74ec9fa027ecc4a50c527b
1 /* Store motion via Lazy Code Motion on the reverse CFG.
2 Copyright (C) 1997-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "diagnostic-core.h"
25 #include "toplev.h"
27 #include "rtl.h"
28 #include "alias.h"
29 #include "symtab.h"
30 #include "tree.h"
31 #include "tm_p.h"
32 #include "regs.h"
33 #include "hard-reg-set.h"
34 #include "flags.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "predict.h"
38 #include "function.h"
39 #include "dominance.h"
40 #include "cfg.h"
41 #include "cfgrtl.h"
42 #include "cfganal.h"
43 #include "lcm.h"
44 #include "cfgcleanup.h"
45 #include "basic-block.h"
46 #include "expmed.h"
47 #include "dojump.h"
48 #include "explow.h"
49 #include "calls.h"
50 #include "emit-rtl.h"
51 #include "varasm.h"
52 #include "stmt.h"
53 #include "expr.h"
54 #include "except.h"
55 #include "intl.h"
56 #include "tree-pass.h"
57 #include "df.h"
58 #include "dbgcnt.h"
59 #include "rtl-iter.h"
61 /* This pass implements downward store motion.
62 As of May 1, 2009, the pass is not enabled by default on any target,
63 but bootstrap completes on ia64 and x86_64 with the pass enabled. */
65 /* TODO:
66 - remove_reachable_equiv_notes is an incomprehensible pile of goo and
67 a compile time hog that needs a rewrite (maybe cache st_exprs to
68 invalidate REG_EQUAL/REG_EQUIV notes for?).
69 - pattern_regs in st_expr should be a regset (on its own obstack).
70 - antic_stores and avail_stores should be VECs instead of lists.
71 - store_motion_mems should be a vec instead of a list.
72 - there should be an alloc pool for struct st_expr objects.
73 - investigate whether it is helpful to make the address of an st_expr
74 a cselib VALUE.
75 - when GIMPLE alias information is exported, the effectiveness of this
76 pass should be re-evaluated.
79 /* This is a list of store expressions (MEMs). The structure is used
80 as an expression table to track stores which look interesting, and
81 might be moveable towards the exit block. */
83 struct st_expr
85 /* Pattern of this mem. */
86 rtx pattern;
87 /* List of registers mentioned by the mem. */
88 rtx pattern_regs;
89 /* INSN list of stores that are locally anticipatable. */
90 rtx_insn_list *antic_stores;
91 /* INSN list of stores that are locally available. */
92 rtx_insn_list *avail_stores;
93 /* Next in the list. */
94 struct st_expr * next;
95 /* Store ID in the dataflow bitmaps. */
96 int index;
97 /* Hash value for the hash table. */
98 unsigned int hash_index;
99 /* Register holding the stored expression when a store is moved.
100 This field is also used as a cache in find_moveable_store, see
101 LAST_AVAIL_CHECK_FAILURE below. */
102 rtx reaching_reg;
105 /* Head of the list of load/store memory refs. */
106 static struct st_expr * store_motion_mems = NULL;
108 /* These bitmaps will hold the local dataflow properties per basic block. */
109 static sbitmap *st_kill, *st_avloc, *st_antloc, *st_transp;
111 /* Nonzero for expressions which should be inserted on a specific edge. */
112 static sbitmap *st_insert_map;
114 /* Nonzero for expressions which should be deleted in a specific block. */
115 static sbitmap *st_delete_map;
117 /* Global holding the number of store expressions we are dealing with. */
118 static int num_stores;
120 /* Contains the edge_list returned by pre_edge_lcm. */
121 static struct edge_list *edge_list;
123 /* Hashtable helpers. */
125 struct st_expr_hasher : nofree_ptr_hash <st_expr>
127 static inline hashval_t hash (const st_expr *);
128 static inline bool equal (const st_expr *, const st_expr *);
131 inline hashval_t
132 st_expr_hasher::hash (const st_expr *x)
134 int do_not_record_p = 0;
135 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
138 inline bool
139 st_expr_hasher::equal (const st_expr *ptr1, const st_expr *ptr2)
141 return exp_equiv_p (ptr1->pattern, ptr2->pattern, 0, true);
144 /* Hashtable for the load/store memory refs. */
145 static hash_table<st_expr_hasher> *store_motion_mems_table;
147 /* This will search the st_expr list for a matching expression. If it
148 doesn't find one, we create one and initialize it. */
150 static struct st_expr *
151 st_expr_entry (rtx x)
153 int do_not_record_p = 0;
154 struct st_expr * ptr;
155 unsigned int hash;
156 st_expr **slot;
157 struct st_expr e;
159 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
160 NULL, /*have_reg_qty=*/false);
162 e.pattern = x;
163 slot = store_motion_mems_table->find_slot_with_hash (&e, hash, INSERT);
164 if (*slot)
165 return *slot;
167 ptr = XNEW (struct st_expr);
169 ptr->next = store_motion_mems;
170 ptr->pattern = x;
171 ptr->pattern_regs = NULL_RTX;
172 ptr->antic_stores = NULL;
173 ptr->avail_stores = NULL;
174 ptr->reaching_reg = NULL_RTX;
175 ptr->index = 0;
176 ptr->hash_index = hash;
177 store_motion_mems = ptr;
178 *slot = ptr;
180 return ptr;
183 /* Free up an individual st_expr entry. */
185 static void
186 free_st_expr_entry (struct st_expr * ptr)
188 free_INSN_LIST_list (& ptr->antic_stores);
189 free_INSN_LIST_list (& ptr->avail_stores);
191 free (ptr);
194 /* Free up all memory associated with the st_expr list. */
196 static void
197 free_store_motion_mems (void)
199 delete store_motion_mems_table;
200 store_motion_mems_table = NULL;
202 while (store_motion_mems)
204 struct st_expr * tmp = store_motion_mems;
205 store_motion_mems = store_motion_mems->next;
206 free_st_expr_entry (tmp);
208 store_motion_mems = NULL;
211 /* Assign each element of the list of mems a monotonically increasing value. */
213 static int
214 enumerate_store_motion_mems (void)
216 struct st_expr * ptr;
217 int n = 0;
219 for (ptr = store_motion_mems; ptr != NULL; ptr = ptr->next)
220 ptr->index = n++;
222 return n;
225 /* Return first item in the list. */
227 static inline struct st_expr *
228 first_st_expr (void)
230 return store_motion_mems;
233 /* Return the next item in the list after the specified one. */
235 static inline struct st_expr *
236 next_st_expr (struct st_expr * ptr)
238 return ptr->next;
241 /* Dump debugging info about the store_motion_mems list. */
243 static void
244 print_store_motion_mems (FILE * file)
246 struct st_expr * ptr;
248 fprintf (dump_file, "STORE_MOTION list of MEM exprs considered:\n");
250 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
252 fprintf (file, " Pattern (%3d): ", ptr->index);
254 print_rtl (file, ptr->pattern);
256 fprintf (file, "\n ANTIC stores : ");
258 if (ptr->antic_stores)
259 print_rtl (file, ptr->antic_stores);
260 else
261 fprintf (file, "(nil)");
263 fprintf (file, "\n AVAIL stores : ");
265 if (ptr->avail_stores)
266 print_rtl (file, ptr->avail_stores);
267 else
268 fprintf (file, "(nil)");
270 fprintf (file, "\n\n");
273 fprintf (file, "\n");
276 /* Return zero if some of the registers in list X are killed
277 due to set of registers in bitmap REGS_SET. */
279 static bool
280 store_ops_ok (const_rtx x, int *regs_set)
282 const_rtx reg;
284 for (; x; x = XEXP (x, 1))
286 reg = XEXP (x, 0);
287 if (regs_set[REGNO (reg)])
288 return false;
291 return true;
294 /* Returns a list of registers mentioned in X.
295 FIXME: A regset would be prettier and less expensive. */
297 static rtx_expr_list *
298 extract_mentioned_regs (rtx x)
300 rtx_expr_list *mentioned_regs = NULL;
301 subrtx_var_iterator::array_type array;
302 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
304 rtx x = *iter;
305 if (REG_P (x))
306 mentioned_regs = alloc_EXPR_LIST (0, x, mentioned_regs);
308 return mentioned_regs;
311 /* Check to see if the load X is aliased with STORE_PATTERN.
312 AFTER is true if we are checking the case when STORE_PATTERN occurs
313 after the X. */
315 static bool
316 load_kills_store (const_rtx x, const_rtx store_pattern, int after)
318 if (after)
319 return anti_dependence (x, store_pattern);
320 else
321 return true_dependence (store_pattern, GET_MODE (store_pattern), x);
324 /* Go through the entire rtx X, looking for any loads which might alias
325 STORE_PATTERN. Return true if found.
326 AFTER is true if we are checking the case when STORE_PATTERN occurs
327 after the insn X. */
329 static bool
330 find_loads (const_rtx x, const_rtx store_pattern, int after)
332 const char * fmt;
333 int i, j;
334 int ret = false;
336 if (!x)
337 return false;
339 if (GET_CODE (x) == SET)
340 x = SET_SRC (x);
342 if (MEM_P (x))
344 if (load_kills_store (x, store_pattern, after))
345 return true;
348 /* Recursively process the insn. */
349 fmt = GET_RTX_FORMAT (GET_CODE (x));
351 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
353 if (fmt[i] == 'e')
354 ret |= find_loads (XEXP (x, i), store_pattern, after);
355 else if (fmt[i] == 'E')
356 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
357 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
359 return ret;
362 /* Go through pattern PAT looking for any loads which might kill the
363 store in X. Return true if found.
364 AFTER is true if we are checking the case when loads kill X occurs
365 after the insn for PAT. */
367 static inline bool
368 store_killed_in_pat (const_rtx x, const_rtx pat, int after)
370 if (GET_CODE (pat) == SET)
372 rtx dest = SET_DEST (pat);
374 if (GET_CODE (dest) == ZERO_EXTRACT)
375 dest = XEXP (dest, 0);
377 /* Check for memory stores to aliased objects. */
378 if (MEM_P (dest)
379 && !exp_equiv_p (dest, x, 0, true))
381 if (after)
383 if (output_dependence (dest, x))
384 return true;
386 else
388 if (output_dependence (x, dest))
389 return true;
394 if (find_loads (pat, x, after))
395 return true;
397 return false;
400 /* Check if INSN kills the store pattern X (is aliased with it).
401 AFTER is true if we are checking the case when store X occurs
402 after the insn. Return true if it does. */
404 static bool
405 store_killed_in_insn (const_rtx x, const_rtx x_regs, const rtx_insn *insn, int after)
407 const_rtx reg, note, pat;
409 if (! NONDEBUG_INSN_P (insn))
410 return false;
412 if (CALL_P (insn))
414 /* A normal or pure call might read from pattern,
415 but a const call will not. */
416 if (!RTL_CONST_CALL_P (insn))
417 return true;
419 /* But even a const call reads its parameters. Check whether the
420 base of some of registers used in mem is stack pointer. */
421 for (reg = x_regs; reg; reg = XEXP (reg, 1))
422 if (may_be_sp_based_p (XEXP (reg, 0)))
423 return true;
425 return false;
428 pat = PATTERN (insn);
429 if (GET_CODE (pat) == SET)
431 if (store_killed_in_pat (x, pat, after))
432 return true;
434 else if (GET_CODE (pat) == PARALLEL)
436 int i;
438 for (i = 0; i < XVECLEN (pat, 0); i++)
439 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
440 return true;
442 else if (find_loads (PATTERN (insn), x, after))
443 return true;
445 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
446 location aliased with X, then this insn kills X. */
447 note = find_reg_equal_equiv_note (insn);
448 if (! note)
449 return false;
450 note = XEXP (note, 0);
452 /* However, if the note represents a must alias rather than a may
453 alias relationship, then it does not kill X. */
454 if (exp_equiv_p (note, x, 0, true))
455 return false;
457 /* See if there are any aliased loads in the note. */
458 return find_loads (note, x, after);
461 /* Returns true if the expression X is loaded or clobbered on or after INSN
462 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
463 or after the insn. X_REGS is list of registers mentioned in X. If the store
464 is killed, return the last insn in that it occurs in FAIL_INSN. */
466 static bool
467 store_killed_after (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
468 const_basic_block bb,
469 int *regs_set_after, rtx *fail_insn)
471 rtx_insn *last = BB_END (bb), *act;
473 if (!store_ops_ok (x_regs, regs_set_after))
475 /* We do not know where it will happen. */
476 if (fail_insn)
477 *fail_insn = NULL_RTX;
478 return true;
481 /* Scan from the end, so that fail_insn is determined correctly. */
482 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
483 if (store_killed_in_insn (x, x_regs, act, false))
485 if (fail_insn)
486 *fail_insn = act;
487 return true;
490 return false;
493 /* Returns true if the expression X is loaded or clobbered on or before INSN
494 within basic block BB. X_REGS is list of registers mentioned in X.
495 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
496 static bool
497 store_killed_before (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
498 const_basic_block bb, int *regs_set_before)
500 rtx_insn *first = BB_HEAD (bb);
502 if (!store_ops_ok (x_regs, regs_set_before))
503 return true;
505 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
506 if (store_killed_in_insn (x, x_regs, insn, true))
507 return true;
509 return false;
512 /* The last insn in the basic block that compute_store_table is processing,
513 where store_killed_after is true for X.
514 Since we go through the basic block from BB_END to BB_HEAD, this is
515 also the available store at the end of the basic block. Therefore
516 this is in effect a cache, to avoid calling store_killed_after for
517 equivalent aliasing store expressions.
518 This value is only meaningful during the computation of the store
519 table. We hi-jack the REACHING_REG field of struct st_expr to save
520 a bit of memory. */
521 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
523 /* Determine whether INSN is MEM store pattern that we will consider moving.
524 REGS_SET_BEFORE is bitmap of registers set before (and including) the
525 current insn, REGS_SET_AFTER is bitmap of registers set after (and
526 including) the insn in this basic block. We must be passing through BB from
527 head to end, as we are using this fact to speed things up.
529 The results are stored this way:
531 -- the first anticipatable expression is added into ANTIC_STORES
532 -- if the processed expression is not anticipatable, NULL_RTX is added
533 there instead, so that we can use it as indicator that no further
534 expression of this type may be anticipatable
535 -- if the expression is available, it is added as head of AVAIL_STORES;
536 consequently, all of them but this head are dead and may be deleted.
537 -- if the expression is not available, the insn due to that it fails to be
538 available is stored in REACHING_REG (via LAST_AVAIL_CHECK_FAILURE).
540 The things are complicated a bit by fact that there already may be stores
541 to the same MEM from other blocks; also caller must take care of the
542 necessary cleanup of the temporary markers after end of the basic block.
545 static void
546 find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
548 struct st_expr * ptr;
549 rtx dest, set;
550 int check_anticipatable, check_available;
551 basic_block bb = BLOCK_FOR_INSN (insn);
553 set = single_set (insn);
554 if (!set)
555 return;
557 dest = SET_DEST (set);
559 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
560 || GET_MODE (dest) == BLKmode)
561 return;
563 if (side_effects_p (dest))
564 return;
566 /* If we are handling exceptions, we must be careful with memory references
567 that may trap. If we are not, the behavior is undefined, so we may just
568 continue. */
569 if (cfun->can_throw_non_call_exceptions && may_trap_p (dest))
570 return;
572 /* Even if the destination cannot trap, the source may. In this case we'd
573 need to handle updating the REG_EH_REGION note. */
574 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
575 return;
577 /* Make sure that the SET_SRC of this store insns can be assigned to
578 a register, or we will fail later on in replace_store_insn, which
579 assumes that we can do this. But sometimes the target machine has
580 oddities like MEM read-modify-write instruction. See for example
581 PR24257. */
582 if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set)))
583 return;
585 ptr = st_expr_entry (dest);
586 if (!ptr->pattern_regs)
587 ptr->pattern_regs = extract_mentioned_regs (dest);
589 /* Do not check for anticipatability if we either found one anticipatable
590 store already, or tested for one and found out that it was killed. */
591 check_anticipatable = 0;
592 if (!ptr->antic_stores)
593 check_anticipatable = 1;
594 else
596 rtx_insn *tmp = ptr->antic_stores->insn ();
597 if (tmp != NULL_RTX
598 && BLOCK_FOR_INSN (tmp) != bb)
599 check_anticipatable = 1;
601 if (check_anticipatable)
603 rtx_insn *tmp;
604 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
605 tmp = NULL;
606 else
607 tmp = insn;
608 ptr->antic_stores = alloc_INSN_LIST (tmp, ptr->antic_stores);
611 /* It is not necessary to check whether store is available if we did
612 it successfully before; if we failed before, do not bother to check
613 until we reach the insn that caused us to fail. */
614 check_available = 0;
615 if (!ptr->avail_stores)
616 check_available = 1;
617 else
619 rtx_insn *tmp = ptr->avail_stores->insn ();
620 if (BLOCK_FOR_INSN (tmp) != bb)
621 check_available = 1;
623 if (check_available)
625 /* Check that we have already reached the insn at that the check
626 failed last time. */
627 if (LAST_AVAIL_CHECK_FAILURE (ptr))
629 rtx_insn *tmp;
630 for (tmp = BB_END (bb);
631 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
632 tmp = PREV_INSN (tmp))
633 continue;
634 if (tmp == insn)
635 check_available = 0;
637 else
638 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
639 bb, regs_set_after,
640 &LAST_AVAIL_CHECK_FAILURE (ptr));
642 if (!check_available)
643 ptr->avail_stores = alloc_INSN_LIST (insn, ptr->avail_stores);
646 /* Find available and anticipatable stores. */
648 static int
649 compute_store_table (void)
651 int ret;
652 basic_block bb;
653 #ifdef ENABLE_CHECKING
654 unsigned regno;
655 #endif
656 rtx_insn *insn;
657 rtx_insn *tmp;
658 df_ref def;
659 int *last_set_in, *already_set;
660 struct st_expr * ptr, **prev_next_ptr_ptr;
661 unsigned int max_gcse_regno = max_reg_num ();
663 store_motion_mems = NULL;
664 store_motion_mems_table = new hash_table<st_expr_hasher> (13);
665 last_set_in = XCNEWVEC (int, max_gcse_regno);
666 already_set = XNEWVEC (int, max_gcse_regno);
668 /* Find all the stores we care about. */
669 FOR_EACH_BB_FN (bb, cfun)
671 /* First compute the registers set in this block. */
672 FOR_BB_INSNS (bb, insn)
675 if (! NONDEBUG_INSN_P (insn))
676 continue;
678 FOR_EACH_INSN_DEF (def, insn)
679 last_set_in[DF_REF_REGNO (def)] = INSN_UID (insn);
682 /* Now find the stores. */
683 memset (already_set, 0, sizeof (int) * max_gcse_regno);
684 FOR_BB_INSNS (bb, insn)
686 if (! NONDEBUG_INSN_P (insn))
687 continue;
689 FOR_EACH_INSN_DEF (def, insn)
690 already_set[DF_REF_REGNO (def)] = INSN_UID (insn);
692 /* Now that we've marked regs, look for stores. */
693 find_moveable_store (insn, already_set, last_set_in);
695 /* Unmark regs that are no longer set. */
696 FOR_EACH_INSN_DEF (def, insn)
697 if (last_set_in[DF_REF_REGNO (def)] == INSN_UID (insn))
698 last_set_in[DF_REF_REGNO (def)] = 0;
701 #ifdef ENABLE_CHECKING
702 /* last_set_in should now be all-zero. */
703 for (regno = 0; regno < max_gcse_regno; regno++)
704 gcc_assert (!last_set_in[regno]);
705 #endif
707 /* Clear temporary marks. */
708 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
710 LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
711 if (ptr->antic_stores
712 && (tmp = ptr->antic_stores->insn ()) == NULL_RTX)
713 ptr->antic_stores = ptr->antic_stores->next ();
717 /* Remove the stores that are not available anywhere, as there will
718 be no opportunity to optimize them. */
719 for (ptr = store_motion_mems, prev_next_ptr_ptr = &store_motion_mems;
720 ptr != NULL;
721 ptr = *prev_next_ptr_ptr)
723 if (! ptr->avail_stores)
725 *prev_next_ptr_ptr = ptr->next;
726 store_motion_mems_table->remove_elt_with_hash (ptr, ptr->hash_index);
727 free_st_expr_entry (ptr);
729 else
730 prev_next_ptr_ptr = &ptr->next;
733 ret = enumerate_store_motion_mems ();
735 if (dump_file)
736 print_store_motion_mems (dump_file);
738 free (last_set_in);
739 free (already_set);
740 return ret;
743 /* In all code following after this, REACHING_REG has its original
744 meaning again. Avoid confusion, and undef the accessor macro for
745 the temporary marks usage in compute_store_table. */
746 #undef LAST_AVAIL_CHECK_FAILURE
748 /* Insert an instruction at the beginning of a basic block, and update
749 the BB_HEAD if needed. */
751 static void
752 insert_insn_start_basic_block (rtx_insn *insn, basic_block bb)
754 /* Insert at start of successor block. */
755 rtx_insn *prev = PREV_INSN (BB_HEAD (bb));
756 rtx_insn *before = BB_HEAD (bb);
757 while (before != 0)
759 if (! LABEL_P (before)
760 && !NOTE_INSN_BASIC_BLOCK_P (before))
761 break;
762 prev = before;
763 if (prev == BB_END (bb))
764 break;
765 before = NEXT_INSN (before);
768 insn = emit_insn_after_noloc (insn, prev, bb);
770 if (dump_file)
772 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
773 bb->index);
774 print_inline_rtx (dump_file, insn, 6);
775 fprintf (dump_file, "\n");
779 /* This routine will insert a store on an edge. EXPR is the st_expr entry for
780 the memory reference, and E is the edge to insert it on. Returns nonzero
781 if an edge insertion was performed. */
783 static int
784 insert_store (struct st_expr * expr, edge e)
786 rtx reg;
787 rtx_insn *insn;
788 basic_block bb;
789 edge tmp;
790 edge_iterator ei;
792 /* We did all the deleted before this insert, so if we didn't delete a
793 store, then we haven't set the reaching reg yet either. */
794 if (expr->reaching_reg == NULL_RTX)
795 return 0;
797 if (e->flags & EDGE_FAKE)
798 return 0;
800 reg = expr->reaching_reg;
801 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
803 /* If we are inserting this expression on ALL predecessor edges of a BB,
804 insert it at the start of the BB, and reset the insert bits on the other
805 edges so we don't try to insert it on the other edges. */
806 bb = e->dest;
807 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
808 if (!(tmp->flags & EDGE_FAKE))
810 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
812 gcc_assert (index != EDGE_INDEX_NO_EDGE);
813 if (! bitmap_bit_p (st_insert_map[index], expr->index))
814 break;
817 /* If tmp is NULL, we found an insertion on every edge, blank the
818 insertion vector for these edges, and insert at the start of the BB. */
819 if (!tmp && bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
821 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
823 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
824 bitmap_clear_bit (st_insert_map[index], expr->index);
826 insert_insn_start_basic_block (insn, bb);
827 return 0;
830 /* We can't put stores in the front of blocks pointed to by abnormal
831 edges since that may put a store where one didn't used to be. */
832 gcc_assert (!(e->flags & EDGE_ABNORMAL));
834 insert_insn_on_edge (insn, e);
836 if (dump_file)
838 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
839 e->src->index, e->dest->index);
840 print_inline_rtx (dump_file, insn, 6);
841 fprintf (dump_file, "\n");
844 return 1;
847 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
848 memory location in SMEXPR set in basic block BB.
850 This could be rather expensive. */
852 static void
853 remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
855 edge_iterator *stack, ei;
856 int sp;
857 edge act;
858 sbitmap visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
859 rtx last, note;
860 rtx_insn *insn;
861 rtx mem = smexpr->pattern;
863 stack = XNEWVEC (edge_iterator, n_basic_blocks_for_fn (cfun));
864 sp = 0;
865 ei = ei_start (bb->succs);
867 bitmap_clear (visited);
869 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
870 while (1)
872 if (!act)
874 if (!sp)
876 free (stack);
877 sbitmap_free (visited);
878 return;
880 act = ei_edge (stack[--sp]);
882 bb = act->dest;
884 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
885 || bitmap_bit_p (visited, bb->index))
887 if (!ei_end_p (ei))
888 ei_next (&ei);
889 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
890 continue;
892 bitmap_set_bit (visited, bb->index);
894 if (bitmap_bit_p (st_antloc[bb->index], smexpr->index))
896 for (last = smexpr->antic_stores;
897 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
898 last = XEXP (last, 1))
899 continue;
900 last = XEXP (last, 0);
902 else
903 last = NEXT_INSN (BB_END (bb));
905 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
906 if (NONDEBUG_INSN_P (insn))
908 note = find_reg_equal_equiv_note (insn);
909 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
910 continue;
912 if (dump_file)
913 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
914 INSN_UID (insn));
915 remove_note (insn, note);
918 if (!ei_end_p (ei))
919 ei_next (&ei);
920 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
922 if (EDGE_COUNT (bb->succs) > 0)
924 if (act)
925 stack[sp++] = ei;
926 ei = ei_start (bb->succs);
927 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
932 /* This routine will replace a store with a SET to a specified register. */
934 static void
935 replace_store_insn (rtx reg, rtx_insn *del, basic_block bb,
936 struct st_expr *smexpr)
938 rtx_insn *insn;
939 rtx mem, note, set, ptr;
941 mem = smexpr->pattern;
942 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
944 for (ptr = smexpr->antic_stores; ptr; ptr = XEXP (ptr, 1))
945 if (XEXP (ptr, 0) == del)
947 XEXP (ptr, 0) = insn;
948 break;
951 /* Move the notes from the deleted insn to its replacement. */
952 REG_NOTES (insn) = REG_NOTES (del);
954 /* Emit the insn AFTER all the notes are transferred.
955 This is cheaper since we avoid df rescanning for the note change. */
956 insn = emit_insn_after (insn, del);
958 if (dump_file)
960 fprintf (dump_file,
961 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
962 print_inline_rtx (dump_file, del, 6);
963 fprintf (dump_file, "\nSTORE_MOTION replaced with insn:\n ");
964 print_inline_rtx (dump_file, insn, 6);
965 fprintf (dump_file, "\n");
968 delete_insn (del);
970 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
971 they are no longer accurate provided that they are reached by this
972 definition, so drop them. */
973 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
974 if (NONDEBUG_INSN_P (insn))
976 set = single_set (insn);
977 if (!set)
978 continue;
979 if (exp_equiv_p (SET_DEST (set), mem, 0, true))
980 return;
981 note = find_reg_equal_equiv_note (insn);
982 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
983 continue;
985 if (dump_file)
986 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
987 INSN_UID (insn));
988 remove_note (insn, note);
990 remove_reachable_equiv_notes (bb, smexpr);
994 /* Delete a store, but copy the value that would have been stored into
995 the reaching_reg for later storing. */
997 static void
998 delete_store (struct st_expr * expr, basic_block bb)
1000 rtx reg;
1002 if (expr->reaching_reg == NULL_RTX)
1003 expr->reaching_reg = gen_reg_rtx_and_attrs (expr->pattern);
1005 reg = expr->reaching_reg;
1007 for (rtx_insn_list *i = expr->avail_stores; i; i = i->next ())
1009 rtx_insn *del = i->insn ();
1010 if (BLOCK_FOR_INSN (del) == bb)
1012 /* We know there is only one since we deleted redundant
1013 ones during the available computation. */
1014 replace_store_insn (reg, del, bb, expr);
1015 break;
1020 /* Fill in available, anticipatable, transparent and kill vectors in
1021 STORE_DATA, based on lists of available and anticipatable stores. */
1022 static void
1023 build_store_vectors (void)
1025 basic_block bb;
1026 int *regs_set_in_block;
1027 rtx_insn *insn;
1028 rtx_insn_list *st;
1029 struct st_expr * ptr;
1030 unsigned int max_gcse_regno = max_reg_num ();
1032 /* Build the gen_vector. This is any store in the table which is not killed
1033 by aliasing later in its block. */
1034 st_avloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1035 num_stores);
1036 bitmap_vector_clear (st_avloc, last_basic_block_for_fn (cfun));
1038 st_antloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1039 num_stores);
1040 bitmap_vector_clear (st_antloc, last_basic_block_for_fn (cfun));
1042 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1044 for (st = ptr->avail_stores; st != NULL; st = st->next ())
1046 insn = st->insn ();
1047 bb = BLOCK_FOR_INSN (insn);
1049 /* If we've already seen an available expression in this block,
1050 we can delete this one (It occurs earlier in the block). We'll
1051 copy the SRC expression to an unused register in case there
1052 are any side effects. */
1053 if (bitmap_bit_p (st_avloc[bb->index], ptr->index))
1055 rtx r = gen_reg_rtx_and_attrs (ptr->pattern);
1056 if (dump_file)
1057 fprintf (dump_file, "Removing redundant store:\n");
1058 replace_store_insn (r, st->insn (), bb, ptr);
1059 continue;
1061 bitmap_set_bit (st_avloc[bb->index], ptr->index);
1064 for (st = ptr->antic_stores; st != NULL; st = st->next ())
1066 insn = st->insn ();
1067 bb = BLOCK_FOR_INSN (insn);
1068 bitmap_set_bit (st_antloc[bb->index], ptr->index);
1072 st_kill = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1073 bitmap_vector_clear (st_kill, last_basic_block_for_fn (cfun));
1075 st_transp = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1076 bitmap_vector_clear (st_transp, last_basic_block_for_fn (cfun));
1077 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
1079 FOR_EACH_BB_FN (bb, cfun)
1081 memset (regs_set_in_block, 0, sizeof (int) * max_gcse_regno);
1083 FOR_BB_INSNS (bb, insn)
1084 if (NONDEBUG_INSN_P (insn))
1086 df_ref def;
1087 FOR_EACH_INSN_DEF (def, insn)
1089 unsigned int ref_regno = DF_REF_REGNO (def);
1090 if (ref_regno < max_gcse_regno)
1091 regs_set_in_block[DF_REF_REGNO (def)] = 1;
1095 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1097 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
1098 bb, regs_set_in_block, NULL))
1100 /* It should not be necessary to consider the expression
1101 killed if it is both anticipatable and available. */
1102 if (!bitmap_bit_p (st_antloc[bb->index], ptr->index)
1103 || !bitmap_bit_p (st_avloc[bb->index], ptr->index))
1104 bitmap_set_bit (st_kill[bb->index], ptr->index);
1106 else
1107 bitmap_set_bit (st_transp[bb->index], ptr->index);
1111 free (regs_set_in_block);
1113 if (dump_file)
1115 dump_bitmap_vector (dump_file, "st_antloc", "", st_antloc,
1116 last_basic_block_for_fn (cfun));
1117 dump_bitmap_vector (dump_file, "st_kill", "", st_kill,
1118 last_basic_block_for_fn (cfun));
1119 dump_bitmap_vector (dump_file, "st_transp", "", st_transp,
1120 last_basic_block_for_fn (cfun));
1121 dump_bitmap_vector (dump_file, "st_avloc", "", st_avloc,
1122 last_basic_block_for_fn (cfun));
1126 /* Free memory used by store motion. */
1128 static void
1129 free_store_memory (void)
1131 free_store_motion_mems ();
1133 if (st_avloc)
1134 sbitmap_vector_free (st_avloc);
1135 if (st_kill)
1136 sbitmap_vector_free (st_kill);
1137 if (st_transp)
1138 sbitmap_vector_free (st_transp);
1139 if (st_antloc)
1140 sbitmap_vector_free (st_antloc);
1141 if (st_insert_map)
1142 sbitmap_vector_free (st_insert_map);
1143 if (st_delete_map)
1144 sbitmap_vector_free (st_delete_map);
1146 st_avloc = st_kill = st_transp = st_antloc = NULL;
1147 st_insert_map = st_delete_map = NULL;
1150 /* Perform store motion. Much like gcse, except we move expressions the
1151 other way by looking at the flowgraph in reverse.
1152 Return non-zero if transformations are performed by the pass. */
1154 static int
1155 one_store_motion_pass (void)
1157 basic_block bb;
1158 int x;
1159 struct st_expr * ptr;
1160 int did_edge_inserts = 0;
1161 int n_stores_deleted = 0;
1162 int n_stores_created = 0;
1164 init_alias_analysis ();
1166 /* Find all the available and anticipatable stores. */
1167 num_stores = compute_store_table ();
1168 if (num_stores == 0)
1170 delete store_motion_mems_table;
1171 store_motion_mems_table = NULL;
1172 end_alias_analysis ();
1173 return 0;
1176 /* Now compute kill & transp vectors. */
1177 build_store_vectors ();
1178 add_noreturn_fake_exit_edges ();
1179 connect_infinite_loops_to_exit ();
1181 edge_list = pre_edge_rev_lcm (num_stores, st_transp, st_avloc,
1182 st_antloc, st_kill, &st_insert_map,
1183 &st_delete_map);
1185 /* Now we want to insert the new stores which are going to be needed. */
1186 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1188 /* If any of the edges we have above are abnormal, we can't move this
1189 store. */
1190 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
1191 if (bitmap_bit_p (st_insert_map[x], ptr->index)
1192 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
1193 break;
1195 if (x >= 0)
1197 if (dump_file != NULL)
1198 fprintf (dump_file,
1199 "Can't replace store %d: abnormal edge from %d to %d\n",
1200 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
1201 INDEX_EDGE (edge_list, x)->dest->index);
1202 continue;
1205 /* Now we want to insert the new stores which are going to be needed. */
1207 FOR_EACH_BB_FN (bb, cfun)
1208 if (bitmap_bit_p (st_delete_map[bb->index], ptr->index))
1210 delete_store (ptr, bb);
1211 n_stores_deleted++;
1214 for (x = 0; x < NUM_EDGES (edge_list); x++)
1215 if (bitmap_bit_p (st_insert_map[x], ptr->index))
1217 did_edge_inserts |= insert_store (ptr, INDEX_EDGE (edge_list, x));
1218 n_stores_created++;
1222 if (did_edge_inserts)
1223 commit_edge_insertions ();
1225 free_store_memory ();
1226 free_edge_list (edge_list);
1227 remove_fake_exit_edges ();
1228 end_alias_analysis ();
1230 if (dump_file)
1232 fprintf (dump_file, "STORE_MOTION of %s, %d basic blocks, ",
1233 current_function_name (), n_basic_blocks_for_fn (cfun));
1234 fprintf (dump_file, "%d insns deleted, %d insns created\n",
1235 n_stores_deleted, n_stores_created);
1238 return (n_stores_deleted > 0 || n_stores_created > 0);
1242 static unsigned int
1243 execute_rtl_store_motion (void)
1245 delete_unreachable_blocks ();
1246 df_analyze ();
1247 flag_rerun_cse_after_global_opts |= one_store_motion_pass ();
1248 return 0;
1251 namespace {
1253 const pass_data pass_data_rtl_store_motion =
1255 RTL_PASS, /* type */
1256 "store_motion", /* name */
1257 OPTGROUP_NONE, /* optinfo_flags */
1258 TV_LSM, /* tv_id */
1259 PROP_cfglayout, /* properties_required */
1260 0, /* properties_provided */
1261 0, /* properties_destroyed */
1262 0, /* todo_flags_start */
1263 TODO_df_finish, /* todo_flags_finish */
1266 class pass_rtl_store_motion : public rtl_opt_pass
1268 public:
1269 pass_rtl_store_motion (gcc::context *ctxt)
1270 : rtl_opt_pass (pass_data_rtl_store_motion, ctxt)
1273 /* opt_pass methods: */
1274 virtual bool gate (function *);
1275 virtual unsigned int execute (function *)
1277 return execute_rtl_store_motion ();
1280 }; // class pass_rtl_store_motion
1282 bool
1283 pass_rtl_store_motion::gate (function *fun)
1285 return optimize > 0 && flag_gcse_sm
1286 && !fun->calls_setjmp
1287 && optimize_function_for_speed_p (fun)
1288 && dbg_cnt (store_motion);
1291 } // anon namespace
1293 rtl_opt_pass *
1294 make_pass_rtl_store_motion (gcc::context *ctxt)
1296 return new pass_rtl_store_motion (ctxt);