gcc-4_9-branch/gcc/ChangeLog.linaro

   1 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
   2
   3         Backport from trunk r209794.
   4         2014-04-25  Marek Polacek  <polacek@redhat.com>
   5
   6         PR c/60114
   7         * c-parser.c (c_parser_initelt): Pass input_location to
   8         process_init_element.
   9         (c_parser_initval): Pass loc to process_init_element.
  10         * c-tree.h (process_init_element): Adjust declaration.
  11         * c-typeck.c (push_init_level): Pass input_location to
  12         process_init_element.
  13         (pop_init_level): Likewise.
  14         (set_designator): Likewise.
  15         (output_init_element): Add location_t parameter.  Pass loc to
  16         digest_init.
  17         (output_pending_init_elements): Pass input_location to
  18         output_init_element.
  19         (process_init_element): Add location_t parameter.  Pass loc to
  20         output_init_element.
  21
  22 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  23
  24         Backport from trunk r211771.
  25         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  26
  27         * genattrtab.c (n_bypassed): New variable.
  28         (process_bypasses): Initialise n_bypassed.
  29         Count number of bypassed reservations.
  30         (make_automaton_attrs): Allocate space for bypassed reservations
  31         rather than number of bypasses.
  32
  33 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  34
  35         Backport from trunk r210861.
  36         2014-05-23  Jiong Wang   <jiong.wang@arm.com>
  37
  38         * config/aarch64/predicates.md (aarch64_call_insn_operand): New
  39         predicate.
  40         * config/aarch64/constraints.md ("Ucs", "Usf"):  New constraints.
  41         * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
  42         Adjust for tailcalling through registers.
  43         * config/aarch64/aarch64.h (enum reg_class): New caller save
  44         register class.
  45         (REG_CLASS_NAMES): Likewise.
  46         (REG_CLASS_CONTENTS): Likewise.
  47         * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
  48         Allow tailcalling without decls.
  49
  50 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  51
  52         Backport from trunk r211314.
  53         2014-06-06  James Greenhalgh  <james.greenhalgh@arm.com>
  54
  55         * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
  56         * config/aarch64/aarch64.c (aarch64_move_pointer): New.
  57         (aarch64_progress_pointer): Likewise.
  58         (aarch64_copy_one_part_and_move_pointers): Likewise.
  59         (aarch64_expand_movmen): Likewise.
  60         * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
  61         * config/aarch64/aarch64.md (movmem<mode>): New.
  62
  63 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
  64
  65         Backport from trunk r211185, 211186.
  66         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
  67
  68         * gcc/config/aarch64/aarch64-builtins.c
  69         (aarch64_types_binop_uus_qualifiers,
  70         aarch64_types_shift_to_unsigned_qualifiers,
  71         aarch64_types_unsigned_shiftacc_qualifiers): Define.
  72         * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
  73         uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
  74         sqshlu_n, uqshl_n): Update qualifiers.
  75         * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
  76         vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
  77         vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
  78         vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
  79         vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
  80         vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
  81         vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
  82         vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
  83         vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
  84         vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
  85         vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
  86         vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
  87         vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
  88         vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
  89         vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
  90         vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
  91         vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
  92         vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
  93         vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
  94         vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
  95         vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
  96         vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
  97         vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
  98         vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
  99         vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
 100         vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
 101         vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
 102
 103         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 104
 105         * gcc/config/aarch64/aarch64-builtins.c
 106         (aarch64_types_binop_ssu_qualifiers): New static data.
 107         (TYPES_BINOP_SSU): Define.
 108         * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
 109         urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
 110         * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
 111         vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
 112         vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
 113         vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
 114         vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32,    52
 115         vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64,  53
 116         vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
 117         suffix to builtin function name, remove cast.   55
 118         (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
 119         vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8,  57
 120         vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
 121
 122 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 123
 124         Backport from trunk r211408, 211416.
 125         2014-06-10  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 126
 127         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
 128         REG_CFA_RESTORE mode.
 129
 130         2014-06-10  Jiong Wang  <jiong.wang@arm.com>
 131
 132         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
 133         (aarch64_save_or_restore_callee_save_registers): Fix layout.
 134
 135 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 136
 137         Backport from trunk r211418.
 138         2014-06-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 139
 140         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
 141         Change second alternative type to f_mcr.
 142         * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
 143         and 12th alternatives' types to f_mcr and f_mrc.
 144         (*movdi_aarch64): Same for 12th and 13th alternatives.
 145         (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
 146         (aarch64_movtilow_tilow): Change type to fmov.
 147
 148 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 149
 150         Backport from trunk r211371.
 151         2014-06-09  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 152
 153         * config/arm/arm-modes.def: Remove XFmode.
 154
 155 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 156
 157         Backport from trunk r211268.
 158         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 159
 160         * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
 161         layout comment.
 162
 163 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 164
 165         Backport from trunk r211129.
 166         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 167
 168         PR target/61154
 169         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
 170         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
 171         with immediate_operand.
 172
 173 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 174
 175         Backport from trunk r211073.
 176         2014-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 177
 178         * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
 179         to mov_imm.
 180         * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
 181
 182 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 183
 184         Backport from trunk r211050.
 185         2014-05-29  Richard Earnshaw <rearnsha@arm.com>
 186         Richard Sandiford  <rdsandiford@googlemail.com>
 187
 188         * arm/iterators.md (shiftable_ops): New code iterator.
 189         (t2_binop0, arith_shift_insn): New code attributes.
 190         * arm/predicates.md (shift_nomul_operator): New predicate.
 191         * arm/arm.md (insn_enabled): Delete.
 192         (enabled): Remove insn_enabled test.
 193         (*arith_shiftsi): Delete.  Replace with ...
 194         (*<arith_shift_insn>_multsi): ... new pattern.
 195         (*<arith_shift_insn>_shiftsi): ... new pattern.
 196         * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
 197
 198 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 199
 200         Backport from trunk r210996.
 201         2014-05-27  Andrew Pinski  <apinski@cavium.com>
 202
 203         * config/aarch64/aarch64.md (stack_protect_set_<mode>):
 204         Use <w> for the register in assembly template.
 205         (stack_protect_test): Use the mode of operands[0] for the
 206         result.
 207         (stack_protect_test_<mode>): Use <w> for the register
 208         in assembly template.
 209
 210 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 211
 212         Backport from trunk r210967.
 213         2014-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 214
 215         * config/arm/neon.md (neon_bswap<mode>): New pattern.
 216         * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
 217         (arm_init_neon_builtins): Handle NEON_BSWAP.
 218         Define required type nodes.
 219         (arm_expand_neon_builtin): Handle NEON_BSWAP.
 220         (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
 221         * config/arm/arm_neon_builtins.def (bswap): Define builtins.
 222         * config/arm/iterators.md (VDQHSD): New mode iterator.
 223
 224 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 225
 226         Backport from trunk r210471.
 227         2014-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 228
 229         * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
 230         enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
 231
 232 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 233
 234         Backport from trunk r210369.
 235         2014-05-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 236
 237         * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
 238         (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
 239         Remove associated type declarations and initialisations.
 240         (arm_expand_neon_builtin): Likewise.
 241         (neon_emit_pair_result_insn): Delete.
 242         * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
 243         * config/arm/neon.md (neon_vtrn<mode>): Delete.
 244         (neon_vzip<mode>): Likewise.
 245         (neon_vuzp<mode>): Likewise.
 246
 247 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 248
 249         Backport from trunk r211058, 211177.
 250         2014-05-29  Alan Lawrence  <alan.lawrence@arm.com>
 251
 252         * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
 253         TYPES_BINOPV): New static data.
 254         * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
 255         * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
 256         New patterns.
 257         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
 258         patterns for EXT.
 259         (aarch64_evpc_ext): New function.
 260
 261         * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
 262
 263         * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
 264         vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
 265         vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
 266         vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
 267         vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
 268
 269         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 270
 271         * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
 272         location == 0.
 273
 274 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 275
 276         Backport from trunk r209797.
 277         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 278
 279         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
 280         Use HOST_WIDE_INT_C for mask literal.
 281         (aarch_rev16_shleft_mask_imm_p): Likewise.
 282
 283 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 284
 285         Backport from trunk r211148.
 286         2014-06-02  Andrew Pinski  <apinski@cavium.com>
 287
 288         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
 289         /lib/ld-linux32-aarch64.so.1 is used for ILP32.
 290         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
 291         file whose name depends on -mabi= and -mbig-endian.
 292         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
 293         better and handle ilp32 too.
 294         (MULTILIB_OPTIONS): Delete.
 295         (MULTILIB_DIRNAMES): Delete.
 296
 297 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 298
 299         Backport from trunk r210828, r211103.
 300         2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>
 301
 302         * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
 303         (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
 304         (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
 305         and __builtins_arm_get_fpscr.
 306         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
 307         __builtins_arm_get_fpscr.
 308         (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
 309         __builtins_arm_ldfpscr.
 310         (arm_atomic_assign_expand_fenv): New function.
 311         * config/arm/vfp.md (set_fpscr): New pattern.
 312         (get_fpscr) : Likewise.
 313         * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
 314         VUNSPEC_SET_FPSCR.
 315         * doc/extend.texi (AARCH64 Built-in Functions) : Document
 316         __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
 317
 318         2014-05-23  Kugan Vivekanandarajah  <kuganv@linaro.org>
 319
 320         * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
 321         define.
 322         * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
 323         New function declaration.
 324         * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
 325         AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
 326         AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
 327         (aarch64_init_builtins) : Initialize builtins
 328         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
 329         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
 330         (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
 331         __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
 332         and __builtins_aarch64_set_fpsr.
 333         (aarch64_atomic_assign_expand_fenv): New function.
 334         * config/aarch64/aarch64.md (set_fpcr): New pattern.
 335         (get_fpcr) : Likewise.
 336         (set_fpsr) : Likewise.
 337         (get_fpsr) : Likewise.
 338         (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
 339          and UNSPECV_SET_FPSR.
 340         * doc/extend.texi (AARCH64 Built-in Functions) : Document
 341         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
 342         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
 343
 344 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 345
 346         Backport from trunk r210355.
 347         2014-05-13  Ian Bolton  <ian.bolton@arm.com>
 348
 349         * config/aarch64/aarch64-protos.h
 350         (aarch64_hard_regno_caller_save_mode): New prototype.
 351         * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
 352         New function.
 353         * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
 354
 355 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 356
 357         Backport from trunk r209943.
 358         2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>
 359
 360         * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
 361         vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
 362         vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
 363         vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
 364         vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
 365         vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
 366         vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
 367         vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
 368
 369 2014-06-26  Yvan Roux  <yvan.roux@linaro.org>
 370
 371         * LINARO-VERSION: Bump version.
 372
 373 2014-06-25  Yvan Roux  <yvan.roux@linaro.org>
 374
 375         GCC Linaro 4.9-2014.06-1 released.
 376         * LINARO-VERSION: Update.
 377
 378 2014-06-24  Yvan Roux  <yvan.roux@linaro.org>
 379
 380         Revert:
 381         2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 382
 383         Backport from trunk r209643.
 384         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 385
 386         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
 387
 388 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
 389
 390         Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
 391         210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
 392         210508, 210509, 210510, 210512, 211205, 211206.
 393         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 394
 395         * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
 396         (cpu_addrcost_table): Use it.
 397         * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
 398         (aarch64_address_cost): Rewrite using aarch64_classify_address,
 399         move it.
 400
 401         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 402
 403         * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
 404         (cortexa57_vector_cost): Likewise.
 405         (cortexa57_tunings): Use them.
 406
 407         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 408
 409         * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
 410         (TARGET_RTX_COSTS): Call it.
 411
 412         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 413                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 414
 415         * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
 416         emit instructions, return number of instructions which would
 417         be emitted.
 418         (aarch64_add_constant): Update call to aarch64_build_constant.
 419         (aarch64_output_mi_thunk): Likewise.
 420         (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
 421         a CONST_DOUBLE.
 422
 423         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 424                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 425
 426         * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
 427         to...
 428         (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
 429         well formed.
 430         (aarch64_rtx_mult_cost): New.
 431         (aarch64_rtx_costs): Use it, refactor as appropriate.
 432
 433         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 434
 435         * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
 436
 437         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 438                     Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
 439
 440         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
 441         for SET RTX.
 442
 443         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 444                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 445
 446         * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
 447         costs when costing loads and stores to memory.
 448
 449         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 450                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 451
 452         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
 453         logical operations.
 454
 455         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 456                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 457
 458         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
 459         ZERO_EXTEND and SIGN_EXTEND better.
 460
 461         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 462                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 463
 464         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
 465         rotates and shifts.
 466
 467         2014-03-16  James Greenhalgh  <james.greenhalgh@arm.com>
 468                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 469
 470         * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
 471         (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
 472
 473         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 474                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 475
 476         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
 477         DIV/MOD.
 478
 479         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 480                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 481
 482         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
 483         operators.
 484
 485         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 486                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 487
 488         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
 489         FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
 490
 491         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 492                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 493
 494         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
 495
 496         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 497
 498         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
 499         HIGH, LO_SUM.
 500
 501         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 502
 503         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
 504         where we were unable to cost an RTX.
 505
 506         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 507
 508         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
 509
 510         2014-06-03  Andrew Pinski  <apinski@cavium.com>
 511
 512         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
 513         (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
 514
 515         2014-06-03  Andrew Pinski  <apinski@cavium.com>
 516
 517         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
 518         comparisons for OP0.
 519
 520 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
 521
 522         * LINARO-VERSION: Bump version.
 523
 524 2014-06-12  Yvan Roux  <yvan.roux@linaro.org>
 525
 526         GCC Linaro 4.9-2014.06 released.
 527         * LINARO-VERSION: Update.
 528
 529 2014-06-04  Yvan Roux  <yvan.roux@linaro.org>
 530
 531         Backport from trunk r211211.
 532         2014-06-04  Bin Cheng  <bin.cheng@arm.com>
 533
 534         * config/aarch64/aarch64.c (aarch64_classify_address)
 535         (aarch64_legitimize_reload_address): Support full addressing modes
 536         for vector modes.
 537         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
 538         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
 539
 540 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 541
 542         Backport from trunk r209906.
 543         2014-04-29  Alan Lawrence  <alan.lawrence@arm.com>
 544
 545         * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
 546         vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
 547         vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
 548         vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
 549         vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
 550         vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
 551         vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
 552         vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
 553
 554 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 555
 556         Backport from trunk r209897.
 557         2014-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
 558
 559         * calls.c (initialize_argument_information): Always treat
 560         PUSH_ARGS_REVERSED as 1, simplify code accordingly.
 561         (expand_call): Likewise.
 562         (emit_library_call_calue_1): Likewise.
 563         * expr.c (PUSH_ARGS_REVERSED): Do not define.
 564         (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
 565         code accordingly.
 566
 567 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 568
 569         Backport from trunk r209880.
 570         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
 571
 572         * config/aarch64/aarch64-builtins.c
 573         (aarch64_types_storestruct_lane_qualifiers): New.
 574         (TYPES_STORESTRUCT_LANE): Likewise.
 575         * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
 576         (st3_lane): Likewise.
 577         (st4_lane): Likewise.
 578         * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
 579         (vec_store_lanesci_lane<mode>): Likewise.
 580         (vec_store_lanesxi_lane<mode>): Likewise.
 581                 (aarch64_st2_lane<VQ:mode>): Likewise.
 582         (aarch64_st3_lane<VQ:mode>): Likewise.
 583         (aarch64_st4_lane<VQ:mode>): Likewise.
 584         * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
 585         * config/aarch64/arm_neon.h
 586                 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
 587         use new macro arguments.
 588         (__ST3_LANE_FUNC): Likewise.
 589         (__ST4_LANE_FUNC): Likewise.
 590         * config/aarch64/iterators.md (V_TWO_ELEM): New.
 591         (V_THREE_ELEM): Likewise.
 592         (V_FOUR_ELEM): Likewise.
 593
 594 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 595
 596         Backport from trunk r209878.
 597         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
 598
 599         * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
 600         * config/aarch64/aarch64.c
 601         (aarch64_cannot_change_mode_class): Weaken conditions.
 602         (aarch64_modes_tieable_p): New.
 603         * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
 604
 605 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 606
 607         Backport from trunk r209808.
 608         2014-04-25  Jiong Wang  <jiong.wang@arm.com>
 609
 610         * config/arm/predicates.md (call_insn_operand): Add long_call check.
 611         * config/arm/arm.md (sibcall, sibcall_value): Force the address to
 612         reg for long_call.
 613         * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
 614         restriction.
 615
 616 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 617
 618         Backport from trunk r209806.
 619         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 620
 621         * config/arm/arm.c (arm_cortex_a8_tune): Initialise
 622         T16-related fields.
 623
 624 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
 625
 626         Backport from trunk r209742, 209749.
 627         2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
 628
 629         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
 630
 631         2014-04-24  Tejas Belagod  <tejas.belagod@arm.com>
 632
 633         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
 634         for big-endian.
 635
 636 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 637
 638         Backport from trunk r209736.
 639         2014-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 640
 641         * config/aarch64/aarch64-builtins.c
 642         (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
 643         BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
 644         * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
 645         * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
 646         builtins.
 647         * config/aarch64/iterator.md (VDQHSD): New mode iterator.
 648         (Vrevsuff): New mode attribute.
 649
 650 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 651
 652         Backport from trunk r209712.
 653         2014-04-23 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
 654
 655         * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
 656         (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
 657         machine descriptions for Stack Smashing Protector.
 658
 659 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 660
 661         Backport from trunk r209711.
 662         2014-04-23  Richard Earnshaw  <rearnsha@arm.com>
 663
 664         * aarch64.md (<optab>_rol<mode>3): New pattern.
 665         (<optab>_rolsi3_uxtw): Likewise.
 666         * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
 667
 668 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 669
 670         Backport from trunk r209710.
 671         2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
 672
 673         * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
 674         (arm_cortex_a12_tune): Likewise.
 675
 676 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 677
 678         Backport from trunk r209706.
 679         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 680
 681         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
 682
 683 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 684
 685         Backport from trunk r209701, 209702, 209703, 209704, 209705.
 686         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 687
 688         * config/arm/arm.md (arm_rev16si2): New pattern.
 689         (arm_rev16si2_alt): Likewise.
 690         * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
 691
 692         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 693         * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
 694         (rev16<mode>2_alt): Likewise.
 695         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
 696         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
 697         (aarch_rev16_shleft_mask_imm_p): Likewise.
 698         (aarch_rev16_p_1): Likewise.
 699         (aarch_rev16_p): Likewise.
 700         * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
 701         (aarch_rev16_shright_mask_imm_p): Likewise.
 702         (aarch_rev16_shleft_mask_imm_p): Likewise.
 703
 704         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 705
 706         * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
 707         * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
 708         rev cost.
 709         (cortex_a53_extra_costs): Likewise.
 710         (cortex_a57_extra_costs): Likewise.
 711         * config/arm/arm.c (cortexa9_extra_costs): Likewise.
 712         (cortexa7_extra_costs): Likewise.
 713         (cortexa8_extra_costs): Likewise.
 714         (cortexa12_extra_costs): Likewise.
 715         (cortexa15_extra_costs): Likewise.
 716         (v7m_extra_costs): Likewise.
 717         (arm_new_rtx_costs): Handle BSWAP.
 718
 719         2013-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 720
 721         * config/arm/arm.c (cortexa8_extra_costs): New table.
 722         (arm_cortex_a8_tune): New tuning struct.
 723         * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
 724
 725         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 726
 727         * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
 728
 729 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 730
 731         Backport from trunk r209659.
 732         2014-04-22  Richard Henderson  <rth@redhat.com>
 733
 734         * config/aarch64/aarch64 (addti3, subti3): New expanders.
 735         (add<GPI>3_compare0): Remove leading * from name.
 736         (add<GPI>3_carryin): Likewise.
 737         (sub<GPI>3_compare0): Likewise.
 738         (sub<GPI>3_carryin): Likewise.
 739         (<su_optab>mulditi3): New expander.
 740         (multi3): New expander.
 741         (madd<GPI>): Remove leading * from name.
 742
 743 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 744
 745         Backport from trunk r209645.
 746         2014-04-22  Andrew Pinski  <apinski@cavium.com>
 747
 748         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
 749         Handle TLS for ILP32.
 750         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
 751         (tlsie_small_<mode>): this and handle PTR.
 752         (tlsie_small_sidi): New pattern.
 753         (tlsle_small): Change to an expand to handle ILP32.
 754         (tlsle_small_<mode>): New pattern.
 755         (tlsdesc_small): Rename to ...
 756         (tlsdesc_small_<mode>): this and handle PTR.
 757
 758 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 759
 760         Backport from trunk r209643.
 761         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 762
 763         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
 764
 765 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 766
 767         Backport from trunk r209641, 209642.
 768         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
 769
 770         * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
 771         (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
 772         (aarch64_types_signed_poly_qualifiers): Likewise.
 773         (aarch64_types_unsigned_signed_qualifiers): Likewise.
 774         (aarch64_types_poly_signed_qualifiers): Likewise.
 775         (TYPES_REINTERP_SS): Type macro added.
 776         (TYPES_REINTERP_SU): Likewise.
 777         (TYPES_REINTERP_SP): Likewise.
 778         (TYPES_REINTERP_US): Likewise.
 779         (TYPES_REINTERP_PS): Likewise.
 780         (aarch64_fold_builtin): New expression folding added.
 781         * config/aarch64/aarch64-simd-builtins.def (REINTERP):
 782         Declarations removed.
 783         (REINTERP_SS): Declarations added.
 784         (REINTERP_US): Likewise.
 785         (REINTERP_PS): Likewise.
 786         (REINTERP_SU): Likewise.
 787         (REINTERP_SP): Likewise.
 788         * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
 789         (vreinterpretq_p8_f64): Likewise.
 790         (vreinterpret_p16_f64): Likewise.
 791         (vreinterpretq_p16_f64): Likewise.
 792         (vreinterpret_f32_f64): Likewise.
 793         (vreinterpretq_f32_f64): Likewise.
 794         (vreinterpret_f64_f32): Likewise.
 795         (vreinterpret_f64_p8): Likewise.
 796         (vreinterpret_f64_p16): Likewise.
 797         (vreinterpret_f64_s8): Likewise.
 798         (vreinterpret_f64_s16): Likewise.
 799         (vreinterpret_f64_s32): Likewise.
 800         (vreinterpret_f64_s64): Likewise.
 801         (vreinterpret_f64_u8): Likewise.
 802         (vreinterpret_f64_u16): Likewise.
 803         (vreinterpret_f64_u32): Likewise.
 804         (vreinterpret_f64_u64): Likewise.
 805         (vreinterpretq_f64_f32): Likewise.
 806         (vreinterpretq_f64_p8): Likewise.
 807         (vreinterpretq_f64_p16): Likewise.
 808         (vreinterpretq_f64_s8): Likewise.
 809         (vreinterpretq_f64_s16): Likewise.
 810         (vreinterpretq_f64_s32): Likewise.
 811         (vreinterpretq_f64_s64): Likewise.
 812         (vreinterpretq_f64_u8): Likewise.
 813         (vreinterpretq_f64_u16): Likewise.
 814         (vreinterpretq_f64_u32): Likewise.
 815         (vreinterpretq_f64_u64): Likewise.
 816         (vreinterpret_s64_f64): Likewise.
 817         (vreinterpretq_s64_f64): Likewise.
 818         (vreinterpret_u64_f64): Likewise.
 819         (vreinterpretq_u64_f64): Likewise.
 820         (vreinterpret_s8_f64): Likewise.
 821         (vreinterpretq_s8_f64): Likewise.
 822         (vreinterpret_s16_f64): Likewise.
 823         (vreinterpretq_s16_f64): Likewise.
 824         (vreinterpret_s32_f64): Likewise.
 825         (vreinterpretq_s32_f64): Likewise.
 826         (vreinterpret_u8_f64): Likewise.
 827         (vreinterpretq_u8_f64): Likewise.
 828         (vreinterpret_u16_f64): Likewise.
 829         (vreinterpretq_u16_f64): Likewise.
 830         (vreinterpret_u32_f64): Likewise.
 831         (vreinterpretq_u32_f64): Likewise.
 832
 833         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
 834
 835         * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
 836         * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
 837         (vreinterpret_p8_s8): Likewise.
 838         * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
 839         (vreinterpret_p8_s16): Likewise.
 840         (vreinterpret_p8_s32): Likewise.
 841         (vreinterpret_p8_s64): Likewise.
 842         (vreinterpret_p8_f32): Likewise.
 843         (vreinterpret_p8_u8): Likewise.
 844         (vreinterpret_p8_u16): Likewise.
 845         (vreinterpret_p8_u32): Likewise.
 846         (vreinterpret_p8_u64): Likewise.
 847         (vreinterpret_p8_p16): Likewise.
 848         (vreinterpretq_p8_s8): Likewise.
 849         (vreinterpretq_p8_s16): Likewise.
 850         (vreinterpretq_p8_s32): Likewise.
 851         (vreinterpretq_p8_s64): Likewise.
 852         (vreinterpretq_p8_f32): Likewise.
 853         (vreinterpretq_p8_u8): Likewise.
 854         (vreinterpretq_p8_u16): Likewise.
 855         (vreinterpretq_p8_u32): Likewise.
 856         (vreinterpretq_p8_u64): Likewise.
 857         (vreinterpretq_p8_p16): Likewise.
 858         (vreinterpret_p16_s8): Likewise.
 859         (vreinterpret_p16_s16): Likewise.
 860         (vreinterpret_p16_s32): Likewise.
 861         (vreinterpret_p16_s64): Likewise.
 862         (vreinterpret_p16_f32): Likewise.
 863         (vreinterpret_p16_u8): Likewise.
 864         (vreinterpret_p16_u16): Likewise.
 865         (vreinterpret_p16_u32): Likewise.
 866         (vreinterpret_p16_u64): Likewise.
 867         (vreinterpret_p16_p8): Likewise.
 868         (vreinterpretq_p16_s8): Likewise.
 869         (vreinterpretq_p16_s16): Likewise.
 870         (vreinterpretq_p16_s32): Likewise.
 871         (vreinterpretq_p16_s64): Likewise.
 872         (vreinterpretq_p16_f32): Likewise.
 873         (vreinterpretq_p16_u8): Likewise.
 874         (vreinterpretq_p16_u16): Likewise.
 875         (vreinterpretq_p16_u32): Likewise.
 876         (vreinterpretq_p16_u64): Likewise.
 877         (vreinterpretq_p16_p8): Likewise.
 878         (vreinterpret_f32_s8): Likewise.
 879         (vreinterpret_f32_s16): Likewise.
 880         (vreinterpret_f32_s32): Likewise.
 881         (vreinterpret_f32_s64): Likewise.
 882         (vreinterpret_f32_u8): Likewise.
 883         (vreinterpret_f32_u16): Likewise.
 884         (vreinterpret_f32_u32): Likewise.
 885         (vreinterpret_f32_u64): Likewise.
 886         (vreinterpret_f32_p8): Likewise.
 887         (vreinterpret_f32_p16): Likewise.
 888         (vreinterpretq_f32_s8): Likewise.
 889         (vreinterpretq_f32_s16): Likewise.
 890         (vreinterpretq_f32_s32): Likewise.
 891         (vreinterpretq_f32_s64): Likewise.
 892         (vreinterpretq_f32_u8): Likewise.
 893         (vreinterpretq_f32_u16): Likewise.
 894         (vreinterpretq_f32_u32): Likewise.
 895         (vreinterpretq_f32_u64): Likewise.
 896         (vreinterpretq_f32_p8): Likewise.
 897         (vreinterpretq_f32_p16): Likewise.
 898         (vreinterpret_s64_s8): Likewise.
 899         (vreinterpret_s64_s16): Likewise.
 900         (vreinterpret_s64_s32): Likewise.
 901         (vreinterpret_s64_f32): Likewise.
 902         (vreinterpret_s64_u8): Likewise.
 903         (vreinterpret_s64_u16): Likewise.
 904         (vreinterpret_s64_u32): Likewise.
 905         (vreinterpret_s64_u64): Likewise.
 906         (vreinterpret_s64_p8): Likewise.
 907         (vreinterpret_s64_p16): Likewise.
 908         (vreinterpretq_s64_s8): Likewise.
 909         (vreinterpretq_s64_s16): Likewise.
 910         (vreinterpretq_s64_s32): Likewise.
 911         (vreinterpretq_s64_f32): Likewise.
 912         (vreinterpretq_s64_u8): Likewise.
 913         (vreinterpretq_s64_u16): Likewise.
 914         (vreinterpretq_s64_u32): Likewise.
 915         (vreinterpretq_s64_u64): Likewise.
 916         (vreinterpretq_s64_p8): Likewise.
 917         (vreinterpretq_s64_p16): Likewise.
 918         (vreinterpret_u64_s8): Likewise.
 919         (vreinterpret_u64_s16): Likewise.
 920         (vreinterpret_u64_s32): Likewise.
 921         (vreinterpret_u64_s64): Likewise.
 922         (vreinterpret_u64_f32): Likewise.
 923         (vreinterpret_u64_u8): Likewise.
 924         (vreinterpret_u64_u16): Likewise.
 925         (vreinterpret_u64_u32): Likewise.
 926         (vreinterpret_u64_p8): Likewise.
 927         (vreinterpret_u64_p16): Likewise.
 928         (vreinterpretq_u64_s8): Likewise.
 929         (vreinterpretq_u64_s16): Likewise.
 930         (vreinterpretq_u64_s32): Likewise.
 931         (vreinterpretq_u64_s64): Likewise.
 932         (vreinterpretq_u64_f32): Likewise.
 933         (vreinterpretq_u64_u8): Likewise.
 934         (vreinterpretq_u64_u16): Likewise.
 935         (vreinterpretq_u64_u32): Likewise.
 936         (vreinterpretq_u64_p8): Likewise.
 937         (vreinterpretq_u64_p16): Likewise.
 938         (vreinterpret_s8_s16): Likewise.
 939         (vreinterpret_s8_s32): Likewise.
 940         (vreinterpret_s8_s64): Likewise.
 941         (vreinterpret_s8_f32): Likewise.
 942         (vreinterpret_s8_u8): Likewise.
 943         (vreinterpret_s8_u16): Likewise.
 944         (vreinterpret_s8_u32): Likewise.
 945         (vreinterpret_s8_u64): Likewise.
 946         (vreinterpret_s8_p8): Likewise.
 947         (vreinterpret_s8_p16): Likewise.
 948         (vreinterpretq_s8_s16): Likewise.
 949         (vreinterpretq_s8_s32): Likewise.
 950         (vreinterpretq_s8_s64): Likewise.
 951         (vreinterpretq_s8_f32): Likewise.
 952         (vreinterpretq_s8_u8): Likewise.
 953         (vreinterpretq_s8_u16): Likewise.
 954         (vreinterpretq_s8_u32): Likewise.
 955         (vreinterpretq_s8_u64): Likewise.
 956         (vreinterpretq_s8_p8): Likewise.
 957         (vreinterpretq_s8_p16): Likewise.
 958         (vreinterpret_s16_s8): Likewise.
 959         (vreinterpret_s16_s32): Likewise.
 960         (vreinterpret_s16_s64): Likewise.
 961         (vreinterpret_s16_f32): Likewise.
 962         (vreinterpret_s16_u8): Likewise.
 963         (vreinterpret_s16_u16): Likewise.
 964         (vreinterpret_s16_u32): Likewise.
 965         (vreinterpret_s16_u64): Likewise.
 966         (vreinterpret_s16_p8): Likewise.
 967         (vreinterpret_s16_p16): Likewise.
 968         (vreinterpretq_s16_s8): Likewise.
 969         (vreinterpretq_s16_s32): Likewise.
 970         (vreinterpretq_s16_s64): Likewise.
 971         (vreinterpretq_s16_f32): Likewise.
 972         (vreinterpretq_s16_u8): Likewise.
 973         (vreinterpretq_s16_u16): Likewise.
 974         (vreinterpretq_s16_u32): Likewise.
 975         (vreinterpretq_s16_u64): Likewise.
 976         (vreinterpretq_s16_p8): Likewise.
 977         (vreinterpretq_s16_p16): Likewise.
 978         (vreinterpret_s32_s8): Likewise.
 979         (vreinterpret_s32_s16): Likewise.
 980         (vreinterpret_s32_s64): Likewise.
 981         (vreinterpret_s32_f32): Likewise.
 982         (vreinterpret_s32_u8): Likewise.
 983         (vreinterpret_s32_u16): Likewise.
 984         (vreinterpret_s32_u32): Likewise.
 985         (vreinterpret_s32_u64): Likewise.
 986         (vreinterpret_s32_p8): Likewise.
 987         (vreinterpret_s32_p16): Likewise.
 988         (vreinterpretq_s32_s8): Likewise.
 989         (vreinterpretq_s32_s16): Likewise.
 990         (vreinterpretq_s32_s64): Likewise.
 991         (vreinterpretq_s32_f32): Likewise.
 992         (vreinterpretq_s32_u8): Likewise.
 993         (vreinterpretq_s32_u16): Likewise.
 994         (vreinterpretq_s32_u32): Likewise.
 995         (vreinterpretq_s32_u64): Likewise.
 996         (vreinterpretq_s32_p8): Likewise.
 997         (vreinterpretq_s32_p16): Likewise.
 998         (vreinterpret_u8_s8): Likewise.
 999         (vreinterpret_u8_s16): Likewise.
1000         (vreinterpret_u8_s32): Likewise.
1001         (vreinterpret_u8_s64): Likewise.
1002         (vreinterpret_u8_f32): Likewise.
1003         (vreinterpret_u8_u16): Likewise.
1004         (vreinterpret_u8_u32): Likewise.
1005         (vreinterpret_u8_u64): Likewise.
1006         (vreinterpret_u8_p8): Likewise.
1007         (vreinterpret_u8_p16): Likewise.
1008         (vreinterpretq_u8_s8): Likewise.
1009         (vreinterpretq_u8_s16): Likewise.
1010         (vreinterpretq_u8_s32): Likewise.
1011         (vreinterpretq_u8_s64): Likewise.
1012         (vreinterpretq_u8_f32): Likewise.
1013         (vreinterpretq_u8_u16): Likewise.
1014         (vreinterpretq_u8_u32): Likewise.
1015         (vreinterpretq_u8_u64): Likewise.
1016         (vreinterpretq_u8_p8): Likewise.
1017         (vreinterpretq_u8_p16): Likewise.
1018         (vreinterpret_u16_s8): Likewise.
1019         (vreinterpret_u16_s16): Likewise.
1020         (vreinterpret_u16_s32): Likewise.
1021         (vreinterpret_u16_s64): Likewise.
1022         (vreinterpret_u16_f32): Likewise.
1023         (vreinterpret_u16_u8): Likewise.
1024         (vreinterpret_u16_u32): Likewise.
1025         (vreinterpret_u16_u64): Likewise.
1026         (vreinterpret_u16_p8): Likewise.
1027         (vreinterpret_u16_p16): Likewise.
1028         (vreinterpretq_u16_s8): Likewise.
1029         (vreinterpretq_u16_s16): Likewise.
1030         (vreinterpretq_u16_s32): Likewise.
1031         (vreinterpretq_u16_s64): Likewise.
1032         (vreinterpretq_u16_f32): Likewise.
1033         (vreinterpretq_u16_u8): Likewise.
1034         (vreinterpretq_u16_u32): Likewise.
1035         (vreinterpretq_u16_u64): Likewise.
1036         (vreinterpretq_u16_p8): Likewise.
1037         (vreinterpretq_u16_p16): Likewise.
1038         (vreinterpret_u32_s8): Likewise.
1039         (vreinterpret_u32_s16): Likewise.
1040         (vreinterpret_u32_s32): Likewise.
1041         (vreinterpret_u32_s64): Likewise.
1042         (vreinterpret_u32_f32): Likewise.
1043         (vreinterpret_u32_u8): Likewise.
1044         (vreinterpret_u32_u16): Likewise.
1045         (vreinterpret_u32_u64): Likewise.
1046         (vreinterpret_u32_p8): Likewise.
1047         (vreinterpret_u32_p16): Likewise.
1048         (vreinterpretq_u32_s8): Likewise.
1049         (vreinterpretq_u32_s16): Likewise.
1050         (vreinterpretq_u32_s32): Likewise.
1051         (vreinterpretq_u32_s64): Likewise.
1052         (vreinterpretq_u32_f32): Likewise.
1053         (vreinterpretq_u32_u8): Likewise.
1054         (vreinterpretq_u32_u16): Likewise.
1055         (vreinterpretq_u32_u64): Likewise.
1056         (vreinterpretq_u32_p8): Likewise.
1057         (vreinterpretq_u32_p16): Likewise.
1058
1059 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1060
1061         Backport from trunk r209640.
1062         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1063
1064         * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
1065         Pattern extended.
1066         * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
1067         extended.
1068         (sqabs): Likewise.
1069         * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
1070         (vqnegd_s64): Likewise.
1071         (vqabs_s64): Likewise.
1072         (vqabsd_s64): Likewise.
1073
1074 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1075
1076         Backport from trunk r209627, 209636.
1077         2014-04-22  Renlin  <renlin.li@arm.com>
1078                     Jiong Wang  <jiong.wang@arm.com>
1079
1080         * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
1081         * config/aarch64/aarch64.c (aarch64_layout_frame)
1082         (aarch64_initial_elimination_offset): Likewise.
1083
1084         2014-04-22  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1085
1086         * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
1087         Fix indentation.
1088
1089 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1090
1091         Backport from trunk r209618.
1092         2014-04-22  Renlin Li  <Renlin.Li@arm.com>
1093
1094         * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
1095         the output asm format.
1096
1097 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1098
1099         Backport from trunk r209617.
1100         2014-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
1101
1102         * config/aarch64/aarch64-simd.md
1103         (aarch64_cm<optab>di): Always split.
1104         (*aarch64_cm<optab>di): New.
1105         (aarch64_cmtstdi): Always split.
1106         (*aarch64_cmtstdi): New.
1107
1108 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1109
1110         Backport from trunk r209615.
1111         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1112
1113         * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
1114         restrictions on core registers for DImode values in Thumb2.
1115
1116 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1117
1118         Backport from trunk r209613, r209614.
1119         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1120
1121         * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
1122         * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
1123
1124         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1125
1126         * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
1127         (*iordi_notzesidi_di): Likewise.
1128         (*iordi_notsesidi_di): Likewise.
1129
1130 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1131
1132         Backport from trunk r209561.
1133         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1134
1135         * config/arm/arm-protos.h (tune_params): New struct members.
1136         * config/arm/arm.c: Initialise tune_params per processor.
1137         (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
1138         for speed, based on new tune_params.
1139
1140 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1141
1142         Backport from trunk r209559.
1143         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1144
1145         * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
1146         added.
1147         * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
1148         macro.
1149         * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
1150         corrected.
1151         * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
1152         * config/aarch64/arm_neon.h (vrnd_f64): Added.
1153         (vrnda_f64): Likewise.
1154         (vrndi_f64): Likewise.
1155         (vrndm_f64): Likewise.
1156         (vrndn_f64): Likewise.
1157         (vrndp_f64): Likewise.
1158         (vrndx_f64): Likewise.
1159
1160 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1161
1162         Backport from trunk r209419.
1163         2014-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1164
1165         PR rtl-optimization/60663
1166         * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
1167         avoid 0 cost.
1168
1169 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1170
1171         Backport from trunk r209457.
1172         2014-04-16  Andrew  Pinski  <apinski@cavium.com>
1173
1174         * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
1175         definition.
1176
1177 2014-05-19  Yvan Roux  <yvan.roux@linaro.org>
1178
1179         * LINARO-VERSION: Bump version.
1180
1181 2014-05-14  Yvan Roux  <yvan.roux@linaro.org>
1182         GCC Linaro 4.9-2014.05 released.
1183         * LINARO-VERSION: Update.
1184
1185 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
1186
1187         Backport from trunk r209889.
1188         2014-04-29  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1189
1190         * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
1191
1192 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
1193
1194         Backport from trunk r209556.
1195         2014-04-22  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1196
1197         * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
1198         GET_MODE_SIZE argument is enum machine_mode.
1199
1200 2014-04-28  Yvan Roux  <yvan.roux@linaro.org>
1201
1202         * LINARO-VERSION: Bump version.
1203
1204 2014-04-22  Yvan Roux  <yvan.roux@linaro.org>
1205
1206         GCC Linaro 4.9-2014.04 released.
1207         * LINARO-VERSION: New file.
1208         * configure.ac: Add Linaro version string.
1209 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1210
1211         Backport from trunk r211771.
1212         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1213
1214         * genattrtab.c (n_bypassed): New variable.
1215         (process_bypasses): Initialise n_bypassed.
1216         Count number of bypassed reservations.
1217         (make_automaton_attrs): Allocate space for bypassed reservations
1218         rather than number of bypasses.
1219
1220 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1221
1222         Backport from trunk r210861.
1223         2014-05-23  Jiong Wang   <jiong.wang@arm.com>
1224
1225         * config/aarch64/predicates.md (aarch64_call_insn_operand): New
1226         predicate.
1227         * config/aarch64/constraints.md ("Ucs", "Usf"):  New constraints.
1228         * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
1229         Adjust for tailcalling through registers.
1230         * config/aarch64/aarch64.h (enum reg_class): New caller save
1231         register class.
1232         (REG_CLASS_NAMES): Likewise.
1233         (REG_CLASS_CONTENTS): Likewise.
1234         * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
1235         Allow tailcalling without decls.
1236
1237 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1238
1239         Backport from trunk r211314.
1240         2014-06-06  James Greenhalgh  <james.greenhalgh@arm.com>
1241
1242         * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
1243         * config/aarch64/aarch64.c (aarch64_move_pointer): New.
1244         (aarch64_progress_pointer): Likewise.
1245         (aarch64_copy_one_part_and_move_pointers): Likewise.
1246         (aarch64_expand_movmen): Likewise.
1247         * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
1248         * config/aarch64/aarch64.md (movmem<mode>): New.
1249
1250 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1251
1252         Backport from trunk r211185, 211186.
1253         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1254
1255         * gcc/config/aarch64/aarch64-builtins.c
1256         (aarch64_types_binop_uus_qualifiers,
1257         aarch64_types_shift_to_unsigned_qualifiers,
1258         aarch64_types_unsigned_shiftacc_qualifiers): Define.
1259         * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
1260         uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
1261         sqshlu_n, uqshl_n): Update qualifiers.
1262         * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
1263         vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
1264         vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
1265         vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
1266         vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
1267         vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
1268         vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
1269         vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
1270         vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
1271         vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
1272         vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
1273         vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
1274         vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
1275         vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
1276         vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
1277         vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
1278         vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
1279         vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
1280         vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
1281         vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
1282         vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
1283         vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
1284         vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
1285         vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
1286         vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
1287         vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
1288         vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
1289
1290         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1291
1292         * gcc/config/aarch64/aarch64-builtins.c
1293         (aarch64_types_binop_ssu_qualifiers): New static data.
1294         (TYPES_BINOP_SSU): Define.
1295         * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
1296         urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
1297         * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
1298         vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
1299         vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
1300         vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
1301         vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32,    52
1302         vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64,  53
1303         vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
1304         suffix to builtin function name, remove cast.   55
1305         (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
1306         vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8,  57
1307         vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
1308
1309 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1310
1311         Backport from trunk r211408, 211416.
1312         2014-06-10  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1313
1314         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
1315         REG_CFA_RESTORE mode.
1316
1317         2014-06-10  Jiong Wang  <jiong.wang@arm.com>
1318
1319         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
1320         (aarch64_save_or_restore_callee_save_registers): Fix layout.
1321
1322 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1323
1324         Backport from trunk r211418.
1325         2014-06-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1326
1327         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
1328         Change second alternative type to f_mcr.
1329         * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
1330         and 12th alternatives' types to f_mcr and f_mrc.
1331         (*movdi_aarch64): Same for 12th and 13th alternatives.
1332         (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
1333         (aarch64_movtilow_tilow): Change type to fmov.
1334
1335 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1336
1337         Backport from trunk r211371.
1338         2014-06-09  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1339
1340         * config/arm/arm-modes.def: Remove XFmode.
1341
1342 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1343
1344         Backport from trunk r211268.
1345         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1346
1347         * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
1348         layout comment.
1349
1350 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1351
1352         Backport from trunk r211129.
1353         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1354
1355         PR target/61154
1356         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
1357         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
1358         with immediate_operand.
1359
1360 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1361
1362         Backport from trunk r211073.
1363         2014-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1364
1365         * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
1366         to mov_imm.
1367         * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
1368
1369 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1370
1371         Backport from trunk r211050.
1372         2014-05-29  Richard Earnshaw <rearnsha@arm.com>
1373         Richard Sandiford  <rdsandiford@googlemail.com>
1374
1375         * arm/iterators.md (shiftable_ops): New code iterator.
1376         (t2_binop0, arith_shift_insn): New code attributes.
1377         * arm/predicates.md (shift_nomul_operator): New predicate.
1378         * arm/arm.md (insn_enabled): Delete.
1379         (enabled): Remove insn_enabled test.
1380         (*arith_shiftsi): Delete.  Replace with ...
1381         (*<arith_shift_insn>_multsi): ... new pattern.
1382         (*<arith_shift_insn>_shiftsi): ... new pattern.
1383         * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
1384
1385 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1386
1387         Backport from trunk r210996.
1388         2014-05-27  Andrew Pinski  <apinski@cavium.com>
1389
1390         * config/aarch64/aarch64.md (stack_protect_set_<mode>):
1391         Use <w> for the register in assembly template.
1392         (stack_protect_test): Use the mode of operands[0] for the
1393         result.
1394         (stack_protect_test_<mode>): Use <w> for the register
1395         in assembly template.
1396
1397 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1398
1399         Backport from trunk r210967.
1400         2014-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1401
1402         * config/arm/neon.md (neon_bswap<mode>): New pattern.
1403         * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
1404         (arm_init_neon_builtins): Handle NEON_BSWAP.
1405         Define required type nodes.
1406         (arm_expand_neon_builtin): Handle NEON_BSWAP.
1407         (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
1408         * config/arm/arm_neon_builtins.def (bswap): Define builtins.
1409         * config/arm/iterators.md (VDQHSD): New mode iterator.
1410
1411 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1412
1413         Backport from trunk r210471.
1414         2014-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1415
1416         * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
1417         enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
1418
1419 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1420
1421         Backport from trunk r210369.
1422         2014-05-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1423
1424         * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
1425         (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
1426         Remove associated type declarations and initialisations.
1427         (arm_expand_neon_builtin): Likewise.
1428         (neon_emit_pair_result_insn): Delete.
1429         * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
1430         * config/arm/neon.md (neon_vtrn<mode>): Delete.
1431         (neon_vzip<mode>): Likewise.
1432         (neon_vuzp<mode>): Likewise.
1433
1434 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1435
1436         Backport from trunk r211058, 211177.
1437         2014-05-29  Alan Lawrence  <alan.lawrence@arm.com>
1438
1439         * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
1440         TYPES_BINOPV): New static data.
1441         * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
1442         * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
1443         New patterns.
1444         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
1445         patterns for EXT.
1446         (aarch64_evpc_ext): New function.
1447
1448         * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
1449
1450         * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
1451         vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
1452         vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
1453         vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
1454         vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
1455
1456         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
1457
1458         * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
1459         location == 0.
1460
1461 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1462
1463         Backport from trunk r209797.
1464         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1465
1466         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
1467         Use HOST_WIDE_INT_C for mask literal.
1468         (aarch_rev16_shleft_mask_imm_p): Likewise.
1469
1470 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1471
1472         Backport from trunk r211148.
1473         2014-06-02  Andrew Pinski  <apinski@cavium.com>
1474
1475         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
1476         /lib/ld-linux32-aarch64.so.1 is used for ILP32.
1477         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
1478         file whose name depends on -mabi= and -mbig-endian.
1479         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
1480         better and handle ilp32 too.
1481         (MULTILIB_OPTIONS): Delete.
1482         (MULTILIB_DIRNAMES): Delete.
1483
1484 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1485
1486         Backport from trunk r210828, r211103.
1487         2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>
1488
1489         * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
1490         (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
1491         (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
1492         and __builtins_arm_get_fpscr.
1493         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
1494         __builtins_arm_get_fpscr.
1495         (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
1496         __builtins_arm_ldfpscr.
1497         (arm_atomic_assign_expand_fenv): New function.
1498         * config/arm/vfp.md (set_fpscr): New pattern.
1499         (get_fpscr) : Likewise.
1500         * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
1501         VUNSPEC_SET_FPSCR.
1502         * doc/extend.texi (AARCH64 Built-in Functions) : Document
1503         __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
1504
1505         2014-05-23  Kugan Vivekanandarajah  <kuganv@linaro.org>
1506
1507         * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
1508         define.
1509         * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
1510         New function declaration.
1511         * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
1512         AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
1513         AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
1514         (aarch64_init_builtins) : Initialize builtins
1515         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
1516         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
1517         (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
1518         __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
1519         and __builtins_aarch64_set_fpsr.
1520         (aarch64_atomic_assign_expand_fenv): New function.
1521         * config/aarch64/aarch64.md (set_fpcr): New pattern.
1522         (get_fpcr) : Likewise.
1523         (set_fpsr) : Likewise.
1524         (get_fpsr) : Likewise.
1525         (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
1526          and UNSPECV_SET_FPSR.
1527         * doc/extend.texi (AARCH64 Built-in Functions) : Document
1528         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
1529         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
1530
1531 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1532
1533         Backport from trunk r210355.
1534         2014-05-13  Ian Bolton  <ian.bolton@arm.com>
1535
1536         * config/aarch64/aarch64-protos.h
1537         (aarch64_hard_regno_caller_save_mode): New prototype.
1538         * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
1539         New function.
1540         * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
1541
1542 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
1543
1544         Backport from trunk r209943.
1545         2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>
1546
1547         * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
1548         vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
1549         vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
1550         vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
1551         vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
1552         vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
1553         vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
1554         vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
1555
1556 2014-06-26  Yvan Roux  <yvan.roux@linaro.org>
1557
1558         * LINARO-VERSION: Bump version.
1559
1560 2014-06-25  Yvan Roux  <yvan.roux@linaro.org>
1561
1562         GCC Linaro 4.9-2014.06-1 released.
1563         * LINARO-VERSION: Update.
1564
1565 2014-06-24  Yvan Roux  <yvan.roux@linaro.org>
1566
1567         Revert:
1568         2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1569
1570         Backport from trunk r209643.
1571         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1572
1573         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1574
1575 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
1576
1577         Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
1578         210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
1579         210508, 210509, 210510, 210512, 211205, 211206.
1580         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1581
1582         * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
1583         (cpu_addrcost_table): Use it.
1584         * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
1585         (aarch64_address_cost): Rewrite using aarch64_classify_address,
1586         move it.
1587
1588         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1589
1590         * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
1591         (cortexa57_vector_cost): Likewise.
1592         (cortexa57_tunings): Use them.
1593
1594         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1595
1596         * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
1597         (TARGET_RTX_COSTS): Call it.
1598
1599         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1600                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1601
1602         * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
1603         emit instructions, return number of instructions which would
1604         be emitted.
1605         (aarch64_add_constant): Update call to aarch64_build_constant.
1606         (aarch64_output_mi_thunk): Likewise.
1607         (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
1608         a CONST_DOUBLE.
1609
1610         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1611                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1612
1613         * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
1614         to...
1615         (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
1616         well formed.
1617         (aarch64_rtx_mult_cost): New.
1618         (aarch64_rtx_costs): Use it, refactor as appropriate.
1619
1620         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1621
1622         * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
1623
1624         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1625                     Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
1626
1627         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
1628         for SET RTX.
1629
1630         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1631                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1632
1633         * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
1634         costs when costing loads and stores to memory.
1635
1636         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1637                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1638
1639         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
1640         logical operations.
1641
1642         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1643                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1644
1645         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
1646         ZERO_EXTEND and SIGN_EXTEND better.
1647
1648         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1649                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1650
1651         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1652         rotates and shifts.
1653
1654         2014-03-16  James Greenhalgh  <james.greenhalgh@arm.com>
1655                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1656
1657         * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
1658         (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
1659
1660         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1661                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1662
1663         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1664         DIV/MOD.
1665
1666         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1667                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1668
1669         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
1670         operators.
1671
1672         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1673                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1674
1675         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
1676         FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
1677
1678         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1679                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1680
1681         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
1682
1683         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1684
1685         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
1686         HIGH, LO_SUM.
1687
1688         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1689
1690         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
1691         where we were unable to cost an RTX.
1692
1693         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1694
1695         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
1696
1697         2014-06-03  Andrew Pinski  <apinski@cavium.com>
1698
1699         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
1700         (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
1701
1702         2014-06-03  Andrew Pinski  <apinski@cavium.com>
1703
1704         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
1705         comparisons for OP0.
1706
1707 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
1708
1709         * LINARO-VERSION: Bump version.
1710
1711 2014-06-12  Yvan Roux  <yvan.roux@linaro.org>
1712
1713         GCC Linaro 4.9-2014.06 released.
1714         * LINARO-VERSION: Update.
1715
1716 2014-06-04  Yvan Roux  <yvan.roux@linaro.org>
1717
1718         Backport from trunk r211211.
1719         2014-06-04  Bin Cheng  <bin.cheng@arm.com>
1720
1721         * config/aarch64/aarch64.c (aarch64_classify_address)
1722         (aarch64_legitimize_reload_address): Support full addressing modes
1723         for vector modes.
1724         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
1725         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
1726
1727 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1728
1729         Backport from trunk r209906.
1730         2014-04-29  Alan Lawrence  <alan.lawrence@arm.com>
1731
1732         * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
1733         vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
1734         vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
1735         vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
1736         vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
1737         vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
1738         vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
1739         vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
1740
1741 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1742
1743         Backport from trunk r209897.
1744         2014-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1745
1746         * calls.c (initialize_argument_information): Always treat
1747         PUSH_ARGS_REVERSED as 1, simplify code accordingly.
1748         (expand_call): Likewise.
1749         (emit_library_call_calue_1): Likewise.
1750         * expr.c (PUSH_ARGS_REVERSED): Do not define.
1751         (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
1752         code accordingly.
1753
1754 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1755
1756         Backport from trunk r209880.
1757         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
1758
1759         * config/aarch64/aarch64-builtins.c
1760         (aarch64_types_storestruct_lane_qualifiers): New.
1761         (TYPES_STORESTRUCT_LANE): Likewise.
1762         * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
1763         (st3_lane): Likewise.
1764         (st4_lane): Likewise.
1765         * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
1766         (vec_store_lanesci_lane<mode>): Likewise.
1767         (vec_store_lanesxi_lane<mode>): Likewise.
1768                 (aarch64_st2_lane<VQ:mode>): Likewise.
1769         (aarch64_st3_lane<VQ:mode>): Likewise.
1770         (aarch64_st4_lane<VQ:mode>): Likewise.
1771         * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
1772         * config/aarch64/arm_neon.h
1773                 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
1774         use new macro arguments.
1775         (__ST3_LANE_FUNC): Likewise.
1776         (__ST4_LANE_FUNC): Likewise.
1777         * config/aarch64/iterators.md (V_TWO_ELEM): New.
1778         (V_THREE_ELEM): Likewise.
1779         (V_FOUR_ELEM): Likewise.
1780
1781 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1782
1783         Backport from trunk r209878.
1784         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
1785
1786         * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
1787         * config/aarch64/aarch64.c
1788         (aarch64_cannot_change_mode_class): Weaken conditions.
1789         (aarch64_modes_tieable_p): New.
1790         * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
1791
1792 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1793
1794         Backport from trunk r209808.
1795         2014-04-25  Jiong Wang  <jiong.wang@arm.com>
1796
1797         * config/arm/predicates.md (call_insn_operand): Add long_call check.
1798         * config/arm/arm.md (sibcall, sibcall_value): Force the address to
1799         reg for long_call.
1800         * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
1801         restriction.
1802
1803 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1804
1805         Backport from trunk r209806.
1806         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1807
1808         * config/arm/arm.c (arm_cortex_a8_tune): Initialise
1809         T16-related fields.
1810
1811 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1812
1813         Backport from trunk r209742, 209749.
1814         2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
1815
1816         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
1817
1818         2014-04-24  Tejas Belagod  <tejas.belagod@arm.com>
1819
1820         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
1821         for big-endian.
1822
1823 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1824
1825         Backport from trunk r209736.
1826         2014-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1827
1828         * config/aarch64/aarch64-builtins.c
1829         (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
1830         BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
1831         * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
1832         * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
1833         builtins.
1834         * config/aarch64/iterator.md (VDQHSD): New mode iterator.
1835         (Vrevsuff): New mode attribute.
1836
1837 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1838
1839         Backport from trunk r209712.
1840         2014-04-23 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
1841
1842         * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
1843         (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
1844         machine descriptions for Stack Smashing Protector.
1845
1846 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1847
1848         Backport from trunk r209711.
1849         2014-04-23  Richard Earnshaw  <rearnsha@arm.com>
1850
1851         * aarch64.md (<optab>_rol<mode>3): New pattern.
1852         (<optab>_rolsi3_uxtw): Likewise.
1853         * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
1854
1855 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1856
1857         Backport from trunk r209710.
1858         2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
1859
1860         * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
1861         (arm_cortex_a12_tune): Likewise.
1862
1863 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1864
1865         Backport from trunk r209706.
1866         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1867
1868         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
1869
1870 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1871
1872         Backport from trunk r209701, 209702, 209703, 209704, 209705.
1873         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1874
1875         * config/arm/arm.md (arm_rev16si2): New pattern.
1876         (arm_rev16si2_alt): Likewise.
1877         * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
1878
1879         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1880         * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
1881         (rev16<mode>2_alt): Likewise.
1882         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
1883         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
1884         (aarch_rev16_shleft_mask_imm_p): Likewise.
1885         (aarch_rev16_p_1): Likewise.
1886         (aarch_rev16_p): Likewise.
1887         * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
1888         (aarch_rev16_shright_mask_imm_p): Likewise.
1889         (aarch_rev16_shleft_mask_imm_p): Likewise.
1890
1891         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1892
1893         * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
1894         * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
1895         rev cost.
1896         (cortex_a53_extra_costs): Likewise.
1897         (cortex_a57_extra_costs): Likewise.
1898         * config/arm/arm.c (cortexa9_extra_costs): Likewise.
1899         (cortexa7_extra_costs): Likewise.
1900         (cortexa8_extra_costs): Likewise.
1901         (cortexa12_extra_costs): Likewise.
1902         (cortexa15_extra_costs): Likewise.
1903         (v7m_extra_costs): Likewise.
1904         (arm_new_rtx_costs): Handle BSWAP.
1905
1906         2013-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1907
1908         * config/arm/arm.c (cortexa8_extra_costs): New table.
1909         (arm_cortex_a8_tune): New tuning struct.
1910         * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
1911
1912         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1913
1914         * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
1915
1916 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1917
1918         Backport from trunk r209659.
1919         2014-04-22  Richard Henderson  <rth@redhat.com>
1920
1921         * config/aarch64/aarch64 (addti3, subti3): New expanders.
1922         (add<GPI>3_compare0): Remove leading * from name.
1923         (add<GPI>3_carryin): Likewise.
1924         (sub<GPI>3_compare0): Likewise.
1925         (sub<GPI>3_carryin): Likewise.
1926         (<su_optab>mulditi3): New expander.
1927         (multi3): New expander.
1928         (madd<GPI>): Remove leading * from name.
1929
1930 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1931
1932         Backport from trunk r209645.
1933         2014-04-22  Andrew Pinski  <apinski@cavium.com>
1934
1935         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1936         Handle TLS for ILP32.
1937         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
1938         (tlsie_small_<mode>): this and handle PTR.
1939         (tlsie_small_sidi): New pattern.
1940         (tlsle_small): Change to an expand to handle ILP32.
1941         (tlsle_small_<mode>): New pattern.
1942         (tlsdesc_small): Rename to ...
1943         (tlsdesc_small_<mode>): this and handle PTR.
1944
1945 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1946
1947         Backport from trunk r209643.
1948         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1949
1950         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1951
1952 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1953
1954         Backport from trunk r209641, 209642.
1955         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1956
1957         * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1958         (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
1959         (aarch64_types_signed_poly_qualifiers): Likewise.
1960         (aarch64_types_unsigned_signed_qualifiers): Likewise.
1961         (aarch64_types_poly_signed_qualifiers): Likewise.
1962         (TYPES_REINTERP_SS): Type macro added.
1963         (TYPES_REINTERP_SU): Likewise.
1964         (TYPES_REINTERP_SP): Likewise.
1965         (TYPES_REINTERP_US): Likewise.
1966         (TYPES_REINTERP_PS): Likewise.
1967         (aarch64_fold_builtin): New expression folding added.
1968         * config/aarch64/aarch64-simd-builtins.def (REINTERP):
1969         Declarations removed.
1970         (REINTERP_SS): Declarations added.
1971         (REINTERP_US): Likewise.
1972         (REINTERP_PS): Likewise.
1973         (REINTERP_SU): Likewise.
1974         (REINTERP_SP): Likewise.
1975         * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
1976         (vreinterpretq_p8_f64): Likewise.
1977         (vreinterpret_p16_f64): Likewise.
1978         (vreinterpretq_p16_f64): Likewise.
1979         (vreinterpret_f32_f64): Likewise.
1980         (vreinterpretq_f32_f64): Likewise.
1981         (vreinterpret_f64_f32): Likewise.
1982         (vreinterpret_f64_p8): Likewise.
1983         (vreinterpret_f64_p16): Likewise.
1984         (vreinterpret_f64_s8): Likewise.
1985         (vreinterpret_f64_s16): Likewise.
1986         (vreinterpret_f64_s32): Likewise.
1987         (vreinterpret_f64_s64): Likewise.
1988         (vreinterpret_f64_u8): Likewise.
1989         (vreinterpret_f64_u16): Likewise.
1990         (vreinterpret_f64_u32): Likewise.
1991         (vreinterpret_f64_u64): Likewise.
1992         (vreinterpretq_f64_f32): Likewise.
1993         (vreinterpretq_f64_p8): Likewise.
1994         (vreinterpretq_f64_p16): Likewise.
1995         (vreinterpretq_f64_s8): Likewise.
1996         (vreinterpretq_f64_s16): Likewise.
1997         (vreinterpretq_f64_s32): Likewise.
1998         (vreinterpretq_f64_s64): Likewise.
1999         (vreinterpretq_f64_u8): Likewise.
2000         (vreinterpretq_f64_u16): Likewise.
2001         (vreinterpretq_f64_u32): Likewise.
2002         (vreinterpretq_f64_u64): Likewise.
2003         (vreinterpret_s64_f64): Likewise.
2004         (vreinterpretq_s64_f64): Likewise.
2005         (vreinterpret_u64_f64): Likewise.
2006         (vreinterpretq_u64_f64): Likewise.
2007         (vreinterpret_s8_f64): Likewise.
2008         (vreinterpretq_s8_f64): Likewise.
2009         (vreinterpret_s16_f64): Likewise.
2010         (vreinterpretq_s16_f64): Likewise.
2011         (vreinterpret_s32_f64): Likewise.
2012         (vreinterpretq_s32_f64): Likewise.
2013         (vreinterpret_u8_f64): Likewise.
2014         (vreinterpretq_u8_f64): Likewise.
2015         (vreinterpret_u16_f64): Likewise.
2016         (vreinterpretq_u16_f64): Likewise.
2017         (vreinterpret_u32_f64): Likewise.
2018         (vreinterpretq_u32_f64): Likewise.
2019
2020         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2021
2022         * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
2023         * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
2024         (vreinterpret_p8_s8): Likewise.
2025         * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
2026         (vreinterpret_p8_s16): Likewise.
2027         (vreinterpret_p8_s32): Likewise.
2028         (vreinterpret_p8_s64): Likewise.
2029         (vreinterpret_p8_f32): Likewise.
2030         (vreinterpret_p8_u8): Likewise.
2031         (vreinterpret_p8_u16): Likewise.
2032         (vreinterpret_p8_u32): Likewise.
2033         (vreinterpret_p8_u64): Likewise.
2034         (vreinterpret_p8_p16): Likewise.
2035         (vreinterpretq_p8_s8): Likewise.
2036         (vreinterpretq_p8_s16): Likewise.
2037         (vreinterpretq_p8_s32): Likewise.
2038         (vreinterpretq_p8_s64): Likewise.
2039         (vreinterpretq_p8_f32): Likewise.
2040         (vreinterpretq_p8_u8): Likewise.
2041         (vreinterpretq_p8_u16): Likewise.
2042         (vreinterpretq_p8_u32): Likewise.
2043         (vreinterpretq_p8_u64): Likewise.
2044         (vreinterpretq_p8_p16): Likewise.
2045         (vreinterpret_p16_s8): Likewise.
2046         (vreinterpret_p16_s16): Likewise.
2047         (vreinterpret_p16_s32): Likewise.
2048         (vreinterpret_p16_s64): Likewise.
2049         (vreinterpret_p16_f32): Likewise.
2050         (vreinterpret_p16_u8): Likewise.
2051         (vreinterpret_p16_u16): Likewise.
2052         (vreinterpret_p16_u32): Likewise.
2053         (vreinterpret_p16_u64): Likewise.
2054         (vreinterpret_p16_p8): Likewise.
2055         (vreinterpretq_p16_s8): Likewise.
2056         (vreinterpretq_p16_s16): Likewise.
2057         (vreinterpretq_p16_s32): Likewise.
2058         (vreinterpretq_p16_s64): Likewise.
2059         (vreinterpretq_p16_f32): Likewise.
2060         (vreinterpretq_p16_u8): Likewise.
2061         (vreinterpretq_p16_u16): Likewise.
2062         (vreinterpretq_p16_u32): Likewise.
2063         (vreinterpretq_p16_u64): Likewise.
2064         (vreinterpretq_p16_p8): Likewise.
2065         (vreinterpret_f32_s8): Likewise.
2066         (vreinterpret_f32_s16): Likewise.
2067         (vreinterpret_f32_s32): Likewise.
2068         (vreinterpret_f32_s64): Likewise.
2069         (vreinterpret_f32_u8): Likewise.
2070         (vreinterpret_f32_u16): Likewise.
2071         (vreinterpret_f32_u32): Likewise.
2072         (vreinterpret_f32_u64): Likewise.
2073         (vreinterpret_f32_p8): Likewise.
2074         (vreinterpret_f32_p16): Likewise.
2075         (vreinterpretq_f32_s8): Likewise.
2076         (vreinterpretq_f32_s16): Likewise.
2077         (vreinterpretq_f32_s32): Likewise.
2078         (vreinterpretq_f32_s64): Likewise.
2079         (vreinterpretq_f32_u8): Likewise.
2080         (vreinterpretq_f32_u16): Likewise.
2081         (vreinterpretq_f32_u32): Likewise.
2082         (vreinterpretq_f32_u64): Likewise.
2083         (vreinterpretq_f32_p8): Likewise.
2084         (vreinterpretq_f32_p16): Likewise.
2085         (vreinterpret_s64_s8): Likewise.
2086         (vreinterpret_s64_s16): Likewise.
2087         (vreinterpret_s64_s32): Likewise.
2088         (vreinterpret_s64_f32): Likewise.
2089         (vreinterpret_s64_u8): Likewise.
2090         (vreinterpret_s64_u16): Likewise.
2091         (vreinterpret_s64_u32): Likewise.
2092         (vreinterpret_s64_u64): Likewise.
2093         (vreinterpret_s64_p8): Likewise.
2094         (vreinterpret_s64_p16): Likewise.
2095         (vreinterpretq_s64_s8): Likewise.
2096         (vreinterpretq_s64_s16): Likewise.
2097         (vreinterpretq_s64_s32): Likewise.
2098         (vreinterpretq_s64_f32): Likewise.
2099         (vreinterpretq_s64_u8): Likewise.
2100         (vreinterpretq_s64_u16): Likewise.
2101         (vreinterpretq_s64_u32): Likewise.
2102         (vreinterpretq_s64_u64): Likewise.
2103         (vreinterpretq_s64_p8): Likewise.
2104         (vreinterpretq_s64_p16): Likewise.
2105         (vreinterpret_u64_s8): Likewise.
2106         (vreinterpret_u64_s16): Likewise.
2107         (vreinterpret_u64_s32): Likewise.
2108         (vreinterpret_u64_s64): Likewise.
2109         (vreinterpret_u64_f32): Likewise.
2110         (vreinterpret_u64_u8): Likewise.
2111         (vreinterpret_u64_u16): Likewise.
2112         (vreinterpret_u64_u32): Likewise.
2113         (vreinterpret_u64_p8): Likewise.
2114         (vreinterpret_u64_p16): Likewise.
2115         (vreinterpretq_u64_s8): Likewise.
2116         (vreinterpretq_u64_s16): Likewise.
2117         (vreinterpretq_u64_s32): Likewise.
2118         (vreinterpretq_u64_s64): Likewise.
2119         (vreinterpretq_u64_f32): Likewise.
2120         (vreinterpretq_u64_u8): Likewise.
2121         (vreinterpretq_u64_u16): Likewise.
2122         (vreinterpretq_u64_u32): Likewise.
2123         (vreinterpretq_u64_p8): Likewise.
2124         (vreinterpretq_u64_p16): Likewise.
2125         (vreinterpret_s8_s16): Likewise.
2126         (vreinterpret_s8_s32): Likewise.
2127         (vreinterpret_s8_s64): Likewise.
2128         (vreinterpret_s8_f32): Likewise.
2129         (vreinterpret_s8_u8): Likewise.
2130         (vreinterpret_s8_u16): Likewise.
2131         (vreinterpret_s8_u32): Likewise.
2132         (vreinterpret_s8_u64): Likewise.
2133         (vreinterpret_s8_p8): Likewise.
2134         (vreinterpret_s8_p16): Likewise.
2135         (vreinterpretq_s8_s16): Likewise.
2136         (vreinterpretq_s8_s32): Likewise.
2137         (vreinterpretq_s8_s64): Likewise.
2138         (vreinterpretq_s8_f32): Likewise.
2139         (vreinterpretq_s8_u8): Likewise.
2140         (vreinterpretq_s8_u16): Likewise.
2141         (vreinterpretq_s8_u32): Likewise.
2142         (vreinterpretq_s8_u64): Likewise.
2143         (vreinterpretq_s8_p8): Likewise.
2144         (vreinterpretq_s8_p16): Likewise.
2145         (vreinterpret_s16_s8): Likewise.
2146         (vreinterpret_s16_s32): Likewise.
2147         (vreinterpret_s16_s64): Likewise.
2148         (vreinterpret_s16_f32): Likewise.
2149         (vreinterpret_s16_u8): Likewise.
2150         (vreinterpret_s16_u16): Likewise.
2151         (vreinterpret_s16_u32): Likewise.
2152         (vreinterpret_s16_u64): Likewise.
2153         (vreinterpret_s16_p8): Likewise.
2154         (vreinterpret_s16_p16): Likewise.
2155         (vreinterpretq_s16_s8): Likewise.
2156         (vreinterpretq_s16_s32): Likewise.
2157         (vreinterpretq_s16_s64): Likewise.
2158         (vreinterpretq_s16_f32): Likewise.
2159         (vreinterpretq_s16_u8): Likewise.
2160         (vreinterpretq_s16_u16): Likewise.
2161         (vreinterpretq_s16_u32): Likewise.
2162         (vreinterpretq_s16_u64): Likewise.
2163         (vreinterpretq_s16_p8): Likewise.
2164         (vreinterpretq_s16_p16): Likewise.
2165         (vreinterpret_s32_s8): Likewise.
2166         (vreinterpret_s32_s16): Likewise.
2167         (vreinterpret_s32_s64): Likewise.
2168         (vreinterpret_s32_f32): Likewise.
2169         (vreinterpret_s32_u8): Likewise.
2170         (vreinterpret_s32_u16): Likewise.
2171         (vreinterpret_s32_u32): Likewise.
2172         (vreinterpret_s32_u64): Likewise.
2173         (vreinterpret_s32_p8): Likewise.
2174         (vreinterpret_s32_p16): Likewise.
2175         (vreinterpretq_s32_s8): Likewise.
2176         (vreinterpretq_s32_s16): Likewise.
2177         (vreinterpretq_s32_s64): Likewise.
2178         (vreinterpretq_s32_f32): Likewise.
2179         (vreinterpretq_s32_u8): Likewise.
2180         (vreinterpretq_s32_u16): Likewise.
2181         (vreinterpretq_s32_u32): Likewise.
2182         (vreinterpretq_s32_u64): Likewise.
2183         (vreinterpretq_s32_p8): Likewise.
2184         (vreinterpretq_s32_p16): Likewise.
2185         (vreinterpret_u8_s8): Likewise.
2186         (vreinterpret_u8_s16): Likewise.
2187         (vreinterpret_u8_s32): Likewise.
2188         (vreinterpret_u8_s64): Likewise.
2189         (vreinterpret_u8_f32): Likewise.
2190         (vreinterpret_u8_u16): Likewise.
2191         (vreinterpret_u8_u32): Likewise.
2192         (vreinterpret_u8_u64): Likewise.
2193         (vreinterpret_u8_p8): Likewise.
2194         (vreinterpret_u8_p16): Likewise.
2195         (vreinterpretq_u8_s8): Likewise.
2196         (vreinterpretq_u8_s16): Likewise.
2197         (vreinterpretq_u8_s32): Likewise.
2198         (vreinterpretq_u8_s64): Likewise.
2199         (vreinterpretq_u8_f32): Likewise.
2200         (vreinterpretq_u8_u16): Likewise.
2201         (vreinterpretq_u8_u32): Likewise.
2202         (vreinterpretq_u8_u64): Likewise.
2203         (vreinterpretq_u8_p8): Likewise.
2204         (vreinterpretq_u8_p16): Likewise.
2205         (vreinterpret_u16_s8): Likewise.
2206         (vreinterpret_u16_s16): Likewise.
2207         (vreinterpret_u16_s32): Likewise.
2208         (vreinterpret_u16_s64): Likewise.
2209         (vreinterpret_u16_f32): Likewise.
2210         (vreinterpret_u16_u8): Likewise.
2211         (vreinterpret_u16_u32): Likewise.
2212         (vreinterpret_u16_u64): Likewise.
2213         (vreinterpret_u16_p8): Likewise.
2214         (vreinterpret_u16_p16): Likewise.
2215         (vreinterpretq_u16_s8): Likewise.
2216         (vreinterpretq_u16_s16): Likewise.
2217         (vreinterpretq_u16_s32): Likewise.
2218         (vreinterpretq_u16_s64): Likewise.
2219         (vreinterpretq_u16_f32): Likewise.
2220         (vreinterpretq_u16_u8): Likewise.
2221         (vreinterpretq_u16_u32): Likewise.
2222         (vreinterpretq_u16_u64): Likewise.
2223         (vreinterpretq_u16_p8): Likewise.
2224         (vreinterpretq_u16_p16): Likewise.
2225         (vreinterpret_u32_s8): Likewise.
2226         (vreinterpret_u32_s16): Likewise.
2227         (vreinterpret_u32_s32): Likewise.
2228         (vreinterpret_u32_s64): Likewise.
2229         (vreinterpret_u32_f32): Likewise.
2230         (vreinterpret_u32_u8): Likewise.
2231         (vreinterpret_u32_u16): Likewise.
2232         (vreinterpret_u32_u64): Likewise.
2233         (vreinterpret_u32_p8): Likewise.
2234         (vreinterpret_u32_p16): Likewise.
2235         (vreinterpretq_u32_s8): Likewise.
2236         (vreinterpretq_u32_s16): Likewise.
2237         (vreinterpretq_u32_s32): Likewise.
2238         (vreinterpretq_u32_s64): Likewise.
2239         (vreinterpretq_u32_f32): Likewise.
2240         (vreinterpretq_u32_u8): Likewise.
2241         (vreinterpretq_u32_u16): Likewise.
2242         (vreinterpretq_u32_u64): Likewise.
2243         (vreinterpretq_u32_p8): Likewise.
2244         (vreinterpretq_u32_p16): Likewise.
2245
2246 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2247
2248         Backport from trunk r209640.
2249         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2250
2251         * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
2252         Pattern extended.
2253         * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
2254         extended.
2255         (sqabs): Likewise.
2256         * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
2257         (vqnegd_s64): Likewise.
2258         (vqabs_s64): Likewise.
2259         (vqabsd_s64): Likewise.
2260
2261 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2262
2263         Backport from trunk r209627, 209636.
2264         2014-04-22  Renlin  <renlin.li@arm.com>
2265                     Jiong Wang  <jiong.wang@arm.com>
2266
2267         * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
2268         * config/aarch64/aarch64.c (aarch64_layout_frame)
2269         (aarch64_initial_elimination_offset): Likewise.
2270
2271         2014-04-22  Marcus Shawcroft  <marcus.shawcroft@arm.com>
2272
2273         * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
2274         Fix indentation.
2275
2276 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2277
2278         Backport from trunk r209618.
2279         2014-04-22  Renlin Li  <Renlin.Li@arm.com>
2280
2281         * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
2282         the output asm format.
2283
2284 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2285
2286         Backport from trunk r209617.
2287         2014-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
2288
2289         * config/aarch64/aarch64-simd.md
2290         (aarch64_cm<optab>di): Always split.
2291         (*aarch64_cm<optab>di): New.
2292         (aarch64_cmtstdi): Always split.
2293         (*aarch64_cmtstdi): New.
2294
2295 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2296
2297         Backport from trunk r209615.
2298         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
2299
2300         * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
2301         restrictions on core registers for DImode values in Thumb2.
2302
2303 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2304
2305         Backport from trunk r209613, r209614.
2306         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
2307
2308         * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
2309         * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
2310
2311         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
2312
2313         * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
2314         (*iordi_notzesidi_di): Likewise.
2315         (*iordi_notsesidi_di): Likewise.
2316
2317 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2318
2319         Backport from trunk r209561.
2320         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
2321
2322         * config/arm/arm-protos.h (tune_params): New struct members.
2323         * config/arm/arm.c: Initialise tune_params per processor.
2324         (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
2325         for speed, based on new tune_params.
2326
2327 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2328
2329         Backport from trunk r209559.
2330         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
2331
2332         * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
2333         added.
2334         * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
2335         macro.
2336         * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
2337         corrected.
2338         * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
2339         * config/aarch64/arm_neon.h (vrnd_f64): Added.
2340         (vrnda_f64): Likewise.
2341         (vrndi_f64): Likewise.
2342         (vrndm_f64): Likewise.
2343         (vrndn_f64): Likewise.
2344         (vrndp_f64): Likewise.
2345         (vrndx_f64): Likewise.
2346
2347 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2348
2349         Backport from trunk r209419.
2350         2014-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2351
2352         PR rtl-optimization/60663
2353         * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
2354         avoid 0 cost.
2355
2356 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
2357
2358         Backport from trunk r209457.
2359         2014-04-16  Andrew  Pinski  <apinski@cavium.com>
2360
2361         * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
2362         definition.
2363
2364 2014-05-19  Yvan Roux  <yvan.roux@linaro.org>
2365
2366         * LINARO-VERSION: Bump version.
2367
2368 2014-05-14  Yvan Roux  <yvan.roux@linaro.org>
2369         GCC Linaro 4.9-2014.05 released.
2370         * LINARO-VERSION: Update.
2371
2372 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
2373
2374         Backport from trunk r209889.
2375         2014-04-29  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
2376
2377         * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
2378
2379 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
2380
2381         Backport from trunk r209556.
2382         2014-04-22  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
2383
2384         * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
2385         GET_MODE_SIZE argument is enum machine_mode.
2386
2387 2014-04-28  Yvan Roux  <yvan.roux@linaro.org>
2388
2389         * LINARO-VERSION: Bump version.
2390
2391 2014-04-22  Yvan Roux  <yvan.roux@linaro.org>
2392
2393         GCC Linaro 4.9-2014.04 released.
2394         * LINARO-VERSION: New file.
2395         * configure.ac: Add Linaro version string.