Allow target to override gnu-user.h crti and crtn
[official-gcc.git] / gcc / config / i386 / i386-c.c
blob16c6a2d5503ee59afd39f3971301fbc74f8f8330
1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #define IN_TARGET_CODE 1
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "target.h"
26 #include "c-family/c-common.h"
27 #include "memmodel.h"
28 #include "tm_p.h"
29 #include "c-family/c-pragma.h"
31 static bool ix86_pragma_target_parse (tree, tree);
32 static void ix86_target_macros_internal
33 (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
34 void (*def_or_undef) (cpp_reader *, const char *));
36 /* Internal function to either define or undef the appropriate system
37 macros. */
38 static void
39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
40 HOST_WIDE_INT isa_flag2,
41 enum processor_type arch,
42 enum processor_type tune,
43 enum fpmath_unit fpmath,
44 void (*def_or_undef) (cpp_reader *,
45 const char *))
47 /* For some of the k6/pentium varients there weren't separate ISA bits to
48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len = strlen (ix86_arch_string);
50 size_t tune_len = strlen (ix86_tune_string);
51 int last_arch_char = ix86_arch_string[arch_len - 1];
52 int last_tune_char = ix86_tune_string[tune_len - 1];
54 /* Built-ins based on -march=. */
55 switch (arch)
57 case PROCESSOR_I386:
58 break;
59 case PROCESSOR_I486:
60 def_or_undef (parse_in, "__i486");
61 def_or_undef (parse_in, "__i486__");
62 break;
63 case PROCESSOR_LAKEMONT:
64 /* Intel MCU is based on Intel Pentium CPU. */
65 case PROCESSOR_PENTIUM:
66 def_or_undef (parse_in, "__i586");
67 def_or_undef (parse_in, "__i586__");
68 def_or_undef (parse_in, "__pentium");
69 def_or_undef (parse_in, "__pentium__");
70 if (isa_flag & OPTION_MASK_ISA_MMX)
71 def_or_undef (parse_in, "__pentium_mmx__");
72 break;
73 case PROCESSOR_PENTIUMPRO:
74 def_or_undef (parse_in, "__i686");
75 def_or_undef (parse_in, "__i686__");
76 def_or_undef (parse_in, "__pentiumpro");
77 def_or_undef (parse_in, "__pentiumpro__");
78 break;
79 case PROCESSOR_GEODE:
80 def_or_undef (parse_in, "__geode");
81 def_or_undef (parse_in, "__geode__");
82 break;
83 case PROCESSOR_K6:
84 def_or_undef (parse_in, "__k6");
85 def_or_undef (parse_in, "__k6__");
86 if (last_arch_char == '2')
87 def_or_undef (parse_in, "__k6_2__");
88 else if (last_arch_char == '3')
89 def_or_undef (parse_in, "__k6_3__");
90 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
91 def_or_undef (parse_in, "__k6_3__");
92 break;
93 case PROCESSOR_ATHLON:
94 def_or_undef (parse_in, "__athlon");
95 def_or_undef (parse_in, "__athlon__");
96 if (isa_flag & OPTION_MASK_ISA_SSE)
97 def_or_undef (parse_in, "__athlon_sse__");
98 break;
99 case PROCESSOR_K8:
100 def_or_undef (parse_in, "__k8");
101 def_or_undef (parse_in, "__k8__");
102 break;
103 case PROCESSOR_AMDFAM10:
104 def_or_undef (parse_in, "__amdfam10");
105 def_or_undef (parse_in, "__amdfam10__");
106 break;
107 case PROCESSOR_BDVER1:
108 def_or_undef (parse_in, "__bdver1");
109 def_or_undef (parse_in, "__bdver1__");
110 break;
111 case PROCESSOR_BDVER2:
112 def_or_undef (parse_in, "__bdver2");
113 def_or_undef (parse_in, "__bdver2__");
114 break;
115 case PROCESSOR_BDVER3:
116 def_or_undef (parse_in, "__bdver3");
117 def_or_undef (parse_in, "__bdver3__");
118 break;
119 case PROCESSOR_BDVER4:
120 def_or_undef (parse_in, "__bdver4");
121 def_or_undef (parse_in, "__bdver4__");
122 break;
123 case PROCESSOR_ZNVER1:
124 def_or_undef (parse_in, "__znver1");
125 def_or_undef (parse_in, "__znver1__");
126 break;
127 case PROCESSOR_ZNVER2:
128 def_or_undef (parse_in, "__znver2");
129 def_or_undef (parse_in, "__znver2__");
130 break;
131 case PROCESSOR_BTVER1:
132 def_or_undef (parse_in, "__btver1");
133 def_or_undef (parse_in, "__btver1__");
134 break;
135 case PROCESSOR_BTVER2:
136 def_or_undef (parse_in, "__btver2");
137 def_or_undef (parse_in, "__btver2__");
138 break;
139 case PROCESSOR_PENTIUM4:
140 def_or_undef (parse_in, "__pentium4");
141 def_or_undef (parse_in, "__pentium4__");
142 break;
143 case PROCESSOR_NOCONA:
144 def_or_undef (parse_in, "__nocona");
145 def_or_undef (parse_in, "__nocona__");
146 break;
147 case PROCESSOR_CORE2:
148 def_or_undef (parse_in, "__core2");
149 def_or_undef (parse_in, "__core2__");
150 break;
151 case PROCESSOR_NEHALEM:
152 def_or_undef (parse_in, "__corei7");
153 def_or_undef (parse_in, "__corei7__");
154 def_or_undef (parse_in, "__nehalem");
155 def_or_undef (parse_in, "__nehalem__");
156 break;
157 case PROCESSOR_SANDYBRIDGE:
158 def_or_undef (parse_in, "__corei7_avx");
159 def_or_undef (parse_in, "__corei7_avx__");
160 def_or_undef (parse_in, "__sandybridge");
161 def_or_undef (parse_in, "__sandybridge__");
162 break;
163 case PROCESSOR_HASWELL:
164 def_or_undef (parse_in, "__core_avx2");
165 def_or_undef (parse_in, "__core_avx2__");
166 def_or_undef (parse_in, "__haswell");
167 def_or_undef (parse_in, "__haswell__");
168 break;
169 case PROCESSOR_BONNELL:
170 def_or_undef (parse_in, "__atom");
171 def_or_undef (parse_in, "__atom__");
172 def_or_undef (parse_in, "__bonnell");
173 def_or_undef (parse_in, "__bonnell__");
174 break;
175 case PROCESSOR_SILVERMONT:
176 def_or_undef (parse_in, "__slm");
177 def_or_undef (parse_in, "__slm__");
178 def_or_undef (parse_in, "__silvermont");
179 def_or_undef (parse_in, "__silvermont__");
180 break;
181 case PROCESSOR_GOLDMONT:
182 def_or_undef (parse_in, "__goldmont");
183 def_or_undef (parse_in, "__goldmont__");
184 break;
185 case PROCESSOR_GOLDMONT_PLUS:
186 def_or_undef (parse_in, "__goldmont_plus");
187 def_or_undef (parse_in, "__goldmont_plus__");
188 break;
189 case PROCESSOR_TREMONT:
190 def_or_undef (parse_in, "__tremont");
191 def_or_undef (parse_in, "__tremont__");
192 break;
193 case PROCESSOR_KNL:
194 def_or_undef (parse_in, "__knl");
195 def_or_undef (parse_in, "__knl__");
196 break;
197 case PROCESSOR_KNM:
198 def_or_undef (parse_in, "__knm");
199 def_or_undef (parse_in, "__knm__");
200 break;
201 case PROCESSOR_SKYLAKE:
202 def_or_undef (parse_in, "__skylake");
203 def_or_undef (parse_in, "__skylake__");
204 break;
205 case PROCESSOR_SKYLAKE_AVX512:
206 def_or_undef (parse_in, "__skylake_avx512");
207 def_or_undef (parse_in, "__skylake_avx512__");
208 break;
209 case PROCESSOR_CANNONLAKE:
210 def_or_undef (parse_in, "__cannonlake");
211 def_or_undef (parse_in, "__cannonlake__");
212 break;
213 case PROCESSOR_ICELAKE_CLIENT:
214 def_or_undef (parse_in, "__icelake_client");
215 def_or_undef (parse_in, "__icelake_client__");
216 break;
217 case PROCESSOR_ICELAKE_SERVER:
218 def_or_undef (parse_in, "__icelake_server");
219 def_or_undef (parse_in, "__icelake_server__");
220 break;
221 /* use PROCESSOR_max to not set/unset the arch macro. */
222 case PROCESSOR_max:
223 break;
224 case PROCESSOR_INTEL:
225 case PROCESSOR_GENERIC:
226 gcc_unreachable ();
229 /* Built-ins based on -mtune=. */
230 switch (tune)
232 case PROCESSOR_I386:
233 def_or_undef (parse_in, "__tune_i386__");
234 break;
235 case PROCESSOR_I486:
236 def_or_undef (parse_in, "__tune_i486__");
237 break;
238 case PROCESSOR_PENTIUM:
239 def_or_undef (parse_in, "__tune_i586__");
240 def_or_undef (parse_in, "__tune_pentium__");
241 if (last_tune_char == 'x')
242 def_or_undef (parse_in, "__tune_pentium_mmx__");
243 break;
244 case PROCESSOR_PENTIUMPRO:
245 def_or_undef (parse_in, "__tune_i686__");
246 def_or_undef (parse_in, "__tune_pentiumpro__");
247 switch (last_tune_char)
249 case '3':
250 def_or_undef (parse_in, "__tune_pentium3__");
251 /* FALLTHRU */
252 case '2':
253 def_or_undef (parse_in, "__tune_pentium2__");
254 break;
256 break;
257 case PROCESSOR_GEODE:
258 def_or_undef (parse_in, "__tune_geode__");
259 break;
260 case PROCESSOR_K6:
261 def_or_undef (parse_in, "__tune_k6__");
262 if (last_tune_char == '2')
263 def_or_undef (parse_in, "__tune_k6_2__");
264 else if (last_tune_char == '3')
265 def_or_undef (parse_in, "__tune_k6_3__");
266 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
267 def_or_undef (parse_in, "__tune_k6_3__");
268 break;
269 case PROCESSOR_ATHLON:
270 def_or_undef (parse_in, "__tune_athlon__");
271 if (isa_flag & OPTION_MASK_ISA_SSE)
272 def_or_undef (parse_in, "__tune_athlon_sse__");
273 break;
274 case PROCESSOR_K8:
275 def_or_undef (parse_in, "__tune_k8__");
276 break;
277 case PROCESSOR_AMDFAM10:
278 def_or_undef (parse_in, "__tune_amdfam10__");
279 break;
280 case PROCESSOR_BDVER1:
281 def_or_undef (parse_in, "__tune_bdver1__");
282 break;
283 case PROCESSOR_BDVER2:
284 def_or_undef (parse_in, "__tune_bdver2__");
285 break;
286 case PROCESSOR_BDVER3:
287 def_or_undef (parse_in, "__tune_bdver3__");
288 break;
289 case PROCESSOR_BDVER4:
290 def_or_undef (parse_in, "__tune_bdver4__");
291 break;
292 case PROCESSOR_ZNVER1:
293 def_or_undef (parse_in, "__tune_znver1__");
294 break;
295 case PROCESSOR_ZNVER2:
296 def_or_undef (parse_in, "__tune_znver2__");
297 break;
298 case PROCESSOR_BTVER1:
299 def_or_undef (parse_in, "__tune_btver1__");
300 break;
301 case PROCESSOR_BTVER2:
302 def_or_undef (parse_in, "__tune_btver2__");
303 break;
304 case PROCESSOR_PENTIUM4:
305 def_or_undef (parse_in, "__tune_pentium4__");
306 break;
307 case PROCESSOR_NOCONA:
308 def_or_undef (parse_in, "__tune_nocona__");
309 break;
310 case PROCESSOR_CORE2:
311 def_or_undef (parse_in, "__tune_core2__");
312 break;
313 case PROCESSOR_NEHALEM:
314 def_or_undef (parse_in, "__tune_corei7__");
315 def_or_undef (parse_in, "__tune_nehalem__");
316 break;
317 case PROCESSOR_SANDYBRIDGE:
318 def_or_undef (parse_in, "__tune_corei7_avx__");
319 def_or_undef (parse_in, "__tune_sandybridge__");
320 break;
321 case PROCESSOR_HASWELL:
322 def_or_undef (parse_in, "__tune_core_avx2__");
323 def_or_undef (parse_in, "__tune_haswell__");
324 break;
325 case PROCESSOR_BONNELL:
326 def_or_undef (parse_in, "__tune_atom__");
327 def_or_undef (parse_in, "__tune_bonnell__");
328 break;
329 case PROCESSOR_SILVERMONT:
330 def_or_undef (parse_in, "__tune_slm__");
331 def_or_undef (parse_in, "__tune_silvermont__");
332 break;
333 case PROCESSOR_GOLDMONT:
334 def_or_undef (parse_in, "__tune_goldmont__");
335 break;
336 case PROCESSOR_GOLDMONT_PLUS:
337 def_or_undef (parse_in, "__tune_goldmont_plus__");
338 break;
339 case PROCESSOR_TREMONT:
340 def_or_undef (parse_in, "__tune_tremont__");
341 break;
342 case PROCESSOR_KNL:
343 def_or_undef (parse_in, "__tune_knl__");
344 break;
345 case PROCESSOR_KNM:
346 def_or_undef (parse_in, "__tune_knm__");
347 break;
348 case PROCESSOR_SKYLAKE:
349 def_or_undef (parse_in, "__tune_skylake__");
350 break;
351 case PROCESSOR_SKYLAKE_AVX512:
352 def_or_undef (parse_in, "__tune_skylake_avx512__");
353 break;
354 case PROCESSOR_CANNONLAKE:
355 def_or_undef (parse_in, "__tune_cannonlake__");
356 break;
357 case PROCESSOR_ICELAKE_CLIENT:
358 def_or_undef (parse_in, "__tune_icelake_client__");
359 break;
360 case PROCESSOR_ICELAKE_SERVER:
361 def_or_undef (parse_in, "__tune_icelake_server__");
362 break;
363 case PROCESSOR_LAKEMONT:
364 def_or_undef (parse_in, "__tune_lakemont__");
365 break;
366 case PROCESSOR_INTEL:
367 case PROCESSOR_GENERIC:
368 break;
369 /* use PROCESSOR_max to not set/unset the tune macro. */
370 case PROCESSOR_max:
371 break;
374 switch (ix86_cmodel)
376 case CM_SMALL:
377 case CM_SMALL_PIC:
378 def_or_undef (parse_in, "__code_model_small__");
379 break;
380 case CM_MEDIUM:
381 case CM_MEDIUM_PIC:
382 def_or_undef (parse_in, "__code_model_medium__");
383 break;
384 case CM_LARGE:
385 case CM_LARGE_PIC:
386 def_or_undef (parse_in, "__code_model_large__");
387 break;
388 case CM_32:
389 def_or_undef (parse_in, "__code_model_32__");
390 break;
391 case CM_KERNEL:
392 def_or_undef (parse_in, "__code_model_kernel__");
393 break;
394 default:
398 if (isa_flag2 & OPTION_MASK_ISA_WBNOINVD)
399 def_or_undef (parse_in, "__WBNOINVD__");
400 if (isa_flag & OPTION_MASK_ISA_MMX)
401 def_or_undef (parse_in, "__MMX__");
402 if (isa_flag & OPTION_MASK_ISA_3DNOW)
403 def_or_undef (parse_in, "__3dNOW__");
404 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
405 def_or_undef (parse_in, "__3dNOW_A__");
406 if (isa_flag & OPTION_MASK_ISA_SSE)
407 def_or_undef (parse_in, "__SSE__");
408 if (isa_flag & OPTION_MASK_ISA_SSE2)
409 def_or_undef (parse_in, "__SSE2__");
410 if (isa_flag & OPTION_MASK_ISA_SSE3)
411 def_or_undef (parse_in, "__SSE3__");
412 if (isa_flag & OPTION_MASK_ISA_SSSE3)
413 def_or_undef (parse_in, "__SSSE3__");
414 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
415 def_or_undef (parse_in, "__SSE4_1__");
416 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
417 def_or_undef (parse_in, "__SSE4_2__");
418 if (isa_flag & OPTION_MASK_ISA_AES)
419 def_or_undef (parse_in, "__AES__");
420 if (isa_flag & OPTION_MASK_ISA_SHA)
421 def_or_undef (parse_in, "__SHA__");
422 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
423 def_or_undef (parse_in, "__PCLMUL__");
424 if (isa_flag & OPTION_MASK_ISA_AVX)
425 def_or_undef (parse_in, "__AVX__");
426 if (isa_flag & OPTION_MASK_ISA_AVX2)
427 def_or_undef (parse_in, "__AVX2__");
428 if (isa_flag & OPTION_MASK_ISA_AVX512F)
429 def_or_undef (parse_in, "__AVX512F__");
430 if (isa_flag & OPTION_MASK_ISA_AVX512ER)
431 def_or_undef (parse_in, "__AVX512ER__");
432 if (isa_flag & OPTION_MASK_ISA_AVX512CD)
433 def_or_undef (parse_in, "__AVX512CD__");
434 if (isa_flag & OPTION_MASK_ISA_AVX512PF)
435 def_or_undef (parse_in, "__AVX512PF__");
436 if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
437 def_or_undef (parse_in, "__AVX512DQ__");
438 if (isa_flag & OPTION_MASK_ISA_AVX512BW)
439 def_or_undef (parse_in, "__AVX512BW__");
440 if (isa_flag & OPTION_MASK_ISA_AVX512VL)
441 def_or_undef (parse_in, "__AVX512VL__");
442 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
443 def_or_undef (parse_in, "__AVX512VBMI__");
444 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
445 def_or_undef (parse_in, "__AVX512IFMA__");
446 if (isa_flag2 & OPTION_MASK_ISA_AVX5124VNNIW)
447 def_or_undef (parse_in, "__AVX5124VNNIW__");
448 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
449 def_or_undef (parse_in, "__AVX512VBMI2__");
450 if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
451 def_or_undef (parse_in, "__AVX512VNNI__");
452 if (isa_flag2 & OPTION_MASK_ISA_PCONFIG)
453 def_or_undef (parse_in, "__PCONFIG__");
454 if (isa_flag2 & OPTION_MASK_ISA_SGX)
455 def_or_undef (parse_in, "__SGX__");
456 if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
457 def_or_undef (parse_in, "__AVX5124FMAPS__");
458 if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
459 def_or_undef (parse_in, "__AVX512BITALG__");
460 if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
461 def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
462 if (isa_flag & OPTION_MASK_ISA_FMA)
463 def_or_undef (parse_in, "__FMA__");
464 if (isa_flag & OPTION_MASK_ISA_RTM)
465 def_or_undef (parse_in, "__RTM__");
466 if (isa_flag & OPTION_MASK_ISA_SSE4A)
467 def_or_undef (parse_in, "__SSE4A__");
468 if (isa_flag & OPTION_MASK_ISA_FMA4)
469 def_or_undef (parse_in, "__FMA4__");
470 if (isa_flag & OPTION_MASK_ISA_XOP)
471 def_or_undef (parse_in, "__XOP__");
472 if (isa_flag & OPTION_MASK_ISA_LWP)
473 def_or_undef (parse_in, "__LWP__");
474 if (isa_flag & OPTION_MASK_ISA_ABM)
475 def_or_undef (parse_in, "__ABM__");
476 if (isa_flag & OPTION_MASK_ISA_BMI)
477 def_or_undef (parse_in, "__BMI__");
478 if (isa_flag & OPTION_MASK_ISA_BMI2)
479 def_or_undef (parse_in, "__BMI2__");
480 if (isa_flag & OPTION_MASK_ISA_LZCNT)
481 def_or_undef (parse_in, "__LZCNT__");
482 if (isa_flag & OPTION_MASK_ISA_TBM)
483 def_or_undef (parse_in, "__TBM__");
484 if (isa_flag & OPTION_MASK_ISA_POPCNT)
485 def_or_undef (parse_in, "__POPCNT__");
486 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
487 def_or_undef (parse_in, "__FSGSBASE__");
488 if (isa_flag & OPTION_MASK_ISA_RDRND)
489 def_or_undef (parse_in, "__RDRND__");
490 if (isa_flag & OPTION_MASK_ISA_F16C)
491 def_or_undef (parse_in, "__F16C__");
492 if (isa_flag & OPTION_MASK_ISA_RDSEED)
493 def_or_undef (parse_in, "__RDSEED__");
494 if (isa_flag & OPTION_MASK_ISA_PRFCHW)
495 def_or_undef (parse_in, "__PRFCHW__");
496 if (isa_flag & OPTION_MASK_ISA_ADX)
497 def_or_undef (parse_in, "__ADX__");
498 if (isa_flag & OPTION_MASK_ISA_FXSR)
499 def_or_undef (parse_in, "__FXSR__");
500 if (isa_flag & OPTION_MASK_ISA_XSAVE)
501 def_or_undef (parse_in, "__XSAVE__");
502 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
503 def_or_undef (parse_in, "__XSAVEOPT__");
504 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1)
505 def_or_undef (parse_in, "__PREFETCHWT1__");
506 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
507 def_or_undef (parse_in, "__SSE_MATH__");
508 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
509 def_or_undef (parse_in, "__SSE2_MATH__");
510 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
511 def_or_undef (parse_in, "__CLFLUSHOPT__");
512 if (isa_flag2 & OPTION_MASK_ISA_CLZERO)
513 def_or_undef (parse_in, "__CLZERO__");
514 if (isa_flag & OPTION_MASK_ISA_XSAVEC)
515 def_or_undef (parse_in, "__XSAVEC__");
516 if (isa_flag & OPTION_MASK_ISA_XSAVES)
517 def_or_undef (parse_in, "__XSAVES__");
518 if (isa_flag & OPTION_MASK_ISA_CLWB)
519 def_or_undef (parse_in, "__CLWB__");
520 if (isa_flag2 & OPTION_MASK_ISA_MWAITX)
521 def_or_undef (parse_in, "__MWAITX__");
522 if (isa_flag & OPTION_MASK_ISA_PKU)
523 def_or_undef (parse_in, "__PKU__");
524 if (isa_flag2 & OPTION_MASK_ISA_RDPID)
525 def_or_undef (parse_in, "__RDPID__");
526 if (isa_flag & OPTION_MASK_ISA_GFNI)
527 def_or_undef (parse_in, "__GFNI__");
528 if ((isa_flag & OPTION_MASK_ISA_SHSTK))
529 def_or_undef (parse_in, "__SHSTK__");
530 if (isa_flag2 & OPTION_MASK_ISA_VAES)
531 def_or_undef (parse_in, "__VAES__");
532 if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
533 def_or_undef (parse_in, "__VPCLMULQDQ__");
534 if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
535 def_or_undef (parse_in, "__MOVDIRI__");
536 if (isa_flag2 & OPTION_MASK_ISA_MOVDIR64B)
537 def_or_undef (parse_in, "__MOVDIR64B__");
538 if (isa_flag2 & OPTION_MASK_ISA_WAITPKG)
539 def_or_undef (parse_in, "__WAITPKG__");
540 if (isa_flag2 & OPTION_MASK_ISA_CLDEMOTE)
541 def_or_undef (parse_in, "__CLDEMOTE__");
542 if (isa_flag2 & OPTION_MASK_ISA_PTWRITE)
543 def_or_undef (parse_in, "__PTWRITE__");
544 if (TARGET_IAMCU)
546 def_or_undef (parse_in, "__iamcu");
547 def_or_undef (parse_in, "__iamcu__");
552 /* Hook to validate the current #pragma GCC target and set the state, and
553 update the macros based on what was changed. If ARGS is NULL, then
554 POP_TARGET is used to reset the options. */
556 static bool
557 ix86_pragma_target_parse (tree args, tree pop_target)
559 tree prev_tree = build_target_option_node (&global_options);
560 tree cur_tree;
561 struct cl_target_option *prev_opt;
562 struct cl_target_option *cur_opt;
563 HOST_WIDE_INT prev_isa;
564 HOST_WIDE_INT cur_isa;
565 HOST_WIDE_INT diff_isa;
566 HOST_WIDE_INT prev_isa2;
567 HOST_WIDE_INT cur_isa2;
568 HOST_WIDE_INT diff_isa2;
569 enum processor_type prev_arch;
570 enum processor_type prev_tune;
571 enum processor_type cur_arch;
572 enum processor_type cur_tune;
574 if (! args)
576 cur_tree = (pop_target ? pop_target : target_option_default_node);
577 cl_target_option_restore (&global_options,
578 TREE_TARGET_OPTION (cur_tree));
580 else
582 cur_tree = ix86_valid_target_attribute_tree (args, &global_options,
583 &global_options_set);
584 if (!cur_tree || cur_tree == error_mark_node)
586 cl_target_option_restore (&global_options,
587 TREE_TARGET_OPTION (prev_tree));
588 return false;
592 target_option_current_node = cur_tree;
593 ix86_reset_previous_fndecl ();
595 /* Figure out the previous/current isa, arch, tune and the differences. */
596 prev_opt = TREE_TARGET_OPTION (prev_tree);
597 cur_opt = TREE_TARGET_OPTION (cur_tree);
598 prev_isa = prev_opt->x_ix86_isa_flags;
599 cur_isa = cur_opt->x_ix86_isa_flags;
600 diff_isa = (prev_isa ^ cur_isa);
601 prev_isa2 = prev_opt->x_ix86_isa_flags2;
602 cur_isa2 = cur_opt->x_ix86_isa_flags2;
603 diff_isa2 = (prev_isa2 ^ cur_isa2);
604 prev_arch = (enum processor_type) prev_opt->arch;
605 prev_tune = (enum processor_type) prev_opt->tune;
606 cur_arch = (enum processor_type) cur_opt->arch;
607 cur_tune = (enum processor_type) cur_opt->tune;
609 /* If the same processor is used for both previous and current options, don't
610 change the macros. */
611 if (cur_arch == prev_arch)
612 cur_arch = prev_arch = PROCESSOR_max;
614 if (cur_tune == prev_tune)
615 cur_tune = prev_tune = PROCESSOR_max;
617 /* Undef all of the macros for that are no longer current. */
618 ix86_target_macros_internal (prev_isa & diff_isa,
619 prev_isa2 & diff_isa2,
620 prev_arch,
621 prev_tune,
622 (enum fpmath_unit) prev_opt->x_ix86_fpmath,
623 cpp_undef);
625 /* For the definitions, ensure all newly defined macros are considered
626 as used for -Wunused-macros. There is no point warning about the
627 compiler predefined macros. */
628 cpp_options *cpp_opts = cpp_get_options (parse_in);
629 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
630 cpp_opts->warn_unused_macros = 0;
632 /* Define all of the macros for new options that were just turned on. */
633 ix86_target_macros_internal (cur_isa & diff_isa,
634 cur_isa2 & diff_isa2,
635 cur_arch,
636 cur_tune,
637 (enum fpmath_unit) cur_opt->x_ix86_fpmath,
638 cpp_define);
640 cpp_opts->warn_unused_macros = saved_warn_unused_macros;
642 return true;
645 /* Function to tell the preprocessor about the defines for the current target. */
647 void
648 ix86_target_macros (void)
650 /* 32/64-bit won't change with target specific options, so do the assert and
651 builtin_define_std calls here. */
652 if (TARGET_64BIT)
654 cpp_assert (parse_in, "cpu=x86_64");
655 cpp_assert (parse_in, "machine=x86_64");
656 cpp_define (parse_in, "__amd64");
657 cpp_define (parse_in, "__amd64__");
658 cpp_define (parse_in, "__x86_64");
659 cpp_define (parse_in, "__x86_64__");
660 if (TARGET_X32)
662 cpp_define (parse_in, "_ILP32");
663 cpp_define (parse_in, "__ILP32__");
666 else
668 cpp_assert (parse_in, "cpu=i386");
669 cpp_assert (parse_in, "machine=i386");
670 builtin_define_std ("i386");
673 if (!TARGET_80387)
674 cpp_define (parse_in, "_SOFT_FLOAT");
676 if (TARGET_LONG_DOUBLE_64)
677 cpp_define (parse_in, "__LONG_DOUBLE_64__");
679 if (TARGET_LONG_DOUBLE_128)
680 cpp_define (parse_in, "__LONG_DOUBLE_128__");
682 if (TARGET_128BIT_LONG_DOUBLE)
683 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16");
684 else
685 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12");
687 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
689 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
690 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
692 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
694 ix86_target_macros_internal (ix86_isa_flags,
695 ix86_isa_flags2,
696 ix86_arch,
697 ix86_tune,
698 ix86_fpmath,
699 cpp_define);
701 cpp_define (parse_in, "__SEG_FS");
702 cpp_define (parse_in, "__SEG_GS");
704 if (flag_cf_protection != CF_NONE)
705 cpp_define_formatted (parse_in, "__CET__=%d",
706 flag_cf_protection & ~CF_SET);
710 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
711 option here rather than in i386.c since it will pull in various preprocessor
712 functions, and those are not present in languages like fortran without a
713 preprocessor. */
715 void
716 ix86_register_pragmas (void)
718 /* Update pragma hook to allow parsing #pragma GCC target. */
719 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
721 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
722 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
724 #ifdef REGISTER_SUBTARGET_PRAGMAS
725 REGISTER_SUBTARGET_PRAGMAS ();
726 #endif