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[official-gcc.git] / gomp-20050608-branch / gcc / config / mips / vxworks.h
blobbf37901bac3c21b88fc5016fcd4030cf9e26103f
1 /* Copyright (C) 1999, 2003, 2004 Free Software Foundation, Inc.
3 This file is part of GCC.
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2, or (at your option)
8 any later version.
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with GCC; see the file COPYING. If not, write to
17 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
18 Boston, MA 02110-1301, USA. */
20 #undef TARGET_VERSION
21 #define TARGET_VERSION fprintf (stderr, " (MIPS, VxWorks syntax)");
23 /* Combination of mips.h and svr4.h. */
24 #undef SWITCH_TAKES_ARG
25 #define SWITCH_TAKES_ARG(CHAR) \
26 (DEFAULT_SWITCH_TAKES_ARG (CHAR) \
27 || (CHAR) == 'G' \
28 || (CHAR) == 'h' \
29 || (CHAR) == 'x' \
30 || (CHAR) == 'z')
32 #undef ASM_SPEC
33 #define ASM_SPEC "\
34 %{!G:-G 0} %{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \
35 %{mips32} %{mips32r2} %{mips64} \
36 %{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \
37 %(subtarget_asm_optimizing_spec) \
38 %(subtarget_asm_debugging_spec) \
39 %{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
40 %{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
41 %{mtune=*} %{v} \
42 %(subtarget_asm_spec)"
44 #undef LINK_SPEC
45 /* LINK_SPEC is clobbered in svr4.h. ugh! */
46 #define LINK_SPEC "\
47 %(endian_spec) \
48 %{!G:-G 0} %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} \
49 %{bestGnum}"
51 #define TARGET_OS_CPP_BUILTINS() \
52 do \
53 { \
54 builtin_define ("__vxworks"); \
55 builtin_assert ("system=unix"); \
56 } \
57 while (0)
59 #undef SUBTARGET_CPP_SPEC
60 #define SUBTARGET_CPP_SPEC \
61 "%{!DCPU=*: %{mips3|mips4|mips64:-DCPU=MIPS64;:-DCPU=MIPS32}} \
62 %{EL|mel:-DMIPSEL;:-DMIPSEB} \
63 %{msoft-float:-DSOFT_FLOAT} \
64 %{mips1:-D_WRS_R3K_EXC_SUPPORT}"
66 /* No sdata. */
67 #undef MIPS_DEFAULT_GVALUE
68 #define MIPS_DEFAULT_GVALUE 0