1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, reg_qty[N] will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
205 /* Length of qty_table vector. We know in advance we will not need
206 a quantity number this big. */
210 /* Next quantity number to be allocated.
211 This is 1 + the largest number needed so far. */
215 /* Per-qty information tracking.
217 `first_reg' and `last_reg' track the head and tail of the
218 chain of registers which currently contain this quantity.
220 `mode' contains the machine mode of this quantity.
222 `const_rtx' holds the rtx of the constant value of this
223 quantity, if known. A summations of the frame/arg pointer
224 and a constant can also be entered here. When this holds
225 a known value, `const_insn' is the insn which stored the
228 `comparison_{code,const,qty}' are used to track when a
229 comparison between a quantity and some constant or register has
230 been passed. In such a case, we know the results of the comparison
231 in case we see it again. These members record a comparison that
232 is known to be true. `comparison_code' holds the rtx code of such
233 a comparison, else it is set to UNKNOWN and the other two
234 comparison members are undefined. `comparison_const' holds
235 the constant being compared against, or zero if the comparison
236 is not against a constant. `comparison_qty' holds the quantity
237 being compared against when the result is known. If the comparison
238 is not with a register, `comparison_qty' is -1. */
240 struct qty_table_elem
244 rtx comparison_const
;
246 unsigned int first_reg
, last_reg
;
247 /* The sizes of these fields should match the sizes of the
248 code and mode fields of struct rtx_def (see rtl.h). */
249 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
250 ENUM_BITFIELD(machine_mode
) mode
: 8;
253 /* The table of all qtys, indexed by qty number. */
254 static struct qty_table_elem
*qty_table
;
256 /* Structure used to pass arguments via for_each_rtx to function
257 cse_change_cc_mode. */
258 struct change_cc_mode_args
265 /* For machines that have a CC0, we do not record its value in the hash
266 table since its use is guaranteed to be the insn immediately following
267 its definition and any other insn is presumed to invalidate it.
269 Instead, we store below the value last assigned to CC0. If it should
270 happen to be a constant, it is stored in preference to the actual
271 assigned value. In case it is a constant, we store the mode in which
272 the constant should be interpreted. */
274 static rtx prev_insn_cc0
;
275 static enum machine_mode prev_insn_cc0_mode
;
277 /* Previous actual insn. 0 if at first insn of basic block. */
279 static rtx prev_insn
;
282 /* Insn being scanned. */
284 static rtx this_insn
;
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
290 Or -1 if this register is at the end of the chain.
292 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
294 /* Per-register equivalence chain. */
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem
*reg_eqv_table
;
305 /* Next in hash chain. */
306 struct cse_reg_info
*hash_next
;
308 /* The next cse_reg_info structure in the free or used list. */
309 struct cse_reg_info
*next
;
314 /* The quantity number of the register's current contents. */
317 /* The number of times the register has been altered in the current
321 /* The REG_TICK value at which rtx's containing this register are
322 valid in the hash table. If this does not equal the current
323 reg_tick value, such expressions existing in the hash table are
327 /* The SUBREG that was set when REG_TICK was last incremented. Set
328 to -1 if the last store was to the whole register, not a subreg. */
329 unsigned int subreg_ticked
;
332 /* We maintain a linked list of cse_reg_info instances, which is
333 partitioned into two pieces. The first part, pointed to by
334 cse_reg_info_list, is a list of those entries that are in use. The
335 second part, pointed to by cse_reg_info_list_free, is a list of
336 those entries that are not in use.
338 We combine these two parts into one linked list for efficiency.
339 Specifically, when we take an element from the second part and want
340 to move it to the first part, all we have to do is move the pointer
341 cse_reg_info_list_free to the next element. Also, if we wish to
342 move all elements into the second part, we just have to move the
343 pointer to the first element of the list. */
345 /* A linked list of cse_reg_info entries that have been allocated so
347 static struct cse_reg_info
*cse_reg_info_list
;
349 /* A pointer to the first unused entry in the above linked list. */
350 static struct cse_reg_info
*cse_reg_info_list_free
;
352 /* A mapping from registers to cse_reg_info data structures. */
353 #define REGHASH_SHIFT 7
354 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
355 #define REGHASH_MASK (REGHASH_SIZE - 1)
356 static struct cse_reg_info
*reg_hash
[REGHASH_SIZE
];
358 #define REGHASH_FN(REGNO) \
359 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
361 /* The last lookup we did into the cse_reg_info_tree. This allows us
362 to cache repeated lookups. */
363 static unsigned int cached_regno
;
364 static struct cse_reg_info
*cached_cse_reg_info
;
366 /* A HARD_REG_SET containing all the hard registers for which there is
367 currently a REG expression in the hash table. Note the difference
368 from the above variables, which indicate if the REG is mentioned in some
369 expression in the table. */
371 static HARD_REG_SET hard_regs_in_table
;
373 /* CUID of insn that starts the basic block currently being cse-processed. */
375 static int cse_basic_block_start
;
377 /* CUID of insn that ends the basic block currently being cse-processed. */
379 static int cse_basic_block_end
;
381 /* Vector mapping INSN_UIDs to cuids.
382 The cuids are like uids but increase monotonically always.
383 We use them to see whether a reg is used outside a given basic block. */
385 static int *uid_cuid
;
387 /* Highest UID in UID_CUID. */
390 /* Get the cuid of an insn. */
392 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
394 /* Nonzero if this pass has made changes, and therefore it's
395 worthwhile to run the garbage collector. */
397 static int cse_altered
;
399 /* Nonzero if cse has altered conditional jump insns
400 in such a way that jump optimization should be redone. */
402 static int cse_jumps_altered
;
404 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
405 REG_LABEL, we have to rerun jump after CSE to put in the note. */
406 static int recorded_label_ref
;
408 /* canon_hash stores 1 in do_not_record
409 if it notices a reference to CC0, PC, or some other volatile
412 static int do_not_record
;
414 /* canon_hash stores 1 in hash_arg_in_memory
415 if it notices a reference to memory within the expression being hashed. */
417 static int hash_arg_in_memory
;
419 /* The hash table contains buckets which are chains of `struct table_elt's,
420 each recording one expression's information.
421 That expression is in the `exp' field.
423 The canon_exp field contains a canonical (from the point of view of
424 alias analysis) version of the `exp' field.
426 Those elements with the same hash code are chained in both directions
427 through the `next_same_hash' and `prev_same_hash' fields.
429 Each set of expressions with equivalent values
430 are on a two-way chain through the `next_same_value'
431 and `prev_same_value' fields, and all point with
432 the `first_same_value' field at the first element in
433 that chain. The chain is in order of increasing cost.
434 Each element's cost value is in its `cost' field.
436 The `in_memory' field is nonzero for elements that
437 involve any reference to memory. These elements are removed
438 whenever a write is done to an unidentified location in memory.
439 To be safe, we assume that a memory address is unidentified unless
440 the address is either a symbol constant or a constant plus
441 the frame pointer or argument pointer.
443 The `related_value' field is used to connect related expressions
444 (that differ by adding an integer).
445 The related expressions are chained in a circular fashion.
446 `related_value' is zero for expressions for which this
449 The `cost' field stores the cost of this element's expression.
450 The `regcost' field stores the value returned by approx_reg_cost for
451 this element's expression.
453 The `is_const' flag is set if the element is a constant (including
456 The `flag' field is used as a temporary during some search routines.
458 The `mode' field is usually the same as GET_MODE (`exp'), but
459 if `exp' is a CONST_INT and has no machine mode then the `mode'
460 field is the mode it was being used as. Each constant is
461 recorded separately for each mode it is used with. */
467 struct table_elt
*next_same_hash
;
468 struct table_elt
*prev_same_hash
;
469 struct table_elt
*next_same_value
;
470 struct table_elt
*prev_same_value
;
471 struct table_elt
*first_same_value
;
472 struct table_elt
*related_value
;
475 /* The size of this field should match the size
476 of the mode field of struct rtx_def (see rtl.h). */
477 ENUM_BITFIELD(machine_mode
) mode
: 8;
483 /* We don't want a lot of buckets, because we rarely have very many
484 things stored in the hash table, and a lot of buckets slows
485 down a lot of loops that happen frequently. */
487 #define HASH_SIZE (1 << HASH_SHIFT)
488 #define HASH_MASK (HASH_SIZE - 1)
490 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
491 register (hard registers may require `do_not_record' to be set). */
494 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
495 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
496 : canon_hash (X, M)) & HASH_MASK)
498 /* Like HASH, but without side-effects. */
499 #define SAFE_HASH(X, M) \
500 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
501 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
502 : safe_hash (X, M)) & HASH_MASK)
504 /* Determine whether register number N is considered a fixed register for the
505 purpose of approximating register costs.
506 It is desirable to replace other regs with fixed regs, to reduce need for
508 A reg wins if it is either the frame pointer or designated as fixed. */
509 #define FIXED_REGNO_P(N) \
510 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
511 || fixed_regs[N] || global_regs[N])
513 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
514 hard registers and pointers into the frame are the cheapest with a cost
515 of 0. Next come pseudos with a cost of one and other hard registers with
516 a cost of 2. Aside from these special cases, call `rtx_cost'. */
518 #define CHEAP_REGNO(N) \
519 (REGNO_PTR_FRAME_P(N) \
520 || (HARD_REGISTER_NUM_P (N) \
521 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
523 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
524 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
526 /* Get the info associated with register N. */
528 #define GET_CSE_REG_INFO(N) \
529 (((N) == cached_regno && cached_cse_reg_info) \
530 ? cached_cse_reg_info : get_cse_reg_info ((N)))
532 /* Get the number of times this register has been updated in this
535 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
537 /* Get the point at which REG was recorded in the table. */
539 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
541 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
544 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
546 /* Get the quantity number for REG. */
548 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
550 /* Determine if the quantity number for register X represents a valid index
551 into the qty_table. */
553 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
555 static struct table_elt
*table
[HASH_SIZE
];
557 /* Chain of `struct table_elt's made so far for this function
558 but currently removed from the table. */
560 static struct table_elt
*free_element_chain
;
562 /* Number of `struct table_elt' structures made so far for this function. */
564 static int n_elements_made
;
566 /* Maximum value `n_elements_made' has had so far in this compilation
567 for functions previously processed. */
569 static int max_elements_made
;
571 /* Set to the cost of a constant pool reference if one was found for a
572 symbolic constant. If this was found, it means we should try to
573 convert constants into constant pool entries if they don't fit in
576 static int constant_pool_entries_cost
;
577 static int constant_pool_entries_regcost
;
579 /* This data describes a block that will be processed by cse_basic_block. */
581 struct cse_basic_block_data
583 /* Lowest CUID value of insns in block. */
585 /* Highest CUID value of insns in block. */
587 /* Total number of SETs in block. */
589 /* Last insn in the block. */
591 /* Size of current branch path, if any. */
593 /* Current branch path, indicating which branches will be taken. */
596 /* The branch insn. */
598 /* Whether it should be taken or not. AROUND is the same as taken
599 except that it is used when the destination label is not preceded
601 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
605 static bool fixed_base_plus_p (rtx x
);
606 static int notreg_cost (rtx
, enum rtx_code
);
607 static int approx_reg_cost_1 (rtx
*, void *);
608 static int approx_reg_cost (rtx
);
609 static int preferable (int, int, int, int);
610 static void new_basic_block (void);
611 static void make_new_qty (unsigned int, enum machine_mode
);
612 static void make_regs_eqv (unsigned int, unsigned int);
613 static void delete_reg_equiv (unsigned int);
614 static int mention_regs (rtx
);
615 static int insert_regs (rtx
, struct table_elt
*, int);
616 static void remove_from_table (struct table_elt
*, unsigned);
617 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
618 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
619 static rtx
lookup_as_function (rtx
, enum rtx_code
);
620 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
622 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
623 static void invalidate (rtx
, enum machine_mode
);
624 static int cse_rtx_varies_p (rtx
, int);
625 static void remove_invalid_refs (unsigned int);
626 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
628 static void rehash_using_reg (rtx
);
629 static void invalidate_memory (void);
630 static void invalidate_for_call (void);
631 static rtx
use_related_value (rtx
, struct table_elt
*);
633 static inline unsigned canon_hash (rtx
, enum machine_mode
);
634 static inline unsigned safe_hash (rtx
, enum machine_mode
);
635 static unsigned hash_rtx_string (const char *);
637 static rtx
canon_reg (rtx
, rtx
);
638 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
639 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
641 enum machine_mode
*);
642 static rtx
fold_rtx (rtx
, rtx
);
643 static rtx
equiv_constant (rtx
);
644 static void record_jump_equiv (rtx
, int);
645 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
647 static void cse_insn (rtx
, rtx
);
648 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
650 static int addr_affects_sp_p (rtx
);
651 static void invalidate_from_clobbers (rtx
);
652 static rtx
cse_process_notes (rtx
, rtx
);
653 static void invalidate_skipped_set (rtx
, rtx
, void *);
654 static void invalidate_skipped_block (rtx
);
655 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*);
656 static void count_reg_usage (rtx
, int *, int);
657 static int check_for_label_ref (rtx
*, void *);
658 extern void dump_class (struct table_elt
*);
659 static struct cse_reg_info
* get_cse_reg_info (unsigned int);
660 static int check_dependence (rtx
*, void *);
662 static void flush_hash_table (void);
663 static bool insn_live_p (rtx
, int *);
664 static bool set_live_p (rtx
, rtx
, int *);
665 static bool dead_libcall_p (rtx
, int *);
666 static int cse_change_cc_mode (rtx
*, void *);
667 static void cse_change_cc_mode_insn (rtx
, rtx
);
668 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
669 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
672 #undef RTL_HOOKS_GEN_LOWPART
673 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
675 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
677 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
678 virtual regs here because the simplify_*_operation routines are called
679 by integrate.c, which is called before virtual register instantiation. */
682 fixed_base_plus_p (rtx x
)
684 switch (GET_CODE (x
))
687 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
689 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
691 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
692 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
697 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
699 return fixed_base_plus_p (XEXP (x
, 0));
706 /* Dump the expressions in the equivalence class indicated by CLASSP.
707 This function is used only for debugging. */
709 dump_class (struct table_elt
*classp
)
711 struct table_elt
*elt
;
713 fprintf (stderr
, "Equivalence chain for ");
714 print_rtl (stderr
, classp
->exp
);
715 fprintf (stderr
, ": \n");
717 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
719 print_rtl (stderr
, elt
->exp
);
720 fprintf (stderr
, "\n");
724 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
727 approx_reg_cost_1 (rtx
*xp
, void *data
)
734 unsigned int regno
= REGNO (x
);
736 if (! CHEAP_REGNO (regno
))
738 if (regno
< FIRST_PSEUDO_REGISTER
)
740 if (SMALL_REGISTER_CLASSES
)
752 /* Return an estimate of the cost of the registers used in an rtx.
753 This is mostly the number of different REG expressions in the rtx;
754 however for some exceptions like fixed registers we use a cost of
755 0. If any other hard register reference occurs, return MAX_COST. */
758 approx_reg_cost (rtx x
)
762 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
768 /* Returns a canonical version of X for the address, from the point of view,
769 that all multiplications are represented as MULT instead of the multiply
770 by a power of 2 being represented as ASHIFT. */
773 canon_for_address (rtx x
)
776 enum machine_mode mode
;
790 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
791 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (mode
)
792 && INTVAL (XEXP (x
, 1)) >= 0)
794 new = canon_for_address (XEXP (x
, 0));
795 new = gen_rtx_MULT (mode
, new,
796 gen_int_mode ((HOST_WIDE_INT
) 1
797 << INTVAL (XEXP (x
, 1)),
808 /* Now recursively process each operand of this operation. */
809 fmt
= GET_RTX_FORMAT (code
);
810 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
813 new = canon_for_address (XEXP (x
, i
));
819 /* Return a negative value if an rtx A, whose costs are given by COST_A
820 and REGCOST_A, is more desirable than an rtx B.
821 Return a positive value if A is less desirable, or 0 if the two are
824 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
826 /* First, get rid of cases involving expressions that are entirely
828 if (cost_a
!= cost_b
)
830 if (cost_a
== MAX_COST
)
832 if (cost_b
== MAX_COST
)
836 /* Avoid extending lifetimes of hardregs. */
837 if (regcost_a
!= regcost_b
)
839 if (regcost_a
== MAX_COST
)
841 if (regcost_b
== MAX_COST
)
845 /* Normal operation costs take precedence. */
846 if (cost_a
!= cost_b
)
847 return cost_a
- cost_b
;
848 /* Only if these are identical consider effects on register pressure. */
849 if (regcost_a
!= regcost_b
)
850 return regcost_a
- regcost_b
;
854 /* Internal function, to compute cost when X is not a register; called
855 from COST macro to keep it simple. */
858 notreg_cost (rtx x
, enum rtx_code outer
)
860 return ((GET_CODE (x
) == SUBREG
861 && REG_P (SUBREG_REG (x
))
862 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
863 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
864 && (GET_MODE_SIZE (GET_MODE (x
))
865 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
866 && subreg_lowpart_p (x
)
867 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
868 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
870 : rtx_cost (x
, outer
) * 2);
874 static struct cse_reg_info
*
875 get_cse_reg_info (unsigned int regno
)
877 struct cse_reg_info
**hash_head
= ®_hash
[REGHASH_FN (regno
)];
878 struct cse_reg_info
*p
;
880 for (p
= *hash_head
; p
!= NULL
; p
= p
->hash_next
)
881 if (p
->regno
== regno
)
886 /* Get a new cse_reg_info structure. */
887 if (cse_reg_info_list_free
)
889 p
= cse_reg_info_list_free
;
890 cse_reg_info_list_free
= p
->next
;
894 p
= xmalloc (sizeof (struct cse_reg_info
));
895 p
->next
= cse_reg_info_list
;
896 cse_reg_info_list
= p
;
899 /* Insert into hash table. */
900 p
->hash_next
= *hash_head
;
905 p
->reg_in_table
= -1;
906 p
->subreg_ticked
= -1;
907 p
->reg_qty
= -regno
- 1;
911 /* Cache this lookup; we tend to be looking up information about the
912 same register several times in a row. */
913 cached_regno
= regno
;
914 cached_cse_reg_info
= p
;
919 /* Clear the hash table and initialize each register with its own quantity,
920 for a new basic block. */
923 new_basic_block (void)
929 /* Clear out hash table state for this pass. */
931 memset (reg_hash
, 0, sizeof reg_hash
);
933 cse_reg_info_list_free
= cse_reg_info_list
;
935 cached_cse_reg_info
= 0;
937 CLEAR_HARD_REG_SET (hard_regs_in_table
);
939 /* The per-quantity values used to be initialized here, but it is
940 much faster to initialize each as it is made in `make_new_qty'. */
942 for (i
= 0; i
< HASH_SIZE
; i
++)
944 struct table_elt
*first
;
949 struct table_elt
*last
= first
;
953 while (last
->next_same_hash
!= NULL
)
954 last
= last
->next_same_hash
;
956 /* Now relink this hash entire chain into
957 the free element list. */
959 last
->next_same_hash
= free_element_chain
;
960 free_element_chain
= first
;
970 /* Say that register REG contains a quantity in mode MODE not in any
971 register before and initialize that quantity. */
974 make_new_qty (unsigned int reg
, enum machine_mode mode
)
977 struct qty_table_elem
*ent
;
978 struct reg_eqv_elem
*eqv
;
980 gcc_assert (next_qty
< max_qty
);
982 q
= REG_QTY (reg
) = next_qty
++;
984 ent
->first_reg
= reg
;
987 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
988 ent
->comparison_code
= UNKNOWN
;
990 eqv
= ®_eqv_table
[reg
];
991 eqv
->next
= eqv
->prev
= -1;
994 /* Make reg NEW equivalent to reg OLD.
995 OLD is not changing; NEW is. */
998 make_regs_eqv (unsigned int new, unsigned int old
)
1000 unsigned int lastr
, firstr
;
1001 int q
= REG_QTY (old
);
1002 struct qty_table_elem
*ent
;
1004 ent
= &qty_table
[q
];
1006 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1007 gcc_assert (REGNO_QTY_VALID_P (old
));
1010 firstr
= ent
->first_reg
;
1011 lastr
= ent
->last_reg
;
1013 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1014 hard regs. Among pseudos, if NEW will live longer than any other reg
1015 of the same qty, and that is beyond the current basic block,
1016 make it the new canonical replacement for this qty. */
1017 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
1018 /* Certain fixed registers might be of the class NO_REGS. This means
1019 that not only can they not be allocated by the compiler, but
1020 they cannot be used in substitutions or canonicalizations
1022 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
1023 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
1024 || (new >= FIRST_PSEUDO_REGISTER
1025 && (firstr
< FIRST_PSEUDO_REGISTER
1026 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
1027 || (uid_cuid
[REGNO_FIRST_UID (new)]
1028 < cse_basic_block_start
))
1029 && (uid_cuid
[REGNO_LAST_UID (new)]
1030 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
1032 reg_eqv_table
[firstr
].prev
= new;
1033 reg_eqv_table
[new].next
= firstr
;
1034 reg_eqv_table
[new].prev
= -1;
1035 ent
->first_reg
= new;
1039 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1040 Otherwise, insert before any non-fixed hard regs that are at the
1041 end. Registers of class NO_REGS cannot be used as an
1042 equivalent for anything. */
1043 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
1044 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
1045 && new >= FIRST_PSEUDO_REGISTER
)
1046 lastr
= reg_eqv_table
[lastr
].prev
;
1047 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
1048 if (reg_eqv_table
[lastr
].next
>= 0)
1049 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1051 qty_table
[q
].last_reg
= new;
1052 reg_eqv_table
[lastr
].next
= new;
1053 reg_eqv_table
[new].prev
= lastr
;
1057 /* Remove REG from its equivalence class. */
1060 delete_reg_equiv (unsigned int reg
)
1062 struct qty_table_elem
*ent
;
1063 int q
= REG_QTY (reg
);
1066 /* If invalid, do nothing. */
1067 if (! REGNO_QTY_VALID_P (reg
))
1070 ent
= &qty_table
[q
];
1072 p
= reg_eqv_table
[reg
].prev
;
1073 n
= reg_eqv_table
[reg
].next
;
1076 reg_eqv_table
[n
].prev
= p
;
1080 reg_eqv_table
[p
].next
= n
;
1084 REG_QTY (reg
) = -reg
- 1;
1087 /* Remove any invalid expressions from the hash table
1088 that refer to any of the registers contained in expression X.
1090 Make sure that newly inserted references to those registers
1091 as subexpressions will be considered valid.
1093 mention_regs is not called when a register itself
1094 is being stored in the table.
1096 Return 1 if we have done something that may have changed the hash code
1100 mention_regs (rtx x
)
1110 code
= GET_CODE (x
);
1113 unsigned int regno
= REGNO (x
);
1114 unsigned int endregno
1115 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1116 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1119 for (i
= regno
; i
< endregno
; i
++)
1121 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1122 remove_invalid_refs (i
);
1124 REG_IN_TABLE (i
) = REG_TICK (i
);
1125 SUBREG_TICKED (i
) = -1;
1131 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1132 pseudo if they don't use overlapping words. We handle only pseudos
1133 here for simplicity. */
1134 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1135 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1137 unsigned int i
= REGNO (SUBREG_REG (x
));
1139 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1141 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1142 the last store to this register really stored into this
1143 subreg, then remove the memory of this subreg.
1144 Otherwise, remove any memory of the entire register and
1145 all its subregs from the table. */
1146 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1147 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1148 remove_invalid_refs (i
);
1150 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1153 REG_IN_TABLE (i
) = REG_TICK (i
);
1154 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1158 /* If X is a comparison or a COMPARE and either operand is a register
1159 that does not have a quantity, give it one. This is so that a later
1160 call to record_jump_equiv won't cause X to be assigned a different
1161 hash code and not found in the table after that call.
1163 It is not necessary to do this here, since rehash_using_reg can
1164 fix up the table later, but doing this here eliminates the need to
1165 call that expensive function in the most common case where the only
1166 use of the register is in the comparison. */
1168 if (code
== COMPARE
|| COMPARISON_P (x
))
1170 if (REG_P (XEXP (x
, 0))
1171 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1172 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1174 rehash_using_reg (XEXP (x
, 0));
1178 if (REG_P (XEXP (x
, 1))
1179 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1180 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1182 rehash_using_reg (XEXP (x
, 1));
1187 fmt
= GET_RTX_FORMAT (code
);
1188 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1190 changed
|= mention_regs (XEXP (x
, i
));
1191 else if (fmt
[i
] == 'E')
1192 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1193 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1198 /* Update the register quantities for inserting X into the hash table
1199 with a value equivalent to CLASSP.
1200 (If the class does not contain a REG, it is irrelevant.)
1201 If MODIFIED is nonzero, X is a destination; it is being modified.
1202 Note that delete_reg_equiv should be called on a register
1203 before insert_regs is done on that register with MODIFIED != 0.
1205 Nonzero value means that elements of reg_qty have changed
1206 so X's hash code may be different. */
1209 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1213 unsigned int regno
= REGNO (x
);
1216 /* If REGNO is in the equivalence table already but is of the
1217 wrong mode for that equivalence, don't do anything here. */
1219 qty_valid
= REGNO_QTY_VALID_P (regno
);
1222 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1224 if (ent
->mode
!= GET_MODE (x
))
1228 if (modified
|| ! qty_valid
)
1231 for (classp
= classp
->first_same_value
;
1233 classp
= classp
->next_same_value
)
1234 if (REG_P (classp
->exp
)
1235 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1237 make_regs_eqv (regno
, REGNO (classp
->exp
));
1241 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1242 than REG_IN_TABLE to find out if there was only a single preceding
1243 invalidation - for the SUBREG - or another one, which would be
1244 for the full register. However, if we find here that REG_TICK
1245 indicates that the register is invalid, it means that it has
1246 been invalidated in a separate operation. The SUBREG might be used
1247 now (then this is a recursive call), or we might use the full REG
1248 now and a SUBREG of it later. So bump up REG_TICK so that
1249 mention_regs will do the right thing. */
1251 && REG_IN_TABLE (regno
) >= 0
1252 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1254 make_new_qty (regno
, GET_MODE (x
));
1261 /* If X is a SUBREG, we will likely be inserting the inner register in the
1262 table. If that register doesn't have an assigned quantity number at
1263 this point but does later, the insertion that we will be doing now will
1264 not be accessible because its hash code will have changed. So assign
1265 a quantity number now. */
1267 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1268 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1270 insert_regs (SUBREG_REG (x
), NULL
, 0);
1275 return mention_regs (x
);
1278 /* Look in or update the hash table. */
1280 /* Remove table element ELT from use in the table.
1281 HASH is its hash code, made using the HASH macro.
1282 It's an argument because often that is known in advance
1283 and we save much time not recomputing it. */
1286 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1291 /* Mark this element as removed. See cse_insn. */
1292 elt
->first_same_value
= 0;
1294 /* Remove the table element from its equivalence class. */
1297 struct table_elt
*prev
= elt
->prev_same_value
;
1298 struct table_elt
*next
= elt
->next_same_value
;
1301 next
->prev_same_value
= prev
;
1304 prev
->next_same_value
= next
;
1307 struct table_elt
*newfirst
= next
;
1310 next
->first_same_value
= newfirst
;
1311 next
= next
->next_same_value
;
1316 /* Remove the table element from its hash bucket. */
1319 struct table_elt
*prev
= elt
->prev_same_hash
;
1320 struct table_elt
*next
= elt
->next_same_hash
;
1323 next
->prev_same_hash
= prev
;
1326 prev
->next_same_hash
= next
;
1327 else if (table
[hash
] == elt
)
1331 /* This entry is not in the proper hash bucket. This can happen
1332 when two classes were merged by `merge_equiv_classes'. Search
1333 for the hash bucket that it heads. This happens only very
1334 rarely, so the cost is acceptable. */
1335 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1336 if (table
[hash
] == elt
)
1341 /* Remove the table element from its related-value circular chain. */
1343 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1345 struct table_elt
*p
= elt
->related_value
;
1347 while (p
->related_value
!= elt
)
1348 p
= p
->related_value
;
1349 p
->related_value
= elt
->related_value
;
1350 if (p
->related_value
== p
)
1351 p
->related_value
= 0;
1354 /* Now add it to the free element chain. */
1355 elt
->next_same_hash
= free_element_chain
;
1356 free_element_chain
= elt
;
1359 /* Look up X in the hash table and return its table element,
1360 or 0 if X is not in the table.
1362 MODE is the machine-mode of X, or if X is an integer constant
1363 with VOIDmode then MODE is the mode with which X will be used.
1365 Here we are satisfied to find an expression whose tree structure
1368 static struct table_elt
*
1369 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1371 struct table_elt
*p
;
1373 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1374 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1375 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1381 /* Like `lookup' but don't care whether the table element uses invalid regs.
1382 Also ignore discrepancies in the machine mode of a register. */
1384 static struct table_elt
*
1385 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1387 struct table_elt
*p
;
1391 unsigned int regno
= REGNO (x
);
1393 /* Don't check the machine mode when comparing registers;
1394 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1395 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1397 && REGNO (p
->exp
) == regno
)
1402 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1404 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1411 /* Look for an expression equivalent to X and with code CODE.
1412 If one is found, return that expression. */
1415 lookup_as_function (rtx x
, enum rtx_code code
)
1418 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1420 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1421 long as we are narrowing. So if we looked in vain for a mode narrower
1422 than word_mode before, look for word_mode now. */
1423 if (p
== 0 && code
== CONST_INT
1424 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1427 PUT_MODE (x
, word_mode
);
1428 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1434 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1435 if (GET_CODE (p
->exp
) == code
1436 /* Make sure this is a valid entry in the table. */
1437 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1443 /* Insert X in the hash table, assuming HASH is its hash code
1444 and CLASSP is an element of the class it should go in
1445 (or 0 if a new class should be made).
1446 It is inserted at the proper position to keep the class in
1447 the order cheapest first.
1449 MODE is the machine-mode of X, or if X is an integer constant
1450 with VOIDmode then MODE is the mode with which X will be used.
1452 For elements of equal cheapness, the most recent one
1453 goes in front, except that the first element in the list
1454 remains first unless a cheaper element is added. The order of
1455 pseudo-registers does not matter, as canon_reg will be called to
1456 find the cheapest when a register is retrieved from the table.
1458 The in_memory field in the hash table element is set to 0.
1459 The caller must set it nonzero if appropriate.
1461 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1462 and if insert_regs returns a nonzero value
1463 you must then recompute its hash code before calling here.
1465 If necessary, update table showing constant values of quantities. */
1467 #define CHEAPER(X, Y) \
1468 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1470 static struct table_elt
*
1471 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1473 struct table_elt
*elt
;
1475 /* If X is a register and we haven't made a quantity for it,
1476 something is wrong. */
1477 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1479 /* If X is a hard register, show it is being put in the table. */
1480 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1482 unsigned int regno
= REGNO (x
);
1483 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1486 for (i
= regno
; i
< endregno
; i
++)
1487 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1490 /* Put an element for X into the right hash bucket. */
1492 elt
= free_element_chain
;
1494 free_element_chain
= elt
->next_same_hash
;
1498 elt
= xmalloc (sizeof (struct table_elt
));
1502 elt
->canon_exp
= NULL_RTX
;
1503 elt
->cost
= COST (x
);
1504 elt
->regcost
= approx_reg_cost (x
);
1505 elt
->next_same_value
= 0;
1506 elt
->prev_same_value
= 0;
1507 elt
->next_same_hash
= table
[hash
];
1508 elt
->prev_same_hash
= 0;
1509 elt
->related_value
= 0;
1512 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1515 table
[hash
]->prev_same_hash
= elt
;
1518 /* Put it into the proper value-class. */
1521 classp
= classp
->first_same_value
;
1522 if (CHEAPER (elt
, classp
))
1523 /* Insert at the head of the class. */
1525 struct table_elt
*p
;
1526 elt
->next_same_value
= classp
;
1527 classp
->prev_same_value
= elt
;
1528 elt
->first_same_value
= elt
;
1530 for (p
= classp
; p
; p
= p
->next_same_value
)
1531 p
->first_same_value
= elt
;
1535 /* Insert not at head of the class. */
1536 /* Put it after the last element cheaper than X. */
1537 struct table_elt
*p
, *next
;
1539 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1542 /* Put it after P and before NEXT. */
1543 elt
->next_same_value
= next
;
1545 next
->prev_same_value
= elt
;
1547 elt
->prev_same_value
= p
;
1548 p
->next_same_value
= elt
;
1549 elt
->first_same_value
= classp
;
1553 elt
->first_same_value
= elt
;
1555 /* If this is a constant being set equivalent to a register or a register
1556 being set equivalent to a constant, note the constant equivalence.
1558 If this is a constant, it cannot be equivalent to a different constant,
1559 and a constant is the only thing that can be cheaper than a register. So
1560 we know the register is the head of the class (before the constant was
1563 If this is a register that is not already known equivalent to a
1564 constant, we must check the entire class.
1566 If this is a register that is already known equivalent to an insn,
1567 update the qtys `const_insn' to show that `this_insn' is the latest
1568 insn making that quantity equivalent to the constant. */
1570 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1573 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1574 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1576 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1577 exp_ent
->const_insn
= this_insn
;
1582 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1585 struct table_elt
*p
;
1587 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1589 if (p
->is_const
&& !REG_P (p
->exp
))
1591 int x_q
= REG_QTY (REGNO (x
));
1592 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1595 = gen_lowpart (GET_MODE (x
), p
->exp
);
1596 x_ent
->const_insn
= this_insn
;
1603 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1604 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1605 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1607 /* If this is a constant with symbolic value,
1608 and it has a term with an explicit integer value,
1609 link it up with related expressions. */
1610 if (GET_CODE (x
) == CONST
)
1612 rtx subexp
= get_related_value (x
);
1614 struct table_elt
*subelt
, *subelt_prev
;
1618 /* Get the integer-free subexpression in the hash table. */
1619 subhash
= SAFE_HASH (subexp
, mode
);
1620 subelt
= lookup (subexp
, subhash
, mode
);
1622 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1623 /* Initialize SUBELT's circular chain if it has none. */
1624 if (subelt
->related_value
== 0)
1625 subelt
->related_value
= subelt
;
1626 /* Find the element in the circular chain that precedes SUBELT. */
1627 subelt_prev
= subelt
;
1628 while (subelt_prev
->related_value
!= subelt
)
1629 subelt_prev
= subelt_prev
->related_value
;
1630 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1631 This way the element that follows SUBELT is the oldest one. */
1632 elt
->related_value
= subelt_prev
->related_value
;
1633 subelt_prev
->related_value
= elt
;
1640 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1641 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1642 the two classes equivalent.
1644 CLASS1 will be the surviving class; CLASS2 should not be used after this
1647 Any invalid entries in CLASS2 will not be copied. */
1650 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1652 struct table_elt
*elt
, *next
, *new;
1654 /* Ensure we start with the head of the classes. */
1655 class1
= class1
->first_same_value
;
1656 class2
= class2
->first_same_value
;
1658 /* If they were already equal, forget it. */
1659 if (class1
== class2
)
1662 for (elt
= class2
; elt
; elt
= next
)
1666 enum machine_mode mode
= elt
->mode
;
1668 next
= elt
->next_same_value
;
1670 /* Remove old entry, make a new one in CLASS1's class.
1671 Don't do this for invalid entries as we cannot find their
1672 hash code (it also isn't necessary). */
1673 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1675 bool need_rehash
= false;
1677 hash_arg_in_memory
= 0;
1678 hash
= HASH (exp
, mode
);
1682 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1683 delete_reg_equiv (REGNO (exp
));
1686 remove_from_table (elt
, hash
);
1688 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1690 rehash_using_reg (exp
);
1691 hash
= HASH (exp
, mode
);
1693 new = insert (exp
, class1
, hash
, mode
);
1694 new->in_memory
= hash_arg_in_memory
;
1699 /* Flush the entire hash table. */
1702 flush_hash_table (void)
1705 struct table_elt
*p
;
1707 for (i
= 0; i
< HASH_SIZE
; i
++)
1708 for (p
= table
[i
]; p
; p
= table
[i
])
1710 /* Note that invalidate can remove elements
1711 after P in the current hash chain. */
1713 invalidate (p
->exp
, p
->mode
);
1715 remove_from_table (p
, i
);
1719 /* Function called for each rtx to check whether true dependence exist. */
1720 struct check_dependence_data
1722 enum machine_mode mode
;
1728 check_dependence (rtx
*x
, void *data
)
1730 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1731 if (*x
&& MEM_P (*x
))
1732 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1738 /* Remove from the hash table, or mark as invalid, all expressions whose
1739 values could be altered by storing in X. X is a register, a subreg, or
1740 a memory reference with nonvarying address (because, when a memory
1741 reference with a varying address is stored in, all memory references are
1742 removed by invalidate_memory so specific invalidation is superfluous).
1743 FULL_MODE, if not VOIDmode, indicates that this much should be
1744 invalidated instead of just the amount indicated by the mode of X. This
1745 is only used for bitfield stores into memory.
1747 A nonvarying address may be just a register or just a symbol reference,
1748 or it may be either of those plus a numeric offset. */
1751 invalidate (rtx x
, enum machine_mode full_mode
)
1754 struct table_elt
*p
;
1757 switch (GET_CODE (x
))
1761 /* If X is a register, dependencies on its contents are recorded
1762 through the qty number mechanism. Just change the qty number of
1763 the register, mark it as invalid for expressions that refer to it,
1764 and remove it itself. */
1765 unsigned int regno
= REGNO (x
);
1766 unsigned int hash
= HASH (x
, GET_MODE (x
));
1768 /* Remove REGNO from any quantity list it might be on and indicate
1769 that its value might have changed. If it is a pseudo, remove its
1770 entry from the hash table.
1772 For a hard register, we do the first two actions above for any
1773 additional hard registers corresponding to X. Then, if any of these
1774 registers are in the table, we must remove any REG entries that
1775 overlap these registers. */
1777 delete_reg_equiv (regno
);
1779 SUBREG_TICKED (regno
) = -1;
1781 if (regno
>= FIRST_PSEUDO_REGISTER
)
1783 /* Because a register can be referenced in more than one mode,
1784 we might have to remove more than one table entry. */
1785 struct table_elt
*elt
;
1787 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1788 remove_from_table (elt
, hash
);
1792 HOST_WIDE_INT in_table
1793 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1794 unsigned int endregno
1795 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1796 unsigned int tregno
, tendregno
, rn
;
1797 struct table_elt
*p
, *next
;
1799 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1801 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1803 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1804 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1805 delete_reg_equiv (rn
);
1807 SUBREG_TICKED (rn
) = -1;
1811 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1812 for (p
= table
[hash
]; p
; p
= next
)
1814 next
= p
->next_same_hash
;
1817 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1820 tregno
= REGNO (p
->exp
);
1822 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1823 if (tendregno
> regno
&& tregno
< endregno
)
1824 remove_from_table (p
, hash
);
1831 invalidate (SUBREG_REG (x
), VOIDmode
);
1835 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1836 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1840 /* This is part of a disjoint return value; extract the location in
1841 question ignoring the offset. */
1842 invalidate (XEXP (x
, 0), VOIDmode
);
1846 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1847 /* Calculate the canonical version of X here so that
1848 true_dependence doesn't generate new RTL for X on each call. */
1851 /* Remove all hash table elements that refer to overlapping pieces of
1853 if (full_mode
== VOIDmode
)
1854 full_mode
= GET_MODE (x
);
1856 for (i
= 0; i
< HASH_SIZE
; i
++)
1858 struct table_elt
*next
;
1860 for (p
= table
[i
]; p
; p
= next
)
1862 next
= p
->next_same_hash
;
1865 struct check_dependence_data d
;
1867 /* Just canonicalize the expression once;
1868 otherwise each time we call invalidate
1869 true_dependence will canonicalize the
1870 expression again. */
1872 p
->canon_exp
= canon_rtx (p
->exp
);
1876 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1877 remove_from_table (p
, i
);
1888 /* Remove all expressions that refer to register REGNO,
1889 since they are already invalid, and we are about to
1890 mark that register valid again and don't want the old
1891 expressions to reappear as valid. */
1894 remove_invalid_refs (unsigned int regno
)
1897 struct table_elt
*p
, *next
;
1899 for (i
= 0; i
< HASH_SIZE
; i
++)
1900 for (p
= table
[i
]; p
; p
= next
)
1902 next
= p
->next_same_hash
;
1904 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1905 remove_from_table (p
, i
);
1909 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1912 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1913 enum machine_mode mode
)
1916 struct table_elt
*p
, *next
;
1917 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1919 for (i
= 0; i
< HASH_SIZE
; i
++)
1920 for (p
= table
[i
]; p
; p
= next
)
1923 next
= p
->next_same_hash
;
1926 && (GET_CODE (exp
) != SUBREG
1927 || !REG_P (SUBREG_REG (exp
))
1928 || REGNO (SUBREG_REG (exp
)) != regno
1929 || (((SUBREG_BYTE (exp
)
1930 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1931 && SUBREG_BYTE (exp
) <= end
))
1932 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1933 remove_from_table (p
, i
);
1937 /* Recompute the hash codes of any valid entries in the hash table that
1938 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1940 This is called when we make a jump equivalence. */
1943 rehash_using_reg (rtx x
)
1946 struct table_elt
*p
, *next
;
1949 if (GET_CODE (x
) == SUBREG
)
1952 /* If X is not a register or if the register is known not to be in any
1953 valid entries in the table, we have no work to do. */
1956 || REG_IN_TABLE (REGNO (x
)) < 0
1957 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1960 /* Scan all hash chains looking for valid entries that mention X.
1961 If we find one and it is in the wrong hash chain, move it. */
1963 for (i
= 0; i
< HASH_SIZE
; i
++)
1964 for (p
= table
[i
]; p
; p
= next
)
1966 next
= p
->next_same_hash
;
1967 if (reg_mentioned_p (x
, p
->exp
)
1968 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
1969 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
1971 if (p
->next_same_hash
)
1972 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1974 if (p
->prev_same_hash
)
1975 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1977 table
[i
] = p
->next_same_hash
;
1979 p
->next_same_hash
= table
[hash
];
1980 p
->prev_same_hash
= 0;
1982 table
[hash
]->prev_same_hash
= p
;
1988 /* Remove from the hash table any expression that is a call-clobbered
1989 register. Also update their TICK values. */
1992 invalidate_for_call (void)
1994 unsigned int regno
, endregno
;
1997 struct table_elt
*p
, *next
;
2000 /* Go through all the hard registers. For each that is clobbered in
2001 a CALL_INSN, remove the register from quantity chains and update
2002 reg_tick if defined. Also see if any of these registers is currently
2005 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2006 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2008 delete_reg_equiv (regno
);
2009 if (REG_TICK (regno
) >= 0)
2012 SUBREG_TICKED (regno
) = -1;
2015 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2018 /* In the case where we have no call-clobbered hard registers in the
2019 table, we are done. Otherwise, scan the table and remove any
2020 entry that overlaps a call-clobbered register. */
2023 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2024 for (p
= table
[hash
]; p
; p
= next
)
2026 next
= p
->next_same_hash
;
2029 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2032 regno
= REGNO (p
->exp
);
2033 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
2035 for (i
= regno
; i
< endregno
; i
++)
2036 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2038 remove_from_table (p
, hash
);
2044 /* Given an expression X of type CONST,
2045 and ELT which is its table entry (or 0 if it
2046 is not in the hash table),
2047 return an alternate expression for X as a register plus integer.
2048 If none can be found, return 0. */
2051 use_related_value (rtx x
, struct table_elt
*elt
)
2053 struct table_elt
*relt
= 0;
2054 struct table_elt
*p
, *q
;
2055 HOST_WIDE_INT offset
;
2057 /* First, is there anything related known?
2058 If we have a table element, we can tell from that.
2059 Otherwise, must look it up. */
2061 if (elt
!= 0 && elt
->related_value
!= 0)
2063 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2065 rtx subexp
= get_related_value (x
);
2067 relt
= lookup (subexp
,
2068 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2075 /* Search all related table entries for one that has an
2076 equivalent register. */
2081 /* This loop is strange in that it is executed in two different cases.
2082 The first is when X is already in the table. Then it is searching
2083 the RELATED_VALUE list of X's class (RELT). The second case is when
2084 X is not in the table. Then RELT points to a class for the related
2087 Ensure that, whatever case we are in, that we ignore classes that have
2088 the same value as X. */
2090 if (rtx_equal_p (x
, p
->exp
))
2093 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2100 p
= p
->related_value
;
2102 /* We went all the way around, so there is nothing to be found.
2103 Alternatively, perhaps RELT was in the table for some other reason
2104 and it has no related values recorded. */
2105 if (p
== relt
|| p
== 0)
2112 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2113 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2114 return plus_constant (q
->exp
, offset
);
2117 /* Hash a string. Just add its bytes up. */
2118 static inline unsigned
2119 hash_rtx_string (const char *ps
)
2122 const unsigned char *p
= (const unsigned char *) ps
;
2131 /* Hash an rtx. We are careful to make sure the value is never negative.
2132 Equivalent registers hash identically.
2133 MODE is used in hashing for CONST_INTs only;
2134 otherwise the mode of X is used.
2136 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2138 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2139 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2141 Note that cse_insn knows that the hash code of a MEM expression
2142 is just (int) MEM plus the hash code of the address. */
2145 hash_rtx (rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2146 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2153 /* Used to turn recursion into iteration. We can't rely on GCC's
2154 tail-recursion elimination since we need to keep accumulating values
2160 code
= GET_CODE (x
);
2165 unsigned int regno
= REGNO (x
);
2167 if (!reload_completed
)
2169 /* On some machines, we can't record any non-fixed hard register,
2170 because extending its life will cause reload problems. We
2171 consider ap, fp, sp, gp to be fixed for this purpose.
2173 We also consider CCmode registers to be fixed for this purpose;
2174 failure to do so leads to failure to simplify 0<100 type of
2177 On all machines, we can't record any global registers.
2178 Nor should we record any register that is in a small
2179 class, as defined by CLASS_LIKELY_SPILLED_P. */
2182 if (regno
>= FIRST_PSEUDO_REGISTER
)
2184 else if (x
== frame_pointer_rtx
2185 || x
== hard_frame_pointer_rtx
2186 || x
== arg_pointer_rtx
2187 || x
== stack_pointer_rtx
2188 || x
== pic_offset_table_rtx
)
2190 else if (global_regs
[regno
])
2192 else if (fixed_regs
[regno
])
2194 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2196 else if (SMALL_REGISTER_CLASSES
)
2198 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2205 *do_not_record_p
= 1;
2210 hash
+= ((unsigned int) REG
<< 7);
2211 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2215 /* We handle SUBREG of a REG specially because the underlying
2216 reg changes its hash value with every value change; we don't
2217 want to have to forget unrelated subregs when one subreg changes. */
2220 if (REG_P (SUBREG_REG (x
)))
2222 hash
+= (((unsigned int) SUBREG
<< 7)
2223 + REGNO (SUBREG_REG (x
))
2224 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2231 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2232 + (unsigned int) INTVAL (x
));
2236 /* This is like the general case, except that it only counts
2237 the integers representing the constant. */
2238 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2239 if (GET_MODE (x
) != VOIDmode
)
2240 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2242 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2243 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2251 units
= CONST_VECTOR_NUNITS (x
);
2253 for (i
= 0; i
< units
; ++i
)
2255 elt
= CONST_VECTOR_ELT (x
, i
);
2256 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2257 hash_arg_in_memory_p
, have_reg_qty
);
2263 /* Assume there is only one rtx object for any given label. */
2265 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2266 differences and differences between each stage's debugging dumps. */
2267 hash
+= (((unsigned int) LABEL_REF
<< 7)
2268 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2273 /* Don't hash on the symbol's address to avoid bootstrap differences.
2274 Different hash values may cause expressions to be recorded in
2275 different orders and thus different registers to be used in the
2276 final assembler. This also avoids differences in the dump files
2277 between various stages. */
2279 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2282 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2284 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2289 /* We don't record if marked volatile or if BLKmode since we don't
2290 know the size of the move. */
2291 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2293 *do_not_record_p
= 1;
2296 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2297 *hash_arg_in_memory_p
= 1;
2299 /* Now that we have already found this special case,
2300 might as well speed it up as much as possible. */
2301 hash
+= (unsigned) MEM
;
2306 /* A USE that mentions non-volatile memory needs special
2307 handling since the MEM may be BLKmode which normally
2308 prevents an entry from being made. Pure calls are
2309 marked by a USE which mentions BLKmode memory.
2310 See calls.c:emit_call_1. */
2311 if (MEM_P (XEXP (x
, 0))
2312 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2314 hash
+= (unsigned) USE
;
2317 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2318 *hash_arg_in_memory_p
= 1;
2320 /* Now that we have already found this special case,
2321 might as well speed it up as much as possible. */
2322 hash
+= (unsigned) MEM
;
2337 case UNSPEC_VOLATILE
:
2338 *do_not_record_p
= 1;
2342 if (MEM_VOLATILE_P (x
))
2344 *do_not_record_p
= 1;
2349 /* We don't want to take the filename and line into account. */
2350 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2351 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2352 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2353 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2355 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2357 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2359 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2360 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2361 do_not_record_p
, hash_arg_in_memory_p
,
2364 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2367 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2368 x
= ASM_OPERANDS_INPUT (x
, 0);
2369 mode
= GET_MODE (x
);
2381 i
= GET_RTX_LENGTH (code
) - 1;
2382 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2383 fmt
= GET_RTX_FORMAT (code
);
2389 /* If we are about to do the last recursive call
2390 needed at this level, change it into iteration.
2391 This function is called enough to be worth it. */
2398 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2399 hash_arg_in_memory_p
, have_reg_qty
);
2403 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2404 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2405 hash_arg_in_memory_p
, have_reg_qty
);
2409 hash
+= hash_rtx_string (XSTR (x
, i
));
2413 hash
+= (unsigned int) XINT (x
, i
);
2428 /* Hash an rtx X for cse via hash_rtx.
2429 Stores 1 in do_not_record if any subexpression is volatile.
2430 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2431 does not have the RTX_UNCHANGING_P bit set. */
2433 static inline unsigned
2434 canon_hash (rtx x
, enum machine_mode mode
)
2436 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2439 /* Like canon_hash but with no side effects, i.e. do_not_record
2440 and hash_arg_in_memory are not changed. */
2442 static inline unsigned
2443 safe_hash (rtx x
, enum machine_mode mode
)
2445 int dummy_do_not_record
;
2446 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2449 /* Return 1 iff X and Y would canonicalize into the same thing,
2450 without actually constructing the canonicalization of either one.
2451 If VALIDATE is nonzero,
2452 we assume X is an expression being processed from the rtl
2453 and Y was found in the hash table. We check register refs
2454 in Y for being marked as valid.
2456 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2459 exp_equiv_p (rtx x
, rtx y
, int validate
, bool for_gcse
)
2465 /* Note: it is incorrect to assume an expression is equivalent to itself
2466 if VALIDATE is nonzero. */
2467 if (x
== y
&& !validate
)
2470 if (x
== 0 || y
== 0)
2473 code
= GET_CODE (x
);
2474 if (code
!= GET_CODE (y
))
2477 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2478 if (GET_MODE (x
) != GET_MODE (y
))
2489 return XEXP (x
, 0) == XEXP (y
, 0);
2492 return XSTR (x
, 0) == XSTR (y
, 0);
2496 return REGNO (x
) == REGNO (y
);
2499 unsigned int regno
= REGNO (y
);
2501 unsigned int endregno
2502 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2503 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2505 /* If the quantities are not the same, the expressions are not
2506 equivalent. If there are and we are not to validate, they
2507 are equivalent. Otherwise, ensure all regs are up-to-date. */
2509 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2515 for (i
= regno
; i
< endregno
; i
++)
2516 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2525 /* Can't merge two expressions in different alias sets, since we
2526 can decide that the expression is transparent in a block when
2527 it isn't, due to it being set with the different alias set. */
2528 if (MEM_ALIAS_SET (x
) != MEM_ALIAS_SET (y
))
2531 /* A volatile mem should not be considered equivalent to any
2533 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2538 /* For commutative operations, check both orders. */
2546 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2548 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2549 validate
, for_gcse
))
2550 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2552 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2553 validate
, for_gcse
)));
2556 /* We don't use the generic code below because we want to
2557 disregard filename and line numbers. */
2559 /* A volatile asm isn't equivalent to any other. */
2560 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2563 if (GET_MODE (x
) != GET_MODE (y
)
2564 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2565 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2566 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2567 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2568 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2571 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2573 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2574 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2575 ASM_OPERANDS_INPUT (y
, i
),
2577 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2578 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2588 /* Compare the elements. If any pair of corresponding elements
2589 fail to match, return 0 for the whole thing. */
2591 fmt
= GET_RTX_FORMAT (code
);
2592 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2597 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2598 validate
, for_gcse
))
2603 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2605 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2606 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2607 validate
, for_gcse
))
2612 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2617 if (XINT (x
, i
) != XINT (y
, i
))
2622 if (XWINT (x
, i
) != XWINT (y
, i
))
2638 /* Return 1 if X has a value that can vary even between two
2639 executions of the program. 0 means X can be compared reliably
2640 against certain constants or near-constants. */
2643 cse_rtx_varies_p (rtx x
, int from_alias
)
2645 /* We need not check for X and the equivalence class being of the same
2646 mode because if X is equivalent to a constant in some mode, it
2647 doesn't vary in any mode. */
2650 && REGNO_QTY_VALID_P (REGNO (x
)))
2652 int x_q
= REG_QTY (REGNO (x
));
2653 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2655 if (GET_MODE (x
) == x_ent
->mode
2656 && x_ent
->const_rtx
!= NULL_RTX
)
2660 if (GET_CODE (x
) == PLUS
2661 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2662 && REG_P (XEXP (x
, 0))
2663 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2665 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2666 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2668 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2669 && x0_ent
->const_rtx
!= NULL_RTX
)
2673 /* This can happen as the result of virtual register instantiation, if
2674 the initial constant is too large to be a valid address. This gives
2675 us a three instruction sequence, load large offset into a register,
2676 load fp minus a constant into a register, then a MEM which is the
2677 sum of the two `constant' registers. */
2678 if (GET_CODE (x
) == PLUS
2679 && REG_P (XEXP (x
, 0))
2680 && REG_P (XEXP (x
, 1))
2681 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2682 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2684 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2685 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2686 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2687 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2689 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2690 && x0_ent
->const_rtx
!= NULL_RTX
2691 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2692 && x1_ent
->const_rtx
!= NULL_RTX
)
2696 return rtx_varies_p (x
, from_alias
);
2699 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2700 the result if necessary. INSN is as for canon_reg. */
2703 validate_canon_reg (rtx
*xloc
, rtx insn
)
2705 rtx
new = canon_reg (*xloc
, insn
);
2708 /* If replacing pseudo with hard reg or vice versa, ensure the
2709 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2710 if (insn
!= 0 && new != 0
2711 && REG_P (new) && REG_P (*xloc
)
2712 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2713 != (REGNO (*xloc
) < FIRST_PSEUDO_REGISTER
))
2714 || GET_MODE (new) != GET_MODE (*xloc
)
2715 || (insn_code
= recog_memoized (insn
)) < 0
2716 || insn_data
[insn_code
].n_dups
> 0))
2717 validate_change (insn
, xloc
, new, 1);
2722 /* Canonicalize an expression:
2723 replace each register reference inside it
2724 with the "oldest" equivalent register.
2726 If INSN is nonzero and we are replacing a pseudo with a hard register
2727 or vice versa, validate_change is used to ensure that INSN remains valid
2728 after we make our substitution. The calls are made with IN_GROUP nonzero
2729 so apply_change_group must be called upon the outermost return from this
2730 function (unless INSN is zero). The result of apply_change_group can
2731 generally be discarded since the changes we are making are optional. */
2734 canon_reg (rtx x
, rtx insn
)
2743 code
= GET_CODE (x
);
2762 struct qty_table_elem
*ent
;
2764 /* Never replace a hard reg, because hard regs can appear
2765 in more than one machine mode, and we must preserve the mode
2766 of each occurrence. Also, some hard regs appear in
2767 MEMs that are shared and mustn't be altered. Don't try to
2768 replace any reg that maps to a reg of class NO_REGS. */
2769 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2770 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2773 q
= REG_QTY (REGNO (x
));
2774 ent
= &qty_table
[q
];
2775 first
= ent
->first_reg
;
2776 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2777 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2778 : gen_rtx_REG (ent
->mode
, first
));
2785 fmt
= GET_RTX_FORMAT (code
);
2786 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2791 validate_canon_reg (&XEXP (x
, i
), insn
);
2792 else if (fmt
[i
] == 'E')
2793 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2794 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2800 /* LOC is a location within INSN that is an operand address (the contents of
2801 a MEM). Find the best equivalent address to use that is valid for this
2804 On most CISC machines, complicated address modes are costly, and rtx_cost
2805 is a good approximation for that cost. However, most RISC machines have
2806 only a few (usually only one) memory reference formats. If an address is
2807 valid at all, it is often just as cheap as any other address. Hence, for
2808 RISC machines, we use `address_cost' to compare the costs of various
2809 addresses. For two addresses of equal cost, choose the one with the
2810 highest `rtx_cost' value as that has the potential of eliminating the
2811 most insns. For equal costs, we choose the first in the equivalence
2812 class. Note that we ignore the fact that pseudo registers are cheaper than
2813 hard registers here because we would also prefer the pseudo registers. */
2816 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2818 struct table_elt
*elt
;
2820 struct table_elt
*p
;
2821 int found_better
= 1;
2822 int save_do_not_record
= do_not_record
;
2823 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2828 /* Do not try to replace constant addresses or addresses of local and
2829 argument slots. These MEM expressions are made only once and inserted
2830 in many instructions, as well as being used to control symbol table
2831 output. It is not safe to clobber them.
2833 There are some uncommon cases where the address is already in a register
2834 for some reason, but we cannot take advantage of that because we have
2835 no easy way to unshare the MEM. In addition, looking up all stack
2836 addresses is costly. */
2837 if ((GET_CODE (addr
) == PLUS
2838 && REG_P (XEXP (addr
, 0))
2839 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2840 && (regno
= REGNO (XEXP (addr
, 0)),
2841 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2842 || regno
== ARG_POINTER_REGNUM
))
2844 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2845 || regno
== HARD_FRAME_POINTER_REGNUM
2846 || regno
== ARG_POINTER_REGNUM
))
2847 || CONSTANT_ADDRESS_P (addr
))
2850 /* If this address is not simply a register, try to fold it. This will
2851 sometimes simplify the expression. Many simplifications
2852 will not be valid, but some, usually applying the associative rule, will
2853 be valid and produce better code. */
2856 rtx folded
= fold_rtx (addr
, NULL_RTX
);
2859 int addr_folded_cost
= address_cost (folded
, mode
);
2860 int addr_cost
= address_cost (addr
, mode
);
2862 if ((addr_folded_cost
< addr_cost
2863 || (addr_folded_cost
== addr_cost
2864 /* ??? The rtx_cost comparison is left over from an older
2865 version of this code. It is probably no longer helpful.*/
2866 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2867 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2868 && validate_change (insn
, loc
, folded
, 0))
2873 /* If this address is not in the hash table, we can't look for equivalences
2874 of the whole address. Also, ignore if volatile. */
2877 hash
= HASH (addr
, Pmode
);
2878 addr_volatile
= do_not_record
;
2879 do_not_record
= save_do_not_record
;
2880 hash_arg_in_memory
= save_hash_arg_in_memory
;
2885 elt
= lookup (addr
, hash
, Pmode
);
2889 /* We need to find the best (under the criteria documented above) entry
2890 in the class that is valid. We use the `flag' field to indicate
2891 choices that were invalid and iterate until we can't find a better
2892 one that hasn't already been tried. */
2894 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2897 while (found_better
)
2899 int best_addr_cost
= address_cost (*loc
, mode
);
2900 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2902 struct table_elt
*best_elt
= elt
;
2905 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2909 || exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2910 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2911 || (exp_cost
== best_addr_cost
2912 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2915 best_addr_cost
= exp_cost
;
2916 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2923 if (validate_change (insn
, loc
,
2924 canon_reg (copy_rtx (best_elt
->exp
),
2933 /* If the address is a binary operation with the first operand a register
2934 and the second a constant, do the same as above, but looking for
2935 equivalences of the register. Then try to simplify before checking for
2936 the best address to use. This catches a few cases: First is when we
2937 have REG+const and the register is another REG+const. We can often merge
2938 the constants and eliminate one insn and one register. It may also be
2939 that a machine has a cheap REG+REG+const. Finally, this improves the
2940 code on the Alpha for unaligned byte stores. */
2942 if (flag_expensive_optimizations
2943 && ARITHMETIC_P (*loc
)
2944 && REG_P (XEXP (*loc
, 0)))
2946 rtx op1
= XEXP (*loc
, 1);
2949 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2950 do_not_record
= save_do_not_record
;
2951 hash_arg_in_memory
= save_hash_arg_in_memory
;
2953 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2957 /* We need to find the best (under the criteria documented above) entry
2958 in the class that is valid. We use the `flag' field to indicate
2959 choices that were invalid and iterate until we can't find a better
2960 one that hasn't already been tried. */
2962 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2965 while (found_better
)
2967 int best_addr_cost
= address_cost (*loc
, mode
);
2968 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2969 struct table_elt
*best_elt
= elt
;
2970 rtx best_rtx
= *loc
;
2973 /* This is at worst case an O(n^2) algorithm, so limit our search
2974 to the first 32 elements on the list. This avoids trouble
2975 compiling code with very long basic blocks that can easily
2976 call simplify_gen_binary so many times that we run out of
2980 for (p
= elt
->first_same_value
, count
= 0;
2982 p
= p
->next_same_value
, count
++)
2985 || exp_equiv_p (p
->exp
, p
->exp
, 1, false)))
2987 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
2991 /* Get the canonical version of the address so we can accept
2993 new = canon_for_address (new);
2995 new_cost
= address_cost (new, mode
);
2997 if (new_cost
< best_addr_cost
2998 || (new_cost
== best_addr_cost
2999 && (COST (new) + 1) >> 1 > best_rtx_cost
))
3002 best_addr_cost
= new_cost
;
3003 best_rtx_cost
= (COST (new) + 1) >> 1;
3011 if (validate_change (insn
, loc
,
3012 canon_reg (copy_rtx (best_rtx
),
3022 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3023 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3024 what values are being compared.
3026 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3027 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3028 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3029 compared to produce cc0.
3031 The return value is the comparison operator and is either the code of
3032 A or the code corresponding to the inverse of the comparison. */
3034 static enum rtx_code
3035 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
3036 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
3040 arg1
= *parg1
, arg2
= *parg2
;
3042 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3044 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
3046 /* Set nonzero when we find something of interest. */
3048 int reverse_code
= 0;
3049 struct table_elt
*p
= 0;
3051 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3052 On machines with CC0, this is the only case that can occur, since
3053 fold_rtx will return the COMPARE or item being compared with zero
3056 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
3059 /* If ARG1 is a comparison operator and CODE is testing for
3060 STORE_FLAG_VALUE, get the inner arguments. */
3062 else if (COMPARISON_P (arg1
))
3064 #ifdef FLOAT_STORE_FLAG_VALUE
3065 REAL_VALUE_TYPE fsfv
;
3069 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3070 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3071 #ifdef FLOAT_STORE_FLAG_VALUE
3072 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3073 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3074 REAL_VALUE_NEGATIVE (fsfv
)))
3079 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3080 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3081 #ifdef FLOAT_STORE_FLAG_VALUE
3082 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3083 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3084 REAL_VALUE_NEGATIVE (fsfv
)))
3087 x
= arg1
, reverse_code
= 1;
3090 /* ??? We could also check for
3092 (ne (and (eq (...) (const_int 1))) (const_int 0))
3094 and related forms, but let's wait until we see them occurring. */
3097 /* Look up ARG1 in the hash table and see if it has an equivalence
3098 that lets us see what is being compared. */
3099 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3102 p
= p
->first_same_value
;
3104 /* If what we compare is already known to be constant, that is as
3106 We need to break the loop in this case, because otherwise we
3107 can have an infinite loop when looking at a reg that is known
3108 to be a constant which is the same as a comparison of a reg
3109 against zero which appears later in the insn stream, which in
3110 turn is constant and the same as the comparison of the first reg
3116 for (; p
; p
= p
->next_same_value
)
3118 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3119 #ifdef FLOAT_STORE_FLAG_VALUE
3120 REAL_VALUE_TYPE fsfv
;
3123 /* If the entry isn't valid, skip it. */
3124 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3127 if (GET_CODE (p
->exp
) == COMPARE
3128 /* Another possibility is that this machine has a compare insn
3129 that includes the comparison code. In that case, ARG1 would
3130 be equivalent to a comparison operation that would set ARG1 to
3131 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3132 ORIG_CODE is the actual comparison being done; if it is an EQ,
3133 we must reverse ORIG_CODE. On machine with a negative value
3134 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3137 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3138 && (GET_MODE_BITSIZE (inner_mode
)
3139 <= HOST_BITS_PER_WIDE_INT
)
3140 && (STORE_FLAG_VALUE
3141 & ((HOST_WIDE_INT
) 1
3142 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3143 #ifdef FLOAT_STORE_FLAG_VALUE
3145 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3146 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3147 REAL_VALUE_NEGATIVE (fsfv
)))
3150 && COMPARISON_P (p
->exp
)))
3155 else if ((code
== EQ
3157 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3158 && (GET_MODE_BITSIZE (inner_mode
)
3159 <= HOST_BITS_PER_WIDE_INT
)
3160 && (STORE_FLAG_VALUE
3161 & ((HOST_WIDE_INT
) 1
3162 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3163 #ifdef FLOAT_STORE_FLAG_VALUE
3165 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3166 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3167 REAL_VALUE_NEGATIVE (fsfv
)))
3170 && COMPARISON_P (p
->exp
))
3177 /* If this non-trapping address, e.g. fp + constant, the
3178 equivalent is a better operand since it may let us predict
3179 the value of the comparison. */
3180 else if (!rtx_addr_can_trap_p (p
->exp
))
3187 /* If we didn't find a useful equivalence for ARG1, we are done.
3188 Otherwise, set up for the next iteration. */
3192 /* If we need to reverse the comparison, make sure that that is
3193 possible -- we can't necessarily infer the value of GE from LT
3194 with floating-point operands. */
3197 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3198 if (reversed
== UNKNOWN
)
3203 else if (COMPARISON_P (x
))
3204 code
= GET_CODE (x
);
3205 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3208 /* Return our results. Return the modes from before fold_rtx
3209 because fold_rtx might produce const_int, and then it's too late. */
3210 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3211 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3216 /* If X is a nontrivial arithmetic operation on an argument
3217 for which a constant value can be determined, return
3218 the result of operating on that value, as a constant.
3219 Otherwise, return X, possibly with one or more operands
3220 modified by recursive calls to this function.
3222 If X is a register whose contents are known, we do NOT
3223 return those contents here. equiv_constant is called to
3226 INSN is the insn that we may be modifying. If it is 0, make a copy
3227 of X before modifying it. */
3230 fold_rtx (rtx x
, rtx insn
)
3233 enum machine_mode mode
;
3240 /* Folded equivalents of first two operands of X. */
3244 /* Constant equivalents of first three operands of X;
3245 0 when no such equivalent is known. */
3250 /* The mode of the first operand of X. We need this for sign and zero
3252 enum machine_mode mode_arg0
;
3257 mode
= GET_MODE (x
);
3258 code
= GET_CODE (x
);
3268 /* No use simplifying an EXPR_LIST
3269 since they are used only for lists of args
3270 in a function call's REG_EQUAL note. */
3276 return prev_insn_cc0
;
3280 /* If the next insn is a CODE_LABEL followed by a jump table,
3281 PC's value is a LABEL_REF pointing to that label. That
3282 lets us fold switch statements on the VAX. */
3285 if (insn
&& tablejump_p (insn
, &next
, NULL
))
3286 return gen_rtx_LABEL_REF (Pmode
, next
);
3291 /* See if we previously assigned a constant value to this SUBREG. */
3292 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3293 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3296 /* If this is a paradoxical SUBREG, we have no idea what value the
3297 extra bits would have. However, if the operand is equivalent
3298 to a SUBREG whose operand is the same as our mode, and all the
3299 modes are within a word, we can just use the inner operand
3300 because these SUBREGs just say how to treat the register.
3302 Similarly if we find an integer constant. */
3304 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3306 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3307 struct table_elt
*elt
;
3309 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3310 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3311 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3313 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3315 if (CONSTANT_P (elt
->exp
)
3316 && GET_MODE (elt
->exp
) == VOIDmode
)
3319 if (GET_CODE (elt
->exp
) == SUBREG
3320 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3321 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3322 return copy_rtx (SUBREG_REG (elt
->exp
));
3328 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3329 We might be able to if the SUBREG is extracting a single word in an
3330 integral mode or extracting the low part. */
3332 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3333 const_arg0
= equiv_constant (folded_arg0
);
3335 folded_arg0
= const_arg0
;
3337 if (folded_arg0
!= SUBREG_REG (x
))
3339 new = simplify_subreg (mode
, folded_arg0
,
3340 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3345 if (REG_P (folded_arg0
)
3346 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3348 struct table_elt
*elt
;
3350 elt
= lookup (folded_arg0
,
3351 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3352 GET_MODE (folded_arg0
));
3355 elt
= elt
->first_same_value
;
3357 if (subreg_lowpart_p (x
))
3358 /* If this is a narrowing SUBREG and our operand is a REG, see
3359 if we can find an equivalence for REG that is an arithmetic
3360 operation in a wider mode where both operands are paradoxical
3361 SUBREGs from objects of our result mode. In that case, we
3362 couldn-t report an equivalent value for that operation, since we
3363 don't know what the extra bits will be. But we can find an
3364 equivalence for this SUBREG by folding that operation in the
3365 narrow mode. This allows us to fold arithmetic in narrow modes
3366 when the machine only supports word-sized arithmetic.
3368 Also look for a case where we have a SUBREG whose operand
3369 is the same as our result. If both modes are smaller
3370 than a word, we are simply interpreting a register in
3371 different modes and we can use the inner value. */
3373 for (; elt
; elt
= elt
->next_same_value
)
3375 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3377 /* Just check for unary and binary operations. */
3378 if (UNARY_P (elt
->exp
)
3379 && eltcode
!= SIGN_EXTEND
3380 && eltcode
!= ZERO_EXTEND
3381 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3382 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3383 && (GET_MODE_CLASS (mode
)
3384 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3386 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3388 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3389 op0
= fold_rtx (op0
, NULL_RTX
);
3391 op0
= equiv_constant (op0
);
3393 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3396 else if (ARITHMETIC_P (elt
->exp
)
3397 && eltcode
!= DIV
&& eltcode
!= MOD
3398 && eltcode
!= UDIV
&& eltcode
!= UMOD
3399 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3400 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3401 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3402 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3404 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3405 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3406 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3408 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3410 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3411 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3413 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3414 op0
= fold_rtx (op0
, NULL_RTX
);
3417 op0
= equiv_constant (op0
);
3419 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3420 op1
= fold_rtx (op1
, NULL_RTX
);
3423 op1
= equiv_constant (op1
);
3425 /* If we are looking for the low SImode part of
3426 (ashift:DI c (const_int 32)), it doesn't work
3427 to compute that in SImode, because a 32-bit shift
3428 in SImode is unpredictable. We know the value is 0. */
3430 && GET_CODE (elt
->exp
) == ASHIFT
3431 && GET_CODE (op1
) == CONST_INT
3432 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3435 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3436 /* If the count fits in the inner mode's width,
3437 but exceeds the outer mode's width,
3438 the value will get truncated to 0
3440 new = CONST0_RTX (mode
);
3442 /* If the count exceeds even the inner mode's width,
3443 don't fold this expression. */
3446 else if (op0
&& op1
)
3447 new = simplify_binary_operation (GET_CODE (elt
->exp
), mode
, op0
, op1
);
3450 else if (GET_CODE (elt
->exp
) == SUBREG
3451 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3452 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3454 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3455 new = copy_rtx (SUBREG_REG (elt
->exp
));
3461 /* A SUBREG resulting from a zero extension may fold to zero if
3462 it extracts higher bits than the ZERO_EXTEND's source bits.
3463 FIXME: if combine tried to, er, combine these instructions,
3464 this transformation may be moved to simplify_subreg. */
3465 for (; elt
; elt
= elt
->next_same_value
)
3467 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3469 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3470 return CONST0_RTX (mode
);
3478 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3479 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3480 new = lookup_as_function (XEXP (x
, 0), code
);
3482 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3486 /* If we are not actually processing an insn, don't try to find the
3487 best address. Not only don't we care, but we could modify the
3488 MEM in an invalid way since we have no insn to validate against. */
3490 find_best_addr (insn
, &XEXP (x
, 0), GET_MODE (x
));
3493 /* Even if we don't fold in the insn itself,
3494 we can safely do so here, in hopes of getting a constant. */
3495 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3497 HOST_WIDE_INT offset
= 0;
3500 && REGNO_QTY_VALID_P (REGNO (addr
)))
3502 int addr_q
= REG_QTY (REGNO (addr
));
3503 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3505 if (GET_MODE (addr
) == addr_ent
->mode
3506 && addr_ent
->const_rtx
!= NULL_RTX
)
3507 addr
= addr_ent
->const_rtx
;
3510 /* If address is constant, split it into a base and integer offset. */
3511 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3513 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3514 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3516 base
= XEXP (XEXP (addr
, 0), 0);
3517 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3519 else if (GET_CODE (addr
) == LO_SUM
3520 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3521 base
= XEXP (addr
, 1);
3523 /* If this is a constant pool reference, we can fold it into its
3524 constant to allow better value tracking. */
3525 if (base
&& GET_CODE (base
) == SYMBOL_REF
3526 && CONSTANT_POOL_ADDRESS_P (base
))
3528 rtx constant
= get_pool_constant (base
);
3529 enum machine_mode const_mode
= get_pool_mode (base
);
3532 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3534 constant_pool_entries_cost
= COST (constant
);
3535 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3538 /* If we are loading the full constant, we have an equivalence. */
3539 if (offset
== 0 && mode
== const_mode
)
3542 /* If this actually isn't a constant (weird!), we can't do
3543 anything. Otherwise, handle the two most common cases:
3544 extracting a word from a multi-word constant, and extracting
3545 the low-order bits. Other cases don't seem common enough to
3547 if (! CONSTANT_P (constant
))
3550 if (GET_MODE_CLASS (mode
) == MODE_INT
3551 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3552 && offset
% UNITS_PER_WORD
== 0
3553 && (new = operand_subword (constant
,
3554 offset
/ UNITS_PER_WORD
,
3555 0, const_mode
)) != 0)
3558 if (((BYTES_BIG_ENDIAN
3559 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3560 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3561 && (new = gen_lowpart (mode
, constant
)) != 0)
3565 /* If this is a reference to a label at a known position in a jump
3566 table, we also know its value. */
3567 if (base
&& GET_CODE (base
) == LABEL_REF
)
3569 rtx label
= XEXP (base
, 0);
3570 rtx table_insn
= NEXT_INSN (label
);
3572 if (table_insn
&& JUMP_P (table_insn
)
3573 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3575 rtx table
= PATTERN (table_insn
);
3578 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3579 < XVECLEN (table
, 0)))
3580 return XVECEXP (table
, 0,
3581 offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3583 if (table_insn
&& JUMP_P (table_insn
)
3584 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3586 rtx table
= PATTERN (table_insn
);
3589 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3590 < XVECLEN (table
, 1)))
3592 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3593 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3596 if (GET_MODE (table
) != Pmode
)
3597 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3599 /* Indicate this is a constant. This isn't a
3600 valid form of CONST, but it will only be used
3601 to fold the next insns and then discarded, so
3604 Note this expression must be explicitly discarded,
3605 by cse_insn, else it may end up in a REG_EQUAL note
3606 and "escape" to cause problems elsewhere. */
3607 return gen_rtx_CONST (GET_MODE (new), new);
3615 #ifdef NO_FUNCTION_CSE
3617 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3625 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3626 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3627 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3638 mode_arg0
= VOIDmode
;
3640 /* Try folding our operands.
3641 Then see which ones have constant values known. */
3643 fmt
= GET_RTX_FORMAT (code
);
3644 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3647 rtx arg
= XEXP (x
, i
);
3648 rtx folded_arg
= arg
, const_arg
= 0;
3649 enum machine_mode mode_arg
= GET_MODE (arg
);
3650 rtx cheap_arg
, expensive_arg
;
3651 rtx replacements
[2];
3653 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3655 /* Most arguments are cheap, so handle them specially. */
3656 switch (GET_CODE (arg
))
3659 /* This is the same as calling equiv_constant; it is duplicated
3661 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3663 int arg_q
= REG_QTY (REGNO (arg
));
3664 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3666 if (arg_ent
->const_rtx
!= NULL_RTX
3667 && !REG_P (arg_ent
->const_rtx
)
3668 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3670 = gen_lowpart (GET_MODE (arg
),
3671 arg_ent
->const_rtx
);
3686 folded_arg
= prev_insn_cc0
;
3687 mode_arg
= prev_insn_cc0_mode
;
3688 const_arg
= equiv_constant (folded_arg
);
3693 folded_arg
= fold_rtx (arg
, insn
);
3694 const_arg
= equiv_constant (folded_arg
);
3697 /* For the first three operands, see if the operand
3698 is constant or equivalent to a constant. */
3702 folded_arg0
= folded_arg
;
3703 const_arg0
= const_arg
;
3704 mode_arg0
= mode_arg
;
3707 folded_arg1
= folded_arg
;
3708 const_arg1
= const_arg
;
3711 const_arg2
= const_arg
;
3715 /* Pick the least expensive of the folded argument and an
3716 equivalent constant argument. */
3717 if (const_arg
== 0 || const_arg
== folded_arg
3718 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3719 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3721 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3723 /* Try to replace the operand with the cheapest of the two
3724 possibilities. If it doesn't work and this is either of the first
3725 two operands of a commutative operation, try swapping them.
3726 If THAT fails, try the more expensive, provided it is cheaper
3727 than what is already there. */
3729 if (cheap_arg
== XEXP (x
, i
))
3732 if (insn
== 0 && ! copied
)
3738 /* Order the replacements from cheapest to most expensive. */
3739 replacements
[0] = cheap_arg
;
3740 replacements
[1] = expensive_arg
;
3742 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3744 int new_cost
= COST_IN (replacements
[j
], code
);
3746 /* Stop if what existed before was cheaper. Prefer constants
3747 in the case of a tie. */
3748 if (new_cost
> old_cost
3749 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3752 /* It's not safe to substitute the operand of a conversion
3753 operator with a constant, as the conversion's identity
3754 depends upon the mode of it's operand. This optimization
3755 is handled by the call to simplify_unary_operation. */
3756 if (GET_RTX_CLASS (code
) == RTX_UNARY
3757 && GET_MODE (replacements
[j
]) != mode_arg0
3758 && (code
== ZERO_EXTEND
3759 || code
== SIGN_EXTEND
3761 || code
== FLOAT_TRUNCATE
3762 || code
== FLOAT_EXTEND
3765 || code
== UNSIGNED_FLOAT
3766 || code
== UNSIGNED_FIX
))
3769 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3772 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3773 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3775 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3776 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3778 if (apply_change_group ())
3780 /* Swap them back to be invalid so that this loop can
3781 continue and flag them to be swapped back later. */
3784 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3796 /* Don't try to fold inside of a vector of expressions.
3797 Doing nothing is harmless. */
3801 /* If a commutative operation, place a constant integer as the second
3802 operand unless the first operand is also a constant integer. Otherwise,
3803 place any constant second unless the first operand is also a constant. */
3805 if (COMMUTATIVE_P (x
))
3808 || swap_commutative_operands_p (const_arg0
? const_arg0
3810 const_arg1
? const_arg1
3813 rtx tem
= XEXP (x
, 0);
3815 if (insn
== 0 && ! copied
)
3821 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3822 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3823 if (apply_change_group ())
3825 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3826 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3831 /* If X is an arithmetic operation, see if we can simplify it. */
3833 switch (GET_RTX_CLASS (code
))
3839 /* We can't simplify extension ops unless we know the
3841 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3842 && mode_arg0
== VOIDmode
)
3845 /* If we had a CONST, strip it off and put it back later if we
3847 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3848 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3850 new = simplify_unary_operation (code
, mode
,
3851 const_arg0
? const_arg0
: folded_arg0
,
3853 /* NEG of PLUS could be converted into MINUS, but that causes
3854 expressions of the form
3855 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3856 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3857 FIXME: those ports should be fixed. */
3858 if (new != 0 && is_const
3859 && GET_CODE (new) == PLUS
3860 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3861 || GET_CODE (XEXP (new, 0)) == LABEL_REF
)
3862 && GET_CODE (XEXP (new, 1)) == CONST_INT
)
3863 new = gen_rtx_CONST (mode
, new);
3868 case RTX_COMM_COMPARE
:
3869 /* See what items are actually being compared and set FOLDED_ARG[01]
3870 to those values and CODE to the actual comparison code. If any are
3871 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3872 do anything if both operands are already known to be constant. */
3874 /* ??? Vector mode comparisons are not supported yet. */
3875 if (VECTOR_MODE_P (mode
))
3878 if (const_arg0
== 0 || const_arg1
== 0)
3880 struct table_elt
*p0
, *p1
;
3881 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3882 enum machine_mode mode_arg1
;
3884 #ifdef FLOAT_STORE_FLAG_VALUE
3885 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3887 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3888 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3889 false_rtx
= CONST0_RTX (mode
);
3893 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3894 &mode_arg0
, &mode_arg1
);
3896 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3897 what kinds of things are being compared, so we can't do
3898 anything with this comparison. */
3900 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3903 const_arg0
= equiv_constant (folded_arg0
);
3904 const_arg1
= equiv_constant (folded_arg1
);
3906 /* If we do not now have two constants being compared, see
3907 if we can nevertheless deduce some things about the
3909 if (const_arg0
== 0 || const_arg1
== 0)
3911 /* Some addresses are known to be nonzero. We don't know
3912 their sign, but equality comparisons are known. */
3913 if (const_arg1
== const0_rtx
3914 && nonzero_address_p (folded_arg0
))
3918 else if (code
== NE
)
3922 /* See if the two operands are the same. */
3924 if (folded_arg0
== folded_arg1
3925 || (REG_P (folded_arg0
)
3926 && REG_P (folded_arg1
)
3927 && (REG_QTY (REGNO (folded_arg0
))
3928 == REG_QTY (REGNO (folded_arg1
))))
3929 || ((p0
= lookup (folded_arg0
,
3930 SAFE_HASH (folded_arg0
, mode_arg0
),
3932 && (p1
= lookup (folded_arg1
,
3933 SAFE_HASH (folded_arg1
, mode_arg0
),
3935 && p0
->first_same_value
== p1
->first_same_value
))
3937 /* Sadly two equal NaNs are not equivalent. */
3938 if (!HONOR_NANS (mode_arg0
))
3939 return ((code
== EQ
|| code
== LE
|| code
== GE
3940 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3941 || code
== UNLE
|| code
== UNGE
3943 ? true_rtx
: false_rtx
);
3944 /* Take care for the FP compares we can resolve. */
3945 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
3947 if (code
== LTGT
|| code
== LT
|| code
== GT
)
3951 /* If FOLDED_ARG0 is a register, see if the comparison we are
3952 doing now is either the same as we did before or the reverse
3953 (we only check the reverse if not floating-point). */
3954 else if (REG_P (folded_arg0
))
3956 int qty
= REG_QTY (REGNO (folded_arg0
));
3958 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3960 struct qty_table_elem
*ent
= &qty_table
[qty
];
3962 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3963 || (! FLOAT_MODE_P (mode_arg0
)
3964 && comparison_dominates_p (ent
->comparison_code
,
3965 reverse_condition (code
))))
3966 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3968 && rtx_equal_p (ent
->comparison_const
,
3970 || (REG_P (folded_arg1
)
3971 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3972 return (comparison_dominates_p (ent
->comparison_code
, code
)
3973 ? true_rtx
: false_rtx
);
3979 /* If we are comparing against zero, see if the first operand is
3980 equivalent to an IOR with a constant. If so, we may be able to
3981 determine the result of this comparison. */
3983 if (const_arg1
== const0_rtx
)
3985 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3989 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3990 && GET_CODE (inner_const
) == CONST_INT
3991 && INTVAL (inner_const
) != 0)
3993 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
3994 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
3995 && (INTVAL (inner_const
)
3996 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
3997 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3999 #ifdef FLOAT_STORE_FLAG_VALUE
4000 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4002 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
4003 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4004 false_rtx
= CONST0_RTX (mode
);
4029 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
4030 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
4031 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
4036 case RTX_COMM_ARITH
:
4040 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4041 with that LABEL_REF as its second operand. If so, the result is
4042 the first operand of that MINUS. This handles switches with an
4043 ADDR_DIFF_VEC table. */
4044 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4047 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
4048 : lookup_as_function (folded_arg0
, MINUS
);
4050 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4051 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4054 /* Now try for a CONST of a MINUS like the above. */
4055 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
4056 : lookup_as_function (folded_arg0
, CONST
))) != 0
4057 && GET_CODE (XEXP (y
, 0)) == MINUS
4058 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4059 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
4060 return XEXP (XEXP (y
, 0), 0);
4063 /* Likewise if the operands are in the other order. */
4064 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
4067 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
4068 : lookup_as_function (folded_arg1
, MINUS
);
4070 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4071 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
4074 /* Now try for a CONST of a MINUS like the above. */
4075 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
4076 : lookup_as_function (folded_arg1
, CONST
))) != 0
4077 && GET_CODE (XEXP (y
, 0)) == MINUS
4078 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4079 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4080 return XEXP (XEXP (y
, 0), 0);
4083 /* If second operand is a register equivalent to a negative
4084 CONST_INT, see if we can find a register equivalent to the
4085 positive constant. Make a MINUS if so. Don't do this for
4086 a non-negative constant since we might then alternate between
4087 choosing positive and negative constants. Having the positive
4088 constant previously-used is the more common case. Be sure
4089 the resulting constant is non-negative; if const_arg1 were
4090 the smallest negative number this would overflow: depending
4091 on the mode, this would either just be the same value (and
4092 hence not save anything) or be incorrect. */
4093 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4094 && INTVAL (const_arg1
) < 0
4095 /* This used to test
4097 -INTVAL (const_arg1) >= 0
4099 But The Sun V5.0 compilers mis-compiled that test. So
4100 instead we test for the problematic value in a more direct
4101 manner and hope the Sun compilers get it correct. */
4102 && INTVAL (const_arg1
) !=
4103 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4104 && REG_P (folded_arg1
))
4106 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4108 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
4111 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4113 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4114 canon_reg (p
->exp
, NULL_RTX
));
4119 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4120 If so, produce (PLUS Z C2-C). */
4121 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4123 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4124 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4125 return fold_rtx (plus_constant (copy_rtx (y
),
4126 -INTVAL (const_arg1
)),
4133 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4134 case IOR
: case AND
: case XOR
:
4136 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4137 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4138 is known to be of similar form, we may be able to replace the
4139 operation with a combined operation. This may eliminate the
4140 intermediate operation if every use is simplified in this way.
4141 Note that the similar optimization done by combine.c only works
4142 if the intermediate operation's result has only one reference. */
4144 if (REG_P (folded_arg0
)
4145 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4148 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4149 rtx y
= lookup_as_function (folded_arg0
, code
);
4151 enum rtx_code associate_code
;
4155 || 0 == (inner_const
4156 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4157 || GET_CODE (inner_const
) != CONST_INT
4158 /* If we have compiled a statement like
4159 "if (x == (x & mask1))", and now are looking at
4160 "x & mask2", we will have a case where the first operand
4161 of Y is the same as our first operand. Unless we detect
4162 this case, an infinite loop will result. */
4163 || XEXP (y
, 0) == folded_arg0
)
4166 /* Don't associate these operations if they are a PLUS with the
4167 same constant and it is a power of two. These might be doable
4168 with a pre- or post-increment. Similarly for two subtracts of
4169 identical powers of two with post decrement. */
4171 if (code
== PLUS
&& const_arg1
== inner_const
4172 && ((HAVE_PRE_INCREMENT
4173 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4174 || (HAVE_POST_INCREMENT
4175 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4176 || (HAVE_PRE_DECREMENT
4177 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4178 || (HAVE_POST_DECREMENT
4179 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4182 /* Compute the code used to compose the constants. For example,
4183 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4185 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4187 new_const
= simplify_binary_operation (associate_code
, mode
,
4188 const_arg1
, inner_const
);
4193 /* If we are associating shift operations, don't let this
4194 produce a shift of the size of the object or larger.
4195 This could occur when we follow a sign-extend by a right
4196 shift on a machine that does a sign-extend as a pair
4199 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4200 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4202 /* As an exception, we can turn an ASHIFTRT of this
4203 form into a shift of the number of bits - 1. */
4204 if (code
== ASHIFTRT
)
4205 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4210 y
= copy_rtx (XEXP (y
, 0));
4212 /* If Y contains our first operand (the most common way this
4213 can happen is if Y is a MEM), we would do into an infinite
4214 loop if we tried to fold it. So don't in that case. */
4216 if (! reg_mentioned_p (folded_arg0
, y
))
4217 y
= fold_rtx (y
, insn
);
4219 return simplify_gen_binary (code
, mode
, y
, new_const
);
4223 case DIV
: case UDIV
:
4224 /* ??? The associative optimization performed immediately above is
4225 also possible for DIV and UDIV using associate_code of MULT.
4226 However, we would need extra code to verify that the
4227 multiplication does not overflow, that is, there is no overflow
4228 in the calculation of new_const. */
4235 new = simplify_binary_operation (code
, mode
,
4236 const_arg0
? const_arg0
: folded_arg0
,
4237 const_arg1
? const_arg1
: folded_arg1
);
4241 /* (lo_sum (high X) X) is simply X. */
4242 if (code
== LO_SUM
&& const_arg0
!= 0
4243 && GET_CODE (const_arg0
) == HIGH
4244 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4249 case RTX_BITFIELD_OPS
:
4250 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4251 const_arg0
? const_arg0
: folded_arg0
,
4252 const_arg1
? const_arg1
: folded_arg1
,
4253 const_arg2
? const_arg2
: XEXP (x
, 2));
4260 return new ? new : x
;
4263 /* Return a constant value currently equivalent to X.
4264 Return 0 if we don't know one. */
4267 equiv_constant (rtx x
)
4270 && REGNO_QTY_VALID_P (REGNO (x
)))
4272 int x_q
= REG_QTY (REGNO (x
));
4273 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4275 if (x_ent
->const_rtx
)
4276 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4279 if (x
== 0 || CONSTANT_P (x
))
4282 /* If X is a MEM, try to fold it outside the context of any insn to see if
4283 it might be equivalent to a constant. That handles the case where it
4284 is a constant-pool reference. Then try to look it up in the hash table
4285 in case it is something whose value we have seen before. */
4289 struct table_elt
*elt
;
4291 x
= fold_rtx (x
, NULL_RTX
);
4295 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
4299 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4300 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4307 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4308 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4309 least-significant part of X.
4310 MODE specifies how big a part of X to return.
4312 If the requested operation cannot be done, 0 is returned.
4314 This is similar to gen_lowpart_general in emit-rtl.c. */
4317 gen_lowpart_if_possible (enum machine_mode mode
, rtx x
)
4319 rtx result
= gen_lowpart_common (mode
, x
);
4325 /* This is the only other case we handle. */
4329 if (WORDS_BIG_ENDIAN
)
4330 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4331 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4332 if (BYTES_BIG_ENDIAN
)
4333 /* Adjust the address so that the address-after-the-data is
4335 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4336 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4338 new = adjust_address_nv (x
, mode
, offset
);
4339 if (! memory_address_p (mode
, XEXP (new, 0)))
4348 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4349 branch. It will be zero if not.
4351 In certain cases, this can cause us to add an equivalence. For example,
4352 if we are following the taken case of
4354 we can add the fact that `i' and '2' are now equivalent.
4356 In any case, we can record that this comparison was passed. If the same
4357 comparison is seen later, we will know its value. */
4360 record_jump_equiv (rtx insn
, int taken
)
4362 int cond_known_true
;
4365 enum machine_mode mode
, mode0
, mode1
;
4366 int reversed_nonequality
= 0;
4369 /* Ensure this is the right kind of insn. */
4370 if (! any_condjump_p (insn
))
4372 set
= pc_set (insn
);
4374 /* See if this jump condition is known true or false. */
4376 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4378 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4380 /* Get the type of comparison being done and the operands being compared.
4381 If we had to reverse a non-equality condition, record that fact so we
4382 know that it isn't valid for floating-point. */
4383 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4384 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4385 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4387 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4388 if (! cond_known_true
)
4390 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4392 /* Don't remember if we can't find the inverse. */
4393 if (code
== UNKNOWN
)
4397 /* The mode is the mode of the non-constant. */
4399 if (mode1
!= VOIDmode
)
4402 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4405 /* Yet another form of subreg creation. In this case, we want something in
4406 MODE, and we should assume OP has MODE iff it is naturally modeless. */
4409 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
4411 enum machine_mode op_mode
= GET_MODE (op
);
4412 if (op_mode
== mode
|| op_mode
== VOIDmode
)
4414 return lowpart_subreg (mode
, op
, op_mode
);
4417 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4418 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4419 Make any useful entries we can with that information. Called from
4420 above function and called recursively. */
4423 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4424 rtx op1
, int reversed_nonequality
)
4426 unsigned op0_hash
, op1_hash
;
4427 int op0_in_memory
, op1_in_memory
;
4428 struct table_elt
*op0_elt
, *op1_elt
;
4430 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4431 we know that they are also equal in the smaller mode (this is also
4432 true for all smaller modes whether or not there is a SUBREG, but
4433 is not worth testing for with no SUBREG). */
4435 /* Note that GET_MODE (op0) may not equal MODE. */
4436 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4437 && (GET_MODE_SIZE (GET_MODE (op0
))
4438 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4440 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4441 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4443 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4444 reversed_nonequality
);
4447 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4448 && (GET_MODE_SIZE (GET_MODE (op1
))
4449 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4451 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4452 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4454 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4455 reversed_nonequality
);
4458 /* Similarly, if this is an NE comparison, and either is a SUBREG
4459 making a smaller mode, we know the whole thing is also NE. */
4461 /* Note that GET_MODE (op0) may not equal MODE;
4462 if we test MODE instead, we can get an infinite recursion
4463 alternating between two modes each wider than MODE. */
4465 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4466 && subreg_lowpart_p (op0
)
4467 && (GET_MODE_SIZE (GET_MODE (op0
))
4468 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4470 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4471 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4473 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4474 reversed_nonequality
);
4477 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4478 && subreg_lowpart_p (op1
)
4479 && (GET_MODE_SIZE (GET_MODE (op1
))
4480 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4482 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4483 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4485 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4486 reversed_nonequality
);
4489 /* Hash both operands. */
4492 hash_arg_in_memory
= 0;
4493 op0_hash
= HASH (op0
, mode
);
4494 op0_in_memory
= hash_arg_in_memory
;
4500 hash_arg_in_memory
= 0;
4501 op1_hash
= HASH (op1
, mode
);
4502 op1_in_memory
= hash_arg_in_memory
;
4507 /* Look up both operands. */
4508 op0_elt
= lookup (op0
, op0_hash
, mode
);
4509 op1_elt
= lookup (op1
, op1_hash
, mode
);
4511 /* If both operands are already equivalent or if they are not in the
4512 table but are identical, do nothing. */
4513 if ((op0_elt
!= 0 && op1_elt
!= 0
4514 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4515 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4518 /* If we aren't setting two things equal all we can do is save this
4519 comparison. Similarly if this is floating-point. In the latter
4520 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4521 If we record the equality, we might inadvertently delete code
4522 whose intent was to change -0 to +0. */
4524 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4526 struct qty_table_elem
*ent
;
4529 /* If we reversed a floating-point comparison, if OP0 is not a
4530 register, or if OP1 is neither a register or constant, we can't
4534 op1
= equiv_constant (op1
);
4536 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4537 || !REG_P (op0
) || op1
== 0)
4540 /* Put OP0 in the hash table if it isn't already. This gives it a
4541 new quantity number. */
4544 if (insert_regs (op0
, NULL
, 0))
4546 rehash_using_reg (op0
);
4547 op0_hash
= HASH (op0
, mode
);
4549 /* If OP0 is contained in OP1, this changes its hash code
4550 as well. Faster to rehash than to check, except
4551 for the simple case of a constant. */
4552 if (! CONSTANT_P (op1
))
4553 op1_hash
= HASH (op1
,mode
);
4556 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4557 op0_elt
->in_memory
= op0_in_memory
;
4560 qty
= REG_QTY (REGNO (op0
));
4561 ent
= &qty_table
[qty
];
4563 ent
->comparison_code
= code
;
4566 /* Look it up again--in case op0 and op1 are the same. */
4567 op1_elt
= lookup (op1
, op1_hash
, mode
);
4569 /* Put OP1 in the hash table so it gets a new quantity number. */
4572 if (insert_regs (op1
, NULL
, 0))
4574 rehash_using_reg (op1
);
4575 op1_hash
= HASH (op1
, mode
);
4578 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4579 op1_elt
->in_memory
= op1_in_memory
;
4582 ent
->comparison_const
= NULL_RTX
;
4583 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4587 ent
->comparison_const
= op1
;
4588 ent
->comparison_qty
= -1;
4594 /* If either side is still missing an equivalence, make it now,
4595 then merge the equivalences. */
4599 if (insert_regs (op0
, NULL
, 0))
4601 rehash_using_reg (op0
);
4602 op0_hash
= HASH (op0
, mode
);
4605 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4606 op0_elt
->in_memory
= op0_in_memory
;
4611 if (insert_regs (op1
, NULL
, 0))
4613 rehash_using_reg (op1
);
4614 op1_hash
= HASH (op1
, mode
);
4617 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4618 op1_elt
->in_memory
= op1_in_memory
;
4621 merge_equiv_classes (op0_elt
, op1_elt
);
4624 /* CSE processing for one instruction.
4625 First simplify sources and addresses of all assignments
4626 in the instruction, using previously-computed equivalents values.
4627 Then install the new sources and destinations in the table
4628 of available values.
4630 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4631 the insn. It means that INSN is inside libcall block. In this
4632 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4634 /* Data on one SET contained in the instruction. */
4638 /* The SET rtx itself. */
4640 /* The SET_SRC of the rtx (the original value, if it is changing). */
4642 /* The hash-table element for the SET_SRC of the SET. */
4643 struct table_elt
*src_elt
;
4644 /* Hash value for the SET_SRC. */
4646 /* Hash value for the SET_DEST. */
4648 /* The SET_DEST, with SUBREG, etc., stripped. */
4650 /* Nonzero if the SET_SRC is in memory. */
4652 /* Nonzero if the SET_SRC contains something
4653 whose value cannot be predicted and understood. */
4655 /* Original machine mode, in case it becomes a CONST_INT.
4656 The size of this field should match the size of the mode
4657 field of struct rtx_def (see rtl.h). */
4658 ENUM_BITFIELD(machine_mode
) mode
: 8;
4659 /* A constant equivalent for SET_SRC, if any. */
4661 /* Original SET_SRC value used for libcall notes. */
4663 /* Hash value of constant equivalent for SET_SRC. */
4664 unsigned src_const_hash
;
4665 /* Table entry for constant equivalent for SET_SRC, if any. */
4666 struct table_elt
*src_const_elt
;
4670 cse_insn (rtx insn
, rtx libcall_insn
)
4672 rtx x
= PATTERN (insn
);
4678 /* Records what this insn does to set CC0. */
4679 rtx this_insn_cc0
= 0;
4680 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4684 struct table_elt
*src_eqv_elt
= 0;
4685 int src_eqv_volatile
= 0;
4686 int src_eqv_in_memory
= 0;
4687 unsigned src_eqv_hash
= 0;
4689 struct set
*sets
= (struct set
*) 0;
4693 /* Find all the SETs and CLOBBERs in this instruction.
4694 Record all the SETs in the array `set' and count them.
4695 Also determine whether there is a CLOBBER that invalidates
4696 all memory references, or all references at varying addresses. */
4700 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4702 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4703 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4704 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4708 if (GET_CODE (x
) == SET
)
4710 sets
= alloca (sizeof (struct set
));
4713 /* Ignore SETs that are unconditional jumps.
4714 They never need cse processing, so this does not hurt.
4715 The reason is not efficiency but rather
4716 so that we can test at the end for instructions
4717 that have been simplified to unconditional jumps
4718 and not be misled by unchanged instructions
4719 that were unconditional jumps to begin with. */
4720 if (SET_DEST (x
) == pc_rtx
4721 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4724 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4725 The hard function value register is used only once, to copy to
4726 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4727 Ensure we invalidate the destination register. On the 80386 no
4728 other code would invalidate it since it is a fixed_reg.
4729 We need not check the return of apply_change_group; see canon_reg. */
4731 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4733 canon_reg (SET_SRC (x
), insn
);
4734 apply_change_group ();
4735 fold_rtx (SET_SRC (x
), insn
);
4736 invalidate (SET_DEST (x
), VOIDmode
);
4741 else if (GET_CODE (x
) == PARALLEL
)
4743 int lim
= XVECLEN (x
, 0);
4745 sets
= alloca (lim
* sizeof (struct set
));
4747 /* Find all regs explicitly clobbered in this insn,
4748 and ensure they are not replaced with any other regs
4749 elsewhere in this insn.
4750 When a reg that is clobbered is also used for input,
4751 we should presume that that is for a reason,
4752 and we should not substitute some other register
4753 which is not supposed to be clobbered.
4754 Therefore, this loop cannot be merged into the one below
4755 because a CALL may precede a CLOBBER and refer to the
4756 value clobbered. We must not let a canonicalization do
4757 anything in that case. */
4758 for (i
= 0; i
< lim
; i
++)
4760 rtx y
= XVECEXP (x
, 0, i
);
4761 if (GET_CODE (y
) == CLOBBER
)
4763 rtx clobbered
= XEXP (y
, 0);
4765 if (REG_P (clobbered
)
4766 || GET_CODE (clobbered
) == SUBREG
)
4767 invalidate (clobbered
, VOIDmode
);
4768 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4769 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4770 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4774 for (i
= 0; i
< lim
; i
++)
4776 rtx y
= XVECEXP (x
, 0, i
);
4777 if (GET_CODE (y
) == SET
)
4779 /* As above, we ignore unconditional jumps and call-insns and
4780 ignore the result of apply_change_group. */
4781 if (GET_CODE (SET_SRC (y
)) == CALL
)
4783 canon_reg (SET_SRC (y
), insn
);
4784 apply_change_group ();
4785 fold_rtx (SET_SRC (y
), insn
);
4786 invalidate (SET_DEST (y
), VOIDmode
);
4788 else if (SET_DEST (y
) == pc_rtx
4789 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4792 sets
[n_sets
++].rtl
= y
;
4794 else if (GET_CODE (y
) == CLOBBER
)
4796 /* If we clobber memory, canon the address.
4797 This does nothing when a register is clobbered
4798 because we have already invalidated the reg. */
4799 if (MEM_P (XEXP (y
, 0)))
4800 canon_reg (XEXP (y
, 0), NULL_RTX
);
4802 else if (GET_CODE (y
) == USE
4803 && ! (REG_P (XEXP (y
, 0))
4804 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4805 canon_reg (y
, NULL_RTX
);
4806 else if (GET_CODE (y
) == CALL
)
4808 /* The result of apply_change_group can be ignored; see
4810 canon_reg (y
, insn
);
4811 apply_change_group ();
4816 else if (GET_CODE (x
) == CLOBBER
)
4818 if (MEM_P (XEXP (x
, 0)))
4819 canon_reg (XEXP (x
, 0), NULL_RTX
);
4822 /* Canonicalize a USE of a pseudo register or memory location. */
4823 else if (GET_CODE (x
) == USE
4824 && ! (REG_P (XEXP (x
, 0))
4825 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4826 canon_reg (XEXP (x
, 0), NULL_RTX
);
4827 else if (GET_CODE (x
) == CALL
)
4829 /* The result of apply_change_group can be ignored; see canon_reg. */
4830 canon_reg (x
, insn
);
4831 apply_change_group ();
4835 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4836 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4837 is handled specially for this case, and if it isn't set, then there will
4838 be no equivalence for the destination. */
4839 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4840 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4841 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4842 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4844 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4845 XEXP (tem
, 0) = src_eqv
;
4848 /* Canonicalize sources and addresses of destinations.
4849 We do this in a separate pass to avoid problems when a MATCH_DUP is
4850 present in the insn pattern. In that case, we want to ensure that
4851 we don't break the duplicate nature of the pattern. So we will replace
4852 both operands at the same time. Otherwise, we would fail to find an
4853 equivalent substitution in the loop calling validate_change below.
4855 We used to suppress canonicalization of DEST if it appears in SRC,
4856 but we don't do this any more. */
4858 for (i
= 0; i
< n_sets
; i
++)
4860 rtx dest
= SET_DEST (sets
[i
].rtl
);
4861 rtx src
= SET_SRC (sets
[i
].rtl
);
4862 rtx
new = canon_reg (src
, insn
);
4865 sets
[i
].orig_src
= src
;
4866 if ((REG_P (new) && REG_P (src
)
4867 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4868 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4869 || (insn_code
= recog_memoized (insn
)) < 0
4870 || insn_data
[insn_code
].n_dups
> 0)
4871 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4873 SET_SRC (sets
[i
].rtl
) = new;
4875 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4877 validate_change (insn
, &XEXP (dest
, 1),
4878 canon_reg (XEXP (dest
, 1), insn
), 1);
4879 validate_change (insn
, &XEXP (dest
, 2),
4880 canon_reg (XEXP (dest
, 2), insn
), 1);
4883 while (GET_CODE (dest
) == SUBREG
4884 || GET_CODE (dest
) == ZERO_EXTRACT
4885 || GET_CODE (dest
) == STRICT_LOW_PART
)
4886 dest
= XEXP (dest
, 0);
4889 canon_reg (dest
, insn
);
4892 /* Now that we have done all the replacements, we can apply the change
4893 group and see if they all work. Note that this will cause some
4894 canonicalizations that would have worked individually not to be applied
4895 because some other canonicalization didn't work, but this should not
4898 The result of apply_change_group can be ignored; see canon_reg. */
4900 apply_change_group ();
4902 /* Set sets[i].src_elt to the class each source belongs to.
4903 Detect assignments from or to volatile things
4904 and set set[i] to zero so they will be ignored
4905 in the rest of this function.
4907 Nothing in this loop changes the hash table or the register chains. */
4909 for (i
= 0; i
< n_sets
; i
++)
4913 struct table_elt
*elt
= 0, *p
;
4914 enum machine_mode mode
;
4917 rtx src_related
= 0;
4918 struct table_elt
*src_const_elt
= 0;
4919 int src_cost
= MAX_COST
;
4920 int src_eqv_cost
= MAX_COST
;
4921 int src_folded_cost
= MAX_COST
;
4922 int src_related_cost
= MAX_COST
;
4923 int src_elt_cost
= MAX_COST
;
4924 int src_regcost
= MAX_COST
;
4925 int src_eqv_regcost
= MAX_COST
;
4926 int src_folded_regcost
= MAX_COST
;
4927 int src_related_regcost
= MAX_COST
;
4928 int src_elt_regcost
= MAX_COST
;
4929 /* Set nonzero if we need to call force_const_mem on with the
4930 contents of src_folded before using it. */
4931 int src_folded_force_flag
= 0;
4933 dest
= SET_DEST (sets
[i
].rtl
);
4934 src
= SET_SRC (sets
[i
].rtl
);
4936 /* If SRC is a constant that has no machine mode,
4937 hash it with the destination's machine mode.
4938 This way we can keep different modes separate. */
4940 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4941 sets
[i
].mode
= mode
;
4945 enum machine_mode eqvmode
= mode
;
4946 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4947 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4949 hash_arg_in_memory
= 0;
4950 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4952 /* Find the equivalence class for the equivalent expression. */
4955 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4957 src_eqv_volatile
= do_not_record
;
4958 src_eqv_in_memory
= hash_arg_in_memory
;
4961 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4962 value of the INNER register, not the destination. So it is not
4963 a valid substitution for the source. But save it for later. */
4964 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4967 src_eqv_here
= src_eqv
;
4969 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4970 simplified result, which may not necessarily be valid. */
4971 src_folded
= fold_rtx (src
, insn
);
4974 /* ??? This caused bad code to be generated for the m68k port with -O2.
4975 Suppose src is (CONST_INT -1), and that after truncation src_folded
4976 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4977 At the end we will add src and src_const to the same equivalence
4978 class. We now have 3 and -1 on the same equivalence class. This
4979 causes later instructions to be mis-optimized. */
4980 /* If storing a constant in a bitfield, pre-truncate the constant
4981 so we will be able to record it later. */
4982 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4984 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4986 if (GET_CODE (src
) == CONST_INT
4987 && GET_CODE (width
) == CONST_INT
4988 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4989 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4991 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4992 << INTVAL (width
)) - 1));
4996 /* Compute SRC's hash code, and also notice if it
4997 should not be recorded at all. In that case,
4998 prevent any further processing of this assignment. */
5000 hash_arg_in_memory
= 0;
5003 sets
[i
].src_hash
= HASH (src
, mode
);
5004 sets
[i
].src_volatile
= do_not_record
;
5005 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5007 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5008 a pseudo, do not record SRC. Using SRC as a replacement for
5009 anything else will be incorrect in that situation. Note that
5010 this usually occurs only for stack slots, in which case all the
5011 RTL would be referring to SRC, so we don't lose any optimization
5012 opportunities by not having SRC in the hash table. */
5015 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
5017 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
5018 sets
[i
].src_volatile
= 1;
5021 /* It is no longer clear why we used to do this, but it doesn't
5022 appear to still be needed. So let's try without it since this
5023 code hurts cse'ing widened ops. */
5024 /* If source is a paradoxical subreg (such as QI treated as an SI),
5025 treat it as volatile. It may do the work of an SI in one context
5026 where the extra bits are not being used, but cannot replace an SI
5028 if (GET_CODE (src
) == SUBREG
5029 && (GET_MODE_SIZE (GET_MODE (src
))
5030 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5031 sets
[i
].src_volatile
= 1;
5034 /* Locate all possible equivalent forms for SRC. Try to replace
5035 SRC in the insn with each cheaper equivalent.
5037 We have the following types of equivalents: SRC itself, a folded
5038 version, a value given in a REG_EQUAL note, or a value related
5041 Each of these equivalents may be part of an additional class
5042 of equivalents (if more than one is in the table, they must be in
5043 the same class; we check for this).
5045 If the source is volatile, we don't do any table lookups.
5047 We note any constant equivalent for possible later use in a
5050 if (!sets
[i
].src_volatile
)
5051 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5053 sets
[i
].src_elt
= elt
;
5055 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5057 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5059 /* The REG_EQUAL is indicating that two formerly distinct
5060 classes are now equivalent. So merge them. */
5061 merge_equiv_classes (elt
, src_eqv_elt
);
5062 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
5063 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
5069 else if (src_eqv_elt
)
5072 /* Try to find a constant somewhere and record it in `src_const'.
5073 Record its table element, if any, in `src_const_elt'. Look in
5074 any known equivalences first. (If the constant is not in the
5075 table, also set `sets[i].src_const_hash'). */
5077 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5081 src_const_elt
= elt
;
5086 && (CONSTANT_P (src_folded
)
5087 /* Consider (minus (label_ref L1) (label_ref L2)) as
5088 "constant" here so we will record it. This allows us
5089 to fold switch statements when an ADDR_DIFF_VEC is used. */
5090 || (GET_CODE (src_folded
) == MINUS
5091 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5092 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5093 src_const
= src_folded
, src_const_elt
= elt
;
5094 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5095 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5097 /* If we don't know if the constant is in the table, get its
5098 hash code and look it up. */
5099 if (src_const
&& src_const_elt
== 0)
5101 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5102 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5105 sets
[i
].src_const
= src_const
;
5106 sets
[i
].src_const_elt
= src_const_elt
;
5108 /* If the constant and our source are both in the table, mark them as
5109 equivalent. Otherwise, if a constant is in the table but the source
5110 isn't, set ELT to it. */
5111 if (src_const_elt
&& elt
5112 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5113 merge_equiv_classes (elt
, src_const_elt
);
5114 else if (src_const_elt
&& elt
== 0)
5115 elt
= src_const_elt
;
5117 /* See if there is a register linearly related to a constant
5118 equivalent of SRC. */
5120 && (GET_CODE (src_const
) == CONST
5121 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5123 src_related
= use_related_value (src_const
, src_const_elt
);
5126 struct table_elt
*src_related_elt
5127 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5128 if (src_related_elt
&& elt
)
5130 if (elt
->first_same_value
5131 != src_related_elt
->first_same_value
)
5132 /* This can occur when we previously saw a CONST
5133 involving a SYMBOL_REF and then see the SYMBOL_REF
5134 twice. Merge the involved classes. */
5135 merge_equiv_classes (elt
, src_related_elt
);
5138 src_related_elt
= 0;
5140 else if (src_related_elt
&& elt
== 0)
5141 elt
= src_related_elt
;
5145 /* See if we have a CONST_INT that is already in a register in a
5148 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5149 && GET_MODE_CLASS (mode
) == MODE_INT
5150 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5152 enum machine_mode wider_mode
;
5154 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5155 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5156 && src_related
== 0;
5157 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5159 struct table_elt
*const_elt
5160 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5165 for (const_elt
= const_elt
->first_same_value
;
5166 const_elt
; const_elt
= const_elt
->next_same_value
)
5167 if (REG_P (const_elt
->exp
))
5169 src_related
= gen_lowpart (mode
,
5176 /* Another possibility is that we have an AND with a constant in
5177 a mode narrower than a word. If so, it might have been generated
5178 as part of an "if" which would narrow the AND. If we already
5179 have done the AND in a wider mode, we can use a SUBREG of that
5182 if (flag_expensive_optimizations
&& ! src_related
5183 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5184 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5186 enum machine_mode tmode
;
5187 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5189 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5190 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5191 tmode
= GET_MODE_WIDER_MODE (tmode
))
5193 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5194 struct table_elt
*larger_elt
;
5198 PUT_MODE (new_and
, tmode
);
5199 XEXP (new_and
, 0) = inner
;
5200 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5201 if (larger_elt
== 0)
5204 for (larger_elt
= larger_elt
->first_same_value
;
5205 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5206 if (REG_P (larger_elt
->exp
))
5209 = gen_lowpart (mode
, larger_elt
->exp
);
5219 #ifdef LOAD_EXTEND_OP
5220 /* See if a MEM has already been loaded with a widening operation;
5221 if it has, we can use a subreg of that. Many CISC machines
5222 also have such operations, but this is only likely to be
5223 beneficial on these machines. */
5225 if (flag_expensive_optimizations
&& src_related
== 0
5226 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5227 && GET_MODE_CLASS (mode
) == MODE_INT
5228 && MEM_P (src
) && ! do_not_record
5229 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
5231 struct rtx_def memory_extend_buf
;
5232 rtx memory_extend_rtx
= &memory_extend_buf
;
5233 enum machine_mode tmode
;
5235 /* Set what we are trying to extend and the operation it might
5236 have been extended with. */
5237 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
5238 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5239 XEXP (memory_extend_rtx
, 0) = src
;
5241 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5242 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5243 tmode
= GET_MODE_WIDER_MODE (tmode
))
5245 struct table_elt
*larger_elt
;
5247 PUT_MODE (memory_extend_rtx
, tmode
);
5248 larger_elt
= lookup (memory_extend_rtx
,
5249 HASH (memory_extend_rtx
, tmode
), tmode
);
5250 if (larger_elt
== 0)
5253 for (larger_elt
= larger_elt
->first_same_value
;
5254 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5255 if (REG_P (larger_elt
->exp
))
5257 src_related
= gen_lowpart (mode
,
5266 #endif /* LOAD_EXTEND_OP */
5268 if (src
== src_folded
)
5271 /* At this point, ELT, if nonzero, points to a class of expressions
5272 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5273 and SRC_RELATED, if nonzero, each contain additional equivalent
5274 expressions. Prune these latter expressions by deleting expressions
5275 already in the equivalence class.
5277 Check for an equivalent identical to the destination. If found,
5278 this is the preferred equivalent since it will likely lead to
5279 elimination of the insn. Indicate this by placing it in
5283 elt
= elt
->first_same_value
;
5284 for (p
= elt
; p
; p
= p
->next_same_value
)
5286 enum rtx_code code
= GET_CODE (p
->exp
);
5288 /* If the expression is not valid, ignore it. Then we do not
5289 have to check for validity below. In most cases, we can use
5290 `rtx_equal_p', since canonicalization has already been done. */
5291 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5294 /* Also skip paradoxical subregs, unless that's what we're
5297 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5298 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5300 && GET_CODE (src
) == SUBREG
5301 && GET_MODE (src
) == GET_MODE (p
->exp
)
5302 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5303 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5306 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5308 else if (src_folded
&& GET_CODE (src_folded
) == code
5309 && rtx_equal_p (src_folded
, p
->exp
))
5311 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5312 && rtx_equal_p (src_eqv_here
, p
->exp
))
5314 else if (src_related
&& GET_CODE (src_related
) == code
5315 && rtx_equal_p (src_related
, p
->exp
))
5318 /* This is the same as the destination of the insns, we want
5319 to prefer it. Copy it to src_related. The code below will
5320 then give it a negative cost. */
5321 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5325 /* Find the cheapest valid equivalent, trying all the available
5326 possibilities. Prefer items not in the hash table to ones
5327 that are when they are equal cost. Note that we can never
5328 worsen an insn as the current contents will also succeed.
5329 If we find an equivalent identical to the destination, use it as best,
5330 since this insn will probably be eliminated in that case. */
5333 if (rtx_equal_p (src
, dest
))
5334 src_cost
= src_regcost
= -1;
5337 src_cost
= COST (src
);
5338 src_regcost
= approx_reg_cost (src
);
5344 if (rtx_equal_p (src_eqv_here
, dest
))
5345 src_eqv_cost
= src_eqv_regcost
= -1;
5348 src_eqv_cost
= COST (src_eqv_here
);
5349 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5355 if (rtx_equal_p (src_folded
, dest
))
5356 src_folded_cost
= src_folded_regcost
= -1;
5359 src_folded_cost
= COST (src_folded
);
5360 src_folded_regcost
= approx_reg_cost (src_folded
);
5366 if (rtx_equal_p (src_related
, dest
))
5367 src_related_cost
= src_related_regcost
= -1;
5370 src_related_cost
= COST (src_related
);
5371 src_related_regcost
= approx_reg_cost (src_related
);
5375 /* If this was an indirect jump insn, a known label will really be
5376 cheaper even though it looks more expensive. */
5377 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5378 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5380 /* Terminate loop when replacement made. This must terminate since
5381 the current contents will be tested and will always be valid. */
5386 /* Skip invalid entries. */
5387 while (elt
&& !REG_P (elt
->exp
)
5388 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5389 elt
= elt
->next_same_value
;
5391 /* A paradoxical subreg would be bad here: it'll be the right
5392 size, but later may be adjusted so that the upper bits aren't
5393 what we want. So reject it. */
5395 && GET_CODE (elt
->exp
) == SUBREG
5396 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5397 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5398 /* It is okay, though, if the rtx we're trying to match
5399 will ignore any of the bits we can't predict. */
5401 && GET_CODE (src
) == SUBREG
5402 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5403 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5404 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5406 elt
= elt
->next_same_value
;
5412 src_elt_cost
= elt
->cost
;
5413 src_elt_regcost
= elt
->regcost
;
5416 /* Find cheapest and skip it for the next time. For items
5417 of equal cost, use this order:
5418 src_folded, src, src_eqv, src_related and hash table entry. */
5420 && preferable (src_folded_cost
, src_folded_regcost
,
5421 src_cost
, src_regcost
) <= 0
5422 && preferable (src_folded_cost
, src_folded_regcost
,
5423 src_eqv_cost
, src_eqv_regcost
) <= 0
5424 && preferable (src_folded_cost
, src_folded_regcost
,
5425 src_related_cost
, src_related_regcost
) <= 0
5426 && preferable (src_folded_cost
, src_folded_regcost
,
5427 src_elt_cost
, src_elt_regcost
) <= 0)
5429 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5430 if (src_folded_force_flag
)
5432 rtx forced
= force_const_mem (mode
, trial
);
5438 && preferable (src_cost
, src_regcost
,
5439 src_eqv_cost
, src_eqv_regcost
) <= 0
5440 && preferable (src_cost
, src_regcost
,
5441 src_related_cost
, src_related_regcost
) <= 0
5442 && preferable (src_cost
, src_regcost
,
5443 src_elt_cost
, src_elt_regcost
) <= 0)
5444 trial
= src
, src_cost
= MAX_COST
;
5445 else if (src_eqv_here
5446 && preferable (src_eqv_cost
, src_eqv_regcost
,
5447 src_related_cost
, src_related_regcost
) <= 0
5448 && preferable (src_eqv_cost
, src_eqv_regcost
,
5449 src_elt_cost
, src_elt_regcost
) <= 0)
5450 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5451 else if (src_related
5452 && preferable (src_related_cost
, src_related_regcost
,
5453 src_elt_cost
, src_elt_regcost
) <= 0)
5454 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5457 trial
= copy_rtx (elt
->exp
);
5458 elt
= elt
->next_same_value
;
5459 src_elt_cost
= MAX_COST
;
5462 /* We don't normally have an insn matching (set (pc) (pc)), so
5463 check for this separately here. We will delete such an
5466 For other cases such as a table jump or conditional jump
5467 where we know the ultimate target, go ahead and replace the
5468 operand. While that may not make a valid insn, we will
5469 reemit the jump below (and also insert any necessary
5471 if (n_sets
== 1 && dest
== pc_rtx
5473 || (GET_CODE (trial
) == LABEL_REF
5474 && ! condjump_p (insn
))))
5476 /* Don't substitute non-local labels, this confuses CFG. */
5477 if (GET_CODE (trial
) == LABEL_REF
5478 && LABEL_REF_NONLOCAL_P (trial
))
5481 SET_SRC (sets
[i
].rtl
) = trial
;
5482 cse_jumps_altered
= 1;
5486 /* Look for a substitution that makes a valid insn. */
5487 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5489 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5491 /* If we just made a substitution inside a libcall, then we
5492 need to make the same substitution in any notes attached
5493 to the RETVAL insn. */
5495 && (REG_P (sets
[i
].orig_src
)
5496 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5497 || MEM_P (sets
[i
].orig_src
)))
5499 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5501 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5506 /* The result of apply_change_group can be ignored; see
5509 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5510 apply_change_group ();
5514 /* If we previously found constant pool entries for
5515 constants and this is a constant, try making a
5516 pool entry. Put it in src_folded unless we already have done
5517 this since that is where it likely came from. */
5519 else if (constant_pool_entries_cost
5520 && CONSTANT_P (trial
)
5521 /* Reject cases that will abort in decode_rtx_const.
5522 On the alpha when simplifying a switch, we get
5523 (const (truncate (minus (label_ref) (label_ref)))). */
5524 && ! (GET_CODE (trial
) == CONST
5525 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5526 /* Likewise on IA-64, except without the truncate. */
5527 && ! (GET_CODE (trial
) == CONST
5528 && GET_CODE (XEXP (trial
, 0)) == MINUS
5529 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5530 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5532 || (!MEM_P (src_folded
)
5533 && ! src_folded_force_flag
))
5534 && GET_MODE_CLASS (mode
) != MODE_CC
5535 && mode
!= VOIDmode
)
5537 src_folded_force_flag
= 1;
5539 src_folded_cost
= constant_pool_entries_cost
;
5540 src_folded_regcost
= constant_pool_entries_regcost
;
5544 src
= SET_SRC (sets
[i
].rtl
);
5546 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5547 However, there is an important exception: If both are registers
5548 that are not the head of their equivalence class, replace SET_SRC
5549 with the head of the class. If we do not do this, we will have
5550 both registers live over a portion of the basic block. This way,
5551 their lifetimes will likely abut instead of overlapping. */
5553 && REGNO_QTY_VALID_P (REGNO (dest
)))
5555 int dest_q
= REG_QTY (REGNO (dest
));
5556 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5558 if (dest_ent
->mode
== GET_MODE (dest
)
5559 && dest_ent
->first_reg
!= REGNO (dest
)
5560 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5561 /* Don't do this if the original insn had a hard reg as
5562 SET_SRC or SET_DEST. */
5563 && (!REG_P (sets
[i
].src
)
5564 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5565 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5566 /* We can't call canon_reg here because it won't do anything if
5567 SRC is a hard register. */
5569 int src_q
= REG_QTY (REGNO (src
));
5570 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5571 int first
= src_ent
->first_reg
;
5573 = (first
>= FIRST_PSEUDO_REGISTER
5574 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5576 /* We must use validate-change even for this, because this
5577 might be a special no-op instruction, suitable only to
5579 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5582 /* If we had a constant that is cheaper than what we are now
5583 setting SRC to, use that constant. We ignored it when we
5584 thought we could make this into a no-op. */
5585 if (src_const
&& COST (src_const
) < COST (src
)
5586 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5593 /* If we made a change, recompute SRC values. */
5594 if (src
!= sets
[i
].src
)
5598 hash_arg_in_memory
= 0;
5600 sets
[i
].src_hash
= HASH (src
, mode
);
5601 sets
[i
].src_volatile
= do_not_record
;
5602 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5603 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5606 /* If this is a single SET, we are setting a register, and we have an
5607 equivalent constant, we want to add a REG_NOTE. We don't want
5608 to write a REG_EQUAL note for a constant pseudo since verifying that
5609 that pseudo hasn't been eliminated is a pain. Such a note also
5610 won't help anything.
5612 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5613 which can be created for a reference to a compile time computable
5614 entry in a jump table. */
5616 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5617 && !REG_P (src_const
)
5618 && ! (GET_CODE (src_const
) == CONST
5619 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5620 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5621 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5623 /* We only want a REG_EQUAL note if src_const != src. */
5624 if (! rtx_equal_p (src
, src_const
))
5626 /* Make sure that the rtx is not shared. */
5627 src_const
= copy_rtx (src_const
);
5629 /* Record the actual constant value in a REG_EQUAL note,
5630 making a new one if one does not already exist. */
5631 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5635 /* Now deal with the destination. */
5638 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5639 while (GET_CODE (dest
) == SUBREG
5640 || GET_CODE (dest
) == ZERO_EXTRACT
5641 || GET_CODE (dest
) == STRICT_LOW_PART
)
5642 dest
= XEXP (dest
, 0);
5644 sets
[i
].inner_dest
= dest
;
5648 #ifdef PUSH_ROUNDING
5649 /* Stack pushes invalidate the stack pointer. */
5650 rtx addr
= XEXP (dest
, 0);
5651 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5652 && XEXP (addr
, 0) == stack_pointer_rtx
)
5653 invalidate (stack_pointer_rtx
, Pmode
);
5655 dest
= fold_rtx (dest
, insn
);
5658 /* Compute the hash code of the destination now,
5659 before the effects of this instruction are recorded,
5660 since the register values used in the address computation
5661 are those before this instruction. */
5662 sets
[i
].dest_hash
= HASH (dest
, mode
);
5664 /* Don't enter a bit-field in the hash table
5665 because the value in it after the store
5666 may not equal what was stored, due to truncation. */
5668 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5670 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5672 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5673 && GET_CODE (width
) == CONST_INT
5674 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5675 && ! (INTVAL (src_const
)
5676 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5677 /* Exception: if the value is constant,
5678 and it won't be truncated, record it. */
5682 /* This is chosen so that the destination will be invalidated
5683 but no new value will be recorded.
5684 We must invalidate because sometimes constant
5685 values can be recorded for bitfields. */
5686 sets
[i
].src_elt
= 0;
5687 sets
[i
].src_volatile
= 1;
5693 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5695 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5697 /* One less use of the label this insn used to jump to. */
5699 cse_jumps_altered
= 1;
5700 /* No more processing for this set. */
5704 /* If this SET is now setting PC to a label, we know it used to
5705 be a conditional or computed branch. */
5706 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5707 && !LABEL_REF_NONLOCAL_P (src
))
5709 /* Now emit a BARRIER after the unconditional jump. */
5710 if (NEXT_INSN (insn
) == 0
5711 || !BARRIER_P (NEXT_INSN (insn
)))
5712 emit_barrier_after (insn
);
5714 /* We reemit the jump in as many cases as possible just in
5715 case the form of an unconditional jump is significantly
5716 different than a computed jump or conditional jump.
5718 If this insn has multiple sets, then reemitting the
5719 jump is nontrivial. So instead we just force rerecognition
5720 and hope for the best. */
5725 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5726 JUMP_LABEL (new) = XEXP (src
, 0);
5727 LABEL_NUSES (XEXP (src
, 0))++;
5729 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5730 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5733 XEXP (note
, 1) = NULL_RTX
;
5734 REG_NOTES (new) = note
;
5740 /* Now emit a BARRIER after the unconditional jump. */
5741 if (NEXT_INSN (insn
) == 0
5742 || !BARRIER_P (NEXT_INSN (insn
)))
5743 emit_barrier_after (insn
);
5746 INSN_CODE (insn
) = -1;
5748 /* Do not bother deleting any unreachable code,
5749 let jump/flow do that. */
5751 cse_jumps_altered
= 1;
5755 /* If destination is volatile, invalidate it and then do no further
5756 processing for this assignment. */
5758 else if (do_not_record
)
5760 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5761 invalidate (dest
, VOIDmode
);
5762 else if (MEM_P (dest
))
5763 invalidate (dest
, VOIDmode
);
5764 else if (GET_CODE (dest
) == STRICT_LOW_PART
5765 || GET_CODE (dest
) == ZERO_EXTRACT
)
5766 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5770 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5771 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5774 /* If setting CC0, record what it was set to, or a constant, if it
5775 is equivalent to a constant. If it is being set to a floating-point
5776 value, make a COMPARE with the appropriate constant of 0. If we
5777 don't do this, later code can interpret this as a test against
5778 const0_rtx, which can cause problems if we try to put it into an
5779 insn as a floating-point operand. */
5780 if (dest
== cc0_rtx
)
5782 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5783 this_insn_cc0_mode
= mode
;
5784 if (FLOAT_MODE_P (mode
))
5785 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5791 /* Now enter all non-volatile source expressions in the hash table
5792 if they are not already present.
5793 Record their equivalence classes in src_elt.
5794 This way we can insert the corresponding destinations into
5795 the same classes even if the actual sources are no longer in them
5796 (having been invalidated). */
5798 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5799 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5801 struct table_elt
*elt
;
5802 struct table_elt
*classp
= sets
[0].src_elt
;
5803 rtx dest
= SET_DEST (sets
[0].rtl
);
5804 enum machine_mode eqvmode
= GET_MODE (dest
);
5806 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5808 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5811 if (insert_regs (src_eqv
, classp
, 0))
5813 rehash_using_reg (src_eqv
);
5814 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5816 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5817 elt
->in_memory
= src_eqv_in_memory
;
5820 /* Check to see if src_eqv_elt is the same as a set source which
5821 does not yet have an elt, and if so set the elt of the set source
5823 for (i
= 0; i
< n_sets
; i
++)
5824 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5825 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5826 sets
[i
].src_elt
= src_eqv_elt
;
5829 for (i
= 0; i
< n_sets
; i
++)
5830 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5831 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5833 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5835 /* REG_EQUAL in setting a STRICT_LOW_PART
5836 gives an equivalent for the entire destination register,
5837 not just for the subreg being stored in now.
5838 This is a more interesting equivalence, so we arrange later
5839 to treat the entire reg as the destination. */
5840 sets
[i
].src_elt
= src_eqv_elt
;
5841 sets
[i
].src_hash
= src_eqv_hash
;
5845 /* Insert source and constant equivalent into hash table, if not
5847 struct table_elt
*classp
= src_eqv_elt
;
5848 rtx src
= sets
[i
].src
;
5849 rtx dest
= SET_DEST (sets
[i
].rtl
);
5850 enum machine_mode mode
5851 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5853 /* It's possible that we have a source value known to be
5854 constant but don't have a REG_EQUAL note on the insn.
5855 Lack of a note will mean src_eqv_elt will be NULL. This
5856 can happen where we've generated a SUBREG to access a
5857 CONST_INT that is already in a register in a wider mode.
5858 Ensure that the source expression is put in the proper
5861 classp
= sets
[i
].src_const_elt
;
5863 if (sets
[i
].src_elt
== 0)
5865 /* Don't put a hard register source into the table if this is
5866 the last insn of a libcall. In this case, we only need
5867 to put src_eqv_elt in src_elt. */
5868 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5870 struct table_elt
*elt
;
5872 /* Note that these insert_regs calls cannot remove
5873 any of the src_elt's, because they would have failed to
5874 match if not still valid. */
5875 if (insert_regs (src
, classp
, 0))
5877 rehash_using_reg (src
);
5878 sets
[i
].src_hash
= HASH (src
, mode
);
5880 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5881 elt
->in_memory
= sets
[i
].src_in_memory
;
5882 sets
[i
].src_elt
= classp
= elt
;
5885 sets
[i
].src_elt
= classp
;
5887 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5888 && src
!= sets
[i
].src_const
5889 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5890 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5891 sets
[i
].src_const_hash
, mode
);
5894 else if (sets
[i
].src_elt
== 0)
5895 /* If we did not insert the source into the hash table (e.g., it was
5896 volatile), note the equivalence class for the REG_EQUAL value, if any,
5897 so that the destination goes into that class. */
5898 sets
[i
].src_elt
= src_eqv_elt
;
5900 invalidate_from_clobbers (x
);
5902 /* Some registers are invalidated by subroutine calls. Memory is
5903 invalidated by non-constant calls. */
5907 if (! CONST_OR_PURE_CALL_P (insn
))
5908 invalidate_memory ();
5909 invalidate_for_call ();
5912 /* Now invalidate everything set by this instruction.
5913 If a SUBREG or other funny destination is being set,
5914 sets[i].rtl is still nonzero, so here we invalidate the reg
5915 a part of which is being set. */
5917 for (i
= 0; i
< n_sets
; i
++)
5920 /* We can't use the inner dest, because the mode associated with
5921 a ZERO_EXTRACT is significant. */
5922 rtx dest
= SET_DEST (sets
[i
].rtl
);
5924 /* Needed for registers to remove the register from its
5925 previous quantity's chain.
5926 Needed for memory if this is a nonvarying address, unless
5927 we have just done an invalidate_memory that covers even those. */
5928 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5929 invalidate (dest
, VOIDmode
);
5930 else if (MEM_P (dest
))
5931 invalidate (dest
, VOIDmode
);
5932 else if (GET_CODE (dest
) == STRICT_LOW_PART
5933 || GET_CODE (dest
) == ZERO_EXTRACT
)
5934 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5937 /* A volatile ASM invalidates everything. */
5938 if (NONJUMP_INSN_P (insn
)
5939 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5940 && MEM_VOLATILE_P (PATTERN (insn
)))
5941 flush_hash_table ();
5943 /* Make sure registers mentioned in destinations
5944 are safe for use in an expression to be inserted.
5945 This removes from the hash table
5946 any invalid entry that refers to one of these registers.
5948 We don't care about the return value from mention_regs because
5949 we are going to hash the SET_DEST values unconditionally. */
5951 for (i
= 0; i
< n_sets
; i
++)
5955 rtx x
= SET_DEST (sets
[i
].rtl
);
5961 /* We used to rely on all references to a register becoming
5962 inaccessible when a register changes to a new quantity,
5963 since that changes the hash code. However, that is not
5964 safe, since after HASH_SIZE new quantities we get a
5965 hash 'collision' of a register with its own invalid
5966 entries. And since SUBREGs have been changed not to
5967 change their hash code with the hash code of the register,
5968 it wouldn't work any longer at all. So we have to check
5969 for any invalid references lying around now.
5970 This code is similar to the REG case in mention_regs,
5971 but it knows that reg_tick has been incremented, and
5972 it leaves reg_in_table as -1 . */
5973 unsigned int regno
= REGNO (x
);
5974 unsigned int endregno
5975 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
5976 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
5979 for (i
= regno
; i
< endregno
; i
++)
5981 if (REG_IN_TABLE (i
) >= 0)
5983 remove_invalid_refs (i
);
5984 REG_IN_TABLE (i
) = -1;
5991 /* We may have just removed some of the src_elt's from the hash table.
5992 So replace each one with the current head of the same class. */
5994 for (i
= 0; i
< n_sets
; i
++)
5997 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5998 /* If elt was removed, find current head of same class,
5999 or 0 if nothing remains of that class. */
6001 struct table_elt
*elt
= sets
[i
].src_elt
;
6003 while (elt
&& elt
->prev_same_value
)
6004 elt
= elt
->prev_same_value
;
6006 while (elt
&& elt
->first_same_value
== 0)
6007 elt
= elt
->next_same_value
;
6008 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6012 /* Now insert the destinations into their equivalence classes. */
6014 for (i
= 0; i
< n_sets
; i
++)
6017 rtx dest
= SET_DEST (sets
[i
].rtl
);
6018 struct table_elt
*elt
;
6020 /* Don't record value if we are not supposed to risk allocating
6021 floating-point values in registers that might be wider than
6023 if ((flag_float_store
6025 && FLOAT_MODE_P (GET_MODE (dest
)))
6026 /* Don't record BLKmode values, because we don't know the
6027 size of it, and can't be sure that other BLKmode values
6028 have the same or smaller size. */
6029 || GET_MODE (dest
) == BLKmode
6030 /* Don't record values of destinations set inside a libcall block
6031 since we might delete the libcall. Things should have been set
6032 up so we won't want to reuse such a value, but we play it safe
6035 /* If we didn't put a REG_EQUAL value or a source into the hash
6036 table, there is no point is recording DEST. */
6037 || sets
[i
].src_elt
== 0
6038 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6039 or SIGN_EXTEND, don't record DEST since it can cause
6040 some tracking to be wrong.
6042 ??? Think about this more later. */
6043 || (GET_CODE (dest
) == SUBREG
6044 && (GET_MODE_SIZE (GET_MODE (dest
))
6045 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6046 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
6047 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
6050 /* STRICT_LOW_PART isn't part of the value BEING set,
6051 and neither is the SUBREG inside it.
6052 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6053 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6054 dest
= SUBREG_REG (XEXP (dest
, 0));
6056 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
6057 /* Registers must also be inserted into chains for quantities. */
6058 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6060 /* If `insert_regs' changes something, the hash code must be
6062 rehash_using_reg (dest
);
6063 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
6066 elt
= insert (dest
, sets
[i
].src_elt
,
6067 sets
[i
].dest_hash
, GET_MODE (dest
));
6069 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
6070 && !MEM_READONLY_P (sets
[i
].inner_dest
));
6072 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6073 narrower than M2, and both M1 and M2 are the same number of words,
6074 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6075 make that equivalence as well.
6077 However, BAR may have equivalences for which gen_lowpart
6078 will produce a simpler value than gen_lowpart applied to
6079 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6080 BAR's equivalences. If we don't get a simplified form, make
6081 the SUBREG. It will not be used in an equivalence, but will
6082 cause two similar assignments to be detected.
6084 Note the loop below will find SUBREG_REG (DEST) since we have
6085 already entered SRC and DEST of the SET in the table. */
6087 if (GET_CODE (dest
) == SUBREG
6088 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6090 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6091 && (GET_MODE_SIZE (GET_MODE (dest
))
6092 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6093 && sets
[i
].src_elt
!= 0)
6095 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6096 struct table_elt
*elt
, *classp
= 0;
6098 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6099 elt
= elt
->next_same_value
)
6103 struct table_elt
*src_elt
;
6106 /* Ignore invalid entries. */
6107 if (!REG_P (elt
->exp
)
6108 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6111 /* We may have already been playing subreg games. If the
6112 mode is already correct for the destination, use it. */
6113 if (GET_MODE (elt
->exp
) == new_mode
)
6117 /* Calculate big endian correction for the SUBREG_BYTE.
6118 We have already checked that M1 (GET_MODE (dest))
6119 is not narrower than M2 (new_mode). */
6120 if (BYTES_BIG_ENDIAN
)
6121 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6122 - GET_MODE_SIZE (new_mode
));
6124 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6125 GET_MODE (dest
), byte
);
6128 /* The call to simplify_gen_subreg fails if the value
6129 is VOIDmode, yet we can't do any simplification, e.g.
6130 for EXPR_LISTs denoting function call results.
6131 It is invalid to construct a SUBREG with a VOIDmode
6132 SUBREG_REG, hence a zero new_src means we can't do
6133 this substitution. */
6137 src_hash
= HASH (new_src
, new_mode
);
6138 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6140 /* Put the new source in the hash table is if isn't
6144 if (insert_regs (new_src
, classp
, 0))
6146 rehash_using_reg (new_src
);
6147 src_hash
= HASH (new_src
, new_mode
);
6149 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6150 src_elt
->in_memory
= elt
->in_memory
;
6152 else if (classp
&& classp
!= src_elt
->first_same_value
)
6153 /* Show that two things that we've seen before are
6154 actually the same. */
6155 merge_equiv_classes (src_elt
, classp
);
6157 classp
= src_elt
->first_same_value
;
6158 /* Ignore invalid entries. */
6160 && !REG_P (classp
->exp
)
6161 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6162 classp
= classp
->next_same_value
;
6167 /* Special handling for (set REG0 REG1) where REG0 is the
6168 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6169 be used in the sequel, so (if easily done) change this insn to
6170 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6171 that computed their value. Then REG1 will become a dead store
6172 and won't cloud the situation for later optimizations.
6174 Do not make this change if REG1 is a hard register, because it will
6175 then be used in the sequel and we may be changing a two-operand insn
6176 into a three-operand insn.
6178 Also do not do this if we are operating on a copy of INSN.
6180 Also don't do this if INSN ends a libcall; this would cause an unrelated
6181 register to be set in the middle of a libcall, and we then get bad code
6182 if the libcall is deleted. */
6184 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6185 && NEXT_INSN (PREV_INSN (insn
)) == insn
6186 && REG_P (SET_SRC (sets
[0].rtl
))
6187 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6188 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6190 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6191 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6193 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6194 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6197 /* Scan for the previous nonnote insn, but stop at a basic
6201 prev
= PREV_INSN (prev
);
6203 while (prev
&& NOTE_P (prev
)
6204 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6206 /* Do not swap the registers around if the previous instruction
6207 attaches a REG_EQUIV note to REG1.
6209 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6210 from the pseudo that originally shadowed an incoming argument
6211 to another register. Some uses of REG_EQUIV might rely on it
6212 being attached to REG1 rather than REG2.
6214 This section previously turned the REG_EQUIV into a REG_EQUAL
6215 note. We cannot do that because REG_EQUIV may provide an
6216 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6218 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6219 && GET_CODE (PATTERN (prev
)) == SET
6220 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6221 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6223 rtx dest
= SET_DEST (sets
[0].rtl
);
6224 rtx src
= SET_SRC (sets
[0].rtl
);
6227 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6228 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6229 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6230 apply_change_group ();
6232 /* If INSN has a REG_EQUAL note, and this note mentions
6233 REG0, then we must delete it, because the value in
6234 REG0 has changed. If the note's value is REG1, we must
6235 also delete it because that is now this insn's dest. */
6236 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6238 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6239 || rtx_equal_p (src
, XEXP (note
, 0))))
6240 remove_note (insn
, note
);
6245 /* If this is a conditional jump insn, record any known equivalences due to
6246 the condition being tested. */
6249 && n_sets
== 1 && GET_CODE (x
) == SET
6250 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6251 record_jump_equiv (insn
, 0);
6254 /* If the previous insn set CC0 and this insn no longer references CC0,
6255 delete the previous insn. Here we use the fact that nothing expects CC0
6256 to be valid over an insn, which is true until the final pass. */
6257 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6258 && (tem
= single_set (prev_insn
)) != 0
6259 && SET_DEST (tem
) == cc0_rtx
6260 && ! reg_mentioned_p (cc0_rtx
, x
))
6261 delete_insn (prev_insn
);
6263 prev_insn_cc0
= this_insn_cc0
;
6264 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6269 /* Remove from the hash table all expressions that reference memory. */
6272 invalidate_memory (void)
6275 struct table_elt
*p
, *next
;
6277 for (i
= 0; i
< HASH_SIZE
; i
++)
6278 for (p
= table
[i
]; p
; p
= next
)
6280 next
= p
->next_same_hash
;
6282 remove_from_table (p
, i
);
6286 /* If ADDR is an address that implicitly affects the stack pointer, return
6287 1 and update the register tables to show the effect. Else, return 0. */
6290 addr_affects_sp_p (rtx addr
)
6292 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6293 && REG_P (XEXP (addr
, 0))
6294 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6296 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6298 REG_TICK (STACK_POINTER_REGNUM
)++;
6299 /* Is it possible to use a subreg of SP? */
6300 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6303 /* This should be *very* rare. */
6304 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6305 invalidate (stack_pointer_rtx
, VOIDmode
);
6313 /* Perform invalidation on the basis of everything about an insn
6314 except for invalidating the actual places that are SET in it.
6315 This includes the places CLOBBERed, and anything that might
6316 alias with something that is SET or CLOBBERed.
6318 X is the pattern of the insn. */
6321 invalidate_from_clobbers (rtx x
)
6323 if (GET_CODE (x
) == CLOBBER
)
6325 rtx ref
= XEXP (x
, 0);
6328 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6330 invalidate (ref
, VOIDmode
);
6331 else if (GET_CODE (ref
) == STRICT_LOW_PART
6332 || GET_CODE (ref
) == ZERO_EXTRACT
)
6333 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6336 else if (GET_CODE (x
) == PARALLEL
)
6339 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6341 rtx y
= XVECEXP (x
, 0, i
);
6342 if (GET_CODE (y
) == CLOBBER
)
6344 rtx ref
= XEXP (y
, 0);
6345 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6347 invalidate (ref
, VOIDmode
);
6348 else if (GET_CODE (ref
) == STRICT_LOW_PART
6349 || GET_CODE (ref
) == ZERO_EXTRACT
)
6350 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6356 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6357 and replace any registers in them with either an equivalent constant
6358 or the canonical form of the register. If we are inside an address,
6359 only do this if the address remains valid.
6361 OBJECT is 0 except when within a MEM in which case it is the MEM.
6363 Return the replacement for X. */
6366 cse_process_notes (rtx x
, rtx object
)
6368 enum rtx_code code
= GET_CODE (x
);
6369 const char *fmt
= GET_RTX_FORMAT (code
);
6386 validate_change (x
, &XEXP (x
, 0),
6387 cse_process_notes (XEXP (x
, 0), x
), 0);
6392 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6393 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6395 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6402 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6403 /* We don't substitute VOIDmode constants into these rtx,
6404 since they would impede folding. */
6405 if (GET_MODE (new) != VOIDmode
)
6406 validate_change (object
, &XEXP (x
, 0), new, 0);
6411 i
= REG_QTY (REGNO (x
));
6413 /* Return a constant or a constant register. */
6414 if (REGNO_QTY_VALID_P (REGNO (x
)))
6416 struct qty_table_elem
*ent
= &qty_table
[i
];
6418 if (ent
->const_rtx
!= NULL_RTX
6419 && (CONSTANT_P (ent
->const_rtx
)
6420 || REG_P (ent
->const_rtx
)))
6422 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6428 /* Otherwise, canonicalize this register. */
6429 return canon_reg (x
, NULL_RTX
);
6435 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6437 validate_change (object
, &XEXP (x
, i
),
6438 cse_process_notes (XEXP (x
, i
), object
), 0);
6443 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6444 since they are done elsewhere. This function is called via note_stores. */
6447 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6449 enum rtx_code code
= GET_CODE (dest
);
6452 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6453 /* There are times when an address can appear varying and be a PLUS
6454 during this scan when it would be a fixed address were we to know
6455 the proper equivalences. So invalidate all memory if there is
6456 a BLKmode or nonscalar memory reference or a reference to a
6457 variable address. */
6458 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6459 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6461 invalidate_memory ();
6465 if (GET_CODE (set
) == CLOBBER
6470 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6471 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6472 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6473 invalidate (dest
, VOIDmode
);
6476 /* Invalidate all insns from START up to the end of the function or the
6477 next label. This called when we wish to CSE around a block that is
6478 conditionally executed. */
6481 invalidate_skipped_block (rtx start
)
6485 for (insn
= start
; insn
&& !LABEL_P (insn
);
6486 insn
= NEXT_INSN (insn
))
6488 if (! INSN_P (insn
))
6493 if (! CONST_OR_PURE_CALL_P (insn
))
6494 invalidate_memory ();
6495 invalidate_for_call ();
6498 invalidate_from_clobbers (PATTERN (insn
));
6499 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6503 /* Find the end of INSN's basic block and return its range,
6504 the total number of SETs in all the insns of the block, the last insn of the
6505 block, and the branch path.
6507 The branch path indicates which branches should be followed. If a nonzero
6508 path size is specified, the block should be rescanned and a different set
6509 of branches will be taken. The branch path is only used if
6510 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6512 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6513 used to describe the block. It is filled in with the information about
6514 the current block. The incoming structure's branch path, if any, is used
6515 to construct the output branch path. */
6518 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6519 int follow_jumps
, int skip_blocks
)
6523 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6524 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6525 int path_size
= data
->path_size
;
6529 /* Update the previous branch path, if any. If the last branch was
6530 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6531 If it was previously PATH_NOT_TAKEN,
6532 shorten the path by one and look at the previous branch. We know that
6533 at least one branch must have been taken if PATH_SIZE is nonzero. */
6534 while (path_size
> 0)
6536 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6538 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6545 /* If the first instruction is marked with QImode, that means we've
6546 already processed this block. Our caller will look at DATA->LAST
6547 to figure out where to go next. We want to return the next block
6548 in the instruction stream, not some branched-to block somewhere
6549 else. We accomplish this by pretending our called forbid us to
6550 follow jumps, or skip blocks. */
6551 if (GET_MODE (insn
) == QImode
)
6552 follow_jumps
= skip_blocks
= 0;
6554 /* Scan to end of this basic block. */
6555 while (p
&& !LABEL_P (p
))
6557 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6558 the regs restored by the longjmp come from
6559 a later time than the setjmp. */
6560 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6561 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6564 /* A PARALLEL can have lots of SETs in it,
6565 especially if it is really an ASM_OPERANDS. */
6566 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6567 nsets
+= XVECLEN (PATTERN (p
), 0);
6568 else if (!NOTE_P (p
))
6571 /* Ignore insns made by CSE; they cannot affect the boundaries of
6574 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6575 high_cuid
= INSN_CUID (p
);
6576 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6577 low_cuid
= INSN_CUID (p
);
6579 /* See if this insn is in our branch path. If it is and we are to
6581 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6583 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6586 /* Point to next entry in path, if any. */
6590 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6591 was specified, we haven't reached our maximum path length, there are
6592 insns following the target of the jump, this is the only use of the
6593 jump label, and the target label is preceded by a BARRIER.
6595 Alternatively, we can follow the jump if it branches around a
6596 block of code and there are no other branches into the block.
6597 In this case invalidate_skipped_block will be called to invalidate any
6598 registers set in the block when following the jump. */
6600 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6602 && GET_CODE (PATTERN (p
)) == SET
6603 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6604 && JUMP_LABEL (p
) != 0
6605 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6606 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6608 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6610 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6611 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6612 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6613 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6616 /* If we ran into a BARRIER, this code is an extension of the
6617 basic block when the branch is taken. */
6618 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6620 /* Don't allow ourself to keep walking around an
6621 always-executed loop. */
6622 if (next_real_insn (q
) == next
)
6628 /* Similarly, don't put a branch in our path more than once. */
6629 for (i
= 0; i
< path_entry
; i
++)
6630 if (data
->path
[i
].branch
== p
)
6633 if (i
!= path_entry
)
6636 data
->path
[path_entry
].branch
= p
;
6637 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6639 /* This branch now ends our path. It was possible that we
6640 didn't see this branch the last time around (when the
6641 insn in front of the target was a JUMP_INSN that was
6642 turned into a no-op). */
6643 path_size
= path_entry
;
6646 /* Mark block so we won't scan it again later. */
6647 PUT_MODE (NEXT_INSN (p
), QImode
);
6649 /* Detect a branch around a block of code. */
6650 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6654 if (next_real_insn (q
) == next
)
6660 for (i
= 0; i
< path_entry
; i
++)
6661 if (data
->path
[i
].branch
== p
)
6664 if (i
!= path_entry
)
6667 /* This is no_labels_between_p (p, q) with an added check for
6668 reaching the end of a function (in case Q precedes P). */
6669 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6675 data
->path
[path_entry
].branch
= p
;
6676 data
->path
[path_entry
++].status
= PATH_AROUND
;
6678 path_size
= path_entry
;
6681 /* Mark block so we won't scan it again later. */
6682 PUT_MODE (NEXT_INSN (p
), QImode
);
6689 data
->low_cuid
= low_cuid
;
6690 data
->high_cuid
= high_cuid
;
6691 data
->nsets
= nsets
;
6694 /* If all jumps in the path are not taken, set our path length to zero
6695 so a rescan won't be done. */
6696 for (i
= path_size
- 1; i
>= 0; i
--)
6697 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6701 data
->path_size
= 0;
6703 data
->path_size
= path_size
;
6705 /* End the current branch path. */
6706 data
->path
[path_size
].branch
= 0;
6709 /* Perform cse on the instructions of a function.
6710 F is the first instruction.
6711 NREGS is one plus the highest pseudo-reg number used in the instruction.
6713 Returns 1 if jump_optimize should be redone due to simplifications
6714 in conditional jump instructions. */
6717 cse_main (rtx f
, int nregs
, FILE *file
)
6719 struct cse_basic_block_data val
;
6723 val
.path
= xmalloc (sizeof (struct branch_path
)
6724 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6726 cse_jumps_altered
= 0;
6727 recorded_label_ref
= 0;
6728 constant_pool_entries_cost
= 0;
6729 constant_pool_entries_regcost
= 0;
6731 rtl_hooks
= cse_rtl_hooks
;
6734 init_alias_analysis ();
6736 reg_eqv_table
= xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
6738 /* Reset the counter indicating how many elements have been made
6740 n_elements_made
= 0;
6742 /* Find the largest uid. */
6744 max_uid
= get_max_uid ();
6745 uid_cuid
= xcalloc (max_uid
+ 1, sizeof (int));
6747 /* Compute the mapping from uids to cuids.
6748 CUIDs are numbers assigned to insns, like uids,
6749 except that cuids increase monotonically through the code.
6750 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6751 between two insns is not affected by -g. */
6753 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6756 || NOTE_LINE_NUMBER (insn
) < 0)
6757 INSN_CUID (insn
) = ++i
;
6759 /* Give a line number note the same cuid as preceding insn. */
6760 INSN_CUID (insn
) = i
;
6763 /* Loop over basic blocks.
6764 Compute the maximum number of qty's needed for each basic block
6765 (which is 2 for each SET). */
6770 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
,
6771 flag_cse_skip_blocks
);
6773 /* If this basic block was already processed or has no sets, skip it. */
6774 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6776 PUT_MODE (insn
, VOIDmode
);
6777 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6782 cse_basic_block_start
= val
.low_cuid
;
6783 cse_basic_block_end
= val
.high_cuid
;
6784 max_qty
= val
.nsets
* 2;
6787 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
6788 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
6791 /* Make MAX_QTY bigger to give us room to optimize
6792 past the end of this basic block, if that should prove useful. */
6796 /* If this basic block is being extended by following certain jumps,
6797 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6798 Otherwise, we start after this basic block. */
6799 if (val
.path_size
> 0)
6800 cse_basic_block (insn
, val
.last
, val
.path
);
6803 int old_cse_jumps_altered
= cse_jumps_altered
;
6806 /* When cse changes a conditional jump to an unconditional
6807 jump, we want to reprocess the block, since it will give
6808 us a new branch path to investigate. */
6809 cse_jumps_altered
= 0;
6810 temp
= cse_basic_block (insn
, val
.last
, val
.path
);
6811 if (cse_jumps_altered
== 0
6812 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
6815 cse_jumps_altered
|= old_cse_jumps_altered
;
6826 if (max_elements_made
< n_elements_made
)
6827 max_elements_made
= n_elements_made
;
6830 end_alias_analysis ();
6832 free (reg_eqv_table
);
6834 rtl_hooks
= general_rtl_hooks
;
6836 return cse_jumps_altered
|| recorded_label_ref
;
6839 /* Process a single basic block. FROM and TO and the limits of the basic
6840 block. NEXT_BRANCH points to the branch path when following jumps or
6841 a null path when not following jumps. */
6844 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
)
6848 rtx libcall_insn
= NULL_RTX
;
6850 int no_conflict
= 0;
6852 /* Allocate the space needed by qty_table. */
6853 qty_table
= xmalloc (max_qty
* sizeof (struct qty_table_elem
));
6857 /* TO might be a label. If so, protect it from being deleted. */
6858 if (to
!= 0 && LABEL_P (to
))
6861 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
6863 enum rtx_code code
= GET_CODE (insn
);
6865 /* If we have processed 1,000 insns, flush the hash table to
6866 avoid extreme quadratic behavior. We must not include NOTEs
6867 in the count since there may be more of them when generating
6868 debugging information. If we clear the table at different
6869 times, code generated with -g -O might be different than code
6870 generated with -O but not -g.
6872 ??? This is a real kludge and needs to be done some other way.
6874 if (code
!= NOTE
&& num_insns
++ > 1000)
6876 flush_hash_table ();
6880 /* See if this is a branch that is part of the path. If so, and it is
6881 to be taken, do so. */
6882 if (next_branch
->branch
== insn
)
6884 enum taken status
= next_branch
++->status
;
6885 if (status
!= PATH_NOT_TAKEN
)
6887 if (status
== PATH_TAKEN
)
6888 record_jump_equiv (insn
, 1);
6890 invalidate_skipped_block (NEXT_INSN (insn
));
6892 /* Set the last insn as the jump insn; it doesn't affect cc0.
6893 Then follow this branch. */
6898 insn
= JUMP_LABEL (insn
);
6903 if (GET_MODE (insn
) == QImode
)
6904 PUT_MODE (insn
, VOIDmode
);
6906 if (GET_RTX_CLASS (code
) == RTX_INSN
)
6910 /* Process notes first so we have all notes in canonical forms when
6911 looking for duplicate operations. */
6913 if (REG_NOTES (insn
))
6914 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
6916 /* Track when we are inside in LIBCALL block. Inside such a block,
6917 we do not want to record destinations. The last insn of a
6918 LIBCALL block is not considered to be part of the block, since
6919 its destination is the result of the block and hence should be
6922 if (REG_NOTES (insn
) != 0)
6924 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
6925 libcall_insn
= XEXP (p
, 0);
6926 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6928 /* Keep libcall_insn for the last SET insn of a no-conflict
6929 block to prevent changing the destination. */
6935 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
6939 cse_insn (insn
, libcall_insn
);
6941 if (no_conflict
== -1)
6947 /* If we haven't already found an insn where we added a LABEL_REF,
6949 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
6950 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6952 recorded_label_ref
= 1;
6955 /* If INSN is now an unconditional jump, skip to the end of our
6956 basic block by pretending that we just did the last insn in the
6957 basic block. If we are jumping to the end of our block, show
6958 that we can have one usage of TO. */
6960 if (any_uncondjump_p (insn
))
6968 if (JUMP_LABEL (insn
) == to
)
6971 /* Maybe TO was deleted because the jump is unconditional.
6972 If so, there is nothing left in this basic block. */
6973 /* ??? Perhaps it would be smarter to set TO
6974 to whatever follows this insn,
6975 and pretend the basic block had always ended here. */
6976 if (INSN_DELETED_P (to
))
6979 insn
= PREV_INSN (to
);
6982 /* See if it is ok to keep on going past the label
6983 which used to end our basic block. Remember that we incremented
6984 the count of that label, so we decrement it here. If we made
6985 a jump unconditional, TO_USAGE will be one; in that case, we don't
6986 want to count the use in that jump. */
6988 if (to
!= 0 && NEXT_INSN (insn
) == to
6989 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
6991 struct cse_basic_block_data val
;
6994 insn
= NEXT_INSN (to
);
6996 /* If TO was the last insn in the function, we are done. */
7003 /* If TO was preceded by a BARRIER we are done with this block
7004 because it has no continuation. */
7005 prev
= prev_nonnote_insn (to
);
7006 if (prev
&& BARRIER_P (prev
))
7012 /* Find the end of the following block. Note that we won't be
7013 following branches in this case. */
7016 val
.path
= xmalloc (sizeof (struct branch_path
)
7017 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
7018 cse_end_of_basic_block (insn
, &val
, 0, 0);
7021 /* If the tables we allocated have enough space left
7022 to handle all the SETs in the next basic block,
7023 continue through it. Otherwise, return,
7024 and that block will be scanned individually. */
7025 if (val
.nsets
* 2 + next_qty
> max_qty
)
7028 cse_basic_block_start
= val
.low_cuid
;
7029 cse_basic_block_end
= val
.high_cuid
;
7032 /* Prevent TO from being deleted if it is a label. */
7033 if (to
!= 0 && LABEL_P (to
))
7036 /* Back up so we process the first insn in the extension. */
7037 insn
= PREV_INSN (insn
);
7041 gcc_assert (next_qty
<= max_qty
);
7045 return to
? NEXT_INSN (to
) : 0;
7048 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7049 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7052 check_for_label_ref (rtx
*rtl
, void *data
)
7054 rtx insn
= (rtx
) data
;
7056 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7057 we must rerun jump since it needs to place the note. If this is a
7058 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7059 since no REG_LABEL will be added. */
7060 return (GET_CODE (*rtl
) == LABEL_REF
7061 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7062 && LABEL_P (XEXP (*rtl
, 0))
7063 && INSN_UID (XEXP (*rtl
, 0)) != 0
7064 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7067 /* Count the number of times registers are used (not set) in X.
7068 COUNTS is an array in which we accumulate the count, INCR is how much
7069 we count each register usage. */
7072 count_reg_usage (rtx x
, int *counts
, int incr
)
7082 switch (code
= GET_CODE (x
))
7085 counts
[REGNO (x
)] += incr
;
7099 /* If we are clobbering a MEM, mark any registers inside the address
7101 if (MEM_P (XEXP (x
, 0)))
7102 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, incr
);
7106 /* Unless we are setting a REG, count everything in SET_DEST. */
7107 if (!REG_P (SET_DEST (x
)))
7108 count_reg_usage (SET_DEST (x
), counts
, incr
);
7109 count_reg_usage (SET_SRC (x
), counts
, incr
);
7113 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, incr
);
7118 count_reg_usage (PATTERN (x
), counts
, incr
);
7120 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7123 note
= find_reg_equal_equiv_note (x
);
7126 rtx eqv
= XEXP (note
, 0);
7128 if (GET_CODE (eqv
) == EXPR_LIST
)
7129 /* This REG_EQUAL note describes the result of a function call.
7130 Process all the arguments. */
7133 count_reg_usage (XEXP (eqv
, 0), counts
, incr
);
7134 eqv
= XEXP (eqv
, 1);
7136 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7138 count_reg_usage (eqv
, counts
, incr
);
7143 if (REG_NOTE_KIND (x
) == REG_EQUAL
7144 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7145 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7146 involving registers in the address. */
7147 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7148 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7150 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7154 /* Iterate over just the inputs, not the constraints as well. */
7155 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7156 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, incr
);
7166 fmt
= GET_RTX_FORMAT (code
);
7167 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7170 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7171 else if (fmt
[i
] == 'E')
7172 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7173 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7177 /* Return true if set is live. */
7179 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7186 if (set_noop_p (set
))
7190 else if (GET_CODE (SET_DEST (set
)) == CC0
7191 && !side_effects_p (SET_SRC (set
))
7192 && ((tem
= next_nonnote_insn (insn
)) == 0
7194 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7197 else if (!REG_P (SET_DEST (set
))
7198 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7199 || counts
[REGNO (SET_DEST (set
))] != 0
7200 || side_effects_p (SET_SRC (set
)))
7205 /* Return true if insn is live. */
7208 insn_live_p (rtx insn
, int *counts
)
7211 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7213 else if (GET_CODE (PATTERN (insn
)) == SET
)
7214 return set_live_p (PATTERN (insn
), insn
, counts
);
7215 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7217 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7219 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7221 if (GET_CODE (elt
) == SET
)
7223 if (set_live_p (elt
, insn
, counts
))
7226 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7235 /* Return true if libcall is dead as a whole. */
7238 dead_libcall_p (rtx insn
, int *counts
)
7242 /* See if there's a REG_EQUAL note on this insn and try to
7243 replace the source with the REG_EQUAL expression.
7245 We assume that insns with REG_RETVALs can only be reg->reg
7246 copies at this point. */
7247 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7251 set
= single_set (insn
);
7255 new = simplify_rtx (XEXP (note
, 0));
7257 new = XEXP (note
, 0);
7259 /* While changing insn, we must update the counts accordingly. */
7260 count_reg_usage (insn
, counts
, -1);
7262 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7264 count_reg_usage (insn
, counts
, 1);
7265 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7266 remove_note (insn
, note
);
7270 if (CONSTANT_P (new))
7272 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7273 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7275 count_reg_usage (insn
, counts
, 1);
7276 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7277 remove_note (insn
, note
);
7282 count_reg_usage (insn
, counts
, 1);
7286 /* Scan all the insns and delete any that are dead; i.e., they store a register
7287 that is never used or they copy a register to itself.
7289 This is used to remove insns made obviously dead by cse, loop or other
7290 optimizations. It improves the heuristics in loop since it won't try to
7291 move dead invariants out of loops or make givs for dead quantities. The
7292 remaining passes of the compilation are also sped up. */
7295 delete_trivially_dead_insns (rtx insns
, int nreg
)
7299 int in_libcall
= 0, dead_libcall
= 0;
7300 int ndead
= 0, nlastdead
, niterations
= 0;
7302 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7303 /* First count the number of times each register is used. */
7304 counts
= xcalloc (nreg
, sizeof (int));
7305 for (insn
= next_real_insn (insns
); insn
; insn
= next_real_insn (insn
))
7306 count_reg_usage (insn
, counts
, 1);
7312 /* Go from the last insn to the first and delete insns that only set unused
7313 registers or copy a register to itself. As we delete an insn, remove
7314 usage counts for registers it uses.
7316 The first jump optimization pass may leave a real insn as the last
7317 insn in the function. We must not skip that insn or we may end
7318 up deleting code that is not really dead. */
7319 insn
= get_last_insn ();
7320 if (! INSN_P (insn
))
7321 insn
= prev_real_insn (insn
);
7323 for (; insn
; insn
= prev
)
7327 prev
= prev_real_insn (insn
);
7329 /* Don't delete any insns that are part of a libcall block unless
7330 we can delete the whole libcall block.
7332 Flow or loop might get confused if we did that. Remember
7333 that we are scanning backwards. */
7334 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7338 dead_libcall
= dead_libcall_p (insn
, counts
);
7340 else if (in_libcall
)
7341 live_insn
= ! dead_libcall
;
7343 live_insn
= insn_live_p (insn
, counts
);
7345 /* If this is a dead insn, delete it and show registers in it aren't
7350 count_reg_usage (insn
, counts
, -1);
7351 delete_insn_and_edges (insn
);
7355 if (find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7362 while (ndead
!= nlastdead
);
7364 if (dump_file
&& ndead
)
7365 fprintf (dump_file
, "Deleted %i trivially dead insns; %i iterations\n",
7366 ndead
, niterations
);
7369 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7373 /* This function is called via for_each_rtx. The argument, NEWREG, is
7374 a condition code register with the desired mode. If we are looking
7375 at the same register in a different mode, replace it with
7379 cse_change_cc_mode (rtx
*loc
, void *data
)
7381 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
7385 && REGNO (*loc
) == REGNO (args
->newreg
)
7386 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
7388 validate_change (args
->insn
, loc
, args
->newreg
, 1);
7395 /* Change the mode of any reference to the register REGNO (NEWREG) to
7396 GET_MODE (NEWREG) in INSN. */
7399 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
7401 struct change_cc_mode_args args
;
7408 args
.newreg
= newreg
;
7410 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
7411 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
7413 /* If the following assertion was triggered, there is most probably
7414 something wrong with the cc_modes_compatible back end function.
7415 CC modes only can be considered compatible if the insn - with the mode
7416 replaced by any of the compatible modes - can still be recognized. */
7417 success
= apply_change_group ();
7418 gcc_assert (success
);
7421 /* Change the mode of any reference to the register REGNO (NEWREG) to
7422 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7423 any instruction which modifies NEWREG. */
7426 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7430 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7432 if (! INSN_P (insn
))
7435 if (reg_set_p (newreg
, insn
))
7438 cse_change_cc_mode_insn (insn
, newreg
);
7442 /* BB is a basic block which finishes with CC_REG as a condition code
7443 register which is set to CC_SRC. Look through the successors of BB
7444 to find blocks which have a single predecessor (i.e., this one),
7445 and look through those blocks for an assignment to CC_REG which is
7446 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7447 permitted to change the mode of CC_SRC to a compatible mode. This
7448 returns VOIDmode if no equivalent assignments were found.
7449 Otherwise it returns the mode which CC_SRC should wind up with.
7451 The main complexity in this function is handling the mode issues.
7452 We may have more than one duplicate which we can eliminate, and we
7453 try to find a mode which will work for multiple duplicates. */
7455 static enum machine_mode
7456 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7459 enum machine_mode mode
;
7460 unsigned int insn_count
;
7463 enum machine_mode modes
[2];
7469 /* We expect to have two successors. Look at both before picking
7470 the final mode for the comparison. If we have more successors
7471 (i.e., some sort of table jump, although that seems unlikely),
7472 then we require all beyond the first two to use the same
7475 found_equiv
= false;
7476 mode
= GET_MODE (cc_src
);
7478 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7483 if (e
->flags
& EDGE_COMPLEX
)
7486 if (EDGE_COUNT (e
->dest
->preds
) != 1
7487 || e
->dest
== EXIT_BLOCK_PTR
)
7490 end
= NEXT_INSN (BB_END (e
->dest
));
7491 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7495 if (! INSN_P (insn
))
7498 /* If CC_SRC is modified, we have to stop looking for
7499 something which uses it. */
7500 if (modified_in_p (cc_src
, insn
))
7503 /* Check whether INSN sets CC_REG to CC_SRC. */
7504 set
= single_set (insn
);
7506 && REG_P (SET_DEST (set
))
7507 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7510 enum machine_mode set_mode
;
7511 enum machine_mode comp_mode
;
7514 set_mode
= GET_MODE (SET_SRC (set
));
7515 comp_mode
= set_mode
;
7516 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7518 else if (GET_CODE (cc_src
) == COMPARE
7519 && GET_CODE (SET_SRC (set
)) == COMPARE
7521 && rtx_equal_p (XEXP (cc_src
, 0),
7522 XEXP (SET_SRC (set
), 0))
7523 && rtx_equal_p (XEXP (cc_src
, 1),
7524 XEXP (SET_SRC (set
), 1)))
7527 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7528 if (comp_mode
!= VOIDmode
7529 && (can_change_mode
|| comp_mode
== mode
))
7536 if (insn_count
< ARRAY_SIZE (insns
))
7538 insns
[insn_count
] = insn
;
7539 modes
[insn_count
] = set_mode
;
7540 last_insns
[insn_count
] = end
;
7543 if (mode
!= comp_mode
)
7545 gcc_assert (can_change_mode
);
7548 /* The modified insn will be re-recognized later. */
7549 PUT_MODE (cc_src
, mode
);
7554 if (set_mode
!= mode
)
7556 /* We found a matching expression in the
7557 wrong mode, but we don't have room to
7558 store it in the array. Punt. This case
7562 /* INSN sets CC_REG to a value equal to CC_SRC
7563 with the right mode. We can simply delete
7568 /* We found an instruction to delete. Keep looking,
7569 in the hopes of finding a three-way jump. */
7573 /* We found an instruction which sets the condition
7574 code, so don't look any farther. */
7578 /* If INSN sets CC_REG in some other way, don't look any
7580 if (reg_set_p (cc_reg
, insn
))
7584 /* If we fell off the bottom of the block, we can keep looking
7585 through successors. We pass CAN_CHANGE_MODE as false because
7586 we aren't prepared to handle compatibility between the
7587 further blocks and this block. */
7590 enum machine_mode submode
;
7592 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7593 if (submode
!= VOIDmode
)
7595 gcc_assert (submode
== mode
);
7597 can_change_mode
= false;
7605 /* Now INSN_COUNT is the number of instructions we found which set
7606 CC_REG to a value equivalent to CC_SRC. The instructions are in
7607 INSNS. The modes used by those instructions are in MODES. */
7610 for (i
= 0; i
< insn_count
; ++i
)
7612 if (modes
[i
] != mode
)
7614 /* We need to change the mode of CC_REG in INSNS[i] and
7615 subsequent instructions. */
7618 if (GET_MODE (cc_reg
) == mode
)
7621 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7623 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7627 delete_insn (insns
[i
]);
7633 /* If we have a fixed condition code register (or two), walk through
7634 the instructions and try to eliminate duplicate assignments. */
7637 cse_condition_code_reg (void)
7639 unsigned int cc_regno_1
;
7640 unsigned int cc_regno_2
;
7645 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7648 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7649 if (cc_regno_2
!= INVALID_REGNUM
)
7650 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7652 cc_reg_2
= NULL_RTX
;
7661 enum machine_mode mode
;
7662 enum machine_mode orig_mode
;
7664 /* Look for blocks which end with a conditional jump based on a
7665 condition code register. Then look for the instruction which
7666 sets the condition code register. Then look through the
7667 successor blocks for instructions which set the condition
7668 code register to the same value. There are other possible
7669 uses of the condition code register, but these are by far the
7670 most common and the ones which we are most likely to be able
7673 last_insn
= BB_END (bb
);
7674 if (!JUMP_P (last_insn
))
7677 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7679 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7684 cc_src_insn
= NULL_RTX
;
7686 for (insn
= PREV_INSN (last_insn
);
7687 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7688 insn
= PREV_INSN (insn
))
7692 if (! INSN_P (insn
))
7694 set
= single_set (insn
);
7696 && REG_P (SET_DEST (set
))
7697 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7700 cc_src
= SET_SRC (set
);
7703 else if (reg_set_p (cc_reg
, insn
))
7710 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7713 /* Now CC_REG is a condition code register used for a
7714 conditional jump at the end of the block, and CC_SRC, in
7715 CC_SRC_INSN, is the value to which that condition code
7716 register is set, and CC_SRC is still meaningful at the end of
7719 orig_mode
= GET_MODE (cc_src
);
7720 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7721 if (mode
!= VOIDmode
)
7723 gcc_assert (mode
== GET_MODE (cc_src
));
7724 if (mode
!= orig_mode
)
7726 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7728 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7730 /* Do the same in the following insns that use the
7731 current value of CC_REG within BB. */
7732 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7733 NEXT_INSN (last_insn
),