Undo June 11th change
[official-gcc.git] / gcc / caller-save.c
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1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 94-95, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "rtl.h"
24 #include "insn-config.h"
25 #include "flags.h"
26 #include "regs.h"
27 #include "hard-reg-set.h"
28 #include "recog.h"
29 #include "basic-block.h"
30 #include "reload.h"
31 #include "expr.h"
33 #ifndef MAX_MOVE_MAX
34 #define MAX_MOVE_MAX MOVE_MAX
35 #endif
37 #ifndef MIN_UNITS_PER_WORD
38 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
39 #endif
41 /* Modes for each hard register that we can save. The smallest mode is wide
42 enough to save the entire contents of the register. When saving the
43 register because it is live we first try to save in multi-register modes.
44 If that is not possible the save is done one register at a time. */
46 static enum machine_mode
47 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
49 /* For each hard register, a place on the stack where it can be saved,
50 if needed. */
52 static rtx
53 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
55 /* We will only make a register eligible for caller-save if it can be
56 saved in its widest mode with a simple SET insn as long as the memory
57 address is valid. We record the INSN_CODE is those insns here since
58 when we emit them, the addresses might not be valid, so they might not
59 be recognized. */
61 static enum insn_code
62 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
63 static enum insn_code
64 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
66 /* Set of hard regs currently live (during scan of all insns). */
68 static HARD_REG_SET hard_regs_live;
70 /* Set of hard regs currently residing in save area (during insn scan). */
72 static HARD_REG_SET hard_regs_saved;
74 /* Set of hard regs which need to be restored before referenced. */
76 static HARD_REG_SET hard_regs_need_restore;
78 /* Number of registers currently in hard_regs_saved. */
80 int n_regs_saved;
82 static void set_reg_live PROTO((rtx, rtx));
83 static void clear_reg_live PROTO((rtx));
84 static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode));
85 static int insert_save_restore PROTO((rtx, int, int,
86 enum machine_mode, int));
88 /* Initialize for caller-save.
90 Look at all the hard registers that are used by a call and for which
91 regclass.c has not already excluded from being used across a call.
93 Ensure that we can find a mode to save the register and that there is a
94 simple insn to save and restore the register. This latter check avoids
95 problems that would occur if we tried to save the MQ register of some
96 machines directly into memory. */
98 void
99 init_caller_save ()
101 char *first_obj = (char *) oballoc (0);
102 rtx addr_reg;
103 int offset;
104 rtx address;
105 int i, j;
107 /* First find all the registers that we need to deal with and all
108 the modes that they can have. If we can't find a mode to use,
109 we can't have the register live over calls. */
111 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
113 if (call_used_regs[i] && ! call_fixed_regs[i])
115 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
117 regno_save_mode[i][j] = choose_hard_reg_mode (i, j);
118 if (regno_save_mode[i][j] == VOIDmode && j == 1)
120 call_fixed_regs[i] = 1;
121 SET_HARD_REG_BIT (call_fixed_reg_set, i);
125 else
126 regno_save_mode[i][1] = VOIDmode;
129 /* The following code tries to approximate the conditions under which
130 we can easily save and restore a register without scratch registers or
131 other complexities. It will usually work, except under conditions where
132 the validity of an insn operand is dependent on the address offset.
133 No such cases are currently known.
135 We first find a typical offset from some BASE_REG_CLASS register.
136 This address is chosen by finding the first register in the class
137 and by finding the smallest power of two that is a valid offset from
138 that register in every mode we will use to save registers. */
140 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
141 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
142 break;
144 if (i == FIRST_PSEUDO_REGISTER)
145 abort ();
147 addr_reg = gen_rtx_REG (Pmode, i);
149 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
151 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
154 if (regno_save_mode[i][1] != VOIDmode
155 && ! strict_memory_address_p (regno_save_mode[i][1], address))
156 break;
158 if (i == FIRST_PSEUDO_REGISTER)
159 break;
162 /* If we didn't find a valid address, we must use register indirect. */
163 if (offset == 0)
164 address = addr_reg;
166 /* Next we try to form an insn to save and restore the register. We
167 see if such an insn is recognized and meets its constraints. */
169 start_sequence ();
171 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
172 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
173 if (regno_save_mode[i][j] != VOIDmode)
175 rtx mem = gen_rtx_MEM (regno_save_mode[i][j], address);
176 rtx reg = gen_rtx_REG (regno_save_mode[i][j], i);
177 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
178 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
179 rtx saveinsn = emit_insn (savepat);
180 rtx restinsn = emit_insn (restpat);
181 int ok;
183 reg_save_code[i][j] = recog_memoized (saveinsn);
184 reg_restore_code[i][j] = recog_memoized (restinsn);
186 /* Now extract both insns and see if we can meet their
187 constraints. */
188 ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1);
189 if (ok)
191 insn_extract (saveinsn);
192 ok = constrain_operands (reg_save_code[i][j], 1);
193 insn_extract (restinsn);
194 ok &= constrain_operands (reg_restore_code[i][j], 1);
197 if (! ok)
199 regno_save_mode[i][j] = VOIDmode;
200 if (j == 1)
202 call_fixed_regs[i] = 1;
203 SET_HARD_REG_BIT (call_fixed_reg_set, i);
208 end_sequence ();
210 obfree (first_obj);
213 /* Initialize save areas by showing that we haven't allocated any yet. */
215 void
216 init_save_areas ()
218 int i, j;
220 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
221 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
222 regno_save_mem[i][j] = 0;
225 /* Allocate save areas for any hard registers that might need saving.
226 We take a conservative approach here and look for call-clobbered hard
227 registers that are assigned to pseudos that cross calls. This may
228 overestimate slightly (especially if some of these registers are later
229 used as spill registers), but it should not be significant.
231 Then perform register elimination in the addresses of the save area
232 locations; return 1 if all eliminated addresses are strictly valid.
233 We assume that our caller has set up the elimination table to the
234 worst (largest) possible offsets.
236 Set *PCHANGED to 1 if we had to allocate some memory for the save area.
238 Future work:
240 In the fallback case we should iterate backwards across all possible
241 modes for the save, choosing the largest available one instead of
242 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
244 We do not try to use "move multiple" instructions that exist
245 on some machines (such as the 68k moveml). It could be a win to try
246 and use them when possible. The hard part is doing it in a way that is
247 machine independent since they might be saving non-consecutive
248 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
251 setup_save_areas (pchanged)
252 int *pchanged;
254 int i, j, k;
255 HARD_REG_SET hard_regs_used;
256 int ok = 1;
259 /* Allocate space in the save area for the largest multi-register
260 pseudos first, then work backwards to single register
261 pseudos. */
263 /* Find and record all call-used hard-registers in this function. */
264 CLEAR_HARD_REG_SET (hard_regs_used);
265 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
266 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
268 int regno = reg_renumber[i];
269 int endregno
270 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
271 int nregs = endregno - regno;
273 for (j = 0; j < nregs; j++)
275 if (call_used_regs[regno+j])
276 SET_HARD_REG_BIT (hard_regs_used, regno+j);
280 /* Now run through all the call-used hard-registers and allocate
281 space for them in the caller-save area. Try to allocate space
282 in a manner which allows multi-register saves/restores to be done. */
284 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
285 for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--)
287 int ok = 1;
288 int do_save;
290 /* If no mode exists for this size, try another. Also break out
291 if we have already saved this hard register. */
292 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
293 continue;
295 /* See if any register in this group has been saved. */
296 do_save = 1;
297 for (k = 0; k < j; k++)
298 if (regno_save_mem[i + k][1])
300 do_save = 0;
301 break;
303 if (! do_save)
304 continue;
306 for (k = 0; k < j; k++)
308 int regno = i + k;
309 ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0);
312 /* We have found an acceptable mode to store in. */
313 if (ok)
316 regno_save_mem[i][j]
317 = assign_stack_local (regno_save_mode[i][j],
318 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
320 /* Setup single word save area just in case... */
321 for (k = 0; k < j; k++)
323 /* This should not depend on WORDS_BIG_ENDIAN.
324 The order of words in regs is the same as in memory. */
325 rtx temp = gen_rtx_MEM (regno_save_mode[i+k][1],
326 XEXP (regno_save_mem[i][j], 0));
328 regno_save_mem[i+k][1]
329 = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
331 *pchanged = 1;
335 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
336 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
337 if (regno_save_mem[i][j] != 0)
338 ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]),
339 XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0));
341 return ok;
344 /* Find the places where hard regs are live across calls and save them.
346 INSN_MODE is the mode to assign to any insns that we add. This is used
347 by reload to determine whether or not reloads or register eliminations
348 need be done on these insns. */
350 void
351 save_call_clobbered_regs (insn_mode)
352 enum machine_mode insn_mode;
354 rtx insn;
355 int b;
357 for (b = 0; b < n_basic_blocks; b++)
359 regset regs_live = basic_block_live_at_start[b];
360 rtx prev_block_last = PREV_INSN (basic_block_head[b]);
361 int i, j;
362 int regno;
364 /* Compute hard regs live at start of block -- this is the
365 real hard regs marked live, plus live pseudo regs that
366 have been renumbered to hard regs. No registers have yet been
367 saved because we restore all of them before the end of the basic
368 block. */
370 REG_SET_TO_HARD_REG_SET (hard_regs_live, regs_live);
371 CLEAR_HARD_REG_SET (hard_regs_saved);
372 CLEAR_HARD_REG_SET (hard_regs_need_restore);
373 n_regs_saved = 0;
375 EXECUTE_IF_SET_IN_REG_SET (regs_live, 0, i,
377 if ((regno = reg_renumber[i]) >= 0)
378 for (j = regno;
379 j < regno + HARD_REGNO_NREGS (regno,
380 PSEUDO_REGNO_MODE (i));
381 j++)
382 SET_HARD_REG_BIT (hard_regs_live, j);
385 /* Now scan the insns in the block, keeping track of what hard
386 regs are live as we go. When we see a call, save the live
387 call-clobbered hard regs. */
389 for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn))
391 RTX_CODE code = GET_CODE (insn);
393 if (GET_RTX_CLASS (code) == 'i')
395 rtx link;
397 /* If some registers have been saved, see if INSN references
398 any of them. We must restore them before the insn if so. */
400 if (n_regs_saved)
401 restore_referenced_regs (PATTERN (insn), insn, insn_mode);
403 /* NB: the normal procedure is to first enliven any
404 registers set by insn, then deaden any registers that
405 had their last use at insn. This is incorrect now,
406 since multiple pseudos may have been mapped to the
407 same hard reg, and the death notes are ambiguous. So
408 it must be done in the other, safe, order. */
410 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
411 if (REG_NOTE_KIND (link) == REG_DEAD)
412 clear_reg_live (XEXP (link, 0));
414 /* When we reach a call, we need to save all registers that are
415 live, call-used, not fixed, and not already saved. We must
416 test at this point because registers that die in a CALL_INSN
417 are not live across the call and likewise for registers that
418 are born in the CALL_INSN.
420 If registers are filled with parameters for this function,
421 and some of these are also being set by this function, then
422 they will not appear to die (no REG_DEAD note for them),
423 to check if in fact they do, collect the set registers in
424 hard_regs_live first. */
426 if (code == CALL_INSN)
428 HARD_REG_SET this_call_sets;
430 HARD_REG_SET old_hard_regs_live;
432 /* Save the hard_regs_live information. */
433 COPY_HARD_REG_SET (old_hard_regs_live, hard_regs_live);
435 /* Now calculate hard_regs_live for this CALL_INSN
436 only. */
437 CLEAR_HARD_REG_SET (hard_regs_live);
438 note_stores (PATTERN (insn), set_reg_live);
439 COPY_HARD_REG_SET (this_call_sets, hard_regs_live);
441 /* Restore the hard_regs_live information. */
442 COPY_HARD_REG_SET (hard_regs_live, old_hard_regs_live);
445 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
446 if (call_used_regs[regno] && ! call_fixed_regs[regno]
447 && TEST_HARD_REG_BIT (hard_regs_live, regno)
448 /* It must not be set by this instruction. */
449 && ! TEST_HARD_REG_BIT (this_call_sets, regno)
450 && ! TEST_HARD_REG_BIT (hard_regs_saved, regno))
451 regno += insert_save_restore (insn, 1, regno,
452 insn_mode, 0);
454 /* Put the information for this CALL_INSN on top of what
455 we already had. */
456 IOR_HARD_REG_SET (hard_regs_live, this_call_sets);
457 COPY_HARD_REG_SET (hard_regs_need_restore, hard_regs_saved);
459 /* Must recompute n_regs_saved. */
460 n_regs_saved = 0;
461 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
462 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
463 n_regs_saved++;
465 else
467 note_stores (PATTERN (insn), set_reg_live);
468 #ifdef AUTO_INC_DEC
469 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
470 if (REG_NOTE_KIND (link) == REG_INC)
471 set_reg_live (XEXP (link, 0), NULL_RTX);
472 #endif
475 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
476 if (REG_NOTE_KIND (link) == REG_UNUSED)
477 clear_reg_live (XEXP (link, 0));
480 if (insn == basic_block_end[b])
481 break;
484 /* At the end of the basic block, we must restore any registers that
485 remain saved. If the last insn in the block is a JUMP_INSN, put
486 the restore before the insn, otherwise, put it after the insn. */
488 if (n_regs_saved)
489 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
490 if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno))
491 regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN
492 ? insn : NEXT_INSN (insn)), 0,
493 regno, insn_mode, MOVE_MAX / UNITS_PER_WORD);
495 /* If we added any insns at the start of the block, update the start
496 of the block to point at those insns. */
497 basic_block_head[b] = NEXT_INSN (prev_block_last);
501 /* Here from note_stores when an insn stores a value in a register.
502 Set the proper bit or bits in hard_regs_live. All pseudos that have
503 been assigned hard regs have had their register number changed already,
504 so we can ignore pseudos. */
506 static void
507 set_reg_live (reg, setter)
508 rtx reg;
509 rtx setter ATTRIBUTE_UNUSED;
511 register int regno, endregno, i;
512 enum machine_mode mode = GET_MODE (reg);
513 int word = 0;
515 if (GET_CODE (reg) == SUBREG)
517 word = SUBREG_WORD (reg);
518 reg = SUBREG_REG (reg);
521 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
522 return;
524 regno = REGNO (reg) + word;
525 endregno = regno + HARD_REGNO_NREGS (regno, mode);
527 for (i = regno; i < endregno; i++)
529 SET_HARD_REG_BIT (hard_regs_live, i);
530 CLEAR_HARD_REG_BIT (hard_regs_saved, i);
531 CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
535 /* Here when a REG_DEAD note records the last use of a reg. Clear
536 the appropriate bit or bits in hard_regs_live. Again we can ignore
537 pseudos. */
539 static void
540 clear_reg_live (reg)
541 rtx reg;
543 register int regno, endregno, i;
545 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
546 return;
548 regno = REGNO (reg);
549 endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
551 for (i = regno; i < endregno; i++)
553 CLEAR_HARD_REG_BIT (hard_regs_live, i);
554 CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
555 CLEAR_HARD_REG_BIT (hard_regs_saved, i);
559 /* If any register currently residing in the save area is referenced in X,
560 which is part of INSN, emit code to restore the register in front of INSN.
561 INSN_MODE is the mode to assign to any insns that we add. */
563 static void
564 restore_referenced_regs (x, insn, insn_mode)
565 rtx x;
566 rtx insn;
567 enum machine_mode insn_mode;
569 enum rtx_code code = GET_CODE (x);
570 char *fmt;
571 int i, j;
573 if (code == CLOBBER)
574 return;
576 if (code == REG)
578 int regno = REGNO (x);
580 /* If this is a pseudo, scan its memory location, since it might
581 involve the use of another register, which might be saved. */
583 if (regno >= FIRST_PSEUDO_REGISTER
584 && reg_equiv_mem[regno] != 0)
585 restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0),
586 insn, insn_mode);
587 else if (regno >= FIRST_PSEUDO_REGISTER
588 && reg_equiv_address[regno] != 0)
589 restore_referenced_regs (reg_equiv_address[regno],
590 insn, insn_mode);
592 /* Otherwise if this is a hard register, restore any piece of it that
593 is currently saved. */
595 else if (regno < FIRST_PSEUDO_REGISTER)
597 int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x));
598 /* Save at most SAVEREGS at a time. This can not be larger than
599 MOVE_MAX, because that causes insert_save_restore to fail. */
600 int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD);
601 int endregno = regno + numregs;
603 for (i = regno; i < endregno; i++)
604 if (TEST_HARD_REG_BIT (hard_regs_need_restore, i))
605 i += insert_save_restore (insn, 0, i, insn_mode, saveregs);
608 return;
611 fmt = GET_RTX_FORMAT (code);
612 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
614 if (fmt[i] == 'e')
615 restore_referenced_regs (XEXP (x, i), insn, insn_mode);
616 else if (fmt[i] == 'E')
617 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
618 restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode);
622 /* Insert a sequence of insns to save or restore, SAVE_P says which,
623 REGNO. Place these insns in front of INSN. INSN_MODE is the mode
624 to assign to these insns. MAXRESTORE is the maximum number of registers
625 which should be restored during this call (when SAVE_P == 0). It should
626 never be less than 1 since we only work with entire registers.
628 Note that we have verified in init_caller_save that we can do this
629 with a simple SET, so use it. Set INSN_CODE to what we save there
630 since the address might not be valid so the insn might not be recognized.
631 These insns will be reloaded and have register elimination done by
632 find_reload, so we need not worry about that here.
634 Return the extra number of registers saved. */
636 static int
637 insert_save_restore (insn, save_p, regno, insn_mode, maxrestore)
638 rtx insn;
639 int save_p;
640 int regno;
641 enum machine_mode insn_mode;
642 int maxrestore;
644 rtx pat = NULL_RTX;
645 enum insn_code code = CODE_FOR_nothing;
646 int numregs = 0;
648 /* A common failure mode if register status is not correct in the RTL
649 is for this routine to be called with a REGNO we didn't expect to
650 save. That will cause us to write an insn with a (nil) SET_DEST
651 or SET_SRC. Instead of doing so and causing a crash later, check
652 for this common case and abort here instead. This will remove one
653 step in debugging such problems. */
655 if (regno_save_mem[regno][1] == 0)
656 abort ();
658 #ifdef HAVE_cc0
659 /* If INSN references CC0, put our insns in front of the insn that sets
660 CC0. This is always safe, since the only way we could be passed an
661 insn that references CC0 is for a restore, and doing a restore earlier
662 isn't a problem. We do, however, assume here that CALL_INSNs don't
663 reference CC0. Guard against non-INSN's like CODE_LABEL. */
665 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
666 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
667 insn = prev_nonnote_insn (insn);
668 #endif
670 /* Get the pattern to emit and update our status. */
671 if (save_p)
673 int i, j, k;
674 int ok;
676 /* See if we can save several registers with a single instruction.
677 Work backwards to the single register case. */
678 for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--)
680 ok = 1;
681 if (regno_save_mem[regno][i] != 0)
682 for (j = 0; j < i; j++)
684 if (! call_used_regs[regno + j] || call_fixed_regs[regno + j]
685 || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j)
686 || TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
687 ok = 0;
689 else
690 continue;
692 /* Must do this one save at a time */
693 if (! ok)
694 continue;
696 pat = gen_rtx_SET (VOIDmode, regno_save_mem[regno][i],
697 gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]),
698 regno));
699 code = reg_save_code[regno][i];
701 /* Set hard_regs_saved for all the registers we saved. */
702 for (k = 0; k < i; k++)
704 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
705 SET_HARD_REG_BIT (hard_regs_need_restore, regno + k);
706 n_regs_saved++;
709 numregs = i;
710 break;
713 else
715 int i, j, k;
716 int ok;
718 /* See if we can restore `maxrestore' registers at once. Work
719 backwards to the single register case. */
720 for (i = maxrestore; i > 0; i--)
722 ok = 1;
723 if (regno_save_mem[regno][i])
724 for (j = 0; j < i; j++)
726 if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j))
727 ok = 0;
729 else
730 continue;
732 /* Must do this one restore at a time */
733 if (! ok)
734 continue;
736 pat = gen_rtx_SET (VOIDmode,
737 gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]),
738 regno),
739 regno_save_mem[regno][i]);
740 code = reg_restore_code[regno][i];
743 /* Clear status for all registers we restored. */
744 for (k = 0; k < i; k++)
746 CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k);
747 n_regs_saved--;
750 numregs = i;
751 break;
754 /* Emit the insn and set the code and mode. */
756 insn = emit_insn_before (pat, insn);
757 PUT_MODE (insn, insn_mode);
758 INSN_CODE (insn) = code;
760 /* Tell our callers how many extra registers we saved/restored */
761 return numregs - 1;