1 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
3 * config/i386/constraints.md (Bs): Disallow memory operand for
4 -mindirect-branch-register.
6 * config/i386/predicates.md (indirect_branch_operand): Likewise.
7 (GOT_memory_operand): Likewise.
8 (call_insn_operand): Likewise.
9 (sibcall_insn_operand): Likewise.
10 (GOT32_symbol_operand): Likewise.
11 * config/i386/i386.md (indirect_jump): Call convert_memory_address
12 for -mindirect-branch-register.
13 (tablejump): Likewise.
14 (*sibcall_memory): Likewise.
15 (*sibcall_value_memory): Likewise.
16 Disallow peepholes of indirect call and jump via memory for
17 -mindirect-branch-register.
18 (*call_pop): Replace m with Bw.
19 (*call_value_pop): Likewise.
20 (*sibcall_pop_memory): Replace m with Bs.
21 * config/i386/i386.opt (mindirect-branch-register): New option.
22 * doc/invoke.texi: Document -mindirect-branch-register option.
24 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
26 * config/i386/i386-protos.h (ix86_output_function_return): New.
27 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
28 set function_return_type.
29 (indirect_thunk_name): Add ret_p to indicate thunk for function
31 (output_indirect_thunk_function): Pass false to
33 (ix86_output_indirect_branch): Likewise.
34 (output_indirect_thunk_function): Create alias for function
35 return thunk if regno < 0.
36 (ix86_output_function_return): New function.
37 (ix86_handle_fndecl_attribute): Handle function_return.
38 (ix86_attribute_table): Add function_return.
39 * config/i386/i386.h (machine_function): Add
41 * config/i386/i386.md (simple_return_internal): Use
42 ix86_output_function_return.
43 (simple_return_internal_long): Likewise.
44 * config/i386/i386.opt (mfunction-return=): New option.
45 (indirect_branch): Mention -mfunction-return=.
46 * doc/extend.texi: Document function_return function attribute.
47 * doc/invoke.texi: Document -mfunction-return= option.
49 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
51 * config/i386/i386-opts.h (indirect_branch): New.
52 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
53 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
54 with local indirect jump when converting indirect call and jump.
55 (ix86_set_indirect_branch_type): New.
56 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
57 (indirectlabelno): New.
58 (indirect_thunk_needed): Likewise.
59 (indirect_thunk_bnd_needed): Likewise.
60 (indirect_thunks_used): Likewise.
61 (indirect_thunks_bnd_used): Likewise.
62 (INDIRECT_LABEL): Likewise.
63 (indirect_thunk_name): Likewise.
64 (output_indirect_thunk): Likewise.
65 (output_indirect_thunk_function): Likewise.
66 (ix86_output_indirect_branch): Likewise.
67 (ix86_output_indirect_jmp): Likewise.
68 (ix86_code_end): Call output_indirect_thunk_function if needed.
69 (ix86_output_call_insn): Call ix86_output_indirect_branch if
71 (ix86_handle_fndecl_attribute): Handle indirect_branch.
72 (ix86_attribute_table): Add indirect_branch.
73 * config/i386/i386.h (machine_function): Add indirect_branch_type
74 and has_local_indirect_jump.
75 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
77 (tablejump): Likewise.
78 (*indirect_jump): Use ix86_output_indirect_jmp.
79 (*tablejump_1): Likewise.
80 (simple_return_indirect_internal): Likewise.
81 * config/i386/i386.opt (mindirect-branch=): New option.
82 (indirect_branch): New.
85 (thunk-inline): Likewise.
86 (thunk-extern): Likewise.
87 * doc/extend.texi: Document indirect_branch function attribute.
88 * doc/invoke.texi: Document -mindirect-branch= option.
90 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
93 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
95 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
97 * ipa-inline.c (want_inline_small_function_p): Return false if
98 inlining has already failed with CIF_FINAL_ERROR.
99 (update_caller_keys): Call want_inline_small_function_p before
101 (update_callee_keys): Likewise.
103 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
105 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
107 (rs6000_quadword_masked_address_p): Likewise.
108 (quad_aligned_load_p): Likewise.
109 (quad_aligned_store_p): Likewise.
110 (const_load_sequence_p): Add comment to describe the outer-most loop.
111 (mimic_memory_attributes_and_flags): New function.
112 (rs6000_gen_stvx): Likewise.
113 (replace_swapped_aligned_store): Likewise.
114 (rs6000_gen_lvx): Likewise.
115 (replace_swapped_aligned_load): Likewise.
116 (replace_swapped_load_constant): Capitalize argument name in
117 comment describing this function.
118 (rs6000_analyze_swaps): Add a third pass to search for vector loads
119 and stores that access quad-word aligned addresses and replace
120 with stvx or lvx instructions when appropriate.
121 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
122 New function prototype.
123 (rs6000_quadword_masked_address_p): Likewise.
124 (rs6000_gen_lvx): Likewise.
125 (rs6000_gen_stvx): Likewise.
126 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
127 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
128 when memory address is aligned.
129 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
130 this split to select lvx instruction when memory address is aligned.
131 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
132 instruction when memory address is aligned.
133 (*vsx_le_perm_load_v16qi): Likewise.
134 (four unnamed splitters): Modify to select the stvx instruction
135 when memory is aligned.
137 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
139 * predict.c (determine_unlikely_bbs): Handle correctly BBs
140 which appears in the queue multiple times.
142 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
143 Alan Hayward <alan.hayward@arm.com>
144 David Sherwood <david.sherwood@arm.com>
146 * tree-vectorizer.h (vec_lower_bound): New structure.
147 (_loop_vec_info): Add check_nonzero and lower_bounds.
148 (LOOP_VINFO_CHECK_NONZERO): New macro.
149 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
150 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
151 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
152 fields. Make seg_len the distance travelled, not including the
154 (dr_direction_indicator): Declare.
155 (dr_zero_step_indicator): Likewise.
156 (dr_known_forward_stride_p): Likewise.
157 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
159 (runtime_alias_check_p): Allow runtime alias checks with
161 (operator ==): Compare access_size and align.
162 (prune_runtime_alias_test_list): Rework for new distinction between
163 the access_size and seg_len.
164 (create_intersect_range_checks_index): Likewise. Cope with polynomial
166 (get_segment_min_max): New function.
167 (create_intersect_range_checks): Use it.
168 (dr_step_indicator): New function.
169 (dr_direction_indicator): Likewise.
170 (dr_zero_step_indicator): Likewise.
171 (dr_known_forward_stride_p): Likewise.
172 * tree-loop-distribution.c (data_ref_segment_size): Return
173 DR_STEP * (niters - 1).
174 (compute_alias_check_pairs): Update call to the dr_with_seg_len
176 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
177 (vect_preserves_scalar_order_p): New function, split out from...
178 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
179 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
180 (vect_vfa_access_size): New function.
181 (vect_vfa_align): Likewise.
182 (vect_compile_time_alias): Take access_size_a and access_b arguments.
183 (dump_lower_bound): New function.
184 (vect_check_lower_bound): Likewise.
185 (vect_small_gap_p): Likewise.
186 (vectorizable_with_step_bound_p): Likewise.
187 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
188 depencies if the vectorization factor is 1. Convert the checks
189 for nonzero steps into checks on the bounds of DR_STEP. Try using
190 a bunds check for variable steps if the minimum required step is
191 relatively small. Update calls to the dr_with_seg_len
192 constructor and to vect_compile_time_alias.
193 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
195 (vect_loop_versioning): Call it.
196 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
198 (vect_estimate_min_profitable_iters): Account for any bounds checks.
200 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
201 Alan Hayward <alan.hayward@arm.com>
202 David Sherwood <david.sherwood@arm.com>
204 * doc/sourcebuild.texi (vect_scatter_store): Document.
205 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
207 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
209 * genopinit.c (main): Add supports_vec_scatter_store and
210 supports_vec_scatter_store_cached to target_optabs.
211 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
212 IFN_MASK_SCATTER_STORE.
213 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
215 * internal-fn.h (internal_store_fn_p): Declare.
216 (internal_fn_stored_value_index): Likewise.
217 * internal-fn.c (scatter_store_direct): New macro.
218 (expand_scatter_store_optab_fn): New function.
219 (direct_scatter_store_optab_supported_p): New macro.
220 (internal_store_fn_p): New function.
221 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
222 IFN_MASK_SCATTER_STORE.
223 (internal_fn_mask_index): Likewise.
224 (internal_fn_stored_value_index): New function.
225 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
227 * optabs-query.h (supports_vec_scatter_store_p): Declare.
228 * optabs-query.c (supports_vec_scatter_store_p): New function.
229 * tree-vectorizer.h (vect_get_store_rhs): Declare.
230 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
231 true for scatter stores.
232 (vect_gather_scatter_fn_p): Handle scatter stores too.
233 (vect_check_gather_scatter): Consider using scatter stores if
234 supports_vec_scatter_store_p.
235 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
237 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
238 internal_fn_stored_value_index.
239 (check_load_store_masking): Handle scatter stores too.
240 (vect_get_store_rhs): Make public.
241 (vectorizable_call): Use internal_store_fn_p.
242 (vectorizable_store): Handle scatter store internal functions.
243 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
244 when deciding whether the end of the group has been reached.
245 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
246 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
247 (mask_scatter_store<mode>): New insns.
249 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
250 Alan Hayward <alan.hayward@arm.com>
251 David Sherwood <david.sherwood@arm.com>
253 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
254 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
255 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
257 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
258 Use vect_truncate_gather_scatter_offset if we can't treat the
259 operation as a normal gather load or scatter store.
260 (get_group_load_store_type): Take the gather_scatter_info
261 as argument. Try using a gather load or scatter store for
262 single-element groups.
263 (get_load_store_type): Update calls to get_group_load_store_type
264 and vect_use_strided_gather_scatters_p.
266 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
267 Alan Hayward <alan.hayward@arm.com>
268 David Sherwood <david.sherwood@arm.com>
270 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
271 optional tree argument.
272 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
274 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
275 but continue to use the current value as a fallback.
276 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
277 to compare the updates.
278 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
279 (get_load_store_type): Use it when handling a strided access.
280 (vect_get_strided_load_store_ops): New function.
281 (vect_get_data_ptr_increment): Likewise.
282 (vectorizable_load): Handle strided gather loads. Always pass
283 a step to vect_create_data_ref_ptr and bump_vector_ptr.
285 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
286 Alan Hayward <alan.hayward@arm.com>
287 David Sherwood <david.sherwood@arm.com>
289 * doc/md.texi (gather_load@var{m}): Document.
290 (mask_gather_load@var{m}): Likewise.
291 * genopinit.c (main): Add supports_vec_gather_load and
292 supports_vec_gather_load_cached to target_optabs.
293 * optabs-tree.c (init_tree_optimization_optabs): Use
294 ggc_cleared_alloc to allocate target_optabs.
295 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
296 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
298 * internal-fn.h (internal_load_fn_p): Declare.
299 (internal_gather_scatter_fn_p): Likewise.
300 (internal_fn_mask_index): Likewise.
301 (internal_gather_scatter_fn_supported_p): Likewise.
302 * internal-fn.c (gather_load_direct): New macro.
303 (expand_gather_load_optab_fn): New function.
304 (direct_gather_load_optab_supported_p): New macro.
305 (direct_internal_fn_optab): New function.
306 (internal_load_fn_p): Likewise.
307 (internal_gather_scatter_fn_p): Likewise.
308 (internal_fn_mask_index): Likewise.
309 (internal_gather_scatter_fn_supported_p): Likewise.
310 * optabs-query.c (supports_at_least_one_mode_p): New function.
311 (supports_vec_gather_load_p): Likewise.
312 * optabs-query.h (supports_vec_gather_load_p): Declare.
313 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
314 and memory_type field.
315 (NUM_PATTERNS): Bump to 15.
316 * tree-vect-data-refs.c: Include internal-fn.h.
317 (vect_gather_scatter_fn_p): New function.
318 (vect_describe_gather_scatter_call): Likewise.
319 (vect_check_gather_scatter): Try using internal functions for
320 gather loads. Recognize existing calls to a gather load function.
321 (vect_analyze_data_refs): Consider using gather loads if
322 supports_vec_gather_load_p.
323 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
324 (vect_get_gather_scatter_offset_type): Likewise.
325 (vect_convert_mask_for_vectype): Likewise.
326 (vect_add_conversion_to_patterm): Likewise.
327 (vect_try_gather_scatter_pattern): Likewise.
328 (vect_recog_gather_scatter_pattern): New pattern recognizer.
329 (vect_vect_recog_func_ptrs): Add it.
330 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
331 internal_fn_mask_index and internal_gather_scatter_fn_p.
332 (check_load_store_masking): Take the gather_scatter_info as an
333 argument and handle gather loads.
334 (vect_get_gather_scatter_ops): New function.
335 (vectorizable_call): Check internal_load_fn_p.
336 (vectorizable_load): Likewise. Handle gather load internal
338 (vectorizable_store): Update call to check_load_store_masking.
339 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
340 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
341 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
342 (aarch64_gather_scale_operand_d): New predicates.
343 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
344 (mask_gather_load<mode>): New insns.
346 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
347 Alan Hayward <alan.hayward@arm.com>
348 David Sherwood <david.sherwood@arm.com>
350 * optabs.def (fold_left_plus_optab): New optab.
351 * doc/md.texi (fold_left_plus_@var{m}): Document.
352 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
353 * internal-fn.c (fold_left_direct): Define.
354 (expand_fold_left_optab_fn): Likewise.
355 (direct_fold_left_optab_supported_p): Likewise.
356 * fold-const-call.c (fold_const_fold_left): New function.
357 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
358 * tree-parloops.c (valid_reduction_p): New function.
359 (gather_scalar_reductions): Use it.
360 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
361 (vect_finish_replace_stmt): Declare.
362 * tree-vect-loop.c (fold_left_reduction_fn): New function.
363 (needs_fold_left_reduction_p): New function, split out from...
364 (vect_is_simple_reduction): ...here. Accept reductions that
365 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
366 (vect_force_simple_reduction): Also store the reduction type in
367 the assignment's STMT_VINFO_REDUC_TYPE.
368 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
369 (merge_with_identity): New function.
370 (vect_expand_fold_left): Likewise.
371 (vectorize_fold_left_reduction): Likewise.
372 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
373 scalar phi in place for it. Check for target support and reject
374 cases that would reassociate the operation. Defer the transform
375 phase to vectorize_fold_left_reduction.
376 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
377 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
378 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
380 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
382 * tree-if-conv.c (predicate_mem_writes): Remove redundant
383 call to ifc_temp_var.
385 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
386 Alan Hayward <alan.hayward@arm.com>
387 David Sherwood <david.sherwood@arm.com>
389 * target.def (legitimize_address_displacement): Take the original
390 offset as a poly_int.
391 * targhooks.h (default_legitimize_address_displacement): Update
393 * targhooks.c (default_legitimize_address_displacement): Likewise.
394 * doc/tm.texi: Regenerate.
395 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
396 as an argument, moving assert of ad->disp == ad->disp_term to...
397 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
398 Try calling targetm.legitimize_address_displacement before expanding
399 the address rather than afterwards, and adjust for the new interface.
400 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
401 Match the new hook interface. Handle SVE addresses.
402 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
405 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
407 * Makefile.in (OBJS): Add early-remat.o.
408 * target.def (select_early_remat_modes): New hook.
409 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
410 * doc/tm.texi: Regenerate.
411 * targhooks.h (default_select_early_remat_modes): Declare.
412 * targhooks.c (default_select_early_remat_modes): New function.
413 * timevar.def (TV_EARLY_REMAT): New timevar.
414 * passes.def (pass_early_remat): New pass.
415 * tree-pass.h (make_pass_early_remat): Declare.
416 * early-remat.c: New file.
417 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
419 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
421 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
422 Alan Hayward <alan.hayward@arm.com>
423 David Sherwood <david.sherwood@arm.com>
425 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
426 vfm1 with a bound_epilog parameter.
427 (vect_do_peeling): Update calls accordingly, and move the prologue
428 call earlier in the function. Treat the base bound_epilog as 0 for
429 fully-masked loops and retain vf - 1 for other loops. Add 1 to
430 this base when peeling for gaps.
431 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
432 with fully-masked loops.
433 (vect_estimate_min_profitable_iters): Handle the single peeled
434 iteration in that case.
436 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
437 Alan Hayward <alan.hayward@arm.com>
438 David Sherwood <david.sherwood@arm.com>
440 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
441 single-element interleaving even if the size is not a power of 2.
442 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
443 accesses for single-element interleaving if the group size is
446 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
447 Alan Hayward <alan.hayward@arm.com>
448 David Sherwood <david.sherwood@arm.com>
450 * doc/md.texi (fold_extract_last_@var{m}): Document.
451 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
452 * optabs.def (fold_extract_last_optab): New optab.
453 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
454 * internal-fn.c (fold_extract_direct): New macro.
455 (expand_fold_extract_optab_fn): Likewise.
456 (direct_fold_extract_optab_supported_p): Likewise.
457 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
458 * tree-vect-loop.c (vect_model_reduction_cost): Handle
459 EXTRACT_LAST_REDUCTION.
460 (get_initial_def_for_reduction): Do not create an initial vector
461 for EXTRACT_LAST_REDUCTION reductions.
462 (vectorizable_reduction): Leave the scalar phi in place for
463 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
464 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
465 epilogue code for EXTRACT_LAST_REDUCTION and defer the
466 transform phase to vectorizable_condition.
467 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
469 (vect_finish_stmt_generation): ...here.
470 (vect_finish_replace_stmt): New function.
471 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
472 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
474 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
476 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
477 Alan Hayward <alan.hayward@arm.com>
478 David Sherwood <david.sherwood@arm.com>
480 * doc/md.texi (extract_last_@var{m}): Document.
481 * optabs.def (extract_last_optab): New optab.
482 * internal-fn.def (EXTRACT_LAST): New internal function.
483 * internal-fn.c (cond_unary_direct): New macro.
484 (expand_cond_unary_optab_fn): Likewise.
485 (direct_cond_unary_optab_supported_p): Likewise.
486 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
487 loops using EXTRACT_LAST.
488 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
489 (extract_last_<mode>): ...this optab.
490 (vec_extract<mode><Vel>): Update accordingly.
492 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
493 Alan Hayward <alan.hayward@arm.com>
494 David Sherwood <david.sherwood@arm.com>
496 * target.def (empty_mask_is_expensive): New hook.
497 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
498 * doc/tm.texi: Regenerate.
499 * targhooks.h (default_empty_mask_is_expensive): Declare.
500 * targhooks.c (default_empty_mask_is_expensive): New function.
501 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
502 if the target says that empty masks are expensive.
503 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
505 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
507 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
508 Alan Hayward <alan.hayward@arm.com>
509 David Sherwood <david.sherwood@arm.com>
511 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
512 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
513 (vect_use_loop_mask_for_alignment_p): New function.
514 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
515 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
516 niters_skip argument. Make sure that the first niters_skip elements
517 of the first iteration are inactive.
518 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
519 Update call to vect_set_loop_masks_directly.
520 (get_misalign_in_elems): New function, split out from...
521 (vect_gen_prolog_loop_niters): ...here.
522 (vect_update_init_of_dr): Take a code argument that specifies whether
523 the adjustment should be added or subtracted.
524 (vect_update_init_of_drs): Likewise.
525 (vect_prepare_for_masked_peels): New function.
526 (vect_do_peeling): Skip prologue peeling if we're using a mask
527 instead. Update call to vect_update_inits_of_drs.
528 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
530 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
531 alignment. Do not include the number of peeled iterations in
532 the minimum threshold in that case.
533 (vectorizable_induction): Adjust the start value down by
534 LOOP_VINFO_MASK_SKIP_NITERS iterations.
535 (vect_transform_loop): Call vect_prepare_for_masked_peels.
536 Take the number of skipped iterations into account when calculating
538 * tree-vect-stmts.c (vect_gen_while_not): New function.
540 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
541 Alan Hayward <alan.hayward@arm.com>
542 David Sherwood <david.sherwood@arm.com>
544 * doc/sourcebuild.texi (vect_fully_masked): Document.
545 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
547 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
549 (vect_analyze_loop_2): ...here. Don't check the vectorization
550 factor against the number of loop iterations if the loop is
553 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
554 Alan Hayward <alan.hayward@arm.com>
555 David Sherwood <david.sherwood@arm.com>
557 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
558 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
559 (dump_groups): Update accordingly.
560 (iv_use::mem_type): New member variable.
561 (address_p): New function.
562 (record_use): Add a mem_type argument and initialize the new
564 (record_group_use): Add a mem_type argument. Use address_p.
565 Remove obsolete null checks of base_object. Update call to record_use.
566 (find_interesting_uses_op): Update call to record_group_use.
567 (find_interesting_uses_cond): Likewise.
568 (find_interesting_uses_address): Likewise.
569 (get_mem_type_for_internal_fn): New function.
570 (find_address_like_use): Likewise.
571 (find_interesting_uses_stmt): Try find_address_like_use before
572 calling find_interesting_uses_op.
573 (addr_offset_valid_p): Use the iv mem_type field as the type
574 of the addressed memory.
575 (add_autoinc_candidates): Likewise.
576 (get_address_cost): Likewise.
577 (split_small_address_groups_p): Use address_p.
578 (split_address_groups): Likewise.
579 (add_iv_candidate_for_use): Likewise.
580 (autoinc_possible_for_pair): Likewise.
581 (rewrite_groups): Likewise.
582 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
583 (determine_group_iv_cost): Update after split of USE_ADDRESS.
584 (get_alias_ptr_type_for_ptr_address): New function.
585 (rewrite_use_address): Rewrite address uses in calls that were
586 identified by find_address_like_use.
588 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
589 Alan Hayward <alan.hayward@arm.com>
590 David Sherwood <david.sherwood@arm.com>
592 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
594 * gimple-expr.h (is_gimple_addressable: Likewise.
595 * gimple-expr.c (is_gimple_address): Likewise.
596 * internal-fn.c (expand_call_mem_ref): New function.
597 (expand_mask_load_optab_fn): Use it.
598 (expand_mask_store_optab_fn): Likewise.
600 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
601 Alan Hayward <alan.hayward@arm.com>
602 David Sherwood <david.sherwood@arm.com>
604 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
605 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
606 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
607 (cond_umax@var{mode}): Document.
608 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
609 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
610 (cond_umin_optab, cond_umax_optab): New optabs.
611 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
612 (COND_IOR, COND_XOR): New internal functions.
613 * internal-fn.h (get_conditional_internal_fn): Declare.
614 * internal-fn.c (cond_binary_direct): New macro.
615 (expand_cond_binary_optab_fn): Likewise.
616 (direct_cond_binary_optab_supported_p): Likewise.
617 (get_conditional_internal_fn): New function.
618 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
619 Cope with reduction statements that are vectorized as calls rather
621 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
622 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
623 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
624 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
625 (UNSPEC_COND_EOR): New unspecs.
626 (optab): Add mappings for them.
627 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
628 (sve_int_op, sve_fp_op): New int attributes.
630 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
631 Alan Hayward <alan.hayward@arm.com>
632 David Sherwood <david.sherwood@arm.com>
634 * optabs.def (while_ult_optab): New optab.
635 * doc/md.texi (while_ult@var{m}@var{n}): Document.
636 * internal-fn.def (WHILE_ULT): New internal function.
637 * internal-fn.h (direct_internal_fn_supported_p): New override
638 that takes two types as argument.
639 * internal-fn.c (while_direct): New macro.
640 (expand_while_optab_fn): New function.
641 (convert_optab_supported_p): Likewise.
642 (direct_while_optab_supported_p): New macro.
643 * wide-int.h (wi::udiv_ceil): New function.
644 * tree-vectorizer.h (rgroup_masks): New structure.
645 (vec_loop_masks): New typedef.
646 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
648 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
649 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
650 (vect_max_vf): New function.
651 (slpeel_make_loop_iterate_ntimes): Delete.
652 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
653 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
654 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
655 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
656 internal-fn.h, stor-layout.h and optabs-query.h.
657 (vect_set_loop_mask): New function.
658 (add_preheader_seq): Likewise.
659 (add_header_seq): Likewise.
660 (interleave_supported_p): Likewise.
661 (vect_maybe_permute_loop_masks): Likewise.
662 (vect_set_loop_masks_directly): Likewise.
663 (vect_set_loop_condition_masked): Likewise.
664 (vect_set_loop_condition_unmasked): New function, split out from
665 slpeel_make_loop_iterate_ntimes.
666 (slpeel_make_loop_iterate_ntimes): Rename to..
667 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
668 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
669 (vect_do_peeling): Update call accordingly.
670 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
672 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
673 mask_compare_type, can_fully_mask_p and fully_masked_p.
674 (release_vec_loop_masks): New function.
675 (_loop_vec_info): Use it to free the loop masks.
676 (can_produce_all_loop_masks_p): New function.
677 (vect_get_max_nscalars_per_iter): Likewise.
678 (vect_verify_full_masking): Likewise.
679 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
680 retries, and free the mask rgroups before retrying. Check loop-wide
681 reasons for disallowing fully-masked loops. Make the final decision
682 about whether use a fully-masked loop or not.
683 (vect_estimate_min_profitable_iters): Do not assume that peeling
684 for the number of iterations will be needed for fully-masked loops.
685 (vectorizable_reduction): Disable fully-masked loops.
686 (vectorizable_live_operation): Likewise.
687 (vect_halve_mask_nunits): New function.
688 (vect_double_mask_nunits): Likewise.
689 (vect_record_loop_mask): Likewise.
690 (vect_get_loop_mask): Likewise.
691 (vect_transform_loop): Handle the case in which the final loop
692 iteration might handle a partial vector. Call vect_set_loop_condition
693 instead of slpeel_make_loop_iterate_ntimes.
694 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
695 (check_load_store_masking): New function.
696 (prepare_load_store_mask): Likewise.
697 (vectorizable_store): Handle fully-masked loops.
698 (vectorizable_load): Likewise.
699 (supportable_widening_operation): Use vect_halve_mask_nunits for
701 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
702 (vect_gen_while): New function.
703 * config/aarch64/aarch64.md (umax<mode>3): New expander.
704 (aarch64_uqdec<mode>): New insn.
706 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
707 Alan Hayward <alan.hayward@arm.com>
708 David Sherwood <david.sherwood@arm.com>
710 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
711 (reduc_xor_scal_optab): New optabs.
712 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
713 (reduc_xor_scal_@var{m}): Document.
714 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
715 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
717 * fold-const-call.c (fold_const_call): Handle them.
718 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
719 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
720 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
721 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
722 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
723 (UNSPEC_XORV): New unspecs.
724 (optab): Add entries for them.
725 (BITWISEV): New int iterator.
726 (bit_reduc_op): New int attributes.
728 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
729 Alan Hayward <alan.hayward@arm.com>
730 David Sherwood <david.sherwood@arm.com>
732 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
733 * internal-fn.def (VEC_SHL_INSERT): New internal function.
734 * optabs.def (vec_shl_insert_optab): New optab.
735 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
736 (duplicate_and_interleave): Likewise.
737 * tree-vect-loop.c: Include internal-fn.h.
738 (neutral_op_for_slp_reduction): New function, split out from
739 get_initial_defs_for_reduction.
740 (get_initial_def_for_reduction): Handle option 2 for variable-length
741 vectors by loading the neutral value into a vector and then shifting
742 the initial value into element 0.
743 (get_initial_defs_for_reduction): Replace the code argument with
744 the neutral value calculated by neutral_op_for_slp_reduction.
745 Use gimple_build_vector for constant-length vectors.
746 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
747 but the first group_size elements have a neutral value.
748 Use duplicate_and_interleave otherwise.
749 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
750 Update call to get_initial_defs_for_reduction. Handle SLP
751 reductions for variable-length vectors by creating one vector
752 result for each scalar result, with the elements associated
753 with other scalar results stubbed out with the neutral value.
754 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
755 Require IFN_VEC_SHL_INSERT for double reductions on
756 variable-length vectors, or SLP reductions that have
757 a neutral value. Require can_duplicate_and_interleave_p
758 support for variable-length unchained SLP reductions if there
759 is no neutral value, such as for MIN/MAX reductions. Also require
760 the number of vector elements to be a multiple of the number of
761 SLP statements when doing variable-length unchained SLP reductions.
762 Update call to vect_create_epilog_for_reduction.
763 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
764 and remove initial values.
765 (duplicate_and_interleave): Make public.
766 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
767 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
769 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
770 Alan Hayward <alan.hayward@arm.com>
771 David Sherwood <david.sherwood@arm.com>
773 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
774 (can_duplicate_and_interleave_p): New function.
775 (vect_get_and_check_slp_defs): Take the vector of statements
776 rather than just the current one. Remove excess parentheses.
777 Restriction rejectinon of vect_constant_def and vect_external_def
778 for variable-length vectors to boolean types, or types for which
779 can_duplicate_and_interleave_p is false.
780 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
781 (duplicate_and_interleave): New function.
782 (vect_get_constant_vectors): Use gimple_build_vector for
783 constant-length vectors and suitable variable-length constant
784 vectors. Use duplicate_and_interleave for other variable-length
785 vectors. Don't defer the update when inserting new statements.
787 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
788 Alan Hayward <alan.hayward@arm.com>
789 David Sherwood <david.sherwood@arm.com>
791 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
792 min_profitable_iters doesn't go negative.
794 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
795 Alan Hayward <alan.hayward@arm.com>
796 David Sherwood <david.sherwood@arm.com>
798 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
799 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
800 * optabs.def (vec_mask_load_lanes_optab): New optab.
801 (vec_mask_store_lanes_optab): Likewise.
802 * internal-fn.def (MASK_LOAD_LANES): New internal function.
803 (MASK_STORE_LANES): Likewise.
804 * internal-fn.c (mask_load_lanes_direct): New macro.
805 (mask_store_lanes_direct): Likewise.
806 (expand_mask_load_optab_fn): Handle masked operations.
807 (expand_mask_load_lanes_optab_fn): New macro.
808 (expand_mask_store_optab_fn): Handle masked operations.
809 (expand_mask_store_lanes_optab_fn): New macro.
810 (direct_mask_load_lanes_optab_supported_p): Likewise.
811 (direct_mask_store_lanes_optab_supported_p): Likewise.
812 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
814 (vect_load_lanes_supported): Likewise.
815 * tree-vect-data-refs.c (strip_conversion): New function.
816 (can_group_stmts_p): Likewise.
817 (vect_analyze_data_ref_accesses): Use it instead of checking
818 for a pair of assignments.
819 (vect_store_lanes_supported): Take a masked_p parameter.
820 (vect_load_lanes_supported): Likewise.
821 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
822 vect_store_lanes_supported and vect_load_lanes_supported.
823 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
824 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
825 parameter. Don't allow gaps for masked accesses.
826 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
827 and vect_load_lanes_supported.
828 (get_load_store_type): Take a masked_p parameter and update
829 call to get_group_load_store_type.
830 (vectorizable_store): Update call to get_load_store_type.
831 Handle IFN_MASK_STORE_LANES.
832 (vectorizable_load): Update call to get_load_store_type.
833 Handle IFN_MASK_LOAD_LANES.
835 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
836 Alan Hayward <alan.hayward@arm.com>
837 David Sherwood <david.sherwood@arm.com>
839 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
841 * config/aarch64/aarch64-protos.h
842 (aarch64_sve_struct_memory_operand_p): Declare.
843 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
844 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
845 (VPRED, vpred): Handle SVE structure modes.
846 * config/aarch64/constraints.md (Utx): New constraint.
847 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
848 (aarch64_sve_struct_nonimmediate_operand): New predicates.
849 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
850 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
851 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
852 structure modes. Split into pieces after RA.
853 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
854 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
856 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
858 (aarch64_classify_address): Likewise.
859 (sizetochar): Move earlier in file.
860 (aarch64_print_operand): Handle SVE register lists.
861 (aarch64_array_mode): New function.
862 (aarch64_sve_struct_memory_operand_p): Likewise.
863 (TARGET_ARRAY_MODE): Redefine.
865 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
866 Alan Hayward <alan.hayward@arm.com>
867 David Sherwood <david.sherwood@arm.com>
869 * target.def (array_mode): New target hook.
870 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
871 * doc/tm.texi: Regenerate.
872 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
873 * hooks.c (hook_optmode_mode_uhwi_none): New function.
874 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
876 * stor-layout.c (mode_for_array): Likewise. Support polynomial
879 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
880 Alan Hayward <alan.hayward@arm.com>
881 David Sherwood <david.sherwood@arm.com>
883 * fold-const.c (fold_binary_loc): Check the argument types
884 rather than the result type when testing for a vector operation.
886 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
888 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
889 * doc/tm.texi: Regenerate.
891 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
892 Alan Hayward <alan.hayward@arm.com>
893 David Sherwood <david.sherwood@arm.com>
895 * doc/invoke.texi (-msve-vector-bits=): Document new option.
896 (sve): Document new AArch64 extension.
897 * doc/md.texi (w): Extend the description of the AArch64
898 constraint to include SVE vectors.
899 (Upl, Upa): Document new AArch64 predicate constraints.
900 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
902 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
903 (msve-vector-bits=): New option.
904 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
905 SVE when these are disabled.
906 (sve): New extension.
907 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
908 modes. Adjust their number of units based on aarch64_sve_vg.
909 (MAX_BITSIZE_MODE_ANY_MODE): Define.
910 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
911 aarch64_addr_query_type.
912 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
913 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
914 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
915 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
916 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
917 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
918 (aarch64_simd_imm_zero_p): Delete.
919 (aarch64_check_zero_based_sve_index_immediate): Declare.
920 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
921 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
922 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
923 (aarch64_sve_float_mul_immediate_p): Likewise.
924 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
926 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
927 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
928 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
929 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
930 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
931 (aarch64_regmode_natural_size): Likewise.
932 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
933 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
935 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
936 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
937 for VG and the SVE predicate registers.
938 (V_ALIASES): Add a "z"-prefixed alias.
939 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
940 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
941 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
942 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
943 (REG_CLASS_NAMES): Add entries for them.
944 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
945 and the predicate registers.
946 (aarch64_sve_vg): Declare.
947 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
948 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
949 (REGMODE_NATURAL_SIZE): Define.
950 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
952 * config/aarch64/aarch64.c: Include cfgrtl.h.
953 (simd_immediate_info): Add a constructor for series vectors,
954 and an associated step field.
955 (aarch64_sve_vg): New variable.
956 (aarch64_dbx_register_number): Handle VG and the predicate registers.
957 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
958 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
959 (VEC_ANY_DATA, VEC_STRUCT): New constants.
960 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
961 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
962 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
963 (aarch64_get_mask_mode): New functions.
964 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
965 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
966 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
967 predicate modes and predicate registers. Explicitly restrict
968 GPRs to modes of 16 bytes or smaller. Only allow FP registers
969 to store a vector mode if it is recognized by
970 aarch64_classify_vector_mode.
971 (aarch64_regmode_natural_size): New function.
972 (aarch64_hard_regno_caller_save_mode): Return the original mode
974 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
975 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
976 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
977 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
979 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
980 does not overlap dest if the function is frame-related. Handle
982 (aarch64_split_add_offset): New function.
983 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
984 them aarch64_add_offset.
985 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
986 and update call to aarch64_sub_sp.
987 (aarch64_add_cfa_expression): New function.
988 (aarch64_expand_prologue): Pass extra temporary registers to the
989 functions above. Handle the case in which we need to emit new
990 DW_CFA_expressions for registers that were originally saved
991 relative to the stack pointer, but now have to be expressed
992 relative to the frame pointer.
993 (aarch64_output_mi_thunk): Pass extra temporary registers to the
995 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
996 IP0 and IP1 values for SVE frames.
997 (aarch64_expand_vec_series): New function.
998 (aarch64_expand_sve_widened_duplicate): Likewise.
999 (aarch64_expand_sve_const_vector): Likewise.
1000 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1001 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1002 into the register, rather than emitting a SET directly.
1003 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1004 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1005 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1006 (offset_9bit_signed_scaled_p): New functions.
1007 (aarch64_replicate_bitmask_imm): New function.
1008 (aarch64_bitmask_imm): Use it.
1009 (aarch64_cannot_force_const_mem): Reject expressions involving
1010 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1011 (aarch64_classify_index): Handle SVE indices, by requiring
1012 a plain register index with a scale that matches the element size.
1013 (aarch64_classify_address): Handle SVE addresses. Assert that
1014 the mode of the address is VOIDmode or an integer mode.
1015 Update call to aarch64_classify_symbol.
1016 (aarch64_classify_symbolic_expression): Update call to
1017 aarch64_classify_symbol.
1018 (aarch64_const_vec_all_in_range_p): New function.
1019 (aarch64_print_vector_float_operand): Likewise.
1020 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1021 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1022 and the FP immediates 1.0 and 0.5.
1023 (aarch64_print_address_internal): Handle SVE addresses.
1024 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1025 (aarch64_regno_regclass): Handle predicate registers.
1026 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1028 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1029 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1030 (aarch64_convert_sve_vector_bits): New function.
1031 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1032 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1034 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1035 Handle SVE vector and predicate modes. Accept VL-based constants
1036 that need only one temporary register, and VL offsets that require
1037 no temporary registers.
1038 (aarch64_conditional_register_usage): Mark the predicate registers
1039 as fixed if SVE isn't available.
1040 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1041 Return true for SVE vector and predicate modes.
1042 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1043 rather than an unsigned int. Handle SVE modes.
1044 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1046 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1048 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1049 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1050 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1051 (aarch64_sve_float_mul_immediate_p): New functions.
1052 (aarch64_sve_valid_immediate): New function.
1053 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1054 Explicitly reject structure modes. Check for INDEX constants.
1055 Handle PTRUE and PFALSE constants.
1056 (aarch64_check_zero_based_sve_index_immediate): New function.
1057 (aarch64_simd_imm_zero_p): Delete.
1058 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1059 vector modes. Accept constants in the range of CNT[BHWD].
1060 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1061 ask for an Advanced SIMD mode.
1062 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1063 (aarch64_simd_vector_alignment): Handle SVE predicates.
1064 (aarch64_vectorize_preferred_vector_alignment): New function.
1065 (aarch64_simd_vector_alignment_reachable): Use it instead of
1067 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1068 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1070 (MAX_VECT_LEN): Delete.
1071 (expand_vec_perm_d): Add a vec_flags field.
1072 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1073 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1074 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1076 (aarch64_evpc_rev): Rename to...
1077 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1078 (aarch64_evpc_rev_global): New function.
1079 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1080 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1082 (aarch64_evpc_sve_tbl): New function.
1083 (aarch64_expand_vec_perm_const_1): Update after rename of
1084 aarch64_evpc_rev. Handle SVE permutes too, trying
1085 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1086 than aarch64_evpc_tbl.
1087 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1088 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1089 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1090 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1091 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1092 (aarch64_expand_sve_vcond): New functions.
1093 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1094 of aarch64_vector_mode_p.
1095 (aarch64_dwarf_poly_indeterminate_value): New function.
1096 (aarch64_compute_pressure_classes): Likewise.
1097 (aarch64_can_change_mode_class): Likewise.
1098 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1099 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1100 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1101 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1102 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1103 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1104 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1105 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1107 (Dn, Dl, Dr): Accept const as well as const_vector.
1108 (Dz): Likewise. Compare against CONST0_RTX.
1109 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1110 of "vector" where appropriate.
1111 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1112 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1113 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1114 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1115 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1116 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1117 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1118 (v_int_equiv): Extend to SVE modes.
1119 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1121 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1122 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1123 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1124 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1125 (SVE_COND_FP_CMP): New int iterators.
1126 (perm_hilo): Handle the new unpack unspecs.
1127 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1129 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1130 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1131 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1132 (aarch64_equality_operator, aarch64_constant_vector_operand)
1133 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1134 (aarch64_sve_nonimmediate_operand): Likewise.
1135 (aarch64_sve_general_operand): Likewise.
1136 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1137 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1138 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1139 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1140 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1141 (aarch64_sve_float_arith_immediate): Likewise.
1142 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1143 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1144 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1145 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1146 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1147 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1148 (aarch64_sve_float_arith_operand): Likewise.
1149 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1150 (aarch64_sve_float_mul_operand): Likewise.
1151 (aarch64_sve_vec_perm_operand): Likewise.
1152 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1153 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1154 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1155 as well as const_vector.
1156 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1157 in file. Use CONST0_RTX and CONSTM1_RTX.
1158 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1159 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1160 Use aarch64_simd_imm_zero.
1161 * config/aarch64/aarch64-sve.md: New file.
1162 * config/aarch64/aarch64.md: Include it.
1163 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1164 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1165 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1166 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1167 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1168 (sve): New attribute.
1169 (enabled): Disable instructions with the sve attribute unless
1171 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1172 aarch64_expand_mov_immediate.
1173 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1174 CNT[BHSD] immediates.
1175 (movti): Split CONST_POLY_INT moves into two halves.
1176 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1177 Split additions that need a temporary here if the destination
1178 is the stack pointer.
1179 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1180 (*add<mode>3_poly_1): New instruction.
1181 (set_clobber_cc): New expander.
1183 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1185 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1186 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1187 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1188 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1189 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1190 Change innermode from fixed_mode_size to machine_mode.
1191 (simplify_subreg): Update call accordingly. Handle a constant-sized
1192 subreg of a variable-length CONST_VECTOR.
1194 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1195 Alan Hayward <alan.hayward@arm.com>
1196 David Sherwood <david.sherwood@arm.com>
1198 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1199 (add_offset_to_base): New function, split out from...
1200 (create_mem_ref): ...here. When handling a scale other than 1,
1201 check first whether the address is valid without the offset.
1202 Add it into the base if so, leaving the index and scale as-is.
1204 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1207 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1208 fold_for_warn before checking if arg2 is INTEGER_CST.
1210 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1212 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1213 (store_multiple_operation): Delete.
1214 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1215 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1216 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1217 guarded by TARGET_STRING.
1218 (rs6000_output_load_multiple): Delete.
1219 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1220 OPTION_MASK_STRING / TARGET_STRING handling.
1221 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1222 (const rs6000_opt_masks) <"string">: Change mask to 0.
1223 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1224 (MASK_STRING): Delete.
1225 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1227 (load_multiple): Delete.
1234 (store_multiple): Delete.
1241 (movmemsi_8reg): Delete.
1242 (corresponding unnamed define_insn): Delete.
1243 (movmemsi_6reg): Delete.
1244 (corresponding unnamed define_insn): Delete.
1245 (movmemsi_4reg): Delete.
1246 (corresponding unnamed define_insn): Delete.
1247 (movmemsi_2reg): Delete.
1248 (corresponding unnamed define_insn): Delete.
1249 (movmemsi_1reg): Delete.
1250 (corresponding unnamed define_insn): Delete.
1251 * config/rs6000/rs6000.opt (mno-string): New.
1252 (mstring): Replace by deprecation warning stub.
1253 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1255 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1257 * regrename.c (regrename_do_replace): If replacing the same
1258 reg multiple times, try to reuse last created gen_raw_REG.
1261 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1262 main to workaround a bug in GDB.
1264 2018-01-12 Tom de Vries <tom@codesourcery.com>
1267 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1269 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1271 PR rtl-optimization/80481
1272 * ira-color.c (get_cap_member): New function.
1273 (allocnos_conflict_by_live_ranges_p): Use it.
1274 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1275 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1277 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1280 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1281 (*saddl_se_1): Ditto.
1283 (*saddl_se_1): Ditto.
1285 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1287 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1288 rather than wi::to_widest for DR_INITs.
1289 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1290 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1291 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1293 (vect_analyze_group_access_1): Note that here.
1295 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1297 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1298 polynomial type sizes.
1300 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1302 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1303 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1304 (gimple_add_tmp_var): Likewise.
1306 2018-01-12 Martin Liska <mliska@suse.cz>
1308 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1309 (gimple_alloc_sizes): Likewise.
1310 (dump_gimple_statistics): Use PRIu64 in printf format.
1311 * gimple.h: Change uint64_t to int.
1313 2018-01-12 Martin Liska <mliska@suse.cz>
1315 * tree-core.h: Use uint64_t instead of int.
1316 * tree.c (tree_node_counts): Likewise.
1317 (tree_node_sizes): Likewise.
1318 (dump_tree_statistics): Use PRIu64 in printf format.
1320 2018-01-12 Martin Liska <mliska@suse.cz>
1322 * Makefile.in: As qsort_chk is implemented in vec.c, add
1323 vec.o to linkage of gencfn-macros.
1324 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1325 passing the info to record_node_allocation_statistics.
1326 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1328 * ggc-common.c (struct ggc_usage): Add operator== and use
1329 it in operator< and compare function.
1330 * mem-stats.h (struct mem_usage): Likewise.
1331 * vec.c (struct vec_usage): Remove operator< and compare
1332 function. Can be simply inherited.
1334 2018-01-12 Martin Jambor <mjambor@suse.cz>
1337 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1338 * tree-ssa-math-opts.c: Include domwalk.h.
1339 (convert_mult_to_fma_1): New function.
1340 (fma_transformation_info): New type.
1341 (fma_deferring_state): Likewise.
1342 (cancel_fma_deferring): New function.
1343 (result_of_phi): Likewise.
1344 (last_fma_candidate_feeds_initial_phi): Likewise.
1345 (convert_mult_to_fma): Added deferring logic, split actual
1346 transformation to convert_mult_to_fma_1.
1347 (math_opts_dom_walker): New type.
1348 (math_opts_dom_walker::after_dom_children): New method, body moved
1349 here from pass_optimize_widening_mul::execute, added deferring logic
1351 (pass_optimize_widening_mul::execute): Moved most of code to
1352 math_opts_dom_walker::after_dom_children.
1353 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1354 * config/i386/i386.c (ix86_option_override_internal): Added
1355 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1357 2018-01-12 Richard Biener <rguenther@suse.de>
1360 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1361 inline instance vars.
1363 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1366 * config/rx/rx.c (rx_is_restricted_memory_address):
1369 2018-01-12 Richard Biener <rguenther@suse.de>
1371 PR tree-optimization/80846
1372 * target.def (split_reduction): New target hook.
1373 * targhooks.c (default_split_reduction): New function.
1374 * targhooks.h (default_split_reduction): Declare.
1375 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1376 target requests first reduce vectors by combining low and high
1378 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1379 (get_vectype_for_scalar_type_and_size): Export.
1380 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1381 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1382 * doc/tm.texi: Regenerate.
1383 * config/i386/i386.c (ix86_split_reduction): Implement
1384 TARGET_VECTORIZE_SPLIT_REDUCTION.
1386 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1389 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1390 in PIC mode except for TARGET_VXWORKS_RTP.
1391 * config/sparc/sparc.c: Include cfgrtl.h.
1392 (TARGET_INIT_PIC_REG): Define.
1393 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1394 (sparc_pic_register_p): New predicate.
1395 (sparc_legitimate_address_p): Use it.
1396 (sparc_legitimize_pic_address): Likewise.
1397 (sparc_delegitimize_address): Likewise.
1398 (sparc_mode_dependent_address_p): Likewise.
1399 (gen_load_pcrel_sym): Remove 4th parameter.
1400 (load_got_register): Adjust call to above. Remove obsolete stuff.
1401 (sparc_expand_prologue): Do not call load_got_register here.
1402 (sparc_flat_expand_prologue): Likewise.
1403 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1404 (sparc_use_pseudo_pic_reg): New function.
1405 (sparc_init_pic_reg): Likewise.
1406 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1407 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1409 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1411 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1412 Add item for branch_cost.
1414 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1416 PR rtl-optimization/83565
1417 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1418 not extend the result to a larger mode for rotate operations.
1419 (num_sign_bit_copies1): Likewise.
1421 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1424 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1426 Use values-Xc.o for -pedantic.
1427 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1429 2018-01-12 Martin Liska <mliska@suse.cz>
1432 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1434 (possible_polymorphic_call_targets): Use it.
1435 (ipa_devirt): Likewise.
1437 2018-01-12 Martin Liska <mliska@suse.cz>
1439 * profile-count.h (enum profile_quality): Use 0 as invalid
1440 enum value of profile_quality.
1442 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1444 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1445 -mext-string options.
1447 2018-01-12 Richard Biener <rguenther@suse.de>
1449 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1450 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1451 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1453 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1455 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1457 * configure.ac (--with-long-double-format): Add support for the
1458 configuration option to change the default long double format on
1460 * config.gcc (powerpc*-linux*-*): Likewise.
1461 * configure: Regenerate.
1462 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1463 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1464 used without modification.
1466 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1468 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1469 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1470 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1471 MISC_BUILTIN_SPEC_BARRIER.
1472 (rs6000_init_builtins): Likewise.
1473 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1475 (speculation_barrier): New define_insn.
1476 * doc/extend.texi: Document __builtin_speculation_barrier.
1478 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1481 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1482 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1483 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1485 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1486 integral modes instead of "ss" and "sd".
1487 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1488 vectors with 32-bit and 64-bit elements.
1489 (vecdupssescalarmodesuffix): New mode attribute.
1490 (vec_dup<mode>): Use it.
1492 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1495 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1496 frame if argument is passed on stack.
1498 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1501 * ree.c (combine_reaching_defs): Optimize also
1502 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1503 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1505 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1508 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1510 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1513 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1514 after they are computed.
1516 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1518 PR tree-optimization/83695
1519 * gimple-loop-linterchange.cc
1520 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1521 reset cached scev information after interchange.
1522 (pass_linterchange::execute): Remove call to scev_reset_htab.
1524 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1526 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1527 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1528 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1529 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1530 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1531 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1532 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1533 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1534 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1535 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1536 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1537 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1538 (V_lane_reg): Likewise.
1539 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1541 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1542 (vfmal_lane_low<mode>_intrinsic,
1543 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1544 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1545 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1546 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1547 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1548 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1550 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1552 * config/arm/arm-cpus.in (fp16fml): New feature.
1553 (ALL_SIMD): Add fp16fml.
1554 (armv8.2-a): Add fp16fml as an option.
1555 (armv8.3-a): Likewise.
1556 (armv8.4-a): Add fp16fml as part of fp16.
1557 * config/arm/arm.h (TARGET_FP16FML): Define.
1558 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1560 * config/arm/arm-modes.def (V2HF): Define.
1561 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1562 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1563 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1564 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1565 vfmsl_low, vfmsl_high): New set of builtins.
1566 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1567 (vfml_op): New code attribute.
1568 (VFMLHALVES): New int iterator.
1569 (VFML, VFMLSEL): New mode attributes.
1570 (V_reg): Define mapping for V2HF.
1571 (V_hi, V_lo): New mode attributes.
1572 (VF_constraint): Likewise.
1573 (vfml_half, vfml_half_selector): New int attributes.
1574 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1576 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1577 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1579 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1580 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1581 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1582 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1584 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1585 Document new effective target and option set.
1587 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1589 * config/arm/arm-cpus.in (armv8_4): New feature.
1590 (ARMv8_4a): New fgroup.
1591 (armv8.4-a): New arch.
1592 * config/arm/arm-tables.opt: Regenerate.
1593 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1594 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1595 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1596 Add matching rules for -march=armv8.4-a and extensions.
1597 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1599 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1602 * config/rx/rx.md (BW): New mode attribute.
1603 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1605 2018-01-11 Richard Biener <rguenther@suse.de>
1607 PR tree-optimization/83435
1608 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1609 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1610 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1612 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1613 Alan Hayward <alan.hayward@arm.com>
1614 David Sherwood <david.sherwood@arm.com>
1616 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1618 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1619 (aarch64_print_address_internal): Use it to check for a zero offset.
1621 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1622 Alan Hayward <alan.hayward@arm.com>
1623 David Sherwood <david.sherwood@arm.com>
1625 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1626 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1627 Return a poly_int64 rather than a HOST_WIDE_INT.
1628 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1629 rather than a HOST_WIDE_INT.
1630 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1631 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1632 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1633 final_offset from HOST_WIDE_INT to poly_int64.
1634 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1635 to_constant when getting the number of units in an Advanced SIMD
1637 (aarch64_builtin_vectorized_function): Check for a constant number
1639 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1641 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1642 attribute instead of GET_MODE_NUNITS.
1643 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1644 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1645 GET_MODE_SIZE for fixed-size registers.
1646 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1647 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1648 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1649 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1650 (aarch64_print_operand, aarch64_print_address_internal)
1651 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1652 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1653 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1654 Handle polynomial GET_MODE_SIZE.
1655 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1656 wider than SImode without modification.
1657 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1658 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1659 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1660 passing and returning SVE modes.
1661 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1662 rather than GEN_INT.
1663 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1664 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1665 (aarch64_allocate_and_probe_stack_space): Likewise.
1666 (aarch64_layout_frame): Cope with polynomial offsets.
1667 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1668 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1670 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1671 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1672 poly_int64 rather than a HOST_WIDE_INT.
1673 (aarch64_get_separate_components, aarch64_process_components)
1674 (aarch64_expand_prologue, aarch64_expand_epilogue)
1675 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1676 (aarch64_anchor_offset): New function, split out from...
1677 (aarch64_legitimize_address): ...here.
1678 (aarch64_builtin_vectorization_cost): Handle polynomial
1679 TYPE_VECTOR_SUBPARTS.
1680 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1682 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1683 number of elements from the PARALLEL rather than the mode.
1684 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1685 rather than GET_MODE_BITSIZE.
1686 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1687 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1688 (aarch64_expand_vec_perm_const_1): Handle polynomial
1689 d->perm.length () and d->perm elements.
1690 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1691 Apply to_constant to d->perm elements.
1692 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1693 polynomial CONST_VECTOR_NUNITS.
1694 (aarch64_move_pointer): Take amount as a poly_int64 rather
1696 (aarch64_progress_pointer): Avoid temporary variable.
1697 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1698 the mode attribute instead of GET_MODE.
1700 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1701 Alan Hayward <alan.hayward@arm.com>
1702 David Sherwood <david.sherwood@arm.com>
1704 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1705 x exists before using it.
1706 (aarch64_add_constant_internal): Rename to...
1707 (aarch64_add_offset_1): ...this. Replace regnum with separate
1708 src and dest rtxes. Handle the case in which they're different,
1709 including when the offset is zero. Replace scratchreg with an rtx.
1710 Use 2 additions if there is no spare register into which we can
1711 move a 16-bit constant.
1712 (aarch64_add_constant): Delete.
1713 (aarch64_add_offset): Replace reg with separate src and dest
1714 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1715 Use aarch64_add_offset_1.
1716 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1717 an rtx rather than an int. Take the delta as a poly_int64
1718 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1719 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1720 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1721 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1722 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1724 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1725 aarch64_add_constant.
1727 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1729 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1730 Use scalar_float_mode.
1732 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1734 * config/aarch64/aarch64-simd.md
1735 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1736 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1737 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1738 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1739 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1740 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1741 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1742 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1743 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1744 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1746 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1749 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1750 targ_options->x_arm_arch_string is non NULL.
1752 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1754 * config/aarch64/aarch64.h
1755 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1757 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1760 * expmed.c (emit_store_flag_force): Swap if const op0
1761 and change VOIDmode to mode of op0.
1763 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1765 PR rtl-optimization/83761
1766 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1767 than bytes to mode_for_size.
1769 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1772 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1773 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1776 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1779 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1780 when in layout mode.
1781 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1782 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1785 2018-01-10 Michael Collison <michael.collison@arm.com>
1787 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1788 * config/aarch64/aarch64-option-extension.def: Add
1789 AARCH64_OPT_EXTENSION of 'fp16fml'.
1790 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1791 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1792 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1793 * config/aarch64/constraints.md (Ui7): New constraint.
1794 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1795 (VFMLA_SEL_W): Ditto.
1798 (VFMLA16_LOW): New int iterator.
1799 (VFMLA16_HIGH): Ditto.
1800 (UNSPEC_FMLAL): New unspec.
1801 (UNSPEC_FMLSL): Ditto.
1802 (UNSPEC_FMLAL2): Ditto.
1803 (UNSPEC_FMLSL2): Ditto.
1804 (f16mac): New code attribute.
1805 * config/aarch64/aarch64-simd-builtins.def
1806 (aarch64_fmlal_lowv2sf): Ditto.
1807 (aarch64_fmlsl_lowv2sf): Ditto.
1808 (aarch64_fmlalq_lowv4sf): Ditto.
1809 (aarch64_fmlslq_lowv4sf): Ditto.
1810 (aarch64_fmlal_highv2sf): Ditto.
1811 (aarch64_fmlsl_highv2sf): Ditto.
1812 (aarch64_fmlalq_highv4sf): Ditto.
1813 (aarch64_fmlslq_highv4sf): Ditto.
1814 (aarch64_fmlal_lane_lowv2sf): Ditto.
1815 (aarch64_fmlsl_lane_lowv2sf): Ditto.
1816 (aarch64_fmlal_laneq_lowv2sf): Ditto.
1817 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1818 (aarch64_fmlalq_lane_lowv4sf): Ditto.
1819 (aarch64_fmlsl_lane_lowv4sf): Ditto.
1820 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1821 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1822 (aarch64_fmlal_lane_highv2sf): Ditto.
1823 (aarch64_fmlsl_lane_highv2sf): Ditto.
1824 (aarch64_fmlal_laneq_highv2sf): Ditto.
1825 (aarch64_fmlsl_laneq_highv2sf): Ditto.
1826 (aarch64_fmlalq_lane_highv4sf): Ditto.
1827 (aarch64_fmlsl_lane_highv4sf): Ditto.
1828 (aarch64_fmlalq_laneq_highv4sf): Ditto.
1829 (aarch64_fmlsl_laneq_highv4sf): Ditto.
1830 * config/aarch64/aarch64-simd.md:
1831 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1832 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1833 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1834 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1835 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1836 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1837 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1838 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1839 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1840 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1841 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1842 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1843 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1844 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1845 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1846 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1847 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1848 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1849 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1850 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1851 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1852 (vfmlsl_low_u32): Ditto.
1853 (vfmlalq_low_u32): Ditto.
1854 (vfmlslq_low_u32): Ditto.
1855 (vfmlal_high_u32): Ditto.
1856 (vfmlsl_high_u32): Ditto.
1857 (vfmlalq_high_u32): Ditto.
1858 (vfmlslq_high_u32): Ditto.
1859 (vfmlal_lane_low_u32): Ditto.
1860 (vfmlsl_lane_low_u32): Ditto.
1861 (vfmlal_laneq_low_u32): Ditto.
1862 (vfmlsl_laneq_low_u32): Ditto.
1863 (vfmlalq_lane_low_u32): Ditto.
1864 (vfmlslq_lane_low_u32): Ditto.
1865 (vfmlalq_laneq_low_u32): Ditto.
1866 (vfmlslq_laneq_low_u32): Ditto.
1867 (vfmlal_lane_high_u32): Ditto.
1868 (vfmlsl_lane_high_u32): Ditto.
1869 (vfmlal_laneq_high_u32): Ditto.
1870 (vfmlsl_laneq_high_u32): Ditto.
1871 (vfmlalq_lane_high_u32): Ditto.
1872 (vfmlslq_lane_high_u32): Ditto.
1873 (vfmlalq_laneq_high_u32): Ditto.
1874 (vfmlslq_laneq_high_u32): Ditto.
1875 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1876 (AARCH64_FL_FOR_ARCH8_4): New.
1877 (AARCH64_ISA_F16FML): New ISA flag.
1878 (TARGET_F16FML): New feature flag for fp16fml.
1879 (doc/invoke.texi): Document new fp16fml option.
1881 2018-01-10 Michael Collison <michael.collison@arm.com>
1883 * config/aarch64/aarch64-builtins.c:
1884 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1885 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1886 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1887 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1888 (AARCH64_ISA_SHA3): New ISA flag.
1889 (TARGET_SHA3): New feature flag for sha3.
1890 * config/aarch64/iterators.md (sha512_op): New int attribute.
1891 (CRYPTO_SHA512): New int iterator.
1892 (UNSPEC_SHA512H): New unspec.
1893 (UNSPEC_SHA512H2): Ditto.
1894 (UNSPEC_SHA512SU0): Ditto.
1895 (UNSPEC_SHA512SU1): Ditto.
1896 * config/aarch64/aarch64-simd-builtins.def
1897 (aarch64_crypto_sha512hqv2di): New builtin.
1898 (aarch64_crypto_sha512h2qv2di): Ditto.
1899 (aarch64_crypto_sha512su0qv2di): Ditto.
1900 (aarch64_crypto_sha512su1qv2di): Ditto.
1901 (aarch64_eor3qv8hi): Ditto.
1902 (aarch64_rax1qv2di): Ditto.
1903 (aarch64_xarqv2di): Ditto.
1904 (aarch64_bcaxqv8hi): Ditto.
1905 * config/aarch64/aarch64-simd.md:
1906 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1907 (aarch64_crypto_sha512su0qv2di): Ditto.
1908 (aarch64_crypto_sha512su1qv2di): Ditto.
1909 (aarch64_eor3qv8hi): Ditto.
1910 (aarch64_rax1qv2di): Ditto.
1911 (aarch64_xarqv2di): Ditto.
1912 (aarch64_bcaxqv8hi): Ditto.
1913 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1914 (vsha512h2q_u64): Ditto.
1915 (vsha512su0q_u64): Ditto.
1916 (vsha512su1q_u64): Ditto.
1917 (veor3q_u16): Ditto.
1918 (vrax1q_u64): Ditto.
1920 (vbcaxq_u16): Ditto.
1921 * config/arm/types.md (crypto_sha512): New type attribute.
1922 (crypto_sha3): Ditto.
1923 (doc/invoke.texi): Document new sha3 option.
1925 2018-01-10 Michael Collison <michael.collison@arm.com>
1927 * config/aarch64/aarch64-builtins.c:
1928 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1929 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1930 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1931 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1932 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1933 (AARCH64_ISA_SM4): New ISA flag.
1934 (TARGET_SM4): New feature flag for sm4.
1935 * config/aarch64/aarch64-simd-builtins.def
1936 (aarch64_sm3ss1qv4si): Ditto.
1937 (aarch64_sm3tt1aq4si): Ditto.
1938 (aarch64_sm3tt1bq4si): Ditto.
1939 (aarch64_sm3tt2aq4si): Ditto.
1940 (aarch64_sm3tt2bq4si): Ditto.
1941 (aarch64_sm3partw1qv4si): Ditto.
1942 (aarch64_sm3partw2qv4si): Ditto.
1943 (aarch64_sm4eqv4si): Ditto.
1944 (aarch64_sm4ekeyqv4si): Ditto.
1945 * config/aarch64/aarch64-simd.md:
1946 (aarch64_sm3ss1qv4si): Ditto.
1947 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1948 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1949 (aarch64_sm4eqv4si): Ditto.
1950 (aarch64_sm4ekeyqv4si): Ditto.
1951 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1952 (sm3part_op): Ditto.
1953 (CRYPTO_SM3TT): Ditto.
1954 (CRYPTO_SM3PART): Ditto.
1955 (UNSPEC_SM3SS1): New unspec.
1956 (UNSPEC_SM3TT1A): Ditto.
1957 (UNSPEC_SM3TT1B): Ditto.
1958 (UNSPEC_SM3TT2A): Ditto.
1959 (UNSPEC_SM3TT2B): Ditto.
1960 (UNSPEC_SM3PARTW1): Ditto.
1961 (UNSPEC_SM3PARTW2): Ditto.
1962 (UNSPEC_SM4E): Ditto.
1963 (UNSPEC_SM4EKEY): Ditto.
1964 * config/aarch64/constraints.md (Ui2): New constraint.
1965 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1966 * config/arm/types.md (crypto_sm3): New type attribute.
1967 (crypto_sm4): Ditto.
1968 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1969 (vsm3tt1aq_u32): Ditto.
1970 (vsm3tt1bq_u32): Ditto.
1971 (vsm3tt2aq_u32): Ditto.
1972 (vsm3tt2bq_u32): Ditto.
1973 (vsm3partw1q_u32): Ditto.
1974 (vsm3partw2q_u32): Ditto.
1975 (vsm4eq_u32): Ditto.
1976 (vsm4ekeyq_u32): Ditto.
1977 (doc/invoke.texi): Document new sm4 option.
1979 2018-01-10 Michael Collison <michael.collison@arm.com>
1981 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1982 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1983 (AARCH64_FL_FOR_ARCH8_4): New.
1984 (AARCH64_FL_V8_4): New flag.
1985 (doc/invoke.texi): Document new armv8.4-a option.
1987 2018-01-10 Michael Collison <michael.collison@arm.com>
1989 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1990 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1991 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1992 * config/aarch64/aarch64-option-extension.def: Add
1993 AARCH64_OPT_EXTENSION of 'sha2'.
1994 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1995 (crypto): Disable sha2 and aes if crypto disabled.
1996 (crypto): Enable aes and sha2 if enabled.
1997 (simd): Disable sha2 and aes if simd disabled.
1998 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2000 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2001 (TARGET_SHA2): New feature flag for sha2.
2002 (TARGET_AES): New feature flag for aes.
2003 * config/aarch64/aarch64-simd.md:
2004 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2005 conditional on TARGET_AES.
2006 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2007 (aarch64_crypto_sha1hsi): Make pattern conditional
2009 (aarch64_crypto_sha1hv4si): Ditto.
2010 (aarch64_be_crypto_sha1hv4si): Ditto.
2011 (aarch64_crypto_sha1su1v4si): Ditto.
2012 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2013 (aarch64_crypto_sha1su0v4si): Ditto.
2014 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2015 (aarch64_crypto_sha256su0v4si): Ditto.
2016 (aarch64_crypto_sha256su1v4si): Ditto.
2017 (doc/invoke.texi): Document new aes and sha2 options.
2019 2018-01-10 Martin Sebor <msebor@redhat.com>
2021 PR tree-optimization/83781
2022 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2025 2018-01-11 Martin Sebor <msebor@gmail.com>
2026 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2028 PR tree-optimization/83501
2029 PR tree-optimization/81703
2031 * tree-ssa-strlen.c (get_string_cst): Rename...
2032 (get_string_len): ...to this. Handle global constants.
2033 (handle_char_store): Adjust.
2035 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2036 Jim Wilson <jimw@sifive.com>
2038 * config/riscv/riscv-protos.h (riscv_output_return): New.
2039 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2040 (riscv_attribute_table, riscv_output_return),
2041 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2042 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2043 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2045 (riscv_expand_prologue): Add early return for naked function.
2046 (riscv_expand_epilogue): Likewise.
2047 (riscv_function_ok_for_sibcall): Return false for naked function.
2048 (riscv_set_current_function): New.
2049 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2050 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2051 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2052 * doc/extend.texi (RISC-V Function Attributes): New.
2054 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2056 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2057 check for 128-bit long double before checking TCmode.
2058 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2059 128-bit long doubles before checking TFmode or TCmode.
2060 (FLOAT128_IBM_P): Likewise.
2062 2018-01-10 Martin Sebor <msebor@redhat.com>
2064 PR tree-optimization/83671
2065 * builtins.c (c_strlen): Unconditionally return zero for the empty
2067 Use -Warray-bounds for warnings.
2068 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2069 for non-constant array indices with COMPONENT_REF, arrays of
2070 arrays, and pointers to arrays.
2071 (gimple_fold_builtin_strlen): Determine and set length range for
2072 non-constant character arrays.
2074 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2077 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2080 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2082 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2084 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2087 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2088 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2089 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2090 indexed_or_indirect_operand predicate.
2091 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2092 (*vsx_le_perm_load_v8hi): Likewise.
2093 (*vsx_le_perm_load_v16qi): Likewise.
2094 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2095 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2096 (*vsx_le_perm_store_v8hi): Likewise.
2097 (*vsx_le_perm_store_v16qi): Likewise.
2098 (eight unnamed splitters): Likewise.
2100 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2102 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2103 * config/rs6000/emmintrin.h: Likewise.
2104 * config/rs6000/mmintrin.h: Likewise.
2105 * config/rs6000/xmmintrin.h: Likewise.
2107 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2110 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2112 * tree.c (tree_nop_conversion): Return true for location wrapper
2114 (maybe_wrap_with_location): New function.
2115 (selftest::check_strip_nops): New function.
2116 (selftest::test_location_wrappers): New function.
2117 (selftest::tree_c_tests): Call it.
2118 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2119 (maybe_wrap_with_location): New decl.
2120 (EXPR_LOCATION_WRAPPER_P): New macro.
2121 (location_wrapper_p): New inline function.
2122 (tree_strip_any_location_wrapper): New inline function.
2124 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2127 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2128 stack_realign_offset for the largest alignment of stack slot
2130 (ix86_find_max_used_stack_alignment): New function.
2131 (ix86_finalize_stack_frame_flags): Use it. Set
2132 max_used_stack_alignment if we don't realign stack.
2133 * config/i386/i386.h (machine_function): Add
2134 max_used_stack_alignment.
2136 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2138 * config/arm/arm.opt (-mbranch-cost): New option.
2139 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2142 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2145 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2146 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2148 2018-01-10 Richard Biener <rguenther@suse.de>
2151 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2152 early out so it also covers the case where we have a non-NULL
2155 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2157 PR tree-optimization/83753
2158 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2159 for non-strided grouped accesses if the number of elements is 1.
2161 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2164 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2165 * i386.h (TARGET_USE_GATHER): Define.
2166 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2168 2018-01-10 Martin Liska <mliska@suse.cz>
2171 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2172 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2174 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2175 CLEANUP_NO_PARTITIONING is not set.
2177 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2179 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2180 for vectors, as a partial revert of r254296.
2181 * rtl.h (const_vec_p): Delete.
2182 (const_vec_duplicate_p): Don't test for vector CONSTs.
2183 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2184 * expmed.c (make_tree): Likewise.
2187 * common.md (E, F): Use CONSTANT_P instead of checking for
2189 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2190 checking for CONST_VECTOR.
2192 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2195 * predict.c (force_edge_cold): Handle in more sane way edges
2198 2018-01-09 Carl Love <cel@us.ibm.com>
2200 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2202 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2203 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2204 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2205 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2206 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2207 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2208 * config/rs6000/rs6000-protos.h: Add extern defition for
2209 rs6000_generate_float2_double_code.
2210 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2212 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2213 (float2_v2df): Add define_expand.
2215 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2218 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2219 op_mode in the force_to_mode call.
2221 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2223 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2224 instead of checking each element individually.
2225 (aarch64_evpc_uzp): Likewise.
2226 (aarch64_evpc_zip): Likewise.
2227 (aarch64_evpc_ext): Likewise.
2228 (aarch64_evpc_rev): Likewise.
2229 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2230 instead of checking each element individually. Return true without
2232 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2233 whether all selected elements come from the same input, instead of
2234 checking each element individually. Remove calls to gen_rtx_REG,
2235 start_sequence and end_sequence and instead assert that no rtl is
2238 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2240 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2241 order of HIGH and CONST checks.
2243 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2245 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2246 if the destination isn't an SSA_NAME.
2248 2018-01-09 Richard Biener <rguenther@suse.de>
2250 PR tree-optimization/83668
2251 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2253 (canonicalize_loop_form): ... here, renamed from ...
2254 (canonicalize_loop_closed_ssa_form): ... this and amended to
2255 swap successor edges for loop exit blocks to make us use
2256 the RPO order we need for initial schedule generation.
2258 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2260 PR tree-optimization/64811
2261 * match.pd: When optimizing comparisons with Inf, avoid
2262 introducing or losing exceptions from comparisons with NaN.
2264 2018-01-09 Martin Liska <mliska@suse.cz>
2267 * asan.c (shadow_mem_size): Add gcc_assert.
2269 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2271 Don't save registers in main().
2274 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2275 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2276 * config/avr/avr.c (avr_set_current_function): Don't error if
2277 naked, OS_task or OS_main are specified at the same time.
2278 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2280 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2282 * common/config/avr/avr-common.c (avr_option_optimization_table):
2283 Switch on -mmain-is-OS_task for optimizing compilations.
2285 2018-01-09 Richard Biener <rguenther@suse.de>
2287 PR tree-optimization/83572
2288 * graphite.c: Include cfganal.h.
2289 (graphite_transform_loops): Connect infinite loops to exit
2290 and remove fake edges at the end.
2292 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2294 * ipa-inline.c (edge_badness): Revert accidental checkin.
2296 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2299 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2300 symbols; not inline clones.
2302 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2305 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2306 hard registers. Formatting fixes.
2308 PR preprocessor/83722
2309 * gcc.c (try_generate_repro): Pass
2310 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2311 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2314 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2315 Kito Cheng <kito.cheng@gmail.com>
2317 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2318 (riscv_leaf_function_p): Delete.
2319 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2321 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2323 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2325 (do_ifelse): New function.
2326 (do_isel): New function.
2327 (do_sub3): New function.
2328 (do_add3): New function.
2329 (do_load_mask_compare): New function.
2330 (do_overlap_load_compare): New function.
2331 (expand_compare_loop): New function.
2332 (expand_block_compare): Call expand_compare_loop() when appropriate.
2333 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2335 (-mblock-compare-inline-loop-limit): New option.
2337 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2340 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2341 Reverse order of second and third operands in first alternative.
2342 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2343 of first and second elements in UNSPEC_VPERMR vector.
2344 (altivec_expand_vec_perm_le): Likewise.
2346 2017-01-08 Jeff Law <law@redhat.com>
2348 PR rtl-optimizatin/81308
2349 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2350 (process_switch): If group_case_labels makes a change, then set
2352 (pass_convert_switch::execute): If a switch is converted, then
2353 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2355 PR rtl-optimization/81308
2356 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2359 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2361 PR target/83663 - Revert r255946
2362 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2363 generation for cases where splatting a value is not useful.
2364 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2365 across a vec_duplicate and a paradoxical subreg forming a vector
2366 mode to a vec_concat.
2368 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2370 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2371 -march=armv8.3-a variants.
2372 * config/arm/t-multilib: Likewise.
2373 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2375 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2377 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2379 (cceq_ior_compare_complement): Give it a name so I can use it, and
2380 change boolean_or_operator predicate to boolean_operator so it can
2381 be used to generate a crand.
2382 (eqne): New code iterator.
2383 (bd/bd_neg): New code_attrs.
2384 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2385 a single define_insn.
2386 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2387 decrement (bdnzt/bdnzf/bdzt/bdzf).
2388 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2389 with the new names of the branch decrement patterns, and added the
2390 names of the branch decrement conditional patterns.
2392 2018-01-08 Richard Biener <rguenther@suse.de>
2394 PR tree-optimization/83563
2395 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2398 2018-01-08 Richard Biener <rguenther@suse.de>
2401 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2403 2018-01-08 Richard Biener <rguenther@suse.de>
2405 PR tree-optimization/83685
2406 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2407 references to abnormals.
2409 2018-01-08 Richard Biener <rguenther@suse.de>
2412 * dwarf2out.c (output_indirect_strings): Handle empty
2413 skeleton_debug_str_hash.
2414 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2416 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2418 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2419 (emit_store_direct): Likewise.
2420 (arc_trampoline_adjust_address): Likewise.
2421 (arc_asm_trampoline_template): New function.
2422 (arc_initialize_trampoline): Use asm_trampoline_template.
2423 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2424 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2425 * config/arc/arc.md (flush_icache): Delete pattern.
2427 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2429 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2430 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2433 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2436 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2437 by not USED_FOR_TARGET.
2438 (make_pass_resolve_sw_modes): Likewise.
2440 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2442 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2445 2018-01-08 Richard Biener <rguenther@suse.de>
2448 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2450 2018-01-08 Richard Biener <rguenther@suse.de>
2453 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2455 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2458 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2459 basic blocks with a small number of successors.
2460 (convert_control_dep_chain_into_preds): Improve handling of
2462 (dump_predicates): Split apart into...
2463 (dump_pred_chain): ...here...
2464 (dump_pred_info): ...and here.
2465 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2466 (can_chain_union_be_invalidated_p): Improve check for invalidation
2468 (uninit_uses_cannot_happen): Avoid unnecessary if
2469 convert_control_dep_chain_into_preds yielded nothing.
2471 2018-01-06 Martin Sebor <msebor@redhat.com>
2473 PR tree-optimization/83640
2474 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2475 subtracting negative offset from size.
2476 (builtin_access::overlap): Adjust offset bounds of the access to fall
2477 within the size of the object if possible.
2479 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2481 PR rtl-optimization/83699
2482 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2483 extract_bit_field_as_subreg to cases in which the extracted
2484 value is also a vector.
2486 * lra-constraints.c (process_alt_operands): Test for the equivalence
2487 substitutions when detecting a possible reload cycle.
2489 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2492 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2493 by default if flag_selective_schedling{,2}. Formatting fixes.
2495 PR rtl-optimization/83682
2496 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2497 if it has non-VECTOR_MODE element mode.
2498 (vec_duplicate_p): Likewise.
2501 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2502 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2504 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2507 * config/i386/i386-builtin.def
2508 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2509 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2510 Require also OPTION_MASK_ISA_AVX512F in addition to
2511 OPTION_MASK_ISA_GFNI.
2512 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2513 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2514 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2515 to OPTION_MASK_ISA_GFNI.
2516 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2517 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2518 OPTION_MASK_ISA_AVX512BW.
2519 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2520 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2521 addition to OPTION_MASK_ISA_GFNI.
2522 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2523 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2524 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2525 to OPTION_MASK_ISA_GFNI.
2526 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2527 a requirement for all ISAs rather than any of them with a few
2529 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2531 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2532 bitmasks to be enabled with 3 exceptions, instead of requiring any
2533 enabled ISA with lots of exceptions.
2534 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2535 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2536 Change avx512bw in isa attribute to avx512f.
2537 * config/i386/sgxintrin.h: Add license boilerplate.
2538 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2539 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2540 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2541 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2543 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2544 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2545 temporarily sse2 rather than sse if not enabled already.
2548 * config/i386/sse.md (VI248_VLBW): Rename to ...
2549 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2550 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2551 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2552 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2553 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2554 mode iterator instead of VI248_VLBW.
2556 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2558 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2559 (record_modified): Skip clobbers; add debug output.
2560 (param_change_prob): Use sreal frequencies.
2562 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2564 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2565 punt for user-aligned variables.
2567 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2569 * tree-chrec.c (chrec_contains_symbols): Return true for
2572 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2575 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2576 of (x|y) == x for BICS pattern.
2578 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2580 PR tree-optimization/83605
2581 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2582 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2585 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2587 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2588 * config/epiphany/rtems.h: New file.
2590 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2591 Uros Bizjak <ubizjak@gmail.com>
2594 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2595 QIreg_operand instead of register_operand predicate.
2596 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2597 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2598 comments instead of -fmitigate[-_]rop.
2600 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2603 * cgraphunit.c (symbol_table::compile): Switch to text_section
2604 before calling assembly_start debug hook.
2605 * run-rtl-passes.c (run_rtl_passes): Likewise.
2608 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2610 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2611 range_int_cst_p rather than !symbolic_range_p before calling
2612 extract_range_from_multiplicative_op_1.
2614 2017-01-04 Jeff Law <law@redhat.com>
2616 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2617 redundant test in assertion.
2619 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2621 * doc/rtl.texi: Document machine_mode wrapper classes.
2623 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2625 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2628 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2630 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2631 the VEC_PERM_EXPR fold to fail.
2633 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2636 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2637 to switched_sections.
2639 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2642 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2645 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2648 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2649 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2651 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2654 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2655 is BLKmode and bitpos not zero or mode change is needed.
2657 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2660 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2663 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2666 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2667 instead of MULT rtx. Update all corresponding splitters.
2669 (*ssub<modesuffix>): Ditto.
2671 (*cmp_sadd_di): Update split patterns.
2672 (*cmp_sadd_si): Ditto.
2673 (*cmp_sadd_sidi): Ditto.
2674 (*cmp_ssub_di): Ditto.
2675 (*cmp_ssub_si): Ditto.
2676 (*cmp_ssub_sidi): Ditto.
2677 * config/alpha/predicates.md (const23_operand): New predicate.
2678 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2679 Look for ASHIFT, not MULT inner operand.
2680 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2682 2018-01-04 Martin Liska <mliska@suse.cz>
2684 PR gcov-profile/83669
2685 * gcov.c (output_intermediate_file): Add version to intermediate
2687 * doc/gcov.texi: Document new field 'version' in intermediate
2688 file format. Fix location of '-k' option of gcov command.
2690 2018-01-04 Martin Liska <mliska@suse.cz>
2693 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2695 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2697 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2699 2018-01-03 Martin Sebor <msebor@redhat.com>
2701 PR tree-optimization/83655
2702 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2703 checking calls with invalid arguments.
2705 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2707 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2708 (vectorizable_mask_load_store): Delete.
2709 (vectorizable_call): Return false for masked loads and stores.
2710 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2711 instead of gimple_assign_rhs1.
2712 (vectorizable_load): Handle IFN_MASK_LOAD.
2713 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2715 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2717 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2719 (vectorizable_mask_load_store): ...here.
2720 (vectorizable_load): ...and here.
2722 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2724 * tree-vect-stmts.c (vect_build_all_ones_mask)
2725 (vect_build_zero_merge_argument): New functions, split out from...
2726 (vectorizable_load): ...here.
2728 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2730 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2732 (vectorizable_mask_load_store): ...here.
2733 (vectorizable_store): ...and here.
2735 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2737 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2739 (vectorizable_mask_load_store): ...here.
2741 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2743 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2744 (vect_model_store_cost): Take a vec_load_store_type instead of a
2746 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2747 (vect_model_store_cost): Take a vec_load_store_type instead of a
2749 (vectorizable_mask_load_store): Update accordingly.
2750 (vectorizable_store): Likewise.
2751 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2753 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2755 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2756 IFN_MASK_LOAD calls here rather than...
2757 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2759 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2760 Alan Hayward <alan.hayward@arm.com>
2761 David Sherwood <david.sherwood@arm.com>
2763 * expmed.c (extract_bit_field_1): For vector extracts,
2764 fall back to extract_bit_field_as_subreg if vec_extract
2767 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2768 Alan Hayward <alan.hayward@arm.com>
2769 David Sherwood <david.sherwood@arm.com>
2771 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2772 they are variable or constant sized.
2773 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2774 slots for constant-sized data.
2776 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2777 Alan Hayward <alan.hayward@arm.com>
2778 David Sherwood <david.sherwood@arm.com>
2780 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2781 handling COND_EXPRs with boolean comparisons, try to find a better
2782 basis for the mask type than the boolean itself.
2784 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2786 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2787 is calculated and how it can be overridden.
2788 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2789 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2791 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2794 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2795 Alan Hayward <alan.hayward@arm.com>
2796 David Sherwood <david.sherwood@arm.com>
2798 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2799 Remove the mode argument.
2800 (aarch64_simd_valid_immediate): Remove the mode and inverse
2802 * config/aarch64/iterators.md (bitsize): New iterator.
2803 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2804 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2805 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2806 aarch64_simd_valid_immediate.
2807 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2808 (aarch64_reg_or_bic_imm): Likewise.
2809 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2810 with an insn_type enum and msl with a modifier_type enum.
2811 Replace element_width with a scalar_mode. Change the shift
2812 to unsigned int. Add constructors for scalar_float_mode and
2813 scalar_int_mode elements.
2814 (aarch64_vect_float_const_representable_p): Delete.
2815 (aarch64_can_const_movi_rtx_p)
2816 (aarch64_simd_scalar_immediate_valid_for_move)
2817 (aarch64_simd_make_constant): Update call to
2818 aarch64_simd_valid_immediate.
2819 (aarch64_advsimd_valid_immediate_hs): New function.
2820 (aarch64_advsimd_valid_immediate): Likewise.
2821 (aarch64_simd_valid_immediate): Remove mode and inverse
2822 arguments. Rewrite to use the above. Use const_vec_duplicate_p
2823 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2824 and aarch64_float_const_representable_p on the result.
2825 (aarch64_output_simd_mov_immediate): Remove mode argument.
2826 Update call to aarch64_simd_valid_immediate and use of
2827 simd_immediate_info.
2828 (aarch64_output_scalar_simd_mov_immediate): Update call
2831 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2832 Alan Hayward <alan.hayward@arm.com>
2833 David Sherwood <david.sherwood@arm.com>
2835 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2836 (mode_nunits): Likewise CONST_MODE_NUNITS.
2837 * machmode.def (ADJUST_NUNITS): Document.
2838 * genmodes.c (mode_data::need_nunits_adj): New field.
2839 (blank_mode): Update accordingly.
2840 (adj_nunits): New variable.
2841 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2843 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2844 listed in adj_nunits.
2845 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2846 listed in adj_nunits. Don't emit case statements for such modes.
2847 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2848 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2849 nothing if adj_nunits is nonnull.
2850 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2851 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2852 (emit_mode_fbit): Update use of print_maybe_const_decl.
2853 (emit_move_size): Likewise. Treat the array as non-const
2855 (emit_mode_adjustments): Handle adj_nunits.
2857 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2859 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2860 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2861 (VECTOR_MODES): Use it.
2862 (make_vector_modes): Take the prefix as an argument.
2864 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2865 Alan Hayward <alan.hayward@arm.com>
2866 David Sherwood <david.sherwood@arm.com>
2868 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2869 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2870 for MODE_VECTOR_BOOL.
2871 * machmode.def (VECTOR_BOOL_MODE): Document.
2872 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2873 (make_vector_bool_mode): New function.
2874 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2876 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2877 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2879 * stor-layout.c (int_mode_for_mode): Likewise.
2880 * tree.c (build_vector_type_for_mode): Likewise.
2881 * varasm.c (output_constant_pool_2): Likewise.
2882 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2883 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2884 for MODE_VECTOR_BOOL.
2885 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2886 of mode class checks.
2887 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2888 instead of a list of mode class checks.
2889 (expand_vector_scalar_condition): Likewise.
2890 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2892 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2893 Alan Hayward <alan.hayward@arm.com>
2894 David Sherwood <david.sherwood@arm.com>
2896 * machmode.h (mode_size): Change from unsigned short to
2898 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2899 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2900 or if measurement_type is not polynomial.
2901 (fixed_size_mode::includes_p): Check for constant-sized modes.
2902 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2903 return a poly_uint16 rather than an unsigned short.
2904 (emit_mode_size): Change the type of mode_size from unsigned short
2905 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2906 (emit_mode_adjustments): Cope with polynomial vector sizes.
2907 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2909 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2911 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2912 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2913 * caller-save.c (setup_save_areas): Likewise.
2914 (replace_reg_with_saved_mem): Likewise.
2915 * calls.c (emit_library_call_value_1): Likewise.
2916 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2917 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2918 (gen_lowpart_for_combine): Likewise.
2919 * convert.c (convert_to_integer_1): Likewise.
2920 * cse.c (equiv_constant, cse_insn): Likewise.
2921 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2922 (cselib_subst_to_values): Likewise.
2923 * dce.c (word_dce_process_block): Likewise.
2924 * df-problems.c (df_word_lr_mark_ref): Likewise.
2925 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2926 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2927 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2928 (rtl_for_decl_location): Likewise.
2929 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2930 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2931 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2932 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2933 (expand_expr_real_1): Likewise.
2934 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2935 (pad_below): Likewise.
2936 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2937 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2938 * ira.c (get_subreg_tracking_sizes): Likewise.
2939 * ira-build.c (ira_create_allocno_objects): Likewise.
2940 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2941 (ira_sort_regnos_for_alter_reg): Likewise.
2942 * ira-costs.c (record_operand_costs): Likewise.
2943 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2944 (resolve_simple_move): Likewise.
2945 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2946 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2947 (lra_constraints): Likewise.
2948 (CONST_POOL_OK_P): Reject variable-sized modes.
2949 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2950 (add_pseudo_to_slot, lra_spill): Likewise.
2951 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2952 * optabs-query.c (get_best_extraction_insn): Likewise.
2953 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2954 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2955 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2956 * recog.c (offsettable_address_addr_space_p): Likewise.
2957 * regcprop.c (maybe_mode_change): Likewise.
2958 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2959 * regrename.c (build_def_use): Likewise.
2960 * regstat.c (dump_reg_info): Likewise.
2961 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2962 (find_reloads, find_reloads_subreg_address): Likewise.
2963 * reload1.c (eliminate_regs_1): Likewise.
2964 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2965 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2966 (simplify_binary_operation_1, simplify_subreg): Likewise.
2967 * targhooks.c (default_function_arg_padding): Likewise.
2968 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2969 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2970 (verify_gimple_assign_ternary): Likewise.
2971 * tree-inline.c (estimate_move_cost): Likewise.
2972 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2973 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2974 (get_address_cost_ainc): Likewise.
2975 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2976 (vect_supportable_dr_alignment): Likewise.
2977 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2978 (vectorizable_reduction): Likewise.
2979 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2980 (vectorizable_operation, vectorizable_load): Likewise.
2981 * tree.c (build_same_sized_truth_vector_type): Likewise.
2982 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2983 * var-tracking.c (emit_note_insn_var_location): Likewise.
2984 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2985 (ADDR_VEC_ALIGN): Likewise.
2987 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2988 Alan Hayward <alan.hayward@arm.com>
2989 David Sherwood <david.sherwood@arm.com>
2991 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2993 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2994 or if measurement_type is polynomial.
2995 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2996 * combine.c (make_extraction): Likewise.
2997 * dse.c (find_shift_sequence): Likewise.
2998 * dwarf2out.c (mem_loc_descriptor): Likewise.
2999 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3000 (extract_bit_field, extract_low_bits): Likewise.
3001 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3002 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3003 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3004 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3005 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3006 * reload.c (find_reloads): Likewise.
3007 * reload1.c (alter_reg): Likewise.
3008 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3009 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3010 * tree-if-conv.c (predicate_mem_writes): Likewise.
3011 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3012 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3013 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3014 * valtrack.c (dead_debug_insert_temp): Likewise.
3015 * varasm.c (mergeable_constant_section): Likewise.
3016 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3018 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3019 Alan Hayward <alan.hayward@arm.com>
3020 David Sherwood <david.sherwood@arm.com>
3022 * expr.c (expand_assignment): Cope with polynomial mode sizes
3023 when assigning to a CONCAT.
3025 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3026 Alan Hayward <alan.hayward@arm.com>
3027 David Sherwood <david.sherwood@arm.com>
3029 * machmode.h (mode_precision): Change from unsigned short to
3031 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3033 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3034 or if measurement_type is not polynomial.
3035 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3036 in which the mode is already known to be a scalar_int_mode.
3037 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3038 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3040 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3041 for GET_MODE_PRECISION.
3042 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3043 for GET_MODE_PRECISION.
3044 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3046 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3047 (expand_field_assignment, make_extraction): Likewise.
3048 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3049 (get_last_value): Likewise.
3050 * convert.c (convert_to_integer_1): Likewise.
3051 * cse.c (cse_insn): Likewise.
3052 * expr.c (expand_expr_real_1): Likewise.
3053 * lra-constraints.c (simplify_operand_subreg): Likewise.
3054 * optabs-query.c (can_atomic_load_p): Likewise.
3055 * optabs.c (expand_atomic_load): Likewise.
3056 (expand_atomic_store): Likewise.
3057 * ree.c (combine_reaching_defs): Likewise.
3058 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3059 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3060 * tree.h (type_has_mode_precision_p): Likewise.
3061 * ubsan.c (instrument_si_overflow): Likewise.
3063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3064 Alan Hayward <alan.hayward@arm.com>
3065 David Sherwood <david.sherwood@arm.com>
3067 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3068 polynomial numbers of units.
3069 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3070 (valid_vector_subparts_p): New function.
3071 (build_vector_type): Remove temporary shim and take the number
3072 of units as a poly_uint64 rather than an int.
3073 (build_opaque_vector_type): Take the number of units as a
3074 poly_uint64 rather than an int.
3075 * tree.c (build_vector_from_ctor): Handle polynomial
3076 TYPE_VECTOR_SUBPARTS.
3077 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3078 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3079 (build_vector_from_val): If the number of units is variable,
3080 use build_vec_duplicate_cst for constant operands and
3081 VEC_DUPLICATE_EXPR otherwise.
3082 (make_vector_type): Remove temporary is_constant ().
3083 (build_vector_type, build_opaque_vector_type): Take the number of
3084 units as a poly_uint64 rather than an int.
3085 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3087 * cfgexpand.c (expand_debug_expr): Likewise.
3088 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3089 (store_constructor, expand_expr_real_1): Likewise.
3090 (const_scalar_mask_from_tree): Likewise.
3091 * fold-const-call.c (fold_const_reduction): Likewise.
3092 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3093 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3094 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3095 (fold_relational_const): Likewise.
3096 (native_interpret_vector): Likewise. Change the size from an
3097 int to an unsigned int.
3098 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3099 TYPE_VECTOR_SUBPARTS.
3100 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3101 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3102 duplicating a non-constant operand into a variable-length vector.
3103 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3104 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3105 * ipa-icf.c (sem_variable::equals): Likewise.
3106 * match.pd: Likewise.
3107 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3108 * print-tree.c (print_node): Likewise.
3109 * stor-layout.c (layout_type): Likewise.
3110 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3111 * tree-cfg.c (verify_gimple_comparison): Likewise.
3112 (verify_gimple_assign_binary): Likewise.
3113 (verify_gimple_assign_ternary): Likewise.
3114 (verify_gimple_assign_single): Likewise.
3115 * tree-pretty-print.c (dump_generic_node): Likewise.
3116 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3117 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3118 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3119 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3120 (vect_shift_permute_load_chain): Likewise.
3121 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3122 (expand_vector_condition, optimize_vector_constructor): Likewise.
3123 (lower_vec_perm, get_compute_type): Likewise.
3124 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3125 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3126 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3127 (vect_recog_mask_conversion_pattern): Likewise.
3128 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3129 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3130 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3131 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3132 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3133 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3134 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3135 (supportable_widening_operation): Likewise.
3136 (supportable_narrowing_operation): Likewise.
3137 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3139 * varasm.c (output_constant): Likewise.
3141 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3142 Alan Hayward <alan.hayward@arm.com>
3143 David Sherwood <david.sherwood@arm.com>
3145 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3146 so that both the length == 3 and length != 3 cases set up their
3147 own permute vectors. Add comments explaining why we know the
3148 number of elements is constant.
3149 (vect_permute_load_chain): Likewise.
3151 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3152 Alan Hayward <alan.hayward@arm.com>
3153 David Sherwood <david.sherwood@arm.com>
3155 * machmode.h (mode_nunits): Change from unsigned char to
3157 (ONLY_FIXED_SIZE_MODES): New macro.
3158 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3159 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3160 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3162 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3163 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3164 or if measurement_type is not polynomial.
3165 * genmodes.c (ZERO_COEFFS): New macro.
3166 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3168 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3169 Use ZERO_COEFFS when emitting initializers.
3170 * data-streamer.h (bp_pack_poly_value): New function.
3171 (bp_unpack_poly_value): Likewise.
3172 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3173 for GET_MODE_NUNITS.
3174 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3175 for GET_MODE_NUNITS.
3176 * tree.c (make_vector_type): Remove temporary shim and make
3177 the real function take the number of units as a poly_uint64
3179 (build_vector_type_for_mode): Handle polynomial nunits.
3180 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3181 * emit-rtl.c (const_vec_series_p_1): Likewise.
3182 (gen_rtx_CONST_VECTOR): Likewise.
3183 * fold-const.c (test_vec_duplicate_folding): Likewise.
3184 * genrecog.c (validate_pattern): Likewise.
3185 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3186 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3187 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3188 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3189 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3190 * rtlanal.c (subreg_get_info): Likewise.
3191 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3192 (vect_grouped_load_supported): Likewise.
3193 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3194 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3195 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3196 (simplify_const_unary_operation, simplify_binary_operation_1)
3197 (simplify_const_binary_operation, simplify_ternary_operation)
3198 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3199 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3200 instead of CONST_VECTOR_NUNITS.
3201 * varasm.c (output_constant_pool_2): Likewise.
3202 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3203 explicit-encoded elements in the XVEC for variable-length vectors.
3205 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3207 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3209 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3210 Alan Hayward <alan.hayward@arm.com>
3211 David Sherwood <david.sherwood@arm.com>
3213 * coretypes.h (fixed_size_mode): Declare.
3214 (fixed_size_mode_pod): New typedef.
3215 * builtins.h (target_builtins::x_apply_args_mode)
3216 (target_builtins::x_apply_result_mode): Change type to
3217 fixed_size_mode_pod.
3218 * builtins.c (apply_args_size, apply_result_size, result_vector)
3219 (expand_builtin_apply_args_1, expand_builtin_apply)
3220 (expand_builtin_return): Update accordingly.
3222 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3224 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3225 * cselib.c (cselib_hash_rtx): Likewise.
3226 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3227 CONST_VECTOR encoding.
3229 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3230 Jeff Law <law@redhat.com>
3233 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3234 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3235 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3236 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3239 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3240 explicitly probe *sp in a noreturn function if there were any callee
3241 register saves or frame pointer is needed.
3243 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3246 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3247 BLKmode for ternary, binary or unary expressions.
3250 * var-tracking.c (delete_vta_debug_insn): New inline function.
3251 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3252 insns from get_insns () to NULL instead of each bb separately.
3253 Use delete_vta_debug_insn. No longer static.
3254 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3255 delete_vta_debug_insns callers.
3256 * rtl.h (delete_vta_debug_insns): Declare.
3257 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3258 instead of variable_tracking_main.
3260 2018-01-03 Martin Sebor <msebor@redhat.com>
3262 PR tree-optimization/83603
3263 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3264 arguments past the endof the argument list in functions declared
3265 without a prototype.
3266 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3267 Avoid checking when arguments are null.
3269 2018-01-03 Martin Sebor <msebor@redhat.com>
3272 * doc/extend.texi (attribute const): Fix a typo.
3273 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3274 issuing -Wsuggest-attribute for void functions.
3276 2018-01-03 Martin Sebor <msebor@redhat.com>
3278 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3279 offset_int::from instead of wide_int::to_shwi.
3280 (maybe_diag_overlap): Remove assertion.
3281 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3282 * gimple-ssa-sprintf.c (format_directive): Same.
3283 (parse_directive): Same.
3284 (sprintf_dom_walker::compute_format_length): Same.
3285 (try_substitute_return_value): Same.
3287 2017-01-03 Jeff Law <law@redhat.com>
3290 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3291 non-constant residual for zero at runtime and avoid probing in
3292 that case. Reorganize code for trailing problem to mirror handling
3295 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3297 PR tree-optimization/83501
3298 * tree-ssa-strlen.c (get_string_cst): New.
3299 (handle_char_store): Call get_string_cst.
3301 2018-01-03 Martin Liska <mliska@suse.cz>
3303 PR tree-optimization/83593
3304 * tree-ssa-strlen.c: Include tree-cfg.h.
3305 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3306 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3307 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3309 (strlen_dom_walker::before_dom_children): Call
3310 gimple_purge_dead_eh_edges. Dump tranformation with details
3312 (strlen_dom_walker::before_dom_children): Update call by adding
3313 new argument cleanup_eh.
3314 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3316 2018-01-03 Martin Liska <mliska@suse.cz>
3319 * cif-code.def (VARIADIC_THUNK): New enum value.
3320 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3323 2018-01-03 Jan Beulich <jbeulich@suse.com>
3325 * sse.md (mov<mode>_internal): Tighten condition for when to use
3326 vmovdqu<ssescalarsize> for TI and OI modes.
3328 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3330 Update copyright years.
3332 2018-01-03 Martin Liska <mliska@suse.cz>
3335 * ipa-visibility.c (function_and_variable_visibility): Skip
3336 functions with noipa attribure.
3338 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3340 * gcc.c (process_command): Update copyright notice dates.
3341 * gcov-dump.c (print_version): Ditto.
3342 * gcov.c (print_version): Ditto.
3343 * gcov-tool.c (print_version): Ditto.
3344 * gengtype.c (create_file): Ditto.
3345 * doc/cpp.texi: Bump @copying's copyright year.
3346 * doc/cppinternals.texi: Ditto.
3347 * doc/gcc.texi: Ditto.
3348 * doc/gccint.texi: Ditto.
3349 * doc/gcov.texi: Ditto.
3350 * doc/install.texi: Ditto.
3351 * doc/invoke.texi: Ditto.
3353 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3355 * vector-builder.h (vector_builder::m_full_nelts): Change from
3356 unsigned int to poly_uint64.
3357 (vector_builder::full_nelts): Update prototype accordingly.
3358 (vector_builder::new_vector): Likewise.
3359 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3360 (vector_builder::operator ==): Likewise.
3361 (vector_builder::finalize): Likewise.
3362 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3363 Take the number of elements as a poly_uint64 rather than an
3365 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3366 from unsigned int to poly_uint64.
3367 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3368 (vec_perm_indices::new_vector): Likewise.
3369 (vec_perm_indices::length): Likewise.
3370 (vec_perm_indices::nelts_per_input): Likewise.
3371 (vec_perm_indices::input_nelts): Likewise.
3372 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3373 number of elements per input as a poly_uint64 rather than an
3374 unsigned int. Use the original encoding for variable-length
3375 vectors, rather than clamping each individual element.
3376 For the second and subsequent elements in each pattern,
3377 clamp the step and base before clamping their sum.
3378 (vec_perm_indices::series_p): Handle polynomial element counts.
3379 (vec_perm_indices::all_in_range_p): Likewise.
3380 (vec_perm_indices_to_tree): Likewise.
3381 (vec_perm_indices_to_rtx): Likewise.
3382 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3383 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3384 (tree_vector_builder::new_binary_operation): Handle polynomial
3385 element counts. Return false if we need to know the number
3386 of elements at compile time.
3387 * fold-const.c (fold_vec_perm): Punt if the number of elements
3388 isn't known at compile time.
3390 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3392 * vec-perm-indices.h (vec_perm_builder): Change element type
3393 from HOST_WIDE_INT to poly_int64.
3394 (vec_perm_indices::element_type): Update accordingly.
3395 (vec_perm_indices::clamp): Handle polynomial element_types.
3396 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3397 (vec_perm_indices::all_in_range_p): Likewise.
3398 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3400 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3401 polynomial vec_perm_indices element types.
3402 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3403 * fold-const.c (fold_vec_perm): Likewise.
3404 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3405 * tree-vect-generic.c (lower_vec_perm): Likewise.
3406 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3407 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3408 element type to HOST_WIDE_INT.
3410 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3411 Alan Hayward <alan.hayward@arm.com>
3412 David Sherwood <david.sherwood@arm.com>
3414 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3415 rather than an int. Use plus_constant.
3416 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3417 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3419 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3420 Alan Hayward <alan.hayward@arm.com>
3421 David Sherwood <david.sherwood@arm.com>
3423 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3424 a HOST_WIDE_INT to a poly_int64.
3426 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3427 Alan Hayward <alan.hayward@arm.com>
3428 David Sherwood <david.sherwood@arm.com>
3430 * calls.c (load_register_parameters): Cope with polynomial
3431 mode sizes. Require a constant size for BLKmode parameters
3432 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3433 forces a parameter to be padded at the lsb end in order to
3434 fill a complete number of words, require the parameter size
3435 to be ordered wrt UNITS_PER_WORD.
3437 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3438 Alan Hayward <alan.hayward@arm.com>
3439 David Sherwood <david.sherwood@arm.com>
3441 * reload1.c (spill_stack_slot_width): Change element type
3442 from unsigned int to poly_uint64_pod.
3443 (alter_reg): Treat mode sizes as polynomial.
3445 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3446 Alan Hayward <alan.hayward@arm.com>
3447 David Sherwood <david.sherwood@arm.com>
3449 * reload.c (complex_word_subreg_p): New function.
3450 (reload_inner_reg_of_subreg, push_reload): Use it.
3452 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3453 Alan Hayward <alan.hayward@arm.com>
3454 David Sherwood <david.sherwood@arm.com>
3456 * lra-constraints.c (process_alt_operands): Reject matched
3457 operands whose sizes aren't ordered.
3458 (match_reload): Refer to this check here.
3460 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3461 Alan Hayward <alan.hayward@arm.com>
3462 David Sherwood <david.sherwood@arm.com>
3464 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3465 that the mode size is in the set {1, 2, 4, 8, 16}.
3467 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3468 Alan Hayward <alan.hayward@arm.com>
3469 David Sherwood <david.sherwood@arm.com>
3471 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3472 Use plus_constant instead of gen_rtx_PLUS.
3474 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3475 Alan Hayward <alan.hayward@arm.com>
3476 David Sherwood <david.sherwood@arm.com>
3478 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3479 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3480 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3481 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3482 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3483 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3484 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3485 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3486 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3487 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3489 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3490 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3491 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3492 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3493 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3494 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3495 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3496 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3497 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3498 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3500 * expr.c (emit_move_resolve_push): Treat the input and result
3501 of PUSH_ROUNDING as a poly_int64.
3502 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3503 (emit_push_insn): Likewise.
3504 * lra-eliminations.c (mark_not_eliminable): Likewise.
3505 * recog.c (push_operand): Likewise.
3506 * reload1.c (elimination_effects): Likewise.
3507 * rtlanal.c (nonzero_bits1): Likewise.
3508 * calls.c (store_one_arg): Likewise. Require the padding to be
3509 known at compile time.
3511 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3512 Alan Hayward <alan.hayward@arm.com>
3513 David Sherwood <david.sherwood@arm.com>
3515 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3516 Use plus_constant instead of gen_rtx_PLUS.
3518 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3519 Alan Hayward <alan.hayward@arm.com>
3520 David Sherwood <david.sherwood@arm.com>
3522 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3525 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3526 Alan Hayward <alan.hayward@arm.com>
3527 David Sherwood <david.sherwood@arm.com>
3529 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3530 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3531 via stack temporaries. Treat the mode size as polynomial too.
3533 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3534 Alan Hayward <alan.hayward@arm.com>
3535 David Sherwood <david.sherwood@arm.com>
3537 * expr.c (expand_expr_real_2): When handling conversions involving
3538 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3539 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3540 as a poly_uint64 too.
3542 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3543 Alan Hayward <alan.hayward@arm.com>
3544 David Sherwood <david.sherwood@arm.com>
3546 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3548 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3549 Alan Hayward <alan.hayward@arm.com>
3550 David Sherwood <david.sherwood@arm.com>
3552 * combine.c (can_change_dest_mode): Handle polynomial
3553 REGMODE_NATURAL_SIZE.
3554 * expmed.c (store_bit_field_1): Likewise.
3555 * expr.c (store_constructor): Likewise.
3556 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3557 and polynomial REGMODE_NATURAL_SIZE.
3558 (gen_lowpart_common): Likewise.
3559 * reginfo.c (record_subregs_of_mode): Likewise.
3560 * rtlanal.c (read_modify_subreg_p): Likewise.
3562 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3563 Alan Hayward <alan.hayward@arm.com>
3564 David Sherwood <david.sherwood@arm.com>
3566 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3567 numbers of elements.
3569 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3570 Alan Hayward <alan.hayward@arm.com>
3571 David Sherwood <david.sherwood@arm.com>
3573 * match.pd: Cope with polynomial numbers of vector elements.
3575 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3576 Alan Hayward <alan.hayward@arm.com>
3577 David Sherwood <david.sherwood@arm.com>
3579 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3580 in a POINTER_PLUS_EXPR.
3582 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3583 Alan Hayward <alan.hayward@arm.com>
3584 David Sherwood <david.sherwood@arm.com>
3586 * omp-simd-clone.c (simd_clone_subparts): New function.
3587 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3588 (ipa_simd_modify_function_body): Likewise.
3590 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3591 Alan Hayward <alan.hayward@arm.com>
3592 David Sherwood <david.sherwood@arm.com>
3594 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3595 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3596 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3597 (expand_vector_condition, vector_element): Likewise.
3598 (subparts_gt): New function.
3599 (get_compute_type): Use subparts_gt.
3600 (count_type_subparts): Delete.
3601 (expand_vector_operations_1): Use subparts_gt instead of
3602 count_type_subparts.
3604 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3605 Alan Hayward <alan.hayward@arm.com>
3606 David Sherwood <david.sherwood@arm.com>
3608 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3609 (vect_compile_time_alias): ...this new function. Do the calculation
3610 on poly_ints rather than trees.
3611 (vect_prune_runtime_alias_test_list): Update call accordingly.
3613 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3614 Alan Hayward <alan.hayward@arm.com>
3615 David Sherwood <david.sherwood@arm.com>
3617 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3619 (vect_schedule_slp_instance): Likewise.
3621 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3622 Alan Hayward <alan.hayward@arm.com>
3623 David Sherwood <david.sherwood@arm.com>
3625 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3626 constant and extern definitions for variable-length vectors.
3627 (vect_get_constant_vectors): Note that the number of units
3628 is known to be constant.
3630 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3631 Alan Hayward <alan.hayward@arm.com>
3632 David Sherwood <david.sherwood@arm.com>
3634 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3635 of units as polynomial. Choose between WIDE and NARROW based
3638 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3639 Alan Hayward <alan.hayward@arm.com>
3640 David Sherwood <david.sherwood@arm.com>
3642 * tree-vect-stmts.c (simd_clone_subparts): New function.
3643 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3645 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3646 Alan Hayward <alan.hayward@arm.com>
3647 David Sherwood <david.sherwood@arm.com>
3649 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3650 vectors as polynomial. Use build_index_vector for
3653 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3654 Alan Hayward <alan.hayward@arm.com>
3655 David Sherwood <david.sherwood@arm.com>
3657 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3658 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3659 for variable-length vectors.
3660 (vectorizable_mask_load_store): Treat the number of units as
3661 polynomial, asserting that it is constant if the condition has
3662 already been enforced.
3663 (vectorizable_store, vectorizable_load): Likewise.
3665 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3666 Alan Hayward <alan.hayward@arm.com>
3667 David Sherwood <david.sherwood@arm.com>
3669 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3670 of units as polynomial. Punt if we can't tell at compile time
3671 which vector contains the final result.
3673 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3674 Alan Hayward <alan.hayward@arm.com>
3675 David Sherwood <david.sherwood@arm.com>
3677 * tree-vect-loop.c (vectorizable_induction): Treat the number
3678 of units as polynomial. Punt on SLP inductions. Use an integer
3679 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3680 cast of such a series for variable-length floating-point
3683 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3684 Alan Hayward <alan.hayward@arm.com>
3685 David Sherwood <david.sherwood@arm.com>
3687 * tree.h (build_index_vector): Declare.
3688 * tree.c (build_index_vector): New function.
3689 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3690 of units as polynomial, forcibly converting it to a constant if
3691 vectorizable_reduction has already enforced the condition.
3692 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3693 to create a {1,2,3,...} vector.
3694 (vectorizable_reduction): Treat the number of units as polynomial.
3695 Choose vectype_in based on the largest scalar element size rather
3696 than the smallest number of units. Enforce the restrictions
3699 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3700 Alan Hayward <alan.hayward@arm.com>
3701 David Sherwood <david.sherwood@arm.com>
3703 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3704 number of units as polynomial.
3706 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3707 Alan Hayward <alan.hayward@arm.com>
3708 David Sherwood <david.sherwood@arm.com>
3710 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3711 * target.def (autovectorize_vector_sizes): Return the vector sizes
3712 by pointer, using vector_sizes rather than a bitmask.
3713 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3714 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3715 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3717 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3718 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3719 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3720 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3721 * omp-general.c (omp_max_vf): Likewise.
3722 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3723 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3724 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3725 * tree-vect-slp.c (vect_slp_bb): Likewise.
3726 * doc/tm.texi: Regenerate.
3727 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3729 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3730 the vector size as a poly_uint64 rather than an unsigned int.
3731 (current_vector_size): Change from an unsigned int to a poly_uint64.
3732 (get_vectype_for_scalar_type): Update accordingly.
3733 * tree.h (build_truth_vector_type): Take the size and number of
3734 units as a poly_uint64 rather than an unsigned int.
3735 (build_vector_type): Add a temporary overload that takes
3736 the number of units as a poly_uint64 rather than an unsigned int.
3737 * tree.c (make_vector_type): Likewise.
3738 (build_truth_vector_type): Take the number of units as a poly_uint64
3739 rather than an unsigned int.
3741 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3742 Alan Hayward <alan.hayward@arm.com>
3743 David Sherwood <david.sherwood@arm.com>
3745 * target.def (get_mask_mode): Take the number of units and length
3746 as poly_uint64s rather than unsigned ints.
3747 * targhooks.h (default_get_mask_mode): Update accordingly.
3748 * targhooks.c (default_get_mask_mode): Likewise.
3749 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3750 * doc/tm.texi: Regenerate.
3752 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3753 Alan Hayward <alan.hayward@arm.com>
3754 David Sherwood <david.sherwood@arm.com>
3756 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3757 * omp-general.c (omp_max_vf): Likewise.
3758 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3759 (expand_omp_simd): Handle polynomial safelen.
3760 * omp-low.c (omplow_simd_context): Add a default constructor.
3761 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3762 (lower_rec_simd_input_clauses): Update accordingly.
3763 (lower_rec_input_clauses): Likewise.
3765 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3766 Alan Hayward <alan.hayward@arm.com>
3767 David Sherwood <david.sherwood@arm.com>
3769 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3770 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3771 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3772 (vect_analyze_slp_cost): Likewise.
3773 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3774 (vect_model_load_cost): Likewise.
3776 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3777 Alan Hayward <alan.hayward@arm.com>
3778 David Sherwood <david.sherwood@arm.com>
3780 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3781 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3782 from an unsigned int * to a poly_uint64_pod *.
3783 (calculate_unrolling_factor): New function.
3784 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3786 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3787 Alan Hayward <alan.hayward@arm.com>
3788 David Sherwood <david.sherwood@arm.com>
3790 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3791 from an unsigned int to a poly_uint64.
3792 (_loop_vec_info::slp_unrolling_factor): Likewise.
3793 (_loop_vec_info::vectorization_factor): Change from an int
3795 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3796 (vect_get_num_vectors): New function.
3797 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3798 (vect_get_num_copies): Use vect_get_num_vectors.
3799 (vect_analyze_data_ref_dependences): Change max_vf from an int *
3800 to an unsigned int *.
3801 (vect_analyze_data_refs): Change min_vf from an int * to a
3803 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3804 than an unsigned HOST_WIDE_INT.
3805 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3806 (vect_analyze_data_ref_dependence): Change max_vf from an int *
3807 to an unsigned int *.
3808 (vect_analyze_data_ref_dependences): Likewise.
3809 (vect_compute_data_ref_alignment): Handle polynomial vf.
3810 (vect_enhance_data_refs_alignment): Likewise.
3811 (vect_prune_runtime_alias_test_list): Likewise.
3812 (vect_shift_permute_load_chain): Likewise.
3813 (vect_supportable_dr_alignment): Likewise.
3814 (dependence_distance_ge_vf): Take the vectorization factor as a
3815 poly_uint64 rather than an unsigned HOST_WIDE_INT.
3816 (vect_analyze_data_refs): Change min_vf from an int * to a
3818 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3819 vfm1 as a poly_uint64 rather than an int. Make the same change
3820 for the returned bound_scalar.
3821 (vect_gen_vector_loop_niters): Handle polynomial vf.
3822 (vect_do_peeling): Likewise. Update call to
3823 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3824 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3826 * tree-vect-loop.c (vect_determine_vectorization_factor)
3827 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3828 (vect_get_known_peeling_cost): Likewise.
3829 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3830 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3831 (vect_transform_loop): Likewise. Use the lowest possible VF when
3832 updating the upper bounds of the loop.
3833 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3835 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3836 polynomial unroll factors.
3837 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3838 (vect_make_slp_decision): Likewise.
3839 (vect_supported_load_permutation_p): Likewise, and polynomial
3841 (vect_analyze_slp_cost): Handle polynomial vf.
3842 (vect_slp_analyze_node_operations): Likewise.
3843 (vect_slp_analyze_bb_1): Likewise.
3844 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3845 than an unsigned HOST_WIDE_INT.
3846 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3847 (vectorizable_load): Handle polynomial vf.
3848 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3850 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3852 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3853 Alan Hayward <alan.hayward@arm.com>
3854 David Sherwood <david.sherwood@arm.com>
3856 * match.pd: Handle bit operations involving three constants
3857 and try to fold one pair.
3859 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3861 * tree-vect-loop-manip.c: Include gimple-fold.h.
3862 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3863 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3864 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3865 Add a path that uses a step of VF instead of 1, but disable it
3867 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3868 and niters_no_overflow parameters. Update calls to
3869 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3870 Create a new SSA name if the latter choses to use a ste other
3871 than zero, and return it via niters_vector_mult_vf_var.
3872 * tree-vect-loop.c (vect_transform_loop): Update calls to
3873 vect_do_peeling, vect_gen_vector_loop_niters and
3874 slpeel_make_loop_iterate_ntimes.
3875 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3876 (vect_gen_vector_loop_niters): Update declarations after above changes.
3878 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3880 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3881 128-bit round to integer instructions.
3882 (ceil<mode>2): Likewise.
3883 (btrunc<mode>2): Likewise.
3884 (round<mode>2): Likewise.
3886 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3888 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3889 unaligned VSX load/store on P8/P9.
3890 (expand_block_clear): Allow the use of unaligned VSX
3891 load/store on P8/P9.
3893 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3895 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3897 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3898 swap associated with both a load and a store.
3900 2018-01-02 Andrew Waterman <andrew@sifive.com>
3902 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3903 * config/riscv/riscv.md (clear_cache): Use it.
3905 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3907 * web.c: Remove out-of-date comment.
3909 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3911 * expr.c (fixup_args_size_notes): Check that any existing
3912 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3913 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3914 (emit_single_push_insn): ...here.
3916 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3918 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3919 (const_vector_encoded_nelts): New function.
3920 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3921 (const_vector_int_elt, const_vector_elt): Declare.
3922 * emit-rtl.c (const_vector_int_elt_1): New function.
3923 (const_vector_elt): Likewise.
3924 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3925 of CONST_VECTOR_ELT.
3927 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3929 * expr.c: Include rtx-vector-builder.h.
3930 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3931 directly on the tree encoding.
3932 (const_vector_from_tree): Likewise.
3933 * optabs.c: Include rtx-vector-builder.h.
3934 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3935 sequence of "u" values.
3936 * vec-perm-indices.c: Include rtx-vector-builder.h.
3937 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3938 directly on the vec_perm_indices encoding.
3940 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3942 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3943 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3944 * rtx-vector-builder.h: New file.
3945 * rtx-vector-builder.c: Likewise.
3946 * rtl.h (rtx_def::u2): Add a const_vector field.
3947 (CONST_VECTOR_NPATTERNS): New macro.
3948 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3949 (CONST_VECTOR_DUPLICATE_P): Likewise.
3950 (CONST_VECTOR_STEPPED_P): Likewise.
3951 (CONST_VECTOR_ENCODED_ELT): Likewise.
3952 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3953 (unwrap_const_vec_duplicate): Likewise.
3954 (const_vec_series_p): Check for a non-duplicated vector encoding.
3955 Say that the function only returns true for integer vectors.
3956 * emit-rtl.c: Include rtx-vector-builder.h.
3957 (gen_const_vec_duplicate_1): Delete.
3958 (gen_const_vector): Call gen_const_vec_duplicate instead of
3959 gen_const_vec_duplicate_1.
3960 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3961 (gen_const_vec_duplicate): Use rtx_vector_builder.
3962 (gen_const_vec_series): Likewise.
3963 (gen_rtx_CONST_VECTOR): Likewise.
3964 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3965 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3966 Build a new vector rather than modifying a CONST_VECTOR in-place.
3967 (handle_special_swappables): Update call accordingly.
3968 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3969 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3970 Build a new vector rather than modifying a CONST_VECTOR in-place.
3971 (handle_special_swappables): Update call accordingly.
3973 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3975 * simplify-rtx.c (simplify_const_binary_operation): Use
3976 CONST_VECTOR_ELT instead of XVECEXP.
3978 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3980 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3981 the selector elements to be different from the data elements
3982 if the selector is a VECTOR_CST.
3983 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3984 ssizetype for the selector.
3986 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3988 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3989 before testing each element individually.
3990 * tree-vect-generic.c (lower_vec_perm): Likewise.
3992 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3994 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3995 * selftest-run-tests.c (selftest::run_tests): Call it.
3996 * vector-builder.h (vector_builder::operator ==): New function.
3997 (vector_builder::operator !=): Likewise.
3998 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3999 (vec_perm_indices::all_from_input_p): New function.
4000 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4001 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4002 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4003 instead of reading the VECTOR_CST directly. Detect whether both
4004 vector inputs are the same before constructing the vec_perm_indices,
4005 and update the number of inputs argument accordingly. Use the
4006 utility functions added above. Only construct sel2 if we need to.
4008 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4010 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4011 the broadcast of the low byte.
4012 (expand_mult_highpart): Use an explicit encoding for the permutes.
4013 * optabs-query.c (can_mult_highpart_p): Likewise.
4014 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4015 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4016 (vectorizable_bswap): Likewise.
4017 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4018 explicit encoding for the power-of-2 permutes.
4019 (vect_permute_store_chain): Likewise.
4020 (vect_grouped_load_supported): Likewise.
4021 (vect_permute_load_chain): Likewise.
4023 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4025 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4026 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4027 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4028 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4029 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4030 (vect_gen_perm_mask_any): Likewise.
4032 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4034 * int-vector-builder.h: New file.
4035 * vec-perm-indices.h: Include int-vector-builder.h.
4036 (vec_perm_indices): Redefine as an int_vector_builder.
4037 (auto_vec_perm_indices): Delete.
4038 (vec_perm_builder): Redefine as a stand-alone class.
4039 (vec_perm_indices::vec_perm_indices): New function.
4040 (vec_perm_indices::clamp): Likewise.
4041 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4042 (vec_perm_indices::new_vector): New function.
4043 (vec_perm_indices::new_expanded_vector): Update for new
4044 vec_perm_indices class.
4045 (vec_perm_indices::rotate_inputs): New function.
4046 (vec_perm_indices::all_in_range_p): Operate directly on the
4047 encoded form, without computing elided elements.
4048 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4049 encoding. Update for new vec_perm_indices class.
4050 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4051 the given vec_perm_builder.
4052 (expand_vec_perm_var): Update vec_perm_builder constructor.
4053 (expand_mult_highpart): Use vec_perm_builder instead of
4054 auto_vec_perm_indices.
4055 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4056 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4057 or double series encoding as appropriate.
4058 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4059 vec_perm_indices instead of auto_vec_perm_indices.
4060 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4061 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4062 (vect_permute_store_chain): Likewise.
4063 (vect_grouped_load_supported): Likewise.
4064 (vect_permute_load_chain): Likewise.
4065 (vect_shift_permute_load_chain): Likewise.
4066 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4067 (vect_transform_slp_perm_load): Likewise.
4068 (vect_schedule_slp_instance): Likewise.
4069 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4070 (vectorizable_mask_load_store): Likewise.
4071 (vectorizable_bswap): Likewise.
4072 (vectorizable_store): Likewise.
4073 (vectorizable_load): Likewise.
4074 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4075 vec_perm_indices instead of auto_vec_perm_indices. Use
4076 tree_to_vec_perm_builder to read the vector from a tree.
4077 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4078 vec_perm_builder instead of a vec_perm_indices.
4079 (have_whole_vector_shift): Use vec_perm_builder and
4080 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4081 truncation to calc_vec_perm_mask_for_shift.
4082 (vect_create_epilog_for_reduction): Likewise.
4083 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4084 from auto_vec_perm_indices to vec_perm_indices.
4085 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4086 instead of changing individual elements.
4087 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4088 the vector in d.perm.
4089 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4090 from auto_vec_perm_indices to vec_perm_indices.
4091 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4092 instead of changing individual elements.
4093 (arm_vectorize_vec_perm_const): Use new_vector to install
4094 the vector in d.perm.
4095 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4096 Update vec_perm_builder constructor.
4097 (rs6000_expand_interleave): Likewise.
4098 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4099 (rs6000_expand_interleave): Likewise.
4101 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4103 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4104 to qimode could truncate the indices.
4105 * optabs.c (expand_vec_perm_var): Likewise.
4107 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4109 * Makefile.in (OBJS): Add vec-perm-indices.o.
4110 * vec-perm-indices.h: New file.
4111 * vec-perm-indices.c: Likewise.
4112 * target.h (vec_perm_indices): Replace with a forward class
4114 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4115 * optabs.h: Include vec-perm-indices.h.
4116 (expand_vec_perm): Delete.
4117 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4118 (expand_vec_perm_const): Declare.
4119 * target.def (vec_perm_const_ok): Replace with...
4120 (vec_perm_const): ...this new hook.
4121 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4122 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4123 * doc/tm.texi: Regenerate.
4124 * optabs.def (vec_perm_const): Delete.
4125 * doc/md.texi (vec_perm_const): Likewise.
4126 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4127 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4128 expand_vec_perm for constant permutation vectors. Assert that
4129 the mode of variable permutation vectors is the integer equivalent
4130 of the mode that is being permuted.
4131 * optabs-query.h (selector_fits_mode_p): Declare.
4132 * optabs-query.c: Include vec-perm-indices.h.
4133 (selector_fits_mode_p): New function.
4134 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4135 is defined, instead of checking whether the vec_perm_const_optab
4136 exists. Use targetm.vectorize.vec_perm_const instead of
4137 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4138 fit in the vector mode before using a variable permute.
4139 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4140 vec_perm_indices instead of an rtx.
4141 (expand_vec_perm): Replace with...
4142 (expand_vec_perm_const): ...this new function. Take the selector
4143 as a vec_perm_indices rather than an rtx. Also take the mode of
4144 the selector. Update call to shift_amt_for_vec_perm_mask.
4145 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4146 Use vec_perm_indices::new_expanded_vector to expand the original
4147 selector into bytes. Check whether the indices fit in the vector
4148 mode before using a variable permute.
4149 (expand_vec_perm_var): Make global.
4150 (expand_mult_highpart): Use expand_vec_perm_const.
4151 * fold-const.c: Includes vec-perm-indices.h.
4152 * tree-ssa-forwprop.c: Likewise.
4153 * tree-vect-data-refs.c: Likewise.
4154 * tree-vect-generic.c: Likewise.
4155 * tree-vect-loop.c: Likewise.
4156 * tree-vect-slp.c: Likewise.
4157 * tree-vect-stmts.c: Likewise.
4158 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4160 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4161 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4162 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4163 (aarch64_vectorize_vec_perm_const): ...this new function.
4164 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4165 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4166 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4167 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4168 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4169 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4170 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4172 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4173 check for NEON modes.
4174 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4175 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4176 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4177 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4179 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4180 the old VEC_PERM_CONST conditions.
4181 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4182 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4183 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4184 (ia64_vectorize_vec_perm_const_ok): Merge into...
4185 (ia64_vectorize_vec_perm_const): ...this new function.
4186 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4187 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4188 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4189 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4190 * config/mips/mips.c (mips_expand_vec_perm_const)
4191 (mips_vectorize_vec_perm_const_ok): Merge into...
4192 (mips_vectorize_vec_perm_const): ...this new function.
4193 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4194 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4195 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4196 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4197 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4198 (rs6000_expand_vec_perm_const): Delete.
4199 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4201 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4202 (altivec_expand_vec_perm_const_le): Take each operand individually.
4203 Operate on constant selectors rather than rtxes.
4204 (altivec_expand_vec_perm_const): Likewise. Update call to
4205 altivec_expand_vec_perm_const_le.
4206 (rs6000_expand_vec_perm_const): Delete.
4207 (rs6000_vectorize_vec_perm_const_ok): Delete.
4208 (rs6000_vectorize_vec_perm_const): New function.
4209 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4210 an element count and rtx array.
4211 (rs6000_expand_extract_even): Update call accordingly.
4212 (rs6000_expand_interleave): Likewise.
4213 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4214 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4215 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4216 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4217 (rs6000_expand_vec_perm_const): Delete.
4218 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4219 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4220 (altivec_expand_vec_perm_const_le): Take each operand individually.
4221 Operate on constant selectors rather than rtxes.
4222 (altivec_expand_vec_perm_const): Likewise. Update call to
4223 altivec_expand_vec_perm_const_le.
4224 (rs6000_expand_vec_perm_const): Delete.
4225 (rs6000_vectorize_vec_perm_const_ok): Delete.
4226 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4227 reference to the SPE evmerge intructions.
4228 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4229 an element count and rtx array.
4230 (rs6000_expand_extract_even): Update call accordingly.
4231 (rs6000_expand_interleave): Likewise.
4232 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4233 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4235 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4237 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4239 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4240 vector mode and that that mode matches the mode of the data
4242 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4243 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4244 directly using expand_vec_perm_1 when forcing selectors into
4246 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4248 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4250 * optabs-query.h (can_vec_perm_p): Delete.
4251 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4252 * optabs-query.c (can_vec_perm_p): Split into...
4253 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4254 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4255 particular selector is valid.
4256 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4257 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4258 (vect_grouped_load_supported): Likewise.
4259 (vect_shift_permute_load_chain): Likewise.
4260 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4261 (vect_transform_slp_perm_load): Likewise.
4262 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4263 (vectorizable_bswap): Likewise.
4264 (vect_gen_perm_mask_checked): Likewise.
4265 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4266 implementations of variable permutation vectors into account
4267 when deciding which selector to use.
4268 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4269 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4270 with a false third argument.
4271 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4272 to test whether the constant selector is valid and can_vec_perm_var_p
4273 to test whether a variable selector is valid.
4275 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4277 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4278 * optabs-query.c (can_vec_perm_p): Likewise.
4279 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4280 instead of vec_perm_indices.
4281 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4282 (vect_gen_perm_mask_checked): Likewise,
4283 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4284 (vect_gen_perm_mask_checked): Likewise,
4286 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4288 * optabs-query.h (qimode_for_vec_perm): Declare.
4289 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4290 (qimode_for_vec_perm): ...this new function.
4291 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4293 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4295 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4296 does not have a conditional at the top.
4298 2018-01-02 Richard Biener <rguenther@suse.de>
4300 * ipa-inline.c (big_speedup_p): Fix expression.
4302 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4305 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4308 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4312 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4313 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4314 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4315 cond_taken_branch_cost 3->4.
4317 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4319 PR tree-optimization/83581
4320 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4321 TODO_cleanup_cfg if any changes have been made.
4324 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4325 convert_modes if target mode has the right side, but different mode
4329 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4330 last argument when extracting from CONCAT. If either from_real or
4331 from_imag is NULL, use expansion through memory. If result is not
4332 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4333 the parts directly to inner mode, if even that fails, use expansion
4337 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4338 check for bswap in mode rather than HImode and use that in expand_unop
4341 Copyright (C) 2018 Free Software Foundation, Inc.
4343 Copying and distribution of this file, with or without modification,
4344 are permitted in any medium without royalty provided the copyright
4345 notice and this notice are preserved.