1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011, 2012 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
28 #include "hard-reg-set.h"
30 #include "insn-config.h"
40 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
42 /* Forward declarations */
43 static void set_of_1 (rtx
, const_rtx
, void *);
44 static bool covers_regno_p (const_rtx
, unsigned int);
45 static bool covers_regno_no_parallel_p (const_rtx
, unsigned int);
46 static int rtx_referenced_p_1 (rtx
*, void *);
47 static int computed_jump_p_1 (const_rtx
);
48 static void parms_set (rtx
, const_rtx
, void *);
50 static unsigned HOST_WIDE_INT
cached_nonzero_bits (const_rtx
, enum machine_mode
,
51 const_rtx
, enum machine_mode
,
52 unsigned HOST_WIDE_INT
);
53 static unsigned HOST_WIDE_INT
nonzero_bits1 (const_rtx
, enum machine_mode
,
54 const_rtx
, enum machine_mode
,
55 unsigned HOST_WIDE_INT
);
56 static unsigned int cached_num_sign_bit_copies (const_rtx
, enum machine_mode
, const_rtx
,
59 static unsigned int num_sign_bit_copies1 (const_rtx
, enum machine_mode
, const_rtx
,
60 enum machine_mode
, unsigned int);
62 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
63 -1 if a code has no such operand. */
64 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
66 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
67 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
68 SIGN_EXTEND then while narrowing we also have to enforce the
69 representation and sign-extend the value to mode DESTINATION_REP.
71 If the value is already sign-extended to DESTINATION_REP mode we
72 can just switch to DESTINATION mode on it. For each pair of
73 integral modes SOURCE and DESTINATION, when truncating from SOURCE
74 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
75 contains the number of high-order bits in SOURCE that have to be
76 copies of the sign-bit so that we can do this mode-switch to
80 num_sign_bit_copies_in_rep
[MAX_MODE_INT
+ 1][MAX_MODE_INT
+ 1];
82 /* Return 1 if the value of X is unstable
83 (would be different at a different point in the program).
84 The frame pointer, arg pointer, etc. are considered stable
85 (within one function) and so is anything marked `unchanging'. */
88 rtx_unstable_p (const_rtx x
)
90 const RTX_CODE code
= GET_CODE (x
);
97 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
106 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
107 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
108 /* The arg pointer varies if it is not a fixed register. */
109 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
111 /* ??? When call-clobbered, the value is stable modulo the restore
112 that must happen after a call. This currently screws up local-alloc
113 into believing that the restore is not needed. */
114 if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
&& x
== pic_offset_table_rtx
)
119 if (MEM_VOLATILE_P (x
))
128 fmt
= GET_RTX_FORMAT (code
);
129 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
132 if (rtx_unstable_p (XEXP (x
, i
)))
135 else if (fmt
[i
] == 'E')
138 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
139 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
146 /* Return 1 if X has a value that can vary even between two
147 executions of the program. 0 means X can be compared reliably
148 against certain constants or near-constants.
149 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
150 zero, we are slightly more conservative.
151 The frame pointer and the arg pointer are considered constant. */
154 rtx_varies_p (const_rtx x
, bool for_alias
)
167 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
176 /* Note that we have to test for the actual rtx used for the frame
177 and arg pointers and not just the register number in case we have
178 eliminated the frame and/or arg pointer and are using it
180 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
181 /* The arg pointer varies if it is not a fixed register. */
182 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
184 if (x
== pic_offset_table_rtx
185 /* ??? When call-clobbered, the value is stable modulo the restore
186 that must happen after a call. This currently screws up
187 local-alloc into believing that the restore is not needed, so we
188 must return 0 only if we are called from alias analysis. */
189 && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|| for_alias
))
194 /* The operand 0 of a LO_SUM is considered constant
195 (in fact it is related specifically to operand 1)
196 during alias analysis. */
197 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
198 || rtx_varies_p (XEXP (x
, 1), for_alias
);
201 if (MEM_VOLATILE_P (x
))
210 fmt
= GET_RTX_FORMAT (code
);
211 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
214 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
217 else if (fmt
[i
] == 'E')
220 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
221 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
228 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
229 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
230 whether nonzero is returned for unaligned memory accesses on strict
231 alignment machines. */
234 rtx_addr_can_trap_p_1 (const_rtx x
, HOST_WIDE_INT offset
, HOST_WIDE_INT size
,
235 enum machine_mode mode
, bool unaligned_mems
)
237 enum rtx_code code
= GET_CODE (x
);
241 && GET_MODE_SIZE (mode
) != 0)
243 HOST_WIDE_INT actual_offset
= offset
;
244 #ifdef SPARC_STACK_BOUNDARY_HACK
245 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
246 the real alignment of %sp. However, when it does this, the
247 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
248 if (SPARC_STACK_BOUNDARY_HACK
249 && (x
== stack_pointer_rtx
|| x
== hard_frame_pointer_rtx
))
250 actual_offset
-= STACK_POINTER_OFFSET
;
253 if (actual_offset
% GET_MODE_SIZE (mode
) != 0)
260 if (SYMBOL_REF_WEAK (x
))
262 if (!CONSTANT_POOL_ADDRESS_P (x
))
265 HOST_WIDE_INT decl_size
;
270 size
= GET_MODE_SIZE (mode
);
274 /* If the size of the access or of the symbol is unknown,
276 decl
= SYMBOL_REF_DECL (x
);
278 /* Else check that the access is in bounds. TODO: restructure
279 expr_size/tree_expr_size/int_expr_size and just use the latter. */
282 else if (DECL_P (decl
) && DECL_SIZE_UNIT (decl
))
283 decl_size
= (host_integerp (DECL_SIZE_UNIT (decl
), 0)
284 ? tree_low_cst (DECL_SIZE_UNIT (decl
), 0)
286 else if (TREE_CODE (decl
) == STRING_CST
)
287 decl_size
= TREE_STRING_LENGTH (decl
);
288 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl
)))
289 decl_size
= int_size_in_bytes (TREE_TYPE (decl
));
293 return (decl_size
<= 0 ? offset
!= 0 : offset
+ size
> decl_size
);
302 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
303 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
304 || x
== stack_pointer_rtx
305 /* The arg pointer varies if it is not a fixed register. */
306 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
308 /* All of the virtual frame registers are stack references. */
309 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
310 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
315 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
316 mode
, unaligned_mems
);
319 /* An address is assumed not to trap if:
320 - it is the pic register plus a constant. */
321 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
324 /* - or it is an address that can't trap plus a constant integer,
325 with the proper remainder modulo the mode size if we are
326 considering unaligned memory references. */
327 if (CONST_INT_P (XEXP (x
, 1))
328 && !rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
+ INTVAL (XEXP (x
, 1)),
329 size
, mode
, unaligned_mems
))
336 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), offset
, size
,
337 mode
, unaligned_mems
);
344 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
345 mode
, unaligned_mems
);
351 /* If it isn't one of the case above, it can cause a trap. */
355 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
358 rtx_addr_can_trap_p (const_rtx x
)
360 return rtx_addr_can_trap_p_1 (x
, 0, 0, VOIDmode
, false);
363 /* Return true if X is an address that is known to not be zero. */
366 nonzero_address_p (const_rtx x
)
368 const enum rtx_code code
= GET_CODE (x
);
373 return !SYMBOL_REF_WEAK (x
);
379 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
380 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
381 || x
== stack_pointer_rtx
382 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
384 /* All of the virtual frame registers are stack references. */
385 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
386 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
391 return nonzero_address_p (XEXP (x
, 0));
394 if (CONST_INT_P (XEXP (x
, 1)))
395 return nonzero_address_p (XEXP (x
, 0));
396 /* Handle PIC references. */
397 else if (XEXP (x
, 0) == pic_offset_table_rtx
398 && CONSTANT_P (XEXP (x
, 1)))
403 /* Similar to the above; allow positive offsets. Further, since
404 auto-inc is only allowed in memories, the register must be a
406 if (CONST_INT_P (XEXP (x
, 1))
407 && INTVAL (XEXP (x
, 1)) > 0)
409 return nonzero_address_p (XEXP (x
, 0));
412 /* Similarly. Further, the offset is always positive. */
419 return nonzero_address_p (XEXP (x
, 0));
422 return nonzero_address_p (XEXP (x
, 1));
428 /* If it isn't one of the case above, might be zero. */
432 /* Return 1 if X refers to a memory location whose address
433 cannot be compared reliably with constant addresses,
434 or if X refers to a BLKmode memory object.
435 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
436 zero, we are slightly more conservative. */
439 rtx_addr_varies_p (const_rtx x
, bool for_alias
)
450 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
452 fmt
= GET_RTX_FORMAT (code
);
453 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
456 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
459 else if (fmt
[i
] == 'E')
462 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
463 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
469 /* Return the value of the integer term in X, if one is apparent;
471 Only obvious integer terms are detected.
472 This is used in cse.c with the `related_value' field. */
475 get_integer_term (const_rtx x
)
477 if (GET_CODE (x
) == CONST
)
480 if (GET_CODE (x
) == MINUS
481 && CONST_INT_P (XEXP (x
, 1)))
482 return - INTVAL (XEXP (x
, 1));
483 if (GET_CODE (x
) == PLUS
484 && CONST_INT_P (XEXP (x
, 1)))
485 return INTVAL (XEXP (x
, 1));
489 /* If X is a constant, return the value sans apparent integer term;
491 Only obvious integer terms are detected. */
494 get_related_value (const_rtx x
)
496 if (GET_CODE (x
) != CONST
)
499 if (GET_CODE (x
) == PLUS
500 && CONST_INT_P (XEXP (x
, 1)))
502 else if (GET_CODE (x
) == MINUS
503 && CONST_INT_P (XEXP (x
, 1)))
508 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
509 to somewhere in the same object or object_block as SYMBOL. */
512 offset_within_block_p (const_rtx symbol
, HOST_WIDE_INT offset
)
516 if (GET_CODE (symbol
) != SYMBOL_REF
)
524 if (CONSTANT_POOL_ADDRESS_P (symbol
)
525 && offset
< (int) GET_MODE_SIZE (get_pool_mode (symbol
)))
528 decl
= SYMBOL_REF_DECL (symbol
);
529 if (decl
&& offset
< int_size_in_bytes (TREE_TYPE (decl
)))
533 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol
)
534 && SYMBOL_REF_BLOCK (symbol
)
535 && SYMBOL_REF_BLOCK_OFFSET (symbol
) >= 0
536 && ((unsigned HOST_WIDE_INT
) offset
+ SYMBOL_REF_BLOCK_OFFSET (symbol
)
537 < (unsigned HOST_WIDE_INT
) SYMBOL_REF_BLOCK (symbol
)->size
))
543 /* Split X into a base and a constant offset, storing them in *BASE_OUT
544 and *OFFSET_OUT respectively. */
547 split_const (rtx x
, rtx
*base_out
, rtx
*offset_out
)
549 if (GET_CODE (x
) == CONST
)
552 if (GET_CODE (x
) == PLUS
&& CONST_INT_P (XEXP (x
, 1)))
554 *base_out
= XEXP (x
, 0);
555 *offset_out
= XEXP (x
, 1);
560 *offset_out
= const0_rtx
;
563 /* Return the number of places FIND appears within X. If COUNT_DEST is
564 zero, we do not count occurrences inside the destination of a SET. */
567 count_occurrences (const_rtx x
, const_rtx find
, int count_dest
)
571 const char *format_ptr
;
590 count
= count_occurrences (XEXP (x
, 0), find
, count_dest
);
592 count
+= count_occurrences (XEXP (x
, 1), find
, count_dest
);
596 if (MEM_P (find
) && rtx_equal_p (x
, find
))
601 if (SET_DEST (x
) == find
&& ! count_dest
)
602 return count_occurrences (SET_SRC (x
), find
, count_dest
);
609 format_ptr
= GET_RTX_FORMAT (code
);
612 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
614 switch (*format_ptr
++)
617 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
621 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
622 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
630 /* Return TRUE if OP is a register or subreg of a register that
631 holds an unsigned quantity. Otherwise, return FALSE. */
634 unsigned_reg_p (rtx op
)
638 && TYPE_UNSIGNED (TREE_TYPE (REG_EXPR (op
))))
641 if (GET_CODE (op
) == SUBREG
642 && SUBREG_PROMOTED_UNSIGNED_P (op
))
649 /* Nonzero if register REG appears somewhere within IN.
650 Also works if REG is not a register; in this case it checks
651 for a subexpression of IN that is Lisp "equal" to REG. */
654 reg_mentioned_p (const_rtx reg
, const_rtx in
)
666 if (GET_CODE (in
) == LABEL_REF
)
667 return reg
== XEXP (in
, 0);
669 code
= GET_CODE (in
);
673 /* Compare registers by number. */
675 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
677 /* These codes have no constituent expressions
685 /* These are kept unique for a given value. */
692 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
695 fmt
= GET_RTX_FORMAT (code
);
697 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
702 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
703 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
706 else if (fmt
[i
] == 'e'
707 && reg_mentioned_p (reg
, XEXP (in
, i
)))
713 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
714 no CODE_LABEL insn. */
717 no_labels_between_p (const_rtx beg
, const_rtx end
)
722 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
728 /* Nonzero if register REG is used in an insn between
729 FROM_INSN and TO_INSN (exclusive of those two). */
732 reg_used_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
736 if (from_insn
== to_insn
)
739 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
740 if (NONDEBUG_INSN_P (insn
)
741 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
742 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
747 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
748 is entirely replaced by a new value and the only use is as a SET_DEST,
749 we do not consider it a reference. */
752 reg_referenced_p (const_rtx x
, const_rtx body
)
756 switch (GET_CODE (body
))
759 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
762 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
763 of a REG that occupies all of the REG, the insn references X if
764 it is mentioned in the destination. */
765 if (GET_CODE (SET_DEST (body
)) != CC0
766 && GET_CODE (SET_DEST (body
)) != PC
767 && !REG_P (SET_DEST (body
))
768 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
769 && REG_P (SUBREG_REG (SET_DEST (body
)))
770 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
771 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
772 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
773 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
774 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
779 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
780 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
787 return reg_overlap_mentioned_p (x
, body
);
790 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
793 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
796 case UNSPEC_VOLATILE
:
797 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
798 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
803 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
804 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
809 if (MEM_P (XEXP (body
, 0)))
810 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
815 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
817 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
824 /* Nonzero if register REG is set or clobbered in an insn between
825 FROM_INSN and TO_INSN (exclusive of those two). */
828 reg_set_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
832 if (from_insn
== to_insn
)
835 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
836 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
841 /* Internals of reg_set_between_p. */
843 reg_set_p (const_rtx reg
, const_rtx insn
)
845 /* We can be passed an insn or part of one. If we are passed an insn,
846 check if a side-effect of the insn clobbers REG. */
848 && (FIND_REG_INC_NOTE (insn
, reg
)
851 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
852 && overlaps_hard_reg_set_p (regs_invalidated_by_call
,
853 GET_MODE (reg
), REGNO (reg
)))
855 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
858 return set_of (reg
, insn
) != NULL_RTX
;
861 /* Similar to reg_set_between_p, but check all registers in X. Return 0
862 only if none of them are modified between START and END. Return 1 if
863 X contains a MEM; this routine does use memory aliasing. */
866 modified_between_p (const_rtx x
, const_rtx start
, const_rtx end
)
868 const enum rtx_code code
= GET_CODE (x
);
889 if (modified_between_p (XEXP (x
, 0), start
, end
))
891 if (MEM_READONLY_P (x
))
893 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
894 if (memory_modified_in_insn_p (x
, insn
))
900 return reg_set_between_p (x
, start
, end
);
906 fmt
= GET_RTX_FORMAT (code
);
907 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
909 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
912 else if (fmt
[i
] == 'E')
913 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
914 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
921 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
922 of them are modified in INSN. Return 1 if X contains a MEM; this routine
923 does use memory aliasing. */
926 modified_in_p (const_rtx x
, const_rtx insn
)
928 const enum rtx_code code
= GET_CODE (x
);
945 if (modified_in_p (XEXP (x
, 0), insn
))
947 if (MEM_READONLY_P (x
))
949 if (memory_modified_in_insn_p (x
, insn
))
955 return reg_set_p (x
, insn
);
961 fmt
= GET_RTX_FORMAT (code
);
962 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
964 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
967 else if (fmt
[i
] == 'E')
968 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
969 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
976 /* Helper function for set_of. */
984 set_of_1 (rtx x
, const_rtx pat
, void *data1
)
986 struct set_of_data
*const data
= (struct set_of_data
*) (data1
);
987 if (rtx_equal_p (x
, data
->pat
)
988 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
992 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
993 (either directly or via STRICT_LOW_PART and similar modifiers). */
995 set_of (const_rtx pat
, const_rtx insn
)
997 struct set_of_data data
;
998 data
.found
= NULL_RTX
;
1000 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
1004 /* This function, called through note_stores, collects sets and
1005 clobbers of hard registers in a HARD_REG_SET, which is pointed to
1008 record_hard_reg_sets (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
1010 HARD_REG_SET
*pset
= (HARD_REG_SET
*)data
;
1011 if (REG_P (x
) && HARD_REGISTER_P (x
))
1012 add_to_hard_reg_set (pset
, GET_MODE (x
), REGNO (x
));
1015 /* Examine INSN, and compute the set of hard registers written by it.
1016 Store it in *PSET. Should only be called after reload. */
1018 find_all_hard_reg_sets (const_rtx insn
, HARD_REG_SET
*pset
)
1022 CLEAR_HARD_REG_SET (*pset
);
1023 note_stores (PATTERN (insn
), record_hard_reg_sets
, pset
);
1025 IOR_HARD_REG_SET (*pset
, call_used_reg_set
);
1026 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1027 if (REG_NOTE_KIND (link
) == REG_INC
)
1028 record_hard_reg_sets (XEXP (link
, 0), NULL
, pset
);
1031 /* A for_each_rtx subroutine of record_hard_reg_uses. */
1033 record_hard_reg_uses_1 (rtx
*px
, void *data
)
1036 HARD_REG_SET
*pused
= (HARD_REG_SET
*)data
;
1038 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1040 int nregs
= hard_regno_nregs
[REGNO (x
)][GET_MODE (x
)];
1042 SET_HARD_REG_BIT (*pused
, REGNO (x
) + nregs
);
1047 /* Like record_hard_reg_sets, but called through note_uses. */
1049 record_hard_reg_uses (rtx
*px
, void *data
)
1051 for_each_rtx (px
, record_hard_reg_uses_1
, data
);
1054 /* Given an INSN, return a SET expression if this insn has only a single SET.
1055 It may also have CLOBBERs, USEs, or SET whose output
1056 will not be used, which we ignore. */
1059 single_set_2 (const_rtx insn
, const_rtx pat
)
1062 int set_verified
= 1;
1065 if (GET_CODE (pat
) == PARALLEL
)
1067 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1069 rtx sub
= XVECEXP (pat
, 0, i
);
1070 switch (GET_CODE (sub
))
1077 /* We can consider insns having multiple sets, where all
1078 but one are dead as single set insns. In common case
1079 only single set is present in the pattern so we want
1080 to avoid checking for REG_UNUSED notes unless necessary.
1082 When we reach set first time, we just expect this is
1083 the single set we are looking for and only when more
1084 sets are found in the insn, we check them. */
1087 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
1088 && !side_effects_p (set
))
1094 set
= sub
, set_verified
= 0;
1095 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
1096 || side_effects_p (sub
))
1108 /* Given an INSN, return nonzero if it has more than one SET, else return
1112 multiple_sets (const_rtx insn
)
1117 /* INSN must be an insn. */
1118 if (! INSN_P (insn
))
1121 /* Only a PARALLEL can have multiple SETs. */
1122 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1124 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1125 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1127 /* If we have already found a SET, then return now. */
1135 /* Either zero or one SET. */
1139 /* Return nonzero if the destination of SET equals the source
1140 and there are no side effects. */
1143 set_noop_p (const_rtx set
)
1145 rtx src
= SET_SRC (set
);
1146 rtx dst
= SET_DEST (set
);
1148 if (dst
== pc_rtx
&& src
== pc_rtx
)
1151 if (MEM_P (dst
) && MEM_P (src
))
1152 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1154 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1155 return rtx_equal_p (XEXP (dst
, 0), src
)
1156 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1157 && !side_effects_p (src
);
1159 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1160 dst
= XEXP (dst
, 0);
1162 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1164 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1166 src
= SUBREG_REG (src
);
1167 dst
= SUBREG_REG (dst
);
1170 return (REG_P (src
) && REG_P (dst
)
1171 && REGNO (src
) == REGNO (dst
));
1174 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1178 noop_move_p (const_rtx insn
)
1180 rtx pat
= PATTERN (insn
);
1182 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1185 /* Insns carrying these notes are useful later on. */
1186 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1189 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1192 if (GET_CODE (pat
) == PARALLEL
)
1195 /* If nothing but SETs of registers to themselves,
1196 this insn can also be deleted. */
1197 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1199 rtx tem
= XVECEXP (pat
, 0, i
);
1201 if (GET_CODE (tem
) == USE
1202 || GET_CODE (tem
) == CLOBBER
)
1205 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1215 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1216 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1217 If the object was modified, if we hit a partial assignment to X, or hit a
1218 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1219 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1223 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1227 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1231 rtx set
= single_set (p
);
1232 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1234 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1236 rtx src
= SET_SRC (set
);
1238 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1239 src
= XEXP (note
, 0);
1241 if ((valid_to
== NULL_RTX
1242 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1243 /* Reject hard registers because we don't usually want
1244 to use them; we'd rather use a pseudo. */
1246 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1253 /* If set in non-simple way, we don't have a value. */
1254 if (reg_set_p (x
, p
))
1261 /* Return nonzero if register in range [REGNO, ENDREGNO)
1262 appears either explicitly or implicitly in X
1263 other than being stored into.
1265 References contained within the substructure at LOC do not count.
1266 LOC may be zero, meaning don't ignore anything. */
1269 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, const_rtx x
,
1273 unsigned int x_regno
;
1278 /* The contents of a REG_NONNEG note is always zero, so we must come here
1279 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1283 code
= GET_CODE (x
);
1288 x_regno
= REGNO (x
);
1290 /* If we modifying the stack, frame, or argument pointer, it will
1291 clobber a virtual register. In fact, we could be more precise,
1292 but it isn't worth it. */
1293 if ((x_regno
== STACK_POINTER_REGNUM
1294 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1295 || x_regno
== ARG_POINTER_REGNUM
1297 || x_regno
== FRAME_POINTER_REGNUM
)
1298 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1301 return endregno
> x_regno
&& regno
< END_REGNO (x
);
1304 /* If this is a SUBREG of a hard reg, we can see exactly which
1305 registers are being modified. Otherwise, handle normally. */
1306 if (REG_P (SUBREG_REG (x
))
1307 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1309 unsigned int inner_regno
= subreg_regno (x
);
1310 unsigned int inner_endregno
1311 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1312 ? subreg_nregs (x
) : 1);
1314 return endregno
> inner_regno
&& regno
< inner_endregno
;
1320 if (&SET_DEST (x
) != loc
1321 /* Note setting a SUBREG counts as referring to the REG it is in for
1322 a pseudo but not for hard registers since we can
1323 treat each word individually. */
1324 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1325 && loc
!= &SUBREG_REG (SET_DEST (x
))
1326 && REG_P (SUBREG_REG (SET_DEST (x
)))
1327 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1328 && refers_to_regno_p (regno
, endregno
,
1329 SUBREG_REG (SET_DEST (x
)), loc
))
1330 || (!REG_P (SET_DEST (x
))
1331 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1334 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1343 /* X does not match, so try its subexpressions. */
1345 fmt
= GET_RTX_FORMAT (code
);
1346 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1348 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1356 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1359 else if (fmt
[i
] == 'E')
1362 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1363 if (loc
!= &XVECEXP (x
, i
, j
)
1364 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1371 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1372 we check if any register number in X conflicts with the relevant register
1373 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1374 contains a MEM (we don't bother checking for memory addresses that can't
1375 conflict because we expect this to be a rare case. */
1378 reg_overlap_mentioned_p (const_rtx x
, const_rtx in
)
1380 unsigned int regno
, endregno
;
1382 /* If either argument is a constant, then modifying X can not
1383 affect IN. Here we look at IN, we can profitably combine
1384 CONSTANT_P (x) with the switch statement below. */
1385 if (CONSTANT_P (in
))
1389 switch (GET_CODE (x
))
1391 case STRICT_LOW_PART
:
1394 /* Overly conservative. */
1399 regno
= REGNO (SUBREG_REG (x
));
1400 if (regno
< FIRST_PSEUDO_REGISTER
)
1401 regno
= subreg_regno (x
);
1402 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1403 ? subreg_nregs (x
) : 1);
1408 endregno
= END_REGNO (x
);
1410 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1420 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1421 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1424 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1427 else if (fmt
[i
] == 'E')
1430 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1431 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1441 return reg_mentioned_p (x
, in
);
1447 /* If any register in here refers to it we return true. */
1448 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1449 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1450 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1456 gcc_assert (CONSTANT_P (x
));
1461 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1462 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1463 ignored by note_stores, but passed to FUN.
1465 FUN receives three arguments:
1466 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1467 2. the SET or CLOBBER rtx that does the store,
1468 3. the pointer DATA provided to note_stores.
1470 If the item being stored in or clobbered is a SUBREG of a hard register,
1471 the SUBREG will be passed. */
1474 note_stores (const_rtx x
, void (*fun
) (rtx
, const_rtx
, void *), void *data
)
1478 if (GET_CODE (x
) == COND_EXEC
)
1479 x
= COND_EXEC_CODE (x
);
1481 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1483 rtx dest
= SET_DEST (x
);
1485 while ((GET_CODE (dest
) == SUBREG
1486 && (!REG_P (SUBREG_REG (dest
))
1487 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1488 || GET_CODE (dest
) == ZERO_EXTRACT
1489 || GET_CODE (dest
) == STRICT_LOW_PART
)
1490 dest
= XEXP (dest
, 0);
1492 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1493 each of whose first operand is a register. */
1494 if (GET_CODE (dest
) == PARALLEL
)
1496 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1497 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1498 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1501 (*fun
) (dest
, x
, data
);
1504 else if (GET_CODE (x
) == PARALLEL
)
1505 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1506 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1509 /* Like notes_stores, but call FUN for each expression that is being
1510 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1511 FUN for each expression, not any interior subexpressions. FUN receives a
1512 pointer to the expression and the DATA passed to this function.
1514 Note that this is not quite the same test as that done in reg_referenced_p
1515 since that considers something as being referenced if it is being
1516 partially set, while we do not. */
1519 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1524 switch (GET_CODE (body
))
1527 (*fun
) (&COND_EXEC_TEST (body
), data
);
1528 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1532 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1533 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1537 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1538 note_uses (&PATTERN (XVECEXP (body
, 0, i
)), fun
, data
);
1542 (*fun
) (&XEXP (body
, 0), data
);
1546 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1547 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1551 (*fun
) (&TRAP_CONDITION (body
), data
);
1555 (*fun
) (&XEXP (body
, 0), data
);
1559 case UNSPEC_VOLATILE
:
1560 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1561 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1565 if (MEM_P (XEXP (body
, 0)))
1566 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1571 rtx dest
= SET_DEST (body
);
1573 /* For sets we replace everything in source plus registers in memory
1574 expression in store and operands of a ZERO_EXTRACT. */
1575 (*fun
) (&SET_SRC (body
), data
);
1577 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1579 (*fun
) (&XEXP (dest
, 1), data
);
1580 (*fun
) (&XEXP (dest
, 2), data
);
1583 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1584 dest
= XEXP (dest
, 0);
1587 (*fun
) (&XEXP (dest
, 0), data
);
1592 /* All the other possibilities never store. */
1593 (*fun
) (pbody
, data
);
1598 /* Return nonzero if X's old contents don't survive after INSN.
1599 This will be true if X is (cc0) or if X is a register and
1600 X dies in INSN or because INSN entirely sets X.
1602 "Entirely set" means set directly and not through a SUBREG, or
1603 ZERO_EXTRACT, so no trace of the old contents remains.
1604 Likewise, REG_INC does not count.
1606 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1607 but for this use that makes no difference, since regs don't overlap
1608 during their lifetimes. Therefore, this function may be used
1609 at any time after deaths have been computed.
1611 If REG is a hard reg that occupies multiple machine registers, this
1612 function will only return 1 if each of those registers will be replaced
1616 dead_or_set_p (const_rtx insn
, const_rtx x
)
1618 unsigned int regno
, end_regno
;
1621 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1622 if (GET_CODE (x
) == CC0
)
1625 gcc_assert (REG_P (x
));
1628 end_regno
= END_REGNO (x
);
1629 for (i
= regno
; i
< end_regno
; i
++)
1630 if (! dead_or_set_regno_p (insn
, i
))
1636 /* Return TRUE iff DEST is a register or subreg of a register and
1637 doesn't change the number of words of the inner register, and any
1638 part of the register is TEST_REGNO. */
1641 covers_regno_no_parallel_p (const_rtx dest
, unsigned int test_regno
)
1643 unsigned int regno
, endregno
;
1645 if (GET_CODE (dest
) == SUBREG
1646 && (((GET_MODE_SIZE (GET_MODE (dest
))
1647 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1648 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1649 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1650 dest
= SUBREG_REG (dest
);
1655 regno
= REGNO (dest
);
1656 endregno
= END_REGNO (dest
);
1657 return (test_regno
>= regno
&& test_regno
< endregno
);
1660 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1661 any member matches the covers_regno_no_parallel_p criteria. */
1664 covers_regno_p (const_rtx dest
, unsigned int test_regno
)
1666 if (GET_CODE (dest
) == PARALLEL
)
1668 /* Some targets place small structures in registers for return
1669 values of functions, and those registers are wrapped in
1670 PARALLELs that we may see as the destination of a SET. */
1673 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1675 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1676 if (inner
!= NULL_RTX
1677 && covers_regno_no_parallel_p (inner
, test_regno
))
1684 return covers_regno_no_parallel_p (dest
, test_regno
);
1687 /* Utility function for dead_or_set_p to check an individual register. */
1690 dead_or_set_regno_p (const_rtx insn
, unsigned int test_regno
)
1694 /* See if there is a death note for something that includes TEST_REGNO. */
1695 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1699 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1702 pattern
= PATTERN (insn
);
1704 /* If a COND_EXEC is not executed, the value survives. */
1705 if (GET_CODE (pattern
) == COND_EXEC
)
1708 if (GET_CODE (pattern
) == SET
)
1709 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1710 else if (GET_CODE (pattern
) == PARALLEL
)
1714 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1716 rtx body
= XVECEXP (pattern
, 0, i
);
1718 if (GET_CODE (body
) == COND_EXEC
)
1719 body
= COND_EXEC_CODE (body
);
1721 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1722 && covers_regno_p (SET_DEST (body
), test_regno
))
1730 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1731 If DATUM is nonzero, look for one whose datum is DATUM. */
1734 find_reg_note (const_rtx insn
, enum reg_note kind
, const_rtx datum
)
1738 gcc_checking_assert (insn
);
1740 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1741 if (! INSN_P (insn
))
1745 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1746 if (REG_NOTE_KIND (link
) == kind
)
1751 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1752 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1757 /* Return the reg-note of kind KIND in insn INSN which applies to register
1758 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1759 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1760 it might be the case that the note overlaps REGNO. */
1763 find_regno_note (const_rtx insn
, enum reg_note kind
, unsigned int regno
)
1767 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1768 if (! INSN_P (insn
))
1771 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1772 if (REG_NOTE_KIND (link
) == kind
1773 /* Verify that it is a register, so that scratch and MEM won't cause a
1775 && REG_P (XEXP (link
, 0))
1776 && REGNO (XEXP (link
, 0)) <= regno
1777 && END_REGNO (XEXP (link
, 0)) > regno
)
1782 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1786 find_reg_equal_equiv_note (const_rtx insn
)
1793 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1794 if (REG_NOTE_KIND (link
) == REG_EQUAL
1795 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1797 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1798 insns that have multiple sets. Checking single_set to
1799 make sure of this is not the proper check, as explained
1800 in the comment in set_unique_reg_note.
1802 This should be changed into an assert. */
1803 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
1810 /* Check whether INSN is a single_set whose source is known to be
1811 equivalent to a constant. Return that constant if so, otherwise
1815 find_constant_src (const_rtx insn
)
1819 set
= single_set (insn
);
1822 x
= avoid_constant_pool_reference (SET_SRC (set
));
1827 note
= find_reg_equal_equiv_note (insn
);
1828 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1829 return XEXP (note
, 0);
1834 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1835 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1838 find_reg_fusage (const_rtx insn
, enum rtx_code code
, const_rtx datum
)
1840 /* If it's not a CALL_INSN, it can't possibly have a
1841 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1851 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1853 link
= XEXP (link
, 1))
1854 if (GET_CODE (XEXP (link
, 0)) == code
1855 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1860 unsigned int regno
= REGNO (datum
);
1862 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1863 to pseudo registers, so don't bother checking. */
1865 if (regno
< FIRST_PSEUDO_REGISTER
)
1867 unsigned int end_regno
= END_HARD_REGNO (datum
);
1870 for (i
= regno
; i
< end_regno
; i
++)
1871 if (find_regno_fusage (insn
, code
, i
))
1879 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1880 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1883 find_regno_fusage (const_rtx insn
, enum rtx_code code
, unsigned int regno
)
1887 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1888 to pseudo registers, so don't bother checking. */
1890 if (regno
>= FIRST_PSEUDO_REGISTER
1894 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1898 if (GET_CODE (op
= XEXP (link
, 0)) == code
1899 && REG_P (reg
= XEXP (op
, 0))
1900 && REGNO (reg
) <= regno
1901 && END_HARD_REGNO (reg
) > regno
)
1909 /* Allocate a register note with kind KIND and datum DATUM. LIST is
1910 stored as the pointer to the next register note. */
1913 alloc_reg_note (enum reg_note kind
, rtx datum
, rtx list
)
1921 case REG_LABEL_TARGET
:
1922 case REG_LABEL_OPERAND
:
1924 /* These types of register notes use an INSN_LIST rather than an
1925 EXPR_LIST, so that copying is done right and dumps look
1927 note
= alloc_INSN_LIST (datum
, list
);
1928 PUT_REG_NOTE_KIND (note
, kind
);
1932 note
= alloc_EXPR_LIST (kind
, datum
, list
);
1939 /* Add register note with kind KIND and datum DATUM to INSN. */
1942 add_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1944 REG_NOTES (insn
) = alloc_reg_note (kind
, datum
, REG_NOTES (insn
));
1947 /* Remove register note NOTE from the REG_NOTES of INSN. */
1950 remove_note (rtx insn
, const_rtx note
)
1954 if (note
== NULL_RTX
)
1957 if (REG_NOTES (insn
) == note
)
1958 REG_NOTES (insn
) = XEXP (note
, 1);
1960 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1961 if (XEXP (link
, 1) == note
)
1963 XEXP (link
, 1) = XEXP (note
, 1);
1967 switch (REG_NOTE_KIND (note
))
1971 df_notes_rescan (insn
);
1978 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
1981 remove_reg_equal_equiv_notes (rtx insn
)
1985 loc
= ®_NOTES (insn
);
1988 enum reg_note kind
= REG_NOTE_KIND (*loc
);
1989 if (kind
== REG_EQUAL
|| kind
== REG_EQUIV
)
1990 *loc
= XEXP (*loc
, 1);
1992 loc
= &XEXP (*loc
, 1);
1996 /* Remove all REG_EQUAL and REG_EQUIV notes referring to REGNO. */
1999 remove_reg_equal_equiv_notes_for_regno (unsigned int regno
)
2006 /* This loop is a little tricky. We cannot just go down the chain because
2007 it is being modified by some actions in the loop. So we just iterate
2008 over the head. We plan to drain the list anyway. */
2009 while ((eq_use
= DF_REG_EQ_USE_CHAIN (regno
)) != NULL
)
2011 rtx insn
= DF_REF_INSN (eq_use
);
2012 rtx note
= find_reg_equal_equiv_note (insn
);
2014 /* This assert is generally triggered when someone deletes a REG_EQUAL
2015 or REG_EQUIV note by hacking the list manually rather than calling
2019 remove_note (insn
, note
);
2023 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2024 return 1 if it is found. A simple equality test is used to determine if
2028 in_expr_list_p (const_rtx listp
, const_rtx node
)
2032 for (x
= listp
; x
; x
= XEXP (x
, 1))
2033 if (node
== XEXP (x
, 0))
2039 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2040 remove that entry from the list if it is found.
2042 A simple equality test is used to determine if NODE matches. */
2045 remove_node_from_expr_list (const_rtx node
, rtx
*listp
)
2048 rtx prev
= NULL_RTX
;
2052 if (node
== XEXP (temp
, 0))
2054 /* Splice the node out of the list. */
2056 XEXP (prev
, 1) = XEXP (temp
, 1);
2058 *listp
= XEXP (temp
, 1);
2064 temp
= XEXP (temp
, 1);
2068 /* Nonzero if X contains any volatile instructions. These are instructions
2069 which may cause unpredictable machine state instructions, and thus no
2070 instructions should be moved or combined across them. This includes
2071 only volatile asms and UNSPEC_VOLATILE instructions. */
2074 volatile_insn_p (const_rtx x
)
2076 const RTX_CODE code
= GET_CODE (x
);
2094 case UNSPEC_VOLATILE
:
2095 /* case TRAP_IF: This isn't clear yet. */
2100 if (MEM_VOLATILE_P (x
))
2107 /* Recursively scan the operands of this expression. */
2110 const char *const fmt
= GET_RTX_FORMAT (code
);
2113 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2117 if (volatile_insn_p (XEXP (x
, i
)))
2120 else if (fmt
[i
] == 'E')
2123 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2124 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
2132 /* Nonzero if X contains any volatile memory references
2133 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2136 volatile_refs_p (const_rtx x
)
2138 const RTX_CODE code
= GET_CODE (x
);
2154 case UNSPEC_VOLATILE
:
2160 if (MEM_VOLATILE_P (x
))
2167 /* Recursively scan the operands of this expression. */
2170 const char *const fmt
= GET_RTX_FORMAT (code
);
2173 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2177 if (volatile_refs_p (XEXP (x
, i
)))
2180 else if (fmt
[i
] == 'E')
2183 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2184 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
2192 /* Similar to above, except that it also rejects register pre- and post-
2196 side_effects_p (const_rtx x
)
2198 const RTX_CODE code
= GET_CODE (x
);
2215 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2216 when some combination can't be done. If we see one, don't think
2217 that we can simplify the expression. */
2218 return (GET_MODE (x
) != VOIDmode
);
2227 case UNSPEC_VOLATILE
:
2228 /* case TRAP_IF: This isn't clear yet. */
2234 if (MEM_VOLATILE_P (x
))
2241 /* Recursively scan the operands of this expression. */
2244 const char *fmt
= GET_RTX_FORMAT (code
);
2247 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2251 if (side_effects_p (XEXP (x
, i
)))
2254 else if (fmt
[i
] == 'E')
2257 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2258 if (side_effects_p (XVECEXP (x
, i
, j
)))
2266 /* Return nonzero if evaluating rtx X might cause a trap.
2267 FLAGS controls how to consider MEMs. A nonzero means the context
2268 of the access may have changed from the original, such that the
2269 address may have become invalid. */
2272 may_trap_p_1 (const_rtx x
, unsigned flags
)
2278 /* We make no distinction currently, but this function is part of
2279 the internal target-hooks ABI so we keep the parameter as
2280 "unsigned flags". */
2281 bool code_changed
= flags
!= 0;
2285 code
= GET_CODE (x
);
2288 /* Handle these cases quickly. */
2300 case UNSPEC_VOLATILE
:
2301 return targetm
.unspec_may_trap_p (x
, flags
);
2308 return MEM_VOLATILE_P (x
);
2310 /* Memory ref can trap unless it's a static var or a stack slot. */
2312 /* Recognize specific pattern of stack checking probes. */
2313 if (flag_stack_check
2314 && MEM_VOLATILE_P (x
)
2315 && XEXP (x
, 0) == stack_pointer_rtx
)
2317 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2318 reference; moving it out of context such as when moving code
2319 when optimizing, might cause its address to become invalid. */
2321 || !MEM_NOTRAP_P (x
))
2323 HOST_WIDE_INT size
= MEM_SIZE_KNOWN_P (x
) ? MEM_SIZE (x
) : 0;
2324 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), 0, size
,
2325 GET_MODE (x
), code_changed
);
2330 /* Division by a non-constant might trap. */
2335 if (HONOR_SNANS (GET_MODE (x
)))
2337 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2338 return flag_trapping_math
;
2339 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2344 /* An EXPR_LIST is used to represent a function call. This
2345 certainly may trap. */
2354 /* Some floating point comparisons may trap. */
2355 if (!flag_trapping_math
)
2357 /* ??? There is no machine independent way to check for tests that trap
2358 when COMPARE is used, though many targets do make this distinction.
2359 For instance, sparc uses CCFPE for compares which generate exceptions
2360 and CCFP for compares which do not generate exceptions. */
2361 if (HONOR_NANS (GET_MODE (x
)))
2363 /* But often the compare has some CC mode, so check operand
2365 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2366 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2372 if (HONOR_SNANS (GET_MODE (x
)))
2374 /* Often comparison is CC mode, so check operand modes. */
2375 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2376 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2381 /* Conversion of floating point might trap. */
2382 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2389 /* These operations don't trap even with floating point. */
2393 /* Any floating arithmetic may trap. */
2394 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
))
2395 && flag_trapping_math
)
2399 fmt
= GET_RTX_FORMAT (code
);
2400 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2404 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2407 else if (fmt
[i
] == 'E')
2410 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2411 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2418 /* Return nonzero if evaluating rtx X might cause a trap. */
2421 may_trap_p (const_rtx x
)
2423 return may_trap_p_1 (x
, 0);
2426 /* Same as above, but additionally return nonzero if evaluating rtx X might
2427 cause a fault. We define a fault for the purpose of this function as a
2428 erroneous execution condition that cannot be encountered during the normal
2429 execution of a valid program; the typical example is an unaligned memory
2430 access on a strict alignment machine. The compiler guarantees that it
2431 doesn't generate code that will fault from a valid program, but this
2432 guarantee doesn't mean anything for individual instructions. Consider
2433 the following example:
2435 struct S { int d; union { char *cp; int *ip; }; };
2437 int foo(struct S *s)
2445 on a strict alignment machine. In a valid program, foo will never be
2446 invoked on a structure for which d is equal to 1 and the underlying
2447 unique field of the union not aligned on a 4-byte boundary, but the
2448 expression *s->ip might cause a fault if considered individually.
2450 At the RTL level, potentially problematic expressions will almost always
2451 verify may_trap_p; for example, the above dereference can be emitted as
2452 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2453 However, suppose that foo is inlined in a caller that causes s->cp to
2454 point to a local character variable and guarantees that s->d is not set
2455 to 1; foo may have been effectively translated into pseudo-RTL as:
2458 (set (reg:SI) (mem:SI (%fp - 7)))
2460 (set (reg:QI) (mem:QI (%fp - 7)))
2462 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2463 memory reference to a stack slot, but it will certainly cause a fault
2464 on a strict alignment machine. */
2467 may_trap_or_fault_p (const_rtx x
)
2469 return may_trap_p_1 (x
, 1);
2472 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2473 i.e., an inequality. */
2476 inequality_comparisons_p (const_rtx x
)
2480 const enum rtx_code code
= GET_CODE (x
);
2508 len
= GET_RTX_LENGTH (code
);
2509 fmt
= GET_RTX_FORMAT (code
);
2511 for (i
= 0; i
< len
; i
++)
2515 if (inequality_comparisons_p (XEXP (x
, i
)))
2518 else if (fmt
[i
] == 'E')
2521 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2522 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2530 /* Replace any occurrence of FROM in X with TO. The function does
2531 not enter into CONST_DOUBLE for the replace.
2533 Note that copying is not done so X must not be shared unless all copies
2534 are to be modified. */
2537 replace_rtx (rtx x
, rtx from
, rtx to
)
2545 /* Allow this function to make replacements in EXPR_LISTs. */
2549 if (GET_CODE (x
) == SUBREG
)
2551 rtx new_rtx
= replace_rtx (SUBREG_REG (x
), from
, to
);
2553 if (CONST_INT_P (new_rtx
))
2555 x
= simplify_subreg (GET_MODE (x
), new_rtx
,
2556 GET_MODE (SUBREG_REG (x
)),
2561 SUBREG_REG (x
) = new_rtx
;
2565 else if (GET_CODE (x
) == ZERO_EXTEND
)
2567 rtx new_rtx
= replace_rtx (XEXP (x
, 0), from
, to
);
2569 if (CONST_INT_P (new_rtx
))
2571 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2572 new_rtx
, GET_MODE (XEXP (x
, 0)));
2576 XEXP (x
, 0) = new_rtx
;
2581 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2582 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2585 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2586 else if (fmt
[i
] == 'E')
2587 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2588 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2594 /* Replace occurrences of the old label in *X with the new one.
2595 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2598 replace_label (rtx
*x
, void *data
)
2601 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2602 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2603 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2608 if (GET_CODE (l
) == SYMBOL_REF
2609 && CONSTANT_POOL_ADDRESS_P (l
))
2611 rtx c
= get_pool_constant (l
);
2612 if (rtx_referenced_p (old_label
, c
))
2615 replace_label_data
*d
= (replace_label_data
*) data
;
2617 /* Create a copy of constant C; replace the label inside
2618 but do not update LABEL_NUSES because uses in constant pool
2620 new_c
= copy_rtx (c
);
2621 d
->update_label_nuses
= false;
2622 for_each_rtx (&new_c
, replace_label
, data
);
2623 d
->update_label_nuses
= update_label_nuses
;
2625 /* Add the new constant NEW_C to constant pool and replace
2626 the old reference to constant by new reference. */
2627 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2628 *x
= replace_rtx (l
, l
, new_l
);
2633 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2634 field. This is not handled by for_each_rtx because it doesn't
2635 handle unprinted ('0') fields. */
2636 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2637 JUMP_LABEL (l
) = new_label
;
2639 if ((GET_CODE (l
) == LABEL_REF
2640 || GET_CODE (l
) == INSN_LIST
)
2641 && XEXP (l
, 0) == old_label
)
2643 XEXP (l
, 0) = new_label
;
2644 if (update_label_nuses
)
2646 ++LABEL_NUSES (new_label
);
2647 --LABEL_NUSES (old_label
);
2655 /* When *BODY is equal to X or X is directly referenced by *BODY
2656 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2657 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2660 rtx_referenced_p_1 (rtx
*body
, void *x
)
2664 if (*body
== NULL_RTX
)
2665 return y
== NULL_RTX
;
2667 /* Return true if a label_ref *BODY refers to label Y. */
2668 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2669 return XEXP (*body
, 0) == y
;
2671 /* If *BODY is a reference to pool constant traverse the constant. */
2672 if (GET_CODE (*body
) == SYMBOL_REF
2673 && CONSTANT_POOL_ADDRESS_P (*body
))
2674 return rtx_referenced_p (y
, get_pool_constant (*body
));
2676 /* By default, compare the RTL expressions. */
2677 return rtx_equal_p (*body
, y
);
2680 /* Return true if X is referenced in BODY. */
2683 rtx_referenced_p (rtx x
, rtx body
)
2685 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2688 /* If INSN is a tablejump return true and store the label (before jump table) to
2689 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2692 tablejump_p (const_rtx insn
, rtx
*labelp
, rtx
*tablep
)
2699 label
= JUMP_LABEL (insn
);
2700 if (label
!= NULL_RTX
&& !ANY_RETURN_P (label
)
2701 && (table
= next_active_insn (label
)) != NULL_RTX
2702 && JUMP_TABLE_DATA_P (table
))
2713 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2714 constant that is not in the constant pool and not in the condition
2715 of an IF_THEN_ELSE. */
2718 computed_jump_p_1 (const_rtx x
)
2720 const enum rtx_code code
= GET_CODE (x
);
2737 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2738 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2741 return (computed_jump_p_1 (XEXP (x
, 1))
2742 || computed_jump_p_1 (XEXP (x
, 2)));
2748 fmt
= GET_RTX_FORMAT (code
);
2749 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2752 && computed_jump_p_1 (XEXP (x
, i
)))
2755 else if (fmt
[i
] == 'E')
2756 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2757 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2764 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2766 Tablejumps and casesi insns are not considered indirect jumps;
2767 we can recognize them by a (use (label_ref)). */
2770 computed_jump_p (const_rtx insn
)
2775 rtx pat
= PATTERN (insn
);
2777 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2778 if (JUMP_LABEL (insn
) != NULL
)
2781 if (GET_CODE (pat
) == PARALLEL
)
2783 int len
= XVECLEN (pat
, 0);
2784 int has_use_labelref
= 0;
2786 for (i
= len
- 1; i
>= 0; i
--)
2787 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2788 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2790 has_use_labelref
= 1;
2792 if (! has_use_labelref
)
2793 for (i
= len
- 1; i
>= 0; i
--)
2794 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2795 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2796 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2799 else if (GET_CODE (pat
) == SET
2800 && SET_DEST (pat
) == pc_rtx
2801 && computed_jump_p_1 (SET_SRC (pat
)))
2807 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2808 calls. Processes the subexpressions of EXP and passes them to F. */
2810 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2813 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2816 for (; format
[n
] != '\0'; n
++)
2823 result
= (*f
) (x
, data
);
2825 /* Do not traverse sub-expressions. */
2827 else if (result
!= 0)
2828 /* Stop the traversal. */
2832 /* There are no sub-expressions. */
2835 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2838 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2846 if (XVEC (exp
, n
) == 0)
2848 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2851 x
= &XVECEXP (exp
, n
, j
);
2852 result
= (*f
) (x
, data
);
2854 /* Do not traverse sub-expressions. */
2856 else if (result
!= 0)
2857 /* Stop the traversal. */
2861 /* There are no sub-expressions. */
2864 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2867 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2875 /* Nothing to do. */
2883 /* Traverse X via depth-first search, calling F for each
2884 sub-expression (including X itself). F is also passed the DATA.
2885 If F returns -1, do not traverse sub-expressions, but continue
2886 traversing the rest of the tree. If F ever returns any other
2887 nonzero value, stop the traversal, and return the value returned
2888 by F. Otherwise, return 0. This function does not traverse inside
2889 tree structure that contains RTX_EXPRs, or into sub-expressions
2890 whose format code is `0' since it is not known whether or not those
2891 codes are actually RTL.
2893 This routine is very general, and could (should?) be used to
2894 implement many of the other routines in this file. */
2897 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2903 result
= (*f
) (x
, data
);
2905 /* Do not traverse sub-expressions. */
2907 else if (result
!= 0)
2908 /* Stop the traversal. */
2912 /* There are no sub-expressions. */
2915 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2919 return for_each_rtx_1 (*x
, i
, f
, data
);
2924 /* Data structure that holds the internal state communicated between
2925 for_each_inc_dec, for_each_inc_dec_find_mem and
2926 for_each_inc_dec_find_inc_dec. */
2928 struct for_each_inc_dec_ops
{
2929 /* The function to be called for each autoinc operation found. */
2930 for_each_inc_dec_fn fn
;
2931 /* The opaque argument to be passed to it. */
2933 /* The MEM we're visiting, if any. */
2937 static int for_each_inc_dec_find_mem (rtx
*r
, void *d
);
2939 /* Find PRE/POST-INC/DEC/MODIFY operations within *R, extract the
2940 operands of the equivalent add insn and pass the result to the
2941 operator specified by *D. */
2944 for_each_inc_dec_find_inc_dec (rtx
*r
, void *d
)
2947 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*)d
;
2949 switch (GET_CODE (x
))
2954 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
2955 rtx r1
= XEXP (x
, 0);
2956 rtx c
= gen_int_mode (size
, GET_MODE (r1
));
2957 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
2963 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
2964 rtx r1
= XEXP (x
, 0);
2965 rtx c
= gen_int_mode (-size
, GET_MODE (r1
));
2966 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
2972 rtx r1
= XEXP (x
, 0);
2973 rtx add
= XEXP (x
, 1);
2974 return data
->fn (data
->mem
, x
, r1
, add
, NULL
, data
->arg
);
2979 rtx save
= data
->mem
;
2980 int ret
= for_each_inc_dec_find_mem (r
, d
);
2990 /* If *R is a MEM, find PRE/POST-INC/DEC/MODIFY operations within its
2991 address, extract the operands of the equivalent add insn and pass
2992 the result to the operator specified by *D. */
2995 for_each_inc_dec_find_mem (rtx
*r
, void *d
)
2998 if (x
!= NULL_RTX
&& MEM_P (x
))
3000 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*) d
;
3005 result
= for_each_rtx (&XEXP (x
, 0), for_each_inc_dec_find_inc_dec
,
3015 /* Traverse *X looking for MEMs, and for autoinc operations within
3016 them. For each such autoinc operation found, call FN, passing it
3017 the innermost enclosing MEM, the operation itself, the RTX modified
3018 by the operation, two RTXs (the second may be NULL) that, once
3019 added, represent the value to be held by the modified RTX
3020 afterwards, and ARG. FN is to return -1 to skip looking for other
3021 autoinc operations within the visited operation, 0 to continue the
3022 traversal, or any other value to have it returned to the caller of
3023 for_each_inc_dec. */
3026 for_each_inc_dec (rtx
*x
,
3027 for_each_inc_dec_fn fn
,
3030 struct for_each_inc_dec_ops data
;
3036 return for_each_rtx (x
, for_each_inc_dec_find_mem
, &data
);
3040 /* Searches X for any reference to REGNO, returning the rtx of the
3041 reference found if any. Otherwise, returns NULL_RTX. */
3044 regno_use_in (unsigned int regno
, rtx x
)
3050 if (REG_P (x
) && REGNO (x
) == regno
)
3053 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
3054 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
3058 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
3061 else if (fmt
[i
] == 'E')
3062 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3063 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
3070 /* Return a value indicating whether OP, an operand of a commutative
3071 operation, is preferred as the first or second operand. The higher
3072 the value, the stronger the preference for being the first operand.
3073 We use negative values to indicate a preference for the first operand
3074 and positive values for the second operand. */
3077 commutative_operand_precedence (rtx op
)
3079 enum rtx_code code
= GET_CODE (op
);
3081 /* Constants always come the second operand. Prefer "nice" constants. */
3082 if (code
== CONST_INT
)
3084 if (code
== CONST_DOUBLE
)
3086 if (code
== CONST_FIXED
)
3088 op
= avoid_constant_pool_reference (op
);
3089 code
= GET_CODE (op
);
3091 switch (GET_RTX_CLASS (code
))
3094 if (code
== CONST_INT
)
3096 if (code
== CONST_DOUBLE
)
3098 if (code
== CONST_FIXED
)
3103 /* SUBREGs of objects should come second. */
3104 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
3109 /* Complex expressions should be the first, so decrease priority
3110 of objects. Prefer pointer objects over non pointer objects. */
3111 if ((REG_P (op
) && REG_POINTER (op
))
3112 || (MEM_P (op
) && MEM_POINTER (op
)))
3116 case RTX_COMM_ARITH
:
3117 /* Prefer operands that are themselves commutative to be first.
3118 This helps to make things linear. In particular,
3119 (and (and (reg) (reg)) (not (reg))) is canonical. */
3123 /* If only one operand is a binary expression, it will be the first
3124 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
3125 is canonical, although it will usually be further simplified. */
3129 /* Then prefer NEG and NOT. */
3130 if (code
== NEG
|| code
== NOT
)
3138 /* Return 1 iff it is necessary to swap operands of commutative operation
3139 in order to canonicalize expression. */
3142 swap_commutative_operands_p (rtx x
, rtx y
)
3144 return (commutative_operand_precedence (x
)
3145 < commutative_operand_precedence (y
));
3148 /* Return 1 if X is an autoincrement side effect and the register is
3149 not the stack pointer. */
3151 auto_inc_p (const_rtx x
)
3153 switch (GET_CODE (x
))
3161 /* There are no REG_INC notes for SP. */
3162 if (XEXP (x
, 0) != stack_pointer_rtx
)
3170 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
3172 loc_mentioned_in_p (rtx
*loc
, const_rtx in
)
3181 code
= GET_CODE (in
);
3182 fmt
= GET_RTX_FORMAT (code
);
3183 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3187 if (loc
== &XEXP (in
, i
) || loc_mentioned_in_p (loc
, XEXP (in
, i
)))
3190 else if (fmt
[i
] == 'E')
3191 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
3192 if (loc
== &XVECEXP (in
, i
, j
)
3193 || loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
3199 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3200 and SUBREG_BYTE, return the bit offset where the subreg begins
3201 (counting from the least significant bit of the operand). */
3204 subreg_lsb_1 (enum machine_mode outer_mode
,
3205 enum machine_mode inner_mode
,
3206 unsigned int subreg_byte
)
3208 unsigned int bitpos
;
3212 /* A paradoxical subreg begins at bit position 0. */
3213 if (GET_MODE_PRECISION (outer_mode
) > GET_MODE_PRECISION (inner_mode
))
3216 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3217 /* If the subreg crosses a word boundary ensure that
3218 it also begins and ends on a word boundary. */
3219 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3220 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3221 && (subreg_byte
% UNITS_PER_WORD
3222 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3224 if (WORDS_BIG_ENDIAN
)
3225 word
= (GET_MODE_SIZE (inner_mode
)
3226 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3228 word
= subreg_byte
/ UNITS_PER_WORD
;
3229 bitpos
= word
* BITS_PER_WORD
;
3231 if (BYTES_BIG_ENDIAN
)
3232 byte
= (GET_MODE_SIZE (inner_mode
)
3233 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3235 byte
= subreg_byte
% UNITS_PER_WORD
;
3236 bitpos
+= byte
* BITS_PER_UNIT
;
3241 /* Given a subreg X, return the bit offset where the subreg begins
3242 (counting from the least significant bit of the reg). */
3245 subreg_lsb (const_rtx x
)
3247 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3251 /* Fill in information about a subreg of a hard register.
3252 xregno - A regno of an inner hard subreg_reg (or what will become one).
3253 xmode - The mode of xregno.
3254 offset - The byte offset.
3255 ymode - The mode of a top level SUBREG (or what may become one).
3256 info - Pointer to structure to fill in. */
3258 subreg_get_info (unsigned int xregno
, enum machine_mode xmode
,
3259 unsigned int offset
, enum machine_mode ymode
,
3260 struct subreg_info
*info
)
3262 int nregs_xmode
, nregs_ymode
;
3263 int mode_multiple
, nregs_multiple
;
3264 int offset_adj
, y_offset
, y_offset_adj
;
3265 int regsize_xmode
, regsize_ymode
;
3268 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3272 /* If there are holes in a non-scalar mode in registers, we expect
3273 that it is made up of its units concatenated together. */
3274 if (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
))
3276 enum machine_mode xmode_unit
;
3278 nregs_xmode
= HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode
);
3279 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3282 xmode_unit
= GET_MODE_INNER (xmode
);
3283 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode_unit
));
3284 gcc_assert (nregs_xmode
3285 == (GET_MODE_NUNITS (xmode
)
3286 * HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode_unit
)));
3287 gcc_assert (hard_regno_nregs
[xregno
][xmode
]
3288 == (hard_regno_nregs
[xregno
][xmode_unit
]
3289 * GET_MODE_NUNITS (xmode
)));
3291 /* You can only ask for a SUBREG of a value with holes in the middle
3292 if you don't cross the holes. (Such a SUBREG should be done by
3293 picking a different register class, or doing it in memory if
3294 necessary.) An example of a value with holes is XCmode on 32-bit
3295 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3296 3 for each part, but in memory it's two 128-bit parts.
3297 Padding is assumed to be at the end (not necessarily the 'high part')
3299 if ((offset
/ GET_MODE_SIZE (xmode_unit
) + 1
3300 < GET_MODE_NUNITS (xmode
))
3301 && (offset
/ GET_MODE_SIZE (xmode_unit
)
3302 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3303 / GET_MODE_SIZE (xmode_unit
))))
3305 info
->representable_p
= false;
3310 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3312 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3314 /* Paradoxical subregs are otherwise valid. */
3317 && GET_MODE_PRECISION (ymode
) > GET_MODE_PRECISION (xmode
))
3319 info
->representable_p
= true;
3320 /* If this is a big endian paradoxical subreg, which uses more
3321 actual hard registers than the original register, we must
3322 return a negative offset so that we find the proper highpart
3324 if (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3325 ? REG_WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
3326 info
->offset
= nregs_xmode
- nregs_ymode
;
3329 info
->nregs
= nregs_ymode
;
3333 /* If registers store different numbers of bits in the different
3334 modes, we cannot generally form this subreg. */
3335 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
)
3336 && !HARD_REGNO_NREGS_HAS_PADDING (xregno
, ymode
)
3337 && (GET_MODE_SIZE (xmode
) % nregs_xmode
) == 0
3338 && (GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0)
3340 regsize_xmode
= GET_MODE_SIZE (xmode
) / nregs_xmode
;
3341 regsize_ymode
= GET_MODE_SIZE (ymode
) / nregs_ymode
;
3342 if (!rknown
&& regsize_xmode
> regsize_ymode
&& nregs_ymode
> 1)
3344 info
->representable_p
= false;
3346 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3347 info
->offset
= offset
/ regsize_xmode
;
3350 if (!rknown
&& regsize_ymode
> regsize_xmode
&& nregs_xmode
> 1)
3352 info
->representable_p
= false;
3354 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3355 info
->offset
= offset
/ regsize_xmode
;
3360 /* Lowpart subregs are otherwise valid. */
3361 if (!rknown
&& offset
== subreg_lowpart_offset (ymode
, xmode
))
3363 info
->representable_p
= true;
3366 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3369 info
->nregs
= nregs_ymode
;
3374 /* This should always pass, otherwise we don't know how to verify
3375 the constraint. These conditions may be relaxed but
3376 subreg_regno_offset would need to be redesigned. */
3377 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3378 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3380 if (WORDS_BIG_ENDIAN
!= REG_WORDS_BIG_ENDIAN
3381 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
)
3383 HOST_WIDE_INT xsize
= GET_MODE_SIZE (xmode
);
3384 HOST_WIDE_INT ysize
= GET_MODE_SIZE (ymode
);
3385 HOST_WIDE_INT off_low
= offset
& (ysize
- 1);
3386 HOST_WIDE_INT off_high
= offset
& ~(ysize
- 1);
3387 offset
= (xsize
- ysize
- off_high
) | off_low
;
3389 /* The XMODE value can be seen as a vector of NREGS_XMODE
3390 values. The subreg must represent a lowpart of given field.
3391 Compute what field it is. */
3392 offset_adj
= offset
;
3393 offset_adj
-= subreg_lowpart_offset (ymode
,
3394 mode_for_size (GET_MODE_BITSIZE (xmode
)
3398 /* Size of ymode must not be greater than the size of xmode. */
3399 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3400 gcc_assert (mode_multiple
!= 0);
3402 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3403 y_offset_adj
= offset_adj
/ GET_MODE_SIZE (ymode
);
3404 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3406 gcc_assert ((offset_adj
% GET_MODE_SIZE (ymode
)) == 0);
3407 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3411 info
->representable_p
= (!(y_offset_adj
% (mode_multiple
/ nregs_multiple
)));
3414 info
->offset
= (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3415 info
->nregs
= nregs_ymode
;
3418 /* This function returns the regno offset of a subreg expression.
3419 xregno - A regno of an inner hard subreg_reg (or what will become one).
3420 xmode - The mode of xregno.
3421 offset - The byte offset.
3422 ymode - The mode of a top level SUBREG (or what may become one).
3423 RETURN - The regno offset which would be used. */
3425 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3426 unsigned int offset
, enum machine_mode ymode
)
3428 struct subreg_info info
;
3429 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3433 /* This function returns true when the offset is representable via
3434 subreg_offset in the given regno.
3435 xregno - A regno of an inner hard subreg_reg (or what will become one).
3436 xmode - The mode of xregno.
3437 offset - The byte offset.
3438 ymode - The mode of a top level SUBREG (or what may become one).
3439 RETURN - Whether the offset is representable. */
3441 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3442 unsigned int offset
, enum machine_mode ymode
)
3444 struct subreg_info info
;
3445 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3446 return info
.representable_p
;
3449 /* Return the number of a YMODE register to which
3451 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3453 can be simplified. Return -1 if the subreg can't be simplified.
3455 XREGNO is a hard register number. */
3458 simplify_subreg_regno (unsigned int xregno
, enum machine_mode xmode
,
3459 unsigned int offset
, enum machine_mode ymode
)
3461 struct subreg_info info
;
3462 unsigned int yregno
;
3464 #ifdef CANNOT_CHANGE_MODE_CLASS
3465 /* Give the backend a chance to disallow the mode change. */
3466 if (GET_MODE_CLASS (xmode
) != MODE_COMPLEX_INT
3467 && GET_MODE_CLASS (xmode
) != MODE_COMPLEX_FLOAT
3468 && REG_CANNOT_CHANGE_MODE_P (xregno
, xmode
, ymode
))
3472 /* We shouldn't simplify stack-related registers. */
3473 if ((!reload_completed
|| frame_pointer_needed
)
3474 && xregno
== FRAME_POINTER_REGNUM
)
3477 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
3478 && xregno
== ARG_POINTER_REGNUM
)
3481 if (xregno
== STACK_POINTER_REGNUM
)
3484 /* Try to get the register offset. */
3485 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3486 if (!info
.representable_p
)
3489 /* Make sure that the offsetted register value is in range. */
3490 yregno
= xregno
+ info
.offset
;
3491 if (!HARD_REGISTER_NUM_P (yregno
))
3494 /* See whether (reg:YMODE YREGNO) is valid.
3496 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3497 This is a kludge to work around how complex FP arguments are passed
3498 on IA-64 and should be fixed. See PR target/49226. */
3499 if (!HARD_REGNO_MODE_OK (yregno
, ymode
)
3500 && HARD_REGNO_MODE_OK (xregno
, xmode
))
3503 return (int) yregno
;
3506 /* Return the final regno that a subreg expression refers to. */
3508 subreg_regno (const_rtx x
)
3511 rtx subreg
= SUBREG_REG (x
);
3512 int regno
= REGNO (subreg
);
3514 ret
= regno
+ subreg_regno_offset (regno
,
3522 /* Return the number of registers that a subreg expression refers
3525 subreg_nregs (const_rtx x
)
3527 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x
)), x
);
3530 /* Return the number of registers that a subreg REG with REGNO
3531 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3532 changed so that the regno can be passed in. */
3535 subreg_nregs_with_regno (unsigned int regno
, const_rtx x
)
3537 struct subreg_info info
;
3538 rtx subreg
= SUBREG_REG (x
);
3540 subreg_get_info (regno
, GET_MODE (subreg
), SUBREG_BYTE (x
), GET_MODE (x
),
3546 struct parms_set_data
3552 /* Helper function for noticing stores to parameter registers. */
3554 parms_set (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
3556 struct parms_set_data
*const d
= (struct parms_set_data
*) data
;
3557 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3558 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3560 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3565 /* Look backward for first parameter to be loaded.
3566 Note that loads of all parameters will not necessarily be
3567 found if CSE has eliminated some of them (e.g., an argument
3568 to the outer function is passed down as a parameter).
3569 Do not skip BOUNDARY. */
3571 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3573 struct parms_set_data parm
;
3574 rtx p
, before
, first_set
;
3576 /* Since different machines initialize their parameter registers
3577 in different orders, assume nothing. Collect the set of all
3578 parameter registers. */
3579 CLEAR_HARD_REG_SET (parm
.regs
);
3581 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3582 if (GET_CODE (XEXP (p
, 0)) == USE
3583 && REG_P (XEXP (XEXP (p
, 0), 0)))
3585 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3587 /* We only care about registers which can hold function
3589 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3592 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3596 first_set
= call_insn
;
3598 /* Search backward for the first set of a register in this set. */
3599 while (parm
.nregs
&& before
!= boundary
)
3601 before
= PREV_INSN (before
);
3603 /* It is possible that some loads got CSEed from one call to
3604 another. Stop in that case. */
3605 if (CALL_P (before
))
3608 /* Our caller needs either ensure that we will find all sets
3609 (in case code has not been optimized yet), or take care
3610 for possible labels in a way by setting boundary to preceding
3612 if (LABEL_P (before
))
3614 gcc_assert (before
== boundary
);
3618 if (INSN_P (before
))
3620 int nregs_old
= parm
.nregs
;
3621 note_stores (PATTERN (before
), parms_set
, &parm
);
3622 /* If we found something that did not set a parameter reg,
3623 we're done. Do not keep going, as that might result
3624 in hoisting an insn before the setting of a pseudo
3625 that is used by the hoisted insn. */
3626 if (nregs_old
!= parm
.nregs
)
3635 /* Return true if we should avoid inserting code between INSN and preceding
3636 call instruction. */
3639 keep_with_call_p (const_rtx insn
)
3643 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3645 if (REG_P (SET_DEST (set
))
3646 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3647 && fixed_regs
[REGNO (SET_DEST (set
))]
3648 && general_operand (SET_SRC (set
), VOIDmode
))
3650 if (REG_P (SET_SRC (set
))
3651 && targetm
.calls
.function_value_regno_p (REGNO (SET_SRC (set
)))
3652 && REG_P (SET_DEST (set
))
3653 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3655 /* There may be a stack pop just after the call and before the store
3656 of the return register. Search for the actual store when deciding
3657 if we can break or not. */
3658 if (SET_DEST (set
) == stack_pointer_rtx
)
3660 /* This CONST_CAST is okay because next_nonnote_insn just
3661 returns its argument and we assign it to a const_rtx
3663 const_rtx i2
= next_nonnote_insn (CONST_CAST_RTX(insn
));
3664 if (i2
&& keep_with_call_p (i2
))
3671 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3672 to non-complex jumps. That is, direct unconditional, conditional,
3673 and tablejumps, but not computed jumps or returns. It also does
3674 not apply to the fallthru case of a conditional jump. */
3677 label_is_jump_target_p (const_rtx label
, const_rtx jump_insn
)
3679 rtx tmp
= JUMP_LABEL (jump_insn
);
3684 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3686 rtvec vec
= XVEC (PATTERN (tmp
),
3687 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3688 int i
, veclen
= GET_NUM_ELEM (vec
);
3690 for (i
= 0; i
< veclen
; ++i
)
3691 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3695 if (find_reg_note (jump_insn
, REG_LABEL_TARGET
, label
))
3702 /* Return an estimate of the cost of computing rtx X.
3703 One use is in cse, to decide which expression to keep in the hash table.
3704 Another is in rtl generation, to pick the cheapest way to multiply.
3705 Other uses like the latter are expected in the future.
3707 X appears as operand OPNO in an expression with code OUTER_CODE.
3708 SPEED specifies whether costs optimized for speed or size should
3712 rtx_cost (rtx x
, enum rtx_code outer_code
, int opno
, bool speed
)
3723 /* A size N times larger than UNITS_PER_WORD likely needs N times as
3724 many insns, taking N times as long. */
3725 factor
= GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
;
3729 /* Compute the default costs of certain things.
3730 Note that targetm.rtx_costs can override the defaults. */
3732 code
= GET_CODE (x
);
3736 /* Multiplication has time-complexity O(N*N), where N is the
3737 number of units (translated from digits) when using
3738 schoolbook long multiplication. */
3739 total
= factor
* factor
* COSTS_N_INSNS (5);
3745 /* Similarly, complexity for schoolbook long division. */
3746 total
= factor
* factor
* COSTS_N_INSNS (7);
3749 /* Used in combine.c as a marker. */
3753 /* A SET doesn't have a mode, so let's look at the SET_DEST to get
3754 the mode for the factor. */
3755 factor
= GET_MODE_SIZE (GET_MODE (SET_DEST (x
))) / UNITS_PER_WORD
;
3760 total
= factor
* COSTS_N_INSNS (1);
3770 /* If we can't tie these modes, make this expensive. The larger
3771 the mode, the more expensive it is. */
3772 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3773 return COSTS_N_INSNS (2 + factor
);
3777 if (targetm
.rtx_costs (x
, code
, outer_code
, opno
, &total
, speed
))
3782 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3783 which is already in total. */
3785 fmt
= GET_RTX_FORMAT (code
);
3786 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3788 total
+= rtx_cost (XEXP (x
, i
), code
, i
, speed
);
3789 else if (fmt
[i
] == 'E')
3790 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3791 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
, i
, speed
);
3796 /* Fill in the structure C with information about both speed and size rtx
3797 costs for X, which is operand OPNO in an expression with code OUTER. */
3800 get_full_rtx_cost (rtx x
, enum rtx_code outer
, int opno
,
3801 struct full_rtx_costs
*c
)
3803 c
->speed
= rtx_cost (x
, outer
, opno
, true);
3804 c
->size
= rtx_cost (x
, outer
, opno
, false);
3808 /* Return cost of address expression X.
3809 Expect that X is properly formed address reference.
3811 SPEED parameter specify whether costs optimized for speed or size should
3815 address_cost (rtx x
, enum machine_mode mode
, addr_space_t as
, bool speed
)
3817 /* We may be asked for cost of various unusual addresses, such as operands
3818 of push instruction. It is not worthwhile to complicate writing
3819 of the target hook by such cases. */
3821 if (!memory_address_addr_space_p (mode
, x
, as
))
3824 return targetm
.address_cost (x
, mode
, as
, speed
);
3827 /* If the target doesn't override, compute the cost as with arithmetic. */
3830 default_address_cost (rtx x
, enum machine_mode
, addr_space_t
, bool speed
)
3832 return rtx_cost (x
, MEM
, 0, speed
);
3836 unsigned HOST_WIDE_INT
3837 nonzero_bits (const_rtx x
, enum machine_mode mode
)
3839 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3843 num_sign_bit_copies (const_rtx x
, enum machine_mode mode
)
3845 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3848 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3849 It avoids exponential behavior in nonzero_bits1 when X has
3850 identical subexpressions on the first or the second level. */
3852 static unsigned HOST_WIDE_INT
3853 cached_nonzero_bits (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3854 enum machine_mode known_mode
,
3855 unsigned HOST_WIDE_INT known_ret
)
3857 if (x
== known_x
&& mode
== known_mode
)
3860 /* Try to find identical subexpressions. If found call
3861 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3862 precomputed value for the subexpression as KNOWN_RET. */
3864 if (ARITHMETIC_P (x
))
3866 rtx x0
= XEXP (x
, 0);
3867 rtx x1
= XEXP (x
, 1);
3869 /* Check the first level. */
3871 return nonzero_bits1 (x
, mode
, x0
, mode
,
3872 cached_nonzero_bits (x0
, mode
, known_x
,
3873 known_mode
, known_ret
));
3875 /* Check the second level. */
3876 if (ARITHMETIC_P (x0
)
3877 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3878 return nonzero_bits1 (x
, mode
, x1
, mode
,
3879 cached_nonzero_bits (x1
, mode
, known_x
,
3880 known_mode
, known_ret
));
3882 if (ARITHMETIC_P (x1
)
3883 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3884 return nonzero_bits1 (x
, mode
, x0
, mode
,
3885 cached_nonzero_bits (x0
, mode
, known_x
,
3886 known_mode
, known_ret
));
3889 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3892 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3893 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3894 is less useful. We can't allow both, because that results in exponential
3895 run time recursion. There is a nullstone testcase that triggered
3896 this. This macro avoids accidental uses of num_sign_bit_copies. */
3897 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3899 /* Given an expression, X, compute which bits in X can be nonzero.
3900 We don't care about bits outside of those defined in MODE.
3902 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3903 an arithmetic operation, we can do better. */
3905 static unsigned HOST_WIDE_INT
3906 nonzero_bits1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3907 enum machine_mode known_mode
,
3908 unsigned HOST_WIDE_INT known_ret
)
3910 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3911 unsigned HOST_WIDE_INT inner_nz
;
3913 enum machine_mode inner_mode
;
3914 unsigned int mode_width
= GET_MODE_PRECISION (mode
);
3916 /* For floating-point and vector values, assume all bits are needed. */
3917 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
)
3918 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
3921 /* If X is wider than MODE, use its mode instead. */
3922 if (GET_MODE_PRECISION (GET_MODE (x
)) > mode_width
)
3924 mode
= GET_MODE (x
);
3925 nonzero
= GET_MODE_MASK (mode
);
3926 mode_width
= GET_MODE_PRECISION (mode
);
3929 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3930 /* Our only callers in this case look for single bit values. So
3931 just return the mode mask. Those tests will then be false. */
3934 #ifndef WORD_REGISTER_OPERATIONS
3935 /* If MODE is wider than X, but both are a single word for both the host
3936 and target machines, we can compute this from which bits of the
3937 object might be nonzero in its own mode, taking into account the fact
3938 that on many CISC machines, accessing an object in a wider mode
3939 causes the high-order bits to become undefined. So they are
3940 not known to be zero. */
3942 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3943 && GET_MODE_PRECISION (GET_MODE (x
)) <= BITS_PER_WORD
3944 && GET_MODE_PRECISION (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3945 && GET_MODE_PRECISION (mode
) > GET_MODE_PRECISION (GET_MODE (x
)))
3947 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3948 known_x
, known_mode
, known_ret
);
3949 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3954 code
= GET_CODE (x
);
3958 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3959 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3960 all the bits above ptr_mode are known to be zero. */
3961 /* As we do not know which address space the pointer is referring to,
3962 we can do this only if the target does not support different pointer
3963 or address modes depending on the address space. */
3964 if (target_default_pointer_address_modes_p ()
3965 && POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
3967 nonzero
&= GET_MODE_MASK (ptr_mode
);
3970 /* Include declared information about alignment of pointers. */
3971 /* ??? We don't properly preserve REG_POINTER changes across
3972 pointer-to-integer casts, so we can't trust it except for
3973 things that we know must be pointers. See execute/960116-1.c. */
3974 if ((x
== stack_pointer_rtx
3975 || x
== frame_pointer_rtx
3976 || x
== arg_pointer_rtx
)
3977 && REGNO_POINTER_ALIGN (REGNO (x
)))
3979 unsigned HOST_WIDE_INT alignment
3980 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
3982 #ifdef PUSH_ROUNDING
3983 /* If PUSH_ROUNDING is defined, it is possible for the
3984 stack to be momentarily aligned only to that amount,
3985 so we pick the least alignment. */
3986 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
3987 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
3991 nonzero
&= ~(alignment
- 1);
3995 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
3996 rtx new_rtx
= rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
3997 known_mode
, known_ret
,
4001 nonzero_for_hook
&= cached_nonzero_bits (new_rtx
, mode
, known_x
,
4002 known_mode
, known_ret
);
4004 return nonzero_for_hook
;
4008 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
4009 /* If X is negative in MODE, sign-extend the value. */
4011 && mode_width
< BITS_PER_WORD
4012 && (UINTVAL (x
) & ((unsigned HOST_WIDE_INT
) 1 << (mode_width
- 1)))
4014 return UINTVAL (x
) | ((unsigned HOST_WIDE_INT
) (-1) << mode_width
);
4020 #ifdef LOAD_EXTEND_OP
4021 /* In many, if not most, RISC machines, reading a byte from memory
4022 zeros the rest of the register. Noticing that fact saves a lot
4023 of extra zero-extends. */
4024 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
4025 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
4030 case UNEQ
: case LTGT
:
4031 case GT
: case GTU
: case UNGT
:
4032 case LT
: case LTU
: case UNLT
:
4033 case GE
: case GEU
: case UNGE
:
4034 case LE
: case LEU
: case UNLE
:
4035 case UNORDERED
: case ORDERED
:
4036 /* If this produces an integer result, we know which bits are set.
4037 Code here used to clear bits outside the mode of X, but that is
4039 /* Mind that MODE is the mode the caller wants to look at this
4040 operation in, and not the actual operation mode. We can wind
4041 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
4042 that describes the results of a vector compare. */
4043 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
4044 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
4045 nonzero
= STORE_FLAG_VALUE
;
4050 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4051 and num_sign_bit_copies. */
4052 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4053 == GET_MODE_PRECISION (GET_MODE (x
)))
4057 if (GET_MODE_PRECISION (GET_MODE (x
)) < mode_width
)
4058 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
4063 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4064 and num_sign_bit_copies. */
4065 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4066 == GET_MODE_PRECISION (GET_MODE (x
)))
4072 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
4073 known_x
, known_mode
, known_ret
)
4074 & GET_MODE_MASK (mode
));
4078 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4079 known_x
, known_mode
, known_ret
);
4080 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4081 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4085 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
4086 Otherwise, show all the bits in the outer mode but not the inner
4088 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
4089 known_x
, known_mode
, known_ret
);
4090 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4092 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4093 if (val_signbit_known_set_p (GET_MODE (XEXP (x
, 0)), inner_nz
))
4094 inner_nz
|= (GET_MODE_MASK (mode
)
4095 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
4098 nonzero
&= inner_nz
;
4102 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4103 known_x
, known_mode
, known_ret
)
4104 & cached_nonzero_bits (XEXP (x
, 1), mode
,
4105 known_x
, known_mode
, known_ret
);
4109 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
4111 unsigned HOST_WIDE_INT nonzero0
4112 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4113 known_x
, known_mode
, known_ret
);
4115 /* Don't call nonzero_bits for the second time if it cannot change
4117 if ((nonzero
& nonzero0
) != nonzero
)
4119 | cached_nonzero_bits (XEXP (x
, 1), mode
,
4120 known_x
, known_mode
, known_ret
);
4124 case PLUS
: case MINUS
:
4126 case DIV
: case UDIV
:
4127 case MOD
: case UMOD
:
4128 /* We can apply the rules of arithmetic to compute the number of
4129 high- and low-order zero bits of these operations. We start by
4130 computing the width (position of the highest-order nonzero bit)
4131 and the number of low-order zero bits for each value. */
4133 unsigned HOST_WIDE_INT nz0
4134 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4135 known_x
, known_mode
, known_ret
);
4136 unsigned HOST_WIDE_INT nz1
4137 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4138 known_x
, known_mode
, known_ret
);
4139 int sign_index
= GET_MODE_PRECISION (GET_MODE (x
)) - 1;
4140 int width0
= floor_log2 (nz0
) + 1;
4141 int width1
= floor_log2 (nz1
) + 1;
4142 int low0
= floor_log2 (nz0
& -nz0
);
4143 int low1
= floor_log2 (nz1
& -nz1
);
4144 unsigned HOST_WIDE_INT op0_maybe_minusp
4145 = nz0
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4146 unsigned HOST_WIDE_INT op1_maybe_minusp
4147 = nz1
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4148 unsigned int result_width
= mode_width
;
4154 result_width
= MAX (width0
, width1
) + 1;
4155 result_low
= MIN (low0
, low1
);
4158 result_low
= MIN (low0
, low1
);
4161 result_width
= width0
+ width1
;
4162 result_low
= low0
+ low1
;
4167 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4168 result_width
= width0
;
4173 result_width
= width0
;
4178 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4179 result_width
= MIN (width0
, width1
);
4180 result_low
= MIN (low0
, low1
);
4185 result_width
= MIN (width0
, width1
);
4186 result_low
= MIN (low0
, low1
);
4192 if (result_width
< mode_width
)
4193 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << result_width
) - 1;
4196 nonzero
&= ~(((unsigned HOST_WIDE_INT
) 1 << result_low
) - 1);
4201 if (CONST_INT_P (XEXP (x
, 1))
4202 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
4203 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
4207 /* If this is a SUBREG formed for a promoted variable that has
4208 been zero-extended, we know that at least the high-order bits
4209 are zero, though others might be too. */
4211 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
4212 nonzero
= GET_MODE_MASK (GET_MODE (x
))
4213 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
4214 known_x
, known_mode
, known_ret
);
4216 inner_mode
= GET_MODE (SUBREG_REG (x
));
4217 /* If the inner mode is a single word for both the host and target
4218 machines, we can compute this from which bits of the inner
4219 object might be nonzero. */
4220 if (GET_MODE_PRECISION (inner_mode
) <= BITS_PER_WORD
4221 && (GET_MODE_PRECISION (inner_mode
) <= HOST_BITS_PER_WIDE_INT
))
4223 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
4224 known_x
, known_mode
, known_ret
);
4226 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4227 /* If this is a typical RISC machine, we only have to worry
4228 about the way loads are extended. */
4229 if ((LOAD_EXTEND_OP (inner_mode
) == SIGN_EXTEND
4230 ? val_signbit_known_set_p (inner_mode
, nonzero
)
4231 : LOAD_EXTEND_OP (inner_mode
) != ZERO_EXTEND
)
4232 || !MEM_P (SUBREG_REG (x
)))
4235 /* On many CISC machines, accessing an object in a wider mode
4236 causes the high-order bits to become undefined. So they are
4237 not known to be zero. */
4238 if (GET_MODE_PRECISION (GET_MODE (x
))
4239 > GET_MODE_PRECISION (inner_mode
))
4240 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
4241 & ~GET_MODE_MASK (inner_mode
));
4250 /* The nonzero bits are in two classes: any bits within MODE
4251 that aren't in GET_MODE (x) are always significant. The rest of the
4252 nonzero bits are those that are significant in the operand of
4253 the shift when shifted the appropriate number of bits. This
4254 shows that high-order bits are cleared by the right shift and
4255 low-order bits by left shifts. */
4256 if (CONST_INT_P (XEXP (x
, 1))
4257 && INTVAL (XEXP (x
, 1)) >= 0
4258 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
4259 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4261 enum machine_mode inner_mode
= GET_MODE (x
);
4262 unsigned int width
= GET_MODE_PRECISION (inner_mode
);
4263 int count
= INTVAL (XEXP (x
, 1));
4264 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
4265 unsigned HOST_WIDE_INT op_nonzero
4266 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4267 known_x
, known_mode
, known_ret
);
4268 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
4269 unsigned HOST_WIDE_INT outer
= 0;
4271 if (mode_width
> width
)
4272 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
4274 if (code
== LSHIFTRT
)
4276 else if (code
== ASHIFTRT
)
4280 /* If the sign bit may have been nonzero before the shift, we
4281 need to mark all the places it could have been copied to
4282 by the shift as possibly nonzero. */
4283 if (inner
& ((unsigned HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
4284 inner
|= (((unsigned HOST_WIDE_INT
) 1 << count
) - 1)
4287 else if (code
== ASHIFT
)
4290 inner
= ((inner
<< (count
% width
)
4291 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
4293 nonzero
&= (outer
| inner
);
4299 /* This is at most the number of bits in the mode. */
4300 nonzero
= ((unsigned HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
4304 /* If CLZ has a known value at zero, then the nonzero bits are
4305 that value, plus the number of bits in the mode minus one. */
4306 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4308 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4314 /* If CTZ has a known value at zero, then the nonzero bits are
4315 that value, plus the number of bits in the mode minus one. */
4316 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4318 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4324 /* This is at most the number of bits in the mode minus 1. */
4325 nonzero
= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4334 unsigned HOST_WIDE_INT nonzero_true
4335 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4336 known_x
, known_mode
, known_ret
);
4338 /* Don't call nonzero_bits for the second time if it cannot change
4340 if ((nonzero
& nonzero_true
) != nonzero
)
4341 nonzero
&= nonzero_true
4342 | cached_nonzero_bits (XEXP (x
, 2), mode
,
4343 known_x
, known_mode
, known_ret
);
4354 /* See the macro definition above. */
4355 #undef cached_num_sign_bit_copies
4358 /* The function cached_num_sign_bit_copies is a wrapper around
4359 num_sign_bit_copies1. It avoids exponential behavior in
4360 num_sign_bit_copies1 when X has identical subexpressions on the
4361 first or the second level. */
4364 cached_num_sign_bit_copies (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4365 enum machine_mode known_mode
,
4366 unsigned int known_ret
)
4368 if (x
== known_x
&& mode
== known_mode
)
4371 /* Try to find identical subexpressions. If found call
4372 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4373 the precomputed value for the subexpression as KNOWN_RET. */
4375 if (ARITHMETIC_P (x
))
4377 rtx x0
= XEXP (x
, 0);
4378 rtx x1
= XEXP (x
, 1);
4380 /* Check the first level. */
4383 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4384 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4388 /* Check the second level. */
4389 if (ARITHMETIC_P (x0
)
4390 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4392 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4393 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4397 if (ARITHMETIC_P (x1
)
4398 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4400 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4401 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4406 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4409 /* Return the number of bits at the high-order end of X that are known to
4410 be equal to the sign bit. X will be used in mode MODE; if MODE is
4411 VOIDmode, X will be used in its own mode. The returned value will always
4412 be between 1 and the number of bits in MODE. */
4415 num_sign_bit_copies1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4416 enum machine_mode known_mode
,
4417 unsigned int known_ret
)
4419 enum rtx_code code
= GET_CODE (x
);
4420 unsigned int bitwidth
= GET_MODE_PRECISION (mode
);
4421 int num0
, num1
, result
;
4422 unsigned HOST_WIDE_INT nonzero
;
4424 /* If we weren't given a mode, use the mode of X. If the mode is still
4425 VOIDmode, we don't know anything. Likewise if one of the modes is
4428 if (mode
== VOIDmode
)
4429 mode
= GET_MODE (x
);
4431 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
))
4432 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
4435 /* For a smaller object, just ignore the high bits. */
4436 if (bitwidth
< GET_MODE_PRECISION (GET_MODE (x
)))
4438 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4439 known_x
, known_mode
, known_ret
);
4441 num0
- (int) (GET_MODE_PRECISION (GET_MODE (x
)) - bitwidth
));
4444 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_PRECISION (GET_MODE (x
)))
4446 #ifndef WORD_REGISTER_OPERATIONS
4447 /* If this machine does not do all register operations on the entire
4448 register and MODE is wider than the mode of X, we can say nothing
4449 at all about the high-order bits. */
4452 /* Likewise on machines that do, if the mode of the object is smaller
4453 than a word and loads of that size don't sign extend, we can say
4454 nothing about the high order bits. */
4455 if (GET_MODE_PRECISION (GET_MODE (x
)) < BITS_PER_WORD
4456 #ifdef LOAD_EXTEND_OP
4457 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4468 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4469 /* If pointers extend signed and this is a pointer in Pmode, say that
4470 all the bits above ptr_mode are known to be sign bit copies. */
4471 /* As we do not know which address space the pointer is referring to,
4472 we can do this only if the target does not support different pointer
4473 or address modes depending on the address space. */
4474 if (target_default_pointer_address_modes_p ()
4475 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4476 && mode
== Pmode
&& REG_POINTER (x
))
4477 return GET_MODE_PRECISION (Pmode
) - GET_MODE_PRECISION (ptr_mode
) + 1;
4481 unsigned int copies_for_hook
= 1, copies
= 1;
4482 rtx new_rtx
= rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4483 known_mode
, known_ret
,
4487 copies
= cached_num_sign_bit_copies (new_rtx
, mode
, known_x
,
4488 known_mode
, known_ret
);
4490 if (copies
> 1 || copies_for_hook
> 1)
4491 return MAX (copies
, copies_for_hook
);
4493 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4498 #ifdef LOAD_EXTEND_OP
4499 /* Some RISC machines sign-extend all loads of smaller than a word. */
4500 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4501 return MAX (1, ((int) bitwidth
4502 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1));
4507 /* If the constant is negative, take its 1's complement and remask.
4508 Then see how many zero bits we have. */
4509 nonzero
= UINTVAL (x
) & GET_MODE_MASK (mode
);
4510 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4511 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4512 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4514 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4517 /* If this is a SUBREG for a promoted object that is sign-extended
4518 and we are looking at it in a wider mode, we know that at least the
4519 high-order bits are known to be sign bit copies. */
4521 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4523 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4524 known_x
, known_mode
, known_ret
);
4525 return MAX ((int) bitwidth
4526 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1,
4530 /* For a smaller object, just ignore the high bits. */
4531 if (bitwidth
<= GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))))
4533 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4534 known_x
, known_mode
, known_ret
);
4535 return MAX (1, (num0
4536 - (int) (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
)))
4540 #ifdef WORD_REGISTER_OPERATIONS
4541 #ifdef LOAD_EXTEND_OP
4542 /* For paradoxical SUBREGs on machines where all register operations
4543 affect the entire register, just look inside. Note that we are
4544 passing MODE to the recursive call, so the number of sign bit copies
4545 will remain relative to that mode, not the inner mode. */
4547 /* This works only if loads sign extend. Otherwise, if we get a
4548 reload for the inner part, it may be loaded from the stack, and
4549 then we lose all sign bit copies that existed before the store
4552 if (paradoxical_subreg_p (x
)
4553 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4554 && MEM_P (SUBREG_REG (x
)))
4555 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4556 known_x
, known_mode
, known_ret
);
4562 if (CONST_INT_P (XEXP (x
, 1)))
4563 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4567 return (bitwidth
- GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4568 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4569 known_x
, known_mode
, known_ret
));
4572 /* For a smaller object, just ignore the high bits. */
4573 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4574 known_x
, known_mode
, known_ret
);
4575 return MAX (1, (num0
- (int) (GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4579 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4580 known_x
, known_mode
, known_ret
);
4582 case ROTATE
: case ROTATERT
:
4583 /* If we are rotating left by a number of bits less than the number
4584 of sign bit copies, we can just subtract that amount from the
4586 if (CONST_INT_P (XEXP (x
, 1))
4587 && INTVAL (XEXP (x
, 1)) >= 0
4588 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4590 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4591 known_x
, known_mode
, known_ret
);
4592 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4593 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4598 /* In general, this subtracts one sign bit copy. But if the value
4599 is known to be positive, the number of sign bit copies is the
4600 same as that of the input. Finally, if the input has just one bit
4601 that might be nonzero, all the bits are copies of the sign bit. */
4602 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4603 known_x
, known_mode
, known_ret
);
4604 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4605 return num0
> 1 ? num0
- 1 : 1;
4607 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4612 && (((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4617 case IOR
: case AND
: case XOR
:
4618 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4619 /* Logical operations will preserve the number of sign-bit copies.
4620 MIN and MAX operations always return one of the operands. */
4621 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4622 known_x
, known_mode
, known_ret
);
4623 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4624 known_x
, known_mode
, known_ret
);
4626 /* If num1 is clearing some of the top bits then regardless of
4627 the other term, we are guaranteed to have at least that many
4628 high-order zero bits. */
4631 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4632 && CONST_INT_P (XEXP (x
, 1))
4633 && (UINTVAL (XEXP (x
, 1))
4634 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) == 0)
4637 /* Similarly for IOR when setting high-order bits. */
4640 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4641 && CONST_INT_P (XEXP (x
, 1))
4642 && (UINTVAL (XEXP (x
, 1))
4643 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4646 return MIN (num0
, num1
);
4648 case PLUS
: case MINUS
:
4649 /* For addition and subtraction, we can have a 1-bit carry. However,
4650 if we are subtracting 1 from a positive number, there will not
4651 be such a carry. Furthermore, if the positive number is known to
4652 be 0 or 1, we know the result is either -1 or 0. */
4654 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4655 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4657 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4658 if ((((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4659 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4660 : bitwidth
- floor_log2 (nonzero
) - 1);
4663 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4664 known_x
, known_mode
, known_ret
);
4665 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4666 known_x
, known_mode
, known_ret
);
4667 result
= MAX (1, MIN (num0
, num1
) - 1);
4672 /* The number of bits of the product is the sum of the number of
4673 bits of both terms. However, unless one of the terms if known
4674 to be positive, we must allow for an additional bit since negating
4675 a negative number can remove one sign bit copy. */
4677 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4678 known_x
, known_mode
, known_ret
);
4679 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4680 known_x
, known_mode
, known_ret
);
4682 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4684 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4685 || (((nonzero_bits (XEXP (x
, 0), mode
)
4686 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4687 && ((nonzero_bits (XEXP (x
, 1), mode
)
4688 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)))
4692 return MAX (1, result
);
4695 /* The result must be <= the first operand. If the first operand
4696 has the high bit set, we know nothing about the number of sign
4698 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4700 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4701 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4704 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4705 known_x
, known_mode
, known_ret
);
4708 /* The result must be <= the second operand. If the second operand
4709 has (or just might have) the high bit set, we know nothing about
4710 the number of sign bit copies. */
4711 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4713 else if ((nonzero_bits (XEXP (x
, 1), mode
)
4714 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4717 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4718 known_x
, known_mode
, known_ret
);
4721 /* Similar to unsigned division, except that we have to worry about
4722 the case where the divisor is negative, in which case we have
4724 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4725 known_x
, known_mode
, known_ret
);
4727 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4728 || (nonzero_bits (XEXP (x
, 1), mode
)
4729 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4735 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4736 known_x
, known_mode
, known_ret
);
4738 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4739 || (nonzero_bits (XEXP (x
, 1), mode
)
4740 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4746 /* Shifts by a constant add to the number of bits equal to the
4748 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4749 known_x
, known_mode
, known_ret
);
4750 if (CONST_INT_P (XEXP (x
, 1))
4751 && INTVAL (XEXP (x
, 1)) > 0
4752 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4753 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4758 /* Left shifts destroy copies. */
4759 if (!CONST_INT_P (XEXP (x
, 1))
4760 || INTVAL (XEXP (x
, 1)) < 0
4761 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
4762 || INTVAL (XEXP (x
, 1)) >= GET_MODE_PRECISION (GET_MODE (x
)))
4765 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4766 known_x
, known_mode
, known_ret
);
4767 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4770 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4771 known_x
, known_mode
, known_ret
);
4772 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4773 known_x
, known_mode
, known_ret
);
4774 return MIN (num0
, num1
);
4776 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4777 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4778 case GEU
: case GTU
: case LEU
: case LTU
:
4779 case UNORDERED
: case ORDERED
:
4780 /* If the constant is negative, take its 1's complement and remask.
4781 Then see how many zero bits we have. */
4782 nonzero
= STORE_FLAG_VALUE
;
4783 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4784 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4785 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4787 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4793 /* If we haven't been able to figure it out by one of the above rules,
4794 see if some of the high-order bits are known to be zero. If so,
4795 count those bits and return one less than that amount. If we can't
4796 safely compute the mask for this mode, always return BITWIDTH. */
4798 bitwidth
= GET_MODE_PRECISION (mode
);
4799 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4802 nonzero
= nonzero_bits (x
, mode
);
4803 return nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4804 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4807 /* Calculate the rtx_cost of a single instruction. A return value of
4808 zero indicates an instruction pattern without a known cost. */
4811 insn_rtx_cost (rtx pat
, bool speed
)
4816 /* Extract the single set rtx from the instruction pattern.
4817 We can't use single_set since we only have the pattern. */
4818 if (GET_CODE (pat
) == SET
)
4820 else if (GET_CODE (pat
) == PARALLEL
)
4823 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4825 rtx x
= XVECEXP (pat
, 0, i
);
4826 if (GET_CODE (x
) == SET
)
4839 cost
= set_src_cost (SET_SRC (set
), speed
);
4840 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4843 /* Given an insn INSN and condition COND, return the condition in a
4844 canonical form to simplify testing by callers. Specifically:
4846 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4847 (2) Both operands will be machine operands; (cc0) will have been replaced.
4848 (3) If an operand is a constant, it will be the second operand.
4849 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4850 for GE, GEU, and LEU.
4852 If the condition cannot be understood, or is an inequality floating-point
4853 comparison which needs to be reversed, 0 will be returned.
4855 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4857 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4858 insn used in locating the condition was found. If a replacement test
4859 of the condition is desired, it should be placed in front of that
4860 insn and we will be sure that the inputs are still valid.
4862 If WANT_REG is nonzero, we wish the condition to be relative to that
4863 register, if possible. Therefore, do not canonicalize the condition
4864 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4865 to be a compare to a CC mode register.
4867 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4871 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4872 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4879 int reverse_code
= 0;
4880 enum machine_mode mode
;
4881 basic_block bb
= BLOCK_FOR_INSN (insn
);
4883 code
= GET_CODE (cond
);
4884 mode
= GET_MODE (cond
);
4885 op0
= XEXP (cond
, 0);
4886 op1
= XEXP (cond
, 1);
4889 code
= reversed_comparison_code (cond
, insn
);
4890 if (code
== UNKNOWN
)
4896 /* If we are comparing a register with zero, see if the register is set
4897 in the previous insn to a COMPARE or a comparison operation. Perform
4898 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4901 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4902 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4903 && op1
== CONST0_RTX (GET_MODE (op0
))
4906 /* Set nonzero when we find something of interest. */
4910 /* If comparison with cc0, import actual comparison from compare
4914 if ((prev
= prev_nonnote_insn (prev
)) == 0
4915 || !NONJUMP_INSN_P (prev
)
4916 || (set
= single_set (prev
)) == 0
4917 || SET_DEST (set
) != cc0_rtx
)
4920 op0
= SET_SRC (set
);
4921 op1
= CONST0_RTX (GET_MODE (op0
));
4927 /* If this is a COMPARE, pick up the two things being compared. */
4928 if (GET_CODE (op0
) == COMPARE
)
4930 op1
= XEXP (op0
, 1);
4931 op0
= XEXP (op0
, 0);
4934 else if (!REG_P (op0
))
4937 /* Go back to the previous insn. Stop if it is not an INSN. We also
4938 stop if it isn't a single set or if it has a REG_INC note because
4939 we don't want to bother dealing with it. */
4941 prev
= prev_nonnote_nondebug_insn (prev
);
4944 || !NONJUMP_INSN_P (prev
)
4945 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4946 /* In cfglayout mode, there do not have to be labels at the
4947 beginning of a block, or jumps at the end, so the previous
4948 conditions would not stop us when we reach bb boundary. */
4949 || BLOCK_FOR_INSN (prev
) != bb
)
4952 set
= set_of (op0
, prev
);
4955 && (GET_CODE (set
) != SET
4956 || !rtx_equal_p (SET_DEST (set
), op0
)))
4959 /* If this is setting OP0, get what it sets it to if it looks
4963 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
4964 #ifdef FLOAT_STORE_FLAG_VALUE
4965 REAL_VALUE_TYPE fsfv
;
4968 /* ??? We may not combine comparisons done in a CCmode with
4969 comparisons not done in a CCmode. This is to aid targets
4970 like Alpha that have an IEEE compliant EQ instruction, and
4971 a non-IEEE compliant BEQ instruction. The use of CCmode is
4972 actually artificial, simply to prevent the combination, but
4973 should not affect other platforms.
4975 However, we must allow VOIDmode comparisons to match either
4976 CCmode or non-CCmode comparison, because some ports have
4977 modeless comparisons inside branch patterns.
4979 ??? This mode check should perhaps look more like the mode check
4980 in simplify_comparison in combine. */
4982 if ((GET_CODE (SET_SRC (set
)) == COMPARE
4985 && val_signbit_known_set_p (inner_mode
,
4987 #ifdef FLOAT_STORE_FLAG_VALUE
4989 && SCALAR_FLOAT_MODE_P (inner_mode
)
4990 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4991 REAL_VALUE_NEGATIVE (fsfv
)))
4994 && COMPARISON_P (SET_SRC (set
))))
4995 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4996 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4997 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4999 else if (((code
== EQ
5001 && val_signbit_known_set_p (inner_mode
,
5003 #ifdef FLOAT_STORE_FLAG_VALUE
5005 && SCALAR_FLOAT_MODE_P (inner_mode
)
5006 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5007 REAL_VALUE_NEGATIVE (fsfv
)))
5010 && COMPARISON_P (SET_SRC (set
))
5011 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5012 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5013 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5023 else if (reg_set_p (op0
, prev
))
5024 /* If this sets OP0, but not directly, we have to give up. */
5029 /* If the caller is expecting the condition to be valid at INSN,
5030 make sure X doesn't change before INSN. */
5031 if (valid_at_insn_p
)
5032 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
5034 if (COMPARISON_P (x
))
5035 code
= GET_CODE (x
);
5038 code
= reversed_comparison_code (x
, prev
);
5039 if (code
== UNKNOWN
)
5044 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
5050 /* If constant is first, put it last. */
5051 if (CONSTANT_P (op0
))
5052 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
5054 /* If OP0 is the result of a comparison, we weren't able to find what
5055 was really being compared, so fail. */
5057 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
5060 /* Canonicalize any ordered comparison with integers involving equality
5061 if we can do computations in the relevant mode and we do not
5064 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
5065 && CONST_INT_P (op1
)
5066 && GET_MODE (op0
) != VOIDmode
5067 && GET_MODE_PRECISION (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
5069 HOST_WIDE_INT const_val
= INTVAL (op1
);
5070 unsigned HOST_WIDE_INT uconst_val
= const_val
;
5071 unsigned HOST_WIDE_INT max_val
5072 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
5077 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
5078 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
5081 /* When cross-compiling, const_val might be sign-extended from
5082 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
5084 if ((const_val
& max_val
)
5085 != ((unsigned HOST_WIDE_INT
) 1
5086 << (GET_MODE_PRECISION (GET_MODE (op0
)) - 1)))
5087 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
5091 if (uconst_val
< max_val
)
5092 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
5096 if (uconst_val
!= 0)
5097 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
5105 /* Never return CC0; return zero instead. */
5109 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
5112 /* Given a jump insn JUMP, return the condition that will cause it to branch
5113 to its JUMP_LABEL. If the condition cannot be understood, or is an
5114 inequality floating-point comparison which needs to be reversed, 0 will
5117 If EARLIEST is nonzero, it is a pointer to a place where the earliest
5118 insn used in locating the condition was found. If a replacement test
5119 of the condition is desired, it should be placed in front of that
5120 insn and we will be sure that the inputs are still valid. If EARLIEST
5121 is null, the returned condition will be valid at INSN.
5123 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
5124 compare CC mode register.
5126 VALID_AT_INSN_P is the same as for canonicalize_condition. */
5129 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
5135 /* If this is not a standard conditional jump, we can't parse it. */
5137 || ! any_condjump_p (jump
))
5139 set
= pc_set (jump
);
5141 cond
= XEXP (SET_SRC (set
), 0);
5143 /* If this branches to JUMP_LABEL when the condition is false, reverse
5146 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
5147 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
5149 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
5150 allow_cc_mode
, valid_at_insn_p
);
5153 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
5154 TARGET_MODE_REP_EXTENDED.
5156 Note that we assume that the property of
5157 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
5158 narrower than mode B. I.e., if A is a mode narrower than B then in
5159 order to be able to operate on it in mode B, mode A needs to
5160 satisfy the requirements set by the representation of mode B. */
5163 init_num_sign_bit_copies_in_rep (void)
5165 enum machine_mode mode
, in_mode
;
5167 for (in_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); in_mode
!= VOIDmode
;
5168 in_mode
= GET_MODE_WIDER_MODE (mode
))
5169 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= in_mode
;
5170 mode
= GET_MODE_WIDER_MODE (mode
))
5172 enum machine_mode i
;
5174 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
5175 extends to the next widest mode. */
5176 gcc_assert (targetm
.mode_rep_extended (mode
, in_mode
) == UNKNOWN
5177 || GET_MODE_WIDER_MODE (mode
) == in_mode
);
5179 /* We are in in_mode. Count how many bits outside of mode
5180 have to be copies of the sign-bit. */
5181 for (i
= mode
; i
!= in_mode
; i
= GET_MODE_WIDER_MODE (i
))
5183 enum machine_mode wider
= GET_MODE_WIDER_MODE (i
);
5185 if (targetm
.mode_rep_extended (i
, wider
) == SIGN_EXTEND
5186 /* We can only check sign-bit copies starting from the
5187 top-bit. In order to be able to check the bits we
5188 have already seen we pretend that subsequent bits
5189 have to be sign-bit copies too. */
5190 || num_sign_bit_copies_in_rep
[in_mode
][mode
])
5191 num_sign_bit_copies_in_rep
[in_mode
][mode
]
5192 += GET_MODE_PRECISION (wider
) - GET_MODE_PRECISION (i
);
5197 /* Suppose that truncation from the machine mode of X to MODE is not a
5198 no-op. See if there is anything special about X so that we can
5199 assume it already contains a truncated value of MODE. */
5202 truncated_to_mode (enum machine_mode mode
, const_rtx x
)
5204 /* This register has already been used in MODE without explicit
5206 if (REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
))
5209 /* See if we already satisfy the requirements of MODE. If yes we
5210 can just switch to MODE. */
5211 if (num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
]
5212 && (num_sign_bit_copies (x
, GET_MODE (x
))
5213 >= num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
] + 1))
5219 /* Initialize non_rtx_starting_operands, which is used to speed up
5225 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5227 const char *format
= GET_RTX_FORMAT (i
);
5228 const char *first
= strpbrk (format
, "eEV");
5229 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
5232 init_num_sign_bit_copies_in_rep ();
5235 /* Check whether this is a constant pool constant. */
5237 constant_pool_constant_p (rtx x
)
5239 x
= avoid_constant_pool_reference (x
);
5240 return CONST_DOUBLE_P (x
);
5243 /* If M is a bitmask that selects a field of low-order bits within an item but
5244 not the entire word, return the length of the field. Return -1 otherwise.
5245 M is used in machine mode MODE. */
5248 low_bitmask_len (enum machine_mode mode
, unsigned HOST_WIDE_INT m
)
5250 if (mode
!= VOIDmode
)
5252 if (GET_MODE_PRECISION (mode
) > HOST_BITS_PER_WIDE_INT
)
5254 m
&= GET_MODE_MASK (mode
);
5257 return exact_log2 (m
+ 1);
5260 /* Return the mode of MEM's address. */
5263 get_address_mode (rtx mem
)
5265 enum machine_mode mode
;
5267 gcc_assert (MEM_P (mem
));
5268 mode
= GET_MODE (XEXP (mem
, 0));
5269 if (mode
!= VOIDmode
)
5271 return targetm
.addr_space
.address_mode (MEM_ADDR_SPACE (mem
));
5274 /* Split up a CONST_DOUBLE or integer constant rtx
5275 into two rtx's for single words,
5276 storing in *FIRST the word that comes first in memory in the target
5277 and in *SECOND the other. */
5280 split_double (rtx value
, rtx
*first
, rtx
*second
)
5282 if (CONST_INT_P (value
))
5284 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
5286 /* In this case the CONST_INT holds both target words.
5287 Extract the bits from it into two word-sized pieces.
5288 Sign extend each half to HOST_WIDE_INT. */
5289 unsigned HOST_WIDE_INT low
, high
;
5290 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
5291 unsigned bits_per_word
= BITS_PER_WORD
;
5293 /* Set sign_bit to the most significant bit of a word. */
5295 sign_bit
<<= bits_per_word
- 1;
5297 /* Set mask so that all bits of the word are set. We could
5298 have used 1 << BITS_PER_WORD instead of basing the
5299 calculation on sign_bit. However, on machines where
5300 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
5301 compiler warning, even though the code would never be
5303 mask
= sign_bit
<< 1;
5306 /* Set sign_extend as any remaining bits. */
5307 sign_extend
= ~mask
;
5309 /* Pick the lower word and sign-extend it. */
5310 low
= INTVAL (value
);
5315 /* Pick the higher word, shifted to the least significant
5316 bits, and sign-extend it. */
5317 high
= INTVAL (value
);
5318 high
>>= bits_per_word
- 1;
5321 if (high
& sign_bit
)
5322 high
|= sign_extend
;
5324 /* Store the words in the target machine order. */
5325 if (WORDS_BIG_ENDIAN
)
5327 *first
= GEN_INT (high
);
5328 *second
= GEN_INT (low
);
5332 *first
= GEN_INT (low
);
5333 *second
= GEN_INT (high
);
5338 /* The rule for using CONST_INT for a wider mode
5339 is that we regard the value as signed.
5340 So sign-extend it. */
5341 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
5342 if (WORDS_BIG_ENDIAN
)
5354 else if (!CONST_DOUBLE_P (value
))
5356 if (WORDS_BIG_ENDIAN
)
5358 *first
= const0_rtx
;
5364 *second
= const0_rtx
;
5367 else if (GET_MODE (value
) == VOIDmode
5368 /* This is the old way we did CONST_DOUBLE integers. */
5369 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
5371 /* In an integer, the words are defined as most and least significant.
5372 So order them by the target's convention. */
5373 if (WORDS_BIG_ENDIAN
)
5375 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5376 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
5380 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
5381 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5388 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
5390 /* Note, this converts the REAL_VALUE_TYPE to the target's
5391 format, splits up the floating point double and outputs
5392 exactly 32 bits of it into each of l[0] and l[1] --
5393 not necessarily BITS_PER_WORD bits. */
5394 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
5396 /* If 32 bits is an entire word for the target, but not for the host,
5397 then sign-extend on the host so that the number will look the same
5398 way on the host that it would on the target. See for instance
5399 simplify_unary_operation. The #if is needed to avoid compiler
5402 #if HOST_BITS_PER_LONG > 32
5403 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
5405 if (l
[0] & ((long) 1 << 31))
5406 l
[0] |= ((long) (-1) << 32);
5407 if (l
[1] & ((long) 1 << 31))
5408 l
[1] |= ((long) (-1) << 32);
5412 *first
= GEN_INT (l
[0]);
5413 *second
= GEN_INT (l
[1]);