1 /* This file contains code to do profiling.
3 Copyright (C) 2007-2012 Free Software Foundation, Inc.
4 Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
5 on behalf of Synopsys Inc.
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free
12 Software Foundation; either version 3, or (at your option) any later
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 Under Section 7 of GPL version 3, you are granted additional
21 permissions described in the GCC Runtime Library Exception, version
22 3.1, as published by the Free Software Foundation.
24 You should have received a copy of the GNU General Public License and
25 a copy of the GCC Runtime Library Exception along with this program;
26 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
27 <http://www.gnu.org/licenses/>. */
31 /* This file contains code to do profiling. */
32 .weak __profile_timer_cycles
33 .global __profile_timer_cycles
34 .set __profile_timer_cycles, 200
37 .global __profil_offset
39 .type __profil_offset, @object
40 .size __profil_offset, 4
45 .global __dcache_linesz
54 breq_s r0,0,.Lstop_profiling
55 ; r0: buf r1: bufsiz r2: offset r3: scale
56 bxor.f r3,r3,15; scale must be 0x8000, i.e. 1/2; generate 0.
60 flag.ne 1 ; halt if wrong scale
62 st r0,[__profil_offset]
73 #else /* !__ARC700__ */
74 # FIX ME: set up loop according to cache line size
75 lr r12,[D_CACHE_BUILD]
88 #endif /* __ARC700__ */
89 2: b_s .Lcounters_cleared
92 lr r1,[INT_VECTOR_BASE] ; disable timer0 interrupts
95 0: ld_s r0,[pcl,1f-0b+((0b-.Lprofil) & 2)] ; 1f@GOTOFF
96 0: ld_s r12,[pcl,1f+4-0b+((0b-.Lprofil) & 2)] ; 1f@GOTOFF + 4
97 st_s r0,[r1,24]; timer0 uses vector3
98 st_s r12,[r1,24+4]; timer0 uses vector3
100 sr __profile_timer_cycles,[LIMIT0]
101 mov_s r12,3 ; enable timer interrupts; count only when not halted.
104 bset_s r12,r12,1 ; allow level 1 interrupts
113 .balign 4 ; make final jump unaligned to avoid delay penalty
114 .balign 32,0,12 ; make sure the code spans no more that two cache lines
118 ld r0,[__profil_offset]
128 nostore:ld.ab r2,[sp,8]
131 ENDFUNC(__profil_irq)
133 ; could save one cycle if the counters were allocated at link time and
134 ; the contents of __profil_offset were pre-computed at link time, like this:
136 ; __profil_offset needs to be PROVIDEd as __profile_base-text/4
137 .global __profil_offset
142 add1 r0,__profil_offset,r0