gcc-4_9-branch/gcc/ChangeLog.linaro

   1 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
   2
   3         Backport from trunk r212912, r212913.
   4         2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
   5
   6         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
   7         (case UNSPEC): Handle UNSPEC_RBIT.
   8
   9         2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  10
  11         * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
  12         (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
  13
  14 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
  15
  16         Backport from trunk r213555.
  17         2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  18
  19         PR target/61713
  20         * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
  21         move to subtarget in serial version if result is ignored.
  22
  23 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
  24
  25         Backport from trunk r213376.
  26         2014-07-31  Charles Baylis  <charles.baylis@linaro.org>
  27
  28         PR target/61948
  29         * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
  30         constraints are satisfied.
  31         (<shift>di3_neon): Likewise.
  32
  33 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
  34
  35         Backport from trunk r211270, r211271, r211273, r211275, r212943,
  36         r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
  37         r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
  38         r213000.
  39         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
  40
  41         * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
  42         (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
  43
  44         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
  45
  46         * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
  47         (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
  48
  49         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
  50
  51         * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
  52         (aarch64_save_callee_saves): New parameter "skip_wb".
  53         (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
  54
  55         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
  56
  57         * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
  58         "wb_candidate2".
  59         * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
  60
  61         2014-07-24  Jiong Wang  <jiong.wang@arm.com>
  62
  63         * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
  64         subtract outgoing area size when restoring stack_pointer_rtx.
  65
  66         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
  67
  68         * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
  69         (aarch64_gen_loadwb_pair): New helper function.
  70         (aarch64_expand_epilogue): Simplify code using new helper functions.
  71         * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
  72
  73         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
  74
  75         * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
  76         (aarch64_gen_storewb_pair): New helper function.
  77         (aarch64_expand_prologue): Simplify code using new helper functions.
  78         * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
  79
  80         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
  81
  82         * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
  83         Rename to aarch64_save_callee_saves, remove restore code.
  84         (aarch64_restore_callee_saves): New function.
  85
  86         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
  87
  88         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
  89         (aarch64_save_callee_saves): New function to handle reg save
  90         for both core and vectore regs.
  91
  92         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
  93
  94         * config/aarch64/aarch64.c (aarch64_gen_load_pair)
  95         (aarch64_gen_store_pair): New helper function.
  96         (aarch64_save_or_restore_callee_save_registers)
  97         (aarch64_save_or_restore_fprs): Use new helper functions.
  98
  99         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 100
 101         * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
 102         (aarch64_save_or_restore_callee_save_registers)
 103         (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
 104
 105         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 106
 107         * config/aarch64/aarch64.c
 108         (aarch64_save_or_restore_callee_save_registers)
 109         (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
 110
 111         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 112
 113         * config/aarch64/aarch64.c
 114         (aarch64_save_or_restore_callee_save_registers)
 115         (aarch64_save_or_restore_fprs): Remove 'increment'.
 116
 117         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 118
 119         * config/aarch64/aarch64.c
 120         (aarch64_save_or_restore_callee_save_registers)
 121         (aarch64_save_or_restore_fprs): Use register offset in
 122         cfun->machine->frame.reg_offset.
 123
 124         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 125
 126         * config/aarch64/aarch64.c
 127         (aarch64_save_or_restore_callee_save_registers)
 128         (aarch64_save_or_restore_fprs): Remove base_rtx.
 129
 130         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 131
 132         * config/aarch64/aarch64.c
 133         (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
 134         to 'start_offset'.  Remove local variable 'start_offset'.
 135
 136         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 137
 138         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
 139         type to HOST_WIDE_INT.
 140
 141         2014-07-23  Jiong Wang  <jiong.wang@arm.com>
 142
 143         * config/aarch64/aarch64.c (aarch64_expand_prologue)
 144         (aarch64_save_or_restore_fprs)
 145         (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
 146
 147         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 148
 149         * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
 150         frame_size.
 151         * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
 152         aarch64_frame hard_fp_offset and frame_size.
 153         (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
 154         frame_size; remove original_frame_size.
 155         (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
 156         (aarch64_initial_elimination_offset): Remove frame_size and
 157         offset.  Use aarch64_frame frame_size.
 158
 159         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 160                     Jiong Wang  <jiong.wang@arm.com>
 161
 162         * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
 163         initialization of R30 offset.  Update offset.  Iterate core
 164         regisers upto X30.  Remove X29, X30 specific code.
 165
 166         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 167                     Jiong Wang  <jiong.wang@arm.com>
 168
 169         * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
 170         (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
 171         (aarch64_register_saved_on_entry): Adjust test.
 172
 173         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 174
 175         * config/aarch64/aarch64.h (machine_function): Move
 176         saved_varargs_size from here...
 177         (aarch64_frameGTY): ... to here.
 178
 179         * config/aarch64/aarch64.c (aarch64_expand_prologue)
 180         (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
 181         (aarch64_initial_elimination_offset)
 182         (aarch64_setup_incoming_varargs): Adjust location of
 183         saved_varargs_size.
 184
 185 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 186
 187         Backport from trunk r212753.
 188         2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 189
 190         * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
 191         (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
 192
 193 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 194
 195         Backport from trunk r212752.
 196         2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 197
 198         * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
 199         (vmlal_high_lane_s32): Likewise.
 200         (vmlal_high_lane_u16): Likewise.
 201         (vmlal_high_lane_u32): Likewise.
 202         (vmlsl_high_lane_s16): Likewise.
 203         (vmlsl_high_lane_s32): Likewise.
 204         (vmlsl_high_lane_u16): Likewise.
 205         (vmlsl_high_lane_u32): Likewise.
 206
 207 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 208
 209         Backport from trunk r212512.
 210         2014-07-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 211
 212         * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
 213         * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
 214         * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
 215         * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
 216         * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
 217         * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
 218         * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
 219
 220 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 221
 222         Backport from trunk r212358.
 223         2014-07-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 224
 225         * config/arm/arm.c (cortexa5_extra_costs): New table.
 226         (arm_cortex_a5_tune): Use cortexa5_extra_costs.
 227
 228 2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
 229
 230         Backport from trunk r212296.
 231         2014-07-04  Tom de Vries  <tom@codesourcery.com>
 232
 233         * config/aarch64/aarch64-simd.md
 234         (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
 235
 236 2014-08-10 Yvan Roux  <yvan.roux@linaro.org>
 237
 238         Backport from trunk r212142, r212225.
 239         2014-07-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 240
 241         * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
 242         variable i.
 243
 244         2014-06-30  Alan Lawrence  <alan.lawrence@arm.com>
 245
 246         * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
 247         * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
 248         against bigendian and adjust indices.
 249
 250 2014-08-10 Yvan Roux  <yvan.roux@linaro.org>
 251
 252         Backport from trunk r211779.
 253         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 254
 255         * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
 256
 257 2014-07-30  Yvan Roux  <yvan.roux@linaro.org>
 258
 259         Backport from trunk r211503.
 260         2014-06-12  Alan Lawrence  <alan.lawrence@arm.com>
 261
 262         * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
 263         vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
 264         vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
 265         vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
 266         vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
 267         vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
 268         vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
 269         not in the spec.
 270
 271 2014-07-30  Yvan Roux  <yvan.roux@linaro.org>
 272
 273         Backport from trunk r211140.
 274         2014-06-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 275
 276         * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
 277
 278 2014-07-29  Yvan Roux  <yvan.roux@linaro.org>
 279
 280         * LINARO-VERSION: Bump version.
 281
 282 2014-07-24  Yvan Roux  <yvan.roux@linaro.org>
 283
 284         GCC Linaro 4.9-2014.07-1 released.
 285         * LINARO-VERSION: Update.
 286
 287 2014-07-20  Yvan Roux  <yvan.roux@linaro.org>
 288
 289         Revert:
 290         2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 291
 292         Backport from trunk r211129.
 293         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 294
 295         PR target/61154
 296         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
 297         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
 298         with immediate_operand.
 299
 300 2014-07-19  Yvan Roux  <yvan.roux@linaro.org>
 301
 302         * LINARO-VERSION: Bump version.
 303
 304 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 305
 306         GCC Linaro 4.9-2014.07 released.
 307         * LINARO-VERSION: Update.
 308
 309 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 310
 311         Backport from trunk r211887, r211899.
 312         2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
 313
 314         * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
 315         "yes" where needed.
 316
 317         2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>
 318
 319         * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
 320         vector registers.
 321
 322 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 323
 324         Backport from trunk r211440.
 325         2014-06-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 326
 327         * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
 328         * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
 329         dependencies.
 330         * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
 331         (aarch64_crc_builtin_datum): New struct.
 332         (aarch64_crc_builtin_data): New.
 333         (aarch64_init_crc32_builtins): New function.
 334         (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
 335         (aarch64_crc32_expand_builtin): New.
 336         (aarch64_expand_builtin): Add CRC32 builtin expansion case.
 337         * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
 338         __ARM_FEATURE_CRC32 when appropriate.
 339         (TARGET_CRC32): Define.
 340         * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
 341         UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
 342         UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
 343         (aarch64_<crc_variant>): New pattern.
 344         * config/aarch64/arm_acle.h: New file.
 345         * config/aarch64/iterators.md (CRC): New int iterator.
 346         (crc_variant, crc_mode): New int attributes.
 347         * doc/aarch64-acle-intrinsics.texi: New file.
 348         * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
 349         Include aarch64-acle-intrinsics.texi.
 350
 351 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 352
 353         Backport from trunk r211174.
 354         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 355
 356         * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
 357         New pattern.
 358         * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
 359         (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
 360         * config/aarch64/iterators.md (REVERSE): New iterator.
 361         (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
 362         (rev_op): New int_attribute.
 363         * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
 364         vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
 365         vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
 366         vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
 367         vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
 368         vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
 369         vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
 370         Replace temporary __asm__ with __builtin_shuffle.
 371
 372 2014-07-17  Yvan Roux  <yvan.roux@linaro.org>
 373
 374         Backport from trunk r210216, r210218, r210219.
 375         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 376
 377         * config/arm/arm_neon.h: Update comment.
 378         * config/arm/neon-docgen.ml: Delete.
 379         * config/arm/neon-gen.ml: Delete.
 380         * doc/arm-neon-intrinsics.texi: Update comment.
 381
 382         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 383
 384         * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
 385         and v4sf versions.
 386         (vand, vorr, veor, vorn, vbic): Remove.
 387         * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
 388         iterator.
 389         (neon_vsub_unspec): Likewise.
 390         (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
 391
 392         2014-05-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 393
 394         * config/arm/arm_neon.h (vadd_s8): GNU C implementation
 395         (vadd_s16): Likewise.
 396         (vadd_s32): Likewise.
 397         (vadd_f32): Likewise.
 398         (vadd_u8): Likewise.
 399         (vadd_u16): Likewise.
 400         (vadd_u32): Likewise.
 401         (vadd_s64): Likewise.
 402         (vadd_u64): Likewise.
 403         (vaddq_s8): Likewise.
 404         (vaddq_s16): Likewise.
 405         (vaddq_s32): Likewise.
 406         (vaddq_s64): Likewise.
 407         (vaddq_f32): Likewise.
 408         (vaddq_u8): Likewise.
 409         (vaddq_u16): Likewise.
 410         (vaddq_u32): Likewise.
 411         (vaddq_u64): Likewise.
 412         (vmul_s8): Likewise.
 413         (vmul_s16): Likewise.
 414         (vmul_s32): Likewise.
 415         (vmul_f32): Likewise.
 416         (vmul_u8): Likewise.
 417         (vmul_u16): Likewise.
 418         (vmul_u32): Likewise.
 419         (vmul_p8): Likewise.
 420         (vmulq_s8): Likewise.
 421         (vmulq_s16): Likewise.
 422         (vmulq_s32): Likewise.
 423         (vmulq_f32): Likewise.
 424         (vmulq_u8): Likewise.
 425         (vmulq_u16): Likewise.
 426         (vmulq_u32): Likewise.
 427         (vsub_s8): Likewise.
 428         (vsub_s16): Likewise.
 429         (vsub_s32): Likewise.
 430         (vsub_f32): Likewise.
 431         (vsub_u8): Likewise.
 432         (vsub_u16): Likewise.
 433         (vsub_u32): Likewise.
 434         (vsub_s64): Likewise.
 435         (vsub_u64): Likewise.
 436         (vsubq_s8): Likewise.
 437         (vsubq_s16): Likewise.
 438         (vsubq_s32): Likewise.
 439         (vsubq_s64): Likewise.
 440         (vsubq_f32): Likewise.
 441         (vsubq_u8): Likewise.
 442         (vsubq_u16): Likewise.
 443         (vsubq_u32): Likewise.
 444         (vsubq_u64): Likewise.
 445         (vand_s8): Likewise.
 446         (vand_s16): Likewise.
 447         (vand_s32): Likewise.
 448         (vand_u8): Likewise.
 449         (vand_u16): Likewise.
 450         (vand_u32): Likewise.
 451         (vand_s64): Likewise.
 452         (vand_u64): Likewise.
 453         (vandq_s8): Likewise.
 454         (vandq_s16): Likewise.
 455         (vandq_s32): Likewise.
 456         (vandq_s64): Likewise.
 457         (vandq_u8): Likewise.
 458         (vandq_u16): Likewise.
 459         (vandq_u32): Likewise.
 460         (vandq_u64): Likewise.
 461         (vorr_s8): Likewise.
 462         (vorr_s16): Likewise.
 463         (vorr_s32): Likewise.
 464         (vorr_u8): Likewise.
 465         (vorr_u16): Likewise.
 466         (vorr_u32): Likewise.
 467         (vorr_s64): Likewise.
 468         (vorr_u64): Likewise.
 469         (vorrq_s8): Likewise.
 470         (vorrq_s16): Likewise.
 471         (vorrq_s32): Likewise.
 472         (vorrq_s64): Likewise.
 473         (vorrq_u8): Likewise.
 474         (vorrq_u16): Likewise.
 475         (vorrq_u32): Likewise.
 476         (vorrq_u64): Likewise.
 477         (veor_s8): Likewise.
 478         (veor_s16): Likewise.
 479         (veor_s32): Likewise.
 480         (veor_u8): Likewise.
 481         (veor_u16): Likewise.
 482         (veor_u32): Likewise.
 483         (veor_s64): Likewise.
 484         (veor_u64): Likewise.
 485         (veorq_s8): Likewise.
 486         (veorq_s16): Likewise.
 487         (veorq_s32): Likewise.
 488         (veorq_s64): Likewise.
 489         (veorq_u8): Likewise.
 490         (veorq_u16): Likewise.
 491         (veorq_u32): Likewise.
 492         (veorq_u64): Likewise.
 493         (vbic_s8): Likewise.
 494         (vbic_s16): Likewise.
 495         (vbic_s32): Likewise.
 496         (vbic_u8): Likewise.
 497         (vbic_u16): Likewise.
 498         (vbic_u32): Likewise.
 499         (vbic_s64): Likewise.
 500         (vbic_u64): Likewise.
 501         (vbicq_s8): Likewise.
 502         (vbicq_s16): Likewise.
 503         (vbicq_s32): Likewise.
 504         (vbicq_s64): Likewise.
 505         (vbicq_u8): Likewise.
 506         (vbicq_u16): Likewise.
 507         (vbicq_u32): Likewise.
 508         (vbicq_u64): Likewise.
 509         (vorn_s8): Likewise.
 510         (vorn_s16): Likewise.
 511         (vorn_s32): Likewise.
 512         (vorn_u8): Likewise.
 513         (vorn_u16): Likewise.
 514         (vorn_u32): Likewise.
 515         (vorn_s64): Likewise.
 516         (vorn_u64): Likewise.
 517         (vornq_s8): Likewise.
 518         (vornq_s16): Likewise.
 519         (vornq_s32): Likewise.
 520         (vornq_s64): Likewise.
 521         (vornq_u8): Likewise.
 522         (vornq_u16): Likewise.
 523         (vornq_u32): Likewise.
 524         (vornq_u64): Likewise.
 525
 526 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 527
 528         Backport from trunk r210151.
 529         2014-05-07  Alan Lawrence  <alan.lawrence@arm.com>
 530
 531         * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
 532         vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
 533         vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
 534         vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
 535         vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
 536         vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
 537         vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
 538         vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
 539
 540 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 541
 542         Backport from trunk r209794.
 543         2014-04-25  Marek Polacek  <polacek@redhat.com>
 544
 545         PR c/60114
 546         * c-parser.c (c_parser_initelt): Pass input_location to
 547         process_init_element.
 548         (c_parser_initval): Pass loc to process_init_element.
 549         * c-tree.h (process_init_element): Adjust declaration.
 550         * c-typeck.c (push_init_level): Pass input_location to
 551         process_init_element.
 552         (pop_init_level): Likewise.
 553         (set_designator): Likewise.
 554         (output_init_element): Add location_t parameter.  Pass loc to
 555         digest_init.
 556         (output_pending_init_elements): Pass input_location to
 557         output_init_element.
 558         (process_init_element): Add location_t parameter.  Pass loc to
 559         output_init_element.
 560
 561 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 562
 563         Backport from trunk r211771.
 564         2014-06-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 565
 566         * genattrtab.c (n_bypassed): New variable.
 567         (process_bypasses): Initialise n_bypassed.
 568         Count number of bypassed reservations.
 569         (make_automaton_attrs): Allocate space for bypassed reservations
 570         rather than number of bypasses.
 571
 572 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 573
 574         Backport from trunk r210861.
 575         2014-05-23  Jiong Wang   <jiong.wang@arm.com>
 576
 577         * config/aarch64/predicates.md (aarch64_call_insn_operand): New
 578         predicate.
 579         * config/aarch64/constraints.md ("Ucs", "Usf"):  New constraints.
 580         * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
 581         Adjust for tailcalling through registers.
 582         * config/aarch64/aarch64.h (enum reg_class): New caller save
 583         register class.
 584         (REG_CLASS_NAMES): Likewise.
 585         (REG_CLASS_CONTENTS): Likewise.
 586         * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
 587         Allow tailcalling without decls.
 588
 589 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 590
 591         Backport from trunk r211314.
 592         2014-06-06  James Greenhalgh  <james.greenhalgh@arm.com>
 593
 594         * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
 595         * config/aarch64/aarch64.c (aarch64_move_pointer): New.
 596         (aarch64_progress_pointer): Likewise.
 597         (aarch64_copy_one_part_and_move_pointers): Likewise.
 598         (aarch64_expand_movmen): Likewise.
 599         * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
 600         * config/aarch64/aarch64.md (movmem<mode>): New.
 601
 602 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 603
 604         Backport from trunk r211185, 211186.
 605         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 606
 607         * gcc/config/aarch64/aarch64-builtins.c
 608         (aarch64_types_binop_uus_qualifiers,
 609         aarch64_types_shift_to_unsigned_qualifiers,
 610         aarch64_types_unsigned_shiftacc_qualifiers): Define.
 611         * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
 612         uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
 613         sqshlu_n, uqshl_n): Update qualifiers.
 614         * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
 615         vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
 616         vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
 617         vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
 618         vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
 619         vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
 620         vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
 621         vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
 622         vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
 623         vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
 624         vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
 625         vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
 626         vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
 627         vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
 628         vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
 629         vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
 630         vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
 631         vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
 632         vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
 633         vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
 634         vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
 635         vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
 636         vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
 637         vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
 638         vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
 639         vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
 640         vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
 641
 642         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 643
 644         * gcc/config/aarch64/aarch64-builtins.c
 645         (aarch64_types_binop_ssu_qualifiers): New static data.
 646         (TYPES_BINOP_SSU): Define.
 647         * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
 648         urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
 649         * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
 650         vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
 651         vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
 652         vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
 653         vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32,    52
 654         vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64,  53
 655         vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
 656         suffix to builtin function name, remove cast.   55
 657         (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
 658         vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8,  57
 659         vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
 660
 661 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 662
 663         Backport from trunk r211408, 211416.
 664         2014-06-10  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 665
 666         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
 667         REG_CFA_RESTORE mode.
 668
 669         2014-06-10  Jiong Wang  <jiong.wang@arm.com>
 670
 671         * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
 672         (aarch64_save_or_restore_callee_save_registers): Fix layout.
 673
 674 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 675
 676         Backport from trunk r211418.
 677         2014-06-10  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 678
 679         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
 680         Change second alternative type to f_mcr.
 681         * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
 682         and 12th alternatives' types to f_mcr and f_mrc.
 683         (*movdi_aarch64): Same for 12th and 13th alternatives.
 684         (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
 685         (aarch64_movtilow_tilow): Change type to fmov.
 686
 687 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 688
 689         Backport from trunk r211371.
 690         2014-06-09  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 691
 692         * config/arm/arm-modes.def: Remove XFmode.
 693
 694 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 695
 696         Backport from trunk r211268.
 697         2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 698
 699         * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
 700         layout comment.
 701
 702 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 703
 704         Backport from trunk r211129.
 705         2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 706
 707         PR target/61154
 708         * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
 709         * config/arm/arm.md (mov64 splitter): Replace const_double_operand
 710         with immediate_operand.
 711
 712 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 713
 714         Backport from trunk r211073.
 715         2014-05-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 716
 717         * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
 718         to mov_imm.
 719         * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
 720
 721 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 722
 723         Backport from trunk r211050.
 724         2014-05-29  Richard Earnshaw <rearnsha@arm.com>
 725         Richard Sandiford  <rdsandiford@googlemail.com>
 726
 727         * arm/iterators.md (shiftable_ops): New code iterator.
 728         (t2_binop0, arith_shift_insn): New code attributes.
 729         * arm/predicates.md (shift_nomul_operator): New predicate.
 730         * arm/arm.md (insn_enabled): Delete.
 731         (enabled): Remove insn_enabled test.
 732         (*arith_shiftsi): Delete.  Replace with ...
 733         (*<arith_shift_insn>_multsi): ... new pattern.
 734         (*<arith_shift_insn>_shiftsi): ... new pattern.
 735         * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
 736
 737 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 738
 739         Backport from trunk r210996.
 740         2014-05-27  Andrew Pinski  <apinski@cavium.com>
 741
 742         * config/aarch64/aarch64.md (stack_protect_set_<mode>):
 743         Use <w> for the register in assembly template.
 744         (stack_protect_test): Use the mode of operands[0] for the
 745         result.
 746         (stack_protect_test_<mode>): Use <w> for the register
 747         in assembly template.
 748
 749 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 750
 751         Backport from trunk r210967.
 752         2014-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 753
 754         * config/arm/neon.md (neon_bswap<mode>): New pattern.
 755         * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
 756         (arm_init_neon_builtins): Handle NEON_BSWAP.
 757         Define required type nodes.
 758         (arm_expand_neon_builtin): Handle NEON_BSWAP.
 759         (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
 760         * config/arm/arm_neon_builtins.def (bswap): Define builtins.
 761         * config/arm/iterators.md (VDQHSD): New mode iterator.
 762
 763 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 764
 765         Backport from trunk r210471.
 766         2014-05-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 767
 768         * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
 769         enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
 770
 771 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 772
 773         Backport from trunk r210369.
 774         2014-05-13  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 775
 776         * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
 777         (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
 778         Remove associated type declarations and initialisations.
 779         (arm_expand_neon_builtin): Likewise.
 780         (neon_emit_pair_result_insn): Delete.
 781         * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
 782         * config/arm/neon.md (neon_vtrn<mode>): Delete.
 783         (neon_vzip<mode>): Likewise.
 784         (neon_vuzp<mode>): Likewise.
 785
 786 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 787
 788         Backport from trunk r211058, 211177.
 789         2014-05-29  Alan Lawrence  <alan.lawrence@arm.com>
 790
 791         * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
 792         TYPES_BINOPV): New static data.
 793         * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
 794         * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
 795         New patterns.
 796         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
 797         patterns for EXT.
 798         (aarch64_evpc_ext): New function.
 799
 800         * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
 801
 802         * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
 803         vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
 804         vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
 805         vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
 806         vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
 807
 808         2014-06-03  Alan Lawrence  <alan.lawrence@arm.com>
 809
 810         * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
 811         location == 0.
 812
 813 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 814
 815         Backport from trunk r209797.
 816         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 817
 818         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
 819         Use HOST_WIDE_INT_C for mask literal.
 820         (aarch_rev16_shleft_mask_imm_p): Likewise.
 821
 822 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 823
 824         Backport from trunk r211148.
 825         2014-06-02  Andrew Pinski  <apinski@cavium.com>
 826
 827         * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
 828         /lib/ld-linux32-aarch64.so.1 is used for ILP32.
 829         (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
 830         file whose name depends on -mabi= and -mbig-endian.
 831         * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
 832         better and handle ilp32 too.
 833         (MULTILIB_OPTIONS): Delete.
 834         (MULTILIB_DIRNAMES): Delete.
 835
 836 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 837
 838         Backport from trunk r210828, r211103.
 839         2014-05-31  Kugan Vivekanandarajah  <kuganv@linaro.org>
 840
 841         * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
 842         (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
 843         (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
 844         and __builtins_arm_get_fpscr.
 845         (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
 846         __builtins_arm_get_fpscr.
 847         (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
 848         __builtins_arm_ldfpscr.
 849         (arm_atomic_assign_expand_fenv): New function.
 850         * config/arm/vfp.md (set_fpscr): New pattern.
 851         (get_fpscr) : Likewise.
 852         * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
 853         VUNSPEC_SET_FPSCR.
 854         * doc/extend.texi (AARCH64 Built-in Functions) : Document
 855         __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
 856
 857         2014-05-23  Kugan Vivekanandarajah  <kuganv@linaro.org>
 858
 859         * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
 860         define.
 861         * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
 862         New function declaration.
 863         * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
 864         AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
 865         AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
 866         (aarch64_init_builtins) : Initialize builtins
 867         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
 868         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
 869         (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
 870         __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
 871         and __builtins_aarch64_set_fpsr.
 872         (aarch64_atomic_assign_expand_fenv): New function.
 873         * config/aarch64/aarch64.md (set_fpcr): New pattern.
 874         (get_fpcr) : Likewise.
 875         (set_fpsr) : Likewise.
 876         (get_fpsr) : Likewise.
 877         (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
 878          and UNSPECV_SET_FPSR.
 879         * doc/extend.texi (AARCH64 Built-in Functions) : Document
 880         __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
 881         __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
 882
 883 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 884
 885         Backport from trunk r210355.
 886         2014-05-13  Ian Bolton  <ian.bolton@arm.com>
 887
 888         * config/aarch64/aarch64-protos.h
 889         (aarch64_hard_regno_caller_save_mode): New prototype.
 890         * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
 891         New function.
 892         * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
 893
 894 2014-07-16  Yvan Roux  <yvan.roux@linaro.org>
 895
 896         Backport from trunk r209943.
 897         2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>
 898
 899         * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
 900         vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
 901         vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
 902         vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
 903         vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
 904         vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
 905         vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
 906         vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
 907
 908 2014-06-26  Yvan Roux  <yvan.roux@linaro.org>
 909
 910         * LINARO-VERSION: Bump version.
 911
 912 2014-06-25  Yvan Roux  <yvan.roux@linaro.org>
 913
 914         GCC Linaro 4.9-2014.06-1 released.
 915         * LINARO-VERSION: Update.
 916
 917 2014-06-24  Yvan Roux  <yvan.roux@linaro.org>
 918
 919         Revert:
 920         2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
 921
 922         Backport from trunk r209643.
 923         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 924
 925         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
 926
 927 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
 928
 929         Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
 930         210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
 931         210508, 210509, 210510, 210512, 211205, 211206.
 932         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 933
 934         * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
 935         (cpu_addrcost_table): Use it.
 936         * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
 937         (aarch64_address_cost): Rewrite using aarch64_classify_address,
 938         move it.
 939
 940         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 941
 942         * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
 943         (cortexa57_vector_cost): Likewise.
 944         (cortexa57_tunings): Use them.
 945
 946         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 947
 948         * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
 949         (TARGET_RTX_COSTS): Call it.
 950
 951         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 952                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 953
 954         * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
 955         emit instructions, return number of instructions which would
 956         be emitted.
 957         (aarch64_add_constant): Update call to aarch64_build_constant.
 958         (aarch64_output_mi_thunk): Likewise.
 959         (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
 960         a CONST_DOUBLE.
 961
 962         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 963                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 964
 965         * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
 966         to...
 967         (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
 968         well formed.
 969         (aarch64_rtx_mult_cost): New.
 970         (aarch64_rtx_costs): Use it, refactor as appropriate.
 971
 972         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 973
 974         * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
 975
 976         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 977                     Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
 978
 979         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
 980         for SET RTX.
 981
 982         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 983                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 984
 985         * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
 986         costs when costing loads and stores to memory.
 987
 988         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 989                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 990
 991         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
 992         logical operations.
 993
 994         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 995                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 996
 997         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
 998         ZERO_EXTEND and SIGN_EXTEND better.
 999
1000         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1001                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1002
1003         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1004         rotates and shifts.
1005
1006         2014-03-16  James Greenhalgh  <james.greenhalgh@arm.com>
1007                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1008
1009         * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
1010         (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
1011
1012         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1013                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1014
1015         * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
1016         DIV/MOD.
1017
1018         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1019                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1020
1021         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
1022         operators.
1023
1024         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1025                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1026
1027         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
1028         FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
1029
1030         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1031                     Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
1032
1033         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
1034
1035         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1036
1037         * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
1038         HIGH, LO_SUM.
1039
1040         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1041
1042         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
1043         where we were unable to cost an RTX.
1044
1045         2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
1046
1047         * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
1048
1049         2014-06-03  Andrew Pinski  <apinski@cavium.com>
1050
1051         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
1052         (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
1053
1054         2014-06-03  Andrew Pinski  <apinski@cavium.com>
1055
1056         * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
1057         comparisons for OP0.
1058
1059 2014-06-13  Yvan Roux  <yvan.roux@linaro.org>
1060
1061         * LINARO-VERSION: Bump version.
1062
1063 2014-06-12  Yvan Roux  <yvan.roux@linaro.org>
1064
1065         GCC Linaro 4.9-2014.06 released.
1066         * LINARO-VERSION: Update.
1067
1068 2014-06-04  Yvan Roux  <yvan.roux@linaro.org>
1069
1070         Backport from trunk r211211.
1071         2014-06-04  Bin Cheng  <bin.cheng@arm.com>
1072
1073         * config/aarch64/aarch64.c (aarch64_classify_address)
1074         (aarch64_legitimize_reload_address): Support full addressing modes
1075         for vector modes.
1076         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
1077         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
1078
1079 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1080
1081         Backport from trunk r209906.
1082         2014-04-29  Alan Lawrence  <alan.lawrence@arm.com>
1083
1084         * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
1085         vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
1086         vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
1087         vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
1088         vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
1089         vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
1090         vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
1091         vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
1092
1093 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1094
1095         Backport from trunk r209897.
1096         2014-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1097
1098         * calls.c (initialize_argument_information): Always treat
1099         PUSH_ARGS_REVERSED as 1, simplify code accordingly.
1100         (expand_call): Likewise.
1101         (emit_library_call_calue_1): Likewise.
1102         * expr.c (PUSH_ARGS_REVERSED): Do not define.
1103         (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
1104         code accordingly.
1105
1106 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1107
1108         Backport from trunk r209880.
1109         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
1110
1111         * config/aarch64/aarch64-builtins.c
1112         (aarch64_types_storestruct_lane_qualifiers): New.
1113         (TYPES_STORESTRUCT_LANE): Likewise.
1114         * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
1115         (st3_lane): Likewise.
1116         (st4_lane): Likewise.
1117         * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
1118         (vec_store_lanesci_lane<mode>): Likewise.
1119         (vec_store_lanesxi_lane<mode>): Likewise.
1120                 (aarch64_st2_lane<VQ:mode>): Likewise.
1121         (aarch64_st3_lane<VQ:mode>): Likewise.
1122         (aarch64_st4_lane<VQ:mode>): Likewise.
1123         * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
1124         * config/aarch64/arm_neon.h
1125                 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
1126         use new macro arguments.
1127         (__ST3_LANE_FUNC): Likewise.
1128         (__ST4_LANE_FUNC): Likewise.
1129         * config/aarch64/iterators.md (V_TWO_ELEM): New.
1130         (V_THREE_ELEM): Likewise.
1131         (V_FOUR_ELEM): Likewise.
1132
1133 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1134
1135         Backport from trunk r209878.
1136         2014-04-28  James Greenhalgh  <james.greenhalgh@arm.com>
1137
1138         * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
1139         * config/aarch64/aarch64.c
1140         (aarch64_cannot_change_mode_class): Weaken conditions.
1141         (aarch64_modes_tieable_p): New.
1142         * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
1143
1144 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1145
1146         Backport from trunk r209808.
1147         2014-04-25  Jiong Wang  <jiong.wang@arm.com>
1148
1149         * config/arm/predicates.md (call_insn_operand): Add long_call check.
1150         * config/arm/arm.md (sibcall, sibcall_value): Force the address to
1151         reg for long_call.
1152         * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
1153         restriction.
1154
1155 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1156
1157         Backport from trunk r209806.
1158         2014-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1159
1160         * config/arm/arm.c (arm_cortex_a8_tune): Initialise
1161         T16-related fields.
1162
1163 2014-05-25  Yvan Roux  <yvan.roux@linaro.org>
1164
1165         Backport from trunk r209742, 209749.
1166         2014-04-24  Alan Lawrence  <alan.lawrence@arm.com>
1167
1168         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
1169
1170         2014-04-24  Tejas Belagod  <tejas.belagod@arm.com>
1171
1172         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
1173         for big-endian.
1174
1175 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1176
1177         Backport from trunk r209736.
1178         2014-04-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1179
1180         * config/aarch64/aarch64-builtins.c
1181         (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
1182         BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
1183         * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
1184         * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
1185         builtins.
1186         * config/aarch64/iterator.md (VDQHSD): New mode iterator.
1187         (Vrevsuff): New mode attribute.
1188
1189 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1190
1191         Backport from trunk r209712.
1192         2014-04-23 Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
1193
1194         * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
1195         (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
1196         machine descriptions for Stack Smashing Protector.
1197
1198 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1199
1200         Backport from trunk r209711.
1201         2014-04-23  Richard Earnshaw  <rearnsha@arm.com>
1202
1203         * aarch64.md (<optab>_rol<mode>3): New pattern.
1204         (<optab>_rolsi3_uxtw): Likewise.
1205         * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
1206
1207 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1208
1209         Backport from trunk r209710.
1210         2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
1211
1212         * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
1213         (arm_cortex_a12_tune): Likewise.
1214
1215 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1216
1217         Backport from trunk r209706.
1218         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1219
1220         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
1221
1222 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1223
1224         Backport from trunk r209701, 209702, 209703, 209704, 209705.
1225         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1226
1227         * config/arm/arm.md (arm_rev16si2): New pattern.
1228         (arm_rev16si2_alt): Likewise.
1229         * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
1230
1231         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1232         * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
1233         (rev16<mode>2_alt): Likewise.
1234         * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
1235         * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
1236         (aarch_rev16_shleft_mask_imm_p): Likewise.
1237         (aarch_rev16_p_1): Likewise.
1238         (aarch_rev16_p): Likewise.
1239         * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
1240         (aarch_rev16_shright_mask_imm_p): Likewise.
1241         (aarch_rev16_shleft_mask_imm_p): Likewise.
1242
1243         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1244
1245         * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
1246         * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
1247         rev cost.
1248         (cortex_a53_extra_costs): Likewise.
1249         (cortex_a57_extra_costs): Likewise.
1250         * config/arm/arm.c (cortexa9_extra_costs): Likewise.
1251         (cortexa7_extra_costs): Likewise.
1252         (cortexa8_extra_costs): Likewise.
1253         (cortexa12_extra_costs): Likewise.
1254         (cortexa15_extra_costs): Likewise.
1255         (v7m_extra_costs): Likewise.
1256         (arm_new_rtx_costs): Handle BSWAP.
1257
1258         2013-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1259
1260         * config/arm/arm.c (cortexa8_extra_costs): New table.
1261         (arm_cortex_a8_tune): New tuning struct.
1262         * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
1263
1264         2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1265
1266         * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
1267
1268 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1269
1270         Backport from trunk r209659.
1271         2014-04-22  Richard Henderson  <rth@redhat.com>
1272
1273         * config/aarch64/aarch64 (addti3, subti3): New expanders.
1274         (add<GPI>3_compare0): Remove leading * from name.
1275         (add<GPI>3_carryin): Likewise.
1276         (sub<GPI>3_compare0): Likewise.
1277         (sub<GPI>3_carryin): Likewise.
1278         (<su_optab>mulditi3): New expander.
1279         (multi3): New expander.
1280         (madd<GPI>): Remove leading * from name.
1281
1282 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1283
1284         Backport from trunk r209645.
1285         2014-04-22  Andrew Pinski  <apinski@cavium.com>
1286
1287         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1288         Handle TLS for ILP32.
1289         * config/aarch64/aarch64.md (tlsie_small): Rename to ...
1290         (tlsie_small_<mode>): this and handle PTR.
1291         (tlsie_small_sidi): New pattern.
1292         (tlsle_small): Change to an expand to handle ILP32.
1293         (tlsle_small_<mode>): New pattern.
1294         (tlsdesc_small): Rename to ...
1295         (tlsdesc_small_<mode>): this and handle PTR.
1296
1297 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1298
1299         Backport from trunk r209643.
1300         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1301
1302         * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
1303
1304 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1305
1306         Backport from trunk r209641, 209642.
1307         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1308
1309         * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1310         (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
1311         (aarch64_types_signed_poly_qualifiers): Likewise.
1312         (aarch64_types_unsigned_signed_qualifiers): Likewise.
1313         (aarch64_types_poly_signed_qualifiers): Likewise.
1314         (TYPES_REINTERP_SS): Type macro added.
1315         (TYPES_REINTERP_SU): Likewise.
1316         (TYPES_REINTERP_SP): Likewise.
1317         (TYPES_REINTERP_US): Likewise.
1318         (TYPES_REINTERP_PS): Likewise.
1319         (aarch64_fold_builtin): New expression folding added.
1320         * config/aarch64/aarch64-simd-builtins.def (REINTERP):
1321         Declarations removed.
1322         (REINTERP_SS): Declarations added.
1323         (REINTERP_US): Likewise.
1324         (REINTERP_PS): Likewise.
1325         (REINTERP_SU): Likewise.
1326         (REINTERP_SP): Likewise.
1327         * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
1328         (vreinterpretq_p8_f64): Likewise.
1329         (vreinterpret_p16_f64): Likewise.
1330         (vreinterpretq_p16_f64): Likewise.
1331         (vreinterpret_f32_f64): Likewise.
1332         (vreinterpretq_f32_f64): Likewise.
1333         (vreinterpret_f64_f32): Likewise.
1334         (vreinterpret_f64_p8): Likewise.
1335         (vreinterpret_f64_p16): Likewise.
1336         (vreinterpret_f64_s8): Likewise.
1337         (vreinterpret_f64_s16): Likewise.
1338         (vreinterpret_f64_s32): Likewise.
1339         (vreinterpret_f64_s64): Likewise.
1340         (vreinterpret_f64_u8): Likewise.
1341         (vreinterpret_f64_u16): Likewise.
1342         (vreinterpret_f64_u32): Likewise.
1343         (vreinterpret_f64_u64): Likewise.
1344         (vreinterpretq_f64_f32): Likewise.
1345         (vreinterpretq_f64_p8): Likewise.
1346         (vreinterpretq_f64_p16): Likewise.
1347         (vreinterpretq_f64_s8): Likewise.
1348         (vreinterpretq_f64_s16): Likewise.
1349         (vreinterpretq_f64_s32): Likewise.
1350         (vreinterpretq_f64_s64): Likewise.
1351         (vreinterpretq_f64_u8): Likewise.
1352         (vreinterpretq_f64_u16): Likewise.
1353         (vreinterpretq_f64_u32): Likewise.
1354         (vreinterpretq_f64_u64): Likewise.
1355         (vreinterpret_s64_f64): Likewise.
1356         (vreinterpretq_s64_f64): Likewise.
1357         (vreinterpret_u64_f64): Likewise.
1358         (vreinterpretq_u64_f64): Likewise.
1359         (vreinterpret_s8_f64): Likewise.
1360         (vreinterpretq_s8_f64): Likewise.
1361         (vreinterpret_s16_f64): Likewise.
1362         (vreinterpretq_s16_f64): Likewise.
1363         (vreinterpret_s32_f64): Likewise.
1364         (vreinterpretq_s32_f64): Likewise.
1365         (vreinterpret_u8_f64): Likewise.
1366         (vreinterpretq_u8_f64): Likewise.
1367         (vreinterpret_u16_f64): Likewise.
1368         (vreinterpretq_u16_f64): Likewise.
1369         (vreinterpret_u32_f64): Likewise.
1370         (vreinterpretq_u32_f64): Likewise.
1371
1372         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1373
1374         * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
1375         * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
1376         (vreinterpret_p8_s8): Likewise.
1377         * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
1378         (vreinterpret_p8_s16): Likewise.
1379         (vreinterpret_p8_s32): Likewise.
1380         (vreinterpret_p8_s64): Likewise.
1381         (vreinterpret_p8_f32): Likewise.
1382         (vreinterpret_p8_u8): Likewise.
1383         (vreinterpret_p8_u16): Likewise.
1384         (vreinterpret_p8_u32): Likewise.
1385         (vreinterpret_p8_u64): Likewise.
1386         (vreinterpret_p8_p16): Likewise.
1387         (vreinterpretq_p8_s8): Likewise.
1388         (vreinterpretq_p8_s16): Likewise.
1389         (vreinterpretq_p8_s32): Likewise.
1390         (vreinterpretq_p8_s64): Likewise.
1391         (vreinterpretq_p8_f32): Likewise.
1392         (vreinterpretq_p8_u8): Likewise.
1393         (vreinterpretq_p8_u16): Likewise.
1394         (vreinterpretq_p8_u32): Likewise.
1395         (vreinterpretq_p8_u64): Likewise.
1396         (vreinterpretq_p8_p16): Likewise.
1397         (vreinterpret_p16_s8): Likewise.
1398         (vreinterpret_p16_s16): Likewise.
1399         (vreinterpret_p16_s32): Likewise.
1400         (vreinterpret_p16_s64): Likewise.
1401         (vreinterpret_p16_f32): Likewise.
1402         (vreinterpret_p16_u8): Likewise.
1403         (vreinterpret_p16_u16): Likewise.
1404         (vreinterpret_p16_u32): Likewise.
1405         (vreinterpret_p16_u64): Likewise.
1406         (vreinterpret_p16_p8): Likewise.
1407         (vreinterpretq_p16_s8): Likewise.
1408         (vreinterpretq_p16_s16): Likewise.
1409         (vreinterpretq_p16_s32): Likewise.
1410         (vreinterpretq_p16_s64): Likewise.
1411         (vreinterpretq_p16_f32): Likewise.
1412         (vreinterpretq_p16_u8): Likewise.
1413         (vreinterpretq_p16_u16): Likewise.
1414         (vreinterpretq_p16_u32): Likewise.
1415         (vreinterpretq_p16_u64): Likewise.
1416         (vreinterpretq_p16_p8): Likewise.
1417         (vreinterpret_f32_s8): Likewise.
1418         (vreinterpret_f32_s16): Likewise.
1419         (vreinterpret_f32_s32): Likewise.
1420         (vreinterpret_f32_s64): Likewise.
1421         (vreinterpret_f32_u8): Likewise.
1422         (vreinterpret_f32_u16): Likewise.
1423         (vreinterpret_f32_u32): Likewise.
1424         (vreinterpret_f32_u64): Likewise.
1425         (vreinterpret_f32_p8): Likewise.
1426         (vreinterpret_f32_p16): Likewise.
1427         (vreinterpretq_f32_s8): Likewise.
1428         (vreinterpretq_f32_s16): Likewise.
1429         (vreinterpretq_f32_s32): Likewise.
1430         (vreinterpretq_f32_s64): Likewise.
1431         (vreinterpretq_f32_u8): Likewise.
1432         (vreinterpretq_f32_u16): Likewise.
1433         (vreinterpretq_f32_u32): Likewise.
1434         (vreinterpretq_f32_u64): Likewise.
1435         (vreinterpretq_f32_p8): Likewise.
1436         (vreinterpretq_f32_p16): Likewise.
1437         (vreinterpret_s64_s8): Likewise.
1438         (vreinterpret_s64_s16): Likewise.
1439         (vreinterpret_s64_s32): Likewise.
1440         (vreinterpret_s64_f32): Likewise.
1441         (vreinterpret_s64_u8): Likewise.
1442         (vreinterpret_s64_u16): Likewise.
1443         (vreinterpret_s64_u32): Likewise.
1444         (vreinterpret_s64_u64): Likewise.
1445         (vreinterpret_s64_p8): Likewise.
1446         (vreinterpret_s64_p16): Likewise.
1447         (vreinterpretq_s64_s8): Likewise.
1448         (vreinterpretq_s64_s16): Likewise.
1449         (vreinterpretq_s64_s32): Likewise.
1450         (vreinterpretq_s64_f32): Likewise.
1451         (vreinterpretq_s64_u8): Likewise.
1452         (vreinterpretq_s64_u16): Likewise.
1453         (vreinterpretq_s64_u32): Likewise.
1454         (vreinterpretq_s64_u64): Likewise.
1455         (vreinterpretq_s64_p8): Likewise.
1456         (vreinterpretq_s64_p16): Likewise.
1457         (vreinterpret_u64_s8): Likewise.
1458         (vreinterpret_u64_s16): Likewise.
1459         (vreinterpret_u64_s32): Likewise.
1460         (vreinterpret_u64_s64): Likewise.
1461         (vreinterpret_u64_f32): Likewise.
1462         (vreinterpret_u64_u8): Likewise.
1463         (vreinterpret_u64_u16): Likewise.
1464         (vreinterpret_u64_u32): Likewise.
1465         (vreinterpret_u64_p8): Likewise.
1466         (vreinterpret_u64_p16): Likewise.
1467         (vreinterpretq_u64_s8): Likewise.
1468         (vreinterpretq_u64_s16): Likewise.
1469         (vreinterpretq_u64_s32): Likewise.
1470         (vreinterpretq_u64_s64): Likewise.
1471         (vreinterpretq_u64_f32): Likewise.
1472         (vreinterpretq_u64_u8): Likewise.
1473         (vreinterpretq_u64_u16): Likewise.
1474         (vreinterpretq_u64_u32): Likewise.
1475         (vreinterpretq_u64_p8): Likewise.
1476         (vreinterpretq_u64_p16): Likewise.
1477         (vreinterpret_s8_s16): Likewise.
1478         (vreinterpret_s8_s32): Likewise.
1479         (vreinterpret_s8_s64): Likewise.
1480         (vreinterpret_s8_f32): Likewise.
1481         (vreinterpret_s8_u8): Likewise.
1482         (vreinterpret_s8_u16): Likewise.
1483         (vreinterpret_s8_u32): Likewise.
1484         (vreinterpret_s8_u64): Likewise.
1485         (vreinterpret_s8_p8): Likewise.
1486         (vreinterpret_s8_p16): Likewise.
1487         (vreinterpretq_s8_s16): Likewise.
1488         (vreinterpretq_s8_s32): Likewise.
1489         (vreinterpretq_s8_s64): Likewise.
1490         (vreinterpretq_s8_f32): Likewise.
1491         (vreinterpretq_s8_u8): Likewise.
1492         (vreinterpretq_s8_u16): Likewise.
1493         (vreinterpretq_s8_u32): Likewise.
1494         (vreinterpretq_s8_u64): Likewise.
1495         (vreinterpretq_s8_p8): Likewise.
1496         (vreinterpretq_s8_p16): Likewise.
1497         (vreinterpret_s16_s8): Likewise.
1498         (vreinterpret_s16_s32): Likewise.
1499         (vreinterpret_s16_s64): Likewise.
1500         (vreinterpret_s16_f32): Likewise.
1501         (vreinterpret_s16_u8): Likewise.
1502         (vreinterpret_s16_u16): Likewise.
1503         (vreinterpret_s16_u32): Likewise.
1504         (vreinterpret_s16_u64): Likewise.
1505         (vreinterpret_s16_p8): Likewise.
1506         (vreinterpret_s16_p16): Likewise.
1507         (vreinterpretq_s16_s8): Likewise.
1508         (vreinterpretq_s16_s32): Likewise.
1509         (vreinterpretq_s16_s64): Likewise.
1510         (vreinterpretq_s16_f32): Likewise.
1511         (vreinterpretq_s16_u8): Likewise.
1512         (vreinterpretq_s16_u16): Likewise.
1513         (vreinterpretq_s16_u32): Likewise.
1514         (vreinterpretq_s16_u64): Likewise.
1515         (vreinterpretq_s16_p8): Likewise.
1516         (vreinterpretq_s16_p16): Likewise.
1517         (vreinterpret_s32_s8): Likewise.
1518         (vreinterpret_s32_s16): Likewise.
1519         (vreinterpret_s32_s64): Likewise.
1520         (vreinterpret_s32_f32): Likewise.
1521         (vreinterpret_s32_u8): Likewise.
1522         (vreinterpret_s32_u16): Likewise.
1523         (vreinterpret_s32_u32): Likewise.
1524         (vreinterpret_s32_u64): Likewise.
1525         (vreinterpret_s32_p8): Likewise.
1526         (vreinterpret_s32_p16): Likewise.
1527         (vreinterpretq_s32_s8): Likewise.
1528         (vreinterpretq_s32_s16): Likewise.
1529         (vreinterpretq_s32_s64): Likewise.
1530         (vreinterpretq_s32_f32): Likewise.
1531         (vreinterpretq_s32_u8): Likewise.
1532         (vreinterpretq_s32_u16): Likewise.
1533         (vreinterpretq_s32_u32): Likewise.
1534         (vreinterpretq_s32_u64): Likewise.
1535         (vreinterpretq_s32_p8): Likewise.
1536         (vreinterpretq_s32_p16): Likewise.
1537         (vreinterpret_u8_s8): Likewise.
1538         (vreinterpret_u8_s16): Likewise.
1539         (vreinterpret_u8_s32): Likewise.
1540         (vreinterpret_u8_s64): Likewise.
1541         (vreinterpret_u8_f32): Likewise.
1542         (vreinterpret_u8_u16): Likewise.
1543         (vreinterpret_u8_u32): Likewise.
1544         (vreinterpret_u8_u64): Likewise.
1545         (vreinterpret_u8_p8): Likewise.
1546         (vreinterpret_u8_p16): Likewise.
1547         (vreinterpretq_u8_s8): Likewise.
1548         (vreinterpretq_u8_s16): Likewise.
1549         (vreinterpretq_u8_s32): Likewise.
1550         (vreinterpretq_u8_s64): Likewise.
1551         (vreinterpretq_u8_f32): Likewise.
1552         (vreinterpretq_u8_u16): Likewise.
1553         (vreinterpretq_u8_u32): Likewise.
1554         (vreinterpretq_u8_u64): Likewise.
1555         (vreinterpretq_u8_p8): Likewise.
1556         (vreinterpretq_u8_p16): Likewise.
1557         (vreinterpret_u16_s8): Likewise.
1558         (vreinterpret_u16_s16): Likewise.
1559         (vreinterpret_u16_s32): Likewise.
1560         (vreinterpret_u16_s64): Likewise.
1561         (vreinterpret_u16_f32): Likewise.
1562         (vreinterpret_u16_u8): Likewise.
1563         (vreinterpret_u16_u32): Likewise.
1564         (vreinterpret_u16_u64): Likewise.
1565         (vreinterpret_u16_p8): Likewise.
1566         (vreinterpret_u16_p16): Likewise.
1567         (vreinterpretq_u16_s8): Likewise.
1568         (vreinterpretq_u16_s16): Likewise.
1569         (vreinterpretq_u16_s32): Likewise.
1570         (vreinterpretq_u16_s64): Likewise.
1571         (vreinterpretq_u16_f32): Likewise.
1572         (vreinterpretq_u16_u8): Likewise.
1573         (vreinterpretq_u16_u32): Likewise.
1574         (vreinterpretq_u16_u64): Likewise.
1575         (vreinterpretq_u16_p8): Likewise.
1576         (vreinterpretq_u16_p16): Likewise.
1577         (vreinterpret_u32_s8): Likewise.
1578         (vreinterpret_u32_s16): Likewise.
1579         (vreinterpret_u32_s32): Likewise.
1580         (vreinterpret_u32_s64): Likewise.
1581         (vreinterpret_u32_f32): Likewise.
1582         (vreinterpret_u32_u8): Likewise.
1583         (vreinterpret_u32_u16): Likewise.
1584         (vreinterpret_u32_u64): Likewise.
1585         (vreinterpret_u32_p8): Likewise.
1586         (vreinterpret_u32_p16): Likewise.
1587         (vreinterpretq_u32_s8): Likewise.
1588         (vreinterpretq_u32_s16): Likewise.
1589         (vreinterpretq_u32_s32): Likewise.
1590         (vreinterpretq_u32_s64): Likewise.
1591         (vreinterpretq_u32_f32): Likewise.
1592         (vreinterpretq_u32_u8): Likewise.
1593         (vreinterpretq_u32_u16): Likewise.
1594         (vreinterpretq_u32_u64): Likewise.
1595         (vreinterpretq_u32_p8): Likewise.
1596         (vreinterpretq_u32_p16): Likewise.
1597
1598 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1599
1600         Backport from trunk r209640.
1601         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1602
1603         * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
1604         Pattern extended.
1605         * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
1606         extended.
1607         (sqabs): Likewise.
1608         * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
1609         (vqnegd_s64): Likewise.
1610         (vqabs_s64): Likewise.
1611         (vqabsd_s64): Likewise.
1612
1613 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1614
1615         Backport from trunk r209627, 209636.
1616         2014-04-22  Renlin  <renlin.li@arm.com>
1617                     Jiong Wang  <jiong.wang@arm.com>
1618
1619         * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
1620         * config/aarch64/aarch64.c (aarch64_layout_frame)
1621         (aarch64_initial_elimination_offset): Likewise.
1622
1623         2014-04-22  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1624
1625         * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
1626         Fix indentation.
1627
1628 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1629
1630         Backport from trunk r209618.
1631         2014-04-22  Renlin Li  <Renlin.Li@arm.com>
1632
1633         * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
1634         the output asm format.
1635
1636 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1637
1638         Backport from trunk r209617.
1639         2014-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
1640
1641         * config/aarch64/aarch64-simd.md
1642         (aarch64_cm<optab>di): Always split.
1643         (*aarch64_cm<optab>di): New.
1644         (aarch64_cmtstdi): Always split.
1645         (*aarch64_cmtstdi): New.
1646
1647 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1648
1649         Backport from trunk r209615.
1650         2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1651
1652         * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
1653         restrictions on core registers for DImode values in Thumb2.
1654
1655 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1656
1657         Backport from trunk r209613, r209614.
1658         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1659
1660         * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
1661         * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
1662
1663         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1664
1665         * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
1666         (*iordi_notzesidi_di): Likewise.
1667         (*iordi_notsesidi_di): Likewise.
1668
1669 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1670
1671         Backport from trunk r209561.
1672         2014-04-22  Ian Bolton  <ian.bolton@arm.com>
1673
1674         * config/arm/arm-protos.h (tune_params): New struct members.
1675         * config/arm/arm.c: Initialise tune_params per processor.
1676         (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
1677         for speed, based on new tune_params.
1678
1679 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1680
1681         Backport from trunk r209559.
1682         2014-04-22  Alex Velenko  <Alex.Velenko@arm.com>
1683
1684         * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
1685         added.
1686         * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
1687         macro.
1688         * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
1689         corrected.
1690         * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
1691         * config/aarch64/arm_neon.h (vrnd_f64): Added.
1692         (vrnda_f64): Likewise.
1693         (vrndi_f64): Likewise.
1694         (vrndm_f64): Likewise.
1695         (vrndn_f64): Likewise.
1696         (vrndp_f64): Likewise.
1697         (vrndx_f64): Likewise.
1698
1699 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1700
1701         Backport from trunk r209419.
1702         2014-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1703
1704         PR rtl-optimization/60663
1705         * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
1706         avoid 0 cost.
1707
1708 2014-05-23  Yvan Roux  <yvan.roux@linaro.org>
1709
1710         Backport from trunk r209457.
1711         2014-04-16  Andrew  Pinski  <apinski@cavium.com>
1712
1713         * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
1714         definition.
1715
1716 2014-05-19  Yvan Roux  <yvan.roux@linaro.org>
1717
1718         * LINARO-VERSION: Bump version.
1719
1720 2014-05-14  Yvan Roux  <yvan.roux@linaro.org>
1721         GCC Linaro 4.9-2014.05 released.
1722         * LINARO-VERSION: Update.
1723
1724 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
1725
1726         Backport from trunk r209889.
1727         2014-04-29  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1728
1729         * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
1730
1731 2014-05-13  Yvan Roux  <yvan.roux@linaro.org>
1732
1733         Backport from trunk r209556.
1734         2014-04-22  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1735
1736         * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
1737         GET_MODE_SIZE argument is enum machine_mode.
1738
1739 2014-04-28  Yvan Roux  <yvan.roux@linaro.org>
1740
1741         * LINARO-VERSION: Bump version.
1742
1743 2014-04-22  Yvan Roux  <yvan.roux@linaro.org>
1744
1745         GCC Linaro 4.9-2014.04 released.
1746         * LINARO-VERSION: New file.
1747         * configure.ac: Add Linaro version string.