gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   4    2008, 2009, 2010, 2011
   5    Free Software Foundation, Inc.
   6    Contributed by Denis Chertykov (chertykov@gmail.com)
   7
   8 This file is part of GCC.
   9
  10 GCC is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 3, or (at your option)
  13 any later version.
  14
  15 GCC is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GCC; see the file COPYING3.  If not see
  22 <http://www.gnu.org/licenses/>.  */
  23
  24 /* Names to predefine in the preprocessor for this target machine.  */
  25
  26 struct base_arch_s
  27 {
  28   /* Assembler only.  */
  29   int asm_only;
  30
  31   /* Core have 'MUL*' instructions.  */
  32   int have_mul;
  33
  34   /* Core have 'CALL' and 'JMP' instructions.  */
  35   int have_jmp_call;
  36
  37   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  38   int have_movw_lpmx;
  39
  40   /* Core have 'ELPM' instructions.  */
  41   int have_elpm;
  42
  43   /* Core have 'ELPM Rx,Z' instructions.  */
  44   int have_elpmx;
  45
  46   /* Core have 'EICALL' and 'EIJMP' instructions.  */
  47   int have_eijmp_eicall;
  48
  49   /* This is an XMEGA core.  */
  50   int xmega_p;
  51
  52   /* This core has the RAMPD special function register
  53      and thus also the RAMPX, RAMPY and RAMPZ registers.  */
  54   int have_rampd;
  55
  56   /* Default start of data section address for architecture.  */
  57   int default_data_section_start;
  58
  59   /* Offset between SFR address and RAM address:
  60      SFR-address = RAM-address - sfr_offset  */
  61   int sfr_offset;
  62
  63   /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
  64   const char *const macro;
  65
  66   /* Architecture name.  */
  67   const char *const arch_name;
  68 };
  69
  70 /* These names are used as the index into the avr_arch_types[] table
  71    above.  */
  72
  73 enum avr_arch
  74 {
  75   ARCH_UNKNOWN,
  76   ARCH_AVR1,
  77   ARCH_AVR2,
  78   ARCH_AVR25,
  79   ARCH_AVR3,
  80   ARCH_AVR31,
  81   ARCH_AVR35,
  82   ARCH_AVR4,
  83   ARCH_AVR5,
  84   ARCH_AVR51,
  85   ARCH_AVR6,
  86   ARCH_AVRXMEGA2,
  87   ARCH_AVRXMEGA4,
  88   ARCH_AVRXMEGA5,
  89   ARCH_AVRXMEGA6,
  90   ARCH_AVRXMEGA7
  91 };
  92
  93 struct mcu_type_s {
  94   /* Device name.  */
  95   const char *const name;
  96
  97   /* Index in avr_arch_types[].  */
  98   int arch;
  99
 100   /* Must lie outside user's namespace.  NULL == no macro.  */
 101   const char *const macro;
 102
 103   /* Stack pointer have 8 bits width.  */
 104   int short_sp;
 105
 106   /* Some AVR devices have a core erratum when skipping a 2-word instruction.
 107      Skip instructions are:  SBRC, SBRS, SBIC, SBIS, CPSE.
 108      Problems will occur with return address is IRQ executes during the
 109      skip sequence.
 110
 111      A support ticket from Atmel returned the following information:
 112
 113          Subject: (ATTicket:644469) On AVR skip-bug core Erratum
 114          From: avr@atmel.com                    Date: 2011-07-27
 115          (Please keep the subject when replying to this mail)
 116
 117          This errata exists only in AT90S8515 and ATmega103 devices.
 118
 119          For information please refer the following respective errata links
 120             http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
 121             http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf  */
 122
 123   /* Core Erratum:  Must not skip 2-word instruction.  */
 124   int errata_skip;
 125
 126   /* Start of data section.  */
 127   int data_section_start;
 128
 129   /* Number of 64k segments in the flash.  */
 130   int n_flash;
 131
 132   /* Name of device library.  */
 133   const char *const library_name;
 134 };
 135
 136 /* Preprocessor macros to define depending on MCU type.  */
 137 extern const char *avr_extra_arch_macro;
 138 extern const struct base_arch_s *avr_current_arch;
 139 extern const struct mcu_type_s *avr_current_device;
 140 extern const struct mcu_type_s avr_mcu_types[];
 141 extern const struct base_arch_s avr_arch_types[];
 142
 143 typedef struct
 144 {
 145   /* Id of the address space as used in c_register_addr_space */
 146   unsigned char id;
 147
 148   /* Flavour of memory: 0 = RAM, 1 = Flash */
 149   int memory_class;
 150
 151   /* Width of pointer (in bytes) */
 152   int pointer_size;
 153
 154   /* Name of the address space as visible to the user */
 155   const char *name;
 156
 157   /* Segment (i.e. 64k memory chunk) number.  */
 158   int segment;
 159 } avr_addrspace_t;
 160
 161 extern const avr_addrspace_t avr_addrspace[];
 162
 163 /* Known address spaces */
 164
 165 enum
 166   {
 167     ADDR_SPACE_RAM,
 168     ADDR_SPACE_FLASH,
 169     ADDR_SPACE_FLASH1,
 170     ADDR_SPACE_FLASH2,
 171     ADDR_SPACE_FLASH3,
 172     ADDR_SPACE_FLASH4,
 173     ADDR_SPACE_FLASH5,
 174     ADDR_SPACE_MEMX
 175   };
 176
 177 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
 178
 179 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
 180 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
 181 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
 182 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
 183 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
 184 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
 185 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
 186 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
 187 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
 188 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm             \
 189                         || avr_current_arch->have_rampd)
 190 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
 191
 192 /* Handling of 8-bit SP versus 16-bit SP is as follows:
 193
 194    -msp8 is used internally to select the right multilib for targets with
 195    8-bit SP.  -msp8 is set automatically by DRIVER_SELF_SPECS for devices
 196    with 8-bit SP or by multilib generation machinery.  If a frame pointer is
 197    needed and SP is only 8 bits wide, SP is zero-extended to get FP.
 198
 199    TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
 200    This option has no effect on multilib selection.  It serves to save some
 201    bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
 202
 203    These two properties are reflected by built-in macros __AVR_SP8__ resp.
 204    __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__.  During multilib generation
 205    there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__.  */
 206
 207 #define AVR_HAVE_8BIT_SP                                                \
 208   (avr_current_device->short_sp || TARGET_TINY_STACK || avr_sp8)
 209
 210 #define AVR_HAVE_SPH (!avr_sp8)
 211
 212 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 213 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 214
 215 #define AVR_XMEGA (avr_current_arch->xmega_p)
 216
 217 #define BITS_BIG_ENDIAN 0
 218 #define BYTES_BIG_ENDIAN 0
 219 #define WORDS_BIG_ENDIAN 0
 220
 221 #ifdef IN_LIBGCC2
 222 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 223 #define UNITS_PER_WORD 4
 224 #else
 225 /* Width of a word, in units (bytes).  */
 226 #define UNITS_PER_WORD 1
 227 #endif
 228
 229 #define POINTER_SIZE 16
 230
 231
 232 /* Maximum sized of reasonable data type
 233    DImode or Dfmode ...  */
 234 #define MAX_FIXED_MODE_SIZE 32
 235
 236 #define PARM_BOUNDARY 8
 237
 238 #define FUNCTION_BOUNDARY 8
 239
 240 #define EMPTY_FIELD_BOUNDARY 8
 241
 242 /* No data type wants to be aligned rounder than this.  */
 243 #define BIGGEST_ALIGNMENT 8
 244
 245 #define TARGET_VTABLE_ENTRY_ALIGN 8
 246
 247 #define STRICT_ALIGNMENT 0
 248
 249 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 250 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 251 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 252 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 253 #define FLOAT_TYPE_SIZE 32
 254 #define DOUBLE_TYPE_SIZE 32
 255 #define LONG_DOUBLE_TYPE_SIZE 32
 256
 257 #define DEFAULT_SIGNED_CHAR 1
 258
 259 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 260 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 261
 262 #define WCHAR_TYPE_SIZE 16
 263
 264 #define FIRST_PSEUDO_REGISTER 36
 265
 266 #define FIXED_REGISTERS {\
 267   1,1,/* r0 r1 */\
 268   0,0,/* r2 r3 */\
 269   0,0,/* r4 r5 */\
 270   0,0,/* r6 r7 */\
 271   0,0,/* r8 r9 */\
 272   0,0,/* r10 r11 */\
 273   0,0,/* r12 r13 */\
 274   0,0,/* r14 r15 */\
 275   0,0,/* r16 r17 */\
 276   0,0,/* r18 r19 */\
 277   0,0,/* r20 r21 */\
 278   0,0,/* r22 r23 */\
 279   0,0,/* r24 r25 */\
 280   0,0,/* r26 r27 */\
 281   0,0,/* r28 r29 */\
 282   0,0,/* r30 r31 */\
 283   1,1,/*  STACK */\
 284   1,1 /* arg pointer */  }
 285
 286 #define CALL_USED_REGISTERS {                   \
 287   1,1,/* r0 r1 */                               \
 288     0,0,/* r2 r3 */                             \
 289     0,0,/* r4 r5 */                             \
 290     0,0,/* r6 r7 */                             \
 291     0,0,/* r8 r9 */                             \
 292     0,0,/* r10 r11 */                           \
 293     0,0,/* r12 r13 */                           \
 294     0,0,/* r14 r15 */                           \
 295     0,0,/* r16 r17 */                           \
 296     1,1,/* r18 r19 */                           \
 297     1,1,/* r20 r21 */                           \
 298     1,1,/* r22 r23 */                           \
 299     1,1,/* r24 r25 */                           \
 300     1,1,/* r26 r27 */                           \
 301     0,0,/* r28 r29 */                           \
 302     1,1,/* r30 r31 */                           \
 303     1,1,/*  STACK */                            \
 304     1,1 /* arg pointer */  }
 305
 306 #define REG_ALLOC_ORDER {                       \
 307     24,25,                                      \
 308     18,19,                                      \
 309     20,21,                                      \
 310     22,23,                                      \
 311     30,31,                                      \
 312     26,27,                                      \
 313     28,29,                                      \
 314     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 315     0,1,                                        \
 316     32,33,34,35                                 \
 317     }
 318
 319 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
 320
 321
 322 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 323
 324 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 325
 326 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 327
 328 enum reg_class {
 329   NO_REGS,
 330   R0_REG,                       /* r0 */
 331   POINTER_X_REGS,               /* r26 - r27 */
 332   POINTER_Y_REGS,               /* r28 - r29 */
 333   POINTER_Z_REGS,               /* r30 - r31 */
 334   STACK_REG,                    /* STACK */
 335   BASE_POINTER_REGS,            /* r28 - r31 */
 336   POINTER_REGS,                 /* r26 - r31 */
 337   ADDW_REGS,                    /* r24 - r31 */
 338   SIMPLE_LD_REGS,               /* r16 - r23 */
 339   LD_REGS,                      /* r16 - r31 */
 340   NO_LD_REGS,                   /* r0 - r15 */
 341   GENERAL_REGS,                 /* r0 - r31 */
 342   ALL_REGS, LIM_REG_CLASSES
 343 };
 344
 345
 346 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 347
 348 #define REG_CLASS_NAMES {                                       \
 349                  "NO_REGS",                                     \
 350                    "R0_REG",    /* r0 */                        \
 351                    "POINTER_X_REGS", /* r26 - r27 */            \
 352                    "POINTER_Y_REGS", /* r28 - r29 */            \
 353                    "POINTER_Z_REGS", /* r30 - r31 */            \
 354                    "STACK_REG", /* STACK */                     \
 355                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 356                    "POINTER_REGS", /* r26 - r31 */              \
 357                    "ADDW_REGS", /* r24 - r31 */                 \
 358                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 359                    "LD_REGS",   /* r16 - r31 */                 \
 360                    "NO_LD_REGS", /* r0 - r15 */                 \
 361                    "GENERAL_REGS", /* r0 - r31 */               \
 362                    "ALL_REGS" }
 363
 364 #define REG_CLASS_CONTENTS {                                            \
 365   {0x00000000,0x00000000},      /* NO_REGS */                           \
 366   {0x00000001,0x00000000},      /* R0_REG */                            \
 367   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 368   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 369   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 370   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 371   {(3 << REG_Y) | (3 << REG_Z),                                         \
 372      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 373   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 374      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 375   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 376      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 377   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 378   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 379      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 380   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 381   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 382   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 383 }
 384
 385 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 386
 387 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 388   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 389
 390 #define INDEX_REG_CLASS NO_REGS
 391
 392 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 393   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 394
 395 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 396
 397 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)                    \
 398   (((REGNO) < 18 && (REGNO) + GET_MODE_SIZE (MODE) > 18)               \
 399    || ((REGNO) < REG_Y && (REGNO) + GET_MODE_SIZE (MODE) > REG_Y)      \
 400    || ((REGNO) < REG_Z && (REGNO) + GET_MODE_SIZE (MODE) > REG_Z))
 401
 402 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 403
 404 #define STACK_PUSH_CODE POST_DEC
 405
 406 #define STACK_GROWS_DOWNWARD
 407
 408 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 409
 410 #define STACK_POINTER_OFFSET 1
 411
 412 #define FIRST_PARM_OFFSET(FUNDECL) 0
 413
 414 #define STACK_BOUNDARY 8
 415
 416 #define STACK_POINTER_REGNUM 32
 417
 418 #define FRAME_POINTER_REGNUM REG_Y
 419
 420 #define ARG_POINTER_REGNUM 34
 421
 422 #define STATIC_CHAIN_REGNUM 2
 423
 424 #define ELIMINABLE_REGS {                                       \
 425       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 426         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 427        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 428
 429 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 430   OFFSET = avr_initial_elimination_offset (FROM, TO)
 431
 432 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 433
 434 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 435    for POST_DEC targets (PR27386).  */
 436 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 437
 438 typedef struct avr_args {
 439   int nregs;                    /* # registers available for passing */
 440   int regno;                    /* next available register number */
 441 } CUMULATIVE_ARGS;
 442
 443 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 444   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 445
 446 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 447
 448 #define DEFAULT_PCC_STRUCT_RETURN 0
 449
 450 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 451
 452 #define HAVE_POST_INCREMENT 1
 453 #define HAVE_PRE_DECREMENT 1
 454
 455 #define MAX_REGS_PER_ADDRESS 1
 456
 457 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 458   do {                                                                  \
 459     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 460                                                ADDR_TYPE (TYPE),        \
 461                                                IND_L, make_memloc);     \
 462     if (new_x)                                                          \
 463       {                                                                 \
 464         X = new_x;                                                      \
 465         goto WIN;                                                       \
 466       }                                                                 \
 467   } while (0)
 468
 469 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 470
 471 #define SLOW_BYTE_ACCESS 0
 472
 473 #define NO_FUNCTION_CSE
 474
 475 #define REGISTER_TARGET_PRAGMAS()                                       \
 476   do {                                                                  \
 477     avr_register_target_pragmas();                                      \
 478   } while (0)
 479
 480 #define TEXT_SECTION_ASM_OP "\t.text"
 481
 482 #define DATA_SECTION_ASM_OP "\t.data"
 483
 484 #define BSS_SECTION_ASM_OP "\t.section .bss"
 485
 486 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 487    There are no shared libraries on this target, and these sections are
 488    placed in the read-only program memory, so they are not writable.  */
 489
 490 #undef CTORS_SECTION_ASM_OP
 491 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 492
 493 #undef DTORS_SECTION_ASM_OP
 494 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 495
 496 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 497
 498 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 499
 500 #define SUPPORTS_INIT_PRIORITY 0
 501
 502 #define JUMP_TABLES_IN_TEXT_SECTION 0
 503
 504 #define ASM_COMMENT_START " ; "
 505
 506 #define ASM_APP_ON "/* #APP */\n"
 507
 508 #define ASM_APP_OFF "/* #NOAPP */\n"
 509
 510 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 511
 512 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 513   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 514
 515 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 516   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 517
 518 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 519   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 520
 521 /* Globalizing directive for a label.  */
 522 #define GLOBAL_ASM_OP ".global\t"
 523
 524 #define SUPPORTS_WEAK 1
 525
 526 #define HAS_INIT_SECTION 1
 527
 528 #define REGISTER_NAMES {                                \
 529   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 530     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 531     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 532     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 533     "__SP_L__","__SP_H__","argL","argH"}
 534
 535 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
 536
 537 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 538 {                                               \
 539   gcc_assert (REGNO < 32);                      \
 540   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 541 }
 542
 543 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 544 {                                               \
 545   gcc_assert (REGNO < 32);                      \
 546   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 547 }
 548
 549 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
 550   avr_output_addr_vec_elt(STREAM, VALUE)
 551
 552 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 553   do {                                                  \
 554       if ((POWER) > 1)                                  \
 555           fprintf (STREAM, "\t.p2align\t%d\n", POWER);  \
 556   } while (0)
 557
 558 #define CASE_VECTOR_MODE HImode
 559
 560 #undef WORD_REGISTER_OPERATIONS
 561
 562 #define MOVE_MAX 4
 563
 564 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 565
 566 #define Pmode HImode
 567
 568 #define FUNCTION_MODE HImode
 569
 570 #define DOLLARS_IN_IDENTIFIERS 0
 571
 572 #define TRAMPOLINE_SIZE 4
 573
 574 /* Store in cc_status the expressions
 575    that the condition codes will describe
 576    after execution of an instruction whose pattern is EXP.
 577    Do not alter them if the instruction would not alter the cc's.  */
 578
 579 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 580
 581 /* The add insns don't set overflow in a usable way.  */
 582 #define CC_OVERFLOW_UNUSABLE 01000
 583 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 584    Z bit is all we need when doing unsigned comparisons on the result of
 585    these insns (since they're always with 0).  However, conditions.h has
 586    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 587    understandable.  */
 588 #define CC_NO_CARRY CC_NO_OVERFLOW
 589
 590
 591 /* Output assembler code to FILE to increment profiler label # LABELNO
 592    for profiling a function entry.  */
 593
 594 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 595   fprintf (FILE, "/* profiler %d */", (LABELNO))
 596
 597 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
 598                                           adjust_insn_length (INSN, LENGTH))
 599
 600 extern const char *avr_device_to_arch (int argc, const char **argv);
 601 extern const char *avr_device_to_data_start (int argc, const char **argv);
 602 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 603 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 604 extern const char *avr_device_to_sp8 (int argc, const char **argv);
 605
 606 #define EXTRA_SPEC_FUNCTIONS                            \
 607   { "device_to_arch", avr_device_to_arch },             \
 608   { "device_to_data_start", avr_device_to_data_start }, \
 609   { "device_to_startfile", avr_device_to_startfiles },  \
 610   { "device_to_devicelib", avr_device_to_devicelib },   \
 611   { "device_to_sp8", avr_device_to_sp8 },
 612
 613 #define DRIVER_SELF_SPECS " %:device_to_sp8(%{mmcu=*:%*}) "
 614 #define CPP_SPEC ""
 615
 616 #define CC1_SPEC ""
 617
 618 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 619     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 620     %{!fexceptions:-fno-exceptions}"
 621 /* A C string constant that tells the GCC driver program options to
 622    pass to `cc1plus'.  */
 623
 624 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 625 mmcu=*:-mmcu=%*} \
 626 %{mmcu=*:%{!mmcu=avr2:%{!mmcu=at90s8515:%{!mmcu=avr31:%{!mmcu=atmega103:\
 627 -mno-skip-bug}}}}}"
 628
 629 #define LINK_SPEC "\
 630 %{mrelax:--relax\
 631          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 632                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 633                              %{mmcu=atmega32*|\
 634                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 635                              %{mmcu=atmega64*|\
 636                                mmcu=at90can64*|\
 637                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 638 %:device_to_arch(%{mmcu=*:%*})\
 639 %:device_to_data_start(%{mmcu=*:%*})"
 640
 641 #define LIB_SPEC \
 642   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 643
 644 #define LIBSTDCXX "gcc"
 645 /* No libstdc++ for now.  Empty string doesn't work.  */
 646
 647 #define LIBGCC_SPEC \
 648   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 649
 650 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 651
 652 #define ENDFILE_SPEC ""
 653
 654 /* This is the default without any -mmcu=* option (AT90S*).  */
 655 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 656
 657 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 658   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 659
 660 #define CR_TAB "\n\t"
 661
 662 #define DWARF2_ADDR_SIZE 4
 663
 664 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 665 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 666
 667 /* The caller's stack pointer value immediately before the call
 668    is one byte below the first argument.  */
 669 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 670
 671 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 672   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 673
 674 /* A C structure for machine-specific, per-function data.
 675    This is added to the cfun structure.  */
 676 struct GTY(()) machine_function
 677 {
 678   /* 'true' - if current function is a naked function.  */
 679   int is_naked;
 680
 681   /* 'true' - if current function is an interrupt function
 682      as specified by the "interrupt" attribute.  */
 683   int is_interrupt;
 684
 685   /* 'true' - if current function is a signal function
 686      as specified by the "signal" attribute.  */
 687   int is_signal;
 688
 689   /* 'true' - if current function is a 'task' function
 690      as specified by the "OS_task" attribute.  */
 691   int is_OS_task;
 692
 693   /* 'true' - if current function is a 'main' function
 694      as specified by the "OS_main" attribute.  */
 695   int is_OS_main;
 696
 697   /* Current function stack size.  */
 698   int stack_usage;
 699
 700   /* 'true' if a callee might be tail called */
 701   int sibcall_fails;
 702 };
 703
 704 /* AVR does not round pushes, but the existance of this macro is
 705    required in order for pushes to be generated.  */
 706 #define PUSH_ROUNDING(X)        (X)
 707
 708 /* Define prototype here to avoid build warning.  Some files using
 709    ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
 710    tm.h but not tm_p.h.  */
 711 extern int avr_accumulate_outgoing_args (void);
 712 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 713
 714 #define INIT_EXPANDERS avr_init_expanders()