| blob | 1dd4908da557dbae520b70d8bafad6217f8979cc |
1 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
2 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* Things to do:
23 - longlong.h?
24 */
26 /* ??? Create elf.h and have svr4.h include it. */
29 #undef SWITCH_TAKES_ARG
30 #undef WORD_SWITCH_TAKES_ARG
31 #undef HANDLE_SYSV_PRAGMA
32 #undef SIZE_TYPE
33 #undef PTRDIFF_TYPE
34 #undef WCHAR_TYPE
35 #undef WCHAR_TYPE_SIZE
36 #undef ASM_FILE_START
37 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
38 #undef TARGET_VERSION
39 #undef CPP_SPEC
40 #undef ASM_SPEC
41 #undef LINK_SPEC
42 #undef STARTFILE_SPEC
43 #undef ENDFILE_SPEC
44 #undef SUBTARGET_SWITCHES
45 \f
46 /* Print subsidiary information on the compiler version in use. */
47 #ifndef TARGET_VERSION
49 #endif
51 /* Switch Recognition by gcc.c. Add -G xx support */
53 #undef SWITCH_TAKES_ARG
54 #define SWITCH_TAKES_ARG(CHAR) \
57 /* Names to predefine in the preprocessor for this target machine. */
58 /* __M32R__ is defined by the existing compiler so we use that. */
61 /* This macro defines names of additional specifications to put in the specs
62 that can be used in various specifications like CC1_SPEC. Its definition
63 is an initializer with a subgrouping for each command option.
65 Each subgrouping contains a string constant, that defines the
66 specification name, and a string constant that used by the GNU CC driver
67 program.
69 Do not define this macro if it does not need to do anything. */
71 #ifndef SUBTARGET_EXTRA_SPECS
72 #define SUBTARGET_EXTRA_SPECS
73 #endif
75 #ifndef ASM_CPU_SPEC
77 #endif
79 #ifndef CPP_CPU_SPEC
81 #endif
83 #ifndef CC1_CPU_SPEC
85 #endif
87 #ifndef LINK_CPU_SPEC
89 #endif
91 #ifndef STARTFILE_CPU_SPEC
93 #endif
95 #ifndef ENDFILE_CPU_SPEC
97 #endif
99 #ifndef RELAX_SPEC
102 #else
104 #endif
105 #endif
107 #define EXTRA_SPECS \
115 SUBTARGET_EXTRA_SPECS
119 /* Options to pass on to the assembler. */
120 #undef ASM_SPEC
123 #undef ASM_FINAL_SPEC
127 #undef STARTFILE_SPEC
130 #undef ENDFILE_SPEC
133 #undef LIB_SPEC
134 \f
135 /* Run-time compilation parameters selecting different hardware subsets. */
139 /* If non-zero, tell the linker to do relaxing.
140 We don't do anything with the option, other than recognize it.
141 LINK_SPEC handles passing -relax to the linker.
142 This can cause incorrect debugging information as line numbers may
143 turn out wrong. This shouldn't be specified unless accompanied with -O2
144 [where the user expects debugging information to be less accurate]. */
145 #define TARGET_RELAX_MASK (1 << 0)
147 /* For miscellaneous debugging purposes. */
148 #define TARGET_DEBUG_MASK (1 << 1)
149 #define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)
151 /* Align loops to 32 byte boundaries (cache line size). */
152 /* ??? This option is experimental and is not documented. */
153 #define TARGET_ALIGN_LOOPS_MASK (1 << 2)
154 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)
156 /* Change issue rate. */
157 #define TARGET_ISSUE_RATE_MASK (1 << 3)
158 #define TARGET_ISSUE_RATE (target_flags & TARGET_ISSUE_RATE_MASK)
160 /* Change branch cost */
161 #define TARGET_BRANCH_COST_MASK (1 << 4)
162 #define TARGET_BRANCH_COST (target_flags & TARGET_BRANCH_COST_MASK)
164 /* Target machine to compile for. */
165 #define TARGET_M32R 1
167 /* Macro to define tables used to set the flags.
168 This is a list in braces of pairs in braces,
169 each pair being { "NAME", VALUE }
170 where VALUE is the bits to set or minus the bits to clear.
171 An empty string NAME is used to identify the default VALUE. */
173 #ifndef SUBTARGET_SWITCHES
174 #define SUBTARGET_SWITCHES
175 #endif
177 #ifndef TARGET_DEFAULT
178 #define TARGET_DEFAULT 0
179 #endif
181 #define TARGET_SWITCHES \
182 { \
183 /* { "relax", TARGET_RELAX_MASK, "" }, \
196 SUBTARGET_SWITCHES \
198 }
203 #ifndef SUBTARGET_OPTIONS
204 #define SUBTARGET_OPTIONS
205 #endif
207 #define TARGET_OPTIONS \
208 { \
213 SUBTARGET_OPTIONS \
214 }
216 /* Code Models
218 Code models are used to select between two choices of two separate
219 possibilities (address space size, call insn to use):
221 small: addresses use 24 bits, use bl to make calls
222 medium: addresses use 32 bits, use bl to make calls (*1)
223 large: addresses use 32 bits, use seth/add3/jl to make calls (*2)
225 The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but
226 using this one doesn't make much sense.
228 (*1) The linker may eventually be able to relax seth/add3 -> ld24.
229 (*2) The linker may eventually be able to relax seth/add3/jl -> bl.
231 Internally these are recorded as TARGET_ADDR{24,32} and
232 TARGET_CALL{26,32}.
234 The __model__ attribute can be used to select the code model to use when
235 accessing particular objects. */
240 #define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL)
241 #define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)
242 #define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE)
243 #define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL)
244 #define TARGET_ADDR32 (! TARGET_ADDR24)
245 #define TARGET_CALL26 (! TARGET_CALL32)
246 #define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE)
248 /* The default is the small model. */
249 #ifndef M32R_MODEL_DEFAULT
251 #endif
253 /* Small Data Area
255 The SDA consists of sections .sdata, .sbss, and .scommon.
256 .scommon isn't a real section, symbols in it have their section index
257 set to SHN_M32R_SCOMMON, though support for it exists in the linker script.
259 Two switches control the SDA:
261 -G NNN - specifies the maximum size of variable to go in the SDA
263 -msdata=foo - specifies how such variables are handled
265 -msdata=none - small data area is disabled
267 -msdata=sdata - small data goes in the SDA, special code isn't
268 generated to use it, and special relocs aren't
269 generated
271 -msdata=use - small data goes in the SDA, special code is generated
272 to use the SDA and special relocs are generated
274 The SDA is not multilib'd, it isn't necessary.
275 MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd
276 libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use
277 -msdata=use will successfully link with them (references in header files
278 will cause the compiler to emit code that refers to library objects in
279 .data). ??? There can be a problem if the user passes a -G value greater
280 than the default and a library object in a header file is that size.
281 The default is 8 so this should be rare - if it occurs the user
282 is required to rebuild the libraries or use a smaller value for -G.
283 */
285 /* Maximum size of variables that go in .sdata/.sbss.
286 The -msdata=foo switch also controls how small variables are handled. */
287 #ifndef SDATA_DEFAULT_SIZE
288 #define SDATA_DEFAULT_SIZE 8
289 #endif
297 #define TARGET_SDATA_NONE (m32r_sdata == M32R_SDATA_NONE)
298 #define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA)
299 #define TARGET_SDATA_USE (m32r_sdata == M32R_SDATA_USE)
301 /* Default is to disable the SDA
302 [for upward compatibility with previous toolchains]. */
303 #ifndef M32R_SDATA_DEFAULT
305 #endif
307 /* Define this macro as a C expression for the initializer of an array of
308 strings to tell the driver program which options are defaults for this
309 target and thus do not need to be handled specially when using
310 `MULTILIB_OPTIONS'. */
311 #ifndef SUBTARGET_MULTILIB_DEFAULTS
312 #define SUBTARGET_MULTILIB_DEFAULTS
313 #endif
315 #ifndef MULTILIB_DEFAULTS
317 #endif
319 /* Sometimes certain combinations of command options do not make
320 sense on a particular target machine. You can define a macro
321 `OVERRIDE_OPTIONS' to take account of this. This macro, if
322 defined, is executed once just after all the command options have
323 been parsed.
325 Don't use this macro to turn on various extra optimizations for
326 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
328 #ifndef SUBTARGET_OVERRIDE_OPTIONS
329 #define SUBTARGET_OVERRIDE_OPTIONS
330 #endif
332 #define OVERRIDE_OPTIONS \
333 do \
334 { \
335 /* These need to be done at start up. \
337 m32r_init (); \
338 SUBTARGET_OVERRIDE_OPTIONS \
339 } \
340 while (0)
342 #ifndef SUBTARGET_OPTIMIZATION_OPTIONS
343 #define SUBTARGET_OPTIMIZATION_OPTIONS
344 #endif
346 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
347 do \
348 { \
349 if (LEVEL == 1) \
350 flag_regmove = TRUE; \
351 \
352 if (SIZE) \
353 { \
354 flag_omit_frame_pointer = TRUE; \
355 flag_strength_reduce = FALSE; \
356 } \
357 \
358 SUBTARGET_OPTIMIZATION_OPTIONS \
359 } \
360 while (0)
362 /* Define this macro if debugging can be performed even without a
363 frame pointer. If this macro is defined, GNU CC will turn on the
364 `-fomit-frame-pointer' option whenever `-O' is specified. */
365 #define CAN_DEBUG_WITHOUT_FP
366 \f
367 /* Target machine storage layout. */
369 /* Define to use software floating point emulator for REAL_ARITHMETIC and
370 decimal <-> binary conversion. */
371 #define REAL_ARITHMETIC
373 /* Define this if most significant bit is lowest numbered
374 in instructions that operate on numbered bit-fields. */
375 #define BITS_BIG_ENDIAN 1
377 /* Define this if most significant byte of a word is the lowest numbered. */
378 #define BYTES_BIG_ENDIAN 1
380 /* Define this if most significant word of a multiword number is the lowest
381 numbered. */
382 #define WORDS_BIG_ENDIAN 1
384 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must
385 be a constant value with the same meaning as WORDS_BIG_ENDIAN,
386 which will be used only when compiling libgcc2.c. Typically the
387 value will be set based on preprocessor defines. */
388 /*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/
390 /* Number of bits in an addressable storage unit. */
391 #define BITS_PER_UNIT 8
393 /* Width in bits of a "word", which is the contents of a machine register.
394 Note that this is not necessarily the width of data type `int';
395 if using 16-bit ints on a 68000, this would still be 32.
396 But on a machine with 16-bit registers, this would be 16. */
397 #define BITS_PER_WORD 32
399 /* Width of a word, in units (bytes). */
400 #define UNITS_PER_WORD 4
402 /* Define this macro if it is advisable to hold scalars in registers
403 in a wider mode than that declared by the program. In such cases,
404 the value is constrained to be within the bounds of the declared
405 type, but kept valid in the wider mode. The signedness of the
406 extension may differ from that of the type. */
407 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
408 if (GET_MODE_CLASS (MODE) == MODE_INT \
409 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
410 { \
411 (MODE) = SImode; \
412 }
414 /* Define this macro if the promotion described by `PROMOTE_MODE'
415 should also be done for outgoing function arguments. */
416 /*#define PROMOTE_FUNCTION_ARGS*/
418 /* Likewise, if the function return value is promoted.
419 If defined, FUNCTION_VALUE must perform the same promotions done by
420 PROMOTE_MODE. */
421 /*#define PROMOTE_FUNCTION_RETURN*/
423 /* Width in bits of a pointer.
424 See also the macro `Pmode' defined below. */
425 #define POINTER_SIZE 32
427 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
428 #define PARM_BOUNDARY 32
430 /* Boundary (in *bits*) on which stack pointer should be aligned. */
431 #define STACK_BOUNDARY 32
433 /* ALIGN FRAMES on word boundaries */
434 #define M32R_STACK_ALIGN(LOC) (((LOC)+3) & ~3)
436 /* Allocation boundary (in *bits*) for the code of a function. */
437 #define FUNCTION_BOUNDARY 32
439 /* Alignment of field after `int : 0' in a structure. */
440 #define EMPTY_FIELD_BOUNDARY 32
442 /* Every structure's size must be a multiple of this. */
443 #define STRUCTURE_SIZE_BOUNDARY 8
445 /* A bitfield declared as `int' forces `int' alignment for the struct. */
446 #define PCC_BITFIELD_TYPE_MATTERS 1
448 /* No data type wants to be aligned rounder than this. */
449 #define BIGGEST_ALIGNMENT 32
451 /* The best alignment to use in cases where we have a choice. */
452 #define FASTEST_ALIGNMENT 32
454 /* Make strings word-aligned so strcpy from constants will be faster. */
455 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
456 ((TREE_CODE (EXP) == STRING_CST \
457 && (ALIGN) < FASTEST_ALIGNMENT) \
458 ? FASTEST_ALIGNMENT : (ALIGN))
460 /* Make arrays of chars word-aligned for the same reasons. */
461 #define DATA_ALIGNMENT(TYPE, ALIGN) \
462 (TREE_CODE (TYPE) == ARRAY_TYPE \
463 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
464 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
466 /* Set this nonzero if move instructions will actually fail to work
467 when given unaligned data. */
468 #define STRICT_ALIGNMENT 1
469 \f
470 /* Layout of source language data types. */
472 #define SHORT_TYPE_SIZE 16
473 #define INT_TYPE_SIZE 32
474 #define LONG_TYPE_SIZE 32
475 #define LONG_LONG_TYPE_SIZE 64
476 #define FLOAT_TYPE_SIZE 32
477 #define DOUBLE_TYPE_SIZE 64
478 #define LONG_DOUBLE_TYPE_SIZE 64
480 /* Define this as 1 if `char' should by default be signed; else as 0. */
481 #define DEFAULT_SIGNED_CHAR 1
486 #define WCHAR_TYPE_SIZE 16
488 /* Define results of standard character escape sequences. */
489 #define TARGET_BELL 007
490 #define TARGET_BS 010
491 #define TARGET_TAB 011
492 #define TARGET_NEWLINE 012
493 #define TARGET_VT 013
494 #define TARGET_FF 014
495 #define TARGET_CR 015
496 \f
497 /* Standard register usage. */
499 /* Number of actual hardware registers.
500 The hardware registers are assigned numbers for the compiler
501 from 0 to just below FIRST_PSEUDO_REGISTER.
502 All registers that the compiler knows about must be given numbers,
503 even those that are not normally considered general registers. */
505 #define M32R_NUM_REGISTERS 19
507 #ifndef SUBTARGET_NUM_REGISTERS
508 #define SUBTARGET_NUM_REGISTERS 0
509 #endif
511 #define FIRST_PSEUDO_REGISTER (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS)
513 /* 1 for registers that have pervasive standard uses
514 and are not available for the register allocator.
516 0-3 - arguments/results
517 4-5 - call used [4 is used as a tmp during prologue/epilogue generation]
518 6 - call used, gptmp
519 7 - call used, static chain pointer
520 8-11 - call saved
521 12 - call saved [reserved for global pointer]
522 13 - frame pointer
523 14 - subroutine link register
524 15 - stack pointer
525 16 - arg pointer
526 17 - carry flag
527 18 - accumulator
529 By default, the extension registers are not available. */
531 #ifndef SUBTARGET_FIXED_REGISTERS
532 #define SUBTARGET_FIXED_REGISTERS
533 #endif
535 #define FIXED_REGISTERS \
536 { \
537 0, 0, 0, 0, 0, 0, 0, 0, \
538 0, 0, 0, 0, 0, 0, 0, 1, \
539 1, 1, 1 \
540 SUBTARGET_FIXED_REGISTERS \
541 }
543 /* 1 for registers not available across function calls.
544 These must include the FIXED_REGISTERS and also any
545 registers that can be used without being saved.
546 The latter must include the registers where values are returned
547 and the register where structure-value addresses are passed.
548 Aside from that, you can include as many other registers as you like. */
550 #ifndef SUBTARGET_CALL_USED_REGISTERS
551 #define SUBTARGET_CALL_USED_REGISTERS
552 #endif
554 #define CALL_USED_REGISTERS \
555 { \
556 1, 1, 1, 1, 1, 1, 1, 1, \
557 0, 0, 0, 0, 0, 0, 1, 1, \
558 1, 1, 1 \
559 SUBTARGET_CALL_USED_REGISTERS \
560 }
562 /* Zero or more C statements that may conditionally modify two variables
563 `fixed_regs' and `call_used_regs' (both of type `char []') after they
564 have been initialized from the two preceding macros.
566 This is necessary in case the fixed or call-clobbered registers depend
567 on target flags.
569 You need not define this macro if it has no work to do. */
571 #ifdef SUBTARGET_CONDITIONAL_REGISTER_USAGE
572 #define CONDITIONAL_REGISTER_USAGE SUBTARGET_CONDITIONAL_REGISTER_USAGE
573 #endif
575 /* If defined, an initializer for a vector of integers, containing the
576 numbers of hard registers in the order in which GNU CC should
577 prefer to use them (from most preferred to least). */
579 #ifndef SUBTARGET_REG_ALLOC_ORDER
580 #define SUBTARGET_REG_ALLOC_ORDER
581 #endif
584 #define REG_ALLOC_ORDER \
585 { \
586 4, 5, 6, 7, 2, 3, 8, 9, 10, \
587 11, 12, 13, 14, 0, 1, 15, 16, 17, 18 \
588 SUBTARGET_REG_ALLOC_ORDER \
589 }
592 #define REG_ALLOC_ORDER \
593 { \
594 0, 1, 2, 3, 4, 5, 6, 7, 8, \
595 9, 10, 11, 12, 13, 14, 15, 16, 17, 18 \
596 SUBTARGET_REG_ALLOC_ORDER \
597 }
598 #endif
600 /* Return number of consecutive hard regs needed starting at reg REGNO
601 to hold something of mode MODE.
602 This is ordinarily the length in words of a value of mode MODE
603 but can be less for certain modes in special long registers. */
604 #define HARD_REGNO_NREGS(REGNO, MODE) \
605 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
607 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
610 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
611 ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
613 /* A C expression that is nonzero if it is desirable to choose
614 register allocation so as to avoid move instructions between a
615 value of mode MODE1 and a value of mode MODE2.
617 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
618 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
619 MODE2)' must be zero. */
621 /* Tie QI/HI/SI modes together. */
622 #define MODES_TIEABLE_P(MODE1, MODE2) \
623 (GET_MODE_CLASS (MODE1) == MODE_INT \
624 && GET_MODE_CLASS (MODE2) == MODE_INT \
625 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
626 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
627 \f
628 /* Register classes and constants. */
630 /* Define the classes of registers for register constraints in the
631 machine description. Also define ranges of constants.
633 One of the classes must always be named ALL_REGS and include all hard regs.
634 If there is more than one class, another class must be named NO_REGS
635 and contain no registers.
637 The name GENERAL_REGS must be the name of a class (or an alias for
638 another name such as ALL_REGS). This is the class of registers
639 that is allowed by "g" or "r" in a register constraint.
640 Also, registers outside this class are allocated only when
641 instructions express preferences for them.
643 The classes must be numbered in nondecreasing order; that is,
644 a larger-numbered class must never be contained completely
645 in a smaller-numbered class.
647 For any two classes, it is very desirable that there be another
648 class that represents their union.
650 It is important that any condition codes have class NO_REGS.
651 See `register_operand'. */
653 enum reg_class
654 {
656 };
658 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
660 /* Give names of register classes as strings for dump file. */
661 #define REG_CLASS_NAMES \
664 /* Define which registers fit in which classes.
665 This is an initializer for a vector of HARD_REG_SET
666 of length N_REG_CLASSES. */
668 #ifndef SUBTARGET_REG_CLASS_CARRY
669 #define SUBTARGET_REG_CLASS_CARRY 0
670 #endif
672 #ifndef SUBTARGET_REG_CLASS_ACCUM
673 #define SUBTARGET_REG_CLASS_ACCUM 0
674 #endif
676 #ifndef SUBTARGET_REG_CLASS_GENERAL
677 #define SUBTARGET_REG_CLASS_GENERAL 0
678 #endif
680 #ifndef SUBTARGET_REG_CLASS_ALL
681 #define SUBTARGET_REG_CLASS_ALL 0
682 #endif
684 #define REG_CLASS_CONTENTS \
685 { \
686 { 0x00000 }, \
687 { 0x20000 | SUBTARGET_REG_CLASS_CARRY }, \
688 { 0x40000 | SUBTARGET_REG_CLASS_ACCUM }, \
689 { 0x1ffff | SUBTARGET_REG_CLASS_GENERAL }, \
690 { 0x7ffff | SUBTARGET_REG_CLASS_ALL }, \
691 }
693 /* The same information, inverted:
694 Return the class number of the smallest class containing
695 reg number REGNO. This could be a conditional expression
696 or could index an array. */
698 #define REGNO_REG_CLASS(REGNO) (m32r_regno_reg_class[REGNO])
700 /* The class value for index registers, and the one for base regs. */
701 #define INDEX_REG_CLASS GENERAL_REGS
702 #define BASE_REG_CLASS GENERAL_REGS
704 #define REG_CLASS_FROM_LETTER(C) \
707 : NO_REGS)
709 /* These assume that REGNO is a hard or pseudo reg number.
710 They give nonzero only if REGNO is a hard reg of the suitable class
711 or a pseudo reg currently allocated to a suitable hard reg.
712 Since they use reg_renumber, they are safe only once reg_renumber
713 has been allocated, which happens in local-alloc.c. */
714 #define REGNO_OK_FOR_BASE_P(REGNO) \
715 ((REGNO) < FIRST_PSEUDO_REGISTER \
716 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \
717 : GPR_P (reg_renumber[REGNO]))
718 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
720 /* Given an rtx X being reloaded into a reg required to be
721 in class CLASS, return the class of reg to actually use.
722 In general this is just CLASS; but on some machines
723 in some cases it is preferable to use a more restrictive class. */
724 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
725 (CLASS)
727 /* Return the maximum number of consecutive registers
728 needed to represent mode MODE in a register of class CLASS. */
729 #define CLASS_MAX_NREGS(CLASS, MODE) \
730 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
732 /* The letters I, J, K, L, M, N, O, P in a register constraint string
733 can be used to stand for particular ranges of immediate operands.
734 This macro defines what the ranges are.
735 C is the letter, and VALUE is a constant value.
736 Return 1 if VALUE is in the range specified by C. */
737 /* 'I' is used for 8 bit signed immediates.
738 'J' is used for 16 bit signed immediates.
739 'K' is used for 16 bit unsigned immediates.
740 'L' is used for 16 bit immediates left shifted by 16 (sign ???).
741 'M' is used for 24 bit unsigned immediates.
742 'N' is used for any 32 bit non-symbolic value.
743 'O' is used for 5 bit unsigned immediates (shift count).
744 'P' is used for 16 bit signed immediates for compares
745 (values in the range -32767 to +32768). */
747 /* Return true if a value is inside a range. */
748 #define IN_RANGE_P(VALUE, LOW, HIGH) \
749 (((unsigned HOST_WIDE_INT)((VALUE) - (LOW))) \
750 <= ((unsigned HOST_WIDE_INT)((HIGH) - (LOW))))
752 /* Local to this file. */
753 #define INT8_P(X) ((X) >= -0x80 && (X) <= 0x7f)
754 #define INT16_P(X) ((X) >= -0x8000 && (X) <= 0x7fff)
755 #define CMP_INT16_P(X) ((X) >= -0x7fff && (X) <= 0x8000)
756 #define UINT16_P(X) (((unsigned HOST_WIDE_INT)(X)) <= 0xffff)
757 #define UPPER16_P(X) (((X) & 0xffff) == 0 \
758 && ((X) >> 16) >= -0x8000 \
759 && ((X) >> 16) <= 0x7fff)
760 #define UINT24_P(X) (((unsigned HOST_WIDE_INT) (X)) < 0x1000000)
761 #define INT32_P(X) (((X) >= -(HOST_WIDE_INT) 0x80000000 \
762 && (X) <= (HOST_WIDE_INT) 0x7fffffff) \
763 || (unsigned HOST_WIDE_INT) (X) <= 0xffffffff)
764 #define UINT5_P(X) ((X) >= 0 && (X) < 32)
765 #define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)
767 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
776 : 0)
778 /* Similar, but for floating constants, and defining letters G and H.
779 Here VALUE is the CONST_DOUBLE rtx itself.
780 For the m32r, handle a few constants inline.
781 ??? We needn't treat DI and DF modes differently, but for now we do. */
782 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
785 : 0)
787 /* A C expression that defines the optional machine-dependent constraint
788 letters that can be used to segregate specific types of operands,
789 usually memory references, for the target machine. It should return 1 if
790 VALUE corresponds to the operand type represented by the constraint letter
791 C. If C is not defined as an extra constraint, the value returned should
792 be 0 regardless of VALUE. */
793 /* Q is for symbolic addresses loadable with ld24.
794 R is for symbolic addresses when ld24 can't be used.
795 S is for stores with pre {inc,dec}rement
796 T is for indirect of a pointer.
797 U is for loads with post increment. */
799 #define EXTRA_CONSTRAINT(VALUE, C) \
801 || addr24_operand (VALUE, VOIDmode)) \
803 || addr32_operand (VALUE, VOIDmode)) \
805 && STORE_PREINC_PREDEC_P (GET_MODE (VALUE), \
806 XEXP (VALUE, 0))) \
808 && memreg_operand (VALUE, GET_MODE (VALUE))) \
810 && LOAD_POSTINC_P (GET_MODE (VALUE), \
811 XEXP (VALUE, 0))) \
812 : 0)
813 \f
814 /* Stack layout and stack pointer usage. */
816 /* Define this macro if pushing a word onto the stack moves the stack
817 pointer to a smaller address. */
818 #define STACK_GROWS_DOWNWARD
820 /* Define this if the nominal address of the stack frame
821 is at the high-address end of the local variables;
822 that is, each additional local variable allocated
823 goes at a more negative offset from the frame pointer. */
824 /*#define FRAME_GROWS_DOWNWARD*/
826 /* Offset from frame pointer to start allocating local variables at.
827 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
828 first local allocated. Otherwise, it is the offset to the BEGINNING
829 of the first local allocated. */
830 /* The frame pointer points at the same place as the stack pointer, except if
831 alloca has been called. */
832 #define STARTING_FRAME_OFFSET \
833 M32R_STACK_ALIGN (current_function_outgoing_args_size)
835 /* Offset from the stack pointer register to the first location at which
836 outgoing arguments are placed. */
837 #define STACK_POINTER_OFFSET 0
839 /* Offset of first parameter from the argument pointer register value. */
840 #define FIRST_PARM_OFFSET(FNDECL) 0
842 /* A C expression whose value is RTL representing the address in a
843 stack frame where the pointer to the caller's frame is stored.
844 Assume that FRAMEADDR is an RTL expression for the address of the
845 stack frame itself.
847 If you don't define this macro, the default is to return the value
848 of FRAMEADDR--that is, the stack frame address is also the address
849 of the stack word that points to the previous frame. */
850 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
852 /* A C expression whose value is RTL representing the value of the
853 return address for the frame COUNT steps up from the current frame.
854 FRAMEADDR is the frame pointer of the COUNT frame, or the frame
855 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
856 is defined. */
857 /* The current return address is in r14. */
859 #define RETURN_ADDR_RTX(COUNT, FRAME) \
860 (((COUNT) == -1) \
861 ? gen_rtx_REG (Pmode, 14) \
862 : copy_to_reg (gen_rtx_MEM (Pmode, \
863 memory_address (Pmode, \
864 plus_constant ((FRAME), \
865 UNITS_PER_WORD)))))
866 #endif
868 /* Register to use for pushing function arguments. */
869 #define STACK_POINTER_REGNUM 15
871 /* Base register for access to local variables of the function. */
872 #define FRAME_POINTER_REGNUM 13
874 /* Base register for access to arguments of the function. */
875 #define ARG_POINTER_REGNUM 16
877 /* The register number of the return address pointer register, which
878 is used to access the current function's return address from the
879 stack. On some machines, the return address is not at a fixed
880 offset from the frame pointer or stack pointer or argument
881 pointer. This register can be defined to point to the return
882 address on the stack, and then be converted by `ELIMINABLE_REGS'
883 into either the frame pointer or stack pointer.
885 Do not define this macro unless there is no other way to get the
886 return address from the stack. */
887 /* ??? revisit */
888 /* #define RETURN_ADDRESS_POINTER_REGNUM */
890 /* Register in which static-chain is passed to a function. This must
891 not be a register used by the prologue. */
892 #define STATIC_CHAIN_REGNUM 7
894 /* These aren't official macros. */
895 #define PROLOGUE_TMP_REGNUM 4
896 #define RETURN_ADDR_REGNUM 14
897 /* #define GP_REGNUM 12 */
898 #define CARRY_REGNUM 17
899 #define ACCUM_REGNUM 18
900 #define M32R_MAX_INT_REGS 16
902 #ifndef SUBTARGET_GPR_P
903 #define SUBTARGET_GPR_P(REGNO) 0
904 #endif
906 #ifndef SUBTARGET_ACCUM_P
907 #define SUBTARGET_ACCUM_P(REGNO) 0
908 #endif
910 #ifndef SUBTARGET_CARRY_P
911 #define SUBTARGET_CARRY_P(REGNO) 0
912 #endif
914 #define GPR_P(REGNO) (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO))
915 #define ACCUM_P(REGNO) ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO))
916 #define CARRY_P(REGNO) ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO))
917 \f
918 /* Eliminating the frame and arg pointers. */
920 /* A C expression which is nonzero if a function must have and use a
921 frame pointer. This expression is evaluated in the reload pass.
922 If its value is nonzero the function will have a frame pointer. */
923 #define FRAME_POINTER_REQUIRED current_function_calls_alloca
925 #if 0
926 /* C statement to store the difference between the frame pointer
927 and the stack pointer values immediately after the function prologue.
928 If `ELIMINABLE_REGS' is defined, this macro will be not be used and
929 need not be defined. */
930 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
931 ((VAR) = m32r_compute_frame_size (get_frame_size ()))
932 #endif
934 /* If defined, this macro specifies a table of register pairs used to
935 eliminate unneeded registers that point into the stack frame. If
936 it is not defined, the only elimination attempted by the compiler
937 is to replace references to the frame pointer with references to
938 the stack pointer.
940 Note that the elimination of the argument pointer with the stack
941 pointer is specified first since that is the preferred elimination. */
943 #define ELIMINABLE_REGS \
944 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
945 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
946 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }}
948 /* A C expression that returns non-zero if the compiler is allowed to
949 try to replace register number FROM-REG with register number
950 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
951 defined, and will usually be the constant 1, since most of the
952 cases preventing register elimination are things that the compiler
953 already knows about. */
955 #define CAN_ELIMINATE(FROM, TO) \
956 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
957 ? ! frame_pointer_needed \
958 : 1)
960 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
961 specifies the initial difference between the specified pair of
962 registers. This macro must be defined if `ELIMINABLE_REGS' is
963 defined. */
965 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
966 { \
967 int size = m32r_compute_frame_size (get_frame_size ()); \
968 \
969 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
970 (OFFSET) = 0; \
971 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
972 (OFFSET) = size - current_function_pretend_args_size; \
973 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
974 (OFFSET) = size - current_function_pretend_args_size; \
975 else \
976 abort (); \
977 }
978 \f
979 /* Function argument passing. */
981 /* When a prototype says `char' or `short', really pass an `int'. */
982 #define PROMOTE_PROTOTYPES 1
984 /* If defined, the maximum amount of space required for outgoing
985 arguments will be computed and placed into the variable
986 `current_function_outgoing_args_size'. No space will be pushed
987 onto the stack for each call; instead, the function prologue should
988 increase the stack frame size by this amount. */
989 #define ACCUMULATE_OUTGOING_ARGS 1
991 /* Define this macro if functions should assume that stack space has
992 been allocated for arguments even when their values are passed in
993 registers.
995 The value of this macro is the size, in bytes, of the area
996 reserved for arguments passed in registers for the function
997 represented by FNDECL.
999 This space can be allocated by the caller, or be a part of the
1000 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
1001 which. */
1002 #if 0
1003 #define REG_PARM_STACK_SPACE(FNDECL) \
1004 (M32R_MAX_PARM_REGS * UNITS_PER_WORD)
1005 #endif
1007 /* Value is the number of bytes of arguments automatically
1008 popped when returning from a subroutine call.
1009 FUNDECL is the declaration node of the function (as a tree),
1010 FUNTYPE is the data type of the function (as a tree),
1011 or for a library call it is an identifier node for the subroutine name.
1012 SIZE is the number of bytes of arguments passed on the stack. */
1013 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
1015 /* Nonzero if we do not know how to pass TYPE solely in registers. */
1016 #define MUST_PASS_IN_STACK(MODE, TYPE) \
1017 ((TYPE) != 0 \
1018 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
1019 || TREE_ADDRESSABLE (TYPE)))
1021 /* Define a data type for recording info about an argument list
1022 during the scan of that argument list. This data type should
1023 hold all necessary information about the function itself
1024 and about the args processed so far, enough to enable macros
1025 such as FUNCTION_ARG to determine where the next arg should go. */
1026 #define CUMULATIVE_ARGS int
1028 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1029 for a call to a function whose data type is FNTYPE.
1030 For a library call, FNTYPE is 0. */
1031 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
1032 ((CUM) = 0)
1034 /* The number of registers used for parameter passing. Local to this file. */
1035 #define M32R_MAX_PARM_REGS 4
1037 /* 1 if N is a possible register number for function argument passing. */
1038 #define FUNCTION_ARG_REGNO_P(N) \
1039 ((unsigned) (N) < M32R_MAX_PARM_REGS)
1041 /* The ROUND_ADVANCE* macros are local to this file. */
1042 /* Round SIZE up to a word boundary. */
1043 #define ROUND_ADVANCE(SIZE) \
1044 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1046 /* Round arg MODE/TYPE up to the next word boundary. */
1047 #define ROUND_ADVANCE_ARG(MODE, TYPE) \
1048 ((MODE) == BLKmode \
1049 ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
1050 : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
1052 /* Round CUM up to the necessary point for argument MODE/TYPE. */
1053 #if 0
1054 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \
1055 ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \
1056 > BITS_PER_WORD) \
1057 ? ((CUM) + 1 & ~1) \
1058 : (CUM))
1059 #else
1060 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)
1061 #endif
1063 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
1064 a reg. This includes arguments that have to be passed by reference as the
1065 pointer to them is passed in a reg if one is available (and that is what
1066 we're given).
1067 This macro is only used in this file. */
1068 #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \
1069 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)
1071 /* Determine where to put an argument to a function.
1072 Value is zero to push the argument on the stack,
1073 or a hard register in which to store the argument.
1075 MODE is the argument's machine mode.
1076 TYPE is the data type of the argument (as a tree).
1077 This is null for libcalls where that information may
1078 not be available.
1079 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1080 the preceding args and about the function being called.
1081 NAMED is nonzero if this argument is a named parameter
1082 (otherwise it is an extra parameter matching an ellipsis). */
1083 /* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers
1084 and the rest are pushed. */
1085 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1086 (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
1087 ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
1088 : 0)
1090 /* ??? Quick hack to try to get varargs working the normal way. */
1091 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1092 (((! current_function_varargs || (NAMED)) \
1093 && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \
1094 ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
1095 : 0)
1097 /* A C expression for the number of words, at the beginning of an
1098 argument, must be put in registers. The value must be zero for
1099 arguments that are passed entirely in registers or that are entirely
1100 pushed on the stack.
1102 On some machines, certain arguments must be passed partially in
1103 registers and partially in memory. On these machines, typically the
1104 first @var{n} words of arguments are passed in registers, and the rest
1105 on the stack. If a multi-word argument (a @code{double} or a
1106 structure) crosses that boundary, its first few words must be passed
1107 in registers and the rest must be pushed. This macro tells the
1108 compiler when this occurs, and how many of the words should go in
1109 registers. */
1110 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1111 function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)
1113 /* A C expression that indicates when an argument must be passed by
1114 reference. If nonzero for an argument, a copy of that argument is
1115 made in memory and a pointer to the argument is passed instead of
1116 the argument itself. The pointer is passed in whatever way is
1117 appropriate for passing a pointer to that type. */
1118 /* All arguments greater than 8 bytes are passed this way. */
1119 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1120 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1122 /* Update the data in CUM to advance over an argument
1123 of mode MODE and data type TYPE.
1124 (TYPE is null for libcalls where that information may not be available.) */
1125 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1126 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
1127 + ROUND_ADVANCE_ARG ((MODE), (TYPE))))
1129 /* If defined, a C expression that gives the alignment boundary, in bits,
1130 of an argument with the specified mode and type. If it is not defined,
1131 PARM_BOUNDARY is used for all arguments. */
1132 #if 0
1133 /* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */
1134 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1135 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1136 ? PARM_BOUNDARY \
1137 : 2 * PARM_BOUNDARY)
1138 #endif
1140 /* This macro offers an alternative
1141 to using `__builtin_saveregs' and defining the macro
1142 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
1143 arguments into the stack so that all the arguments appear to have
1144 been passed consecutively on the stack. Once this is done, you
1145 can use the standard implementation of varargs that works for
1146 machines that pass all their arguments on the stack.
1148 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure,
1149 containing the values that obtain after processing of the named
1150 arguments. The arguments MODE and TYPE describe the last named
1151 argument--its machine mode and its data type as a tree node.
1153 The macro implementation should do two things: first, push onto the
1154 stack all the argument registers *not* used for the named
1155 arguments, and second, store the size of the data thus pushed into
1156 the `int'-valued variable whose name is supplied as the argument
1157 PRETEND_SIZE. The value that you store here will serve as
1158 additional offset for setting up the stack frame.
1160 If the argument NO_RTL is nonzero, it means that the
1161 arguments of the function are being analyzed for the second time.
1162 This happens for an inline function, which is not actually
1163 compiled until the end of the source file. The macro
1164 `SETUP_INCOMING_VARARGS' should not generate any instructions in
1165 this case. */
1167 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
1168 m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
1170 /* Implement `va_arg'. */
1171 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1172 m32r_va_arg (valist, type)
1173 \f
1174 /* Function results. */
1176 /* Define how to find the value returned by a function.
1177 VALTYPE is the data type of the value (as a tree).
1178 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1179 otherwise, FUNC is 0. */
1180 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
1182 /* Define how to find the value returned by a library function
1183 assuming the value has mode MODE. */
1184 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
1186 /* 1 if N is a possible register number for a function value
1187 as seen by the caller. */
1188 /* ??? What about r1 in DI/DF values. */
1189 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
1191 /* A C expression which can inhibit the returning of certain function
1192 values in registers, based on the type of value. A nonzero value says
1193 to return the function value in memory, just as large structures are
1194 always returned. Here TYPE will be a C expression of type `tree',
1195 representing the data type of the value. */
1196 #define RETURN_IN_MEMORY(TYPE) \
1197 (int_size_in_bytes (TYPE) > 8)
1199 /* Tell GCC to use RETURN_IN_MEMORY. */
1200 #define DEFAULT_PCC_STRUCT_RETURN 0
1202 /* Register in which address to store a structure value
1203 is passed to a function, or 0 to use `invisible' first argument. */
1204 #define STRUCT_VALUE 0
1205 \f
1206 /* Function entry and exit. */
1208 /* Initialize data used by insn expanders. This is called from
1209 init_emit, once for each function, before code is generated. */
1210 #define INIT_EXPANDERS m32r_init_expanders ()
1212 /* This macro generates the assembly code for function entry.
1213 FILE is a stdio stream to output the code to.
1214 SIZE is an int: how many units of temporary storage to allocate.
1215 Refer to the array `regs_ever_live' to determine which registers
1216 to save; `regs_ever_live[I]' is nonzero if register number I
1217 is ever used in the function. This macro is responsible for
1218 knowing which registers should not be saved even if used. */
1219 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1220 m32r_output_function_prologue (FILE, SIZE)
1222 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1223 the stack pointer does not matter. The value is tested only in
1224 functions that have frame pointers.
1225 No definition is equivalent to always zero. */
1226 #define EXIT_IGNORE_STACK 1
1228 /* This macro generates the assembly code for function exit,
1229 on machines that need it. If FUNCTION_EPILOGUE is not defined
1230 then individual return instructions are generated for each
1231 return statement. Args are same as for FUNCTION_PROLOGUE.
1233 The function epilogue should not depend on the current stack pointer!
1234 It should use the frame pointer only. This is mandatory because
1235 of alloca; we also take advantage of it to omit stack adjustments
1236 before returning. */
1237 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1238 m32r_output_function_epilogue (FILE, SIZE)
1240 /* Output assembler code to FILE to increment profiler label # LABELNO
1241 for profiling a function entry. */
1242 #define FUNCTION_PROFILER(FILE, LABELNO) abort ()
1243 \f
1244 /* Trampolines. */
1246 /* On the M32R, the trampoline is
1248 ld24 r7,STATIC
1249 ld24 r6,FUNCTION
1250 jmp r6
1251 nop
1253 ??? Need addr32 support.
1254 */
1256 /* Length in bytes of the trampoline for entering a nested function. */
1257 #define TRAMPOLINE_SIZE 12
1259 /* Emit RTL insns to initialize the variable parts of a trampoline.
1260 FNADDR is an RTX for the address of the function's pure code.
1261 CXT is an RTX for the static chain value for the function. */
1262 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1263 do { \
1264 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
1265 plus_constant ((CXT), 0xe7000000)); \
1266 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
1267 plus_constant ((FNADDR), 0xe6000000)); \
1268 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
1269 GEN_INT (0x1fc67000)); \
1270 emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
1271 } while (0)
1272 \f
1273 /* Library calls. */
1275 /* Generate calls to memcpy, memcmp and memset. */
1276 #define TARGET_MEM_FUNCTIONS
1277 \f
1278 /* Addressing modes, and classification of registers for them. */
1280 /* Maximum number of registers that can appear in a valid memory address. */
1281 #define MAX_REGS_PER_ADDRESS 1
1283 /* We have post-inc load and pre-dec,pre-inc store,
1284 but only for 4 byte vals. */
1285 #define HAVE_PRE_DECREMENT 1
1286 #define HAVE_PRE_INCREMENT 1
1287 #define HAVE_POST_INCREMENT 1
1289 /* Recognize any constant value that is a valid address. */
1290 #define CONSTANT_ADDRESS_P(X) \
1291 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1292 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1294 /* Nonzero if the constant value X is a legitimate general operand.
1295 We don't allow (plus symbol large-constant) as the relocations can't
1296 describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations.
1297 We allow all CONST_DOUBLE's as the md file patterns will force the
1298 constant to memory if they can't handle them. */
1300 #define LEGITIMATE_CONSTANT_P(X) \
1301 (! (GET_CODE (X) == CONST \
1302 && GET_CODE (XEXP (X, 0)) == PLUS \
1303 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
1304 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1305 && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))
1307 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1308 and check its validity for a certain class.
1309 We have two alternate definitions for each of them.
1310 The usual definition accepts all pseudo regs; the other rejects
1311 them unless they have been allocated suitable hard regs.
1312 The symbol REG_OK_STRICT causes the latter definition to be used.
1314 Most source files want to accept pseudo regs in the hope that
1315 they will get allocated to the class that the insn wants them to be in.
1316 Source files for reload pass need to be strict.
1317 After reload, it makes no difference, since pseudo regs have
1318 been eliminated by then. */
1320 #ifdef REG_OK_STRICT
1322 /* Nonzero if X is a hard reg that can be used as a base reg. */
1323 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1324 /* Nonzero if X is a hard reg that can be used as an index. */
1325 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1327 #else
1329 /* Nonzero if X is a hard reg that can be used as a base reg
1330 or if it is a pseudo reg. */
1331 #define REG_OK_FOR_BASE_P(X) \
1332 (GPR_P (REGNO (X)) \
1333 || (REGNO (X)) == ARG_POINTER_REGNUM \
1334 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1335 /* Nonzero if X is a hard reg that can be used as an index
1336 or if it is a pseudo reg. */
1337 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1339 #endif
1341 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1342 that is a valid memory address for an instruction.
1343 The MODE argument is the machine mode for the MEM expression
1344 that wants to use this address. */
1346 /* Local to this file. */
1347 #define RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X))
1349 /* Local to this file. */
1350 #define RTX_OK_FOR_OFFSET_P(X) \
1351 (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
1353 /* Local to this file. */
1354 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
1355 (GET_CODE (X) == PLUS \
1356 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1357 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))
1359 /* Local to this file. */
1360 /* For LO_SUM addresses, do not allow them if the MODE is > 1 word,
1361 since more than one instruction will be required. */
1362 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
1363 (GET_CODE (X) == LO_SUM \
1364 && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
1365 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1366 && CONSTANT_P (XEXP (X, 1)))
1368 /* Local to this file. */
1369 /* Is this a load and increment operation. */
1370 #define LOAD_POSTINC_P(MODE, X) \
1371 (((MODE) == SImode || (MODE) == SFmode) \
1372 && GET_CODE (X) == POST_INC \
1373 && GET_CODE (XEXP (X, 0)) == REG \
1374 && RTX_OK_FOR_BASE_P (XEXP (X, 0)))
1376 /* Local to this file. */
1377 /* Is this a increment/decrement and store operation. */
1378 #define STORE_PREINC_PREDEC_P(MODE, X) \
1379 (((MODE) == SImode || (MODE) == SFmode) \
1380 && (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \
1381 && GET_CODE (XEXP (X, 0)) == REG \
1382 && RTX_OK_FOR_BASE_P (XEXP (X, 0)))
1384 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1385 { if (RTX_OK_FOR_BASE_P (X)) \
1386 goto ADDR; \
1387 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
1388 goto ADDR; \
1389 if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
1390 goto ADDR; \
1391 if (LOAD_POSTINC_P ((MODE), (X))) \
1392 goto ADDR; \
1393 if (STORE_PREINC_PREDEC_P ((MODE), (X))) \
1394 goto ADDR; \
1395 }
1397 /* Try machine-dependent ways of modifying an illegitimate address
1398 to be legitimate. If we find one, return the new, valid address.
1399 This macro is used in only one place: `memory_address' in explow.c.
1401 OLDX is the address as it was before break_out_memory_refs was called.
1402 In some cases it is useful to look at this to decide what needs to be done.
1404 MODE and WIN are passed so that this macro can use
1405 GO_IF_LEGITIMATE_ADDRESS.
1407 It is always safe for this macro to do nothing. It exists to recognize
1408 opportunities to optimize the output.
1410 ??? Is there anything useful we can do here for the M32R? */
1412 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1414 /* Go to LABEL if ADDR (a legitimate address expression)
1415 has an effect that depends on the machine mode it is used for. */
1416 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1417 do { \
1418 if (GET_CODE (ADDR) == PRE_DEC \
1419 || GET_CODE (ADDR) == PRE_INC \
1420 || GET_CODE (ADDR) == POST_INC \
1421 || GET_CODE (ADDR) == LO_SUM) \
1422 goto LABEL; \
1423 } while (0)
1424 \f
1425 /* Condition code usage. */
1427 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1428 return the mode to be used for the comparison. */
1429 #define SELECT_CC_MODE(OP, X, Y) \
1430 ((enum machine_mode)m32r_select_cc_mode ((int)OP, X, Y))
1432 /* Return non-zero if SELECT_CC_MODE will never return MODE for a
1433 floating point inequality comparison. */
1435 \f
1436 /* Costs. */
1438 /* ??? I'm quite sure I don't understand enough of the subtleties involved
1439 in choosing the right numbers to use here, but there doesn't seem to be
1440 enough documentation on this. What I've done is define an insn to cost
1441 4 "units" and work from there. COSTS_N_INSNS (N) is defined as (N) * 4 - 2
1442 so that seems reasonable. Some values are supposed to be defined relative
1443 to each other and thus aren't necessarily related to COSTS_N_INSNS. */
1445 /* Compute the cost of computing a constant rtl expression RTX
1446 whose rtx-code is CODE. The body of this macro is a portion
1447 of a switch statement. If the code is computed here,
1448 return it with a return statement. Otherwise, break from the switch. */
1449 /* Small integers are as cheap as registers. 4 byte values can be fetched
1450 as immediate constants - let's give that the cost of an extra insn. */
1451 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1452 case CONST_INT : \
1453 if (INT16_P (INTVAL (X))) \
1454 return 0; \
1456 case CONST : \
1457 case LABEL_REF : \
1458 case SYMBOL_REF : \
1459 return 4; \
1460 case CONST_DOUBLE : \
1461 { \
1462 rtx high, low; \
1463 split_double (X, &high, &low); \
1464 return 4 * (!INT16_P (INTVAL (high)) \
1465 + !INT16_P (INTVAL (low))); \
1466 }
1468 /* Compute the cost of an address. */
1469 #define ADDRESS_COST(ADDR) m32r_address_cost (ADDR)
1471 /* Compute extra cost of moving data between one register class
1472 and another. */
1473 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2
1475 /* Compute the cost of moving data between registers and memory. */
1476 /* Memory is 3 times as expensive as registers.
1477 ??? Is that the right way to look at it? */
1478 #define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \
1479 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
1481 /* The cost of a branch insn. */
1482 /* A value of 2 here causes GCC to avoid using branches in comparisons like
1483 while (a < N && a). Branches aren't that expensive on the M32R so
1484 we define this as 1. Defining it as 2 had a heavy hit in fp-bit.c. */
1485 #define BRANCH_COST ((TARGET_BRANCH_COST) ? 2 : 1)
1487 /* Provide the costs of a rtl expression. This is in the body of a
1488 switch on CODE. The purpose for the cost of MULT is to encourage
1489 `synth_mult' to find a synthetic multiply when reasonable.
1491 If we need more than 12 insns to do a multiply, then go out-of-line,
1492 since the call overhead will be < 10% of the cost of the multiply. */
1493 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1494 case MULT : \
1495 return COSTS_N_INSNS (3); \
1496 case DIV : \
1497 case UDIV : \
1498 case MOD : \
1499 case UMOD : \
1500 return COSTS_N_INSNS (10);
1502 /* Nonzero if access to memory by bytes is slow and undesirable.
1503 For RISC chips, it means that access to memory by bytes is no
1504 better than access by words when possible, so grab a whole word
1505 and maybe make use of that. */
1506 #define SLOW_BYTE_ACCESS 1
1508 /* Define this macro if it is as good or better to call a constant
1509 function address than to call an address kept in a register. */
1510 #define NO_FUNCTION_CSE
1512 /* Define this macro if it is as good or better for a function to call
1513 itself with an explicit address than to call an address kept in a
1514 register. */
1515 #define NO_RECURSIVE_FUNCTION_CSE
1517 /* A C statement (sans semicolon) to update the integer variable COST based on
1518 the relationship between INSN that is dependent on DEP_INSN through the
1519 dependence LINK. The default is to make no adjustment to COST. This can be
1520 used for example to specify to the scheduler that an output- or
1521 anti-dependence does not incur the same cost as a data-dependence. */
1523 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1524 (COST) = m32r_adjust_cost (INSN, LINK, DEP_INSN, COST)
1526 /* A C statement (sans semicolon) to update the integer scheduling
1527 priority `INSN_PRIORITY(INSN)'. Reduce the priority to execute
1528 the INSN earlier, increase the priority to execute INSN later.
1529 Do not define this macro if you do not need to adjust the
1530 scheduling priorities of insns. */
1531 #define ADJUST_PRIORITY(INSN) \
1532 INSN_PRIORITY (INSN) = m32r_adjust_priority (INSN, INSN_PRIORITY (INSN))
1534 /* Macro to determine whether the Haifa scheduler is used. */
1535 #ifdef HAIFA
1536 #define HAIFA_P 1
1537 #else
1538 #define HAIFA_P 0
1539 #endif
1541 /* Indicate how many instructions can be issued at the same time.
1542 This is sort of a lie. The m32r can issue only 1 long insn at
1543 once, but it can issue 2 short insns. The default therefore is
1544 set at 2, but this can be overridden by the command line option
1545 -missue-rate=1 */
1546 #define ISSUE_RATE ((TARGET_ISSUE_RATE) ? 1 : 2)
1548 /* If we have a machine that can issue a variable # of instructions
1549 per cycle, indicate how many more instructions can be issued
1550 after the current one. */
1551 #define MD_SCHED_VARIABLE_ISSUE(STREAM, VERBOSE, INSN, HOW_MANY) \
1552 (HOW_MANY) = m32r_sched_variable_issue (STREAM, VERBOSE, INSN, HOW_MANY)
1554 /* Whether we are on an odd word boundary while scheduling. */
1557 /* Hook to run before scheduling a block of insns. */
1558 #define MD_SCHED_INIT(STREAM, VERBOSE, MAX_READY) \
1559 m32r_sched_init (STREAM, VERBOSE)
1561 /* Hook to reorder the list of ready instructions. */
1562 #define MD_SCHED_REORDER(STREAM, VERBOSE, READY, N_READY, CLOCK, CIM) \
1563 do \
1564 { \
1565 m32r_sched_reorder (STREAM, VERBOSE, READY, N_READY); \
1566 CIM = issue_rate; \
1567 } \
1568 while (0)
1570 /* When the `length' insn attribute is used, this macro specifies the
1571 value to be assigned to the address of the first insn in a
1572 function. If not specified, 0 is used. */
1573 #define FIRST_INSN_ADDRESS m32r_first_insn_address ()
1575 \f
1576 /* Section selection. */
1584 /* This one is for svr4.h. */
1585 #undef CONST_SECTION_ASM_OP
1588 /* A list of names for sections other than the standard two, which are
1589 `in_text' and `in_data'. You need not define this macro
1590 on a system with no other sections (that GCC needs to use). */
1591 #undef EXTRA_SECTIONS
1592 #define EXTRA_SECTIONS in_sdata, in_sbss, in_const, in_ctors, in_dtors
1594 /* One or more functions to be defined in "varasm.c". These
1595 functions should do jobs analogous to those of `text_section' and
1596 `data_section', for your additional sections. Do not define this
1597 macro if you do not define `EXTRA_SECTIONS'. */
1598 #undef EXTRA_SECTION_FUNCTIONS
1599 #define EXTRA_SECTION_FUNCTIONS \
1600 CONST_SECTION_FUNCTION \
1601 CTORS_SECTION_FUNCTION \
1602 DTORS_SECTION_FUNCTION \
1603 SDATA_SECTION_FUNCTION \
1604 SBSS_SECTION_FUNCTION
1606 #define SDATA_SECTION_FUNCTION \
1607 void \
1608 sdata_section () \
1609 { \
1610 if (in_section != in_sdata) \
1611 { \
1613 in_section = in_sdata; \
1614 } \
1615 } \
1617 #define SBSS_SECTION_FUNCTION \
1618 void \
1619 sbss_section () \
1620 { \
1621 if (in_section != in_sbss) \
1622 { \
1624 in_section = in_sbss; \
1625 } \
1626 } \
1628 /* A C statement or statements to switch to the appropriate section for
1629 output of EXP. You can assume that EXP is either a `VAR_DECL' node
1630 or a constant of some sort. RELOC indicates whether the initial value
1631 of EXP requires link-time relocations. */
1632 #undef SELECT_SECTION
1633 #define SELECT_SECTION(EXP, RELOC) m32r_select_section ((EXP), (RELOC))
1635 /* A C statement or statements to switch to the appropriate section for
1636 output of RTX in mode MODE. You can assume that RTX
1637 is some kind of constant in RTL. The argument MODE is redundant
1638 except in the case of a `const_int' rtx. Select the section by
1639 calling `text_section' or one of the alternatives for other
1640 sections.
1642 Do not define this macro if you put all constants in the read-only
1643 data section. */
1645 #undef SELECT_RTX_SECTION
1647 /* Define this macro if jump tables (for tablejump insns) should be
1648 output in the text section, along with the assembler instructions.
1649 Otherwise, the readonly data section is used.
1650 This macro is irrelevant if there is no separate readonly data section. */
1651 /*#define JUMP_TABLES_IN_TEXT_SECTION*/
1653 /* Define this macro if references to a symbol must be treated
1654 differently depending on something about the variable or
1655 function named by the symbol (such as what section it is in).
1657 The macro definition, if any, is executed immediately after the
1658 rtl for DECL or other node is created.
1659 The value of the rtl will be a `mem' whose address is a
1660 `symbol_ref'.
1662 The usual thing for this macro to do is to store a flag in the
1663 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1664 name string in the `symbol_ref' (if one bit is not enough
1665 information). */
1668 /* Small objects are recorded with no prefix for space efficiency since
1669 they'll be the most common. This isn't the case if the user passes
1670 -mmodel={medium|large} and one could choose to not mark symbols that
1671 are the default, but that complicates things. */
1672 /*#define SMALL_FLAG_CHAR '#'*/
1676 #define SDATA_NAME_P(NAME) (*(NAME) == SDATA_FLAG_CHAR)
1677 /*#define SMALL_NAME_P(NAME) (*(NAME) == SMALL_FLAG_CHAR)*/
1678 #define SMALL_NAME_P(NAME) (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))
1679 #define MEDIUM_NAME_P(NAME) (*(NAME) == MEDIUM_FLAG_CHAR)
1680 #define LARGE_NAME_P(NAME) (*(NAME) == LARGE_FLAG_CHAR)
1681 /* For string literals, etc. */
1684 #define ENCODED_NAME_P(SYMBOL_NAME) \
1685 (SDATA_NAME_P (SYMBOL_NAME) \
1687 || MEDIUM_NAME_P (SYMBOL_NAME) \
1688 || LARGE_NAME_P (SYMBOL_NAME))
1690 #define ENCODE_SECTION_INFO(DECL) m32r_encode_section_info (DECL)
1692 /* Decode SYM_NAME and store the real name part in VAR, sans
1693 the characters that encode section info. Define this macro if
1694 ENCODE_SECTION_INFO alters the symbol's name string. */
1695 /* Note that we have to handle symbols like "%*start". */
1696 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1697 do { \
1698 (VAR) = (SYMBOL_NAME) + ENCODED_NAME_P (SYMBOL_NAME); \
1700 } while (0)
1701 \f
1702 /* PIC */
1704 /* The register number of the register used to address a table of static
1705 data addresses in memory. In some cases this register is defined by a
1706 processor's ``application binary interface'' (ABI). When this macro
1707 is defined, RTL is generated for this register once, as with the stack
1708 pointer and frame pointer registers. If this macro is not defined, it
1709 is up to the machine-dependent files to allocate such a register (if
1710 necessary). */
1711 /*#define PIC_OFFSET_TABLE_REGNUM 12*/
1713 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
1714 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
1715 is not defined. */
1716 /* This register is call-saved on the M32R. */
1717 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
1719 /* By generating position-independent code, when two different programs (A
1720 and B) share a common library (libC.a), the text of the library can be
1721 shared whether or not the library is linked at the same address for both
1722 programs. In some of these environments, position-independent code
1723 requires not only the use of different addressing modes, but also
1724 special code to enable the use of these addressing modes.
1726 The FINALIZE_PIC macro serves as a hook to emit these special
1727 codes once the function is being compiled into assembly code, but not
1728 before. (It is not done before, because in the case of compiling an
1729 inline function, it would lead to multiple PIC prologues being
1730 included in functions which used inline functions and were compiled to
1731 assembly language.) */
1733 /*#define FINALIZE_PIC m32r_finalize_pic ()*/
1735 /* A C expression that is nonzero if X is a legitimate immediate
1736 operand on the target machine when generating position independent code.
1737 You can assume that X satisfies CONSTANT_P, so you need not
1738 check this. You can also assume `flag_pic' is true, so you need not
1739 check it either. You need not define this macro if all constants
1740 (including SYMBOL_REF) can be immediate operands when generating
1741 position independent code. */
1742 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/
1743 \f
1744 /* Control the assembler format that we output. */
1746 /* Output at beginning of assembler file. */
1747 #define ASM_FILE_START(FILE) m32r_asm_file_start (FILE)
1749 /* A C string constant describing how to begin a comment in the target
1750 assembler language. The compiler assumes that the comment will
1751 end at the end of the line. */
1754 /* Output to assembler file text saying following lines
1755 may contain character constants, extra white space, comments, etc. */
1758 /* Output to assembler file text saying following lines
1759 no longer contain unusual constructs. */
1762 /* This is how to output an assembler line defining a `char' constant. */
1763 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
1764 do \
1765 { \
1767 output_addr_const (FILE, (VALUE)); \
1769 } \
1770 while (0)
1772 /* This is how to output an assembler line defining a `short' constant. */
1773 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
1774 do \
1775 { \
1777 output_addr_const (FILE, (VALUE)); \
1779 } \
1780 while (0)
1782 /* This is how to output an assembler line defining an `int' constant.
1783 We also handle symbol output here. */
1784 #define ASM_OUTPUT_INT(FILE, VALUE) \
1785 do \
1786 { \
1788 output_addr_const (FILE, (VALUE)); \
1790 } \
1791 while (0)
1793 /* This is how to output an assembler line defining a `float' constant. */
1794 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1795 do \
1796 { \
1797 long t; \
1798 char str[30]; \
1799 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1802 t, ASM_COMMENT_START, str); \
1803 } \
1804 while (0)
1806 /* This is how to output an assembler line defining a `double' constant. */
1807 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1808 do \
1809 { \
1810 long t[2]; \
1811 char str[30]; \
1812 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1815 t[0], ASM_COMMENT_START, str, t[1]); \
1816 } \
1817 while (0)
1819 /* This is how to output an assembler line for a numeric constant byte. */
1820 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1823 /* The assembler's parentheses characters. */
1827 /* This is how to output the definition of a user-level label named NAME,
1828 such as the label on a static function or variable NAME. */
1829 /* On the M32R we need to ensure the next instruction starts on a 32 bit
1830 boundary [the previous insn must either be 2 16 bit insns or 1 32 bit]. */
1831 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1832 do \
1833 { \
1834 assemble_name (FILE, NAME); \
1836 } \
1837 while (0)
1839 /* This is how to output a command to make the user-level label named NAME
1840 defined for reference from other files. */
1841 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1842 do \
1843 { \
1845 assemble_name (FILE, NAME); \
1847 } \
1848 while (0)
1850 /* This is how to output a reference to a user-level label named NAME.
1851 `assemble_name' uses this. */
1852 #undef ASM_OUTPUT_LABELREF
1853 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1854 do \
1855 { \
1856 const char * real_name; \
1857 STRIP_NAME_ENCODING (real_name, (NAME)); \
1859 } \
1860 while (0)
1862 /* If -Os, don't force line number labels to begin at the beginning of
1863 the word; we still want the assembler to try to put things in parallel,
1864 should that be possible.
1865 For m32r/d, instructions are never in parallel (other than with a nop)
1866 and the simulator and stub both handle a breakpoint in the middle of
1867 a word so don't ever force line number labels to begin at the beginning
1868 of a word. */
1870 #undef ASM_OUTPUT_SOURCE_LINE
1871 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1872 do \
1873 { \
1874 static int sym_lineno = 1; \
1876 line, sym_lineno); \
1877 assemble_name \
1878 (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \
1879 fprintf (file, (optimize_size || TARGET_M32R) \
1882 sym_lineno); \
1883 sym_lineno += 1; \
1884 } \
1885 while (0)
1887 /* Store in OUTPUT a string (made with alloca) containing
1888 an assembler-name for a local static variable named NAME.
1889 LABELNO is an integer which is different for each call. */
1890 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1891 do \
1892 { \
1893 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10);\
1895 } \
1896 while (0)
1898 /* How to refer to registers in assembler output.
1899 This sequence is indexed by compiler's hard-register-number (see above). */
1900 #ifndef SUBTARGET_REGISTER_NAMES
1901 #define SUBTARGET_REGISTER_NAMES
1902 #endif
1904 #define REGISTER_NAMES \
1905 { \
1909 SUBTARGET_REGISTER_NAMES \
1910 }
1912 /* If defined, a C initializer for an array of structures containing
1913 a name and a register number. This macro defines additional names
1914 for hard registers, thus allowing the `asm' option in declarations
1915 to refer to registers using alternate names. */
1916 #ifndef SUBTARGET_ADDITIONAL_REGISTER_NAMES
1917 #define SUBTARGET_ADDITIONAL_REGISTER_NAMES
1918 #endif
1920 #define ADDITIONAL_REGISTER_NAMES \
1921 { \
1926 SUBTARGET_ADDITIONAL_REGISTER_NAMES \
1927 }
1929 /* A C expression which evaluates to true if CODE is a valid
1930 punctuation character for use in the `PRINT_OPERAND' macro. */
1932 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1933 m32r_punct_chars[(unsigned char) (CHAR)]
1935 /* Print operand X (an rtx) in assembler syntax to file FILE.
1936 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1937 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1938 #define PRINT_OPERAND(FILE, X, CODE) \
1939 m32r_print_operand (FILE, X, CODE)
1941 /* A C compound statement to output to stdio stream STREAM the
1942 assembler syntax for an instruction operand that is a memory
1943 reference whose address is ADDR. ADDR is an RTL expression.
1945 On some machines, the syntax for a symbolic address depends on
1946 the section that the address refers to. On these machines,
1947 define the macro `ENCODE_SECTION_INFO' to store the information
1948 into the `symbol_ref', and then check for it here. */
1949 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1950 m32r_print_operand_address (FILE, ADDR)
1952 /* If defined, C string expressions to be used for the `%R', `%L',
1953 `%U', and `%I' options of `asm_fprintf' (see `final.c'). These
1954 are useful when a single `md' file must support multiple assembler
1955 formats. In that case, the various `tm.h' files can define these
1956 macros differently. */
1962 /* This is how to output an element of a case-vector that is absolute. */
1963 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1964 do \
1965 { \
1966 char label[30]; \
1969 assemble_name (FILE, label); \
1971 } \
1972 while (0)
1974 /* This is how to output an element of a case-vector that is relative. */
1975 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\
1976 do \
1977 { \
1978 char label[30]; \
1981 assemble_name (FILE, label); \
1984 assemble_name (FILE, label); \
1986 } \
1987 while (0)
1989 /* The desired alignment for the location counter at the beginning
1990 of a loop. */
1991 /* On the M32R, align loops to 32 byte boundaries (cache line size)
1992 if -malign-loops. */
1993 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
1995 /* Define this to be the maximum number of insns to move around when moving
1996 a loop test from the top of a loop to the bottom
1997 and seeing whether to duplicate it. The default is thirty.
1999 Loop unrolling currently doesn't like this optimization, so
2000 disable doing if we are unrolling loops and saving space. */
2001 #define LOOP_TEST_THRESHOLD (optimize_size \
2002 && !flag_unroll_loops \
2003 && !flag_unroll_all_loops ? 2 : 30)
2005 /* This is how to output an assembler line
2006 that says to advance the location counter
2007 to a multiple of 2**LOG bytes. */
2008 /* .balign is used to avoid confusion. */
2009 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2010 do \
2011 { \
2012 if ((LOG) != 0) \
2014 } \
2015 while (0)
2017 /* Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
2018 separate, explicit argument. If you define this macro, it is used in
2019 place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
2020 handling the required alignment of the variable. The alignment is
2021 specified as the number of bits. */
2025 #undef ASM_OUTPUT_ALIGNED_COMMON
2026 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
2027 do \
2028 { \
2029 if (! TARGET_SDATA_NONE \
2030 && (SIZE) > 0 && (SIZE) <= g_switch_value) \
2032 else \
2034 assemble_name ((FILE), (NAME)); \
2036 } \
2037 while (0)
2039 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
2040 separate, explicit argument. If you define this macro, it is used in
2041 place of `ASM_OUTPUT_BSS', and gives you more flexibility in
2042 handling the required alignment of the variable. The alignment is
2043 specified as the number of bits.
2045 For the M32R we need sbss support. */
2047 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
2048 do \
2049 { \
2050 ASM_GLOBALIZE_LABEL (FILE, NAME); \
2051 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
2052 } \
2053 while (0)
2054 \f
2055 /* Debugging information. */
2057 /* Generate DBX and DWARF debugging information. */
2058 #undef DBX_DEBUGGING_INFO
2059 #undef DWARF_DEBUGGING_INFO
2060 #undef DWARF2_DEBUGGING_INFO
2062 #define DBX_DEBUGGING_INFO
2063 #define DWARF_DEBUGGING_INFO
2064 #define DWARF2_DEBUGGING_INFO
2066 /* Prefer STABS (for now). */
2067 #undef PREFERRED_DEBUGGING_TYPE
2068 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
2070 /* How to renumber registers for dbx and gdb. */
2071 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
2073 /* Turn off splitting of long stabs. */
2074 #define DBX_CONTIN_LENGTH 0
2075 \f
2076 /* Miscellaneous. */
2078 /* Specify the machine mode that this machine uses
2079 for the index in the tablejump instruction. */
2080 #define CASE_VECTOR_MODE Pmode
2082 /* Define as C expression which evaluates to nonzero if the tablejump
2083 instruction expects the table to contain offsets from the address of the
2084 table.
2085 Do not define this if the table should contain absolute addresses. */
2086 /* It's not clear what PIC will look like or whether we want to use -fpic
2087 for the embedded form currently being talked about. For now require -fpic
2088 to get pc relative switch tables. */
2089 /*#define CASE_VECTOR_PC_RELATIVE 1 */
2091 /* Define if operations between registers always perform the operation
2092 on the full register even if a narrower mode is specified. */
2093 #define WORD_REGISTER_OPERATIONS
2095 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
2096 will either zero-extend or sign-extend. The value of this macro should
2097 be the code that says which one of the two operations is implicitly
2098 done, NIL if none. */
2099 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2101 /* Specify the tree operation to be used to convert reals to integers. */
2102 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2104 /* This is the kind of divide that is easiest to do in the general case. */
2105 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2107 /* Max number of bytes we can move from memory to memory
2108 in one reasonably fast instruction. */
2109 #define MOVE_MAX 4
2111 /* Define this to be nonzero if shift instructions ignore all but the low-order
2112 few bits. */
2113 #define SHIFT_COUNT_TRUNCATED 1
2115 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2116 is done just by pretending it is already truncated. */
2117 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2119 /* We assume that the store-condition-codes instructions store 0 for false
2120 and some other value for true. This is the value stored for true. */
2121 #define STORE_FLAG_VALUE 1
2123 /* Specify the machine mode that pointers have.
2124 After generation of rtl, the compiler makes no further distinction
2125 between pointers and any other objects of this machine mode. */
2126 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
2127 it's own problems (you have to add extendpsisi2 and truncsipsi2).
2128 Try to avoid it. */
2129 #define Pmode SImode
2131 /* A function address in a call instruction. */
2132 #define FUNCTION_MODE SImode
2134 /* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
2135 is a valid machine specific attribute for DECL.
2136 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
2137 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
2138 m32r_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
2140 /* A C expression that returns zero if the attributes on TYPE1 and TYPE2 are
2141 incompatible, one if they are compatible, and two if they are
2142 nearly compatible (which causes a warning to be generated). */
2143 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
2144 m32r_comp_type_attributes (TYPE1, TYPE2)
2146 /* Give newly defined TYPE some default attributes. */
2147 #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \
2148 m32r_set_default_type_attributes (TYPE)
2149 \f
2150 /* Define the information needed to generate branch and scc insns. This is
2151 stored from the compare operation. Note that we can't use "rtx" here
2152 since it hasn't been defined! */
2156 /* M32R function types. */
2157 enum m32r_function_type
2158 {
2160 };
2162 #define M32R_INTERRUPT_P(TYPE) ((TYPE) == M32R_FUNCTION_INTERRUPT)
2164 /* Define this if you have defined special-purpose predicates in the
2165 file `MACHINE.c'. This macro is called within an initializer of an
2166 array of structures. The first field in the structure is the name
2167 of a predicate and the second field is an array of rtl codes. For
2168 each predicate, list all rtl codes that can be in expressions
2169 matched by the predicate. The list should have a trailing comma. */
2171 #define PREDICATE_CODES \
2178 CONST_DOUBLE, LABEL_REF, CONST, \
2179 SYMBOL_REF }}, \
2181 CONST_DOUBLE }}, \