2012-07-26 Kazu Hirata <kazu@codesourcery.com>
[official-gcc.git] / gcc / dwarf2cfi.c
blob3edb6e1250adc84dae3df00074a5700ea85af6e1
1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "version.h"
27 #include "flags.h"
28 #include "rtl.h"
29 #include "function.h"
30 #include "basic-block.h"
31 #include "dwarf2.h"
32 #include "dwarf2out.h"
33 #include "dwarf2asm.h"
34 #include "ggc.h"
35 #include "tm_p.h"
36 #include "target.h"
37 #include "common/common-target.h"
38 #include "tree-pass.h"
40 #include "except.h" /* expand_builtin_dwarf_sp_column */
41 #include "expr.h" /* init_return_column_size */
42 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
43 #include "output.h" /* asm_out_file */
44 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
47 /* ??? Poison these here until it can be done generically. They've been
48 totally replaced in this file; make sure it stays that way. */
49 #undef DWARF2_UNWIND_INFO
50 #undef DWARF2_FRAME_INFO
51 #if (GCC_VERSION >= 3000)
52 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
53 #endif
55 #ifndef INCOMING_RETURN_ADDR_RTX
56 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
57 #endif
59 /* Maximum size (in bytes) of an artificially generated label. */
60 #define MAX_ARTIFICIAL_LABEL_BYTES 30
62 /* A collected description of an entire row of the abstract CFI table. */
63 typedef struct GTY(()) dw_cfi_row_struct
65 /* The expression that computes the CFA, expressed in two different ways.
66 The CFA member for the simple cases, and the full CFI expression for
67 the complex cases. The later will be a DW_CFA_cfa_expression. */
68 dw_cfa_location cfa;
69 dw_cfi_ref cfa_cfi;
71 /* The expressions for any register column that is saved. */
72 cfi_vec reg_save;
73 } dw_cfi_row;
75 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
76 typedef struct GTY(()) reg_saved_in_data_struct {
77 rtx orig_reg;
78 rtx saved_in_reg;
79 } reg_saved_in_data;
81 DEF_VEC_O (reg_saved_in_data);
82 DEF_VEC_ALLOC_O (reg_saved_in_data, heap);
84 /* Since we no longer have a proper CFG, we're going to create a facsimile
85 of one on the fly while processing the frame-related insns.
87 We create dw_trace_info structures for each extended basic block beginning
88 and ending at a "save point". Save points are labels, barriers, certain
89 notes, and of course the beginning and end of the function.
91 As we encounter control transfer insns, we propagate the "current"
92 row state across the edges to the starts of traces. When checking is
93 enabled, we validate that we propagate the same data from all sources.
95 All traces are members of the TRACE_INFO array, in the order in which
96 they appear in the instruction stream.
98 All save points are present in the TRACE_INDEX hash, mapping the insn
99 starting a trace to the dw_trace_info describing the trace. */
101 typedef struct
103 /* The insn that begins the trace. */
104 rtx head;
106 /* The row state at the beginning and end of the trace. */
107 dw_cfi_row *beg_row, *end_row;
109 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
110 while scanning insns. However, the args_size value is irrelevant at
111 any point except can_throw_internal_p insns. Therefore the "delay"
112 sizes the values that must actually be emitted for this trace. */
113 HOST_WIDE_INT beg_true_args_size, end_true_args_size;
114 HOST_WIDE_INT beg_delay_args_size, end_delay_args_size;
116 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
117 rtx eh_head;
119 /* The following variables contain data used in interpreting frame related
120 expressions. These are not part of the "real" row state as defined by
121 Dwarf, but it seems like they need to be propagated into a trace in case
122 frame related expressions have been sunk. */
123 /* ??? This seems fragile. These variables are fragments of a larger
124 expression. If we do not keep the entire expression together, we risk
125 not being able to put it together properly. Consider forcing targets
126 to generate self-contained expressions and dropping all of the magic
127 interpretation code in this file. Or at least refusing to shrink wrap
128 any frame related insn that doesn't contain a complete expression. */
130 /* The register used for saving registers to the stack, and its offset
131 from the CFA. */
132 dw_cfa_location cfa_store;
134 /* A temporary register holding an integral value used in adjusting SP
135 or setting up the store_reg. The "offset" field holds the integer
136 value, not an offset. */
137 dw_cfa_location cfa_temp;
139 /* A set of registers saved in other registers. This is the inverse of
140 the row->reg_save info, if the entry is a DW_CFA_register. This is
141 implemented as a flat array because it normally contains zero or 1
142 entry, depending on the target. IA-64 is the big spender here, using
143 a maximum of 5 entries. */
144 VEC(reg_saved_in_data, heap) *regs_saved_in_regs;
146 /* An identifier for this trace. Used only for debugging dumps. */
147 unsigned id;
149 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
150 bool switch_sections;
152 /* True if we've seen different values incoming to beg_true_args_size. */
153 bool args_size_undefined;
154 } dw_trace_info;
156 DEF_VEC_O (dw_trace_info);
157 DEF_VEC_ALLOC_O (dw_trace_info, heap);
159 typedef dw_trace_info *dw_trace_info_ref;
161 DEF_VEC_P (dw_trace_info_ref);
162 DEF_VEC_ALLOC_P (dw_trace_info_ref, heap);
164 /* The variables making up the pseudo-cfg, as described above. */
165 static VEC (dw_trace_info, heap) *trace_info;
166 static VEC (dw_trace_info_ref, heap) *trace_work_list;
167 static htab_t trace_index;
169 /* A vector of call frame insns for the CIE. */
170 cfi_vec cie_cfi_vec;
172 /* The state of the first row of the FDE table, which includes the
173 state provided by the CIE. */
174 static GTY(()) dw_cfi_row *cie_cfi_row;
176 static GTY(()) reg_saved_in_data *cie_return_save;
178 static GTY(()) unsigned long dwarf2out_cfi_label_num;
180 /* The insn after which a new CFI note should be emitted. */
181 static rtx add_cfi_insn;
183 /* When non-null, add_cfi will add the CFI to this vector. */
184 static cfi_vec *add_cfi_vec;
186 /* The current instruction trace. */
187 static dw_trace_info *cur_trace;
189 /* The current, i.e. most recently generated, row of the CFI table. */
190 static dw_cfi_row *cur_row;
192 /* A copy of the current CFA, for use during the processing of a
193 single insn. */
194 static dw_cfa_location *cur_cfa;
196 /* We delay emitting a register save until either (a) we reach the end
197 of the prologue or (b) the register is clobbered. This clusters
198 register saves so that there are fewer pc advances. */
200 typedef struct {
201 rtx reg;
202 rtx saved_reg;
203 HOST_WIDE_INT cfa_offset;
204 } queued_reg_save;
206 DEF_VEC_O (queued_reg_save);
207 DEF_VEC_ALLOC_O (queued_reg_save, heap);
209 static VEC(queued_reg_save, heap) *queued_reg_saves;
211 /* True if any CFI directives were emitted at the current insn. */
212 static bool any_cfis_emitted;
214 /* Short-hand for commonly used register numbers. */
215 static unsigned dw_stack_pointer_regnum;
216 static unsigned dw_frame_pointer_regnum;
218 /* Hook used by __throw. */
221 expand_builtin_dwarf_sp_column (void)
223 unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
224 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1));
227 /* MEM is a memory reference for the register size table, each element of
228 which has mode MODE. Initialize column C as a return address column. */
230 static void
231 init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c)
233 HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode);
234 HOST_WIDE_INT size = GET_MODE_SIZE (Pmode);
235 emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size));
238 /* Generate code to initialize the register size table. */
240 void
241 expand_builtin_init_dwarf_reg_sizes (tree address)
243 unsigned int i;
244 enum machine_mode mode = TYPE_MODE (char_type_node);
245 rtx addr = expand_normal (address);
246 rtx mem = gen_rtx_MEM (BLKmode, addr);
247 bool wrote_return_column = false;
249 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
251 unsigned int dnum = DWARF_FRAME_REGNUM (i);
252 unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
254 if (rnum < DWARF_FRAME_REGISTERS)
256 HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode);
257 enum machine_mode save_mode = reg_raw_mode[i];
258 HOST_WIDE_INT size;
260 if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode))
261 save_mode = choose_hard_reg_mode (i, 1, true);
262 if (dnum == DWARF_FRAME_RETURN_COLUMN)
264 if (save_mode == VOIDmode)
265 continue;
266 wrote_return_column = true;
268 size = GET_MODE_SIZE (save_mode);
269 if (offset < 0)
270 continue;
272 emit_move_insn (adjust_address (mem, mode, offset),
273 gen_int_mode (size, mode));
277 if (!wrote_return_column)
278 init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN);
280 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
281 init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN);
282 #endif
284 targetm.init_dwarf_reg_sizes_extra (address);
288 static hashval_t
289 dw_trace_info_hash (const void *ptr)
291 const dw_trace_info *ti = (const dw_trace_info *) ptr;
292 return INSN_UID (ti->head);
295 static int
296 dw_trace_info_eq (const void *ptr_a, const void *ptr_b)
298 const dw_trace_info *a = (const dw_trace_info *) ptr_a;
299 const dw_trace_info *b = (const dw_trace_info *) ptr_b;
300 return a->head == b->head;
303 static dw_trace_info *
304 get_trace_info (rtx insn)
306 dw_trace_info dummy;
307 dummy.head = insn;
308 return (dw_trace_info *)
309 htab_find_with_hash (trace_index, &dummy, INSN_UID (insn));
312 static bool
313 save_point_p (rtx insn)
315 /* Labels, except those that are really jump tables. */
316 if (LABEL_P (insn))
317 return inside_basic_block_p (insn);
319 /* We split traces at the prologue/epilogue notes because those
320 are points at which the unwind info is usually stable. This
321 makes it easier to find spots with identical unwind info so
322 that we can use remember/restore_state opcodes. */
323 if (NOTE_P (insn))
324 switch (NOTE_KIND (insn))
326 case NOTE_INSN_PROLOGUE_END:
327 case NOTE_INSN_EPILOGUE_BEG:
328 return true;
331 return false;
334 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
336 static inline HOST_WIDE_INT
337 div_data_align (HOST_WIDE_INT off)
339 HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT;
340 gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off);
341 return r;
344 /* Return true if we need a signed version of a given opcode
345 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
347 static inline bool
348 need_data_align_sf_opcode (HOST_WIDE_INT off)
350 return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0;
353 /* Return a pointer to a newly allocated Call Frame Instruction. */
355 static inline dw_cfi_ref
356 new_cfi (void)
358 dw_cfi_ref cfi = ggc_alloc_dw_cfi_node ();
360 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0;
361 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0;
363 return cfi;
366 /* Return a newly allocated CFI row, with no defined data. */
368 static dw_cfi_row *
369 new_cfi_row (void)
371 dw_cfi_row *row = ggc_alloc_cleared_dw_cfi_row ();
373 row->cfa.reg = INVALID_REGNUM;
375 return row;
378 /* Return a copy of an existing CFI row. */
380 static dw_cfi_row *
381 copy_cfi_row (dw_cfi_row *src)
383 dw_cfi_row *dst = ggc_alloc_dw_cfi_row ();
385 *dst = *src;
386 dst->reg_save = VEC_copy (dw_cfi_ref, gc, src->reg_save);
388 return dst;
391 /* Generate a new label for the CFI info to refer to. */
393 static char *
394 dwarf2out_cfi_label (void)
396 int num = dwarf2out_cfi_label_num++;
397 char label[20];
399 ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num);
401 return xstrdup (label);
404 /* Add CFI either to the current insn stream or to a vector, or both. */
406 static void
407 add_cfi (dw_cfi_ref cfi)
409 any_cfis_emitted = true;
411 if (add_cfi_insn != NULL)
413 add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn);
414 NOTE_CFI (add_cfi_insn) = cfi;
417 if (add_cfi_vec != NULL)
418 VEC_safe_push (dw_cfi_ref, gc, *add_cfi_vec, cfi);
421 static void
422 add_cfi_args_size (HOST_WIDE_INT size)
424 dw_cfi_ref cfi = new_cfi ();
426 /* While we can occasionally have args_size < 0 internally, this state
427 should not persist at a point we actually need an opcode. */
428 gcc_assert (size >= 0);
430 cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
431 cfi->dw_cfi_oprnd1.dw_cfi_offset = size;
433 add_cfi (cfi);
436 static void
437 add_cfi_restore (unsigned reg)
439 dw_cfi_ref cfi = new_cfi ();
441 cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
442 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
444 add_cfi (cfi);
447 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
448 that the register column is no longer saved. */
450 static void
451 update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi)
453 if (VEC_length (dw_cfi_ref, row->reg_save) <= column)
454 VEC_safe_grow_cleared (dw_cfi_ref, gc, row->reg_save, column + 1);
455 VEC_replace (dw_cfi_ref, row->reg_save, column, cfi);
458 /* This function fills in aa dw_cfa_location structure from a dwarf location
459 descriptor sequence. */
461 static void
462 get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_struct *loc)
464 struct dw_loc_descr_struct *ptr;
465 cfa->offset = 0;
466 cfa->base_offset = 0;
467 cfa->indirect = 0;
468 cfa->reg = -1;
470 for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next)
472 enum dwarf_location_atom op = ptr->dw_loc_opc;
474 switch (op)
476 case DW_OP_reg0:
477 case DW_OP_reg1:
478 case DW_OP_reg2:
479 case DW_OP_reg3:
480 case DW_OP_reg4:
481 case DW_OP_reg5:
482 case DW_OP_reg6:
483 case DW_OP_reg7:
484 case DW_OP_reg8:
485 case DW_OP_reg9:
486 case DW_OP_reg10:
487 case DW_OP_reg11:
488 case DW_OP_reg12:
489 case DW_OP_reg13:
490 case DW_OP_reg14:
491 case DW_OP_reg15:
492 case DW_OP_reg16:
493 case DW_OP_reg17:
494 case DW_OP_reg18:
495 case DW_OP_reg19:
496 case DW_OP_reg20:
497 case DW_OP_reg21:
498 case DW_OP_reg22:
499 case DW_OP_reg23:
500 case DW_OP_reg24:
501 case DW_OP_reg25:
502 case DW_OP_reg26:
503 case DW_OP_reg27:
504 case DW_OP_reg28:
505 case DW_OP_reg29:
506 case DW_OP_reg30:
507 case DW_OP_reg31:
508 cfa->reg = op - DW_OP_reg0;
509 break;
510 case DW_OP_regx:
511 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
512 break;
513 case DW_OP_breg0:
514 case DW_OP_breg1:
515 case DW_OP_breg2:
516 case DW_OP_breg3:
517 case DW_OP_breg4:
518 case DW_OP_breg5:
519 case DW_OP_breg6:
520 case DW_OP_breg7:
521 case DW_OP_breg8:
522 case DW_OP_breg9:
523 case DW_OP_breg10:
524 case DW_OP_breg11:
525 case DW_OP_breg12:
526 case DW_OP_breg13:
527 case DW_OP_breg14:
528 case DW_OP_breg15:
529 case DW_OP_breg16:
530 case DW_OP_breg17:
531 case DW_OP_breg18:
532 case DW_OP_breg19:
533 case DW_OP_breg20:
534 case DW_OP_breg21:
535 case DW_OP_breg22:
536 case DW_OP_breg23:
537 case DW_OP_breg24:
538 case DW_OP_breg25:
539 case DW_OP_breg26:
540 case DW_OP_breg27:
541 case DW_OP_breg28:
542 case DW_OP_breg29:
543 case DW_OP_breg30:
544 case DW_OP_breg31:
545 cfa->reg = op - DW_OP_breg0;
546 cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int;
547 break;
548 case DW_OP_bregx:
549 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
550 cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int;
551 break;
552 case DW_OP_deref:
553 cfa->indirect = 1;
554 break;
555 case DW_OP_plus_uconst:
556 cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned;
557 break;
558 default:
559 gcc_unreachable ();
564 /* Find the previous value for the CFA, iteratively. CFI is the opcode
565 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
566 one level of remember/restore state processing. */
568 void
569 lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember)
571 switch (cfi->dw_cfi_opc)
573 case DW_CFA_def_cfa_offset:
574 case DW_CFA_def_cfa_offset_sf:
575 loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset;
576 break;
577 case DW_CFA_def_cfa_register:
578 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
579 break;
580 case DW_CFA_def_cfa:
581 case DW_CFA_def_cfa_sf:
582 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
583 loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset;
584 break;
585 case DW_CFA_def_cfa_expression:
586 get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc);
587 break;
589 case DW_CFA_remember_state:
590 gcc_assert (!remember->in_use);
591 *remember = *loc;
592 remember->in_use = 1;
593 break;
594 case DW_CFA_restore_state:
595 gcc_assert (remember->in_use);
596 *loc = *remember;
597 remember->in_use = 0;
598 break;
600 default:
601 break;
605 /* Determine if two dw_cfa_location structures define the same data. */
607 bool
608 cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2)
610 return (loc1->reg == loc2->reg
611 && loc1->offset == loc2->offset
612 && loc1->indirect == loc2->indirect
613 && (loc1->indirect == 0
614 || loc1->base_offset == loc2->base_offset));
617 /* Determine if two CFI operands are identical. */
619 static bool
620 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b)
622 switch (t)
624 case dw_cfi_oprnd_unused:
625 return true;
626 case dw_cfi_oprnd_reg_num:
627 return a->dw_cfi_reg_num == b->dw_cfi_reg_num;
628 case dw_cfi_oprnd_offset:
629 return a->dw_cfi_offset == b->dw_cfi_offset;
630 case dw_cfi_oprnd_addr:
631 return (a->dw_cfi_addr == b->dw_cfi_addr
632 || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0);
633 case dw_cfi_oprnd_loc:
634 return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc);
636 gcc_unreachable ();
639 /* Determine if two CFI entries are identical. */
641 static bool
642 cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b)
644 enum dwarf_call_frame_info opc;
646 /* Make things easier for our callers, including missing operands. */
647 if (a == b)
648 return true;
649 if (a == NULL || b == NULL)
650 return false;
652 /* Obviously, the opcodes must match. */
653 opc = a->dw_cfi_opc;
654 if (opc != b->dw_cfi_opc)
655 return false;
657 /* Compare the two operands, re-using the type of the operands as
658 already exposed elsewhere. */
659 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc),
660 &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1)
661 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc),
662 &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2));
665 /* Determine if two CFI_ROW structures are identical. */
667 static bool
668 cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b)
670 size_t i, n_a, n_b, n_max;
672 if (a->cfa_cfi)
674 if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi))
675 return false;
677 else if (!cfa_equal_p (&a->cfa, &b->cfa))
678 return false;
680 n_a = VEC_length (dw_cfi_ref, a->reg_save);
681 n_b = VEC_length (dw_cfi_ref, b->reg_save);
682 n_max = MAX (n_a, n_b);
684 for (i = 0; i < n_max; ++i)
686 dw_cfi_ref r_a = NULL, r_b = NULL;
688 if (i < n_a)
689 r_a = VEC_index (dw_cfi_ref, a->reg_save, i);
690 if (i < n_b)
691 r_b = VEC_index (dw_cfi_ref, b->reg_save, i);
693 if (!cfi_equal_p (r_a, r_b))
694 return false;
697 return true;
700 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
701 what opcode to emit. Returns the CFI opcode to effect the change, or
702 NULL if NEW_CFA == OLD_CFA. */
704 static dw_cfi_ref
705 def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa)
707 dw_cfi_ref cfi;
709 /* If nothing changed, no need to issue any call frame instructions. */
710 if (cfa_equal_p (old_cfa, new_cfa))
711 return NULL;
713 cfi = new_cfi ();
715 if (new_cfa->reg == old_cfa->reg && !new_cfa->indirect && !old_cfa->indirect)
717 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
718 the CFA register did not change but the offset did. The data
719 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
720 in the assembler via the .cfi_def_cfa_offset directive. */
721 if (new_cfa->offset < 0)
722 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf;
723 else
724 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset;
725 cfi->dw_cfi_oprnd1.dw_cfi_offset = new_cfa->offset;
727 else if (new_cfa->offset == old_cfa->offset
728 && old_cfa->reg != INVALID_REGNUM
729 && !new_cfa->indirect
730 && !old_cfa->indirect)
732 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
733 indicating the CFA register has changed to <register> but the
734 offset has not changed. */
735 cfi->dw_cfi_opc = DW_CFA_def_cfa_register;
736 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
738 else if (new_cfa->indirect == 0)
740 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
741 indicating the CFA register has changed to <register> with
742 the specified offset. The data factoring for DW_CFA_def_cfa_sf
743 happens in output_cfi, or in the assembler via the .cfi_def_cfa
744 directive. */
745 if (new_cfa->offset < 0)
746 cfi->dw_cfi_opc = DW_CFA_def_cfa_sf;
747 else
748 cfi->dw_cfi_opc = DW_CFA_def_cfa;
749 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
750 cfi->dw_cfi_oprnd2.dw_cfi_offset = new_cfa->offset;
752 else
754 /* Construct a DW_CFA_def_cfa_expression instruction to
755 calculate the CFA using a full location expression since no
756 register-offset pair is available. */
757 struct dw_loc_descr_struct *loc_list;
759 cfi->dw_cfi_opc = DW_CFA_def_cfa_expression;
760 loc_list = build_cfa_loc (new_cfa, 0);
761 cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list;
764 return cfi;
767 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
769 static void
770 def_cfa_1 (dw_cfa_location *new_cfa)
772 dw_cfi_ref cfi;
774 if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0)
775 cur_trace->cfa_store.offset = new_cfa->offset;
777 cfi = def_cfa_0 (&cur_row->cfa, new_cfa);
778 if (cfi)
780 cur_row->cfa = *new_cfa;
781 cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression
782 ? cfi : NULL);
784 add_cfi (cfi);
788 /* Add the CFI for saving a register. REG is the CFA column number.
789 If SREG is -1, the register is saved at OFFSET from the CFA;
790 otherwise it is saved in SREG. */
792 static void
793 reg_save (unsigned int reg, unsigned int sreg, HOST_WIDE_INT offset)
795 dw_fde_ref fde = cfun ? cfun->fde : NULL;
796 dw_cfi_ref cfi = new_cfi ();
798 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
800 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
801 if (fde
802 && fde->stack_realign
803 && sreg == INVALID_REGNUM)
805 cfi->dw_cfi_opc = DW_CFA_expression;
806 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
807 cfi->dw_cfi_oprnd2.dw_cfi_loc
808 = build_cfa_aligned_loc (&cur_row->cfa, offset,
809 fde->stack_realignment);
811 else if (sreg == INVALID_REGNUM)
813 if (need_data_align_sf_opcode (offset))
814 cfi->dw_cfi_opc = DW_CFA_offset_extended_sf;
815 else if (reg & ~0x3f)
816 cfi->dw_cfi_opc = DW_CFA_offset_extended;
817 else
818 cfi->dw_cfi_opc = DW_CFA_offset;
819 cfi->dw_cfi_oprnd2.dw_cfi_offset = offset;
821 else if (sreg == reg)
823 /* While we could emit something like DW_CFA_same_value or
824 DW_CFA_restore, we never expect to see something like that
825 in a prologue. This is more likely to be a bug. A backend
826 can always bypass this by using REG_CFA_RESTORE directly. */
827 gcc_unreachable ();
829 else
831 cfi->dw_cfi_opc = DW_CFA_register;
832 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
835 add_cfi (cfi);
836 update_row_reg_save (cur_row, reg, cfi);
839 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
840 and adjust data structures to match. */
842 static void
843 notice_args_size (rtx insn)
845 HOST_WIDE_INT args_size, delta;
846 rtx note;
848 note = find_reg_note (insn, REG_ARGS_SIZE, NULL);
849 if (note == NULL)
850 return;
852 args_size = INTVAL (XEXP (note, 0));
853 delta = args_size - cur_trace->end_true_args_size;
854 if (delta == 0)
855 return;
857 cur_trace->end_true_args_size = args_size;
859 /* If the CFA is computed off the stack pointer, then we must adjust
860 the computation of the CFA as well. */
861 if (cur_cfa->reg == dw_stack_pointer_regnum)
863 gcc_assert (!cur_cfa->indirect);
865 /* Convert a change in args_size (always a positive in the
866 direction of stack growth) to a change in stack pointer. */
867 #ifndef STACK_GROWS_DOWNWARD
868 delta = -delta;
869 #endif
870 cur_cfa->offset += delta;
874 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
875 data within the trace related to EH insns and args_size. */
877 static void
878 notice_eh_throw (rtx insn)
880 HOST_WIDE_INT args_size;
882 args_size = cur_trace->end_true_args_size;
883 if (cur_trace->eh_head == NULL)
885 cur_trace->eh_head = insn;
886 cur_trace->beg_delay_args_size = args_size;
887 cur_trace->end_delay_args_size = args_size;
889 else if (cur_trace->end_delay_args_size != args_size)
891 cur_trace->end_delay_args_size = args_size;
893 /* ??? If the CFA is the stack pointer, search backward for the last
894 CFI note and insert there. Given that the stack changed for the
895 args_size change, there *must* be such a note in between here and
896 the last eh insn. */
897 add_cfi_args_size (args_size);
901 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
902 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
903 used in places where rtl is prohibited. */
905 static inline unsigned
906 dwf_regno (const_rtx reg)
908 return DWARF_FRAME_REGNUM (REGNO (reg));
911 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
913 static bool
914 compare_reg_or_pc (rtx x, rtx y)
916 if (REG_P (x) && REG_P (y))
917 return REGNO (x) == REGNO (y);
918 return x == y;
921 /* Record SRC as being saved in DEST. DEST may be null to delete an
922 existing entry. SRC may be a register or PC_RTX. */
924 static void
925 record_reg_saved_in_reg (rtx dest, rtx src)
927 reg_saved_in_data *elt;
928 size_t i;
930 FOR_EACH_VEC_ELT (reg_saved_in_data, cur_trace->regs_saved_in_regs, i, elt)
931 if (compare_reg_or_pc (elt->orig_reg, src))
933 if (dest == NULL)
934 VEC_unordered_remove (reg_saved_in_data,
935 cur_trace->regs_saved_in_regs, i);
936 else
937 elt->saved_in_reg = dest;
938 return;
941 if (dest == NULL)
942 return;
944 elt = VEC_safe_push (reg_saved_in_data, heap,
945 cur_trace->regs_saved_in_regs, NULL);
946 elt->orig_reg = src;
947 elt->saved_in_reg = dest;
950 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
951 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
953 static void
954 queue_reg_save (rtx reg, rtx sreg, HOST_WIDE_INT offset)
956 queued_reg_save *q;
957 size_t i;
959 /* Duplicates waste space, but it's also necessary to remove them
960 for correctness, since the queue gets output in reverse order. */
961 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
962 if (compare_reg_or_pc (q->reg, reg))
963 goto found;
965 q = VEC_safe_push (queued_reg_save, heap, queued_reg_saves, NULL);
967 found:
968 q->reg = reg;
969 q->saved_reg = sreg;
970 q->cfa_offset = offset;
973 /* Output all the entries in QUEUED_REG_SAVES. */
975 static void
976 dwarf2out_flush_queued_reg_saves (void)
978 queued_reg_save *q;
979 size_t i;
981 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
983 unsigned int reg, sreg;
985 record_reg_saved_in_reg (q->saved_reg, q->reg);
987 if (q->reg == pc_rtx)
988 reg = DWARF_FRAME_RETURN_COLUMN;
989 else
990 reg = dwf_regno (q->reg);
991 if (q->saved_reg)
992 sreg = dwf_regno (q->saved_reg);
993 else
994 sreg = INVALID_REGNUM;
995 reg_save (reg, sreg, q->cfa_offset);
998 VEC_truncate (queued_reg_save, queued_reg_saves, 0);
1001 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1002 location for? Or, does it clobber a register which we've previously
1003 said that some other register is saved in, and for which we now
1004 have a new location for? */
1006 static bool
1007 clobbers_queued_reg_save (const_rtx insn)
1009 queued_reg_save *q;
1010 size_t iq;
1012 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, iq, q)
1014 size_t ir;
1015 reg_saved_in_data *rir;
1017 if (modified_in_p (q->reg, insn))
1018 return true;
1020 FOR_EACH_VEC_ELT (reg_saved_in_data,
1021 cur_trace->regs_saved_in_regs, ir, rir)
1022 if (compare_reg_or_pc (q->reg, rir->orig_reg)
1023 && modified_in_p (rir->saved_in_reg, insn))
1024 return true;
1027 return false;
1030 /* What register, if any, is currently saved in REG? */
1032 static rtx
1033 reg_saved_in (rtx reg)
1035 unsigned int regn = REGNO (reg);
1036 queued_reg_save *q;
1037 reg_saved_in_data *rir;
1038 size_t i;
1040 FOR_EACH_VEC_ELT (queued_reg_save, queued_reg_saves, i, q)
1041 if (q->saved_reg && regn == REGNO (q->saved_reg))
1042 return q->reg;
1044 FOR_EACH_VEC_ELT (reg_saved_in_data, cur_trace->regs_saved_in_regs, i, rir)
1045 if (regn == REGNO (rir->saved_in_reg))
1046 return rir->orig_reg;
1048 return NULL_RTX;
1051 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1053 static void
1054 dwarf2out_frame_debug_def_cfa (rtx pat)
1056 memset (cur_cfa, 0, sizeof (*cur_cfa));
1058 if (GET_CODE (pat) == PLUS)
1060 cur_cfa->offset = INTVAL (XEXP (pat, 1));
1061 pat = XEXP (pat, 0);
1063 if (MEM_P (pat))
1065 cur_cfa->indirect = 1;
1066 pat = XEXP (pat, 0);
1067 if (GET_CODE (pat) == PLUS)
1069 cur_cfa->base_offset = INTVAL (XEXP (pat, 1));
1070 pat = XEXP (pat, 0);
1073 /* ??? If this fails, we could be calling into the _loc functions to
1074 define a full expression. So far no port does that. */
1075 gcc_assert (REG_P (pat));
1076 cur_cfa->reg = dwf_regno (pat);
1079 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1081 static void
1082 dwarf2out_frame_debug_adjust_cfa (rtx pat)
1084 rtx src, dest;
1086 gcc_assert (GET_CODE (pat) == SET);
1087 dest = XEXP (pat, 0);
1088 src = XEXP (pat, 1);
1090 switch (GET_CODE (src))
1092 case PLUS:
1093 gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg);
1094 cur_cfa->offset -= INTVAL (XEXP (src, 1));
1095 break;
1097 case REG:
1098 break;
1100 default:
1101 gcc_unreachable ();
1104 cur_cfa->reg = dwf_regno (dest);
1105 gcc_assert (cur_cfa->indirect == 0);
1108 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1110 static void
1111 dwarf2out_frame_debug_cfa_offset (rtx set)
1113 HOST_WIDE_INT offset;
1114 rtx src, addr, span;
1115 unsigned int sregno;
1117 src = XEXP (set, 1);
1118 addr = XEXP (set, 0);
1119 gcc_assert (MEM_P (addr));
1120 addr = XEXP (addr, 0);
1122 /* As documented, only consider extremely simple addresses. */
1123 switch (GET_CODE (addr))
1125 case REG:
1126 gcc_assert (dwf_regno (addr) == cur_cfa->reg);
1127 offset = -cur_cfa->offset;
1128 break;
1129 case PLUS:
1130 gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg);
1131 offset = INTVAL (XEXP (addr, 1)) - cur_cfa->offset;
1132 break;
1133 default:
1134 gcc_unreachable ();
1137 if (src == pc_rtx)
1139 span = NULL;
1140 sregno = DWARF_FRAME_RETURN_COLUMN;
1142 else
1144 span = targetm.dwarf_register_span (src);
1145 sregno = dwf_regno (src);
1148 /* ??? We'd like to use queue_reg_save, but we need to come up with
1149 a different flushing heuristic for epilogues. */
1150 if (!span)
1151 reg_save (sregno, INVALID_REGNUM, offset);
1152 else
1154 /* We have a PARALLEL describing where the contents of SRC live.
1155 Queue register saves for each piece of the PARALLEL. */
1156 int par_index;
1157 int limit;
1158 HOST_WIDE_INT span_offset = offset;
1160 gcc_assert (GET_CODE (span) == PARALLEL);
1162 limit = XVECLEN (span, 0);
1163 for (par_index = 0; par_index < limit; par_index++)
1165 rtx elem = XVECEXP (span, 0, par_index);
1167 sregno = dwf_regno (src);
1168 reg_save (sregno, INVALID_REGNUM, span_offset);
1169 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1174 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1176 static void
1177 dwarf2out_frame_debug_cfa_register (rtx set)
1179 rtx src, dest;
1180 unsigned sregno, dregno;
1182 src = XEXP (set, 1);
1183 dest = XEXP (set, 0);
1185 record_reg_saved_in_reg (dest, src);
1186 if (src == pc_rtx)
1187 sregno = DWARF_FRAME_RETURN_COLUMN;
1188 else
1189 sregno = dwf_regno (src);
1191 dregno = dwf_regno (dest);
1193 /* ??? We'd like to use queue_reg_save, but we need to come up with
1194 a different flushing heuristic for epilogues. */
1195 reg_save (sregno, dregno, 0);
1198 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1200 static void
1201 dwarf2out_frame_debug_cfa_expression (rtx set)
1203 rtx src, dest, span;
1204 dw_cfi_ref cfi = new_cfi ();
1205 unsigned regno;
1207 dest = SET_DEST (set);
1208 src = SET_SRC (set);
1210 gcc_assert (REG_P (src));
1211 gcc_assert (MEM_P (dest));
1213 span = targetm.dwarf_register_span (src);
1214 gcc_assert (!span);
1216 regno = dwf_regno (src);
1218 cfi->dw_cfi_opc = DW_CFA_expression;
1219 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
1220 cfi->dw_cfi_oprnd2.dw_cfi_loc
1221 = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest),
1222 GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
1224 /* ??? We'd like to use queue_reg_save, were the interface different,
1225 and, as above, we could manage flushing for epilogues. */
1226 add_cfi (cfi);
1227 update_row_reg_save (cur_row, regno, cfi);
1230 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1232 static void
1233 dwarf2out_frame_debug_cfa_restore (rtx reg)
1235 unsigned int regno = dwf_regno (reg);
1237 add_cfi_restore (regno);
1238 update_row_reg_save (cur_row, regno, NULL);
1241 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1242 ??? Perhaps we should note in the CIE where windows are saved (instead of
1243 assuming 0(cfa)) and what registers are in the window. */
1245 static void
1246 dwarf2out_frame_debug_cfa_window_save (void)
1248 dw_cfi_ref cfi = new_cfi ();
1250 cfi->dw_cfi_opc = DW_CFA_GNU_window_save;
1251 add_cfi (cfi);
1254 /* Record call frame debugging information for an expression EXPR,
1255 which either sets SP or FP (adjusting how we calculate the frame
1256 address) or saves a register to the stack or another register.
1257 LABEL indicates the address of EXPR.
1259 This function encodes a state machine mapping rtxes to actions on
1260 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1261 users need not read the source code.
1263 The High-Level Picture
1265 Changes in the register we use to calculate the CFA: Currently we
1266 assume that if you copy the CFA register into another register, we
1267 should take the other one as the new CFA register; this seems to
1268 work pretty well. If it's wrong for some target, it's simple
1269 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1271 Changes in the register we use for saving registers to the stack:
1272 This is usually SP, but not always. Again, we deduce that if you
1273 copy SP into another register (and SP is not the CFA register),
1274 then the new register is the one we will be using for register
1275 saves. This also seems to work.
1277 Register saves: There's not much guesswork about this one; if
1278 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1279 register save, and the register used to calculate the destination
1280 had better be the one we think we're using for this purpose.
1281 It's also assumed that a copy from a call-saved register to another
1282 register is saving that register if RTX_FRAME_RELATED_P is set on
1283 that instruction. If the copy is from a call-saved register to
1284 the *same* register, that means that the register is now the same
1285 value as in the caller.
1287 Except: If the register being saved is the CFA register, and the
1288 offset is nonzero, we are saving the CFA, so we assume we have to
1289 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1290 the intent is to save the value of SP from the previous frame.
1292 In addition, if a register has previously been saved to a different
1293 register,
1295 Invariants / Summaries of Rules
1297 cfa current rule for calculating the CFA. It usually
1298 consists of a register and an offset. This is
1299 actually stored in *cur_cfa, but abbreviated
1300 for the purposes of this documentation.
1301 cfa_store register used by prologue code to save things to the stack
1302 cfa_store.offset is the offset from the value of
1303 cfa_store.reg to the actual CFA
1304 cfa_temp register holding an integral value. cfa_temp.offset
1305 stores the value, which will be used to adjust the
1306 stack pointer. cfa_temp is also used like cfa_store,
1307 to track stores to the stack via fp or a temp reg.
1309 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1310 with cfa.reg as the first operand changes the cfa.reg and its
1311 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1312 cfa_temp.offset.
1314 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1315 expression yielding a constant. This sets cfa_temp.reg
1316 and cfa_temp.offset.
1318 Rule 5: Create a new register cfa_store used to save items to the
1319 stack.
1321 Rules 10-14: Save a register to the stack. Define offset as the
1322 difference of the original location and cfa_store's
1323 location (or cfa_temp's location if cfa_temp is used).
1325 Rules 16-20: If AND operation happens on sp in prologue, we assume
1326 stack is realigned. We will use a group of DW_OP_XXX
1327 expressions to represent the location of the stored
1328 register instead of CFA+offset.
1330 The Rules
1332 "{a,b}" indicates a choice of a xor b.
1333 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1335 Rule 1:
1336 (set <reg1> <reg2>:cfa.reg)
1337 effects: cfa.reg = <reg1>
1338 cfa.offset unchanged
1339 cfa_temp.reg = <reg1>
1340 cfa_temp.offset = cfa.offset
1342 Rule 2:
1343 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1344 {<const_int>,<reg>:cfa_temp.reg}))
1345 effects: cfa.reg = sp if fp used
1346 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1347 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1348 if cfa_store.reg==sp
1350 Rule 3:
1351 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1352 effects: cfa.reg = fp
1353 cfa_offset += +/- <const_int>
1355 Rule 4:
1356 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1357 constraints: <reg1> != fp
1358 <reg1> != sp
1359 effects: cfa.reg = <reg1>
1360 cfa_temp.reg = <reg1>
1361 cfa_temp.offset = cfa.offset
1363 Rule 5:
1364 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1365 constraints: <reg1> != fp
1366 <reg1> != sp
1367 effects: cfa_store.reg = <reg1>
1368 cfa_store.offset = cfa.offset - cfa_temp.offset
1370 Rule 6:
1371 (set <reg> <const_int>)
1372 effects: cfa_temp.reg = <reg>
1373 cfa_temp.offset = <const_int>
1375 Rule 7:
1376 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1377 effects: cfa_temp.reg = <reg1>
1378 cfa_temp.offset |= <const_int>
1380 Rule 8:
1381 (set <reg> (high <exp>))
1382 effects: none
1384 Rule 9:
1385 (set <reg> (lo_sum <exp> <const_int>))
1386 effects: cfa_temp.reg = <reg>
1387 cfa_temp.offset = <const_int>
1389 Rule 10:
1390 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1391 effects: cfa_store.offset -= <const_int>
1392 cfa.offset = cfa_store.offset if cfa.reg == sp
1393 cfa.reg = sp
1394 cfa.base_offset = -cfa_store.offset
1396 Rule 11:
1397 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1398 effects: cfa_store.offset += -/+ mode_size(mem)
1399 cfa.offset = cfa_store.offset if cfa.reg == sp
1400 cfa.reg = sp
1401 cfa.base_offset = -cfa_store.offset
1403 Rule 12:
1404 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1406 <reg2>)
1407 effects: cfa.reg = <reg1>
1408 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1410 Rule 13:
1411 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1412 effects: cfa.reg = <reg1>
1413 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1415 Rule 14:
1416 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1417 effects: cfa.reg = <reg1>
1418 cfa.base_offset = -cfa_temp.offset
1419 cfa_temp.offset -= mode_size(mem)
1421 Rule 15:
1422 (set <reg> {unspec, unspec_volatile})
1423 effects: target-dependent
1425 Rule 16:
1426 (set sp (and: sp <const_int>))
1427 constraints: cfa_store.reg == sp
1428 effects: cfun->fde.stack_realign = 1
1429 cfa_store.offset = 0
1430 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1432 Rule 17:
1433 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1434 effects: cfa_store.offset += -/+ mode_size(mem)
1436 Rule 18:
1437 (set (mem ({pre_inc, pre_dec} sp)) fp)
1438 constraints: fde->stack_realign == 1
1439 effects: cfa_store.offset = 0
1440 cfa.reg != HARD_FRAME_POINTER_REGNUM
1442 Rule 19:
1443 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1444 constraints: fde->stack_realign == 1
1445 && cfa.offset == 0
1446 && cfa.indirect == 0
1447 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1448 effects: Use DW_CFA_def_cfa_expression to define cfa
1449 cfa.reg == fde->drap_reg */
1451 static void
1452 dwarf2out_frame_debug_expr (rtx expr)
1454 rtx src, dest, span;
1455 HOST_WIDE_INT offset;
1456 dw_fde_ref fde;
1458 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1459 the PARALLEL independently. The first element is always processed if
1460 it is a SET. This is for backward compatibility. Other elements
1461 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1462 flag is set in them. */
1463 if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE)
1465 int par_index;
1466 int limit = XVECLEN (expr, 0);
1467 rtx elem;
1469 /* PARALLELs have strict read-modify-write semantics, so we
1470 ought to evaluate every rvalue before changing any lvalue.
1471 It's cumbersome to do that in general, but there's an
1472 easy approximation that is enough for all current users:
1473 handle register saves before register assignments. */
1474 if (GET_CODE (expr) == PARALLEL)
1475 for (par_index = 0; par_index < limit; par_index++)
1477 elem = XVECEXP (expr, 0, par_index);
1478 if (GET_CODE (elem) == SET
1479 && MEM_P (SET_DEST (elem))
1480 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1481 dwarf2out_frame_debug_expr (elem);
1484 for (par_index = 0; par_index < limit; par_index++)
1486 elem = XVECEXP (expr, 0, par_index);
1487 if (GET_CODE (elem) == SET
1488 && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE)
1489 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
1490 dwarf2out_frame_debug_expr (elem);
1492 return;
1495 gcc_assert (GET_CODE (expr) == SET);
1497 src = SET_SRC (expr);
1498 dest = SET_DEST (expr);
1500 if (REG_P (src))
1502 rtx rsi = reg_saved_in (src);
1503 if (rsi)
1504 src = rsi;
1507 fde = cfun->fde;
1509 switch (GET_CODE (dest))
1511 case REG:
1512 switch (GET_CODE (src))
1514 /* Setting FP from SP. */
1515 case REG:
1516 if (cur_cfa->reg == dwf_regno (src))
1518 /* Rule 1 */
1519 /* Update the CFA rule wrt SP or FP. Make sure src is
1520 relative to the current CFA register.
1522 We used to require that dest be either SP or FP, but the
1523 ARM copies SP to a temporary register, and from there to
1524 FP. So we just rely on the backends to only set
1525 RTX_FRAME_RELATED_P on appropriate insns. */
1526 cur_cfa->reg = dwf_regno (dest);
1527 cur_trace->cfa_temp.reg = cur_cfa->reg;
1528 cur_trace->cfa_temp.offset = cur_cfa->offset;
1530 else
1532 /* Saving a register in a register. */
1533 gcc_assert (!fixed_regs [REGNO (dest)]
1534 /* For the SPARC and its register window. */
1535 || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN));
1537 /* After stack is aligned, we can only save SP in FP
1538 if drap register is used. In this case, we have
1539 to restore stack pointer with the CFA value and we
1540 don't generate this DWARF information. */
1541 if (fde
1542 && fde->stack_realign
1543 && REGNO (src) == STACK_POINTER_REGNUM)
1544 gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM
1545 && fde->drap_reg != INVALID_REGNUM
1546 && cur_cfa->reg != dwf_regno (src));
1547 else
1548 queue_reg_save (src, dest, 0);
1550 break;
1552 case PLUS:
1553 case MINUS:
1554 case LO_SUM:
1555 if (dest == stack_pointer_rtx)
1557 /* Rule 2 */
1558 /* Adjusting SP. */
1559 switch (GET_CODE (XEXP (src, 1)))
1561 case CONST_INT:
1562 offset = INTVAL (XEXP (src, 1));
1563 break;
1564 case REG:
1565 gcc_assert (dwf_regno (XEXP (src, 1))
1566 == cur_trace->cfa_temp.reg);
1567 offset = cur_trace->cfa_temp.offset;
1568 break;
1569 default:
1570 gcc_unreachable ();
1573 if (XEXP (src, 0) == hard_frame_pointer_rtx)
1575 /* Restoring SP from FP in the epilogue. */
1576 gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum);
1577 cur_cfa->reg = dw_stack_pointer_regnum;
1579 else if (GET_CODE (src) == LO_SUM)
1580 /* Assume we've set the source reg of the LO_SUM from sp. */
1582 else
1583 gcc_assert (XEXP (src, 0) == stack_pointer_rtx);
1585 if (GET_CODE (src) != MINUS)
1586 offset = -offset;
1587 if (cur_cfa->reg == dw_stack_pointer_regnum)
1588 cur_cfa->offset += offset;
1589 if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
1590 cur_trace->cfa_store.offset += offset;
1592 else if (dest == hard_frame_pointer_rtx)
1594 /* Rule 3 */
1595 /* Either setting the FP from an offset of the SP,
1596 or adjusting the FP */
1597 gcc_assert (frame_pointer_needed);
1599 gcc_assert (REG_P (XEXP (src, 0))
1600 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
1601 && CONST_INT_P (XEXP (src, 1)));
1602 offset = INTVAL (XEXP (src, 1));
1603 if (GET_CODE (src) != MINUS)
1604 offset = -offset;
1605 cur_cfa->offset += offset;
1606 cur_cfa->reg = dw_frame_pointer_regnum;
1608 else
1610 gcc_assert (GET_CODE (src) != MINUS);
1612 /* Rule 4 */
1613 if (REG_P (XEXP (src, 0))
1614 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
1615 && CONST_INT_P (XEXP (src, 1)))
1617 /* Setting a temporary CFA register that will be copied
1618 into the FP later on. */
1619 offset = - INTVAL (XEXP (src, 1));
1620 cur_cfa->offset += offset;
1621 cur_cfa->reg = dwf_regno (dest);
1622 /* Or used to save regs to the stack. */
1623 cur_trace->cfa_temp.reg = cur_cfa->reg;
1624 cur_trace->cfa_temp.offset = cur_cfa->offset;
1627 /* Rule 5 */
1628 else if (REG_P (XEXP (src, 0))
1629 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1630 && XEXP (src, 1) == stack_pointer_rtx)
1632 /* Setting a scratch register that we will use instead
1633 of SP for saving registers to the stack. */
1634 gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum);
1635 cur_trace->cfa_store.reg = dwf_regno (dest);
1636 cur_trace->cfa_store.offset
1637 = cur_cfa->offset - cur_trace->cfa_temp.offset;
1640 /* Rule 9 */
1641 else if (GET_CODE (src) == LO_SUM
1642 && CONST_INT_P (XEXP (src, 1)))
1644 cur_trace->cfa_temp.reg = dwf_regno (dest);
1645 cur_trace->cfa_temp.offset = INTVAL (XEXP (src, 1));
1647 else
1648 gcc_unreachable ();
1650 break;
1652 /* Rule 6 */
1653 case CONST_INT:
1654 cur_trace->cfa_temp.reg = dwf_regno (dest);
1655 cur_trace->cfa_temp.offset = INTVAL (src);
1656 break;
1658 /* Rule 7 */
1659 case IOR:
1660 gcc_assert (REG_P (XEXP (src, 0))
1661 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
1662 && CONST_INT_P (XEXP (src, 1)));
1664 cur_trace->cfa_temp.reg = dwf_regno (dest);
1665 cur_trace->cfa_temp.offset |= INTVAL (XEXP (src, 1));
1666 break;
1668 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1669 which will fill in all of the bits. */
1670 /* Rule 8 */
1671 case HIGH:
1672 break;
1674 /* Rule 15 */
1675 case UNSPEC:
1676 case UNSPEC_VOLATILE:
1677 /* All unspecs should be represented by REG_CFA_* notes. */
1678 gcc_unreachable ();
1679 return;
1681 /* Rule 16 */
1682 case AND:
1683 /* If this AND operation happens on stack pointer in prologue,
1684 we assume the stack is realigned and we extract the
1685 alignment. */
1686 if (fde && XEXP (src, 0) == stack_pointer_rtx)
1688 /* We interpret reg_save differently with stack_realign set.
1689 Thus we must flush whatever we have queued first. */
1690 dwarf2out_flush_queued_reg_saves ();
1692 gcc_assert (cur_trace->cfa_store.reg
1693 == dwf_regno (XEXP (src, 0)));
1694 fde->stack_realign = 1;
1695 fde->stack_realignment = INTVAL (XEXP (src, 1));
1696 cur_trace->cfa_store.offset = 0;
1698 if (cur_cfa->reg != dw_stack_pointer_regnum
1699 && cur_cfa->reg != dw_frame_pointer_regnum)
1700 fde->drap_reg = cur_cfa->reg;
1702 return;
1704 default:
1705 gcc_unreachable ();
1707 break;
1709 case MEM:
1711 /* Saving a register to the stack. Make sure dest is relative to the
1712 CFA register. */
1713 switch (GET_CODE (XEXP (dest, 0)))
1715 /* Rule 10 */
1716 /* With a push. */
1717 case PRE_MODIFY:
1718 case POST_MODIFY:
1719 /* We can't handle variable size modifications. */
1720 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1))
1721 == CONST_INT);
1722 offset = -INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1));
1724 gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM
1725 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1727 cur_trace->cfa_store.offset += offset;
1728 if (cur_cfa->reg == dw_stack_pointer_regnum)
1729 cur_cfa->offset = cur_trace->cfa_store.offset;
1731 if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY)
1732 offset -= cur_trace->cfa_store.offset;
1733 else
1734 offset = -cur_trace->cfa_store.offset;
1735 break;
1737 /* Rule 11 */
1738 case PRE_INC:
1739 case PRE_DEC:
1740 case POST_DEC:
1741 offset = GET_MODE_SIZE (GET_MODE (dest));
1742 if (GET_CODE (XEXP (dest, 0)) == PRE_INC)
1743 offset = -offset;
1745 gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0))
1746 == STACK_POINTER_REGNUM)
1747 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
1749 cur_trace->cfa_store.offset += offset;
1751 /* Rule 18: If stack is aligned, we will use FP as a
1752 reference to represent the address of the stored
1753 regiser. */
1754 if (fde
1755 && fde->stack_realign
1756 && REG_P (src)
1757 && REGNO (src) == HARD_FRAME_POINTER_REGNUM)
1759 gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum);
1760 cur_trace->cfa_store.offset = 0;
1763 if (cur_cfa->reg == dw_stack_pointer_regnum)
1764 cur_cfa->offset = cur_trace->cfa_store.offset;
1766 if (GET_CODE (XEXP (dest, 0)) == POST_DEC)
1767 offset += -cur_trace->cfa_store.offset;
1768 else
1769 offset = -cur_trace->cfa_store.offset;
1770 break;
1772 /* Rule 12 */
1773 /* With an offset. */
1774 case PLUS:
1775 case MINUS:
1776 case LO_SUM:
1778 unsigned int regno;
1780 gcc_assert (CONST_INT_P (XEXP (XEXP (dest, 0), 1))
1781 && REG_P (XEXP (XEXP (dest, 0), 0)));
1782 offset = INTVAL (XEXP (XEXP (dest, 0), 1));
1783 if (GET_CODE (XEXP (dest, 0)) == MINUS)
1784 offset = -offset;
1786 regno = dwf_regno (XEXP (XEXP (dest, 0), 0));
1788 if (cur_cfa->reg == regno)
1789 offset -= cur_cfa->offset;
1790 else if (cur_trace->cfa_store.reg == regno)
1791 offset -= cur_trace->cfa_store.offset;
1792 else
1794 gcc_assert (cur_trace->cfa_temp.reg == regno);
1795 offset -= cur_trace->cfa_temp.offset;
1798 break;
1800 /* Rule 13 */
1801 /* Without an offset. */
1802 case REG:
1804 unsigned int regno = dwf_regno (XEXP (dest, 0));
1806 if (cur_cfa->reg == regno)
1807 offset = -cur_cfa->offset;
1808 else if (cur_trace->cfa_store.reg == regno)
1809 offset = -cur_trace->cfa_store.offset;
1810 else
1812 gcc_assert (cur_trace->cfa_temp.reg == regno);
1813 offset = -cur_trace->cfa_temp.offset;
1816 break;
1818 /* Rule 14 */
1819 case POST_INC:
1820 gcc_assert (cur_trace->cfa_temp.reg
1821 == dwf_regno (XEXP (XEXP (dest, 0), 0)));
1822 offset = -cur_trace->cfa_temp.offset;
1823 cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
1824 break;
1826 default:
1827 gcc_unreachable ();
1830 /* Rule 17 */
1831 /* If the source operand of this MEM operation is a memory,
1832 we only care how much stack grew. */
1833 if (MEM_P (src))
1834 break;
1836 if (REG_P (src)
1837 && REGNO (src) != STACK_POINTER_REGNUM
1838 && REGNO (src) != HARD_FRAME_POINTER_REGNUM
1839 && dwf_regno (src) == cur_cfa->reg)
1841 /* We're storing the current CFA reg into the stack. */
1843 if (cur_cfa->offset == 0)
1845 /* Rule 19 */
1846 /* If stack is aligned, putting CFA reg into stack means
1847 we can no longer use reg + offset to represent CFA.
1848 Here we use DW_CFA_def_cfa_expression instead. The
1849 result of this expression equals to the original CFA
1850 value. */
1851 if (fde
1852 && fde->stack_realign
1853 && cur_cfa->indirect == 0
1854 && cur_cfa->reg != dw_frame_pointer_regnum)
1856 gcc_assert (fde->drap_reg == cur_cfa->reg);
1858 cur_cfa->indirect = 1;
1859 cur_cfa->reg = dw_frame_pointer_regnum;
1860 cur_cfa->base_offset = offset;
1861 cur_cfa->offset = 0;
1863 fde->drap_reg_saved = 1;
1864 break;
1867 /* If the source register is exactly the CFA, assume
1868 we're saving SP like any other register; this happens
1869 on the ARM. */
1870 queue_reg_save (stack_pointer_rtx, NULL_RTX, offset);
1871 break;
1873 else
1875 /* Otherwise, we'll need to look in the stack to
1876 calculate the CFA. */
1877 rtx x = XEXP (dest, 0);
1879 if (!REG_P (x))
1880 x = XEXP (x, 0);
1881 gcc_assert (REG_P (x));
1883 cur_cfa->reg = dwf_regno (x);
1884 cur_cfa->base_offset = offset;
1885 cur_cfa->indirect = 1;
1886 break;
1890 span = NULL;
1891 if (REG_P (src))
1892 span = targetm.dwarf_register_span (src);
1893 if (!span)
1894 queue_reg_save (src, NULL_RTX, offset);
1895 else
1897 /* We have a PARALLEL describing where the contents of SRC live.
1898 Queue register saves for each piece of the PARALLEL. */
1899 int par_index;
1900 int limit;
1901 HOST_WIDE_INT span_offset = offset;
1903 gcc_assert (GET_CODE (span) == PARALLEL);
1905 limit = XVECLEN (span, 0);
1906 for (par_index = 0; par_index < limit; par_index++)
1908 rtx elem = XVECEXP (span, 0, par_index);
1909 queue_reg_save (elem, NULL_RTX, span_offset);
1910 span_offset += GET_MODE_SIZE (GET_MODE (elem));
1913 break;
1915 default:
1916 gcc_unreachable ();
1920 /* Record call frame debugging information for INSN, which either sets
1921 SP or FP (adjusting how we calculate the frame address) or saves a
1922 register to the stack. */
1924 static void
1925 dwarf2out_frame_debug (rtx insn)
1927 rtx note, n;
1928 bool handled_one = false;
1930 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1931 switch (REG_NOTE_KIND (note))
1933 case REG_FRAME_RELATED_EXPR:
1934 insn = XEXP (note, 0);
1935 goto do_frame_expr;
1937 case REG_CFA_DEF_CFA:
1938 dwarf2out_frame_debug_def_cfa (XEXP (note, 0));
1939 handled_one = true;
1940 break;
1942 case REG_CFA_ADJUST_CFA:
1943 n = XEXP (note, 0);
1944 if (n == NULL)
1946 n = PATTERN (insn);
1947 if (GET_CODE (n) == PARALLEL)
1948 n = XVECEXP (n, 0, 0);
1950 dwarf2out_frame_debug_adjust_cfa (n);
1951 handled_one = true;
1952 break;
1954 case REG_CFA_OFFSET:
1955 n = XEXP (note, 0);
1956 if (n == NULL)
1957 n = single_set (insn);
1958 dwarf2out_frame_debug_cfa_offset (n);
1959 handled_one = true;
1960 break;
1962 case REG_CFA_REGISTER:
1963 n = XEXP (note, 0);
1964 if (n == NULL)
1966 n = PATTERN (insn);
1967 if (GET_CODE (n) == PARALLEL)
1968 n = XVECEXP (n, 0, 0);
1970 dwarf2out_frame_debug_cfa_register (n);
1971 handled_one = true;
1972 break;
1974 case REG_CFA_EXPRESSION:
1975 n = XEXP (note, 0);
1976 if (n == NULL)
1977 n = single_set (insn);
1978 dwarf2out_frame_debug_cfa_expression (n);
1979 handled_one = true;
1980 break;
1982 case REG_CFA_RESTORE:
1983 n = XEXP (note, 0);
1984 if (n == NULL)
1986 n = PATTERN (insn);
1987 if (GET_CODE (n) == PARALLEL)
1988 n = XVECEXP (n, 0, 0);
1989 n = XEXP (n, 0);
1991 dwarf2out_frame_debug_cfa_restore (n);
1992 handled_one = true;
1993 break;
1995 case REG_CFA_SET_VDRAP:
1996 n = XEXP (note, 0);
1997 if (REG_P (n))
1999 dw_fde_ref fde = cfun->fde;
2000 if (fde)
2002 gcc_assert (fde->vdrap_reg == INVALID_REGNUM);
2003 if (REG_P (n))
2004 fde->vdrap_reg = dwf_regno (n);
2007 handled_one = true;
2008 break;
2010 case REG_CFA_WINDOW_SAVE:
2011 dwarf2out_frame_debug_cfa_window_save ();
2012 handled_one = true;
2013 break;
2015 case REG_CFA_FLUSH_QUEUE:
2016 /* The actual flush happens elsewhere. */
2017 handled_one = true;
2018 break;
2020 default:
2021 break;
2024 if (!handled_one)
2026 insn = PATTERN (insn);
2027 do_frame_expr:
2028 dwarf2out_frame_debug_expr (insn);
2030 /* Check again. A parallel can save and update the same register.
2031 We could probably check just once, here, but this is safer than
2032 removing the check at the start of the function. */
2033 if (clobbers_queued_reg_save (insn))
2034 dwarf2out_flush_queued_reg_saves ();
2038 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2040 static void
2041 change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row)
2043 size_t i, n_old, n_new, n_max;
2044 dw_cfi_ref cfi;
2046 if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi))
2047 add_cfi (new_row->cfa_cfi);
2048 else
2050 cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa);
2051 if (cfi)
2052 add_cfi (cfi);
2055 n_old = VEC_length (dw_cfi_ref, old_row->reg_save);
2056 n_new = VEC_length (dw_cfi_ref, new_row->reg_save);
2057 n_max = MAX (n_old, n_new);
2059 for (i = 0; i < n_max; ++i)
2061 dw_cfi_ref r_old = NULL, r_new = NULL;
2063 if (i < n_old)
2064 r_old = VEC_index (dw_cfi_ref, old_row->reg_save, i);
2065 if (i < n_new)
2066 r_new = VEC_index (dw_cfi_ref, new_row->reg_save, i);
2068 if (r_old == r_new)
2070 else if (r_new == NULL)
2071 add_cfi_restore (i);
2072 else if (!cfi_equal_p (r_old, r_new))
2073 add_cfi (r_new);
2077 /* Examine CFI and return true if a cfi label and set_loc is needed
2078 beforehand. Even when generating CFI assembler instructions, we
2079 still have to add the cfi to the list so that lookup_cfa_1 works
2080 later on. When -g2 and above we even need to force emitting of
2081 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2082 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2083 and so don't use convert_cfa_to_fb_loc_list. */
2085 static bool
2086 cfi_label_required_p (dw_cfi_ref cfi)
2088 if (!dwarf2out_do_cfi_asm ())
2089 return true;
2091 if (dwarf_version == 2
2092 && debug_info_level > DINFO_LEVEL_TERSE
2093 && (write_symbols == DWARF2_DEBUG
2094 || write_symbols == VMS_AND_DWARF2_DEBUG))
2096 switch (cfi->dw_cfi_opc)
2098 case DW_CFA_def_cfa_offset:
2099 case DW_CFA_def_cfa_offset_sf:
2100 case DW_CFA_def_cfa_register:
2101 case DW_CFA_def_cfa:
2102 case DW_CFA_def_cfa_sf:
2103 case DW_CFA_def_cfa_expression:
2104 case DW_CFA_restore_state:
2105 return true;
2106 default:
2107 return false;
2110 return false;
2113 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2114 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2115 necessary. */
2116 static void
2117 add_cfis_to_fde (void)
2119 dw_fde_ref fde = cfun->fde;
2120 rtx insn, next;
2121 /* We always start with a function_begin label. */
2122 bool first = false;
2124 for (insn = get_insns (); insn; insn = next)
2126 next = NEXT_INSN (insn);
2128 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2130 fde->dw_fde_switch_cfi_index
2131 = VEC_length (dw_cfi_ref, fde->dw_fde_cfi);
2132 /* Don't attempt to advance_loc4 between labels
2133 in different sections. */
2134 first = true;
2137 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2139 bool required = cfi_label_required_p (NOTE_CFI (insn));
2140 while (next)
2141 if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
2143 required |= cfi_label_required_p (NOTE_CFI (next));
2144 next = NEXT_INSN (next);
2146 else if (active_insn_p (next)
2147 || (NOTE_P (next) && (NOTE_KIND (next)
2148 == NOTE_INSN_SWITCH_TEXT_SECTIONS)))
2149 break;
2150 else
2151 next = NEXT_INSN (next);
2152 if (required)
2154 int num = dwarf2out_cfi_label_num;
2155 const char *label = dwarf2out_cfi_label ();
2156 dw_cfi_ref xcfi;
2157 rtx tmp;
2159 /* Set the location counter to the new label. */
2160 xcfi = new_cfi ();
2161 xcfi->dw_cfi_opc = (first ? DW_CFA_set_loc
2162 : DW_CFA_advance_loc4);
2163 xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
2164 VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi, xcfi);
2166 tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
2167 NOTE_LABEL_NUMBER (tmp) = num;
2172 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
2173 VEC_safe_push (dw_cfi_ref, gc, fde->dw_fde_cfi,
2174 NOTE_CFI (insn));
2175 insn = NEXT_INSN (insn);
2177 while (insn != next);
2178 first = false;
2183 /* If LABEL is the start of a trace, then initialize the state of that
2184 trace from CUR_TRACE and CUR_ROW. */
2186 static void
2187 maybe_record_trace_start (rtx start, rtx origin)
2189 dw_trace_info *ti;
2190 HOST_WIDE_INT args_size;
2192 ti = get_trace_info (start);
2193 gcc_assert (ti != NULL);
2195 if (dump_file)
2197 fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n",
2198 cur_trace->id, ti->id,
2199 (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"),
2200 (origin ? INSN_UID (origin) : 0));
2203 args_size = cur_trace->end_true_args_size;
2204 if (ti->beg_row == NULL)
2206 /* This is the first time we've encountered this trace. Propagate
2207 state across the edge and push the trace onto the work list. */
2208 ti->beg_row = copy_cfi_row (cur_row);
2209 ti->beg_true_args_size = args_size;
2211 ti->cfa_store = cur_trace->cfa_store;
2212 ti->cfa_temp = cur_trace->cfa_temp;
2213 ti->regs_saved_in_regs = VEC_copy (reg_saved_in_data, heap,
2214 cur_trace->regs_saved_in_regs);
2216 VEC_safe_push (dw_trace_info_ref, heap, trace_work_list, ti);
2218 if (dump_file)
2219 fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id);
2221 else
2224 /* We ought to have the same state incoming to a given trace no
2225 matter how we arrive at the trace. Anything else means we've
2226 got some kind of optimization error. */
2227 gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row));
2229 /* The args_size is allowed to conflict if it isn't actually used. */
2230 if (ti->beg_true_args_size != args_size)
2231 ti->args_size_undefined = true;
2235 /* Similarly, but handle the args_size and CFA reset across EH
2236 and non-local goto edges. */
2238 static void
2239 maybe_record_trace_start_abnormal (rtx start, rtx origin)
2241 HOST_WIDE_INT save_args_size, delta;
2242 dw_cfa_location save_cfa;
2244 save_args_size = cur_trace->end_true_args_size;
2245 if (save_args_size == 0)
2247 maybe_record_trace_start (start, origin);
2248 return;
2251 delta = -save_args_size;
2252 cur_trace->end_true_args_size = 0;
2254 save_cfa = cur_row->cfa;
2255 if (cur_row->cfa.reg == dw_stack_pointer_regnum)
2257 /* Convert a change in args_size (always a positive in the
2258 direction of stack growth) to a change in stack pointer. */
2259 #ifndef STACK_GROWS_DOWNWARD
2260 delta = -delta;
2261 #endif
2262 cur_row->cfa.offset += delta;
2265 maybe_record_trace_start (start, origin);
2267 cur_trace->end_true_args_size = save_args_size;
2268 cur_row->cfa = save_cfa;
2271 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2272 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2274 static void
2275 create_trace_edges (rtx insn)
2277 rtx tmp, lab;
2278 int i, n;
2280 if (JUMP_P (insn))
2282 if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
2283 return;
2285 if (tablejump_p (insn, NULL, &tmp))
2287 rtvec vec;
2289 tmp = PATTERN (tmp);
2290 vec = XVEC (tmp, GET_CODE (tmp) == ADDR_DIFF_VEC);
2292 n = GET_NUM_ELEM (vec);
2293 for (i = 0; i < n; ++i)
2295 lab = XEXP (RTVEC_ELT (vec, i), 0);
2296 maybe_record_trace_start (lab, insn);
2299 else if (computed_jump_p (insn))
2301 for (lab = forced_labels; lab; lab = XEXP (lab, 1))
2302 maybe_record_trace_start (XEXP (lab, 0), insn);
2304 else if (returnjump_p (insn))
2306 else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL)
2308 n = ASM_OPERANDS_LABEL_LENGTH (tmp);
2309 for (i = 0; i < n; ++i)
2311 lab = XEXP (ASM_OPERANDS_LABEL (tmp, i), 0);
2312 maybe_record_trace_start (lab, insn);
2315 else
2317 lab = JUMP_LABEL (insn);
2318 gcc_assert (lab != NULL);
2319 maybe_record_trace_start (lab, insn);
2322 else if (CALL_P (insn))
2324 /* Sibling calls don't have edges inside this function. */
2325 if (SIBLING_CALL_P (insn))
2326 return;
2328 /* Process non-local goto edges. */
2329 if (can_nonlocal_goto (insn))
2330 for (lab = nonlocal_goto_handler_labels; lab; lab = XEXP (lab, 1))
2331 maybe_record_trace_start_abnormal (XEXP (lab, 0), insn);
2333 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2335 rtx seq = PATTERN (insn);
2336 int i, n = XVECLEN (seq, 0);
2337 for (i = 0; i < n; ++i)
2338 create_trace_edges (XVECEXP (seq, 0, i));
2339 return;
2342 /* Process EH edges. */
2343 if (CALL_P (insn) || cfun->can_throw_non_call_exceptions)
2345 eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn);
2346 if (lp)
2347 maybe_record_trace_start_abnormal (lp->landing_pad, insn);
2351 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2353 static void
2354 scan_insn_after (rtx insn)
2356 if (RTX_FRAME_RELATED_P (insn))
2357 dwarf2out_frame_debug (insn);
2358 notice_args_size (insn);
2361 /* Scan the trace beginning at INSN and create the CFI notes for the
2362 instructions therein. */
2364 static void
2365 scan_trace (dw_trace_info *trace)
2367 rtx prev, insn = trace->head;
2368 dw_cfa_location this_cfa;
2370 if (dump_file)
2371 fprintf (dump_file, "Processing trace %u : start at %s %d\n",
2372 trace->id, rtx_name[(int) GET_CODE (insn)],
2373 INSN_UID (insn));
2375 trace->end_row = copy_cfi_row (trace->beg_row);
2376 trace->end_true_args_size = trace->beg_true_args_size;
2378 cur_trace = trace;
2379 cur_row = trace->end_row;
2381 this_cfa = cur_row->cfa;
2382 cur_cfa = &this_cfa;
2384 for (prev = insn, insn = NEXT_INSN (insn);
2385 insn;
2386 prev = insn, insn = NEXT_INSN (insn))
2388 rtx control;
2390 /* Do everything that happens "before" the insn. */
2391 add_cfi_insn = prev;
2393 /* Notice the end of a trace. */
2394 if (BARRIER_P (insn))
2396 /* Don't bother saving the unneeded queued registers at all. */
2397 VEC_truncate (queued_reg_save, queued_reg_saves, 0);
2398 break;
2400 if (save_point_p (insn))
2402 /* Propagate across fallthru edges. */
2403 dwarf2out_flush_queued_reg_saves ();
2404 maybe_record_trace_start (insn, NULL);
2405 break;
2408 if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn))
2409 continue;
2411 /* Handle all changes to the row state. Sequences require special
2412 handling for the positioning of the notes. */
2413 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2415 rtx elt, pat = PATTERN (insn);
2416 int i, n = XVECLEN (pat, 0);
2418 control = XVECEXP (pat, 0, 0);
2419 if (can_throw_internal (control))
2420 notice_eh_throw (control);
2421 dwarf2out_flush_queued_reg_saves ();
2423 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
2425 /* ??? Hopefully multiple delay slots are not annulled. */
2426 gcc_assert (n == 2);
2427 gcc_assert (!RTX_FRAME_RELATED_P (control));
2428 gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL));
2430 elt = XVECEXP (pat, 0, 1);
2432 if (INSN_FROM_TARGET_P (elt))
2434 HOST_WIDE_INT restore_args_size;
2435 cfi_vec save_row_reg_save;
2437 /* If ELT is an instruction from target of an annulled
2438 branch, the effects are for the target only and so
2439 the args_size and CFA along the current path
2440 shouldn't change. */
2441 add_cfi_insn = NULL;
2442 restore_args_size = cur_trace->end_true_args_size;
2443 cur_cfa = &cur_row->cfa;
2444 save_row_reg_save
2445 = VEC_copy (dw_cfi_ref, gc, cur_row->reg_save);
2447 scan_insn_after (elt);
2449 /* ??? Should we instead save the entire row state? */
2450 gcc_assert (!VEC_length (queued_reg_save, queued_reg_saves));
2452 create_trace_edges (control);
2454 cur_trace->end_true_args_size = restore_args_size;
2455 cur_row->cfa = this_cfa;
2456 cur_row->reg_save = save_row_reg_save;
2457 cur_cfa = &this_cfa;
2459 else
2461 /* If ELT is a annulled branch-taken instruction (i.e.
2462 executed only when branch is not taken), the args_size
2463 and CFA should not change through the jump. */
2464 create_trace_edges (control);
2466 /* Update and continue with the trace. */
2467 add_cfi_insn = insn;
2468 scan_insn_after (elt);
2469 def_cfa_1 (&this_cfa);
2471 continue;
2474 /* The insns in the delay slot should all be considered to happen
2475 "before" a call insn. Consider a call with a stack pointer
2476 adjustment in the delay slot. The backtrace from the callee
2477 should include the sp adjustment. Unfortunately, that leaves
2478 us with an unavoidable unwinding error exactly at the call insn
2479 itself. For jump insns we'd prefer to avoid this error by
2480 placing the notes after the sequence. */
2481 if (JUMP_P (control))
2482 add_cfi_insn = insn;
2484 for (i = 1; i < n; ++i)
2486 elt = XVECEXP (pat, 0, i);
2487 scan_insn_after (elt);
2490 /* Make sure any register saves are visible at the jump target. */
2491 dwarf2out_flush_queued_reg_saves ();
2492 any_cfis_emitted = false;
2494 /* However, if there is some adjustment on the call itself, e.g.
2495 a call_pop, that action should be considered to happen after
2496 the call returns. */
2497 add_cfi_insn = insn;
2498 scan_insn_after (control);
2500 else
2502 /* Flush data before calls and jumps, and of course if necessary. */
2503 if (can_throw_internal (insn))
2505 notice_eh_throw (insn);
2506 dwarf2out_flush_queued_reg_saves ();
2508 else if (!NONJUMP_INSN_P (insn)
2509 || clobbers_queued_reg_save (insn)
2510 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
2511 dwarf2out_flush_queued_reg_saves ();
2512 any_cfis_emitted = false;
2514 add_cfi_insn = insn;
2515 scan_insn_after (insn);
2516 control = insn;
2519 /* Between frame-related-p and args_size we might have otherwise
2520 emitted two cfa adjustments. Do it now. */
2521 def_cfa_1 (&this_cfa);
2523 /* Minimize the number of advances by emitting the entire queue
2524 once anything is emitted. */
2525 if (any_cfis_emitted
2526 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
2527 dwarf2out_flush_queued_reg_saves ();
2529 /* Note that a test for control_flow_insn_p does exactly the
2530 same tests as are done to actually create the edges. So
2531 always call the routine and let it not create edges for
2532 non-control-flow insns. */
2533 create_trace_edges (control);
2536 add_cfi_insn = NULL;
2537 cur_row = NULL;
2538 cur_trace = NULL;
2539 cur_cfa = NULL;
2542 /* Scan the function and create the initial set of CFI notes. */
2544 static void
2545 create_cfi_notes (void)
2547 dw_trace_info *ti;
2549 gcc_checking_assert (queued_reg_saves == NULL);
2550 gcc_checking_assert (trace_work_list == NULL);
2552 /* Always begin at the entry trace. */
2553 ti = VEC_index (dw_trace_info, trace_info, 0);
2554 scan_trace (ti);
2556 while (!VEC_empty (dw_trace_info_ref, trace_work_list))
2558 ti = VEC_pop (dw_trace_info_ref, trace_work_list);
2559 scan_trace (ti);
2562 VEC_free (queued_reg_save, heap, queued_reg_saves);
2563 VEC_free (dw_trace_info_ref, heap, trace_work_list);
2566 /* Return the insn before the first NOTE_INSN_CFI after START. */
2568 static rtx
2569 before_next_cfi_note (rtx start)
2571 rtx prev = start;
2572 while (start)
2574 if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
2575 return prev;
2576 prev = start;
2577 start = NEXT_INSN (start);
2579 gcc_unreachable ();
2582 /* Insert CFI notes between traces to properly change state between them. */
2584 static void
2585 connect_traces (void)
2587 unsigned i, n = VEC_length (dw_trace_info, trace_info);
2588 dw_trace_info *prev_ti, *ti;
2590 /* ??? Ideally, we should have both queued and processed every trace.
2591 However the current representation of constant pools on various targets
2592 is indistinguishable from unreachable code. Assume for the moment that
2593 we can simply skip over such traces. */
2594 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2595 these are not "real" instructions, and should not be considered.
2596 This could be generically useful for tablejump data as well. */
2597 /* Remove all unprocessed traces from the list. */
2598 for (i = n - 1; i > 0; --i)
2600 ti = VEC_index (dw_trace_info, trace_info, i);
2601 if (ti->beg_row == NULL)
2603 VEC_ordered_remove (dw_trace_info, trace_info, i);
2604 n -= 1;
2606 else
2607 gcc_assert (ti->end_row != NULL);
2610 /* Work from the end back to the beginning. This lets us easily insert
2611 remember/restore_state notes in the correct order wrt other notes. */
2612 prev_ti = VEC_index (dw_trace_info, trace_info, n - 1);
2613 for (i = n - 1; i > 0; --i)
2615 dw_cfi_row *old_row;
2617 ti = prev_ti;
2618 prev_ti = VEC_index (dw_trace_info, trace_info, i - 1);
2620 add_cfi_insn = ti->head;
2622 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2623 for the portion of the function in the alternate text
2624 section. The row state at the very beginning of that
2625 new FDE will be exactly the row state from the CIE. */
2626 if (ti->switch_sections)
2627 old_row = cie_cfi_row;
2628 else
2630 old_row = prev_ti->end_row;
2631 /* If there's no change from the previous end state, fine. */
2632 if (cfi_row_equal_p (old_row, ti->beg_row))
2634 /* Otherwise check for the common case of sharing state with
2635 the beginning of an epilogue, but not the end. Insert
2636 remember/restore opcodes in that case. */
2637 else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row))
2639 dw_cfi_ref cfi;
2641 /* Note that if we blindly insert the remember at the
2642 start of the trace, we can wind up increasing the
2643 size of the unwind info due to extra advance opcodes.
2644 Instead, put the remember immediately before the next
2645 state change. We know there must be one, because the
2646 state at the beginning and head of the trace differ. */
2647 add_cfi_insn = before_next_cfi_note (prev_ti->head);
2648 cfi = new_cfi ();
2649 cfi->dw_cfi_opc = DW_CFA_remember_state;
2650 add_cfi (cfi);
2652 add_cfi_insn = ti->head;
2653 cfi = new_cfi ();
2654 cfi->dw_cfi_opc = DW_CFA_restore_state;
2655 add_cfi (cfi);
2657 old_row = prev_ti->beg_row;
2659 /* Otherwise, we'll simply change state from the previous end. */
2662 change_cfi_row (old_row, ti->beg_row);
2664 if (dump_file && add_cfi_insn != ti->head)
2666 rtx note;
2668 fprintf (dump_file, "Fixup between trace %u and %u:\n",
2669 prev_ti->id, ti->id);
2671 note = ti->head;
2674 note = NEXT_INSN (note);
2675 gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI);
2676 output_cfi_directive (dump_file, NOTE_CFI (note));
2678 while (note != add_cfi_insn);
2682 /* Connect args_size between traces that have can_throw_internal insns. */
2683 if (cfun->eh->lp_array != NULL)
2685 HOST_WIDE_INT prev_args_size = 0;
2687 for (i = 0; i < n; ++i)
2689 ti = VEC_index (dw_trace_info, trace_info, i);
2691 if (ti->switch_sections)
2692 prev_args_size = 0;
2693 if (ti->eh_head == NULL)
2694 continue;
2695 gcc_assert (!ti->args_size_undefined);
2697 if (ti->beg_delay_args_size != prev_args_size)
2699 /* ??? Search back to previous CFI note. */
2700 add_cfi_insn = PREV_INSN (ti->eh_head);
2701 add_cfi_args_size (ti->beg_delay_args_size);
2704 prev_args_size = ti->end_delay_args_size;
2709 /* Set up the pseudo-cfg of instruction traces, as described at the
2710 block comment at the top of the file. */
2712 static void
2713 create_pseudo_cfg (void)
2715 bool saw_barrier, switch_sections;
2716 dw_trace_info *ti;
2717 rtx insn;
2718 unsigned i;
2720 /* The first trace begins at the start of the function,
2721 and begins with the CIE row state. */
2722 trace_info = VEC_alloc (dw_trace_info, heap, 16);
2723 ti = VEC_quick_push (dw_trace_info, trace_info, NULL);
2725 memset (ti, 0, sizeof (*ti));
2726 ti->head = get_insns ();
2727 ti->beg_row = cie_cfi_row;
2728 ti->cfa_store = cie_cfi_row->cfa;
2729 ti->cfa_temp.reg = INVALID_REGNUM;
2730 if (cie_return_save)
2731 VEC_safe_push (reg_saved_in_data, heap,
2732 ti->regs_saved_in_regs, cie_return_save);
2734 /* Walk all the insns, collecting start of trace locations. */
2735 saw_barrier = false;
2736 switch_sections = false;
2737 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2739 if (BARRIER_P (insn))
2740 saw_barrier = true;
2741 else if (NOTE_P (insn)
2742 && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
2744 /* We should have just seen a barrier. */
2745 gcc_assert (saw_barrier);
2746 switch_sections = true;
2748 /* Watch out for save_point notes between basic blocks.
2749 In particular, a note after a barrier. Do not record these,
2750 delaying trace creation until the label. */
2751 else if (save_point_p (insn)
2752 && (LABEL_P (insn) || !saw_barrier))
2754 ti = VEC_safe_push (dw_trace_info, heap, trace_info, NULL);
2755 memset (ti, 0, sizeof (*ti));
2756 ti->head = insn;
2757 ti->switch_sections = switch_sections;
2758 ti->id = VEC_length (dw_trace_info, trace_info) - 1;
2760 saw_barrier = false;
2761 switch_sections = false;
2765 /* Create the trace index after we've finished building trace_info,
2766 avoiding stale pointer problems due to reallocation. */
2767 trace_index = htab_create (VEC_length (dw_trace_info, trace_info),
2768 dw_trace_info_hash, dw_trace_info_eq, NULL);
2769 FOR_EACH_VEC_ELT (dw_trace_info, trace_info, i, ti)
2771 void **slot;
2773 if (dump_file)
2774 fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", i,
2775 rtx_name[(int) GET_CODE (ti->head)], INSN_UID (ti->head),
2776 ti->switch_sections ? " (section switch)" : "");
2778 slot = htab_find_slot_with_hash (trace_index, ti,
2779 INSN_UID (ti->head), INSERT);
2780 gcc_assert (*slot == NULL);
2781 *slot = (void *) ti;
2785 /* Record the initial position of the return address. RTL is
2786 INCOMING_RETURN_ADDR_RTX. */
2788 static void
2789 initial_return_save (rtx rtl)
2791 unsigned int reg = INVALID_REGNUM;
2792 HOST_WIDE_INT offset = 0;
2794 switch (GET_CODE (rtl))
2796 case REG:
2797 /* RA is in a register. */
2798 reg = dwf_regno (rtl);
2799 break;
2801 case MEM:
2802 /* RA is on the stack. */
2803 rtl = XEXP (rtl, 0);
2804 switch (GET_CODE (rtl))
2806 case REG:
2807 gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM);
2808 offset = 0;
2809 break;
2811 case PLUS:
2812 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2813 offset = INTVAL (XEXP (rtl, 1));
2814 break;
2816 case MINUS:
2817 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
2818 offset = -INTVAL (XEXP (rtl, 1));
2819 break;
2821 default:
2822 gcc_unreachable ();
2825 break;
2827 case PLUS:
2828 /* The return address is at some offset from any value we can
2829 actually load. For instance, on the SPARC it is in %i7+8. Just
2830 ignore the offset for now; it doesn't matter for unwinding frames. */
2831 gcc_assert (CONST_INT_P (XEXP (rtl, 1)));
2832 initial_return_save (XEXP (rtl, 0));
2833 return;
2835 default:
2836 gcc_unreachable ();
2839 if (reg != DWARF_FRAME_RETURN_COLUMN)
2841 if (reg != INVALID_REGNUM)
2842 record_reg_saved_in_reg (rtl, pc_rtx);
2843 reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset);
2847 static void
2848 create_cie_data (void)
2850 dw_cfa_location loc;
2851 dw_trace_info cie_trace;
2853 dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
2854 dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM);
2856 memset (&cie_trace, 0, sizeof(cie_trace));
2857 cur_trace = &cie_trace;
2859 add_cfi_vec = &cie_cfi_vec;
2860 cie_cfi_row = cur_row = new_cfi_row ();
2862 /* On entry, the Canonical Frame Address is at SP. */
2863 memset(&loc, 0, sizeof (loc));
2864 loc.reg = dw_stack_pointer_regnum;
2865 loc.offset = INCOMING_FRAME_SP_OFFSET;
2866 def_cfa_1 (&loc);
2868 if (targetm.debug_unwind_info () == UI_DWARF2
2869 || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
2871 initial_return_save (INCOMING_RETURN_ADDR_RTX);
2873 /* For a few targets, we have the return address incoming into a
2874 register, but choose a different return column. This will result
2875 in a DW_CFA_register for the return, and an entry in
2876 regs_saved_in_regs to match. If the target later stores that
2877 return address register to the stack, we want to be able to emit
2878 the DW_CFA_offset against the return column, not the intermediate
2879 save register. Save the contents of regs_saved_in_regs so that
2880 we can re-initialize it at the start of each function. */
2881 switch (VEC_length (reg_saved_in_data, cie_trace.regs_saved_in_regs))
2883 case 0:
2884 break;
2885 case 1:
2886 cie_return_save = ggc_alloc_reg_saved_in_data ();
2887 *cie_return_save = *VEC_index (reg_saved_in_data,
2888 cie_trace.regs_saved_in_regs, 0);
2889 VEC_free (reg_saved_in_data, heap, cie_trace.regs_saved_in_regs);
2890 break;
2891 default:
2892 gcc_unreachable ();
2896 add_cfi_vec = NULL;
2897 cur_row = NULL;
2898 cur_trace = NULL;
2901 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2902 state at each location within the function. These notes will be
2903 emitted during pass_final. */
2905 static unsigned int
2906 execute_dwarf2_frame (void)
2908 /* The first time we're called, compute the incoming frame state. */
2909 if (cie_cfi_vec == NULL)
2910 create_cie_data ();
2912 dwarf2out_alloc_current_fde ();
2914 create_pseudo_cfg ();
2916 /* Do the work. */
2917 create_cfi_notes ();
2918 connect_traces ();
2919 add_cfis_to_fde ();
2921 /* Free all the data we allocated. */
2923 size_t i;
2924 dw_trace_info *ti;
2926 FOR_EACH_VEC_ELT (dw_trace_info, trace_info, i, ti)
2927 VEC_free (reg_saved_in_data, heap, ti->regs_saved_in_regs);
2929 VEC_free (dw_trace_info, heap, trace_info);
2931 htab_delete (trace_index);
2932 trace_index = NULL;
2934 return 0;
2937 /* Convert a DWARF call frame info. operation to its string name */
2939 static const char *
2940 dwarf_cfi_name (unsigned int cfi_opc)
2942 const char *name = get_DW_CFA_name (cfi_opc);
2944 if (name != NULL)
2945 return name;
2947 return "DW_CFA_<unknown>";
2950 /* This routine will generate the correct assembly data for a location
2951 description based on a cfi entry with a complex address. */
2953 static void
2954 output_cfa_loc (dw_cfi_ref cfi, int for_eh)
2956 dw_loc_descr_ref loc;
2957 unsigned long size;
2959 if (cfi->dw_cfi_opc == DW_CFA_expression)
2961 unsigned r =
2962 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
2963 dw2_asm_output_data (1, r, NULL);
2964 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
2966 else
2967 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
2969 /* Output the size of the block. */
2970 size = size_of_locs (loc);
2971 dw2_asm_output_data_uleb128 (size, NULL);
2973 /* Now output the operations themselves. */
2974 output_loc_sequence (loc, for_eh);
2977 /* Similar, but used for .cfi_escape. */
2979 static void
2980 output_cfa_loc_raw (dw_cfi_ref cfi)
2982 dw_loc_descr_ref loc;
2983 unsigned long size;
2985 if (cfi->dw_cfi_opc == DW_CFA_expression)
2987 unsigned r =
2988 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
2989 fprintf (asm_out_file, "%#x,", r);
2990 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
2992 else
2993 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
2995 /* Output the size of the block. */
2996 size = size_of_locs (loc);
2997 dw2_asm_output_data_uleb128_raw (size);
2998 fputc (',', asm_out_file);
3000 /* Now output the operations themselves. */
3001 output_loc_sequence_raw (loc);
3004 /* Output a Call Frame Information opcode and its operand(s). */
3006 void
3007 output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh)
3009 unsigned long r;
3010 HOST_WIDE_INT off;
3012 if (cfi->dw_cfi_opc == DW_CFA_advance_loc)
3013 dw2_asm_output_data (1, (cfi->dw_cfi_opc
3014 | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)),
3015 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX,
3016 ((unsigned HOST_WIDE_INT)
3017 cfi->dw_cfi_oprnd1.dw_cfi_offset));
3018 else if (cfi->dw_cfi_opc == DW_CFA_offset)
3020 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3021 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3022 "DW_CFA_offset, column %#lx", r);
3023 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3024 dw2_asm_output_data_uleb128 (off, NULL);
3026 else if (cfi->dw_cfi_opc == DW_CFA_restore)
3028 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3029 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
3030 "DW_CFA_restore, column %#lx", r);
3032 else
3034 dw2_asm_output_data (1, cfi->dw_cfi_opc,
3035 "%s", dwarf_cfi_name (cfi->dw_cfi_opc));
3037 switch (cfi->dw_cfi_opc)
3039 case DW_CFA_set_loc:
3040 if (for_eh)
3041 dw2_asm_output_encoded_addr_rtx (
3042 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3043 gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr),
3044 false, NULL);
3045 else
3046 dw2_asm_output_addr (DWARF2_ADDR_SIZE,
3047 cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL);
3048 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3049 break;
3051 case DW_CFA_advance_loc1:
3052 dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3053 fde->dw_fde_current_label, NULL);
3054 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3055 break;
3057 case DW_CFA_advance_loc2:
3058 dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3059 fde->dw_fde_current_label, NULL);
3060 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3061 break;
3063 case DW_CFA_advance_loc4:
3064 dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3065 fde->dw_fde_current_label, NULL);
3066 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3067 break;
3069 case DW_CFA_MIPS_advance_loc8:
3070 dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr,
3071 fde->dw_fde_current_label, NULL);
3072 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
3073 break;
3075 case DW_CFA_offset_extended:
3076 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3077 dw2_asm_output_data_uleb128 (r, NULL);
3078 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3079 dw2_asm_output_data_uleb128 (off, NULL);
3080 break;
3082 case DW_CFA_def_cfa:
3083 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3084 dw2_asm_output_data_uleb128 (r, NULL);
3085 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL);
3086 break;
3088 case DW_CFA_offset_extended_sf:
3089 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3090 dw2_asm_output_data_uleb128 (r, NULL);
3091 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3092 dw2_asm_output_data_sleb128 (off, NULL);
3093 break;
3095 case DW_CFA_def_cfa_sf:
3096 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3097 dw2_asm_output_data_uleb128 (r, NULL);
3098 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
3099 dw2_asm_output_data_sleb128 (off, NULL);
3100 break;
3102 case DW_CFA_restore_extended:
3103 case DW_CFA_undefined:
3104 case DW_CFA_same_value:
3105 case DW_CFA_def_cfa_register:
3106 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3107 dw2_asm_output_data_uleb128 (r, NULL);
3108 break;
3110 case DW_CFA_register:
3111 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
3112 dw2_asm_output_data_uleb128 (r, NULL);
3113 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh);
3114 dw2_asm_output_data_uleb128 (r, NULL);
3115 break;
3117 case DW_CFA_def_cfa_offset:
3118 case DW_CFA_GNU_args_size:
3119 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL);
3120 break;
3122 case DW_CFA_def_cfa_offset_sf:
3123 off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3124 dw2_asm_output_data_sleb128 (off, NULL);
3125 break;
3127 case DW_CFA_GNU_window_save:
3128 break;
3130 case DW_CFA_def_cfa_expression:
3131 case DW_CFA_expression:
3132 output_cfa_loc (cfi, for_eh);
3133 break;
3135 case DW_CFA_GNU_negative_offset_extended:
3136 /* Obsoleted by DW_CFA_offset_extended_sf. */
3137 gcc_unreachable ();
3139 default:
3140 break;
3145 /* Similar, but do it via assembler directives instead. */
3147 void
3148 output_cfi_directive (FILE *f, dw_cfi_ref cfi)
3150 unsigned long r, r2;
3152 switch (cfi->dw_cfi_opc)
3154 case DW_CFA_advance_loc:
3155 case DW_CFA_advance_loc1:
3156 case DW_CFA_advance_loc2:
3157 case DW_CFA_advance_loc4:
3158 case DW_CFA_MIPS_advance_loc8:
3159 case DW_CFA_set_loc:
3160 /* Should only be created in a code path not followed when emitting
3161 via directives. The assembler is going to take care of this for
3162 us. But this routines is also used for debugging dumps, so
3163 print something. */
3164 gcc_assert (f != asm_out_file);
3165 fprintf (f, "\t.cfi_advance_loc\n");
3166 break;
3168 case DW_CFA_offset:
3169 case DW_CFA_offset_extended:
3170 case DW_CFA_offset_extended_sf:
3171 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3172 fprintf (f, "\t.cfi_offset %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3173 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3174 break;
3176 case DW_CFA_restore:
3177 case DW_CFA_restore_extended:
3178 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3179 fprintf (f, "\t.cfi_restore %lu\n", r);
3180 break;
3182 case DW_CFA_undefined:
3183 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3184 fprintf (f, "\t.cfi_undefined %lu\n", r);
3185 break;
3187 case DW_CFA_same_value:
3188 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3189 fprintf (f, "\t.cfi_same_value %lu\n", r);
3190 break;
3192 case DW_CFA_def_cfa:
3193 case DW_CFA_def_cfa_sf:
3194 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3195 fprintf (f, "\t.cfi_def_cfa %lu, "HOST_WIDE_INT_PRINT_DEC"\n",
3196 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
3197 break;
3199 case DW_CFA_def_cfa_register:
3200 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3201 fprintf (f, "\t.cfi_def_cfa_register %lu\n", r);
3202 break;
3204 case DW_CFA_register:
3205 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
3206 r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1);
3207 fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2);
3208 break;
3210 case DW_CFA_def_cfa_offset:
3211 case DW_CFA_def_cfa_offset_sf:
3212 fprintf (f, "\t.cfi_def_cfa_offset "
3213 HOST_WIDE_INT_PRINT_DEC"\n",
3214 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3215 break;
3217 case DW_CFA_remember_state:
3218 fprintf (f, "\t.cfi_remember_state\n");
3219 break;
3220 case DW_CFA_restore_state:
3221 fprintf (f, "\t.cfi_restore_state\n");
3222 break;
3224 case DW_CFA_GNU_args_size:
3225 if (f == asm_out_file)
3227 fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size);
3228 dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset);
3229 if (flag_debug_asm)
3230 fprintf (f, "\t%s args_size "HOST_WIDE_INT_PRINT_DEC,
3231 ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset);
3232 fputc ('\n', f);
3234 else
3236 fprintf (f, "\t.cfi_GNU_args_size "HOST_WIDE_INT_PRINT_DEC "\n",
3237 cfi->dw_cfi_oprnd1.dw_cfi_offset);
3239 break;
3241 case DW_CFA_GNU_window_save:
3242 fprintf (f, "\t.cfi_window_save\n");
3243 break;
3245 case DW_CFA_def_cfa_expression:
3246 if (f != asm_out_file)
3248 fprintf (f, "\t.cfi_def_cfa_expression ...\n");
3249 break;
3251 /* FALLTHRU */
3252 case DW_CFA_expression:
3253 if (f != asm_out_file)
3255 fprintf (f, "\t.cfi_cfa_expression ...\n");
3256 break;
3258 fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc);
3259 output_cfa_loc_raw (cfi);
3260 fputc ('\n', f);
3261 break;
3263 default:
3264 gcc_unreachable ();
3268 void
3269 dwarf2out_emit_cfi (dw_cfi_ref cfi)
3271 if (dwarf2out_do_cfi_asm ())
3272 output_cfi_directive (asm_out_file, cfi);
3275 static void
3276 dump_cfi_row (FILE *f, dw_cfi_row *row)
3278 dw_cfi_ref cfi;
3279 unsigned i;
3281 cfi = row->cfa_cfi;
3282 if (!cfi)
3284 dw_cfa_location dummy;
3285 memset(&dummy, 0, sizeof(dummy));
3286 dummy.reg = INVALID_REGNUM;
3287 cfi = def_cfa_0 (&dummy, &row->cfa);
3289 output_cfi_directive (f, cfi);
3291 FOR_EACH_VEC_ELT (dw_cfi_ref, row->reg_save, i, cfi)
3292 if (cfi)
3293 output_cfi_directive (f, cfi);
3296 void debug_cfi_row (dw_cfi_row *row);
3298 void
3299 debug_cfi_row (dw_cfi_row *row)
3301 dump_cfi_row (stderr, row);
3305 /* Save the result of dwarf2out_do_frame across PCH.
3306 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3307 static GTY(()) signed char saved_do_cfi_asm = 0;
3309 /* Decide whether we want to emit frame unwind information for the current
3310 translation unit. */
3312 bool
3313 dwarf2out_do_frame (void)
3315 /* We want to emit correct CFA location expressions or lists, so we
3316 have to return true if we're going to output debug info, even if
3317 we're not going to output frame or unwind info. */
3318 if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
3319 return true;
3321 if (saved_do_cfi_asm > 0)
3322 return true;
3324 if (targetm.debug_unwind_info () == UI_DWARF2)
3325 return true;
3327 if ((flag_unwind_tables || flag_exceptions)
3328 && targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
3329 return true;
3331 return false;
3334 /* Decide whether to emit frame unwind via assembler directives. */
3336 bool
3337 dwarf2out_do_cfi_asm (void)
3339 int enc;
3341 if (saved_do_cfi_asm != 0)
3342 return saved_do_cfi_asm > 0;
3344 /* Assume failure for a moment. */
3345 saved_do_cfi_asm = -1;
3347 if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ())
3348 return false;
3349 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
3350 return false;
3352 /* Make sure the personality encoding is one the assembler can support.
3353 In particular, aligned addresses can't be handled. */
3354 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3355 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3356 return false;
3357 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3358 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
3359 return false;
3361 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3362 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3363 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3364 && !flag_unwind_tables && !flag_exceptions
3365 && targetm_common.except_unwind_info (&global_options) != UI_DWARF2)
3366 return false;
3368 /* Success! */
3369 saved_do_cfi_asm = 1;
3370 return true;
3373 static bool
3374 gate_dwarf2_frame (void)
3376 #ifndef HAVE_prologue
3377 /* Targets which still implement the prologue in assembler text
3378 cannot use the generic dwarf2 unwinding. */
3379 return false;
3380 #endif
3382 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3383 from the optimized shrink-wrapping annotations that we will compute.
3384 For now, only produce the CFI notes for dwarf2. */
3385 return dwarf2out_do_frame ();
3388 struct rtl_opt_pass pass_dwarf2_frame =
3391 RTL_PASS,
3392 "dwarf2", /* name */
3393 gate_dwarf2_frame, /* gate */
3394 execute_dwarf2_frame, /* execute */
3395 NULL, /* sub */
3396 NULL, /* next */
3397 0, /* static_pass_number */
3398 TV_FINAL, /* tv_id */
3399 0, /* properties_required */
3400 0, /* properties_provided */
3401 0, /* properties_destroyed */
3402 0, /* todo_flags_start */
3403 0 /* todo_flags_finish */
3407 #include "gt-dwarf2cfi.h"