1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
246 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
247 enum machine_mode
, enum machine_mode
,
248 int, int, int, enum reload_type
));
249 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
264 int, enum reload_type
, int, rtx
));
265 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
266 static rtx subst_indexed_address
PARAMS ((rtx
));
267 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
268 int, enum reload_type
,int, rtx
));
269 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
270 enum machine_mode
, int,
271 enum reload_type
, int));
272 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
274 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 static int loc_mentioned_in_p
PARAMS ((rtx
*, rtx
));
276 extern void debug_reload_to_stream
PARAMS ((FILE *));
277 extern void debug_reload
PARAMS ((void));
279 #ifdef HAVE_SECONDARY_RELOADS
281 /* Determine if any secondary reloads are needed for loading (if IN_P is
282 non-zero) or storing (if IN_P is zero) X to or from a reload register of
283 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
284 are needed, push them.
286 Return the reload number of the secondary reload we made, or -1 if
287 we didn't need one. *PICODE is set to the insn_code to use if we do
288 need a secondary reload. */
291 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
297 enum reg_class reload_class
;
298 enum machine_mode reload_mode
;
299 enum reload_type type
;
300 enum insn_code
*picode
;
302 enum reg_class
class = NO_REGS
;
303 enum machine_mode mode
= reload_mode
;
304 enum insn_code icode
= CODE_FOR_nothing
;
305 enum reg_class t_class
= NO_REGS
;
306 enum machine_mode t_mode
= VOIDmode
;
307 enum insn_code t_icode
= CODE_FOR_nothing
;
308 enum reload_type secondary_type
;
309 int s_reload
, t_reload
= -1;
311 if (type
== RELOAD_FOR_INPUT_ADDRESS
312 || type
== RELOAD_FOR_OUTPUT_ADDRESS
313 || type
== RELOAD_FOR_INPADDR_ADDRESS
314 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
315 secondary_type
= type
;
317 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
319 *picode
= CODE_FOR_nothing
;
321 /* If X is a paradoxical SUBREG, use the inner value to determine both the
322 mode and object being reloaded. */
323 if (GET_CODE (x
) == SUBREG
324 && (GET_MODE_SIZE (GET_MODE (x
))
325 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
328 reload_mode
= GET_MODE (x
);
331 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
332 is still a pseudo-register by now, it *must* have an equivalent MEM
333 but we don't want to assume that), use that equivalent when seeing if
334 a secondary reload is needed since whether or not a reload is needed
335 might be sensitive to the form of the MEM. */
337 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
338 && reg_equiv_mem
[REGNO (x
)] != 0)
339 x
= reg_equiv_mem
[REGNO (x
)];
341 #ifdef SECONDARY_INPUT_RELOAD_CLASS
343 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
346 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
348 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
351 /* If we don't need any secondary registers, done. */
352 if (class == NO_REGS
)
355 /* Get a possible insn to use. If the predicate doesn't accept X, don't
358 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
359 : reload_out_optab
[(int) reload_mode
]);
361 if (icode
!= CODE_FOR_nothing
362 && insn_data
[(int) icode
].operand
[in_p
].predicate
363 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
364 icode
= CODE_FOR_nothing
;
366 /* If we will be using an insn, see if it can directly handle the reload
367 register we will be using. If it can, the secondary reload is for a
368 scratch register. If it can't, we will use the secondary reload for
369 an intermediate register and require a tertiary reload for the scratch
372 if (icode
!= CODE_FOR_nothing
)
374 /* If IN_P is non-zero, the reload register will be the output in
375 operand 0. If IN_P is zero, the reload register will be the input
376 in operand 1. Outputs should have an initial "=", which we must
380 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
381 enum reg_class insn_class
382 = (insn_letter
== 'r' ? GENERAL_REGS
383 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
385 if (insn_class
== NO_REGS
387 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
388 /* The scratch register's constraint must start with "=&". */
389 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
390 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
393 if (reg_class_subset_p (reload_class
, insn_class
))
394 mode
= insn_data
[(int) icode
].operand
[2].mode
;
397 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
399 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
400 t_class
= (t_letter
== 'r' ? GENERAL_REGS
401 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
403 icode
= CODE_FOR_nothing
;
407 /* This case isn't valid, so fail. Reload is allowed to use the same
408 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
409 in the case of a secondary register, we actually need two different
410 registers for correct code. We fail here to prevent the possibility of
411 silently generating incorrect code later.
413 The convention is that secondary input reloads are valid only if the
414 secondary_class is different from class. If you have such a case, you
415 can not use secondary reloads, you must work around the problem some
418 Allow this when MODE is not reload_mode and assume that the generated
419 code handles this case (it does on the Alpha, which is the only place
420 this currently happens). */
422 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
425 /* If we need a tertiary reload, see if we have one we can reuse or else
428 if (t_class
!= NO_REGS
)
430 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
431 if (rld
[t_reload
].secondary_p
432 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
433 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
434 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
435 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
436 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
437 == CODE_FOR_nothing
))
438 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
439 == CODE_FOR_nothing
)))
440 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
441 && MERGABLE_RELOADS (secondary_type
,
442 rld
[t_reload
].when_needed
,
443 opnum
, rld
[t_reload
].opnum
))
446 rld
[t_reload
].inmode
= t_mode
;
448 rld
[t_reload
].outmode
= t_mode
;
450 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
451 rld
[t_reload
].class = t_class
;
453 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
454 rld
[t_reload
].optional
&= optional
;
455 rld
[t_reload
].secondary_p
= 1;
456 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
457 opnum
, rld
[t_reload
].opnum
))
458 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
461 if (t_reload
== n_reloads
)
463 /* We need to make a new tertiary reload for this register class. */
464 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
465 rld
[t_reload
].class = t_class
;
466 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
467 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
468 rld
[t_reload
].reg_rtx
= 0;
469 rld
[t_reload
].optional
= optional
;
470 rld
[t_reload
].inc
= 0;
471 /* Maybe we could combine these, but it seems too tricky. */
472 rld
[t_reload
].nocombine
= 1;
473 rld
[t_reload
].in_reg
= 0;
474 rld
[t_reload
].out_reg
= 0;
475 rld
[t_reload
].opnum
= opnum
;
476 rld
[t_reload
].when_needed
= secondary_type
;
477 rld
[t_reload
].secondary_in_reload
= -1;
478 rld
[t_reload
].secondary_out_reload
= -1;
479 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
480 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
481 rld
[t_reload
].secondary_p
= 1;
487 /* See if we can reuse an existing secondary reload. */
488 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
489 if (rld
[s_reload
].secondary_p
490 && (reg_class_subset_p (class, rld
[s_reload
].class)
491 || reg_class_subset_p (rld
[s_reload
].class, class))
492 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
493 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
494 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
495 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
496 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
497 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
498 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
499 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
500 opnum
, rld
[s_reload
].opnum
))
503 rld
[s_reload
].inmode
= mode
;
505 rld
[s_reload
].outmode
= mode
;
507 if (reg_class_subset_p (class, rld
[s_reload
].class))
508 rld
[s_reload
].class = class;
510 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
511 rld
[s_reload
].optional
&= optional
;
512 rld
[s_reload
].secondary_p
= 1;
513 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
514 opnum
, rld
[s_reload
].opnum
))
515 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
518 if (s_reload
== n_reloads
)
520 #ifdef SECONDARY_MEMORY_NEEDED
521 /* If we need a memory location to copy between the two reload regs,
522 set it up now. Note that we do the input case before making
523 the reload and the output case after. This is due to the
524 way reloads are output. */
526 if (in_p
&& icode
== CODE_FOR_nothing
527 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
528 get_secondary_mem (x
, reload_mode
, opnum
, type
);
531 /* We need to make a new secondary reload for this register class. */
532 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
533 rld
[s_reload
].class = class;
535 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
536 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
537 rld
[s_reload
].reg_rtx
= 0;
538 rld
[s_reload
].optional
= optional
;
539 rld
[s_reload
].inc
= 0;
540 /* Maybe we could combine these, but it seems too tricky. */
541 rld
[s_reload
].nocombine
= 1;
542 rld
[s_reload
].in_reg
= 0;
543 rld
[s_reload
].out_reg
= 0;
544 rld
[s_reload
].opnum
= opnum
;
545 rld
[s_reload
].when_needed
= secondary_type
;
546 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
547 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
548 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
549 rld
[s_reload
].secondary_out_icode
550 = ! in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_p
= 1;
555 #ifdef SECONDARY_MEMORY_NEEDED
556 if (! in_p
&& icode
== CODE_FOR_nothing
557 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
558 get_secondary_mem (x
, mode
, opnum
, type
);
565 #endif /* HAVE_SECONDARY_RELOADS */
567 #ifdef SECONDARY_MEMORY_NEEDED
569 /* Return a memory location that will be used to copy X in mode MODE.
570 If we haven't already made a location for this mode in this insn,
571 call find_reloads_address on the location being returned. */
574 get_secondary_mem (x
, mode
, opnum
, type
)
575 rtx x ATTRIBUTE_UNUSED
;
576 enum machine_mode mode
;
578 enum reload_type type
;
583 /* By default, if MODE is narrower than a word, widen it to a word.
584 This is required because most machines that require these memory
585 locations do not support short load and stores from all registers
586 (e.g., FP registers). */
588 #ifdef SECONDARY_MEMORY_NEEDED_MODE
589 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
591 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
592 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
595 /* If we already have made a MEM for this operand in MODE, return it. */
596 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
597 return secondary_memlocs_elim
[(int) mode
][opnum
];
599 /* If this is the first time we've tried to get a MEM for this mode,
600 allocate a new one. `something_changed' in reload will get set
601 by noticing that the frame size has changed. */
603 if (secondary_memlocs
[(int) mode
] == 0)
605 #ifdef SECONDARY_MEMORY_NEEDED_RTX
606 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
608 secondary_memlocs
[(int) mode
]
609 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
613 /* Get a version of the address doing any eliminations needed. If that
614 didn't give us a new MEM, make a new one if it isn't valid. */
616 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
617 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
619 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
620 loc
= copy_rtx (loc
);
622 /* The only time the call below will do anything is if the stack
623 offset is too large. In that case IND_LEVELS doesn't matter, so we
624 can just pass a zero. Adjust the type to be the address of the
625 corresponding object. If the address was valid, save the eliminated
626 address. If it wasn't valid, we need to make a reload each time, so
631 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
632 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
635 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
639 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
643 /* Clear any secondary memory locations we've made. */
646 clear_secondary_mem ()
648 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
650 #endif /* SECONDARY_MEMORY_NEEDED */
652 /* Find the largest class for which every register number plus N is valid in
653 M1 (if in range). Abort if no such class exists. */
655 static enum reg_class
656 find_valid_class (m1
, n
)
657 enum machine_mode m1 ATTRIBUTE_UNUSED
;
662 enum reg_class best_class
= NO_REGS
;
663 unsigned int best_size
= 0;
665 for (class = 1; class < N_REG_CLASSES
; class++)
668 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
669 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
670 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
671 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
674 if (! bad
&& reg_class_size
[class] > best_size
)
675 best_class
= class, best_size
= reg_class_size
[class];
684 /* Return the number of a previously made reload that can be combined with
685 a new one, or n_reloads if none of the existing reloads can be used.
686 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
687 push_reload, they determine the kind of the new reload that we try to
688 combine. P_IN points to the corresponding value of IN, which can be
689 modified by this function.
690 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
692 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
694 enum reg_class
class;
695 enum reload_type type
;
696 int opnum
, dont_share
;
700 /* We can't merge two reloads if the output of either one is
703 if (earlyclobber_operand_p (out
))
706 /* We can use an existing reload if the class is right
707 and at least one of IN and OUT is a match
708 and the other is at worst neutral.
709 (A zero compared against anything is neutral.)
711 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
712 for the same thing since that can cause us to need more reload registers
713 than we otherwise would. */
715 for (i
= 0; i
< n_reloads
; i
++)
716 if ((reg_class_subset_p (class, rld
[i
].class)
717 || reg_class_subset_p (rld
[i
].class, class))
718 /* If the existing reload has a register, it must fit our class. */
719 && (rld
[i
].reg_rtx
== 0
720 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
721 true_regnum (rld
[i
].reg_rtx
)))
722 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
723 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
724 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
725 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
726 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
727 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
728 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
731 /* Reloading a plain reg for input can match a reload to postincrement
732 that reg, since the postincrement's value is the right value.
733 Likewise, it can match a preincrement reload, since we regard
734 the preincrementation as happening before any ref in this insn
736 for (i
= 0; i
< n_reloads
; i
++)
737 if ((reg_class_subset_p (class, rld
[i
].class)
738 || reg_class_subset_p (rld
[i
].class, class))
739 /* If the existing reload has a register, it must fit our
741 && (rld
[i
].reg_rtx
== 0
742 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
743 true_regnum (rld
[i
].reg_rtx
)))
744 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
745 && ((GET_CODE (in
) == REG
746 && (GET_CODE (rld
[i
].in
) == POST_INC
747 || GET_CODE (rld
[i
].in
) == POST_DEC
748 || GET_CODE (rld
[i
].in
) == PRE_INC
749 || GET_CODE (rld
[i
].in
) == PRE_DEC
)
750 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
752 (GET_CODE (rld
[i
].in
) == REG
753 && (GET_CODE (in
) == POST_INC
754 || GET_CODE (in
) == POST_DEC
755 || GET_CODE (in
) == PRE_INC
756 || GET_CODE (in
) == PRE_DEC
)
757 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
758 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
759 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
760 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
761 opnum
, rld
[i
].opnum
))
763 /* Make sure reload_in ultimately has the increment,
764 not the plain register. */
765 if (GET_CODE (in
) == REG
)
772 /* Record one reload that needs to be performed.
773 IN is an rtx saying where the data are to be found before this instruction.
774 OUT says where they must be stored after the instruction.
775 (IN is zero for data not read, and OUT is zero for data not written.)
776 INLOC and OUTLOC point to the places in the instructions where
777 IN and OUT were found.
778 If IN and OUT are both non-zero, it means the same register must be used
779 to reload both IN and OUT.
781 CLASS is a register class required for the reloaded data.
782 INMODE is the machine mode that the instruction requires
783 for the reg that replaces IN and OUTMODE is likewise for OUT.
785 If IN is zero, then OUT's location and mode should be passed as
788 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
790 OPTIONAL nonzero means this reload does not need to be performed:
791 it can be discarded if that is more convenient.
793 OPNUM and TYPE say what the purpose of this reload is.
795 The return value is the reload-number for this reload.
797 If both IN and OUT are nonzero, in some rare cases we might
798 want to make two separate reloads. (Actually we never do this now.)
799 Therefore, the reload-number for OUT is stored in
800 output_reloadnum when we return; the return value applies to IN.
801 Usually (presently always), when IN and OUT are nonzero,
802 the two reload-numbers are equal, but the caller should be careful to
806 push_reload (in
, out
, inloc
, outloc
, class,
807 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
810 enum reg_class
class;
811 enum machine_mode inmode
, outmode
;
815 enum reload_type type
;
819 int dont_remove_subreg
= 0;
820 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
821 int secondary_in_reload
= -1, secondary_out_reload
= -1;
822 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
823 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
825 /* INMODE and/or OUTMODE could be VOIDmode if no mode
826 has been specified for the operand. In that case,
827 use the operand's mode as the mode to reload. */
828 if (inmode
== VOIDmode
&& in
!= 0)
829 inmode
= GET_MODE (in
);
830 if (outmode
== VOIDmode
&& out
!= 0)
831 outmode
= GET_MODE (out
);
833 /* If IN is a pseudo register everywhere-equivalent to a constant, and
834 it is not in a hard register, reload straight from the constant,
835 since we want to get rid of such pseudo registers.
836 Often this is done earlier, but not always in find_reloads_address. */
837 if (in
!= 0 && GET_CODE (in
) == REG
)
839 register int regno
= REGNO (in
);
841 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
842 && reg_equiv_constant
[regno
] != 0)
843 in
= reg_equiv_constant
[regno
];
846 /* Likewise for OUT. Of course, OUT will never be equivalent to
847 an actual constant, but it might be equivalent to a memory location
848 (in the case of a parameter). */
849 if (out
!= 0 && GET_CODE (out
) == REG
)
851 register int regno
= REGNO (out
);
853 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
854 && reg_equiv_constant
[regno
] != 0)
855 out
= reg_equiv_constant
[regno
];
858 /* If we have a read-write operand with an address side-effect,
859 change either IN or OUT so the side-effect happens only once. */
860 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
862 if (GET_CODE (XEXP (in
, 0)) == POST_INC
863 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
864 in
= gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
865 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
866 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
867 out
= gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
870 /* If we are reloading a (SUBREG constant ...), really reload just the
871 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
872 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
873 a pseudo and hence will become a MEM) with M1 wider than M2 and the
874 register is a pseudo, also reload the inside expression.
875 For machines that extend byte loads, do this for any SUBREG of a pseudo
876 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
877 M2 is an integral mode that gets extended when loaded.
878 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
879 either M1 is not valid for R or M2 is wider than a word but we only
880 need one word to store an M2-sized quantity in R.
881 (However, if OUT is nonzero, we need to reload the reg *and*
882 the subreg, so do nothing here, and let following statement handle it.)
884 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
885 we can't handle it here because CONST_INT does not indicate a mode.
887 Similarly, we must reload the inside expression if we have a
888 STRICT_LOW_PART (presumably, in == out in the cas).
890 Also reload the inner expression if it does not require a secondary
891 reload but the SUBREG does.
893 Finally, reload the inner expression if it is a register that is in
894 the class whose registers cannot be referenced in a different size
895 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
896 cannot reload just the inside since we might end up with the wrong
897 register class. But if it is inside a STRICT_LOW_PART, we have
898 no choice, so we hope we do get the right register class there. */
900 if (in
!= 0 && GET_CODE (in
) == SUBREG
901 && (SUBREG_WORD (in
) == 0 || strict_low
)
902 #ifdef CLASS_CANNOT_CHANGE_SIZE
903 && class != CLASS_CANNOT_CHANGE_SIZE
905 && (CONSTANT_P (SUBREG_REG (in
))
906 || GET_CODE (SUBREG_REG (in
)) == PLUS
908 || (((GET_CODE (SUBREG_REG (in
)) == REG
909 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
910 || GET_CODE (SUBREG_REG (in
)) == MEM
)
911 && ((GET_MODE_SIZE (inmode
)
912 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
913 #ifdef LOAD_EXTEND_OP
914 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
915 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
917 && (GET_MODE_SIZE (inmode
)
918 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
919 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
920 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
922 #ifdef WORD_REGISTER_OPERATIONS
923 || ((GET_MODE_SIZE (inmode
)
924 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
925 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
926 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
930 || (GET_CODE (SUBREG_REG (in
)) == REG
931 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
932 /* The case where out is nonzero
933 is handled differently in the following statement. */
934 && (out
== 0 || SUBREG_WORD (in
) == 0)
935 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
936 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
938 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
940 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
941 GET_MODE (SUBREG_REG (in
)))))
942 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
945 #ifdef SECONDARY_INPUT_RELOAD_CLASS
946 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
947 && (SECONDARY_INPUT_RELOAD_CLASS (class,
948 GET_MODE (SUBREG_REG (in
)),
952 #ifdef CLASS_CANNOT_CHANGE_SIZE
953 || (GET_CODE (SUBREG_REG (in
)) == REG
954 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
955 && (TEST_HARD_REG_BIT
956 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
957 REGNO (SUBREG_REG (in
))))
958 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
959 != GET_MODE_SIZE (inmode
)))
963 in_subreg_loc
= inloc
;
964 inloc
= &SUBREG_REG (in
);
966 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
967 if (GET_CODE (in
) == MEM
)
968 /* This is supposed to happen only for paradoxical subregs made by
969 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
970 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
973 inmode
= GET_MODE (in
);
976 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
977 either M1 is not valid for R or M2 is wider than a word but we only
978 need one word to store an M2-sized quantity in R.
980 However, we must reload the inner reg *as well as* the subreg in
983 /* Similar issue for (SUBREG constant ...) if it was not handled by the
984 code above. This can happen if SUBREG_WORD != 0. */
986 if (in
!= 0 && GET_CODE (in
) == SUBREG
987 && (CONSTANT_P (SUBREG_REG (in
))
988 || (GET_CODE (SUBREG_REG (in
)) == REG
989 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
990 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
993 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
994 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
996 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
998 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
999 GET_MODE (SUBREG_REG (in
)))))))))
1001 /* This relies on the fact that emit_reload_insns outputs the
1002 instructions for input reloads of type RELOAD_OTHER in the same
1003 order as the reloads. Thus if the outer reload is also of type
1004 RELOAD_OTHER, we are guaranteed that this inner reload will be
1005 output before the outer reload. */
1006 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1007 find_valid_class (inmode
, SUBREG_WORD (in
)),
1008 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1009 dont_remove_subreg
= 1;
1012 /* Similarly for paradoxical and problematical SUBREGs on the output.
1013 Note that there is no reason we need worry about the previous value
1014 of SUBREG_REG (out); even if wider than out,
1015 storing in a subreg is entitled to clobber it all
1016 (except in the case of STRICT_LOW_PART,
1017 and in that case the constraint should label it input-output.) */
1018 if (out
!= 0 && GET_CODE (out
) == SUBREG
1019 && (SUBREG_WORD (out
) == 0 || strict_low
)
1020 #ifdef CLASS_CANNOT_CHANGE_SIZE
1021 && class != CLASS_CANNOT_CHANGE_SIZE
1023 && (CONSTANT_P (SUBREG_REG (out
))
1025 || (((GET_CODE (SUBREG_REG (out
)) == REG
1026 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1027 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1028 && ((GET_MODE_SIZE (outmode
)
1029 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1030 #ifdef WORD_REGISTER_OPERATIONS
1031 || ((GET_MODE_SIZE (outmode
)
1032 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1033 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1034 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1038 || (GET_CODE (SUBREG_REG (out
)) == REG
1039 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1040 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1041 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1043 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1045 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1046 GET_MODE (SUBREG_REG (out
)))))
1047 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1048 + SUBREG_WORD (out
)),
1050 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1051 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1052 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1053 GET_MODE (SUBREG_REG (out
)),
1057 #ifdef CLASS_CANNOT_CHANGE_SIZE
1058 || (GET_CODE (SUBREG_REG (out
)) == REG
1059 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1060 && (TEST_HARD_REG_BIT
1061 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1062 REGNO (SUBREG_REG (out
))))
1063 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1064 != GET_MODE_SIZE (outmode
)))
1068 out_subreg_loc
= outloc
;
1069 outloc
= &SUBREG_REG (out
);
1071 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1072 if (GET_CODE (out
) == MEM
1073 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1076 outmode
= GET_MODE (out
);
1079 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1080 either M1 is not valid for R or M2 is wider than a word but we only
1081 need one word to store an M2-sized quantity in R.
1083 However, we must reload the inner reg *as well as* the subreg in
1084 that case. In this case, the inner reg is an in-out reload. */
1086 if (out
!= 0 && GET_CODE (out
) == SUBREG
1087 && GET_CODE (SUBREG_REG (out
)) == REG
1088 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1089 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1091 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1092 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1094 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1096 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1097 GET_MODE (SUBREG_REG (out
)))))))
1099 /* This relies on the fact that emit_reload_insns outputs the
1100 instructions for output reloads of type RELOAD_OTHER in reverse
1101 order of the reloads. Thus if the outer reload is also of type
1102 RELOAD_OTHER, we are guaranteed that this inner reload will be
1103 output after the outer reload. */
1104 dont_remove_subreg
= 1;
1105 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1107 find_valid_class (outmode
, SUBREG_WORD (out
)),
1108 VOIDmode
, VOIDmode
, 0, 0,
1109 opnum
, RELOAD_OTHER
);
1112 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1113 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1114 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1115 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1118 /* If IN is a SUBREG of a hard register, make a new REG. This
1119 simplifies some of the cases below. */
1121 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1122 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1123 && ! dont_remove_subreg
)
1124 in
= gen_rtx_REG (GET_MODE (in
),
1125 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1127 /* Similarly for OUT. */
1128 if (out
!= 0 && GET_CODE (out
) == SUBREG
1129 && GET_CODE (SUBREG_REG (out
)) == REG
1130 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1131 && ! dont_remove_subreg
)
1132 out
= gen_rtx_REG (GET_MODE (out
),
1133 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1135 /* Narrow down the class of register wanted if that is
1136 desirable on this machine for efficiency. */
1138 class = PREFERRED_RELOAD_CLASS (in
, class);
1140 /* Output reloads may need analogous treatment, different in detail. */
1141 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1143 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1146 /* Make sure we use a class that can handle the actual pseudo
1147 inside any subreg. For example, on the 386, QImode regs
1148 can appear within SImode subregs. Although GENERAL_REGS
1149 can handle SImode, QImode needs a smaller class. */
1150 #ifdef LIMIT_RELOAD_CLASS
1152 class = LIMIT_RELOAD_CLASS (inmode
, class);
1153 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1154 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1157 class = LIMIT_RELOAD_CLASS (outmode
, class);
1158 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1159 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1162 /* Verify that this class is at least possible for the mode that
1164 if (this_insn_is_asm
)
1166 enum machine_mode mode
;
1167 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1171 if (mode
== VOIDmode
)
1173 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1178 outmode
= word_mode
;
1180 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1181 if (HARD_REGNO_MODE_OK (i
, mode
)
1182 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1184 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1187 for (j
= 1; j
< nregs
; j
++)
1188 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1193 if (i
== FIRST_PSEUDO_REGISTER
)
1195 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1200 /* Optional output reloads are always OK even if we have no register class,
1201 since the function of these reloads is only to have spill_reg_store etc.
1202 set, so that the storing insn can be deleted later. */
1203 if (class == NO_REGS
1204 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1207 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1211 /* See if we need a secondary reload register to move between CLASS
1212 and IN or CLASS and OUT. Get the icode and push any required reloads
1213 needed for each of them if so. */
1215 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1218 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1219 &secondary_in_icode
);
1222 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1223 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1224 secondary_out_reload
1225 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1226 type
, &secondary_out_icode
);
1229 /* We found no existing reload suitable for re-use.
1230 So add an additional reload. */
1232 #ifdef SECONDARY_MEMORY_NEEDED
1233 /* If a memory location is needed for the copy, make one. */
1234 if (in
!= 0 && GET_CODE (in
) == REG
1235 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1236 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1238 get_secondary_mem (in
, inmode
, opnum
, type
);
1244 rld
[i
].class = class;
1245 rld
[i
].inmode
= inmode
;
1246 rld
[i
].outmode
= outmode
;
1248 rld
[i
].optional
= optional
;
1250 rld
[i
].nocombine
= 0;
1251 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1252 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1253 rld
[i
].opnum
= opnum
;
1254 rld
[i
].when_needed
= type
;
1255 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1256 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1257 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1258 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1259 rld
[i
].secondary_p
= 0;
1263 #ifdef SECONDARY_MEMORY_NEEDED
1264 if (out
!= 0 && GET_CODE (out
) == REG
1265 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1266 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1268 get_secondary_mem (out
, outmode
, opnum
, type
);
1273 /* We are reusing an existing reload,
1274 but we may have additional information for it.
1275 For example, we may now have both IN and OUT
1276 while the old one may have just one of them. */
1278 /* The modes can be different. If they are, we want to reload in
1279 the larger mode, so that the value is valid for both modes. */
1280 if (inmode
!= VOIDmode
1281 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1282 rld
[i
].inmode
= inmode
;
1283 if (outmode
!= VOIDmode
1284 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1285 rld
[i
].outmode
= outmode
;
1288 rtx in_reg
= inloc
? *inloc
: 0;
1289 /* If we merge reloads for two distinct rtl expressions that
1290 are identical in content, there might be duplicate address
1291 reloads. Remove the extra set now, so that if we later find
1292 that we can inherit this reload, we can get rid of the
1293 address reloads altogether.
1295 Do not do this if both reloads are optional since the result
1296 would be an optional reload which could potentially leave
1297 unresolved address replacements.
1299 It is not sufficient to call transfer_replacements since
1300 choose_reload_regs will remove the replacements for address
1301 reloads of inherited reloads which results in the same
1303 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1304 && ! (rld
[i
].optional
&& optional
))
1306 /* We must keep the address reload with the lower operand
1308 if (opnum
> rld
[i
].opnum
)
1310 remove_address_replacements (in
);
1312 in_reg
= rld
[i
].in_reg
;
1315 remove_address_replacements (rld
[i
].in
);
1318 rld
[i
].in_reg
= in_reg
;
1323 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1325 if (reg_class_subset_p (class, rld
[i
].class))
1326 rld
[i
].class = class;
1327 rld
[i
].optional
&= optional
;
1328 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1329 opnum
, rld
[i
].opnum
))
1330 rld
[i
].when_needed
= RELOAD_OTHER
;
1331 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1334 /* If the ostensible rtx being reload differs from the rtx found
1335 in the location to substitute, this reload is not safe to combine
1336 because we cannot reliably tell whether it appears in the insn. */
1338 if (in
!= 0 && in
!= *inloc
)
1339 rld
[i
].nocombine
= 1;
1342 /* This was replaced by changes in find_reloads_address_1 and the new
1343 function inc_for_reload, which go with a new meaning of reload_inc. */
1345 /* If this is an IN/OUT reload in an insn that sets the CC,
1346 it must be for an autoincrement. It doesn't work to store
1347 the incremented value after the insn because that would clobber the CC.
1348 So we must do the increment of the value reloaded from,
1349 increment it, store it back, then decrement again. */
1350 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1354 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1355 /* If we did not find a nonzero amount-to-increment-by,
1356 that contradicts the belief that IN is being incremented
1357 in an address in this insn. */
1358 if (rld
[i
].inc
== 0)
1363 /* If we will replace IN and OUT with the reload-reg,
1364 record where they are located so that substitution need
1365 not do a tree walk. */
1367 if (replace_reloads
)
1371 register struct replacement
*r
= &replacements
[n_replacements
++];
1373 r
->subreg_loc
= in_subreg_loc
;
1377 if (outloc
!= 0 && outloc
!= inloc
)
1379 register struct replacement
*r
= &replacements
[n_replacements
++];
1382 r
->subreg_loc
= out_subreg_loc
;
1387 /* If this reload is just being introduced and it has both
1388 an incoming quantity and an outgoing quantity that are
1389 supposed to be made to match, see if either one of the two
1390 can serve as the place to reload into.
1392 If one of them is acceptable, set rld[i].reg_rtx
1395 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1397 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1400 earlyclobber_operand_p (out
));
1402 /* If the outgoing register already contains the same value
1403 as the incoming one, we can dispense with loading it.
1404 The easiest way to tell the caller that is to give a phony
1405 value for the incoming operand (same as outgoing one). */
1406 if (rld
[i
].reg_rtx
== out
1407 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1408 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1409 static_reload_reg_p
, i
, inmode
))
1413 /* If this is an input reload and the operand contains a register that
1414 dies in this insn and is used nowhere else, see if it is the right class
1415 to be used for this reload. Use it if so. (This occurs most commonly
1416 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1417 this if it is also an output reload that mentions the register unless
1418 the output is a SUBREG that clobbers an entire register.
1420 Note that the operand might be one of the spill regs, if it is a
1421 pseudo reg and we are in a block where spilling has not taken place.
1422 But if there is no spilling in this block, that is OK.
1423 An explicitly used hard reg cannot be a spill reg. */
1425 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1430 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1431 if (REG_NOTE_KIND (note
) == REG_DEAD
1432 && GET_CODE (XEXP (note
, 0)) == REG
1433 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1434 && reg_mentioned_p (XEXP (note
, 0), in
)
1435 && ! refers_to_regno_for_reload_p (regno
,
1437 + HARD_REGNO_NREGS (regno
,
1439 PATTERN (this_insn
), inloc
)
1440 /* If this is also an output reload, IN cannot be used as
1441 the reload register if it is set in this insn unless IN
1443 && (out
== 0 || in
== out
1444 || ! hard_reg_set_here_p (regno
,
1446 + HARD_REGNO_NREGS (regno
,
1448 PATTERN (this_insn
)))
1449 /* ??? Why is this code so different from the previous?
1450 Is there any simple coherent way to describe the two together?
1451 What's going on here. */
1453 || (GET_CODE (in
) == SUBREG
1454 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1456 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1457 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1458 /* Make sure the operand fits in the reg that dies. */
1459 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1460 && HARD_REGNO_MODE_OK (regno
, inmode
)
1461 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1462 && HARD_REGNO_MODE_OK (regno
, outmode
))
1465 int nregs
= HARD_REGNO_NREGS (regno
, inmode
);
1466 for (offs
= 0; offs
< nregs
; offs
++)
1467 if (fixed_regs
[regno
+ offs
]
1468 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1474 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1481 output_reloadnum
= i
;
1486 /* Record an additional place we must replace a value
1487 for which we have already recorded a reload.
1488 RELOADNUM is the value returned by push_reload
1489 when the reload was recorded.
1490 This is used in insn patterns that use match_dup. */
1493 push_replacement (loc
, reloadnum
, mode
)
1496 enum machine_mode mode
;
1498 if (replace_reloads
)
1500 register struct replacement
*r
= &replacements
[n_replacements
++];
1501 r
->what
= reloadnum
;
1508 /* Transfer all replacements that used to be in reload FROM to be in
1512 transfer_replacements (to
, from
)
1517 for (i
= 0; i
< n_replacements
; i
++)
1518 if (replacements
[i
].what
== from
)
1519 replacements
[i
].what
= to
;
1522 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1523 or a subpart of it. If we have any replacements registered for IN_RTX,
1524 cancel the reloads that were supposed to load them.
1525 Return non-zero if we canceled any reloads. */
1527 remove_address_replacements (in_rtx
)
1531 char reload_flags
[MAX_RELOADS
];
1532 int something_changed
= 0;
1534 bzero (reload_flags
, sizeof reload_flags
);
1535 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1537 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1538 reload_flags
[replacements
[i
].what
] |= 1;
1541 replacements
[j
++] = replacements
[i
];
1542 reload_flags
[replacements
[i
].what
] |= 2;
1545 /* Note that the following store must be done before the recursive calls. */
1548 for (i
= n_reloads
- 1; i
>= 0; i
--)
1550 if (reload_flags
[i
] == 1)
1552 deallocate_reload_reg (i
);
1553 remove_address_replacements (rld
[i
].in
);
1555 something_changed
= 1;
1558 return something_changed
;
1561 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1563 loc_mentioned_in_p (loc
, in
)
1566 enum rtx_code code
= GET_CODE (in
);
1567 const char *fmt
= GET_RTX_FORMAT (code
);
1570 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1572 if (loc
== &in
->fld
[i
].rtx
)
1576 if (loc_mentioned_in_p (loc
, XEXP (in
, i
)))
1579 else if (fmt
[i
] == 'E')
1580 for (j
= XVECLEN (in
, i
) - 1; i
>= 0; i
--)
1581 if (loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
1587 /* If there is only one output reload, and it is not for an earlyclobber
1588 operand, try to combine it with a (logically unrelated) input reload
1589 to reduce the number of reload registers needed.
1591 This is safe if the input reload does not appear in
1592 the value being output-reloaded, because this implies
1593 it is not needed any more once the original insn completes.
1595 If that doesn't work, see we can use any of the registers that
1596 die in this insn as a reload register. We can if it is of the right
1597 class and does not appear in the value being output-reloaded. */
1603 int output_reload
= -1;
1604 int secondary_out
= -1;
1607 /* Find the output reload; return unless there is exactly one
1608 and that one is mandatory. */
1610 for (i
= 0; i
< n_reloads
; i
++)
1611 if (rld
[i
].out
!= 0)
1613 if (output_reload
>= 0)
1618 if (output_reload
< 0 || rld
[output_reload
].optional
)
1621 /* An input-output reload isn't combinable. */
1623 if (rld
[output_reload
].in
!= 0)
1626 /* If this reload is for an earlyclobber operand, we can't do anything. */
1627 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1630 /* Check each input reload; can we combine it? */
1632 for (i
= 0; i
< n_reloads
; i
++)
1633 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1634 /* Life span of this reload must not extend past main insn. */
1635 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1636 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1637 && rld
[i
].when_needed
!= RELOAD_OTHER
1638 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1639 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1640 rld
[output_reload
].outmode
))
1642 && rld
[i
].reg_rtx
== 0
1643 #ifdef SECONDARY_MEMORY_NEEDED
1644 /* Don't combine two reloads with different secondary
1645 memory locations. */
1646 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1647 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1648 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1649 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1651 && (SMALL_REGISTER_CLASSES
1652 ? (rld
[i
].class == rld
[output_reload
].class)
1653 : (reg_class_subset_p (rld
[i
].class,
1654 rld
[output_reload
].class)
1655 || reg_class_subset_p (rld
[output_reload
].class,
1657 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1658 /* Args reversed because the first arg seems to be
1659 the one that we imagine being modified
1660 while the second is the one that might be affected. */
1661 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1663 /* However, if the input is a register that appears inside
1664 the output, then we also can't share.
1665 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1666 If the same reload reg is used for both reg 69 and the
1667 result to be stored in memory, then that result
1668 will clobber the address of the memory ref. */
1669 && ! (GET_CODE (rld
[i
].in
) == REG
1670 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1671 rld
[output_reload
].out
))))
1672 && (reg_class_size
[(int) rld
[i
].class]
1673 || SMALL_REGISTER_CLASSES
)
1674 /* We will allow making things slightly worse by combining an
1675 input and an output, but no worse than that. */
1676 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1677 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1681 /* We have found a reload to combine with! */
1682 rld
[i
].out
= rld
[output_reload
].out
;
1683 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1684 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1685 /* Mark the old output reload as inoperative. */
1686 rld
[output_reload
].out
= 0;
1687 /* The combined reload is needed for the entire insn. */
1688 rld
[i
].when_needed
= RELOAD_OTHER
;
1689 /* If the output reload had a secondary reload, copy it. */
1690 if (rld
[output_reload
].secondary_out_reload
!= -1)
1692 rld
[i
].secondary_out_reload
1693 = rld
[output_reload
].secondary_out_reload
;
1694 rld
[i
].secondary_out_icode
1695 = rld
[output_reload
].secondary_out_icode
;
1698 #ifdef SECONDARY_MEMORY_NEEDED
1699 /* Copy any secondary MEM. */
1700 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1701 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1702 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1704 /* If required, minimize the register class. */
1705 if (reg_class_subset_p (rld
[output_reload
].class,
1707 rld
[i
].class = rld
[output_reload
].class;
1709 /* Transfer all replacements from the old reload to the combined. */
1710 for (j
= 0; j
< n_replacements
; j
++)
1711 if (replacements
[j
].what
== output_reload
)
1712 replacements
[j
].what
= i
;
1717 /* If this insn has only one operand that is modified or written (assumed
1718 to be the first), it must be the one corresponding to this reload. It
1719 is safe to use anything that dies in this insn for that output provided
1720 that it does not occur in the output (we already know it isn't an
1721 earlyclobber. If this is an asm insn, give up. */
1723 if (INSN_CODE (this_insn
) == -1)
1726 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1727 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1728 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1731 /* See if some hard register that dies in this insn and is not used in
1732 the output is the right class. Only works if the register we pick
1733 up can fully hold our output reload. */
1734 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1735 if (REG_NOTE_KIND (note
) == REG_DEAD
1736 && GET_CODE (XEXP (note
, 0)) == REG
1737 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1738 rld
[output_reload
].out
)
1739 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1740 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1741 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1742 REGNO (XEXP (note
, 0)))
1743 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1744 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1745 /* Ensure that a secondary or tertiary reload for this output
1746 won't want this register. */
1747 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1748 || (! (TEST_HARD_REG_BIT
1749 (reg_class_contents
[(int) rld
[secondary_out
].class],
1750 REGNO (XEXP (note
, 0))))
1751 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1752 || ! (TEST_HARD_REG_BIT
1753 (reg_class_contents
[(int) rld
[secondary_out
].class],
1754 REGNO (XEXP (note
, 0)))))))
1755 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1757 rld
[output_reload
].reg_rtx
1758 = gen_rtx_REG (rld
[output_reload
].outmode
,
1759 REGNO (XEXP (note
, 0)));
1764 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1765 See if one of IN and OUT is a register that may be used;
1766 this is desirable since a spill-register won't be needed.
1767 If so, return the register rtx that proves acceptable.
1769 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1770 CLASS is the register class required for the reload.
1772 If FOR_REAL is >= 0, it is the number of the reload,
1773 and in some cases when it can be discovered that OUT doesn't need
1774 to be computed, clear out rld[FOR_REAL].out.
1776 If FOR_REAL is -1, this should not be done, because this call
1777 is just to see if a register can be found, not to find and install it.
1779 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1780 puts an additional constraint on being able to use IN for OUT since
1781 IN must not appear elsewhere in the insn (it is assumed that IN itself
1782 is safe from the earlyclobber). */
1785 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1786 inmode
, outmode
, class, for_real
, earlyclobber
)
1787 rtx real_in
, real_out
;
1788 rtx
*inloc
, *outloc
;
1789 enum machine_mode inmode
, outmode
;
1790 enum reg_class
class;
1800 /* If operands exceed a word, we can't use either of them
1801 unless they have the same size. */
1802 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1803 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1804 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1807 /* Find the inside of any subregs. */
1808 while (GET_CODE (out
) == SUBREG
)
1810 out_offset
= SUBREG_WORD (out
);
1811 out
= SUBREG_REG (out
);
1813 while (GET_CODE (in
) == SUBREG
)
1815 in_offset
= SUBREG_WORD (in
);
1816 in
= SUBREG_REG (in
);
1819 /* Narrow down the reg class, the same way push_reload will;
1820 otherwise we might find a dummy now, but push_reload won't. */
1821 class = PREFERRED_RELOAD_CLASS (in
, class);
1823 /* See if OUT will do. */
1824 if (GET_CODE (out
) == REG
1825 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1827 unsigned int regno
= REGNO (out
) + out_offset
;
1828 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1831 /* When we consider whether the insn uses OUT,
1832 ignore references within IN. They don't prevent us
1833 from copying IN into OUT, because those refs would
1834 move into the insn that reloads IN.
1836 However, we only ignore IN in its role as this reload.
1837 If the insn uses IN elsewhere and it contains OUT,
1838 that counts. We can't be sure it's the "same" operand
1839 so it might not go through this reload. */
1841 *inloc
= const0_rtx
;
1843 if (regno
< FIRST_PSEUDO_REGISTER
1844 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1845 PATTERN (this_insn
), outloc
))
1849 for (i
= 0; i
< nwords
; i
++)
1850 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1856 if (GET_CODE (real_out
) == REG
)
1859 value
= gen_rtx_REG (outmode
, regno
);
1866 /* Consider using IN if OUT was not acceptable
1867 or if OUT dies in this insn (like the quotient in a divmod insn).
1868 We can't use IN unless it is dies in this insn,
1869 which means we must know accurately which hard regs are live.
1870 Also, the result can't go in IN if IN is used within OUT,
1871 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1872 if (hard_regs_live_known
1873 && GET_CODE (in
) == REG
1874 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1876 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1877 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1878 && !fixed_regs
[REGNO (in
)]
1879 && HARD_REGNO_MODE_OK (REGNO (in
),
1880 /* The only case where out and real_out might
1881 have different modes is where real_out
1882 is a subreg, and in that case, out
1884 (GET_MODE (out
) != VOIDmode
1885 ? GET_MODE (out
) : outmode
)))
1887 unsigned int regno
= REGNO (in
) + in_offset
;
1888 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1890 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1891 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1892 PATTERN (this_insn
))
1894 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1895 PATTERN (this_insn
), inloc
)))
1899 for (i
= 0; i
< nwords
; i
++)
1900 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1906 /* If we were going to use OUT as the reload reg
1907 and changed our mind, it means OUT is a dummy that
1908 dies here. So don't bother copying value to it. */
1909 if (for_real
>= 0 && value
== real_out
)
1910 rld
[for_real
].out
= 0;
1911 if (GET_CODE (real_in
) == REG
)
1914 value
= gen_rtx_REG (inmode
, regno
);
1922 /* This page contains subroutines used mainly for determining
1923 whether the IN or an OUT of a reload can serve as the
1926 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1929 earlyclobber_operand_p (x
)
1934 for (i
= 0; i
< n_earlyclobbers
; i
++)
1935 if (reload_earlyclobbers
[i
] == x
)
1941 /* Return 1 if expression X alters a hard reg in the range
1942 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1943 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1944 X should be the body of an instruction. */
1947 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1948 unsigned int beg_regno
, end_regno
;
1951 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1953 register rtx op0
= SET_DEST (x
);
1955 while (GET_CODE (op0
) == SUBREG
)
1956 op0
= SUBREG_REG (op0
);
1957 if (GET_CODE (op0
) == REG
)
1959 unsigned int r
= REGNO (op0
);
1961 /* See if this reg overlaps range under consideration. */
1963 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1967 else if (GET_CODE (x
) == PARALLEL
)
1969 register int i
= XVECLEN (x
, 0) - 1;
1972 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1979 /* Return 1 if ADDR is a valid memory address for mode MODE,
1980 and check that each pseudo reg has the proper kind of
1984 strict_memory_address_p (mode
, addr
)
1985 enum machine_mode mode ATTRIBUTE_UNUSED
;
1988 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1995 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1996 if they are the same hard reg, and has special hacks for
1997 autoincrement and autodecrement.
1998 This is specifically intended for find_reloads to use
1999 in determining whether two operands match.
2000 X is the operand whose number is the lower of the two.
2002 The value is 2 if Y contains a pre-increment that matches
2003 a non-incrementing address in X. */
2005 /* ??? To be completely correct, we should arrange to pass
2006 for X the output operand and for Y the input operand.
2007 For now, we assume that the output operand has the lower number
2008 because that is natural in (SET output (... input ...)). */
2011 operands_match_p (x
, y
)
2015 register RTX_CODE code
= GET_CODE (x
);
2016 register const char *fmt
;
2021 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2022 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2023 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2029 i
= REGNO (SUBREG_REG (x
));
2030 if (i
>= FIRST_PSEUDO_REGISTER
)
2032 i
+= SUBREG_WORD (x
);
2037 if (GET_CODE (y
) == SUBREG
)
2039 j
= REGNO (SUBREG_REG (y
));
2040 if (j
>= FIRST_PSEUDO_REGISTER
)
2042 j
+= SUBREG_WORD (y
);
2047 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2048 multiple hard register group, so that for example (reg:DI 0) and
2049 (reg:SI 1) will be considered the same register. */
2050 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2051 && i
< FIRST_PSEUDO_REGISTER
)
2052 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2053 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2054 && j
< FIRST_PSEUDO_REGISTER
)
2055 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2059 /* If two operands must match, because they are really a single
2060 operand of an assembler insn, then two postincrements are invalid
2061 because the assembler insn would increment only once.
2062 On the other hand, an postincrement matches ordinary indexing
2063 if the postincrement is the output operand. */
2064 if (code
== POST_DEC
|| code
== POST_INC
)
2065 return operands_match_p (XEXP (x
, 0), y
);
2066 /* Two preincrements are invalid
2067 because the assembler insn would increment only once.
2068 On the other hand, an preincrement matches ordinary indexing
2069 if the preincrement is the input operand.
2070 In this case, return 2, since some callers need to do special
2071 things when this happens. */
2072 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
2073 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2077 /* Now we have disposed of all the cases
2078 in which different rtx codes can match. */
2079 if (code
!= GET_CODE (y
))
2081 if (code
== LABEL_REF
)
2082 return XEXP (x
, 0) == XEXP (y
, 0);
2083 if (code
== SYMBOL_REF
)
2084 return XSTR (x
, 0) == XSTR (y
, 0);
2086 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2088 if (GET_MODE (x
) != GET_MODE (y
))
2091 /* Compare the elements. If any pair of corresponding elements
2092 fail to match, return 0 for the whole things. */
2095 fmt
= GET_RTX_FORMAT (code
);
2096 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2102 if (XWINT (x
, i
) != XWINT (y
, i
))
2107 if (XINT (x
, i
) != XINT (y
, i
))
2112 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2115 /* If any subexpression returns 2,
2116 we should return 2 if we are successful. */
2125 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2127 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2129 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2137 /* It is believed that rtx's at this level will never
2138 contain anything but integers and other rtx's,
2139 except for within LABEL_REFs and SYMBOL_REFs. */
2144 return 1 + success_2
;
2147 /* Describe the range of registers or memory referenced by X.
2148 If X is a register, set REG_FLAG and put the first register
2149 number into START and the last plus one into END.
2150 If X is a memory reference, put a base address into BASE
2151 and a range of integer offsets into START and END.
2152 If X is pushing on the stack, we can assume it causes no trouble,
2153 so we set the SAFE field. */
2155 static struct decomposition
2159 struct decomposition val
;
2165 if (GET_CODE (x
) == MEM
)
2167 rtx base
= NULL_RTX
, offset
= 0;
2168 rtx addr
= XEXP (x
, 0);
2170 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2171 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2173 val
.base
= XEXP (addr
, 0);
2174 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2175 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2176 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2180 if (GET_CODE (addr
) == CONST
)
2182 addr
= XEXP (addr
, 0);
2185 if (GET_CODE (addr
) == PLUS
)
2187 if (CONSTANT_P (XEXP (addr
, 0)))
2189 base
= XEXP (addr
, 1);
2190 offset
= XEXP (addr
, 0);
2192 else if (CONSTANT_P (XEXP (addr
, 1)))
2194 base
= XEXP (addr
, 0);
2195 offset
= XEXP (addr
, 1);
2202 offset
= const0_rtx
;
2204 if (GET_CODE (offset
) == CONST
)
2205 offset
= XEXP (offset
, 0);
2206 if (GET_CODE (offset
) == PLUS
)
2208 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2210 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2211 offset
= XEXP (offset
, 0);
2213 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2215 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2216 offset
= XEXP (offset
, 1);
2220 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2221 offset
= const0_rtx
;
2224 else if (GET_CODE (offset
) != CONST_INT
)
2226 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2227 offset
= const0_rtx
;
2230 if (all_const
&& GET_CODE (base
) == PLUS
)
2231 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2233 if (GET_CODE (offset
) != CONST_INT
)
2236 val
.start
= INTVAL (offset
);
2237 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2241 else if (GET_CODE (x
) == REG
)
2244 val
.start
= true_regnum (x
);
2247 /* A pseudo with no hard reg. */
2248 val
.start
= REGNO (x
);
2249 val
.end
= val
.start
+ 1;
2253 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2255 else if (GET_CODE (x
) == SUBREG
)
2257 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2258 /* This could be more precise, but it's good enough. */
2259 return decompose (SUBREG_REG (x
));
2261 val
.start
= true_regnum (x
);
2263 return decompose (SUBREG_REG (x
));
2266 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2268 else if (CONSTANT_P (x
)
2269 /* This hasn't been assigned yet, so it can't conflict yet. */
2270 || GET_CODE (x
) == SCRATCH
)
2277 /* Return 1 if altering Y will not modify the value of X.
2278 Y is also described by YDATA, which should be decompose (Y). */
2281 immune_p (x
, y
, ydata
)
2283 struct decomposition ydata
;
2285 struct decomposition xdata
;
2288 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2292 if (GET_CODE (y
) != MEM
)
2294 /* If Y is memory and X is not, Y can't affect X. */
2295 if (GET_CODE (x
) != MEM
)
2298 xdata
= decompose (x
);
2300 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2302 /* If bases are distinct symbolic constants, there is no overlap. */
2303 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2305 /* Constants and stack slots never overlap. */
2306 if (CONSTANT_P (xdata
.base
)
2307 && (ydata
.base
== frame_pointer_rtx
2308 || ydata
.base
== hard_frame_pointer_rtx
2309 || ydata
.base
== stack_pointer_rtx
))
2311 if (CONSTANT_P (ydata
.base
)
2312 && (xdata
.base
== frame_pointer_rtx
2313 || xdata
.base
== hard_frame_pointer_rtx
2314 || xdata
.base
== stack_pointer_rtx
))
2316 /* If either base is variable, we don't know anything. */
2321 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2324 /* Similar, but calls decompose. */
2327 safe_from_earlyclobber (op
, clobber
)
2330 struct decomposition early_data
;
2332 early_data
= decompose (clobber
);
2333 return immune_p (op
, clobber
, early_data
);
2336 /* Main entry point of this file: search the body of INSN
2337 for values that need reloading and record them with push_reload.
2338 REPLACE nonzero means record also where the values occur
2339 so that subst_reloads can be used.
2341 IND_LEVELS says how many levels of indirection are supported by this
2342 machine; a value of zero means that a memory reference is not a valid
2345 LIVE_KNOWN says we have valid information about which hard
2346 regs are live at each point in the program; this is true when
2347 we are called from global_alloc but false when stupid register
2348 allocation has been done.
2350 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2351 which is nonnegative if the reg has been commandeered for reloading into.
2352 It is copied into STATIC_RELOAD_REG_P and referenced from there
2353 by various subroutines.
2355 Return TRUE if some operands need to be changed, because of swapping
2356 commutative operands, reg_equiv_address substitution, or whatever. */
2359 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2361 int replace
, ind_levels
;
2363 short *reload_reg_p
;
2365 register int insn_code_number
;
2368 /* These start out as the constraints for the insn
2369 and they are chewed up as we consider alternatives. */
2370 char *constraints
[MAX_RECOG_OPERANDS
];
2371 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2373 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2374 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2375 /* Nonzero for a MEM operand whose entire address needs a reload. */
2376 int address_reloaded
[MAX_RECOG_OPERANDS
];
2377 /* Value of enum reload_type to use for operand. */
2378 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2379 /* Value of enum reload_type to use within address of operand. */
2380 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2381 /* Save the usage of each operand. */
2382 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2383 int no_input_reloads
= 0, no_output_reloads
= 0;
2385 int this_alternative
[MAX_RECOG_OPERANDS
];
2386 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2387 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2388 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2389 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2391 int goal_alternative
[MAX_RECOG_OPERANDS
];
2392 int this_alternative_number
;
2393 int goal_alternative_number
= 0;
2394 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2395 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2396 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2397 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2398 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2399 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2400 int goal_alternative_swapped
;
2403 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2404 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2405 rtx body
= PATTERN (insn
);
2406 rtx set
= single_set (insn
);
2407 int goal_earlyclobber
= 0, this_earlyclobber
;
2408 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2414 n_earlyclobbers
= 0;
2415 replace_reloads
= replace
;
2416 hard_regs_live_known
= live_known
;
2417 static_reload_reg_p
= reload_reg_p
;
2419 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2420 neither are insns that SET cc0. Insns that use CC0 are not allowed
2421 to have any input reloads. */
2422 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2423 no_output_reloads
= 1;
2426 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2427 no_input_reloads
= 1;
2428 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2429 no_output_reloads
= 1;
2432 #ifdef SECONDARY_MEMORY_NEEDED
2433 /* The eliminated forms of any secondary memory locations are per-insn, so
2434 clear them out here. */
2436 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2439 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2440 is cheap to move between them. If it is not, there may not be an insn
2441 to do the copy, so we may need a reload. */
2442 if (GET_CODE (body
) == SET
2443 && GET_CODE (SET_DEST (body
)) == REG
2444 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2445 && GET_CODE (SET_SRC (body
)) == REG
2446 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2447 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2448 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2451 extract_insn (insn
);
2453 noperands
= reload_n_operands
= recog_data
.n_operands
;
2454 n_alternatives
= recog_data
.n_alternatives
;
2456 /* Just return "no reloads" if insn has no operands with constraints. */
2457 if (noperands
== 0 || n_alternatives
== 0)
2460 insn_code_number
= INSN_CODE (insn
);
2461 this_insn_is_asm
= insn_code_number
< 0;
2463 memcpy (operand_mode
, recog_data
.operand_mode
,
2464 noperands
* sizeof (enum machine_mode
));
2465 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2469 /* If we will need to know, later, whether some pair of operands
2470 are the same, we must compare them now and save the result.
2471 Reloading the base and index registers will clobber them
2472 and afterward they will fail to match. */
2474 for (i
= 0; i
< noperands
; i
++)
2479 substed_operand
[i
] = recog_data
.operand
[i
];
2482 modified
[i
] = RELOAD_READ
;
2484 /* Scan this operand's constraint to see if it is an output operand,
2485 an in-out operand, is commutative, or should match another. */
2490 modified
[i
] = RELOAD_WRITE
;
2492 modified
[i
] = RELOAD_READ_WRITE
;
2495 /* The last operand should not be marked commutative. */
2496 if (i
== noperands
- 1)
2501 else if (c
>= '0' && c
<= '9')
2504 operands_match
[c
][i
]
2505 = operands_match_p (recog_data
.operand
[c
],
2506 recog_data
.operand
[i
]);
2508 /* An operand may not match itself. */
2512 /* If C can be commuted with C+1, and C might need to match I,
2513 then C+1 might also need to match I. */
2514 if (commutative
>= 0)
2516 if (c
== commutative
|| c
== commutative
+ 1)
2518 int other
= c
+ (c
== commutative
? 1 : -1);
2519 operands_match
[other
][i
]
2520 = operands_match_p (recog_data
.operand
[other
],
2521 recog_data
.operand
[i
]);
2523 if (i
== commutative
|| i
== commutative
+ 1)
2525 int other
= i
+ (i
== commutative
? 1 : -1);
2526 operands_match
[c
][other
]
2527 = operands_match_p (recog_data
.operand
[c
],
2528 recog_data
.operand
[other
]);
2530 /* Note that C is supposed to be less than I.
2531 No need to consider altering both C and I because in
2532 that case we would alter one into the other. */
2538 /* Examine each operand that is a memory reference or memory address
2539 and reload parts of the addresses into index registers.
2540 Also here any references to pseudo regs that didn't get hard regs
2541 but are equivalent to constants get replaced in the insn itself
2542 with those constants. Nobody will ever see them again.
2544 Finally, set up the preferred classes of each operand. */
2546 for (i
= 0; i
< noperands
; i
++)
2548 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2550 address_reloaded
[i
] = 0;
2551 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2552 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2555 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2556 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2559 if (*constraints
[i
] == 0)
2560 /* Ignore things like match_operator operands. */
2562 else if (constraints
[i
][0] == 'p')
2564 find_reloads_address (VOIDmode
, NULL_PTR
,
2565 recog_data
.operand
[i
],
2566 recog_data
.operand_loc
[i
],
2567 i
, operand_type
[i
], ind_levels
, insn
);
2569 /* If we now have a simple operand where we used to have a
2570 PLUS or MULT, re-recognize and try again. */
2571 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2572 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2573 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2574 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2576 INSN_CODE (insn
) = -1;
2577 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2582 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2583 substed_operand
[i
] = recog_data
.operand
[i
];
2585 else if (code
== MEM
)
2588 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2589 recog_data
.operand_loc
[i
],
2590 XEXP (recog_data
.operand
[i
], 0),
2591 &XEXP (recog_data
.operand
[i
], 0),
2592 i
, address_type
[i
], ind_levels
, insn
);
2593 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2594 substed_operand
[i
] = recog_data
.operand
[i
];
2596 else if (code
== SUBREG
)
2598 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2600 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2603 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2606 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2607 that didn't get a hard register, emit a USE with a REG_EQUAL
2608 note in front so that we might inherit a previous, possibly
2612 && GET_CODE (op
) == MEM
2613 && GET_CODE (reg
) == REG
2614 && (GET_MODE_SIZE (GET_MODE (reg
))
2615 >= GET_MODE_SIZE (GET_MODE (op
))))
2616 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2617 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2618 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2620 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2622 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2623 /* We can get a PLUS as an "operand" as a result of register
2624 elimination. See eliminate_regs and gen_reload. We handle
2625 a unary operator by reloading the operand. */
2626 substed_operand
[i
] = recog_data
.operand
[i
]
2627 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2628 ind_levels
, 0, insn
);
2629 else if (code
== REG
)
2631 /* This is equivalent to calling find_reloads_toplev.
2632 The code is duplicated for speed.
2633 When we find a pseudo always equivalent to a constant,
2634 we replace it by the constant. We must be sure, however,
2635 that we don't try to replace it in the insn in which it
2637 register int regno
= REGNO (recog_data
.operand
[i
]);
2638 if (reg_equiv_constant
[regno
] != 0
2639 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2641 /* Record the existing mode so that the check if constants are
2642 allowed will work when operand_mode isn't specified. */
2644 if (operand_mode
[i
] == VOIDmode
)
2645 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2647 substed_operand
[i
] = recog_data
.operand
[i
]
2648 = reg_equiv_constant
[regno
];
2650 if (reg_equiv_memory_loc
[regno
] != 0
2651 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2652 /* We need not give a valid is_set_dest argument since the case
2653 of a constant equivalence was checked above. */
2654 substed_operand
[i
] = recog_data
.operand
[i
]
2655 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2656 ind_levels
, 0, insn
);
2658 /* If the operand is still a register (we didn't replace it with an
2659 equivalent), get the preferred class to reload it into. */
2660 code
= GET_CODE (recog_data
.operand
[i
]);
2662 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2663 >= FIRST_PSEUDO_REGISTER
)
2664 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2668 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2669 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2672 /* If this is simply a copy from operand 1 to operand 0, merge the
2673 preferred classes for the operands. */
2674 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2675 && recog_data
.operand
[1] == SET_SRC (set
))
2677 preferred_class
[0] = preferred_class
[1]
2678 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2679 pref_or_nothing
[0] |= pref_or_nothing
[1];
2680 pref_or_nothing
[1] |= pref_or_nothing
[0];
2683 /* Now see what we need for pseudo-regs that didn't get hard regs
2684 or got the wrong kind of hard reg. For this, we must consider
2685 all the operands together against the register constraints. */
2687 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2690 goal_alternative_swapped
= 0;
2693 /* The constraints are made of several alternatives.
2694 Each operand's constraint looks like foo,bar,... with commas
2695 separating the alternatives. The first alternatives for all
2696 operands go together, the second alternatives go together, etc.
2698 First loop over alternatives. */
2700 for (this_alternative_number
= 0;
2701 this_alternative_number
< n_alternatives
;
2702 this_alternative_number
++)
2704 /* Loop over operands for one constraint alternative. */
2705 /* LOSERS counts those that don't fit this alternative
2706 and would require loading. */
2708 /* BAD is set to 1 if it some operand can't fit this alternative
2709 even after reloading. */
2711 /* REJECT is a count of how undesirable this alternative says it is
2712 if any reloading is required. If the alternative matches exactly
2713 then REJECT is ignored, but otherwise it gets this much
2714 counted against it in addition to the reloading needed. Each
2715 ? counts three times here since we want the disparaging caused by
2716 a bad register class to only count 1/3 as much. */
2719 this_earlyclobber
= 0;
2721 for (i
= 0; i
< noperands
; i
++)
2723 register char *p
= constraints
[i
];
2724 register int win
= 0;
2725 /* 0 => this operand can be reloaded somehow for this alternative */
2727 /* 0 => this operand can be reloaded if the alternative allows regs. */
2730 register rtx operand
= recog_data
.operand
[i
];
2732 /* Nonzero means this is a MEM that must be reloaded into a reg
2733 regardless of what the constraint says. */
2734 int force_reload
= 0;
2736 /* Nonzero if a constant forced into memory would be OK for this
2739 int earlyclobber
= 0;
2741 /* If the predicate accepts a unary operator, it means that
2742 we need to reload the operand, but do not do this for
2743 match_operator and friends. */
2744 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2745 operand
= XEXP (operand
, 0);
2747 /* If the operand is a SUBREG, extract
2748 the REG or MEM (or maybe even a constant) within.
2749 (Constants can occur as a result of reg_equiv_constant.) */
2751 while (GET_CODE (operand
) == SUBREG
)
2753 offset
+= SUBREG_WORD (operand
);
2754 operand
= SUBREG_REG (operand
);
2755 /* Force reload if this is a constant or PLUS or if there may
2756 be a problem accessing OPERAND in the outer mode. */
2757 if (CONSTANT_P (operand
)
2758 || GET_CODE (operand
) == PLUS
2759 /* We must force a reload of paradoxical SUBREGs
2760 of a MEM because the alignment of the inner value
2761 may not be enough to do the outer reference. On
2762 big-endian machines, it may also reference outside
2765 On machines that extend byte operations and we have a
2766 SUBREG where both the inner and outer modes are no wider
2767 than a word and the inner mode is narrower, is integral,
2768 and gets extended when loaded from memory, combine.c has
2769 made assumptions about the behavior of the machine in such
2770 register access. If the data is, in fact, in memory we
2771 must always load using the size assumed to be in the
2772 register and let the insn do the different-sized
2775 This is doubly true if WORD_REGISTER_OPERATIONS. In
2776 this case eliminate_regs has left non-paradoxical
2777 subregs for push_reloads to see. Make sure it does
2778 by forcing the reload.
2780 ??? When is it right at this stage to have a subreg
2781 of a mem that is _not_ to be handled specialy? IMO
2782 those should have been reduced to just a mem. */
2783 || ((GET_CODE (operand
) == MEM
2784 || (GET_CODE (operand
)== REG
2785 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2786 #ifndef WORD_REGISTER_OPERATIONS
2787 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2788 < BIGGEST_ALIGNMENT
)
2789 && (GET_MODE_SIZE (operand_mode
[i
])
2790 > GET_MODE_SIZE (GET_MODE (operand
))))
2791 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2792 #ifdef LOAD_EXTEND_OP
2793 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2794 && (GET_MODE_SIZE (GET_MODE (operand
))
2796 && (GET_MODE_SIZE (operand_mode
[i
])
2797 > GET_MODE_SIZE (GET_MODE (operand
)))
2798 && INTEGRAL_MODE_P (GET_MODE (operand
))
2799 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2804 /* Subreg of a hard reg which can't handle the subreg's mode
2805 or which would handle that mode in the wrong number of
2806 registers for subregging to work. */
2807 || (GET_CODE (operand
) == REG
2808 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2809 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2810 && (GET_MODE_SIZE (GET_MODE (operand
))
2812 && ((GET_MODE_SIZE (GET_MODE (operand
))
2814 != HARD_REGNO_NREGS (REGNO (operand
),
2815 GET_MODE (operand
))))
2816 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2821 this_alternative
[i
] = (int) NO_REGS
;
2822 this_alternative_win
[i
] = 0;
2823 this_alternative_offmemok
[i
] = 0;
2824 this_alternative_earlyclobber
[i
] = 0;
2825 this_alternative_matches
[i
] = -1;
2827 /* An empty constraint or empty alternative
2828 allows anything which matched the pattern. */
2829 if (*p
== 0 || *p
== ',')
2832 /* Scan this alternative's specs for this operand;
2833 set WIN if the operand fits any letter in this alternative.
2834 Otherwise, clear BADOP if this operand could
2835 fit some letter after reloads,
2836 or set WINREG if this operand could fit after reloads
2837 provided the constraint allows some registers. */
2839 while (*p
&& (c
= *p
++) != ',')
2842 case '=': case '+': case '*':
2846 /* The last operand should not be marked commutative. */
2847 if (i
!= noperands
- 1)
2860 /* Ignore rest of this alternative as far as
2861 reloading is concerned. */
2862 while (*p
&& *p
!= ',') p
++;
2865 case '0': case '1': case '2': case '3': case '4':
2866 case '5': case '6': case '7': case '8': case '9':
2869 this_alternative_matches
[i
] = c
;
2870 /* We are supposed to match a previous operand.
2871 If we do, we win if that one did.
2872 If we do not, count both of the operands as losers.
2873 (This is too conservative, since most of the time
2874 only a single reload insn will be needed to make
2875 the two operands win. As a result, this alternative
2876 may be rejected when it is actually desirable.) */
2877 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2878 /* If we are matching as if two operands were swapped,
2879 also pretend that operands_match had been computed
2881 But if I is the second of those and C is the first,
2882 don't exchange them, because operands_match is valid
2883 only on one side of its diagonal. */
2885 [(c
== commutative
|| c
== commutative
+ 1)
2886 ? 2*commutative
+ 1 - c
: c
]
2887 [(i
== commutative
|| i
== commutative
+ 1)
2888 ? 2*commutative
+ 1 - i
: i
])
2889 : operands_match
[c
][i
])
2891 /* If we are matching a non-offsettable address where an
2892 offsettable address was expected, then we must reject
2893 this combination, because we can't reload it. */
2894 if (this_alternative_offmemok
[c
]
2895 && GET_CODE (recog_data
.operand
[c
]) == MEM
2896 && this_alternative
[c
] == (int) NO_REGS
2897 && ! this_alternative_win
[c
])
2900 win
= this_alternative_win
[c
];
2904 /* Operands don't match. */
2906 /* Retroactively mark the operand we had to match
2907 as a loser, if it wasn't already. */
2908 if (this_alternative_win
[c
])
2910 this_alternative_win
[c
] = 0;
2911 if (this_alternative
[c
] == (int) NO_REGS
)
2913 /* But count the pair only once in the total badness of
2914 this alternative, if the pair can be a dummy reload. */
2916 = find_dummy_reload (recog_data
.operand
[i
],
2917 recog_data
.operand
[c
],
2918 recog_data
.operand_loc
[i
],
2919 recog_data
.operand_loc
[c
],
2920 operand_mode
[i
], operand_mode
[c
],
2921 this_alternative
[c
], -1,
2922 this_alternative_earlyclobber
[c
]);
2927 /* This can be fixed with reloads if the operand
2928 we are supposed to match can be fixed with reloads. */
2930 this_alternative
[i
] = this_alternative
[c
];
2932 /* If we have to reload this operand and some previous
2933 operand also had to match the same thing as this
2934 operand, we don't know how to do that. So reject this
2936 if (! win
|| force_reload
)
2937 for (j
= 0; j
< i
; j
++)
2938 if (this_alternative_matches
[j
]
2939 == this_alternative_matches
[i
])
2945 /* All necessary reloads for an address_operand
2946 were handled in find_reloads_address. */
2947 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2954 if (GET_CODE (operand
) == MEM
2955 || (GET_CODE (operand
) == REG
2956 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2957 && reg_renumber
[REGNO (operand
)] < 0))
2959 if (CONSTANT_P (operand
)
2960 /* force_const_mem does not accept HIGH. */
2961 && GET_CODE (operand
) != HIGH
)
2967 if (GET_CODE (operand
) == MEM
2968 && ! address_reloaded
[i
]
2969 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2970 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2975 if (GET_CODE (operand
) == MEM
2976 && ! address_reloaded
[i
]
2977 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2978 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2982 /* Memory operand whose address is not offsettable. */
2986 if (GET_CODE (operand
) == MEM
2987 && ! (ind_levels
? offsettable_memref_p (operand
)
2988 : offsettable_nonstrict_memref_p (operand
))
2989 /* Certain mem addresses will become offsettable
2990 after they themselves are reloaded. This is important;
2991 we don't want our own handling of unoffsettables
2992 to override the handling of reg_equiv_address. */
2993 && !(GET_CODE (XEXP (operand
, 0)) == REG
2995 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2999 /* Memory operand whose address is offsettable. */
3003 if ((GET_CODE (operand
) == MEM
3004 /* If IND_LEVELS, find_reloads_address won't reload a
3005 pseudo that didn't get a hard reg, so we have to
3006 reject that case. */
3007 && ((ind_levels
? offsettable_memref_p (operand
)
3008 : offsettable_nonstrict_memref_p (operand
))
3009 /* A reloaded address is offsettable because it is now
3010 just a simple register indirect. */
3011 || address_reloaded
[i
]))
3012 || (GET_CODE (operand
) == REG
3013 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3014 && reg_renumber
[REGNO (operand
)] < 0
3015 /* If reg_equiv_address is nonzero, we will be
3016 loading it into a register; hence it will be
3017 offsettable, but we cannot say that reg_equiv_mem
3018 is offsettable without checking. */
3019 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3020 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3021 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3023 /* force_const_mem does not accept HIGH. */
3024 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3025 || GET_CODE (operand
) == MEM
)
3032 /* Output operand that is stored before the need for the
3033 input operands (and their index registers) is over. */
3034 earlyclobber
= 1, this_earlyclobber
= 1;
3038 #ifndef REAL_ARITHMETIC
3039 /* Match any floating double constant, but only if
3040 we can examine the bits of it reliably. */
3041 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3042 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3043 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3046 if (GET_CODE (operand
) == CONST_DOUBLE
)
3051 if (GET_CODE (operand
) == CONST_DOUBLE
)
3057 if (GET_CODE (operand
) == CONST_DOUBLE
3058 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3063 if (GET_CODE (operand
) == CONST_INT
3064 || (GET_CODE (operand
) == CONST_DOUBLE
3065 && GET_MODE (operand
) == VOIDmode
))
3068 if (CONSTANT_P (operand
)
3069 #ifdef LEGITIMATE_PIC_OPERAND_P
3070 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3077 if (GET_CODE (operand
) == CONST_INT
3078 || (GET_CODE (operand
) == CONST_DOUBLE
3079 && GET_MODE (operand
) == VOIDmode
))
3091 if (GET_CODE (operand
) == CONST_INT
3092 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3102 /* A PLUS is never a valid operand, but reload can make
3103 it from a register when eliminating registers. */
3104 && GET_CODE (operand
) != PLUS
3105 /* A SCRATCH is not a valid operand. */
3106 && GET_CODE (operand
) != SCRATCH
3107 #ifdef LEGITIMATE_PIC_OPERAND_P
3108 && (! CONSTANT_P (operand
)
3110 || LEGITIMATE_PIC_OPERAND_P (operand
))
3112 && (GENERAL_REGS
== ALL_REGS
3113 || GET_CODE (operand
) != REG
3114 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3115 && reg_renumber
[REGNO (operand
)] < 0)))
3117 /* Drop through into 'r' case */
3121 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3124 #ifdef EXTRA_CONSTRAINT
3130 if (EXTRA_CONSTRAINT (operand
, c
))
3137 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3140 if (GET_MODE (operand
) == BLKmode
)
3143 if (GET_CODE (operand
) == REG
3144 && reg_fits_class_p (operand
, this_alternative
[i
],
3145 offset
, GET_MODE (recog_data
.operand
[i
])))
3152 /* If this operand could be handled with a reg,
3153 and some reg is allowed, then this operand can be handled. */
3154 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3157 /* Record which operands fit this alternative. */
3158 this_alternative_earlyclobber
[i
] = earlyclobber
;
3159 if (win
&& ! force_reload
)
3160 this_alternative_win
[i
] = 1;
3163 int const_to_mem
= 0;
3165 this_alternative_offmemok
[i
] = offmemok
;
3169 /* Alternative loses if it has no regs for a reg operand. */
3170 if (GET_CODE (operand
) == REG
3171 && this_alternative
[i
] == (int) NO_REGS
3172 && this_alternative_matches
[i
] < 0)
3175 /* If this is a constant that is reloaded into the desired
3176 class by copying it to memory first, count that as another
3177 reload. This is consistent with other code and is
3178 required to avoid choosing another alternative when
3179 the constant is moved into memory by this function on
3180 an early reload pass. Note that the test here is
3181 precisely the same as in the code below that calls
3183 if (CONSTANT_P (operand
)
3184 /* force_const_mem does not accept HIGH. */
3185 && GET_CODE (operand
) != HIGH
3186 && ((PREFERRED_RELOAD_CLASS (operand
,
3187 (enum reg_class
) this_alternative
[i
])
3189 || no_input_reloads
)
3190 && operand_mode
[i
] != VOIDmode
)
3193 if (this_alternative
[i
] != (int) NO_REGS
)
3197 /* If we can't reload this value at all, reject this
3198 alternative. Note that we could also lose due to
3199 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3202 if (! CONSTANT_P (operand
)
3203 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3204 && (PREFERRED_RELOAD_CLASS (operand
,
3205 (enum reg_class
) this_alternative
[i
])
3209 /* Alternative loses if it requires a type of reload not
3210 permitted for this insn. We can always reload SCRATCH
3211 and objects with a REG_UNUSED note. */
3212 else if (GET_CODE (operand
) != SCRATCH
3213 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3214 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3216 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3221 /* We prefer to reload pseudos over reloading other things,
3222 since such reloads may be able to be eliminated later.
3223 If we are reloading a SCRATCH, we won't be generating any
3224 insns, just using a register, so it is also preferred.
3225 So bump REJECT in other cases. Don't do this in the
3226 case where we are forcing a constant into memory and
3227 it will then win since we don't want to have a different
3228 alternative match then. */
3229 if (! (GET_CODE (operand
) == REG
3230 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3231 && GET_CODE (operand
) != SCRATCH
3232 && ! (const_to_mem
&& constmemok
))
3235 /* Input reloads can be inherited more often than output
3236 reloads can be removed, so penalize output reloads. */
3237 if (operand_type
[i
] != RELOAD_FOR_INPUT
3238 && GET_CODE (operand
) != SCRATCH
)
3242 /* If this operand is a pseudo register that didn't get a hard
3243 reg and this alternative accepts some register, see if the
3244 class that we want is a subset of the preferred class for this
3245 register. If not, but it intersects that class, use the
3246 preferred class instead. If it does not intersect the preferred
3247 class, show that usage of this alternative should be discouraged;
3248 it will be discouraged more still if the register is `preferred
3249 or nothing'. We do this because it increases the chance of
3250 reusing our spill register in a later insn and avoiding a pair
3251 of memory stores and loads.
3253 Don't bother with this if this alternative will accept this
3256 Don't do this for a multiword operand, since it is only a
3257 small win and has the risk of requiring more spill registers,
3258 which could cause a large loss.
3260 Don't do this if the preferred class has only one register
3261 because we might otherwise exhaust the class. */
3264 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3265 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3266 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3268 if (! reg_class_subset_p (this_alternative
[i
],
3269 preferred_class
[i
]))
3271 /* Since we don't have a way of forming the intersection,
3272 we just do something special if the preferred class
3273 is a subset of the class we have; that's the most
3274 common case anyway. */
3275 if (reg_class_subset_p (preferred_class
[i
],
3276 this_alternative
[i
]))
3277 this_alternative
[i
] = (int) preferred_class
[i
];
3279 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3284 /* Now see if any output operands that are marked "earlyclobber"
3285 in this alternative conflict with any input operands
3286 or any memory addresses. */
3288 for (i
= 0; i
< noperands
; i
++)
3289 if (this_alternative_earlyclobber
[i
]
3290 && this_alternative_win
[i
])
3292 struct decomposition early_data
;
3294 early_data
= decompose (recog_data
.operand
[i
]);
3296 if (modified
[i
] == RELOAD_READ
)
3299 if (this_alternative
[i
] == NO_REGS
)
3301 this_alternative_earlyclobber
[i
] = 0;
3302 if (this_insn_is_asm
)
3303 error_for_asm (this_insn
,
3304 "`&' constraint used with no register class");
3309 for (j
= 0; j
< noperands
; j
++)
3310 /* Is this an input operand or a memory ref? */
3311 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3312 || modified
[j
] != RELOAD_WRITE
)
3314 /* Ignore things like match_operator operands. */
3315 && *recog_data
.constraints
[j
] != 0
3316 /* Don't count an input operand that is constrained to match
3317 the early clobber operand. */
3318 && ! (this_alternative_matches
[j
] == i
3319 && rtx_equal_p (recog_data
.operand
[i
],
3320 recog_data
.operand
[j
]))
3321 /* Is it altered by storing the earlyclobber operand? */
3322 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3325 /* If the output is in a single-reg class,
3326 it's costly to reload it, so reload the input instead. */
3327 if (reg_class_size
[this_alternative
[i
]] == 1
3328 && (GET_CODE (recog_data
.operand
[j
]) == REG
3329 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3332 this_alternative_win
[j
] = 0;
3337 /* If an earlyclobber operand conflicts with something,
3338 it must be reloaded, so request this and count the cost. */
3342 this_alternative_win
[i
] = 0;
3343 for (j
= 0; j
< noperands
; j
++)
3344 if (this_alternative_matches
[j
] == i
3345 && this_alternative_win
[j
])
3347 this_alternative_win
[j
] = 0;
3353 /* If one alternative accepts all the operands, no reload required,
3354 choose that alternative; don't consider the remaining ones. */
3357 /* Unswap these so that they are never swapped at `finish'. */
3358 if (commutative
>= 0)
3360 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3361 recog_data
.operand
[commutative
+ 1]
3362 = substed_operand
[commutative
+ 1];
3364 for (i
= 0; i
< noperands
; i
++)
3366 goal_alternative_win
[i
] = 1;
3367 goal_alternative
[i
] = this_alternative
[i
];
3368 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3369 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3370 goal_alternative_earlyclobber
[i
]
3371 = this_alternative_earlyclobber
[i
];
3373 goal_alternative_number
= this_alternative_number
;
3374 goal_alternative_swapped
= swapped
;
3375 goal_earlyclobber
= this_earlyclobber
;
3379 /* REJECT, set by the ! and ? constraint characters and when a register
3380 would be reloaded into a non-preferred class, discourages the use of
3381 this alternative for a reload goal. REJECT is incremented by six
3382 for each ? and two for each non-preferred class. */
3383 losers
= losers
* 6 + reject
;
3385 /* If this alternative can be made to work by reloading,
3386 and it needs less reloading than the others checked so far,
3387 record it as the chosen goal for reloading. */
3388 if (! bad
&& best
> losers
)
3390 for (i
= 0; i
< noperands
; i
++)
3392 goal_alternative
[i
] = this_alternative
[i
];
3393 goal_alternative_win
[i
] = this_alternative_win
[i
];
3394 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3395 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3396 goal_alternative_earlyclobber
[i
]
3397 = this_alternative_earlyclobber
[i
];
3399 goal_alternative_swapped
= swapped
;
3401 goal_alternative_number
= this_alternative_number
;
3402 goal_earlyclobber
= this_earlyclobber
;
3406 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3407 then we need to try each alternative twice,
3408 the second time matching those two operands
3409 as if we had exchanged them.
3410 To do this, really exchange them in operands.
3412 If we have just tried the alternatives the second time,
3413 return operands to normal and drop through. */
3415 if (commutative
>= 0)
3420 register enum reg_class tclass
;
3423 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3424 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3426 tclass
= preferred_class
[commutative
];
3427 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3428 preferred_class
[commutative
+ 1] = tclass
;
3430 t
= pref_or_nothing
[commutative
];
3431 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3432 pref_or_nothing
[commutative
+ 1] = t
;
3434 memcpy (constraints
, recog_data
.constraints
,
3435 noperands
* sizeof (char *));
3440 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3441 recog_data
.operand
[commutative
+ 1]
3442 = substed_operand
[commutative
+ 1];
3446 /* The operands don't meet the constraints.
3447 goal_alternative describes the alternative
3448 that we could reach by reloading the fewest operands.
3449 Reload so as to fit it. */
3451 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3453 /* No alternative works with reloads?? */
3454 if (insn_code_number
>= 0)
3455 fatal_insn ("Unable to generate reloads for:", insn
);
3456 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3457 /* Avoid further trouble with this insn. */
3458 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3463 /* Jump to `finish' from above if all operands are valid already.
3464 In that case, goal_alternative_win is all 1. */
3467 /* Right now, for any pair of operands I and J that are required to match,
3469 goal_alternative_matches[J] is I.
3470 Set up goal_alternative_matched as the inverse function:
3471 goal_alternative_matched[I] = J. */
3473 for (i
= 0; i
< noperands
; i
++)
3474 goal_alternative_matched
[i
] = -1;
3476 for (i
= 0; i
< noperands
; i
++)
3477 if (! goal_alternative_win
[i
]
3478 && goal_alternative_matches
[i
] >= 0)
3479 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3481 /* If the best alternative is with operands 1 and 2 swapped,
3482 consider them swapped before reporting the reloads. Update the
3483 operand numbers of any reloads already pushed. */
3485 if (goal_alternative_swapped
)
3489 tem
= substed_operand
[commutative
];
3490 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3491 substed_operand
[commutative
+ 1] = tem
;
3492 tem
= recog_data
.operand
[commutative
];
3493 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3494 recog_data
.operand
[commutative
+ 1] = tem
;
3495 tem
= *recog_data
.operand_loc
[commutative
];
3496 *recog_data
.operand_loc
[commutative
]
3497 = *recog_data
.operand_loc
[commutative
+ 1];
3498 *recog_data
.operand_loc
[commutative
+1] = tem
;
3500 for (i
= 0; i
< n_reloads
; i
++)
3502 if (rld
[i
].opnum
== commutative
)
3503 rld
[i
].opnum
= commutative
+ 1;
3504 else if (rld
[i
].opnum
== commutative
+ 1)
3505 rld
[i
].opnum
= commutative
;
3509 for (i
= 0; i
< noperands
; i
++)
3511 operand_reloadnum
[i
] = -1;
3513 /* If this is an earlyclobber operand, we need to widen the scope.
3514 The reload must remain valid from the start of the insn being
3515 reloaded until after the operand is stored into its destination.
3516 We approximate this with RELOAD_OTHER even though we know that we
3517 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3519 One special case that is worth checking is when we have an
3520 output that is earlyclobber but isn't used past the insn (typically
3521 a SCRATCH). In this case, we only need have the reload live
3522 through the insn itself, but not for any of our input or output
3524 But we must not accidentally narrow the scope of an existing
3525 RELOAD_OTHER reload - leave these alone.
3527 In any case, anything needed to address this operand can remain
3528 however they were previously categorized. */
3530 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3532 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3533 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3536 /* Any constants that aren't allowed and can't be reloaded
3537 into registers are here changed into memory references. */
3538 for (i
= 0; i
< noperands
; i
++)
3539 if (! goal_alternative_win
[i
]
3540 && CONSTANT_P (recog_data
.operand
[i
])
3541 /* force_const_mem does not accept HIGH. */
3542 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3543 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3544 (enum reg_class
) goal_alternative
[i
])
3546 || no_input_reloads
)
3547 && operand_mode
[i
] != VOIDmode
)
3549 substed_operand
[i
] = recog_data
.operand
[i
]
3550 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3551 recog_data
.operand
[i
]),
3552 i
, address_type
[i
], ind_levels
, 0, insn
);
3553 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3554 goal_alternative_number
))
3555 goal_alternative_win
[i
] = 1;
3558 /* Record the values of the earlyclobber operands for the caller. */
3559 if (goal_earlyclobber
)
3560 for (i
= 0; i
< noperands
; i
++)
3561 if (goal_alternative_earlyclobber
[i
])
3562 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3564 /* Now record reloads for all the operands that need them. */
3565 for (i
= 0; i
< noperands
; i
++)
3566 if (! goal_alternative_win
[i
])
3568 /* Operands that match previous ones have already been handled. */
3569 if (goal_alternative_matches
[i
] >= 0)
3571 /* Handle an operand with a nonoffsettable address
3572 appearing where an offsettable address will do
3573 by reloading the address into a base register.
3575 ??? We can also do this when the operand is a register and
3576 reg_equiv_mem is not offsettable, but this is a bit tricky,
3577 so we don't bother with it. It may not be worth doing. */
3578 else if (goal_alternative_matched
[i
] == -1
3579 && goal_alternative_offmemok
[i
]
3580 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3582 operand_reloadnum
[i
]
3583 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3584 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3586 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3587 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3588 rld
[operand_reloadnum
[i
]].inc
3589 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3591 /* If this operand is an output, we will have made any
3592 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3593 now we are treating part of the operand as an input, so
3594 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3596 if (modified
[i
] == RELOAD_WRITE
)
3598 for (j
= 0; j
< n_reloads
; j
++)
3600 if (rld
[j
].opnum
== i
)
3602 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3603 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3604 else if (rld
[j
].when_needed
3605 == RELOAD_FOR_OUTADDR_ADDRESS
)
3606 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3611 else if (goal_alternative_matched
[i
] == -1)
3613 operand_reloadnum
[i
]
3614 = push_reload ((modified
[i
] != RELOAD_WRITE
3615 ? recog_data
.operand
[i
] : 0),
3616 (modified
[i
] != RELOAD_READ
3617 ? recog_data
.operand
[i
] : 0),
3618 (modified
[i
] != RELOAD_WRITE
3619 ? recog_data
.operand_loc
[i
] : 0),
3620 (modified
[i
] != RELOAD_READ
3621 ? recog_data
.operand_loc
[i
] : 0),
3622 (enum reg_class
) goal_alternative
[i
],
3623 (modified
[i
] == RELOAD_WRITE
3624 ? VOIDmode
: operand_mode
[i
]),
3625 (modified
[i
] == RELOAD_READ
3626 ? VOIDmode
: operand_mode
[i
]),
3627 (insn_code_number
< 0 ? 0
3628 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3629 0, i
, operand_type
[i
]);
3631 /* In a matching pair of operands, one must be input only
3632 and the other must be output only.
3633 Pass the input operand as IN and the other as OUT. */
3634 else if (modified
[i
] == RELOAD_READ
3635 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3637 operand_reloadnum
[i
]
3638 = push_reload (recog_data
.operand
[i
],
3639 recog_data
.operand
[goal_alternative_matched
[i
]],
3640 recog_data
.operand_loc
[i
],
3641 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3642 (enum reg_class
) goal_alternative
[i
],
3644 operand_mode
[goal_alternative_matched
[i
]],
3645 0, 0, i
, RELOAD_OTHER
);
3646 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3648 else if (modified
[i
] == RELOAD_WRITE
3649 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3651 operand_reloadnum
[goal_alternative_matched
[i
]]
3652 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3653 recog_data
.operand
[i
],
3654 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3655 recog_data
.operand_loc
[i
],
3656 (enum reg_class
) goal_alternative
[i
],
3657 operand_mode
[goal_alternative_matched
[i
]],
3659 0, 0, i
, RELOAD_OTHER
);
3660 operand_reloadnum
[i
] = output_reloadnum
;
3662 else if (insn_code_number
>= 0)
3666 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3667 /* Avoid further trouble with this insn. */
3668 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3673 else if (goal_alternative_matched
[i
] < 0
3674 && goal_alternative_matches
[i
] < 0
3677 /* For each non-matching operand that's a MEM or a pseudo-register
3678 that didn't get a hard register, make an optional reload.
3679 This may get done even if the insn needs no reloads otherwise. */
3681 rtx operand
= recog_data
.operand
[i
];
3683 while (GET_CODE (operand
) == SUBREG
)
3684 operand
= XEXP (operand
, 0);
3685 if ((GET_CODE (operand
) == MEM
3686 || (GET_CODE (operand
) == REG
3687 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3688 /* If this is only for an output, the optional reload would not
3689 actually cause us to use a register now, just note that
3690 something is stored here. */
3691 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3692 || modified
[i
] == RELOAD_WRITE
)
3693 && ! no_input_reloads
3694 /* An optional output reload might allow to delete INSN later.
3695 We mustn't make in-out reloads on insns that are not permitted
3697 If this is an asm, we can't delete it; we must not even call
3698 push_reload for an optional output reload in this case,
3699 because we can't be sure that the constraint allows a register,
3700 and push_reload verifies the constraints for asms. */
3701 && (modified
[i
] == RELOAD_READ
3702 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3703 operand_reloadnum
[i
]
3704 = push_reload ((modified
[i
] != RELOAD_WRITE
3705 ? recog_data
.operand
[i
] : 0),
3706 (modified
[i
] != RELOAD_READ
3707 ? recog_data
.operand
[i
] : 0),
3708 (modified
[i
] != RELOAD_WRITE
3709 ? recog_data
.operand_loc
[i
] : 0),
3710 (modified
[i
] != RELOAD_READ
3711 ? recog_data
.operand_loc
[i
] : 0),
3712 (enum reg_class
) goal_alternative
[i
],
3713 (modified
[i
] == RELOAD_WRITE
3714 ? VOIDmode
: operand_mode
[i
]),
3715 (modified
[i
] == RELOAD_READ
3716 ? VOIDmode
: operand_mode
[i
]),
3717 (insn_code_number
< 0 ? 0
3718 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3719 1, i
, operand_type
[i
]);
3720 /* If a memory reference remains (either as a MEM or a pseudo that
3721 did not get a hard register), yet we can't make an optional
3722 reload, check if this is actually a pseudo register reference;
3723 we then need to emit a USE and/or a CLOBBER so that reload
3724 inheritance will do the right thing. */
3726 && (GET_CODE (operand
) == MEM
3727 || (GET_CODE (operand
) == REG
3728 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3729 && reg_renumber
[REGNO (operand
)] < 0)))
3731 operand
= *recog_data
.operand_loc
[i
];
3733 while (GET_CODE (operand
) == SUBREG
)
3734 operand
= XEXP (operand
, 0);
3735 if (GET_CODE (operand
) == REG
)
3737 if (modified
[i
] != RELOAD_WRITE
)
3738 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3739 if (modified
[i
] != RELOAD_READ
)
3740 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3744 else if (goal_alternative_matches
[i
] >= 0
3745 && goal_alternative_win
[goal_alternative_matches
[i
]]
3746 && modified
[i
] == RELOAD_READ
3747 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3748 && ! no_input_reloads
&& ! no_output_reloads
3751 /* Similarly, make an optional reload for a pair of matching
3752 objects that are in MEM or a pseudo that didn't get a hard reg. */
3754 rtx operand
= recog_data
.operand
[i
];
3756 while (GET_CODE (operand
) == SUBREG
)
3757 operand
= XEXP (operand
, 0);
3758 if ((GET_CODE (operand
) == MEM
3759 || (GET_CODE (operand
) == REG
3760 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3761 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3763 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3764 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3765 recog_data
.operand
[i
],
3766 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3767 recog_data
.operand_loc
[i
],
3768 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3769 operand_mode
[goal_alternative_matches
[i
]],
3771 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3774 /* Perform whatever substitutions on the operands we are supposed
3775 to make due to commutativity or replacement of registers
3776 with equivalent constants or memory slots. */
3778 for (i
= 0; i
< noperands
; i
++)
3780 /* We only do this on the last pass through reload, because it is
3781 possible for some data (like reg_equiv_address) to be changed during
3782 later passes. Moreover, we loose the opportunity to get a useful
3783 reload_{in,out}_reg when we do these replacements. */
3787 rtx substitution
= substed_operand
[i
];
3789 *recog_data
.operand_loc
[i
] = substitution
;
3791 /* If we're replacing an operand with a LABEL_REF, we need
3792 to make sure that there's a REG_LABEL note attached to
3793 this instruction. */
3794 if (GET_CODE (insn
) != JUMP_INSN
3795 && GET_CODE (substitution
) == LABEL_REF
3796 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3797 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3798 XEXP (substitution
, 0),
3802 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3805 /* If this insn pattern contains any MATCH_DUP's, make sure that
3806 they will be substituted if the operands they match are substituted.
3807 Also do now any substitutions we already did on the operands.
3809 Don't do this if we aren't making replacements because we might be
3810 propagating things allocated by frame pointer elimination into places
3811 it doesn't expect. */
3813 if (insn_code_number
>= 0 && replace
)
3814 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3816 int opno
= recog_data
.dup_num
[i
];
3817 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3818 if (operand_reloadnum
[opno
] >= 0)
3819 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3820 insn_data
[insn_code_number
].operand
[opno
].mode
);
3824 /* This loses because reloading of prior insns can invalidate the equivalence
3825 (or at least find_equiv_reg isn't smart enough to find it any more),
3826 causing this insn to need more reload regs than it needed before.
3827 It may be too late to make the reload regs available.
3828 Now this optimization is done safely in choose_reload_regs. */
3830 /* For each reload of a reg into some other class of reg,
3831 search for an existing equivalent reg (same value now) in the right class.
3832 We can use it as long as we don't need to change its contents. */
3833 for (i
= 0; i
< n_reloads
; i
++)
3834 if (rld
[i
].reg_rtx
== 0
3836 && GET_CODE (rld
[i
].in
) == REG
3840 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3841 static_reload_reg_p
, 0, rld
[i
].inmode
);
3842 /* Prevent generation of insn to load the value
3843 because the one we found already has the value. */
3845 rld
[i
].in
= rld
[i
].reg_rtx
;
3849 /* Perhaps an output reload can be combined with another
3850 to reduce needs by one. */
3851 if (!goal_earlyclobber
)
3854 /* If we have a pair of reloads for parts of an address, they are reloading
3855 the same object, the operands themselves were not reloaded, and they
3856 are for two operands that are supposed to match, merge the reloads and
3857 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3859 for (i
= 0; i
< n_reloads
; i
++)
3863 for (j
= i
+ 1; j
< n_reloads
; j
++)
3864 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3865 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3866 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3867 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3868 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3869 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3870 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3871 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3872 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3873 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3874 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3875 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3876 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3877 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3878 || (goal_alternative_matches
[rld
[j
].opnum
]
3881 for (k
= 0; k
< n_replacements
; k
++)
3882 if (replacements
[k
].what
== j
)
3883 replacements
[k
].what
= i
;
3885 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3886 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3887 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3889 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3894 /* Scan all the reloads and update their type.
3895 If a reload is for the address of an operand and we didn't reload
3896 that operand, change the type. Similarly, change the operand number
3897 of a reload when two operands match. If a reload is optional, treat it
3898 as though the operand isn't reloaded.
3900 ??? This latter case is somewhat odd because if we do the optional
3901 reload, it means the object is hanging around. Thus we need only
3902 do the address reload if the optional reload was NOT done.
3904 Change secondary reloads to be the address type of their operand, not
3907 If an operand's reload is now RELOAD_OTHER, change any
3908 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3909 RELOAD_FOR_OTHER_ADDRESS. */
3911 for (i
= 0; i
< n_reloads
; i
++)
3913 if (rld
[i
].secondary_p
3914 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3915 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3917 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3918 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3919 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3920 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3921 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3922 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3924 /* If we have a secondary reload to go along with this reload,
3925 change its type to RELOAD_FOR_OPADDR_ADDR. */
3927 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3928 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3929 && rld
[i
].secondary_in_reload
!= -1)
3931 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3933 rld
[secondary_in_reload
].when_needed
3934 = RELOAD_FOR_OPADDR_ADDR
;
3936 /* If there's a tertiary reload we have to change it also. */
3937 if (secondary_in_reload
> 0
3938 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3939 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3940 = RELOAD_FOR_OPADDR_ADDR
;
3943 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3944 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3945 && rld
[i
].secondary_out_reload
!= -1)
3947 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3949 rld
[secondary_out_reload
].when_needed
3950 = RELOAD_FOR_OPADDR_ADDR
;
3952 /* If there's a tertiary reload we have to change it also. */
3953 if (secondary_out_reload
3954 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3955 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3956 = RELOAD_FOR_OPADDR_ADDR
;
3959 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3960 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3961 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3963 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3966 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3967 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3968 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3969 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3971 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3973 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3974 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3977 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3978 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3979 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3981 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3982 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3983 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3984 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3985 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3986 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3987 This is complicated by the fact that a single operand can have more
3988 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3989 choose_reload_regs without affecting code quality, and cases that
3990 actually fail are extremely rare, so it turns out to be better to fix
3991 the problem here by not generating cases that choose_reload_regs will
3993 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3994 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3996 We can reduce the register pressure by exploiting that a
3997 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
3998 does not conflict with any of them, if it is only used for the first of
3999 the RELOAD_FOR_X_ADDRESS reloads. */
4001 int first_op_addr_num
= -2;
4002 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4003 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4005 /* We use last_op_addr_reload and the contents of the above arrays
4006 first as flags - -2 means no instance encountered, -1 means exactly
4007 one instance encountered.
4008 If more than one instance has been encountered, we store the reload
4009 number of the first reload of the kind in question; reload numbers
4010 are known to be non-negative. */
4011 for (i
= 0; i
< noperands
; i
++)
4012 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4013 for (i
= n_reloads
- 1; i
>= 0; i
--)
4015 switch (rld
[i
].when_needed
)
4017 case RELOAD_FOR_OPERAND_ADDRESS
:
4018 if (++first_op_addr_num
>= 0)
4020 first_op_addr_num
= i
;
4024 case RELOAD_FOR_INPUT_ADDRESS
:
4025 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4027 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4031 case RELOAD_FOR_OUTPUT_ADDRESS
:
4032 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4034 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4045 for (i
= 0; i
< n_reloads
; i
++)
4048 enum reload_type type
;
4050 switch (rld
[i
].when_needed
)
4052 case RELOAD_FOR_OPADDR_ADDR
:
4053 first_num
= first_op_addr_num
;
4054 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4056 case RELOAD_FOR_INPADDR_ADDRESS
:
4057 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4058 type
= RELOAD_FOR_INPUT_ADDRESS
;
4060 case RELOAD_FOR_OUTADDR_ADDRESS
:
4061 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4062 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4069 else if (i
> first_num
)
4070 rld
[i
].when_needed
= type
;
4073 /* Check if the only TYPE reload that uses reload I is
4074 reload FIRST_NUM. */
4075 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4077 if (rld
[j
].when_needed
== type
4078 && (rld
[i
].secondary_p
4079 ? rld
[j
].secondary_in_reload
== i
4080 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4082 rld
[i
].when_needed
= type
;
4091 /* See if we have any reloads that are now allowed to be merged
4092 because we've changed when the reload is needed to
4093 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4094 check for the most common cases. */
4096 for (i
= 0; i
< n_reloads
; i
++)
4097 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4098 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4099 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4100 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4101 for (j
= 0; j
< n_reloads
; j
++)
4102 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4103 && rld
[j
].when_needed
== rld
[i
].when_needed
4104 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4105 && rld
[i
].class == rld
[j
].class
4106 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4107 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4109 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4110 transfer_replacements (i
, j
);
4115 /* If we made any reloads for addresses, see if they violate a
4116 "no input reloads" requirement for this insn. But loads that we
4117 do after the insn (such as for output addresses) are fine. */
4118 if (no_input_reloads
)
4119 for (i
= 0; i
< n_reloads
; i
++)
4121 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4122 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4126 /* Compute reload_mode and reload_nregs. */
4127 for (i
= 0; i
< n_reloads
; i
++)
4130 = (rld
[i
].inmode
== VOIDmode
4131 || (GET_MODE_SIZE (rld
[i
].outmode
)
4132 > GET_MODE_SIZE (rld
[i
].inmode
)))
4133 ? rld
[i
].outmode
: rld
[i
].inmode
;
4135 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4141 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4142 accepts a memory operand with constant address. */
4145 alternative_allows_memconst (constraint
, altnum
)
4146 const char *constraint
;
4150 /* Skip alternatives before the one requested. */
4153 while (*constraint
++ != ',');
4156 /* Scan the requested alternative for 'm' or 'o'.
4157 If one of them is present, this alternative accepts memory constants. */
4158 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4159 if (c
== 'm' || c
== 'o')
4164 /* Scan X for memory references and scan the addresses for reloading.
4165 Also checks for references to "constant" regs that we want to eliminate
4166 and replaces them with the values they stand for.
4167 We may alter X destructively if it contains a reference to such.
4168 If X is just a constant reg, we return the equivalent value
4171 IND_LEVELS says how many levels of indirect addressing this machine
4174 OPNUM and TYPE identify the purpose of the reload.
4176 IS_SET_DEST is true if X is the destination of a SET, which is not
4177 appropriate to be replaced by a constant.
4179 INSN, if nonzero, is the insn in which we do the reload. It is used
4180 to determine if we may generate output reloads, and where to put USEs
4181 for pseudos that we have to replace with stack slots. */
4184 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
)
4187 enum reload_type type
;
4192 register RTX_CODE code
= GET_CODE (x
);
4194 register const char *fmt
= GET_RTX_FORMAT (code
);
4200 /* This code is duplicated for speed in find_reloads. */
4201 register int regno
= REGNO (x
);
4202 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4203 x
= reg_equiv_constant
[regno
];
4205 /* This creates (subreg (mem...)) which would cause an unnecessary
4206 reload of the mem. */
4207 else if (reg_equiv_mem
[regno
] != 0)
4208 x
= reg_equiv_mem
[regno
];
4210 else if (reg_equiv_memory_loc
[regno
]
4211 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4213 rtx mem
= make_memloc (x
, regno
);
4214 if (reg_equiv_address
[regno
]
4215 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4217 /* If this is not a toplevel operand, find_reloads doesn't see
4218 this substitution. We have to emit a USE of the pseudo so
4219 that delete_output_reload can see it. */
4220 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4221 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4223 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4224 opnum
, type
, ind_levels
, insn
);
4232 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4233 opnum
, type
, ind_levels
, insn
);
4237 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4239 /* Check for SUBREG containing a REG that's equivalent to a constant.
4240 If the constant has a known value, truncate it right now.
4241 Similarly if we are extracting a single-word of a multi-word
4242 constant. If the constant is symbolic, allow it to be substituted
4243 normally. push_reload will strip the subreg later. If the
4244 constant is VOIDmode, abort because we will lose the mode of
4245 the register (this should never happen because one of the cases
4246 above should handle it). */
4248 register int regno
= REGNO (SUBREG_REG (x
));
4251 if (subreg_lowpart_p (x
)
4252 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4253 && reg_equiv_constant
[regno
] != 0
4254 && (tem
= gen_lowpart_common (GET_MODE (x
),
4255 reg_equiv_constant
[regno
])) != 0)
4258 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4259 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4260 && reg_equiv_constant
[regno
] != 0
4261 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4263 GET_MODE (SUBREG_REG (x
)))) != 0)
4265 /* TEM is now a word sized constant for the bits from X that
4266 we wanted. However, TEM may be the wrong representation.
4268 Use gen_lowpart_common to convert a CONST_INT into a
4269 CONST_DOUBLE and vice versa as needed according to by the mode
4271 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4277 /* If the SUBREG is wider than a word, the above test will fail.
4278 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4279 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4280 a 32 bit target. We still can - and have to - handle this
4281 for non-paradoxical subregs of CONST_INTs. */
4282 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4283 && reg_equiv_constant
[regno
] != 0
4284 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4285 && (GET_MODE_SIZE (GET_MODE (x
))
4286 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4288 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4289 if (WORDS_BIG_ENDIAN
)
4290 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4291 - GET_MODE_BITSIZE (GET_MODE (x
))
4293 /* Here we use the knowledge that CONST_INTs have a
4294 HOST_WIDE_INT field. */
4295 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4296 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4297 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4300 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4301 && reg_equiv_constant
[regno
] != 0
4302 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4305 /* If the subreg contains a reg that will be converted to a mem,
4306 convert the subreg to a narrower memref now.
4307 Otherwise, we would get (subreg (mem ...) ...),
4308 which would force reload of the mem.
4310 We also need to do this if there is an equivalent MEM that is
4311 not offsettable. In that case, alter_subreg would produce an
4312 invalid address on big-endian machines.
4314 For machines that extend byte loads, we must not reload using
4315 a wider mode if we have a paradoxical SUBREG. find_reloads will
4316 force a reload in that case. So we should not do anything here. */
4318 else if (regno
>= FIRST_PSEUDO_REGISTER
4319 #ifdef LOAD_EXTEND_OP
4320 && (GET_MODE_SIZE (GET_MODE (x
))
4321 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4323 && (reg_equiv_address
[regno
] != 0
4324 || (reg_equiv_mem
[regno
] != 0
4325 && (! strict_memory_address_p (GET_MODE (x
),
4326 XEXP (reg_equiv_mem
[regno
], 0))
4327 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4328 || num_not_at_initial_offset
))))
4329 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4333 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4337 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4338 ind_levels
, is_set_dest
, insn
);
4339 /* If we have replaced a reg with it's equivalent memory loc -
4340 that can still be handled here e.g. if it's in a paradoxical
4341 subreg - we must make the change in a copy, rather than using
4342 a destructive change. This way, find_reloads can still elect
4343 not to do the change. */
4344 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4346 x
= shallow_copy_rtx (x
);
4349 XEXP (x
, i
) = new_part
;
4355 /* Return a mem ref for the memory equivalent of reg REGNO.
4356 This mem ref is not shared with anything. */
4359 make_memloc (ad
, regno
)
4363 /* We must rerun eliminate_regs, in case the elimination
4364 offsets have changed. */
4366 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4368 /* If TEM might contain a pseudo, we must copy it to avoid
4369 modifying it when we do the substitution for the reload. */
4370 if (rtx_varies_p (tem
))
4371 tem
= copy_rtx (tem
);
4373 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4374 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4378 /* Record all reloads needed for handling memory address AD
4379 which appears in *LOC in a memory reference to mode MODE
4380 which itself is found in location *MEMREFLOC.
4381 Note that we take shortcuts assuming that no multi-reg machine mode
4382 occurs as part of an address.
4384 OPNUM and TYPE specify the purpose of this reload.
4386 IND_LEVELS says how many levels of indirect addressing this machine
4389 INSN, if nonzero, is the insn in which we do the reload. It is used
4390 to determine if we may generate output reloads, and where to put USEs
4391 for pseudos that we have to replace with stack slots.
4393 Value is nonzero if this address is reloaded or replaced as a whole.
4394 This is interesting to the caller if the address is an autoincrement.
4396 Note that there is no verification that the address will be valid after
4397 this routine does its work. Instead, we rely on the fact that the address
4398 was valid when reload started. So we need only undo things that reload
4399 could have broken. These are wrong register types, pseudos not allocated
4400 to a hard register, and frame pointer elimination. */
4403 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4404 enum machine_mode mode
;
4409 enum reload_type type
;
4414 int removed_and
= 0;
4417 /* If the address is a register, see if it is a legitimate address and
4418 reload if not. We first handle the cases where we need not reload
4419 or where we must reload in a non-standard way. */
4421 if (GET_CODE (ad
) == REG
)
4425 if (reg_equiv_constant
[regno
] != 0
4426 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4428 *loc
= ad
= reg_equiv_constant
[regno
];
4432 tem
= reg_equiv_memory_loc
[regno
];
4435 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4437 tem
= make_memloc (ad
, regno
);
4438 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4440 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4441 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4444 /* We can avoid a reload if the register's equivalent memory
4445 expression is valid as an indirect memory address.
4446 But not all addresses are valid in a mem used as an indirect
4447 address: only reg or reg+constant. */
4450 && strict_memory_address_p (mode
, tem
)
4451 && (GET_CODE (XEXP (tem
, 0)) == REG
4452 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4453 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4454 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4456 /* TEM is not the same as what we'll be replacing the
4457 pseudo with after reload, put a USE in front of INSN
4458 in the final reload pass. */
4460 && num_not_at_initial_offset
4461 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4464 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4465 /* This doesn't really count as replacing the address
4466 as a whole, since it is still a memory access. */
4474 /* The only remaining case where we can avoid a reload is if this is a
4475 hard register that is valid as a base register and which is not the
4476 subject of a CLOBBER in this insn. */
4478 else if (regno
< FIRST_PSEUDO_REGISTER
4479 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4480 && ! regno_clobbered_p (regno
, this_insn
))
4483 /* If we do not have one of the cases above, we must do the reload. */
4484 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4485 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4489 if (strict_memory_address_p (mode
, ad
))
4491 /* The address appears valid, so reloads are not needed.
4492 But the address may contain an eliminable register.
4493 This can happen because a machine with indirect addressing
4494 may consider a pseudo register by itself a valid address even when
4495 it has failed to get a hard reg.
4496 So do a tree-walk to find and eliminate all such regs. */
4498 /* But first quickly dispose of a common case. */
4499 if (GET_CODE (ad
) == PLUS
4500 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4501 && GET_CODE (XEXP (ad
, 0)) == REG
4502 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4505 subst_reg_equivs_changed
= 0;
4506 *loc
= subst_reg_equivs (ad
, insn
);
4508 if (! subst_reg_equivs_changed
)
4511 /* Check result for validity after substitution. */
4512 if (strict_memory_address_p (mode
, ad
))
4516 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4521 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4526 *memrefloc
= copy_rtx (*memrefloc
);
4527 XEXP (*memrefloc
, 0) = ad
;
4528 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4534 /* The address is not valid. We have to figure out why. First see if
4535 we have an outer AND and remove it if so. Then analyze what's inside. */
4537 if (GET_CODE (ad
) == AND
)
4540 loc
= &XEXP (ad
, 0);
4544 /* One possibility for why the address is invalid is that it is itself
4545 a MEM. This can happen when the frame pointer is being eliminated, a
4546 pseudo is not allocated to a hard register, and the offset between the
4547 frame and stack pointers is not its initial value. In that case the
4548 pseudo will have been replaced by a MEM referring to the
4550 if (GET_CODE (ad
) == MEM
)
4552 /* First ensure that the address in this MEM is valid. Then, unless
4553 indirect addresses are valid, reload the MEM into a register. */
4555 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4556 opnum
, ADDR_TYPE (type
),
4557 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4559 /* If tem was changed, then we must create a new memory reference to
4560 hold it and store it back into memrefloc. */
4561 if (tem
!= ad
&& memrefloc
)
4563 *memrefloc
= copy_rtx (*memrefloc
);
4564 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4565 loc
= &XEXP (*memrefloc
, 0);
4567 loc
= &XEXP (*loc
, 0);
4570 /* Check similar cases as for indirect addresses as above except
4571 that we can allow pseudos and a MEM since they should have been
4572 taken care of above. */
4575 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4576 || GET_CODE (XEXP (tem
, 0)) == MEM
4577 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4578 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4579 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4580 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4582 /* Must use TEM here, not AD, since it is the one that will
4583 have any subexpressions reloaded, if needed. */
4584 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4585 BASE_REG_CLASS
, GET_MODE (tem
),
4588 return ! removed_and
;
4594 /* If we have address of a stack slot but it's not valid because the
4595 displacement is too large, compute the sum in a register.
4596 Handle all base registers here, not just fp/ap/sp, because on some
4597 targets (namely SH) we can also get too large displacements from
4598 big-endian corrections. */
4599 else if (GET_CODE (ad
) == PLUS
4600 && GET_CODE (XEXP (ad
, 0)) == REG
4601 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4602 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4603 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4605 /* Unshare the MEM rtx so we can safely alter it. */
4608 *memrefloc
= copy_rtx (*memrefloc
);
4609 loc
= &XEXP (*memrefloc
, 0);
4611 loc
= &XEXP (*loc
, 0);
4614 if (double_reg_address_ok
)
4616 /* Unshare the sum as well. */
4617 *loc
= ad
= copy_rtx (ad
);
4619 /* Reload the displacement into an index reg.
4620 We assume the frame pointer or arg pointer is a base reg. */
4621 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4622 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4628 /* If the sum of two regs is not necessarily valid,
4629 reload the sum into a base reg.
4630 That will at least work. */
4631 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4632 Pmode
, opnum
, type
, ind_levels
);
4634 return ! removed_and
;
4637 /* If we have an indexed stack slot, there are three possible reasons why
4638 it might be invalid: The index might need to be reloaded, the address
4639 might have been made by frame pointer elimination and hence have a
4640 constant out of range, or both reasons might apply.
4642 We can easily check for an index needing reload, but even if that is the
4643 case, we might also have an invalid constant. To avoid making the
4644 conservative assumption and requiring two reloads, we see if this address
4645 is valid when not interpreted strictly. If it is, the only problem is
4646 that the index needs a reload and find_reloads_address_1 will take care
4649 If we decide to do something here, it must be that
4650 `double_reg_address_ok' is true and that this address rtl was made by
4651 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4652 rework the sum so that the reload register will be added to the index.
4653 This is safe because we know the address isn't shared.
4655 We check for fp/ap/sp as both the first and second operand of the
4658 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4659 && GET_CODE (XEXP (ad
, 0)) == PLUS
4660 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4661 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4662 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4664 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4665 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4667 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4668 && ! memory_address_p (mode
, ad
))
4670 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4671 plus_constant (XEXP (XEXP (ad
, 0), 0),
4672 INTVAL (XEXP (ad
, 1))),
4673 XEXP (XEXP (ad
, 0), 1));
4674 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4675 GET_MODE (ad
), opnum
, type
, ind_levels
);
4676 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4682 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4683 && GET_CODE (XEXP (ad
, 0)) == PLUS
4684 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4685 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4686 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4688 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4689 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4691 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4692 && ! memory_address_p (mode
, ad
))
4694 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4695 XEXP (XEXP (ad
, 0), 0),
4696 plus_constant (XEXP (XEXP (ad
, 0), 1),
4697 INTVAL (XEXP (ad
, 1))));
4698 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4699 GET_MODE (ad
), opnum
, type
, ind_levels
);
4700 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4706 /* See if address becomes valid when an eliminable register
4707 in a sum is replaced. */
4710 if (GET_CODE (ad
) == PLUS
)
4711 tem
= subst_indexed_address (ad
);
4712 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4714 /* Ok, we win that way. Replace any additional eliminable
4717 subst_reg_equivs_changed
= 0;
4718 tem
= subst_reg_equivs (tem
, insn
);
4720 /* Make sure that didn't make the address invalid again. */
4722 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4729 /* If constants aren't valid addresses, reload the constant address
4731 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4733 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4734 Unshare it so we can safely alter it. */
4735 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4736 && CONSTANT_POOL_ADDRESS_P (ad
))
4738 *memrefloc
= copy_rtx (*memrefloc
);
4739 loc
= &XEXP (*memrefloc
, 0);
4741 loc
= &XEXP (*loc
, 0);
4744 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4746 return ! removed_and
;
4749 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4753 /* Find all pseudo regs appearing in AD
4754 that are eliminable in favor of equivalent values
4755 and do not have hard regs; replace them by their equivalents.
4756 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4757 front of it for pseudos that we have to replace with stack slots. */
4760 subst_reg_equivs (ad
, insn
)
4764 register RTX_CODE code
= GET_CODE (ad
);
4766 register const char *fmt
;
4782 register int regno
= REGNO (ad
);
4784 if (reg_equiv_constant
[regno
] != 0)
4786 subst_reg_equivs_changed
= 1;
4787 return reg_equiv_constant
[regno
];
4789 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4791 rtx mem
= make_memloc (ad
, regno
);
4792 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4794 subst_reg_equivs_changed
= 1;
4795 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4803 /* Quickly dispose of a common case. */
4804 if (XEXP (ad
, 0) == frame_pointer_rtx
4805 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4813 fmt
= GET_RTX_FORMAT (code
);
4814 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4816 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4820 /* Compute the sum of X and Y, making canonicalizations assumed in an
4821 address, namely: sum constant integers, surround the sum of two
4822 constants with a CONST, put the constant as the second operand, and
4823 group the constant on the outermost sum.
4825 This routine assumes both inputs are already in canonical form. */
4832 enum machine_mode mode
= GET_MODE (x
);
4834 if (mode
== VOIDmode
)
4835 mode
= GET_MODE (y
);
4837 if (mode
== VOIDmode
)
4840 if (GET_CODE (x
) == CONST_INT
)
4841 return plus_constant (y
, INTVAL (x
));
4842 else if (GET_CODE (y
) == CONST_INT
)
4843 return plus_constant (x
, INTVAL (y
));
4844 else if (CONSTANT_P (x
))
4845 tem
= x
, x
= y
, y
= tem
;
4847 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4848 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4850 /* Note that if the operands of Y are specified in the opposite
4851 order in the recursive calls below, infinite recursion will occur. */
4852 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4853 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4855 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4856 constant will have been placed second. */
4857 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4859 if (GET_CODE (x
) == CONST
)
4861 if (GET_CODE (y
) == CONST
)
4864 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4867 return gen_rtx_PLUS (mode
, x
, y
);
4870 /* If ADDR is a sum containing a pseudo register that should be
4871 replaced with a constant (from reg_equiv_constant),
4872 return the result of doing so, and also apply the associative
4873 law so that the result is more likely to be a valid address.
4874 (But it is not guaranteed to be one.)
4876 Note that at most one register is replaced, even if more are
4877 replaceable. Also, we try to put the result into a canonical form
4878 so it is more likely to be a valid address.
4880 In all other cases, return ADDR. */
4883 subst_indexed_address (addr
)
4886 rtx op0
= 0, op1
= 0, op2
= 0;
4890 if (GET_CODE (addr
) == PLUS
)
4892 /* Try to find a register to replace. */
4893 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4894 if (GET_CODE (op0
) == REG
4895 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4896 && reg_renumber
[regno
] < 0
4897 && reg_equiv_constant
[regno
] != 0)
4898 op0
= reg_equiv_constant
[regno
];
4899 else if (GET_CODE (op1
) == REG
4900 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4901 && reg_renumber
[regno
] < 0
4902 && reg_equiv_constant
[regno
] != 0)
4903 op1
= reg_equiv_constant
[regno
];
4904 else if (GET_CODE (op0
) == PLUS
4905 && (tem
= subst_indexed_address (op0
)) != op0
)
4907 else if (GET_CODE (op1
) == PLUS
4908 && (tem
= subst_indexed_address (op1
)) != op1
)
4913 /* Pick out up to three things to add. */
4914 if (GET_CODE (op1
) == PLUS
)
4915 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4916 else if (GET_CODE (op0
) == PLUS
)
4917 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4919 /* Compute the sum. */
4921 op1
= form_sum (op1
, op2
);
4923 op0
= form_sum (op0
, op1
);
4930 /* Record the pseudo registers we must reload into hard registers in a
4931 subexpression of a would-be memory address, X referring to a value
4932 in mode MODE. (This function is not called if the address we find
4935 CONTEXT = 1 means we are considering regs as index regs,
4936 = 0 means we are considering them as base regs.
4938 OPNUM and TYPE specify the purpose of any reloads made.
4940 IND_LEVELS says how many levels of indirect addressing are
4941 supported at this point in the address.
4943 INSN, if nonzero, is the insn in which we do the reload. It is used
4944 to determine if we may generate output reloads.
4946 We return nonzero if X, as a whole, is reloaded or replaced. */
4948 /* Note that we take shortcuts assuming that no multi-reg machine mode
4949 occurs as part of an address.
4950 Also, this is not fully machine-customizable; it works for machines
4951 such as vaxes and 68000's and 32000's, but other possible machines
4952 could have addressing modes that this does not handle right. */
4955 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
4956 enum machine_mode mode
;
4961 enum reload_type type
;
4965 register RTX_CODE code
= GET_CODE (x
);
4971 register rtx orig_op0
= XEXP (x
, 0);
4972 register rtx orig_op1
= XEXP (x
, 1);
4973 register RTX_CODE code0
= GET_CODE (orig_op0
);
4974 register RTX_CODE code1
= GET_CODE (orig_op1
);
4975 register rtx op0
= orig_op0
;
4976 register rtx op1
= orig_op1
;
4978 if (GET_CODE (op0
) == SUBREG
)
4980 op0
= SUBREG_REG (op0
);
4981 code0
= GET_CODE (op0
);
4982 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
4983 op0
= gen_rtx_REG (word_mode
,
4984 REGNO (op0
) + SUBREG_WORD (orig_op0
));
4987 if (GET_CODE (op1
) == SUBREG
)
4989 op1
= SUBREG_REG (op1
);
4990 code1
= GET_CODE (op1
);
4991 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
4992 op1
= gen_rtx_REG (GET_MODE (op1
),
4993 REGNO (op1
) + SUBREG_WORD (orig_op1
));
4996 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4997 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4999 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5000 type
, ind_levels
, insn
);
5001 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5002 type
, ind_levels
, insn
);
5005 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5006 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5008 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5009 type
, ind_levels
, insn
);
5010 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5011 type
, ind_levels
, insn
);
5014 else if (code0
== CONST_INT
|| code0
== CONST
5015 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5016 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5017 type
, ind_levels
, insn
);
5019 else if (code1
== CONST_INT
|| code1
== CONST
5020 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5021 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5022 type
, ind_levels
, insn
);
5024 else if (code0
== REG
&& code1
== REG
)
5026 if (REG_OK_FOR_INDEX_P (op0
)
5027 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5029 else if (REG_OK_FOR_INDEX_P (op1
)
5030 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5032 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5033 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5034 type
, ind_levels
, insn
);
5035 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5036 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5037 type
, ind_levels
, insn
);
5038 else if (REG_OK_FOR_INDEX_P (op1
))
5039 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5040 type
, ind_levels
, insn
);
5041 else if (REG_OK_FOR_INDEX_P (op0
))
5042 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5043 type
, ind_levels
, insn
);
5046 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5047 type
, ind_levels
, insn
);
5048 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5049 type
, ind_levels
, insn
);
5053 else if (code0
== REG
)
5055 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5056 type
, ind_levels
, insn
);
5057 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5058 type
, ind_levels
, insn
);
5061 else if (code1
== REG
)
5063 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5064 type
, ind_levels
, insn
);
5065 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5066 type
, ind_levels
, insn
);
5076 if (GET_CODE (XEXP (x
, 0)) == REG
)
5078 register int regno
= REGNO (XEXP (x
, 0));
5082 /* A register that is incremented cannot be constant! */
5083 if (regno
>= FIRST_PSEUDO_REGISTER
5084 && reg_equiv_constant
[regno
] != 0)
5087 /* Handle a register that is equivalent to a memory location
5088 which cannot be addressed directly. */
5089 if (reg_equiv_memory_loc
[regno
] != 0
5090 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5092 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5093 if (reg_equiv_address
[regno
]
5094 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5096 /* First reload the memory location's address.
5097 We can't use ADDR_TYPE (type) here, because we need to
5098 write back the value after reading it, hence we actually
5099 need two registers. */
5100 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5101 &XEXP (tem
, 0), opnum
, type
,
5103 /* Put this inside a new increment-expression. */
5104 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5105 /* Proceed to reload that, as if it contained a register. */
5109 /* If we have a hard register that is ok as an index,
5110 don't make a reload. If an autoincrement of a nice register
5111 isn't "valid", it must be that no autoincrement is "valid".
5112 If that is true and something made an autoincrement anyway,
5113 this must be a special context where one is allowed.
5114 (For example, a "push" instruction.)
5115 We can't improve this address, so leave it alone. */
5117 /* Otherwise, reload the autoincrement into a suitable hard reg
5118 and record how much to increment by. */
5120 if (reg_renumber
[regno
] >= 0)
5121 regno
= reg_renumber
[regno
];
5122 if ((regno
>= FIRST_PSEUDO_REGISTER
5123 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5124 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5131 /* If we can output the register afterwards, do so, this
5132 saves the extra update.
5133 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5134 CALL_INSN - and it does not set CC0.
5135 But don't do this if we cannot directly address the
5136 memory location, since this will make it harder to
5137 reuse address reloads, and increases register pressure.
5138 Also don't do this if we can probably update x directly. */
5139 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5141 : reg_equiv_mem
[regno
]);
5142 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5143 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5144 && memory_operand (equiv
, GET_MODE (equiv
))
5146 && ! sets_cc0_p (PATTERN (insn
))
5148 && ! (icode
!= CODE_FOR_nothing
5149 && ((*insn_data
[icode
].operand
[0].predicate
)
5151 && ((*insn_data
[icode
].operand
[1].predicate
)
5157 = push_reload (x
, x
, loc
, loc
,
5158 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5159 GET_MODE (x
), GET_MODE (x
), 0, 0,
5160 opnum
, RELOAD_OTHER
);
5162 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5163 LOC above is part of the new MEM, not the MEM in INSN.
5165 We must also replace the address of the MEM in INSN. */
5166 if (&XEXP (x_orig
, 0) != loc
)
5167 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5173 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5174 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5175 GET_MODE (x
), GET_MODE (x
), 0, 0,
5178 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5184 /* Update the REG_INC notes. */
5186 for (link
= REG_NOTES (this_insn
);
5187 link
; link
= XEXP (link
, 1))
5188 if (REG_NOTE_KIND (link
) == REG_INC
5189 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5190 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5196 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5198 /* This is probably the result of a substitution, by eliminate_regs,
5199 of an equivalent address for a pseudo that was not allocated to a
5200 hard register. Verify that the specified address is valid and
5201 reload it into a register. */
5202 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5203 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5207 /* Since we know we are going to reload this item, don't decrement
5208 for the indirection level.
5210 Note that this is actually conservative: it would be slightly
5211 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5213 /* We can't use ADDR_TYPE (type) here, because we need to
5214 write back the value after reading it, hence we actually
5215 need two registers. */
5216 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5217 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5218 opnum
, type
, ind_levels
, insn
);
5220 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5221 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5222 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5224 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5226 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5228 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5235 /* This is probably the result of a substitution, by eliminate_regs, of
5236 an equivalent address for a pseudo that was not allocated to a hard
5237 register. Verify that the specified address is valid and reload it
5240 Since we know we are going to reload this item, don't decrement for
5241 the indirection level.
5243 Note that this is actually conservative: it would be slightly more
5244 efficient to use the value of SPILL_INDIRECT_LEVELS from
5247 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5248 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5249 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5250 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5251 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5256 register int regno
= REGNO (x
);
5258 if (reg_equiv_constant
[regno
] != 0)
5260 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5261 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5262 GET_MODE (x
), opnum
, type
, ind_levels
);
5266 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5267 that feeds this insn. */
5268 if (reg_equiv_mem
[regno
] != 0)
5270 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5271 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5272 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5277 if (reg_equiv_memory_loc
[regno
]
5278 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5280 rtx tem
= make_memloc (x
, regno
);
5281 if (reg_equiv_address
[regno
] != 0
5282 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5285 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5286 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5291 if (reg_renumber
[regno
] >= 0)
5292 regno
= reg_renumber
[regno
];
5294 if ((regno
>= FIRST_PSEUDO_REGISTER
5295 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5296 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5298 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5299 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5300 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5304 /* If a register appearing in an address is the subject of a CLOBBER
5305 in this insn, reload it into some other register to be safe.
5306 The CLOBBER is supposed to make the register unavailable
5307 from before this insn to after it. */
5308 if (regno_clobbered_p (regno
, this_insn
))
5310 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5311 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5312 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5319 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5321 /* If this is a SUBREG of a hard register and the resulting register
5322 is of the wrong class, reload the whole SUBREG. This avoids
5323 needless copies if SUBREG_REG is multi-word. */
5324 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5326 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5328 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5329 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5331 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5332 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5333 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5337 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5338 is larger than the class size, then reload the whole SUBREG. */
5341 enum reg_class
class = (context
? INDEX_REG_CLASS
5343 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5344 > reg_class_size
[class])
5346 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5348 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5349 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5361 register const char *fmt
= GET_RTX_FORMAT (code
);
5364 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5367 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5368 opnum
, type
, ind_levels
, insn
);
5375 /* X, which is found at *LOC, is a part of an address that needs to be
5376 reloaded into a register of class CLASS. If X is a constant, or if
5377 X is a PLUS that contains a constant, check that the constant is a
5378 legitimate operand and that we are supposed to be able to load
5379 it into the register.
5381 If not, force the constant into memory and reload the MEM instead.
5383 MODE is the mode to use, in case X is an integer constant.
5385 OPNUM and TYPE describe the purpose of any reloads made.
5387 IND_LEVELS says how many levels of indirect addressing this machine
5391 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5394 enum reg_class
class;
5395 enum machine_mode mode
;
5397 enum reload_type type
;
5401 && (! LEGITIMATE_CONSTANT_P (x
)
5402 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5406 /* If this is a CONST_INT, it could have been created by a
5407 plus_constant call in eliminate_regs, which means it may be
5408 on the reload_obstack. reload_obstack will be freed later, so
5409 we can't allow such RTL to be put in the constant pool. There
5410 is code in force_const_mem to check for this case, but it doesn't
5411 work because we have already popped off the reload_obstack, so
5412 rtl_obstack == saveable_obstack is true at this point. */
5413 if (GET_CODE (x
) == CONST_INT
)
5414 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5416 tem
= x
= force_const_mem (mode
, x
);
5418 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5419 opnum
, type
, ind_levels
, 0);
5422 else if (GET_CODE (x
) == PLUS
5423 && CONSTANT_P (XEXP (x
, 1))
5424 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5425 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5429 /* See comment above. */
5430 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5431 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5433 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5435 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5436 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5437 opnum
, type
, ind_levels
, 0);
5440 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5441 mode
, VOIDmode
, 0, 0, opnum
, type
);
5444 /* X, a subreg of a pseudo, is a part of an address that needs to be
5447 If the pseudo is equivalent to a memory location that cannot be directly
5448 addressed, make the necessary address reloads.
5450 If address reloads have been necessary, or if the address is changed
5451 by register elimination, return the rtx of the memory location;
5452 otherwise, return X.
5454 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5457 OPNUM and TYPE identify the purpose of the reload.
5459 IND_LEVELS says how many levels of indirect addressing are
5460 supported at this point in the address.
5462 INSN, if nonzero, is the insn in which we do the reload. It is used
5463 to determine where to put USEs for pseudos that we have to replace with
5467 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5472 enum reload_type type
;
5476 int regno
= REGNO (SUBREG_REG (x
));
5478 if (reg_equiv_memory_loc
[regno
])
5480 /* If the address is not directly addressable, or if the address is not
5481 offsettable, then it must be replaced. */
5483 && (reg_equiv_address
[regno
]
5484 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5487 if (force_replace
|| num_not_at_initial_offset
)
5489 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5491 /* If the address changes because of register elimination, then
5492 it must be replaced. */
5494 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5496 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5498 if (BYTES_BIG_ENDIAN
)
5502 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5503 offset
+= MIN (size
, UNITS_PER_WORD
);
5504 size
= GET_MODE_SIZE (GET_MODE (x
));
5505 offset
-= MIN (size
, UNITS_PER_WORD
);
5507 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5508 PUT_MODE (tem
, GET_MODE (x
));
5509 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5510 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5512 /* If this is not a toplevel operand, find_reloads doesn't see
5513 this substitution. We have to emit a USE of the pseudo so
5514 that delete_output_reload can see it. */
5515 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5516 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5524 /* Substitute into the current INSN the registers into which we have reloaded
5525 the things that need reloading. The array `replacements'
5526 says contains the locations of all pointers that must be changed
5527 and says what to replace them with.
5529 Return the rtx that X translates into; usually X, but modified. */
5536 for (i
= 0; i
< n_replacements
; i
++)
5538 register struct replacement
*r
= &replacements
[i
];
5539 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5542 /* Encapsulate RELOADREG so its machine mode matches what
5543 used to be there. Note that gen_lowpart_common will
5544 do the wrong thing if RELOADREG is multi-word. RELOADREG
5545 will always be a REG here. */
5546 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5547 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5549 /* If we are putting this into a SUBREG and RELOADREG is a
5550 SUBREG, we would be making nested SUBREGs, so we have to fix
5551 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5553 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5555 if (GET_MODE (*r
->subreg_loc
)
5556 == GET_MODE (SUBREG_REG (reloadreg
)))
5557 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5560 *r
->where
= SUBREG_REG (reloadreg
);
5561 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5565 *r
->where
= reloadreg
;
5567 /* If reload got no reg and isn't optional, something's wrong. */
5568 else if (! rld
[r
->what
].optional
)
5573 /* Make a copy of any replacements being done into X and move those copies
5574 to locations in Y, a copy of X. We only look at the highest level of
5578 copy_replacements (x
, y
)
5583 enum rtx_code code
= GET_CODE (x
);
5584 const char *fmt
= GET_RTX_FORMAT (code
);
5585 struct replacement
*r
;
5587 /* We can't support X being a SUBREG because we might then need to know its
5588 location if something inside it was replaced. */
5592 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5594 for (j
= 0; j
< n_replacements
; j
++)
5596 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5598 r
= &replacements
[n_replacements
++];
5599 r
->where
= replacements
[j
].where
;
5600 r
->subreg_loc
= &XEXP (y
, i
);
5601 r
->what
= replacements
[j
].what
;
5602 r
->mode
= replacements
[j
].mode
;
5604 else if (replacements
[j
].where
== &XEXP (x
, i
))
5606 r
= &replacements
[n_replacements
++];
5607 r
->where
= &XEXP (y
, i
);
5609 r
->what
= replacements
[j
].what
;
5610 r
->mode
= replacements
[j
].mode
;
5615 /* Change any replacements being done to *X to be done to *Y */
5618 move_replacements (x
, y
)
5624 for (i
= 0; i
< n_replacements
; i
++)
5625 if (replacements
[i
].subreg_loc
== x
)
5626 replacements
[i
].subreg_loc
= y
;
5627 else if (replacements
[i
].where
== x
)
5629 replacements
[i
].where
= y
;
5630 replacements
[i
].subreg_loc
= 0;
5634 /* If LOC was scheduled to be replaced by something, return the replacement.
5635 Otherwise, return *LOC. */
5638 find_replacement (loc
)
5641 struct replacement
*r
;
5643 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5645 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5647 if (reloadreg
&& r
->where
== loc
)
5649 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5650 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5654 else if (reloadreg
&& r
->subreg_loc
== loc
)
5656 /* RELOADREG must be either a REG or a SUBREG.
5658 ??? Is it actually still ever a SUBREG? If so, why? */
5660 if (GET_CODE (reloadreg
) == REG
)
5661 return gen_rtx_REG (GET_MODE (*loc
),
5662 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5663 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5666 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5667 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5671 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5672 what's inside and make a new rtl if so. */
5673 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5674 || GET_CODE (*loc
) == MULT
)
5676 rtx x
= find_replacement (&XEXP (*loc
, 0));
5677 rtx y
= find_replacement (&XEXP (*loc
, 1));
5679 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5680 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5686 /* Return nonzero if register in range [REGNO, ENDREGNO)
5687 appears either explicitly or implicitly in X
5688 other than being stored into (except for earlyclobber operands).
5690 References contained within the substructure at LOC do not count.
5691 LOC may be zero, meaning don't ignore anything.
5693 This is similar to refers_to_regno_p in rtlanal.c except that we
5694 look at equivalences for pseudos that didn't get hard registers. */
5697 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5698 unsigned int regno
, endregno
;
5711 code
= GET_CODE (x
);
5718 /* If this is a pseudo, a hard register must not have been allocated.
5719 X must therefore either be a constant or be in memory. */
5720 if (r
>= FIRST_PSEUDO_REGISTER
)
5722 if (reg_equiv_memory_loc
[r
])
5723 return refers_to_regno_for_reload_p (regno
, endregno
,
5724 reg_equiv_memory_loc
[r
],
5727 if (reg_equiv_constant
[r
])
5733 return (endregno
> r
5734 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5735 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5739 /* If this is a SUBREG of a hard reg, we can see exactly which
5740 registers are being modified. Otherwise, handle normally. */
5741 if (GET_CODE (SUBREG_REG (x
)) == REG
5742 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5744 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5745 unsigned int inner_endregno
5746 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5747 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5749 return endregno
> inner_regno
&& regno
< inner_endregno
;
5755 if (&SET_DEST (x
) != loc
5756 /* Note setting a SUBREG counts as referring to the REG it is in for
5757 a pseudo but not for hard registers since we can
5758 treat each word individually. */
5759 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5760 && loc
!= &SUBREG_REG (SET_DEST (x
))
5761 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5762 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5763 && refers_to_regno_for_reload_p (regno
, endregno
,
5764 SUBREG_REG (SET_DEST (x
)),
5766 /* If the output is an earlyclobber operand, this is
5768 || ((GET_CODE (SET_DEST (x
)) != REG
5769 || earlyclobber_operand_p (SET_DEST (x
)))
5770 && refers_to_regno_for_reload_p (regno
, endregno
,
5771 SET_DEST (x
), loc
))))
5774 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5783 /* X does not match, so try its subexpressions. */
5785 fmt
= GET_RTX_FORMAT (code
);
5786 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5788 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5796 if (refers_to_regno_for_reload_p (regno
, endregno
,
5800 else if (fmt
[i
] == 'E')
5803 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5804 if (loc
!= &XVECEXP (x
, i
, j
)
5805 && refers_to_regno_for_reload_p (regno
, endregno
,
5806 XVECEXP (x
, i
, j
), loc
))
5813 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5814 we check if any register number in X conflicts with the relevant register
5815 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5816 contains a MEM (we don't bother checking for memory addresses that can't
5817 conflict because we expect this to be a rare case.
5819 This function is similar to reg_overlap_mention_p in rtlanal.c except
5820 that we look at equivalences for pseudos that didn't get hard registers. */
5823 reg_overlap_mentioned_for_reload_p (x
, in
)
5826 int regno
, endregno
;
5828 /* Overly conservative. */
5829 if (GET_CODE (x
) == STRICT_LOW_PART
)
5832 /* If either argument is a constant, then modifying X can not affect IN. */
5833 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5835 else if (GET_CODE (x
) == SUBREG
)
5837 regno
= REGNO (SUBREG_REG (x
));
5838 if (regno
< FIRST_PSEUDO_REGISTER
)
5839 regno
+= SUBREG_WORD (x
);
5841 else if (GET_CODE (x
) == REG
)
5845 /* If this is a pseudo, it must not have been assigned a hard register.
5846 Therefore, it must either be in memory or be a constant. */
5848 if (regno
>= FIRST_PSEUDO_REGISTER
)
5850 if (reg_equiv_memory_loc
[regno
])
5851 return refers_to_mem_for_reload_p (in
);
5852 else if (reg_equiv_constant
[regno
])
5857 else if (GET_CODE (x
) == MEM
)
5858 return refers_to_mem_for_reload_p (in
);
5859 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5860 || GET_CODE (x
) == CC0
)
5861 return reg_mentioned_p (x
, in
);
5865 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5866 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5868 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5871 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5875 refers_to_mem_for_reload_p (x
)
5881 if (GET_CODE (x
) == MEM
)
5884 if (GET_CODE (x
) == REG
)
5885 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5886 && reg_equiv_memory_loc
[REGNO (x
)]);
5888 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5889 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5891 && (GET_CODE (XEXP (x
, i
)) == MEM
5892 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5898 /* Check the insns before INSN to see if there is a suitable register
5899 containing the same value as GOAL.
5900 If OTHER is -1, look for a register in class CLASS.
5901 Otherwise, just see if register number OTHER shares GOAL's value.
5903 Return an rtx for the register found, or zero if none is found.
5905 If RELOAD_REG_P is (short *)1,
5906 we reject any hard reg that appears in reload_reg_rtx
5907 because such a hard reg is also needed coming into this insn.
5909 If RELOAD_REG_P is any other nonzero value,
5910 it is a vector indexed by hard reg number
5911 and we reject any hard reg whose element in the vector is nonnegative
5912 as well as any that appears in reload_reg_rtx.
5914 If GOAL is zero, then GOALREG is a register number; we look
5915 for an equivalent for that register.
5917 MODE is the machine mode of the value we want an equivalence for.
5918 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5920 This function is used by jump.c as well as in the reload pass.
5922 If GOAL is the sum of the stack pointer and a constant, we treat it
5923 as if it were a constant except that sp is required to be unchanging. */
5926 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5929 enum reg_class
class;
5931 short *reload_reg_p
;
5933 enum machine_mode mode
;
5935 register rtx p
= insn
;
5936 rtx goaltry
, valtry
, value
, where
;
5938 register int regno
= -1;
5942 int goal_mem_addr_varies
= 0;
5943 int need_stable_sp
= 0;
5949 else if (GET_CODE (goal
) == REG
)
5950 regno
= REGNO (goal
);
5951 else if (GET_CODE (goal
) == MEM
)
5953 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5954 if (MEM_VOLATILE_P (goal
))
5956 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5958 /* An address with side effects must be reexecuted. */
5971 else if (CONSTANT_P (goal
))
5973 else if (GET_CODE (goal
) == PLUS
5974 && XEXP (goal
, 0) == stack_pointer_rtx
5975 && CONSTANT_P (XEXP (goal
, 1)))
5976 goal_const
= need_stable_sp
= 1;
5977 else if (GET_CODE (goal
) == PLUS
5978 && XEXP (goal
, 0) == frame_pointer_rtx
5979 && CONSTANT_P (XEXP (goal
, 1)))
5984 /* Scan insns back from INSN, looking for one that copies
5985 a value into or out of GOAL.
5986 Stop and give up if we reach a label. */
5991 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5994 if (GET_CODE (p
) == INSN
5995 /* If we don't want spill regs ... */
5996 && (! (reload_reg_p
!= 0
5997 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5998 /* ... then ignore insns introduced by reload; they aren't
5999 useful and can cause results in reload_as_needed to be
6000 different from what they were when calculating the need for
6001 spills. If we notice an input-reload insn here, we will
6002 reject it below, but it might hide a usable equivalent.
6003 That makes bad code. It may even abort: perhaps no reg was
6004 spilled for this insn because it was assumed we would find
6006 || INSN_UID (p
) < reload_first_uid
))
6009 pat
= single_set (p
);
6011 /* First check for something that sets some reg equal to GOAL. */
6014 && true_regnum (SET_SRC (pat
)) == regno
6015 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6018 && true_regnum (SET_DEST (pat
)) == regno
6019 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6021 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6022 /* When looking for stack pointer + const,
6023 make sure we don't use a stack adjust. */
6024 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6025 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6027 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6028 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6030 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6031 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6032 /* If we are looking for a constant,
6033 and something equivalent to that constant was copied
6034 into a reg, we can use that reg. */
6035 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6037 && rtx_equal_p (XEXP (tem
, 0), goal
)
6038 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6039 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6041 && GET_CODE (SET_DEST (pat
)) == REG
6042 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6043 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
6044 && GET_CODE (goal
) == CONST_INT
6045 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
6047 && rtx_equal_p (goal
, goaltry
)
6048 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
6050 && (valueno
= true_regnum (valtry
)) >= 0)
6051 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6053 && GET_CODE (SET_DEST (pat
)) == REG
6054 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6055 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
6056 && GET_CODE (goal
) == CONST_INT
6057 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6059 && rtx_equal_p (goal
, goaltry
)
6061 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6062 && (valueno
= true_regnum (valtry
)) >= 0)))
6065 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6066 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6076 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6077 (or copying VALUE into GOAL, if GOAL is also a register).
6078 Now verify that VALUE is really valid. */
6080 /* VALUENO is the register number of VALUE; a hard register. */
6082 /* Don't try to re-use something that is killed in this insn. We want
6083 to be able to trust REG_UNUSED notes. */
6084 if (find_reg_note (where
, REG_UNUSED
, value
))
6087 /* If we propose to get the value from the stack pointer or if GOAL is
6088 a MEM based on the stack pointer, we need a stable SP. */
6089 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6090 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6094 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6095 if (GET_MODE (value
) != mode
)
6098 /* Reject VALUE if it was loaded from GOAL
6099 and is also a register that appears in the address of GOAL. */
6101 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6102 && refers_to_regno_for_reload_p (valueno
,
6104 + HARD_REGNO_NREGS (valueno
, mode
)),
6108 /* Reject registers that overlap GOAL. */
6110 if (!goal_mem
&& !goal_const
6111 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6112 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6115 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6116 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6118 /* Reject VALUE if it is one of the regs reserved for reloads.
6119 Reload1 knows how to reuse them anyway, and it would get
6120 confused if we allocated one without its knowledge.
6121 (Now that insns introduced by reload are ignored above,
6122 this case shouldn't happen, but I'm not positive.) */
6124 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6127 for (i
= 0; i
< valuenregs
; ++i
)
6128 if (reload_reg_p
[valueno
+ i
] >= 0)
6132 /* Reject VALUE if it is a register being used for an input reload
6133 even if it is not one of those reserved. */
6135 if (reload_reg_p
!= 0)
6138 for (i
= 0; i
< n_reloads
; i
++)
6139 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6141 int regno1
= REGNO (rld
[i
].reg_rtx
);
6142 int nregs1
= HARD_REGNO_NREGS (regno1
,
6143 GET_MODE (rld
[i
].reg_rtx
));
6144 if (regno1
< valueno
+ valuenregs
6145 && regno1
+ nregs1
> valueno
)
6151 /* We must treat frame pointer as varying here,
6152 since it can vary--in a nonlocal goto as generated by expand_goto. */
6153 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6155 /* Now verify that the values of GOAL and VALUE remain unaltered
6156 until INSN is reached. */
6165 /* Don't trust the conversion past a function call
6166 if either of the two is in a call-clobbered register, or memory. */
6167 if (GET_CODE (p
) == CALL_INSN
)
6171 if (goal_mem
|| need_stable_sp
)
6174 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6175 for (i
= 0; i
< nregs
; ++i
)
6176 if (call_used_regs
[regno
+ i
])
6179 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6180 for (i
= 0; i
< valuenregs
; ++i
)
6181 if (call_used_regs
[valueno
+ i
])
6185 #ifdef NON_SAVING_SETJMP
6186 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6187 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6191 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6195 /* Watch out for unspec_volatile, and volatile asms. */
6196 if (volatile_insn_p (pat
))
6199 /* If this insn P stores in either GOAL or VALUE, return 0.
6200 If GOAL is a memory ref and this insn writes memory, return 0.
6201 If GOAL is a memory ref and its address is not constant,
6202 and this insn P changes a register used in GOAL, return 0. */
6204 if (GET_CODE (pat
) == COND_EXEC
)
6205 pat
= COND_EXEC_CODE (pat
);
6206 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6208 register rtx dest
= SET_DEST (pat
);
6209 while (GET_CODE (dest
) == SUBREG
6210 || GET_CODE (dest
) == ZERO_EXTRACT
6211 || GET_CODE (dest
) == SIGN_EXTRACT
6212 || GET_CODE (dest
) == STRICT_LOW_PART
)
6213 dest
= XEXP (dest
, 0);
6214 if (GET_CODE (dest
) == REG
)
6216 register int xregno
= REGNO (dest
);
6218 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6219 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6222 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6224 if (xregno
< valueno
+ valuenregs
6225 && xregno
+ xnregs
> valueno
)
6227 if (goal_mem_addr_varies
6228 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6230 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6233 else if (goal_mem
&& GET_CODE (dest
) == MEM
6234 && ! push_operand (dest
, GET_MODE (dest
)))
6236 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6237 && reg_equiv_memory_loc
[regno
] != 0)
6239 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6242 else if (GET_CODE (pat
) == PARALLEL
)
6245 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6247 register rtx v1
= XVECEXP (pat
, 0, i
);
6248 if (GET_CODE (v1
) == COND_EXEC
)
6249 v1
= COND_EXEC_CODE (v1
);
6250 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6252 register rtx dest
= SET_DEST (v1
);
6253 while (GET_CODE (dest
) == SUBREG
6254 || GET_CODE (dest
) == ZERO_EXTRACT
6255 || GET_CODE (dest
) == SIGN_EXTRACT
6256 || GET_CODE (dest
) == STRICT_LOW_PART
)
6257 dest
= XEXP (dest
, 0);
6258 if (GET_CODE (dest
) == REG
)
6260 register int xregno
= REGNO (dest
);
6262 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6263 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6266 if (xregno
< regno
+ nregs
6267 && xregno
+ xnregs
> regno
)
6269 if (xregno
< valueno
+ valuenregs
6270 && xregno
+ xnregs
> valueno
)
6272 if (goal_mem_addr_varies
6273 && reg_overlap_mentioned_for_reload_p (dest
,
6276 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6279 else if (goal_mem
&& GET_CODE (dest
) == MEM
6280 && ! push_operand (dest
, GET_MODE (dest
)))
6282 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6283 && reg_equiv_memory_loc
[regno
] != 0)
6285 else if (need_stable_sp
6286 && push_operand (dest
, GET_MODE (dest
)))
6292 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6296 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6297 link
= XEXP (link
, 1))
6299 pat
= XEXP (link
, 0);
6300 if (GET_CODE (pat
) == CLOBBER
)
6302 register rtx dest
= SET_DEST (pat
);
6303 while (GET_CODE (dest
) == SUBREG
6304 || GET_CODE (dest
) == ZERO_EXTRACT
6305 || GET_CODE (dest
) == SIGN_EXTRACT
6306 || GET_CODE (dest
) == STRICT_LOW_PART
)
6307 dest
= XEXP (dest
, 0);
6308 if (GET_CODE (dest
) == REG
)
6310 register int xregno
= REGNO (dest
);
6312 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6313 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6316 if (xregno
< regno
+ nregs
6317 && xregno
+ xnregs
> regno
)
6319 if (xregno
< valueno
+ valuenregs
6320 && xregno
+ xnregs
> valueno
)
6322 if (goal_mem_addr_varies
6323 && reg_overlap_mentioned_for_reload_p (dest
,
6327 else if (goal_mem
&& GET_CODE (dest
) == MEM
6328 && ! push_operand (dest
, GET_MODE (dest
)))
6330 else if (need_stable_sp
6331 && push_operand (dest
, GET_MODE (dest
)))
6338 /* If this insn auto-increments or auto-decrements
6339 either regno or valueno, return 0 now.
6340 If GOAL is a memory ref and its address is not constant,
6341 and this insn P increments a register used in GOAL, return 0. */
6345 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6346 if (REG_NOTE_KIND (link
) == REG_INC
6347 && GET_CODE (XEXP (link
, 0)) == REG
)
6349 register int incno
= REGNO (XEXP (link
, 0));
6350 if (incno
< regno
+ nregs
&& incno
>= regno
)
6352 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6354 if (goal_mem_addr_varies
6355 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6365 /* Find a place where INCED appears in an increment or decrement operator
6366 within X, and return the amount INCED is incremented or decremented by.
6367 The value is always positive. */
6370 find_inc_amount (x
, inced
)
6373 register enum rtx_code code
= GET_CODE (x
);
6374 register const char *fmt
;
6379 register rtx addr
= XEXP (x
, 0);
6380 if ((GET_CODE (addr
) == PRE_DEC
6381 || GET_CODE (addr
) == POST_DEC
6382 || GET_CODE (addr
) == PRE_INC
6383 || GET_CODE (addr
) == POST_INC
)
6384 && XEXP (addr
, 0) == inced
)
6385 return GET_MODE_SIZE (GET_MODE (x
));
6388 fmt
= GET_RTX_FORMAT (code
);
6389 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6393 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6400 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6402 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6412 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6415 regno_clobbered_p (regno
, insn
)
6419 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6420 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6421 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6423 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6425 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6429 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6430 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6431 && REGNO (XEXP (elt
, 0)) == regno
)
6439 static const char *reload_when_needed_name
[] =
6442 "RELOAD_FOR_OUTPUT",
6444 "RELOAD_FOR_INPUT_ADDRESS",
6445 "RELOAD_FOR_INPADDR_ADDRESS",
6446 "RELOAD_FOR_OUTPUT_ADDRESS",
6447 "RELOAD_FOR_OUTADDR_ADDRESS",
6448 "RELOAD_FOR_OPERAND_ADDRESS",
6449 "RELOAD_FOR_OPADDR_ADDR",
6451 "RELOAD_FOR_OTHER_ADDRESS"
6454 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6456 /* These functions are used to print the variables set by 'find_reloads' */
6459 debug_reload_to_stream (f
)
6467 for (r
= 0; r
< n_reloads
; r
++)
6469 fprintf (f
, "Reload %d: ", r
);
6473 fprintf (f
, "reload_in (%s) = ",
6474 GET_MODE_NAME (rld
[r
].inmode
));
6475 print_inline_rtx (f
, rld
[r
].in
, 24);
6476 fprintf (f
, "\n\t");
6479 if (rld
[r
].out
!= 0)
6481 fprintf (f
, "reload_out (%s) = ",
6482 GET_MODE_NAME (rld
[r
].outmode
));
6483 print_inline_rtx (f
, rld
[r
].out
, 24);
6484 fprintf (f
, "\n\t");
6487 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6489 fprintf (f
, "%s (opnum = %d)",
6490 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6493 if (rld
[r
].optional
)
6494 fprintf (f
, ", optional");
6496 if (rld
[r
].nongroup
)
6497 fprintf (stderr
, ", nongroup");
6499 if (rld
[r
].inc
!= 0)
6500 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6502 if (rld
[r
].nocombine
)
6503 fprintf (f
, ", can't combine");
6505 if (rld
[r
].secondary_p
)
6506 fprintf (f
, ", secondary_reload_p");
6508 if (rld
[r
].in_reg
!= 0)
6510 fprintf (f
, "\n\treload_in_reg: ");
6511 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6514 if (rld
[r
].out_reg
!= 0)
6516 fprintf (f
, "\n\treload_out_reg: ");
6517 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6520 if (rld
[r
].reg_rtx
!= 0)
6522 fprintf (f
, "\n\treload_reg_rtx: ");
6523 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6527 if (rld
[r
].secondary_in_reload
!= -1)
6529 fprintf (f
, "%ssecondary_in_reload = %d",
6530 prefix
, rld
[r
].secondary_in_reload
);
6534 if (rld
[r
].secondary_out_reload
!= -1)
6535 fprintf (f
, "%ssecondary_out_reload = %d\n",
6536 prefix
, rld
[r
].secondary_out_reload
);
6539 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6541 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6542 insn_data
[rld
[r
].secondary_in_icode
].name
);
6546 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6547 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6548 insn_data
[rld
[r
].secondary_out_icode
].name
);
6557 debug_reload_to_stream (stderr
);