| blob | 6b5fecdc91fed249db83069b113c34d508b15537 |
1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
3 1998, 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This is the jump-optimization pass of the compiler.
24 It is run two or three times: once before cse, sometimes once after cse,
25 and once after reload (before final).
27 jump_optimize deletes unreachable code and labels that are not used.
28 It also deletes jumps that jump to the following insn,
29 and simplifies jumps around unconditional jumps and jumps
30 to unconditional jumps.
32 Each CODE_LABEL has a count of the times it is used
33 stored in the LABEL_NUSES internal field, and each JUMP_INSN
34 has one label that it refers to stored in the
35 JUMP_LABEL internal field. With this we can detect labels that
36 become unused because of the deletion of all the jumps that
37 formerly used them. The JUMP_LABEL info is sometimes looked
38 at by later passes.
40 Optionally, cross-jumping can be done. Currently it is done
41 only the last time (when after reload and before final).
42 In fact, the code for cross-jumping now assumes that register
43 allocation has been done, since it uses `rtx_renumbered_equal_p'.
45 Jump optimization is done after cse when cse's constant-propagation
46 causes jumps to become unconditional or to be deleted.
48 Unreachable loops are not detected here, because the labels
49 have references and the insns appear reachable from the labels.
50 find_basic_blocks in flow.c finds and deletes such loops.
52 The subroutines delete_insn, redirect_jump, and invert_jump are used
53 from other passes as well. */
72 /* ??? Eventually must record somehow the labels used by jumps
73 from nested functions. */
74 /* Pre-record the next or previous real insn for each label?
75 No, this pass is very fast anyway. */
76 /* Condense consecutive labels?
77 This would make life analysis faster, maybe. */
78 /* Optimize jump y; x: ... y: jumpif... x?
79 Don't know if it is worth bothering with. */
80 /* Optimize two cases of conditional jump to conditional jump?
81 This can never delete any instruction or make anything dead,
82 or even change what is live at any point.
83 So perhaps let combiner do it. */
85 /* Vector indexed by uid.
86 For each CODE_LABEL, index by its uid to get first unconditional jump
87 that jumps to the label.
88 For each JUMP_INSN, index by its uid to get the next unconditional jump
89 that jumps to the same label.
90 Element 0 is the start of a chain of all return insns.
91 (It is safe to use element 0 because insn uid 0 is not used. */
95 /* Maximum index in jump_chain. */
99 /* Set nonzero by jump_optimize if control can fall through
100 to the end of the function. */
103 /* Indicates whether death notes are significant in cross jump analysis.
104 Normally they are not significant, because of A and B jump to C,
105 and R dies in A, it must die in B. But this might not be true after
106 stack register conversion, and we must compare death notes in that
107 case. */
129 #if ! defined(HAVE_cc0) && ! defined(HAVE_conditional_arithmetic)
131 #endif
134 \f
135 /* Main external entry point into the jump optimizer. See comments before
136 jump_optimize_1 for descriptions of the arguments. */
137 void
139 rtx f;
143 {
145 }
147 /* Alternate entry into the jump optimizer. This entry point only rebuilds
148 the JUMP_LABEL field in jumping insns and REG_LABEL notes in non-jumping
149 instructions. */
150 void
152 rtx f;
153 {
155 }
157 /* Alternate entry into the jump optimizer. Do only trivial optimizations. */
158 void
160 rtx f;
161 {
163 }
164 \f
165 /* Delete no-op jumps and optimize jumps to jumps
166 and jumps around jumps.
167 Delete unused labels and unreachable code.
169 If CROSS_JUMP is 1, detect matching code
170 before a jump and its destination and unify them.
171 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
173 If NOOP_MOVES is nonzero, delete no-op move insns.
175 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
176 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
178 If MARK_LABELS_ONLY is nonzero, then we only rebuild the jump chain
179 and JUMP_LABEL field for jumping insns.
181 If `optimize' is zero, don't change any code,
182 just determine whether control drops off the end of the function.
183 This case occurs when we have -W and not -O.
184 It works because `delete_insn' checks the value of `optimize'
185 and refrains from actually deleting when that is 0.
187 If MINIMAL is nonzero, then we only perform trivial optimizations:
189 * Removal of unreachable code after BARRIERs.
190 * Removal of unreferenced CODE_LABELs.
191 * Removal of a jump to the next instruction.
192 * Removal of a conditional jump followed by an unconditional jump
193 to the same target as the conditional jump.
194 * Simplify a conditional jump around an unconditional jump.
195 * Simplify a jump to a jump.
196 * Delete extraneous line number notes.
197 */
199 static void
202 rtx f;
208 {
214 rtx last_insn;
219 /* If we are performing cross jump optimizations, then initialize
220 tables mapping UIDs to EH regions to avoid incorrect movement
221 of insns from one EH region to another. */
228 /* Leave some extra room for labels and duplicate exit test insns
229 we make. */
235 /* Keep track of labels used from static data;
236 they cannot ever be deleted. */
243 /* Keep track of labels used for marking handlers for exception
244 regions; they cannot usually be deleted. */
249 /* Quit now if we just wanted to rebuild the JUMP_LABEL and REG_LABEL
250 notes and recompute LABEL_NUSES. */
262 /* If we haven't yet gotten to reload and we have just run regscan,
263 delete any insn that sets a register that isn't used elsewhere.
264 This helps some of the optimizations below by having less insns
265 being jumped around. */
269 {
277 /* We use regno_last_note_uid so as not to delete the setting
278 of a reg that's used in notes. A subsequent optimization
279 might arrange to use that reg for real. */
283 /* An ADDRESSOF expression can turn into a use of the internal arg
284 pointer, so do not delete the initialization of the internal
285 arg pointer yet. If it is truly dead, flow will delete the
286 initializing insn. */
289 }
291 /* Now iterate optimizing jumps until nothing changes over one pass. */
295 {
299 {
300 rtx reallabelprev;
302 rtx nlabel;
308 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
309 jump. Try to optimize by duplicating the loop exit test if so.
310 This is only safe immediately after regscan, because it uses
311 the values of regno_first_uid and regno_last_uid. */
316 {
319 {
323 }
324 }
333 /* Tension the labels in dispatch tables. */
340 /* See if this jump goes to another jump and redirect if so. */
348 /* If a dispatch table always goes to the same place,
349 get rid of it and replace the insn that uses it. */
353 {
359 rtx set;
370 /* Don't mess with a casesi insn.
371 XXX according to the comment before computed_jump_p(),
372 all casesi insns should be a parallel of the jump
373 and a USE of a LABEL_REF. */
377 {
381 }
382 }
384 /* If a jump references the end of the function, try to turn
385 it into a RETURN insn, possibly a conditional one. */
394 /* Detect jump to following insn. */
396 {
401 }
403 /* Detect a conditional jump going to the same place
404 as an immediately following unconditional jump. */
410 {
411 /* Don't mess up test coverage analysis. */
419 {
423 }
424 }
426 /* Detect a conditional jump jumping over an unconditional jump. */
429 && ! this_is_simplejump
435 {
436 /* When we invert the unconditional jump, we will be
437 decrementing the usage count of its old label.
438 Make sure that we don't delete it now because that
439 might cause the following code to be deleted. */
447 {
448 /* It is very likely that if there are USE insns before
449 this jump, they hold REG_DEAD notes. These REG_DEAD
450 notes are no longer valid due to this optimization,
451 and will cause the life-analysis that following passes
452 (notably delayed-branch scheduling) to think that
453 these registers are dead when they are not.
455 To prevent this trouble, we just remove the USE insns
456 from the insn chain. */
460 {
464 }
468 }
470 /* We can now safely delete the label if it is unreferenced
471 since the delete_insn above has deleted the BARRIER. */
476 }
478 /* If we have an unconditional jump preceded by a USE, try to put
479 the USE before the target and jump there. This simplifies many
480 of the optimizations below since we don't have to worry about
481 dealing with these USE insns. We only do this if the label
482 being branch to already has the identical USE or if code
483 never falls through to that label. */
493 /* Don't do this optimization if we have a loop containing
494 only the USE instruction, and the loop start label has
495 a usage count of 1. This is because we will redo this
496 optimization everytime through the outer loop, and jump
497 opt will never exit. */
501 {
503 {
506 }
513 }
515 /* Simplify if (...) x = a; else x = b; by converting it
516 to x = b; if (...) x = a;
517 if B is sufficiently simple, the test doesn't involve X,
518 and nothing in the test modifies B or X.
520 If we have small register classes, we also can't do this if X
521 is a hard register.
523 If the "x = b;" insn has any REG_NOTES, we don't do this because
524 of the possibility that we are running after CSE and there is a
525 REG_EQUAL note that is only valid if the branch has already been
526 taken. If we move the insn with the REG_EQUAL note, we may
527 fold the comparison to always be false in a later CSE pass.
528 (We could also delete the REG_NOTES when moving the insn, but it
529 seems simpler to not move it.) An exception is that we can move
530 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
531 value is the same as "b".
533 INSN is the branch over the `else' part.
535 We set:
537 TEMP to the jump insn preceding "x = a;"
538 TEMP1 to X
539 TEMP2 to the insn that sets "x = b;"
540 TEMP3 to the insn that sets "x = a;"
541 TEMP4 to the set of "x = b"; */
548 && (! SMALL_REGISTER_CLASSES
564 /* TEMP must skip over the "x = a;" insn */
567 /* There must be no other entries to the "x = b;" insn. */
569 /* INSN must either branch to the insn after TEMP2 or the insn
570 after TEMP2 must branch to the same place as INSN. */
575 {
576 /* The test expression, X, may be a complicated test with
577 multiple branches. See if we can find all the uses of
578 the label that TEMP branches to without hitting a CALL_INSN
579 or a jump to somewhere else. */
582 rtx p;
583 #ifdef HAVE_cc0
584 rtx q;
585 #endif
587 /* Set P to the first jump insn that goes around "x = a;". */
589 {
591 {
594 {
595 nuses--;
598 }
599 else
601 }
604 }
606 #ifdef HAVE_cc0
607 /* We cannot insert anything between a set of cc and its use
608 so if P uses cc0, we must back up to the previous insn. */
613 #endif
618 /* If we found all the uses and there was no data conflict, we
619 can move the assignment unless we can branch into the middle
620 from somewhere. */
627 /* Verify that registers used by the jump are not clobbered
628 by the instruction being moved. */
632 {
636 /* Set NEXT to an insn that we know won't go away. */
639 /* Delete the jump around the set. Note that we must do
640 this before we redirect the test jumps so that it won't
641 delete the code immediately following the assignment
642 we moved (which might be a jump). */
646 /* We either have two consecutive labels or a jump to
647 a jump, so adjust all the JUMP_INSNs to branch to where
648 INSN branches to. */
656 }
657 }
659 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
660 to x = a; if (...) goto l; x = b;
661 if A is sufficiently simple, the test doesn't involve X,
662 and nothing in the test modifies A or X.
664 If we have small register classes, we also can't do this if X
665 is a hard register.
667 If the "x = a;" insn has any REG_NOTES, we don't do this because
668 of the possibility that we are running after CSE and there is a
669 REG_EQUAL note that is only valid if the branch has already been
670 taken. If we move the insn with the REG_EQUAL note, we may
671 fold the comparison to always be false in a later CSE pass.
672 (We could also delete the REG_NOTES when moving the insn, but it
673 seems simpler to not move it.) An exception is that we can move
674 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
675 value is the same as "a".
677 INSN is the goto.
679 We set:
681 TEMP to the jump insn preceding "x = a;"
682 TEMP1 to X
683 TEMP2 to the insn that sets "x = b;"
684 TEMP3 to the insn that sets "x = a;"
685 TEMP4 to the set of "x = a"; */
692 && (! SMALL_REGISTER_CLASSES
708 /* TEMP must skip over the "x = a;" insn */
711 {
715 #ifdef HAVE_cc0
716 /* We cannot insert anything between a set of cc and its use. */
720 #endif
730 /* Verify that registers used by the jump are not clobbered
731 by the instruction being moved. */
736 {
741 /* Set NEXT to an insn that we know won't go away. */
744 }
749 }
751 #if !defined(HAVE_cc0) && !defined(HAVE_conditional_arithmetic)
753 /* If we have if (...) x = exp; and branches are expensive,
754 EXP is a single insn, does not have any side effects, cannot
755 trap, and is not too costly, convert this to
756 t = exp; if (...) x = t;
758 Don't do this when we have CC0 because it is unlikely to help
759 and we'd need to worry about where to place the new insn and
760 the potential for conflicts. We also can't do this when we have
761 notes on the insn for the same reason as above.
763 If we have conditional arithmetic, this will make this
764 harder to optimize later and isn't needed, so don't do it
765 in that case either.
767 We set:
769 TEMP to the "x = exp;" insn.
770 TEMP1 to the single set in the "x = exp;" insn.
771 TEMP2 to "x". */
785 && (! SMALL_REGISTER_CLASSES
793 {
798 {
806 {
809 }
810 }
811 }
813 /* Similarly, if it takes two insns to compute EXP but they
814 have the same destination. Here TEMP3 will be the second
815 insn and TEMP4 the SET from that insn. */
833 && (! SMALL_REGISTER_CLASSES
843 {
849 {
850 /* Use the earliest of temp5 and temp6. */
856 emit_insn_after_with_line_notes
864 {
867 }
868 }
869 }
871 /* Finally, handle the case where two insns are used to
872 compute EXP but a temporary register is used. Here we must
873 ensure that the temporary register is not used anywhere else. */
876 && after_regscan
904 && (! SMALL_REGISTER_CLASSES
910 {
916 {
917 /* Use the earliest of temp5 and temp6. */
930 {
933 }
934 }
935 }
938 #ifdef HAVE_conditional_arithmetic
939 /* ??? This is disabled in genconfig, as this simple-minded
940 transformation can incredibly lengthen register lifetimes.
942 Consider this example:
944 234 (set (pc)
945 (if_then_else (ne (reg:DI 149) (const_int 0 [0x0]))
946 (label_ref 248) (pc)))
947 237 (set (reg/i:DI 0 $0) (const_int 1 [0x1]))
948 239 (set (pc) (label_ref 2382))
949 248 (code_label ("yybackup"))
951 This will be transformed to:
953 237 (set (reg/i:DI 0 $0)
954 (if_then_else:DI (eq (reg:DI 149) (const_int 0 [0x0]))
955 (const_int 1 [0x1]) (reg/i:DI 0 $0)))
956 239 (set (pc)
957 (if_then_else (eq (reg:DI 149) (const_int 0 [0x0]))
958 (label_ref 2382) (pc)))
960 which, from this narrow viewpoint looks fine. Except that
961 between this and 3 other ocurrences of the same pattern, $0
962 is now live for basically the entire function, and we'll
963 get an abort in caller_save.
965 Any replacement for this code should recall that a set of
966 a register that is not live need not, and indeed should not,
967 be conditionalized. Either that, or delay the transformation
968 until after register allocation. */
970 /* See if this is a conditional jump around a small number of
971 instructions that we can conditionalize. Don't do this before
972 the initial CSE pass or after reload.
974 We reject any insns that have side effects or may trap.
975 Strictly speaking, this is not needed since the machine may
976 support conditionalizing these too, but we won't deal with that
977 now. Specifically, this means that we can't conditionalize a
978 CALL_INSN, which some machines, such as the ARC, can do, but
979 this is a very minor optimization. */
984 insn))
985 {
996 /* Scan forward BRANCH_COST real insns looking for the JUMP_LABEL
997 of this insn. We see if we think we can conditionalize the
998 insns we pass. For now, we only deal with insns that have
999 one SET. We stop after an insn that modifies anything in
1000 OURCOND, if we have too many insns, or if we have an insn
1001 with a side effect or that may trip. Note that we will
1002 be modifying any unconditional jumps we encounter to be
1003 conditional; this will have the effect of also doing this
1004 optimization on the "else" the next time around. */
1009 {
1010 /* Ignore everything but an active insn. */
1016 /* If this was an unconditional jump, record it since we'll
1017 need to remove the BARRIER if we succeed. We can only
1018 have one such jump since there must be a label after
1019 the BARRIER and it's either ours, in which case it's the
1020 only one or some other, in which case we'd fail.
1021 Likewise if it's a CALL_INSN followed by a BARRIER. */
1027 {
1030 else
1031 changed_jump
1033 }
1035 /* See if we are allowed another insn and if this insn
1036 if one we think we may be able to handle. */
1038 || last_insn
1046 gen_rtx_IF_THEN_ELSE
1051 else
1052 {
1053 /* This is a CALL_INSN that doesn't have a SET. */
1060 gen_rtx_IF_THEN_ELSE
1064 }
1069 }
1071 /* If we've reached our jump label, haven't failed, and all
1072 the changes above are valid, we can delete this jump
1073 insn. Also remove a BARRIER after any jump that used
1074 to be unconditional and remove any REG_EQUAL or REG_EQUIV
1075 that might have previously been present on insns we
1076 made conditional. */
1079 {
1090 {
1092 {
1095 }
1098 }
1103 }
1104 else
1105 {
1108 }
1109 }
1110 #endif
1111 /* If branches are expensive, convert
1112 if (foo) bar++; to bar += (foo != 0);
1113 and similarly for "bar--;"
1115 INSN is the conditional branch around the arithmetic. We set:
1117 TEMP is the arithmetic insn.
1118 TEMP1 is the SET doing the arithmetic.
1119 TEMP2 is the operand being incremented or decremented.
1120 TEMP3 to the condition being tested.
1121 TEMP4 to the earliest insn used to find the condition. */
1124 #ifdef HAVE_incscc
1125 || HAVE_incscc
1126 #endif
1127 #ifdef HAVE_decscc
1128 || HAVE_decscc
1129 #endif
1130 )
1131 && ! reload_completed
1143 /* INSN must either branch to the insn after TEMP or the insn
1144 after TEMP must branch to the same place as INSN. */
1150 /* We must be comparing objects whose modes imply the size.
1151 We could handle BLKmode if (1) emit_store_flag could
1152 and (2) we could find the size reliably. */
1155 {
1161 /* It must be the case that TEMP2 is not modified in the range
1162 [TEMP4, INSN). The one exception we make is if the insn
1163 before INSN sets TEMP2 to something which is also unchanged
1164 in that range. In that case, we can move the initialization
1165 into our sequence. */
1175 {
1179 }
1185 VOIDmode,
1189 /* If we can do the store-flag, do the addition or
1190 subtraction. */
1199 {
1200 /* Put the result back in temp2 in case it isn't already.
1201 Then replace the jump, possible a CC0-setting insn in
1202 front of the jump, and TEMP, with the sequence we have
1203 made. */
1218 #ifdef HAVE_cc0
1220 #endif
1224 {
1227 }
1231 }
1232 else
1234 }
1236 /* Try to use a conditional move (if the target has them), or a
1237 store-flag insn. If the target has conditional arithmetic as
1238 well as conditional move, the above code will have done something.
1239 Note that we prefer the above code since it is more general: the
1240 code below can make changes that require work to undo.
1242 The general case here is:
1244 1) x = a; if (...) x = b; and
1245 2) if (...) x = b;
1247 If the jump would be faster, the machine should not have defined
1248 the movcc or scc insns!. These cases are often made by the
1249 previous optimization.
1251 The second case is treated as x = x; if (...) x = b;.
1253 INSN here is the jump around the store. We set:
1255 TEMP to the "x op= b;" insn.
1256 TEMP1 to X.
1257 TEMP2 to B.
1258 TEMP3 to A (X in the second case).
1259 TEMP4 to the condition being tested.
1260 TEMP5 to the earliest insn used to find the condition.
1261 TEMP6 to the SET of TEMP. */
1264 ! reload_completed
1265 #ifdef HAVE_conditional_arithmetic
1266 /* Defer this until after CSE so the above code gets the
1267 first crack at it. */
1268 && cse_not_expected
1269 #endif
1271 /* Set TEMP to the "x = b;" insn. */
1276 && (! SMALL_REGISTER_CLASSES
1280 /* Allow either form, but prefer the former if both apply.
1281 There is no point in using the old value of TEMP1 if
1282 it is a register, since cse will alias them. It can
1283 lose if the old value were a hard register since CSE
1284 won't replace hard registers. Avoid using TEMP3 if
1285 small register classes and it is a hard register. */
1289 /* Make the latter case look like x = x; if (...) x = b; */
1291 /* INSN must either branch to the insn after TEMP or the insn
1292 after TEMP must branch to the same place as INSN. */
1298 /* We must be comparing objects whose modes imply the size.
1299 We could handle BLKmode if (1) emit_store_flag could
1300 and (2) we could find the size reliably. */
1302 /* Even if branches are cheap, the store_flag optimization
1303 can win when the operation to be performed can be
1304 expressed directly. */
1305 #ifdef HAVE_cc0
1306 /* If the previous insn sets CC0 and something else, we can't
1307 do this since we are going to delete that insn. */
1314 #endif
1315 )
1316 {
1317 #ifdef HAVE_conditional_move
1318 /* First try a conditional move. */
1319 {
1325 /* Copy the compared variables into cond0 and cond1, so that
1326 any side effects performed in or after the old comparison,
1327 will not affect our compare which will come later. */
1328 /* ??? Is it possible to just use the comparison in the jump
1329 insn? After all, we're going to delete it. We'd have
1330 to modify emit_conditional_move to take a comparison rtx
1331 instead or write a new function. */
1333 /* We want the target to be able to simplify comparisons with
1334 zero (and maybe other constants as well), so don't create
1335 pseudos for them. There's no need to either. */
1339 else
1345 else
1348 /* Careful about copying these values -- an IOR or what may
1349 need to do other things, like clobber flags. */
1350 /* ??? Assume for the moment that AVAL is ok. */
1355 /* We're dealing with a single_set insn with no side effects
1356 on SET_SRC. We do need to be reasonably certain that if
1357 we need to force BVAL into a register that we won't
1358 clobber the flags -- general_operand should suffice. */
1361 else
1362 {
1368 }
1377 {
1381 /* Save the conditional move sequence but don't emit it
1382 yet. On some machines, like the alpha, it is possible
1383 that temp5 == insn, so next generate the sequence that
1384 saves the compared values and then emit both
1385 sequences ensuring seq1 occurs before seq2. */
1389 /* "Now that we can't fail..." Famous last words.
1390 Generate the copy insns that preserve the compared
1391 values. */
1399 /* Validate the sequence -- this may be some weird
1400 bit-extract-and-test instruction for which there
1401 exists no complimentary bit-extract insn. */
1405 {
1408 }
1411 {
1414 /* Insert conditional move after insn, to be sure
1415 that the jump and a possible compare won't be
1416 separated. */
1419 /* ??? We can also delete the insn that sets X to A.
1420 Flow will do it too though. */
1426 {
1428 old_max_reg);
1430 }
1434 }
1435 }
1436 else
1438 }
1439 #endif
1441 /* That didn't work, try a store-flag insn.
1443 We further divide the cases into:
1445 1) x = a; if (...) x = b; and either A or B is zero,
1446 2) if (...) x = 0; and jumps are expensive,
1447 3) x = a; if (...) x = b; and A and B are constants where all
1448 the set bits in A are also set in B and jumps are expensive,
1449 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1450 more expensive, and
1451 5) if (...) x = b; if jumps are even more expensive. */
1454 /* We will be passing this as operand into expand_and. No
1455 good if it's not valid as an operand. */
1458 /* Make the latter case look like
1459 x = x; if (...) x = 0; */
1464 /* If B is zero, OK; if A is zero, can only do (1) if we
1465 can reverse the condition. See if (3) applies possibly
1466 by reversing the condition. Prefer reversing to (4) when
1467 branches are very expensive. */
1471 /* Check that the mask is a power of two,
1472 so that it can probably be generated
1473 with a shift. */
1490 insn)))))
1492 )
1493 {
1497 rtx target;
1499 /* If necessary, reverse the condition. */
1502 else
1505 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1506 is the constant 1, it is best to just compute the result
1507 directly. If UVAL is constant and STORE_FLAG_VALUE
1508 includes all of its bits, it is best to compute the flag
1509 value unnormalized and `and' it with UVAL. Otherwise,
1510 normalize to -1 and `and' with UVAL. */
1517 /* We will be putting the store-flag insn immediately in
1518 front of the comparison that was originally being done,
1519 so we know all the variables in TEMP4 will be valid.
1520 However, this might be in front of the assignment of
1521 A to VAR. If it is, it would clobber the store-flag
1522 we will be emitting.
1524 Therefore, emit into a temporary which will be copied to
1525 VAR immediately after TEMP. */
1530 VOIDmode,
1533 normalizep);
1535 {
1536 rtx seq;
1542 /* Put the store-flag insns in front of the first insn
1543 used to compute the condition to ensure that we
1544 use the same values of them as the current
1545 comparison. However, the remainder of the insns we
1546 generate will be placed directly in front of the
1547 jump insn, in case any of the pseudos we use
1548 are modified earlier. */
1554 /* Both CVAL and UVAL are non-zero. */
1556 {
1564 else
1565 {
1571 }
1573 /* If we usually make new pseudos, do so here. This
1574 turns out to help machines that have conditional
1575 move insns. */
1576 /* ??? Conditional moves have already been handled.
1577 This may be obsolete. */
1585 }
1587 {
1588 /* We know that either CVAL or UVAL is zero. If
1589 UVAL is zero, negate TARGET and `and' with CVAL.
1590 Otherwise, `and' with UVAL. */
1592 {
1596 }
1602 }
1607 #ifdef HAVE_cc0
1608 /* If INSN uses CC0, we must not separate it from the
1609 insn that sets cc0. */
1612 #endif
1620 {
1623 }
1627 }
1628 else
1630 }
1631 }
1634 /* Simplify if (...) x = 1; else {...} if (x) ...
1635 We recognize this case scanning backwards as well.
1637 TEMP is the assignment to x;
1638 TEMP1 is the label at the head of the second if. */
1639 /* ?? This should call get_condition to find the values being
1640 compared, instead of looking for a COMPARE insn when HAVE_cc0
1641 is not defined. This would allow it to work on the m88k. */
1642 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1643 is not defined and the condition is tested by a separate compare
1644 insn. This is because the code below assumes that the result
1645 of the compare dies in the following branch.
1647 Not only that, but there might be other insns between the
1648 compare and branch whose results are live. Those insns need
1649 to be executed.
1651 A way to fix this is to move the insns at JUMP_LABEL (insn)
1652 to before INSN. If we are running before flow, they will
1653 be deleted if they aren't needed. But this doesn't work
1654 well after flow.
1656 This is really a special-case of jump threading, anyway. The
1657 right thing to do is to replace this and jump threading with
1658 much simpler code in cse.
1660 This code has been turned off in the non-cc0 case in the
1661 meantime. */
1663 #ifdef HAVE_cc0
1665 /* Safe to skip USE and CLOBBER insns here
1666 since they will not be deleted. */
1674 /* If we find that the next value tested is `x'
1675 (TEMP1 is the insn where this happens), win. */
1678 #ifdef HAVE_cc0
1679 /* Does temp1 `tst' the value of x? */
1683 #else
1684 /* Does temp1 compare the value of x against zero? */
1691 #endif
1693 {
1694 /* Get the if_then_else from the condjump. */
1697 {
1700 rtx cond
1703 rtx ultimate;
1709 else
1719 }
1720 }
1721 #endif
1723 #if 0
1724 /* @@ This needs a bit of work before it will be right.
1726 Any type of comparison can be accepted for the first and
1727 second compare. When rewriting the first jump, we must
1728 compute the what conditions can reach label3, and use the
1729 appropriate code. We can not simply reverse/swap the code
1730 of the first jump. In some cases, the second jump must be
1731 rewritten also.
1733 For example,
1734 < == converts to > ==
1735 < != converts to == >
1736 etc.
1738 If the code is written to only accept an '==' test for the second
1739 compare, then all that needs to be done is to swap the condition
1740 of the first branch.
1742 It is questionable whether we want this optimization anyways,
1743 since if the user wrote code like this because he/she knew that
1744 the jump to label1 is taken most of the time, then rewriting
1745 this gives slower code. */
1746 /* @@ This should call get_condition to find the values being
1747 compared, instead of looking for a COMPARE insn when HAVE_cc0
1748 is not defined. This would allow it to work on the m88k. */
1749 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1750 is not defined and the condition is tested by a separate compare
1751 insn. This is because the code below assumes that the result
1752 of the compare dies in the following branch. */
1754 /* Simplify test a ~= b
1755 condjump label1;
1756 test a == b
1757 condjump label2;
1758 jump label3;
1759 label1:
1761 rewriting as
1762 test a ~~= b
1763 condjump label3
1764 test a == b
1765 condjump label2
1766 label1:
1768 where ~= is an inequality, e.g. >, and ~~= is the swapped
1769 inequality, e.g. <.
1771 We recognize this case scanning backwards.
1773 TEMP is the conditional jump to `label2';
1774 TEMP1 is the test for `a == b';
1775 TEMP2 is the conditional jump to `label1';
1776 TEMP3 is the test for `a ~= b'. */
1785 #ifdef HAVE_cc0
1787 #else
1791 #endif
1805 {
1810 {
1813 }
1817 }
1818 #endif
1819 /* Simplify if (...) {... x = 1;} if (x) ...
1821 We recognize this case backwards.
1823 TEMP is the test of `x';
1824 TEMP1 is the assignment to `x' at the end of the
1825 previous statement. */
1826 /* @@ This should call get_condition to find the values being
1827 compared, instead of looking for a COMPARE insn when HAVE_cc0
1828 is not defined. This would allow it to work on the m88k. */
1829 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1830 is not defined and the condition is tested by a separate compare
1831 insn. This is because the code below assumes that the result
1832 of the compare dies in the following branch. */
1834 /* ??? This has to be turned off. The problem is that the
1835 unconditional jump might indirectly end up branching to the
1836 label between TEMP1 and TEMP. We can't detect this, in general,
1837 since it may become a jump to there after further optimizations.
1838 If that jump is done, it will be deleted, so we will retry
1839 this optimization in the next pass, thus an infinite loop.
1841 The present code prevents this by putting the jump after the
1842 label, but this is not logically correct. */
1843 #if 0
1845 /* Safe to skip USE and CLOBBER insns here
1846 since they will not be deleted. */
1851 #ifdef HAVE_cc0
1854 #else
1855 /* Temp must be a compare insn, we can not accept a register
1856 to register move here, since it may not be simply a
1857 tst insn. */
1863 #endif
1864 /* May skip USE or CLOBBER insns here
1865 for checking for opportunity, since we
1866 take care of them later. */
1870 #ifdef HAVE_cc0
1872 #else
1875 #endif
1877 /* If this isn't true, cse will do the job. */
1879 {
1880 /* Get the if_then_else from the condjump. */
1885 {
1887 rtx last_insn;
1888 rtx ultimate;
1889 rtx p;
1891 /* Get the place that condjump will jump to
1892 if it is reached from here. */
1896 else
1898 /* Get it as a CODE_LABEL. */
1901 else
1902 /* Get the label out of the LABEL_REF. */
1905 /* Insert the jump immediately before TEMP, specifically
1906 after the label that is between TEMP1 and TEMP. */
1909 /* If we would be branching to the next insn, the jump
1910 would immediately be deleted and the re-inserted in
1911 a subsequent pass over the code. So don't do anything
1912 in that case. */
1915 {
1918 last_insn);
1923 {
1927 }
1930 }
1931 }
1932 }
1933 #endif
1934 #ifdef HAVE_trap
1935 /* Detect a conditional jump jumping over an unconditional trap. */
1946 {
1952 {
1958 }
1959 }
1960 /* Detect a jump jumping to an unconditional trap. */
1965 && (this_is_simplejump
1967 {
1972 {
1974 /* Replace an unconditional jump to a trap with a trap. */
1976 {
1981 }
1986 {
1991 }
1992 }
1993 /* If the trap condition and jump condition are mutually
1994 exclusive, redirect the jump to the following insn. */
1996 && ! this_is_simplejump
2001 {
2004 }
2005 }
2006 #endif
2007 else
2008 {
2009 /* Now that the jump has been tensioned,
2010 try cross jumping: check for identical code
2011 before the jump and before its target label. */
2013 /* First, cross jumping of conditional jumps: */
2016 {
2020 /* A conditional jump may be crossjumped
2021 only if the place it jumps to follows
2022 an opposing jump that comes back here. */
2025 /* We have no opposing jump;
2026 cannot cross jump this insn. */
2030 /* TARGET is nonzero if it is ok to cross jump
2031 to code before TARGET. If so, see if matches. */
2037 {
2039 /* Make the old conditional jump
2040 into an unconditional one. */
2045 /* Add to jump_chain unless this is a new label
2046 whose UID is too large. */
2048 {
2052 }
2055 }
2056 }
2058 /* Cross jumping of unconditional jumps:
2059 a few differences. */
2062 {
2064 rtx target;
2068 /* TARGET is nonzero if it is ok to cross jump
2069 to code before TARGET. If so, see if matches. */
2073 /* If cannot cross jump to code before the label,
2074 see if we can cross jump to another jump to
2075 the same label. */
2076 /* Try each other jump to this label. */
2083 /* Ignore TARGET if it's deleted. */
2089 {
2093 }
2094 }
2096 /* This code was dead in the previous jump.c! */
2098 {
2099 /* Return insns all "jump to the same place"
2100 so we can cross-jump between any two of them. */
2106 /* If cannot cross jump to code before the label,
2107 see if we can cross jump to another jump to
2108 the same label. */
2109 /* Try each other jump to this label. */
2120 {
2124 }
2125 }
2126 }
2127 }
2130 }
2132 /* Delete extraneous line number notes.
2133 Note that two consecutive notes for different lines are not really
2134 extraneous. There should be some indication where that line belonged,
2135 even if it became empty. */
2137 {
2142 {
2143 /* Delete this note if it is identical to previous note. */
2147 {
2150 }
2153 }
2154 }
2156 /* CAN_REACH_END is persistent for each function. Once set it should
2157 not be cleared. This is especially true for the case where we
2158 delete the NOTE_FUNCTION_END note. CAN_REACH_END is cleared by
2159 the front-end before compiling each function. */
2163 end:
2164 /* Clean up. */
2167 }
2168 \f
2169 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
2170 notes whose labels don't occur in the insn any more. Returns the
2171 largest INSN_UID found. */
2172 static int
2174 rtx f;
2175 {
2177 rtx insn;
2180 {
2186 {
2190 {
2195 }
2196 }
2199 }
2202 }
2204 /* Delete insns following barriers, up to next label.
2206 Also delete no-op jumps created by gcse. */
2208 static void
2210 rtx f;
2211 {
2212 rtx insn;
2215 {
2217 {
2223 {
2227 else
2229 }
2230 /* INSN is now the code_label. */
2231 }
2233 /* Also remove (set (pc) (pc)) insns which can be created by
2234 gcse. We eliminate such insns now to avoid having them
2235 cause problems later. */
2242 else
2244 }
2245 }
2247 /* Mark the label each jump jumps to.
2248 Combine consecutive labels, and count uses of labels.
2250 For each label, make a chain (using `jump_chain')
2251 of all the *unconditional* jumps that jump to it;
2252 also make a chain of all returns.
2254 CROSS_JUMP indicates whether we are doing cross jumping
2255 and if we are whether we will be paying attention to
2256 death notes or not. */
2258 static void
2260 rtx f;
2262 {
2263 rtx insn;
2267 {
2270 {
2275 }
2279 {
2281 {
2285 }
2287 {
2290 }
2291 }
2292 }
2293 }
2295 /* Delete all labels already not referenced.
2296 Also find and return the last insn. */
2298 static rtx
2300 rtx f;
2301 {
2303 rtx insn;
2306 {
2311 else
2312 {
2315 }
2316 }
2319 }
2321 /* Delete various simple forms of moves which have no necessary
2322 side effect. */
2324 static void
2326 rtx f;
2327 {
2331 {
2335 {
2338 /* Detect and delete no-op move instructions
2339 resulting from not allocating a parameter in a register. */
2352 /* Detect and ignore no-op move instructions
2353 resulting from smart or fortuitous register allocation. */
2356 {
2363 {
2364 rtx trial;
2371 {
2372 /* DREG may have been the target of a REG_DEAD note in
2373 the insn which makes INSN redundant. If so, reorg
2374 would still think it is dead. So search for such a
2375 note and delete it if we find it. */
2381 {
2384 }
2386 /* Deleting insn could lose a death-note for SREG. */
2388 {
2389 /* Change this into a USE so that we won't emit
2390 code for it, but still can keep the note. */
2394 /* Remove all reg notes but the REG_DEAD one. */
2397 }
2398 else
2400 }
2401 }
2406 {
2407 /* This handles the case where we have two consecutive
2408 assignments of the same constant to pseudos that didn't
2409 get a hard reg. Each SET from the constant will be
2410 converted into a SET of the spill register and an
2411 output reload will be made following it. This produces
2412 two loads of the same constant into the same spill
2413 register. */
2417 /* Look back for a death note for the first reg.
2418 If there is one, it is no longer accurate. */
2420 {
2424 {
2427 }
2429 }
2431 /* Delete the second load of the value. */
2433 }
2434 }
2436 {
2437 /* If each part is a set between two identical registers or
2438 a USE or CLOBBER, delete the insn. */
2440 rtx tem;
2443 {
2453 }
2457 }
2458 /* Also delete insns to store bit fields if they are no-ops. */
2459 /* Not worth the hair to detect this in the big-endian case. */
2468 }
2470 }
2471 }
2473 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2474 If so indicate that this function can drop off the end by returning
2475 1, else return 0.
2477 CHECK_DELETED indicates whether we must check if the note being
2478 searched for has the deleted flag set.
2480 DELETE_FINAL_NOTE indicates whether we should delete the note
2481 if we find it. */
2483 static int
2485 rtx last;
2487 {
2492 {
2495 /* One label can follow the end-note: the return label. */
2498 /* Ordinary insns can follow it if returning a structure. */
2501 /* If machine uses explicit RETURN insns, no epilogue,
2502 then one of them follows the note. */
2506 /* A barrier can follow the return insn. */
2509 /* Other kinds of notes can follow also. */
2518 }
2520 /* See if we backed up to the appropriate type of note. */
2524 {
2528 }
2531 }
2533 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2534 jump. Assume that this unconditional jump is to the exit test code. If
2535 the code is sufficiently simple, make a copy of it before INSN,
2536 followed by a jump to the exit of the loop. Then delete the unconditional
2537 jump after INSN.
2539 Return 1 if we made the change, else 0.
2541 This is only safe immediately after a regscan pass because it uses the
2542 values of regno_first_uid and regno_last_uid. */
2544 static int
2546 rtx loop_start;
2547 {
2552 rtx lastexit;
2556 /* Scan the exit code. We do not perform this optimization if any insn:
2558 is a CALL_INSN
2559 is a CODE_LABEL
2560 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2561 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2562 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2563 is not valid.
2565 We also do not do this if we find an insn with ASM_OPERANDS. While
2566 this restriction should not be necessary, copying an insn with
2567 ASM_OPERANDS can confuse asm_noperands in some cases.
2569 Also, don't do this if the exit code is more than 20 insns. */
2572 insn
2576 {
2578 {
2583 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2584 a jump immediately after the loop start that branches outside
2585 the loop but within an outer loop, near the exit test.
2586 If we copied this exit test and created a phony
2587 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2588 before the exit test look like these could be safely moved
2589 out of the loop even if they actually may be never executed.
2590 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2599 /* If we were to duplicate this code, we would not move
2600 the BLOCK notes, and so debugging the moved code would
2601 be difficult. Thus, we only move the code with -O2 or
2602 higher. */
2608 /* The code below would grossly mishandle REG_WAS_0 notes,
2609 so get rid of them here. */
2619 }
2620 }
2622 /* Unless INSN is zero, we can do the optimization. */
2628 /* See if any insn sets a register only used in the loop exit code and
2629 not a user variable. If so, replace it with a new register. */
2638 {
2644 {
2645 /* We can do the replacement. Allocate reg_map if this is the
2646 first replacement we found. */
2653 }
2654 }
2656 /* Now copy each insn. */
2658 {
2660 {
2665 /* Only copy line-number notes. */
2667 {
2670 }
2680 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2681 make them. */
2698 {
2702 }
2704 /* If this is a simple jump, add it to the jump chain. */
2708 {
2712 }
2717 }
2719 /* Record the first insn we copied. We need it so that we can
2720 scan the copied insns for new pseudo registers. */
2723 }
2725 /* Now clean up by emitting a jump to the end label and deleting the jump
2726 at the start of the loop. */
2728 {
2730 loop_start);
2732 /* Record the first insn we copied. We need it so that we can
2733 scan the copied insns for new pseudo registers. This may not
2734 be strictly necessary since we should have copied at least one
2735 insn above. But I am going to be safe. */
2742 {
2746 }
2748 }
2750 /* Now scan from the first insn we copied to the last insn we copied
2751 (copy) for new pseudo registers. Do this after the code to jump to
2752 the end label since that might create a new pseudo too. */
2755 /* Mark the exit code as the virtual top of the converted loop. */
2760 /* Clean up. */
2765 }
2766 \f
2767 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2768 loop-end notes between START and END out before START. Assume that
2769 END is not such a note. START may be such a note. Returns the value
2770 of the new starting insn, which may be different if the original start
2771 was such a note. */
2773 rtx
2776 {
2777 rtx insn;
2778 rtx next;
2781 {
2790 {
2793 else
2794 {
2802 }
2803 }
2804 }
2807 }
2808 \f
2809 /* Compare the instructions before insn E1 with those before E2
2810 to find an opportunity for cross jumping.
2811 (This means detecting identical sequences of insns followed by
2812 jumps to the same place, or followed by a label and a jump
2813 to that label, and replacing one with a jump to the other.)
2815 Assume E1 is a jump that jumps to label E2
2816 (that is not always true but it might as well be).
2817 Find the longest possible equivalent sequences
2818 and store the first insns of those sequences into *F1 and *F2.
2819 Store zero there if no equivalent preceding instructions are found.
2821 We give up if we find a label in stream 1.
2822 Actually we could transfer that label into stream 2. */
2824 static void
2829 {
2841 {
2851 /* Don't allow the range of insns preceding E1 or E2
2852 to include the other (E2 or E1). */
2856 /* If we will get to this code by jumping, those jumps will be
2857 tensioned to go directly to the new label (before I2),
2858 so this cross-jumping won't cost extra. So reduce the minimum. */
2860 {
2863 }
2868 /* Avoid moving insns across EH regions if either of the insns
2869 can throw. */
2878 /* If this is a CALL_INSN, compare register usage information.
2879 If we don't check this on stack register machines, the two
2880 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2881 numbers of stack registers in the same basic block.
2882 If we don't check this on machines with delay slots, a delay slot may
2883 be filled that clobbers a parameter expected by the subroutine.
2885 ??? We take the simple route for now and assume that if they're
2886 equal, they were constructed identically. */
2893 #ifdef STACK_REGS
2894 /* If cross_jump_death_matters is not 0, the insn's mode
2895 indicates whether or not the insn contains any stack-like
2896 regs. */
2899 {
2900 /* If register stack conversion has already been done, then
2901 death notes must also be compared before it is certain that
2902 the two instruction streams match. */
2904 rtx note;
2924 done:
2925 ;
2926 }
2927 #endif
2929 /* Don't allow old-style asm or volatile extended asms to be accepted
2930 for cross jumping purposes. It is conceptually correct to allow
2931 them, since cross-jumping preserves the dynamic instruction order
2932 even though it is changing the static instruction order. However,
2933 if an asm is being used to emit an assembler pseudo-op, such as
2934 the MIPS `.set reorder' pseudo-op, then the static instruction order
2935 matters and it must be preserved. */
2943 {
2944 /* The following code helps take care of G++ cleanups. */
2945 rtx equiv1;
2946 rtx equiv2;
2953 /* If the equivalences are not to a constant, they may
2954 reference pseudos that no longer exist, so we can't
2955 use them. */
2958 {
2963 {
2970 }
2971 }
2973 /* Insns fail to match; cross jumping is limited to the following
2974 insns. */
2976 #ifdef HAVE_cc0
2977 /* Don't allow the insn after a compare to be shared by
2978 cross-jumping unless the compare is also shared.
2979 Here, if either of these non-matching insns is a compare,
2980 exclude the following insn from possible cross-jumping. */
2983 #endif
2985 /* If cross-jumping here will feed a jump-around-jump
2986 optimization, this jump won't cost extra, so reduce
2987 the minimum. */
2993 }
2995 win:
2997 {
2998 /* Ok, this insn is potentially includable in a cross-jump here. */
3001 }
3002 }
3006 }
3008 static void
3011 {
3012 /* Find an existing label at this point
3013 or make a new one if there is none. */
3016 /* Make the same jump insn jump to the new point. */
3018 {
3019 /* Remove from jump chain of returns. */
3021 /* Change the insn. */
3026 /* Add to new the jump chain. */
3029 {
3032 }
3033 }
3034 else
3037 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
3038 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
3039 the NEWJPOS stream. */
3042 {
3043 rtx lnote;
3055 }
3056 }
3057 \f
3058 /* Return the label before INSN, or put a new label there. */
3060 rtx
3062 rtx insn;
3063 {
3064 rtx label;
3066 /* Find an existing label at this point
3067 or make a new one if there is none. */
3071 {
3077 }
3079 }
3081 /* Return the label after INSN, or put a new label there. */
3083 rtx
3085 rtx insn;
3086 {
3087 rtx label;
3089 /* Find an existing label at this point
3090 or make a new one if there is none. */
3094 {
3098 }
3100 }
3101 \f
3102 /* Return 1 if INSN is a jump that jumps to right after TARGET
3103 only on the condition that TARGET itself would drop through.
3104 Assumes that TARGET is a conditional jump. */
3106 static int
3109 {
3125 {
3129 }
3132 {
3136 }
3141 }
3142 \f
3143 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
3144 return non-zero if it is safe to reverse this comparison. It is if our
3145 floating-point is not IEEE, if this is an NE or EQ comparison, or if
3146 this is known to be an integer comparison. */
3148 int
3150 rtx comparison;
3151 rtx insn;
3152 {
3153 rtx arg0;
3155 /* If this is not actually a comparison, we can't reverse it. */
3160 /* If this is an NE comparison, it is safe to reverse it to an EQ
3161 comparison and vice versa, even for floating point. If no operands
3162 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3163 always false and NE is always true, so the reversal is also valid. */
3164 || flag_fast_math
3171 /* Make sure ARG0 is one of the actual objects being compared. If we
3172 can't do this, we can't be sure the comparison can be reversed.
3174 Handle cc0 and a MODE_CC register. */
3176 #ifdef HAVE_cc0
3178 #endif
3179 )
3180 {
3182 rtx set;
3184 /* First see if the condition code mode alone if enough to say we can
3185 reverse the condition. If not, then search backwards for a set of
3186 ARG0. We do not need to check for an insn clobbering it since valid
3187 code will contain set a set with no intervening clobber. But
3188 stop when we reach a label. */
3189 #ifdef REVERSIBLE_CC_MODE
3193 #endif
3200 {
3206 }
3207 }
3209 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3210 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3215 }
3217 /* Given an rtx-code for a comparison, return the code for the negated
3218 comparison. If no such code exists, return UNKNOWN.
3220 WATCH OUT! reverse_condition is not safe to use on a jump that might
3221 be acting on the results of an IEEE floating point comparison, because
3222 of the special treatment of non-signaling nans in comparisons.
3223 Use can_reverse_comparison_p to be sure. */
3225 enum rtx_code
3228 {
3230 {
3266 }
3267 }
3269 /* Similar, but we're allowed to generate unordered comparisons, which
3270 makes it safe for IEEE floating-point. Of course, we have to recognize
3271 that the target will support them too... */
3273 enum rtx_code
3276 {
3277 /* Non-IEEE formats don't have unordered conditions. */
3282 {
3322 }
3323 }
3325 /* Similar, but return the code when two operands of a comparison are swapped.
3326 This IS safe for IEEE floating-point. */
3328 enum rtx_code
3331 {
3333 {
3369 }
3370 }
3372 /* Given a comparison CODE, return the corresponding unsigned comparison.
3373 If CODE is an equality comparison or already an unsigned comparison,
3374 CODE is returned. */
3376 enum rtx_code
3379 {
3381 {
3401 }
3402 }
3404 /* Similarly, return the signed version of a comparison. */
3406 enum rtx_code
3409 {
3411 {
3431 }
3432 }
3433 \f
3434 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3435 truth of CODE1 implies the truth of CODE2. */
3437 int
3440 {
3445 {
3490 }
3493 }
3494 \f
3495 /* Return 1 if INSN is an unconditional jump and nothing else. */
3497 int
3499 rtx insn;
3500 {
3505 }
3507 /* Return nonzero if INSN is a (possibly) conditional jump
3508 and nothing more. */
3510 int
3512 rtx insn;
3513 {
3532 }
3534 /* Return nonzero if INSN is a (possibly) conditional jump inside a
3535 PARALLEL. */
3537 int
3539 rtx insn;
3540 {
3545 else
3565 }
3567 /* Return the label of a conditional jump. */
3569 rtx
3571 rtx insn;
3572 {
3591 }
3593 /* Return true if INSN is a (possibly conditional) return insn. */
3595 static int
3599 {
3602 }
3604 int
3606 rtx insn;
3607 {
3609 }
3611 /* Return true if INSN is a jump that only transfers control and
3612 nothing more. */
3614 int
3616 rtx insn;
3617 {
3618 rtx set;
3632 }
3634 #ifdef HAVE_cc0
3636 /* Return 1 if X is an RTX that does nothing but set the condition codes
3637 and CLOBBER or USE registers.
3638 Return -1 if X does explicitly set the condition codes,
3639 but also does other things. */
3641 int
3643 rtx x ATTRIBUTE_UNUSED;
3644 {
3648 {
3653 {
3659 }
3661 }
3663 }
3664 #endif
3665 \f
3666 /* Follow any unconditional jump at LABEL;
3667 return the ultimate label reached by any such chain of jumps.
3668 If LABEL is not followed by a jump, return LABEL.
3669 If the chain loops or we can't find end, return LABEL,
3670 since that tells caller to avoid changing the insn.
3672 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3673 a USE or CLOBBER. */
3675 rtx
3677 rtx label;
3678 {
3692 depth++)
3693 {
3694 /* Don't chain through the insn that jumps into a loop
3695 from outside the loop,
3696 since that would create multiple loop entry jumps
3697 and prevent loop optimization. */
3698 rtx tem;
3703 /* ??? Optional. Disables some optimizations, but makes
3704 gcov output more accurate with -O. */
3708 /* If we have found a cycle, make the insn jump to itself. */
3718 }
3722 }
3724 /* Assuming that field IDX of X is a vector of label_refs,
3725 replace each of them by the ultimate label reached by it.
3726 Return nonzero if a change is made.
3727 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3729 static int
3733 {
3737 {
3741 {
3747 }
3748 }
3750 }
3751 \f
3752 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3753 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3754 in INSN, then store one of them in JUMP_LABEL (INSN).
3755 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3756 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3757 Also, when there are consecutive labels, canonicalize on the last of them.
3759 Note that two labels separated by a loop-beginning note
3760 must be kept distinct if we have not yet done loop-optimization,
3761 because the gap between them is where loop-optimize
3762 will want to move invariant code to. CROSS_JUMP tells us
3763 that loop-optimization is done with.
3765 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3766 two labels distinct if they are separated by only USE or CLOBBER insns. */
3768 static void
3771 rtx insn;
3774 {
3780 {
3799 /* If this is a constant-pool reference, see if it is a label. */
3805 {
3808 rtx note;
3809 rtx next;
3814 /* Ignore references to labels of containing functions. */
3818 /* If there are other labels following this one,
3819 replace it with the last of the consecutive labels. */
3821 {
3833 /* ??? Optional. Disables some optimizations, but
3834 makes gcov output more accurate with -O. */
3837 }
3844 {
3848 /* If we've changed OLABEL and we had a REG_LABEL note
3849 for it, update it as well. */
3854 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3855 is one. */
3857 {
3858 /* This code used to ignore labels which refered to dispatch
3859 tables to avoid flow.c generating worse code.
3861 However, in the presense of global optimizations like
3862 gcse which call find_basic_blocks without calling
3863 life_analysis, not recording such labels will lead
3864 to compiler aborts because of inconsistencies in the
3865 flow graph. So we go ahead and record the label.
3867 It may also be the case that the optimization argument
3868 is no longer valid because of the more accurate cfg
3869 we build in find_basic_blocks -- it no longer pessimizes
3870 code when it finds a REG_LABEL note. */
3873 }
3874 }
3876 }
3878 /* Do walk the labels in a vector, but not the first operand of an
3879 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3883 {
3889 }
3894 }
3898 {
3902 {
3906 }
3907 }
3908 }
3910 /* If all INSN does is set the pc, delete it,
3911 and delete the insn that set the condition codes for it
3912 if that's what the previous thing was. */
3914 void
3916 rtx insn;
3917 {
3922 }
3924 /* Verify INSN is a BARRIER and delete it. */
3926 void
3928 rtx insn;
3929 {
3934 }
3936 /* Recursively delete prior insns that compute the value (used only by INSN
3937 which the caller is deleting) stored in the register mentioned by NOTE
3938 which is a REG_DEAD note associated with INSN. */
3940 static void
3942 rtx note;
3943 rtx insn;
3944 {
3945 rtx our_prev;
3952 {
3955 /* If we reach a CALL which is not calling a const function
3956 or the callee pops the arguments, then give up. */
3962 /* If we reach a SEQUENCE, it is too complex to try to
3963 do anything with it, so give up. */
3969 /* reorg creates USEs that look like this. We leave them
3970 alone because reorg needs them for its own purposes. */
3974 {
3979 {
3980 /* If we find a SET of something else, we can't
3981 delete the insn. */
3986 {
3992 }
3996 }
3999 {
4001 int dest_endregno
4013 /* We may have a multi-word hard register and some, but not
4014 all, of the words of the register are needed in subsequent
4015 insns. Write REG_UNUSED notes for those parts that were not
4016 needed. */
4019 {
4031 }
4032 }
4035 }
4037 /* If PAT references the register that dies here, it is an
4038 additional use. Hence any prior SET isn't dead. However, this
4039 insn becomes the new place for the REG_DEAD note. */
4041 {
4045 }
4046 }
4047 }
4049 /* Delete INSN and recursively delete insns that compute values used only
4050 by INSN. This uses the REG_DEAD notes computed during flow analysis.
4051 If we are running before flow.c, we need do nothing since flow.c will
4052 delete dead code. We also can't know if the registers being used are
4053 dead or not at this point.
4055 Otherwise, look at all our REG_DEAD notes. If a previous insn does
4056 nothing other than set a register that dies in this insn, we can delete
4057 that insn as well.
4059 On machines with CC0, if CC0 is used in this insn, we may be able to
4060 delete the insn that set it. */
4062 static void
4064 rtx insn;
4065 {
4067 rtx set;
4069 #ifdef HAVE_cc0
4071 {
4073 /* We assume that at this stage
4074 CC's are always set explicitly
4075 and always immediately before the jump that
4076 will use them. So if the previous insn
4077 exists to set the CC's, delete it
4078 (unless it performs auto-increments, etc.). */
4081 {
4085 else
4086 /* Otherwise, show that cc0 won't be used. */
4089 }
4090 }
4091 #endif
4093 #ifdef INSN_SCHEDULING
4094 /* ?!? The schedulers do not keep REG_DEAD notes accurate after
4095 reload has completed. The schedulers need to be fixed. Until
4096 they are, we must not rely on the death notes here. */
4098 {
4101 }
4102 #endif
4104 /* The REG_DEAD note may have been omitted for a register
4105 which is both set and used by the insn. */
4108 {
4110 int dest_endregno
4117 {
4126 }
4127 }
4130 {
4134 /* Verify that the REG_NOTE is legitimate. */
4139 }
4142 }
4143 \f
4144 /* Delete insn INSN from the chain of insns and update label ref counts.
4145 May delete some following insns as a consequence; may even delete
4146 a label elsewhere and insns that follow it.
4148 Returns the first insn after INSN that was not deleted. */
4150 rtx
4153 {
4162 /* This insn is already deleted => return first following nondeleted. */
4169 /* Don't delete user-declared labels. When optimizing, convert them
4170 to special NOTEs instead. When not optimizing, leave them alone. */
4172 {
4176 {
4181 }
4182 }
4183 else
4184 /* Mark this insn as deleted. */
4187 /* If this is an unconditional jump, delete it from the jump chain. */
4191 /* If instruction is followed by a barrier,
4192 delete the barrier too. */
4195 {
4198 }
4200 /* Patch out INSN (and the barrier if any) */
4203 {
4205 {
4210 }
4213 {
4217 }
4221 }
4223 /* If deleting a jump, decrement the count of the label,
4224 and delete the label if it is now unused. */
4227 {
4231 {
4232 /* This can delete NEXT or PREV,
4233 either directly if NEXT is JUMP_LABEL (INSN),
4234 or indirectly through more levels of jumps. */
4237 /* I feel a little doubtful about this loop,
4238 but I see no clean and sure alternative way
4239 to find the first insn after INSN that is not now deleted.
4240 I hope this works. */
4244 }
4249 {
4250 /* If we're deleting the tablejump, delete the dispatch table.
4251 We may not be able to kill the label immediately preceeding
4252 just yet, as it might be referenced in code leading up to
4253 the tablejump. */
4255 }
4256 }
4258 /* Likewise if we're deleting a dispatch table. */
4263 {
4274 }
4279 /* If INSN was a label and a dispatch table follows it,
4280 delete the dispatch table. The tablejump must have gone already.
4281 It isn't useful to fall through into a table. */
4290 /* If INSN was a label, delete insns following it if now unreachable. */
4293 {
4299 {
4303 /* Keep going past other deleted labels to delete what follows. */
4306 else
4307 /* Note: if this deletes a jump, it can cause more
4308 deletion of unreachable code, after a different label.
4309 As long as the value from this recursive call is correct,
4310 this invocation functions correctly. */
4312 }
4313 }
4316 }
4318 /* Advance from INSN till reaching something not deleted
4319 then return that. May return INSN itself. */
4321 rtx
4323 rtx insn;
4324 {
4328 }
4329 \f
4330 /* Delete a range of insns from FROM to TO, inclusive.
4331 This is for the sake of peephole optimization, so assume
4332 that whatever these insns do will still be done by a new
4333 peephole insn that will replace them. */
4335 void
4338 {
4342 {
4347 {
4350 /* Patch this insn out of the chain. */
4351 /* We don't do this all at once, because we
4352 must preserve all NOTEs. */
4358 }
4363 }
4365 /* Note that if TO is an unconditional jump
4366 we *do not* delete the BARRIER that follows,
4367 since the peephole that replaces this sequence
4368 is also an unconditional jump in that case. */
4369 }
4370 \f
4371 /* We have determined that INSN is never reached, and are about to
4372 delete it. Print a warning if the user asked for one.
4374 To try to make this warning more useful, this should only be called
4375 once per basic block not reached, and it only warns when the basic
4376 block contains more than one line from the current function, and
4377 contains at least one operation. CSE and inlining can duplicate insns,
4378 so it's possible to get spurious warnings from this. */
4380 void
4382 rtx avoided_insn;
4383 {
4384 rtx insn;
4392 /* Scan forwards, looking at LINE_NUMBER notes, until
4393 we hit a LABEL or we run out of insns. */
4396 {
4401 {
4404 else
4407 }
4410 }
4415 }
4416 \f
4417 /* Invert the condition of the jump JUMP, and make it jump
4418 to label NLABEL instead of where it jumps now. */
4420 int
4423 {
4424 /* We have to either invert the condition and change the label or
4425 do neither. Either operation could fail. We first try to invert
4426 the jump. If that succeeds, we try changing the label. If that fails,
4427 we invert the jump back to what it was. */
4433 {
4435 {
4438 /* An inverted jump means that a probability taken becomes a
4439 probability not taken. Subtract the branch probability from the
4440 probability base to convert it back to a taken probability.
4441 (We don't flip the probability on a branch that's never taken. */
4444 }
4447 }
4450 /* This should just be putting it back the way it was. */
4454 }
4456 /* Invert the jump condition of rtx X contained in jump insn, INSN.
4458 Return 1 if we can do so, 0 if we cannot find a way to do so that
4459 matches a pattern. */
4461 int
4463 rtx x;
4464 rtx insn;
4465 {
4473 {
4477 /* We can do this in two ways: The preferable way, which can only
4478 be done if this is not an integer comparison, is to reverse
4479 the comparison code. Otherwise, swap the THEN-part and ELSE-part
4480 of the IF_THEN_ELSE. If we can't do either, fail. */
4493 }
4497 {
4499 {
4502 }
4504 {
4509 }
4510 }
4513 }
4514 \f
4515 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4516 If the old jump target label is unused as a result,
4517 it and the code following it may be deleted.
4519 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4520 RETURN insn.
4522 The return value will be 1 if the change was made, 0 if it wasn't (this
4523 can only occur for NLABEL == 0). */
4525 int
4528 {
4537 /* If this is an unconditional branch, delete it from the jump_chain of
4538 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4539 have UID's in range and JUMP_CHAIN is valid). */
4542 {
4548 {
4551 }
4552 }
4558 /* If we're eliding the jump over exception cleanups at the end of a
4559 function, move the function end note so that -Wreturn-type works. */
4569 }
4571 /* Delete the instruction JUMP from any jump chain it might be on. */
4573 static void
4575 rtx jump;
4576 {
4580 /* Handle unconditional jumps. */
4585 /* Handle return insns. */
4592 else
4593 {
4594 rtx insn;
4600 {
4603 }
4604 }
4605 }
4607 /* If NLABEL is nonzero, throughout the rtx at LOC,
4608 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4609 zero, alter (RETURN) to (LABEL_REF NLABEL).
4611 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4612 validity with validate_change. Convert (set (pc) (label_ref olabel))
4613 to (return).
4615 Return 0 if we found a change we would like to make but it is invalid.
4616 Otherwise, return 1. */
4618 int
4622 rtx insn;
4623 {
4630 {
4632 {
4635 else
4638 }
4639 }
4641 {
4646 }
4655 {
4657 {
4660 }
4662 {
4667 }
4668 }
4671 }
4672 \f
4673 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4675 If the old jump target label (before the dispatch table) becomes unused,
4676 it and the dispatch table may be deleted. In that case, find the insn
4677 before the jump references that label and delete it and logical successors
4678 too. */
4680 static void
4683 {
4686 /* Add this jump to the jump_chain of NLABEL. */
4689 {
4692 }
4700 {
4703 }
4704 }
4706 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4707 If we found one, delete it and then delete this insn if DELETE_THIS is
4708 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4710 static int
4714 {
4716 rtx link;
4720 {
4722 {
4725 }
4726 else
4728 }
4732 {
4734 {
4737 }
4738 else
4740 }
4743 }
4744 \f
4745 /* Like rtx_equal_p except that it considers two REGs as equal
4746 if they renumber to the same value and considers two commutative
4747 operations to be the same if the order of the operands has been
4748 reversed.
4750 ??? Addition is not commutative on the PA due to the weird implicit
4751 space register selection rules for memory addresses. Therefore, we
4752 don't consider a + b == b + a.
4754 We could/should make this test a little tighter. Possibly only
4755 disabling it on the PA via some backend macro or only disabling this
4756 case when the PLUS is inside a MEM. */
4758 int
4761 {
4772 {
4779 /* If we haven't done any renumbering, don't
4780 make any assumptions. */
4785 {
4790 {
4793 }
4794 }
4796 else
4797 {
4801 }
4804 {
4809 {
4812 }
4813 }
4815 else
4816 {
4820 }
4823 }
4825 /* Now we have disposed of all the cases
4826 in which different rtx codes can match. */
4831 {
4842 /* We can't assume nonlocal labels have their following insns yet. */
4846 /* Two label-refs are equivalent if they point at labels
4847 in the same position in the instruction stream. */
4855 /* If we didn't match EQ equality above, they aren't the same. */
4860 }
4862 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4867 /* For commutative operations, the RTX match if the operand match in any
4868 order. Also handle the simple binary and unary cases without a loop.
4870 ??? Don't consider PLUS a commutative operator; see comments above. */
4883 /* Compare the elements. If any pair of corresponding elements
4884 fail to match, return 0 for the whole things. */
4888 {
4891 {
4915 /* fall through. */
4929 }
4930 }
4932 }
4933 \f
4934 /* If X is a hard register or equivalent to one or a subregister of one,
4935 return the hard register number. If X is a pseudo register that was not
4936 assigned a hard register, return the pseudo register number. Otherwise,
4937 return -1. Any rtx is valid for X. */
4939 int
4941 rtx x;
4942 {
4944 {
4948 }
4950 {
4954 }
4956 }
4957 \f
4958 /* Optimize code of the form:
4960 for (x = a[i]; x; ...)
4961 ...
4962 for (x = a[i]; x; ...)
4963 ...
4964 foo:
4966 Loop optimize will change the above code into
4968 if (x = a[i])
4969 for (;;)
4970 { ...; if (! (x = ...)) break; }
4971 if (x = a[i])
4972 for (;;)
4973 { ...; if (! (x = ...)) break; }
4974 foo:
4976 In general, if the first test fails, the program can branch
4977 directly to `foo' and skip the second try which is doomed to fail.
4978 We run this after loop optimization and before flow analysis. */
4980 /* When comparing the insn patterns, we track the fact that different
4981 pseudo-register numbers may have been used in each computation.
4982 The following array stores an equivalence -- same_regs[I] == J means
4983 that pseudo register I was used in the first set of tests in a context
4984 where J was used in the second set. We also count the number of such
4985 pending equivalences. If nonzero, the expressions really aren't the
4986 same. */
4992 /* Track any registers modified between the target of the first jump and
4993 the second jump. They never compare equal. */
4997 /* Record if memory was modified. */
5001 /* Called via note_stores on each insn between the target of the first
5002 branch and the second branch. It marks any changed registers. */
5004 static void
5006 rtx dest;
5007 rtx x ATTRIBUTE_UNUSED;
5009 {
5025 else
5028 }
5030 /* F is the first insn in the chain of insns. */
5032 void
5034 rtx f;
5037 {
5038 /* Basic algorithm is to find a conditional branch,
5039 the label it may branch to, and the branch after
5040 that label. If the two branches test the same condition,
5041 walk back from both branch paths until the insn patterns
5042 differ, or code labels are hit. If we make it back to
5043 the target of the first branch, then we know that the first branch
5044 will either always succeed or always fail depending on the relative
5045 senses of the two branches. So adjust the first branch accordingly
5046 in this case. */
5055 /* Allocate register tables and quick-reset table. */
5063 {
5067 {
5068 /* Get to a candidate branch insn. */
5083 /* Look for a branch after the target. Record any registers and
5084 memory modified between the target and the branch. Stop when we
5085 get to a label since we can't know what was changed there. */
5087 {
5092 {
5093 /* If this is an unconditional jump and is the only use of
5094 its target label, we can follow it. */
5098 {
5101 }
5102 else
5104 }
5110 {
5119 }
5122 }
5124 /* Check the next candidate branch insn from the label
5125 of the first. */
5133 /* Get the comparison codes and operands, reversing the
5134 codes if appropriate. If we don't have comparison codes,
5135 we can't do anything. */
5148 /* If they test the same things and knowing that B1 branches
5149 tells us whether or not B2 branches, check if we
5150 can thread the branch. */
5156 b1)
5159 {
5164 {
5166 {
5167 /* We have reached the target of the first branch.
5168 If there are no pending register equivalents,
5169 we know that this branch will either always
5170 succeed (if the senses of the two branches are
5171 the same) or always fail (if not). */
5172 rtx new_label;
5179 else
5183 {
5189 {
5190 /* Don't thread to the loop label. If a loop
5191 label is reused, loop optimization will
5192 be disabled for that loop. */
5195 }
5197 }
5199 }
5201 /* If either of these is not a normal insn (it might be
5202 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
5203 have already been skipped above.) Similarly, fail
5204 if the insns are different. */
5213 }
5214 }
5215 }
5216 }
5218 /* Clean up. */
5222 }
5223 \f
5224 /* This is like RTX_EQUAL_P except that it knows about our handling of
5225 possibly equivalent registers and knows to consider volatile and
5226 modified objects as not equal.
5228 YINSN is the insn containing Y. */
5230 int
5233 rtx yinsn;
5234 {
5241 /* Rtx's of different codes cannot be equal. */
5245 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
5246 (REG:SI x) and (REG:HI x) are NOT equivalent. */
5251 /* For floating-point, consider everything unequal. This is a bit
5252 pessimistic, but this pass would only rarely do anything for FP
5253 anyway. */
5258 /* For commutative operations, the RTX match if the operand match in any
5259 order. Also handle the simple binary and unary cases without a loop. */
5271 /* Handle special-cases first. */
5273 {
5278 /* If neither is user variable or hard register, check for possible
5279 equivalence. */
5286 {
5288 num_same_regs++;
5290 /* If this is the first time we are seeing a register on the `Y'
5291 side, see if it is the last use. If not, we can't thread the
5292 jump, so mark it as not equivalent. */
5297 }
5298 else
5304 /* If memory modified or either volatile, not equivalent.
5305 Else, check address. */
5318 /* Cancel a pending `same_regs' if setting equivalenced registers.
5319 Then process source. */
5322 {
5324 {
5326 num_same_regs--;
5327 }
5330 }
5331 else
5345 }
5352 {
5354 {
5368 /* Two vectors must have the same length. */
5372 /* And the corresponding elements must match. */
5391 /* These are just backpointers, so they don't matter. */
5398 /* It is believed that rtx's at this level will never
5399 contain anything but integers and other rtx's,
5400 except for within LABEL_REFs and SYMBOL_REFs. */
5403 }
5404 }
5406 }
5407 \f
5409 #if !defined(HAVE_cc0) && !defined(HAVE_conditional_arithmetic)
5410 /* Return the insn that NEW can be safely inserted in front of starting at
5411 the jump insn INSN. Return 0 if it is not safe to do this jump
5412 optimization. Note that NEW must contain a single set. */
5414 static rtx
5416 rtx insn;
5418 {
5420 rtx prev;
5422 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
5429 insn))
5435 /* There is a good chance that the previous insn PREV sets the thing
5436 being clobbered (often the CC in a hard reg). If PREV does not
5437 use what NEW sets, we can insert NEW before PREV. */
5443 insn)
5445 prev))
5449 }