1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
105 #include "coretypes.h"
107 #include "diagnostic-core.h"
112 #include "hash-set.h"
114 #include "machmode.h"
115 #include "hard-reg-set.h"
117 #include "function.h"
119 #include "statistics.h"
120 #include "double-int.h"
122 #include "fixed-value.h"
124 #include "wide-int.h"
127 #include "insn-config.h"
132 #include "emit-rtl.h"
136 #include "conditions.h"
138 #include "dominance.h"
140 #include "basic-block.h"
144 #include "insn-attr.h"
145 #include "resource.h"
149 #include "tree-pass.h"
153 #ifndef ANNUL_IFTRUE_SLOTS
154 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
156 #ifndef ANNUL_IFFALSE_SLOTS
157 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
161 /* First, some functions that were used before GCC got a control flow graph.
162 These functions are now only used here in reorg.c, and have therefore
163 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
165 /* Return the last label to mark the same position as LABEL. Return LABEL
166 itself if it is null or any return rtx. */
169 skip_consecutive_labels (rtx label_or_return
)
173 if (label_or_return
&& ANY_RETURN_P (label_or_return
))
174 return label_or_return
;
176 rtx_insn
*label
= as_a
<rtx_insn
*> (label_or_return
);
178 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
185 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
186 and REG_CC_USER notes so we can find it. */
189 link_cc0_insns (rtx insn
)
191 rtx user
= next_nonnote_insn (insn
);
193 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
194 user
= XVECEXP (PATTERN (user
), 0, 0);
196 add_reg_note (user
, REG_CC_SETTER
, insn
);
197 add_reg_note (insn
, REG_CC_USER
, user
);
200 /* Insns which have delay slots that have not yet been filled. */
202 static struct obstack unfilled_slots_obstack
;
203 static rtx
*unfilled_firstobj
;
205 /* Define macros to refer to the first and last slot containing unfilled
206 insns. These are used because the list may move and its address
207 should be recomputed at each use. */
209 #define unfilled_slots_base \
210 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
212 #define unfilled_slots_next \
213 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
215 /* Points to the label before the end of the function, or before a
217 static rtx_code_label
*function_return_label
;
218 /* Likewise for a simple_return. */
219 static rtx_code_label
*function_simple_return_label
;
221 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
222 not always monotonically increase. */
223 static int *uid_to_ruid
;
225 /* Highest valid index in `uid_to_ruid'. */
228 static int stop_search_p (rtx
, int);
229 static int resource_conflicts_p (struct resources
*, struct resources
*);
230 static int insn_references_resource_p (rtx
, struct resources
*, bool);
231 static int insn_sets_resource_p (rtx
, struct resources
*, bool);
232 static rtx_code_label
*find_end_label (rtx
);
233 static rtx_insn
*emit_delay_sequence (rtx_insn
*, rtx_insn_list
*, int);
234 static rtx_insn_list
*add_to_delay_list (rtx_insn
*, rtx_insn_list
*);
235 static rtx_insn
*delete_from_delay_slot (rtx_insn
*);
236 static void delete_scheduled_jump (rtx_insn
*);
237 static void note_delay_statistics (int, int);
238 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
239 static rtx_insn_list
*optimize_skip (rtx_insn
*);
241 static int get_jump_flags (const rtx_insn
*, rtx
);
242 static int mostly_true_jump (rtx
);
243 static rtx
get_branch_condition (const rtx_insn
*, rtx
);
244 static int condition_dominates_p (rtx
, const rtx_insn
*);
245 static int redirect_with_delay_slots_safe_p (rtx_insn
*, rtx
, rtx
);
246 static int redirect_with_delay_list_safe_p (rtx_insn
*, rtx
, rtx_insn_list
*);
247 static int check_annul_list_true_false (int, rtx
);
248 static rtx_insn_list
*steal_delay_list_from_target (rtx_insn
*, rtx
,
256 static rtx_insn_list
*steal_delay_list_from_fallthrough (rtx_insn
*, rtx
,
263 static void try_merge_delay_insns (rtx
, rtx_insn
*);
264 static rtx
redundant_insn (rtx
, rtx_insn
*, rtx
);
265 static int own_thread_p (rtx
, rtx
, int);
266 static void update_block (rtx_insn
*, rtx
);
267 static int reorg_redirect_jump (rtx_insn
*, rtx
);
268 static void update_reg_dead_notes (rtx
, rtx
);
269 static void fix_reg_dead_note (rtx
, rtx
);
270 static void update_reg_unused_notes (rtx
, rtx
);
271 static void fill_simple_delay_slots (int);
272 static rtx_insn_list
*fill_slots_from_thread (rtx_insn
*, rtx
, rtx
, rtx
,
274 int *, rtx_insn_list
*);
275 static void fill_eager_delay_slots (void);
276 static void relax_delay_slots (rtx_insn
*);
277 static void make_return_insns (rtx_insn
*);
279 /* A wrapper around next_active_insn which takes care to return ret_rtx
283 first_active_target_insn (rtx insn
)
285 if (ANY_RETURN_P (insn
))
287 return next_active_insn (as_a
<rtx_insn
*> (insn
));
290 /* Return true iff INSN is a simplejump, or any kind of return insn. */
293 simplejump_or_return_p (rtx insn
)
295 return (JUMP_P (insn
)
296 && (simplejump_p (as_a
<rtx_insn
*> (insn
))
297 || ANY_RETURN_P (PATTERN (insn
))));
300 /* Return TRUE if this insn should stop the search for insn to fill delay
301 slots. LABELS_P indicates that labels should terminate the search.
302 In all cases, jumps terminate the search. */
305 stop_search_p (rtx insn
, int labels_p
)
310 /* If the insn can throw an exception that is caught within the function,
311 it may effectively perform a jump from the viewpoint of the function.
312 Therefore act like for a jump. */
313 if (can_throw_internal (insn
))
316 switch (GET_CODE (insn
))
330 /* OK unless it contains a delay slot or is an `asm' insn of some type.
331 We don't know anything about these. */
332 return (GET_CODE (PATTERN (insn
)) == SEQUENCE
333 || GET_CODE (PATTERN (insn
)) == ASM_INPUT
334 || asm_noperands (PATTERN (insn
)) >= 0);
341 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
342 resource set contains a volatile memory reference. Otherwise, return FALSE. */
345 resource_conflicts_p (struct resources
*res1
, struct resources
*res2
)
347 if ((res1
->cc
&& res2
->cc
) || (res1
->memory
&& res2
->memory
)
348 || res1
->volatil
|| res2
->volatil
)
351 return hard_reg_set_intersect_p (res1
->regs
, res2
->regs
);
354 /* Return TRUE if any resource marked in RES, a `struct resources', is
355 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
356 routine is using those resources.
358 We compute this by computing all the resources referenced by INSN and
359 seeing if this conflicts with RES. It might be faster to directly check
360 ourselves, and this is the way it used to work, but it means duplicating
361 a large block of complex code. */
364 insn_references_resource_p (rtx insn
, struct resources
*res
,
365 bool include_delayed_effects
)
367 struct resources insn_res
;
369 CLEAR_RESOURCE (&insn_res
);
370 mark_referenced_resources (insn
, &insn_res
, include_delayed_effects
);
371 return resource_conflicts_p (&insn_res
, res
);
374 /* Return TRUE if INSN modifies resources that are marked in RES.
375 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
376 included. CC0 is only modified if it is explicitly set; see comments
377 in front of mark_set_resources for details. */
380 insn_sets_resource_p (rtx insn
, struct resources
*res
,
381 bool include_delayed_effects
)
383 struct resources insn_sets
;
385 CLEAR_RESOURCE (&insn_sets
);
386 mark_set_resources (insn
, &insn_sets
, 0,
387 (include_delayed_effects
390 return resource_conflicts_p (&insn_sets
, res
);
393 /* Find a label at the end of the function or before a RETURN. If there
394 is none, try to make one. If that fails, returns 0.
396 The property of such a label is that it is placed just before the
397 epilogue or a bare RETURN insn, so that another bare RETURN can be
398 turned into a jump to the label unconditionally. In particular, the
399 label cannot be placed before a RETURN insn with a filled delay slot.
401 ??? There may be a problem with the current implementation. Suppose
402 we start with a bare RETURN insn and call find_end_label. It may set
403 function_return_label just before the RETURN. Suppose the machinery
404 is able to fill the delay slot of the RETURN insn afterwards. Then
405 function_return_label is no longer valid according to the property
406 described above and find_end_label will still return it unmodified.
407 Note that this is probably mitigated by the following observation:
408 once function_return_label is made, it is very likely the target of
409 a jump, so filling the delay slot of the RETURN will be much more
411 KIND is either simple_return_rtx or ret_rtx, indicating which type of
412 return we're looking for. */
414 static rtx_code_label
*
415 find_end_label (rtx kind
)
418 rtx_code_label
**plabel
;
421 plabel
= &function_return_label
;
424 gcc_assert (kind
== simple_return_rtx
);
425 plabel
= &function_simple_return_label
;
428 /* If we found one previously, return it. */
432 /* Otherwise, see if there is a label at the end of the function. If there
433 is, it must be that RETURN insns aren't needed, so that is our return
434 label and we don't have to do anything else. */
436 insn
= get_last_insn ();
438 || (NONJUMP_INSN_P (insn
)
439 && (GET_CODE (PATTERN (insn
)) == USE
440 || GET_CODE (PATTERN (insn
)) == CLOBBER
)))
441 insn
= PREV_INSN (insn
);
443 /* When a target threads its epilogue we might already have a
444 suitable return insn. If so put a label before it for the
445 function_return_label. */
447 && JUMP_P (PREV_INSN (insn
))
448 && PATTERN (PREV_INSN (insn
)) == kind
)
450 rtx_insn
*temp
= PREV_INSN (PREV_INSN (insn
));
451 rtx_code_label
*label
= gen_label_rtx ();
452 LABEL_NUSES (label
) = 0;
454 /* Put the label before any USE insns that may precede the RETURN
456 while (GET_CODE (temp
) == USE
)
457 temp
= PREV_INSN (temp
);
459 emit_label_after (label
, temp
);
463 else if (LABEL_P (insn
))
464 *plabel
= as_a
<rtx_code_label
*> (insn
);
467 rtx_code_label
*label
= gen_label_rtx ();
468 LABEL_NUSES (label
) = 0;
469 /* If the basic block reorder pass moves the return insn to
470 some other place try to locate it again and put our
471 function_return_label there. */
472 while (insn
&& ! (JUMP_P (insn
) && (PATTERN (insn
) == kind
)))
473 insn
= PREV_INSN (insn
);
476 insn
= PREV_INSN (insn
);
478 /* Put the label before any USE insns that may precede the
480 while (GET_CODE (insn
) == USE
)
481 insn
= PREV_INSN (insn
);
483 emit_label_after (label
, insn
);
487 if (HAVE_epilogue
&& ! HAVE_return
)
488 /* The RETURN insn has its delay slot filled so we cannot
489 emit the label just before it. Since we already have
490 an epilogue and cannot emit a new RETURN, we cannot
491 emit the label at all. */
494 /* Otherwise, make a new label and emit a RETURN and BARRIER,
499 /* The return we make may have delay slots too. */
500 rtx pat
= gen_return ();
501 rtx_insn
*insn
= emit_jump_insn (pat
);
502 set_return_jump_label (insn
);
504 if (num_delay_slots (insn
) > 0)
505 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
511 /* Show one additional use for this label so it won't go away until
513 ++LABEL_NUSES (*plabel
);
518 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
519 the pattern of INSN with the SEQUENCE.
521 Returns the insn containing the SEQUENCE that replaces INSN. */
524 emit_delay_sequence (rtx_insn
*insn
, rtx_insn_list
*list
, int length
)
526 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
527 rtvec seqv
= rtvec_alloc (length
+ 1);
528 rtx seq
= gen_rtx_SEQUENCE (VOIDmode
, seqv
);
529 rtx_insn
*seq_insn
= make_insn_raw (seq
);
531 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
532 not have a location, but one of the delayed insns does, we pick up a
533 location from there later. */
534 INSN_LOCATION (seq_insn
) = INSN_LOCATION (insn
);
536 /* Unlink INSN from the insn chain, so that we can put it into
537 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
538 rtx after
= PREV_INSN (insn
);
540 SET_NEXT_INSN (insn
) = SET_PREV_INSN (insn
) = NULL
;
542 /* Build our SEQUENCE and rebuild the insn chain. */
545 XVECEXP (seq
, 0, 0) = emit_insn (insn
);
546 for (rtx_insn_list
*li
= list
; li
; li
= li
->next (), i
++)
548 rtx_insn
*tem
= li
->insn ();
551 /* Show that this copy of the insn isn't deleted. */
552 tem
->set_undeleted ();
554 /* Unlink insn from its original place, and re-emit it into
556 SET_NEXT_INSN (tem
) = SET_PREV_INSN (tem
) = NULL
;
557 XVECEXP (seq
, 0, i
) = emit_insn (tem
);
559 /* SPARC assembler, for instance, emit warning when debug info is output
560 into the delay slot. */
561 if (INSN_LOCATION (tem
) && !INSN_LOCATION (seq_insn
))
562 INSN_LOCATION (seq_insn
) = INSN_LOCATION (tem
);
563 INSN_LOCATION (tem
) = 0;
565 for (note
= REG_NOTES (tem
); note
; note
= next
)
567 next
= XEXP (note
, 1);
568 switch (REG_NOTE_KIND (note
))
571 /* Remove any REG_DEAD notes because we can't rely on them now
572 that the insn has been moved. */
573 remove_note (tem
, note
);
576 case REG_LABEL_OPERAND
:
577 case REG_LABEL_TARGET
:
578 /* Keep the label reference count up to date. */
579 if (LABEL_P (XEXP (note
, 0)))
580 LABEL_NUSES (XEXP (note
, 0)) ++;
589 gcc_assert (i
== length
+ 1);
591 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
592 add_insn_after (seq_insn
, after
, NULL
);
597 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
598 be in the order in which the insns are to be executed. */
600 static rtx_insn_list
*
601 add_to_delay_list (rtx_insn
*insn
, rtx_insn_list
*delay_list
)
603 /* If we have an empty list, just make a new list element. If
604 INSN has its block number recorded, clear it since we may
605 be moving the insn to a new block. */
609 clear_hashed_info_for_insn (insn
);
610 return gen_rtx_INSN_LIST (VOIDmode
, insn
, NULL_RTX
);
613 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
615 XEXP (delay_list
, 1) = add_to_delay_list (insn
, delay_list
->next ());
620 /* Delete INSN from the delay slot of the insn that it is in, which may
621 produce an insn with no delay slots. Return the new insn. */
624 delete_from_delay_slot (rtx_insn
*insn
)
626 rtx_insn
*trial
, *seq_insn
, *prev
;
628 rtx_insn_list
*delay_list
= 0;
632 /* We first must find the insn containing the SEQUENCE with INSN in its
633 delay slot. Do this by finding an insn, TRIAL, where
634 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
637 PREV_INSN (NEXT_INSN (trial
)) == trial
;
638 trial
= NEXT_INSN (trial
))
641 seq_insn
= PREV_INSN (NEXT_INSN (trial
));
642 seq
= as_a
<rtx_sequence
*> (PATTERN (seq_insn
));
644 if (NEXT_INSN (seq_insn
) && BARRIER_P (NEXT_INSN (seq_insn
)))
647 /* Create a delay list consisting of all the insns other than the one
648 we are deleting (unless we were the only one). */
650 for (i
= 1; i
< seq
->len (); i
++)
651 if (seq
->insn (i
) != insn
)
652 delay_list
= add_to_delay_list (seq
->insn (i
), delay_list
);
654 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
655 list, and rebuild the delay list if non-empty. */
656 prev
= PREV_INSN (seq_insn
);
657 trial
= seq
->insn (0);
658 delete_related_insns (seq_insn
);
659 add_insn_after (trial
, prev
, NULL
);
661 /* If there was a barrier after the old SEQUENCE, remit it. */
663 emit_barrier_after (trial
);
665 /* If there are any delay insns, remit them. Otherwise clear the
668 trial
= emit_delay_sequence (trial
, delay_list
, XVECLEN (seq
, 0) - 2);
669 else if (JUMP_P (trial
))
670 INSN_ANNULLED_BRANCH_P (trial
) = 0;
672 INSN_FROM_TARGET_P (insn
) = 0;
674 /* Show we need to fill this insn again. */
675 obstack_ptr_grow (&unfilled_slots_obstack
, trial
);
680 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
681 the insn that sets CC0 for it and delete it too. */
684 delete_scheduled_jump (rtx_insn
*insn
)
686 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
687 delete the insn that sets the condition code, but it is hard to find it.
688 Since this case is rare anyway, don't bother trying; there would likely
689 be other insns that became dead anyway, which we wouldn't know to
692 if (HAVE_cc0
&& reg_mentioned_p (cc0_rtx
, insn
))
694 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
696 /* If a reg-note was found, it points to an insn to set CC0. This
697 insn is in the delay list of some other insn. So delete it from
698 the delay list it was in. */
701 if (! FIND_REG_INC_NOTE (XEXP (note
, 0), NULL_RTX
)
702 && sets_cc0_p (PATTERN (XEXP (note
, 0))) == 1)
703 delete_from_delay_slot (as_a
<rtx_insn
*> (XEXP (note
, 0)));
707 /* The insn setting CC0 is our previous insn, but it may be in
708 a delay slot. It will be the last insn in the delay slot, if
710 rtx_insn
*trial
= previous_insn (insn
);
712 trial
= prev_nonnote_insn (trial
);
713 if (sets_cc0_p (PATTERN (trial
)) != 1
714 || FIND_REG_INC_NOTE (trial
, NULL_RTX
))
716 if (PREV_INSN (NEXT_INSN (trial
)) == trial
)
717 delete_related_insns (trial
);
719 delete_from_delay_slot (trial
);
723 delete_related_insns (insn
);
726 /* Counters for delay-slot filling. */
728 #define NUM_REORG_FUNCTIONS 2
729 #define MAX_DELAY_HISTOGRAM 3
730 #define MAX_REORG_PASSES 2
732 static int num_insns_needing_delays
[NUM_REORG_FUNCTIONS
][MAX_REORG_PASSES
];
734 static int num_filled_delays
[NUM_REORG_FUNCTIONS
][MAX_DELAY_HISTOGRAM
+1][MAX_REORG_PASSES
];
736 static int reorg_pass_number
;
739 note_delay_statistics (int slots_filled
, int index
)
741 num_insns_needing_delays
[index
][reorg_pass_number
]++;
742 if (slots_filled
> MAX_DELAY_HISTOGRAM
)
743 slots_filled
= MAX_DELAY_HISTOGRAM
;
744 num_filled_delays
[index
][slots_filled
][reorg_pass_number
]++;
747 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
749 /* Optimize the following cases:
751 1. When a conditional branch skips over only one instruction,
752 use an annulling branch and put that insn in the delay slot.
753 Use either a branch that annuls when the condition if true or
754 invert the test with a branch that annuls when the condition is
755 false. This saves insns, since otherwise we must copy an insn
758 (orig) (skip) (otherwise)
759 Bcc.n L1 Bcc',a L1 Bcc,a L1'
766 2. When a conditional branch skips over only one instruction,
767 and after that, it unconditionally branches somewhere else,
768 perform the similar optimization. This saves executing the
769 second branch in the case where the inverted condition is true.
778 This should be expanded to skip over N insns, where N is the number
779 of delay slots required. */
781 static rtx_insn_list
*
782 optimize_skip (rtx_insn
*insn
)
784 rtx_insn
*trial
= next_nonnote_insn (insn
);
785 rtx_insn
*next_trial
= next_active_insn (trial
);
786 rtx_insn_list
*delay_list
= 0;
789 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
792 || !NONJUMP_INSN_P (trial
)
793 || GET_CODE (PATTERN (trial
)) == SEQUENCE
794 || recog_memoized (trial
) < 0
795 || (! eligible_for_annul_false (insn
, 0, trial
, flags
)
796 && ! eligible_for_annul_true (insn
, 0, trial
, flags
))
797 || can_throw_internal (trial
))
800 /* There are two cases where we are just executing one insn (we assume
801 here that a branch requires only one insn; this should be generalized
802 at some point): Where the branch goes around a single insn or where
803 we have one insn followed by a branch to the same label we branch to.
804 In both of these cases, inverting the jump and annulling the delay
805 slot give the same effect in fewer insns. */
806 if (next_trial
== next_active_insn (JUMP_LABEL (insn
))
808 && simplejump_or_return_p (next_trial
)
809 && JUMP_LABEL (insn
) == JUMP_LABEL (next_trial
)))
811 if (eligible_for_annul_false (insn
, 0, trial
, flags
))
813 if (invert_jump (insn
, JUMP_LABEL (insn
), 1))
814 INSN_FROM_TARGET_P (trial
) = 1;
815 else if (! eligible_for_annul_true (insn
, 0, trial
, flags
))
819 delay_list
= add_to_delay_list (trial
, NULL
);
820 next_trial
= next_active_insn (trial
);
821 update_block (trial
, trial
);
822 delete_related_insns (trial
);
824 /* Also, if we are targeting an unconditional
825 branch, thread our jump to the target of that branch. Don't
826 change this into a RETURN here, because it may not accept what
827 we have in the delay slot. We'll fix this up later. */
828 if (next_trial
&& simplejump_or_return_p (next_trial
))
830 rtx target_label
= JUMP_LABEL (next_trial
);
831 if (ANY_RETURN_P (target_label
))
832 target_label
= find_end_label (target_label
);
836 /* Recompute the flags based on TARGET_LABEL since threading
837 the jump to TARGET_LABEL may change the direction of the
838 jump (which may change the circumstances in which the
839 delay slot is nullified). */
840 flags
= get_jump_flags (insn
, target_label
);
841 if (eligible_for_annul_true (insn
, 0, trial
, flags
))
842 reorg_redirect_jump (insn
, target_label
);
846 INSN_ANNULLED_BRANCH_P (insn
) = 1;
853 /* Encode and return branch direction and prediction information for
854 INSN assuming it will jump to LABEL.
856 Non conditional branches return no direction information and
857 are predicted as very likely taken. */
860 get_jump_flags (const rtx_insn
*insn
, rtx label
)
864 /* get_jump_flags can be passed any insn with delay slots, these may
865 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
866 direction information, and only if they are conditional jumps.
868 If LABEL is a return, then there is no way to determine the branch
871 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
872 && !ANY_RETURN_P (label
)
873 && INSN_UID (insn
) <= max_uid
874 && INSN_UID (label
) <= max_uid
)
876 = (uid_to_ruid
[INSN_UID (label
)] > uid_to_ruid
[INSN_UID (insn
)])
877 ? ATTR_FLAG_forward
: ATTR_FLAG_backward
;
878 /* No valid direction information. */
885 /* Return truth value of the statement that this branch
886 is mostly taken. If we think that the branch is extremely likely
887 to be taken, we return 2. If the branch is slightly more likely to be
888 taken, return 1. If the branch is slightly less likely to be taken,
889 return 0 and if the branch is highly unlikely to be taken, return -1. */
892 mostly_true_jump (rtx jump_insn
)
894 /* If branch probabilities are available, then use that number since it
895 always gives a correct answer. */
896 rtx note
= find_reg_note (jump_insn
, REG_BR_PROB
, 0);
899 int prob
= XINT (note
, 0);
901 if (prob
>= REG_BR_PROB_BASE
* 9 / 10)
903 else if (prob
>= REG_BR_PROB_BASE
/ 2)
905 else if (prob
>= REG_BR_PROB_BASE
/ 10)
911 /* If there is no note, assume branches are not taken.
912 This should be rare. */
916 /* Return the condition under which INSN will branch to TARGET. If TARGET
917 is zero, return the condition under which INSN will return. If INSN is
918 an unconditional branch, return const_true_rtx. If INSN isn't a simple
919 type of jump, or it doesn't go to TARGET, return 0. */
922 get_branch_condition (const rtx_insn
*insn
, rtx target
)
924 rtx pat
= PATTERN (insn
);
927 if (condjump_in_parallel_p (insn
))
928 pat
= XVECEXP (pat
, 0, 0);
930 if (ANY_RETURN_P (pat
) && pat
== target
)
931 return const_true_rtx
;
933 if (GET_CODE (pat
) != SET
|| SET_DEST (pat
) != pc_rtx
)
937 if (GET_CODE (src
) == LABEL_REF
&& LABEL_REF_LABEL (src
) == target
)
938 return const_true_rtx
;
940 else if (GET_CODE (src
) == IF_THEN_ELSE
941 && XEXP (src
, 2) == pc_rtx
942 && ((GET_CODE (XEXP (src
, 1)) == LABEL_REF
943 && LABEL_REF_LABEL (XEXP (src
, 1)) == target
)
944 || (ANY_RETURN_P (XEXP (src
, 1)) && XEXP (src
, 1) == target
)))
945 return XEXP (src
, 0);
947 else if (GET_CODE (src
) == IF_THEN_ELSE
948 && XEXP (src
, 1) == pc_rtx
949 && ((GET_CODE (XEXP (src
, 2)) == LABEL_REF
950 && LABEL_REF_LABEL (XEXP (src
, 2)) == target
)
951 || (ANY_RETURN_P (XEXP (src
, 2)) && XEXP (src
, 2) == target
)))
954 rev
= reversed_comparison_code (XEXP (src
, 0), insn
);
956 return gen_rtx_fmt_ee (rev
, GET_MODE (XEXP (src
, 0)),
957 XEXP (XEXP (src
, 0), 0),
958 XEXP (XEXP (src
, 0), 1));
964 /* Return nonzero if CONDITION is more strict than the condition of
965 INSN, i.e., if INSN will always branch if CONDITION is true. */
968 condition_dominates_p (rtx condition
, const rtx_insn
*insn
)
970 rtx other_condition
= get_branch_condition (insn
, JUMP_LABEL (insn
));
971 enum rtx_code code
= GET_CODE (condition
);
972 enum rtx_code other_code
;
974 if (rtx_equal_p (condition
, other_condition
)
975 || other_condition
== const_true_rtx
)
978 else if (condition
== const_true_rtx
|| other_condition
== 0)
981 other_code
= GET_CODE (other_condition
);
982 if (GET_RTX_LENGTH (code
) != 2 || GET_RTX_LENGTH (other_code
) != 2
983 || ! rtx_equal_p (XEXP (condition
, 0), XEXP (other_condition
, 0))
984 || ! rtx_equal_p (XEXP (condition
, 1), XEXP (other_condition
, 1)))
987 return comparison_dominates_p (code
, other_code
);
990 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
991 any insns already in the delay slot of JUMP. */
994 redirect_with_delay_slots_safe_p (rtx_insn
*jump
, rtx newlabel
, rtx seq
)
997 rtx_sequence
*pat
= as_a
<rtx_sequence
*> (PATTERN (seq
));
999 /* Make sure all the delay slots of this jump would still
1000 be valid after threading the jump. If they are still
1001 valid, then return nonzero. */
1003 flags
= get_jump_flags (jump
, newlabel
);
1004 for (i
= 1; i
< pat
->len (); i
++)
1006 #ifdef ANNUL_IFFALSE_SLOTS
1007 (INSN_ANNULLED_BRANCH_P (jump
)
1008 && INSN_FROM_TARGET_P (pat
->insn (i
)))
1009 ? eligible_for_annul_false (jump
, i
- 1, pat
->insn (i
), flags
) :
1011 #ifdef ANNUL_IFTRUE_SLOTS
1012 (INSN_ANNULLED_BRANCH_P (jump
)
1013 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
1014 ? eligible_for_annul_true (jump
, i
- 1, pat
->insn (i
), flags
) :
1016 eligible_for_delay (jump
, i
- 1, pat
->insn (i
), flags
)))
1019 return (i
== pat
->len ());
1022 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1023 any insns we wish to place in the delay slot of JUMP. */
1026 redirect_with_delay_list_safe_p (rtx_insn
*jump
, rtx newlabel
,
1027 rtx_insn_list
*delay_list
)
1032 /* Make sure all the insns in DELAY_LIST would still be
1033 valid after threading the jump. If they are still
1034 valid, then return nonzero. */
1036 flags
= get_jump_flags (jump
, newlabel
);
1037 for (li
= delay_list
, i
= 0; li
; li
= li
->next (), i
++)
1039 #ifdef ANNUL_IFFALSE_SLOTS
1040 (INSN_ANNULLED_BRANCH_P (jump
)
1041 && INSN_FROM_TARGET_P (li
->insn ()))
1042 ? eligible_for_annul_false (jump
, i
, li
->insn (), flags
) :
1044 #ifdef ANNUL_IFTRUE_SLOTS
1045 (INSN_ANNULLED_BRANCH_P (jump
)
1046 && ! INSN_FROM_TARGET_P (XEXP (li
, 0)))
1047 ? eligible_for_annul_true (jump
, i
, li
->insn (), flags
) :
1049 eligible_for_delay (jump
, i
, li
->insn (), flags
)))
1052 return (li
== NULL
);
1055 /* DELAY_LIST is a list of insns that have already been placed into delay
1056 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1057 If not, return 0; otherwise return 1. */
1060 check_annul_list_true_false (int annul_true_p
, rtx delay_list
)
1066 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1068 rtx trial
= XEXP (temp
, 0);
1070 if ((annul_true_p
&& INSN_FROM_TARGET_P (trial
))
1071 || (!annul_true_p
&& !INSN_FROM_TARGET_P (trial
)))
1079 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1080 the condition tested by INSN is CONDITION and the resources shown in
1081 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1082 from SEQ's delay list, in addition to whatever insns it may execute
1083 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1084 needed while searching for delay slot insns. Return the concatenated
1085 delay list if possible, otherwise, return 0.
1087 SLOTS_TO_FILL is the total number of slots required by INSN, and
1088 PSLOTS_FILLED points to the number filled so far (also the number of
1089 insns in DELAY_LIST). It is updated with the number that have been
1090 filled from the SEQUENCE, if any.
1092 PANNUL_P points to a nonzero value if we already know that we need
1093 to annul INSN. If this routine determines that annulling is needed,
1094 it may set that value nonzero.
1096 PNEW_THREAD points to a location that is to receive the place at which
1097 execution should continue. */
1099 static rtx_insn_list
*
1100 steal_delay_list_from_target (rtx_insn
*insn
, rtx condition
, rtx_sequence
*seq
,
1101 rtx_insn_list
*delay_list
, struct resources
*sets
,
1102 struct resources
*needed
,
1103 struct resources
*other_needed
,
1104 int slots_to_fill
, int *pslots_filled
,
1105 int *pannul_p
, rtx
*pnew_thread
)
1107 int slots_remaining
= slots_to_fill
- *pslots_filled
;
1108 int total_slots_filled
= *pslots_filled
;
1109 rtx_insn_list
*new_delay_list
= 0;
1110 int must_annul
= *pannul_p
;
1113 struct resources cc_set
;
1116 /* We can't do anything if there are more delay slots in SEQ than we
1117 can handle, or if we don't know that it will be a taken branch.
1118 We know that it will be a taken branch if it is either an unconditional
1119 branch or a conditional branch with a stricter branch condition.
1121 Also, exit if the branch has more than one set, since then it is computing
1122 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1123 ??? It may be possible to move other sets into INSN in addition to
1124 moving the instructions in the delay slots.
1126 We can not steal the delay list if one of the instructions in the
1127 current delay_list modifies the condition codes and the jump in the
1128 sequence is a conditional jump. We can not do this because we can
1129 not change the direction of the jump because the condition codes
1130 will effect the direction of the jump in the sequence. */
1132 CLEAR_RESOURCE (&cc_set
);
1133 for (rtx_insn_list
*temp
= delay_list
; temp
; temp
= temp
->next ())
1135 rtx_insn
*trial
= temp
->insn ();
1137 mark_set_resources (trial
, &cc_set
, 0, MARK_SRC_DEST_CALL
);
1138 if (insn_references_resource_p (seq
->insn (0), &cc_set
, false))
1142 if (XVECLEN (seq
, 0) - 1 > slots_remaining
1143 || ! condition_dominates_p (condition
, seq
->insn (0))
1144 || ! single_set (seq
->insn (0)))
1147 /* On some targets, branches with delay slots can have a limited
1148 displacement. Give the back end a chance to tell us we can't do
1150 if (! targetm
.can_follow_jump (insn
, seq
->insn (0)))
1153 redundant
= XALLOCAVEC (bool, XVECLEN (seq
, 0));
1154 for (i
= 1; i
< seq
->len (); i
++)
1156 rtx_insn
*trial
= seq
->insn (i
);
1159 if (insn_references_resource_p (trial
, sets
, false)
1160 || insn_sets_resource_p (trial
, needed
, false)
1161 || insn_sets_resource_p (trial
, sets
, false)
1162 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1164 || (HAVE_cc0
&& find_reg_note (trial
, REG_CC_USER
, NULL_RTX
))
1165 /* If TRIAL is from the fallthrough code of an annulled branch insn
1166 in SEQ, we cannot use it. */
1167 || (INSN_ANNULLED_BRANCH_P (seq
->insn (0))
1168 && ! INSN_FROM_TARGET_P (trial
)))
1171 /* If this insn was already done (usually in a previous delay slot),
1172 pretend we put it in our delay slot. */
1173 redundant
[i
] = redundant_insn (trial
, insn
, new_delay_list
);
1177 /* We will end up re-vectoring this branch, so compute flags
1178 based on jumping to the new label. */
1179 flags
= get_jump_flags (insn
, JUMP_LABEL (seq
->insn (0)));
1182 && ((condition
== const_true_rtx
1183 || (! insn_sets_resource_p (trial
, other_needed
, false)
1184 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1185 ? eligible_for_delay (insn
, total_slots_filled
, trial
, flags
)
1186 : (must_annul
|| (delay_list
== NULL
&& new_delay_list
== NULL
))
1188 check_annul_list_true_false (0, delay_list
)
1189 && check_annul_list_true_false (0, new_delay_list
)
1190 && eligible_for_annul_false (insn
, total_slots_filled
,
1195 rtx_insn
*temp
= copy_delay_slot_insn (trial
);
1196 INSN_FROM_TARGET_P (temp
) = 1;
1197 new_delay_list
= add_to_delay_list (temp
, new_delay_list
);
1198 total_slots_filled
++;
1200 if (--slots_remaining
== 0)
1207 /* Record the effect of the instructions that were redundant and which
1208 we therefore decided not to copy. */
1209 for (i
= 1; i
< seq
->len (); i
++)
1211 update_block (seq
->insn (i
), insn
);
1213 /* Show the place to which we will be branching. */
1214 *pnew_thread
= first_active_target_insn (JUMP_LABEL (seq
->insn (0)));
1216 /* Add any new insns to the delay list and update the count of the
1217 number of slots filled. */
1218 *pslots_filled
= total_slots_filled
;
1222 if (delay_list
== 0)
1223 return new_delay_list
;
1225 for (rtx_insn_list
*temp
= new_delay_list
; temp
; temp
= temp
->next ())
1226 delay_list
= add_to_delay_list (temp
->insn (), delay_list
);
1231 /* Similar to steal_delay_list_from_target except that SEQ is on the
1232 fallthrough path of INSN. Here we only do something if the delay insn
1233 of SEQ is an unconditional branch. In that case we steal its delay slot
1234 for INSN since unconditional branches are much easier to fill. */
1236 static rtx_insn_list
*
1237 steal_delay_list_from_fallthrough (rtx_insn
*insn
, rtx condition
,
1239 rtx_insn_list
*delay_list
,
1240 struct resources
*sets
,
1241 struct resources
*needed
,
1242 struct resources
*other_needed
,
1243 int slots_to_fill
, int *pslots_filled
,
1248 int must_annul
= *pannul_p
;
1251 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
1253 /* We can't do anything if SEQ's delay insn isn't an
1254 unconditional branch. */
1256 if (! simplejump_or_return_p (seq
->insn (0)))
1259 for (i
= 1; i
< seq
->len (); i
++)
1261 rtx_insn
*trial
= seq
->insn (i
);
1263 /* If TRIAL sets CC0, stealing it will move it too far from the use
1265 if (insn_references_resource_p (trial
, sets
, false)
1266 || insn_sets_resource_p (trial
, needed
, false)
1267 || insn_sets_resource_p (trial
, sets
, false)
1268 || (HAVE_cc0
&& sets_cc0_p (PATTERN (trial
))))
1272 /* If this insn was already done, we don't need it. */
1273 if (redundant_insn (trial
, insn
, delay_list
))
1275 update_block (trial
, insn
);
1276 delete_from_delay_slot (trial
);
1281 && ((condition
== const_true_rtx
1282 || (! insn_sets_resource_p (trial
, other_needed
, false)
1283 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1284 ? eligible_for_delay (insn
, *pslots_filled
, trial
, flags
)
1285 : (must_annul
|| delay_list
== NULL
) && (must_annul
= 1,
1286 check_annul_list_true_false (1, delay_list
)
1287 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
1291 delete_from_delay_slot (trial
);
1292 delay_list
= add_to_delay_list (trial
, delay_list
);
1294 if (++(*pslots_filled
) == slots_to_fill
)
1306 /* Try merging insns starting at THREAD which match exactly the insns in
1309 If all insns were matched and the insn was previously annulling, the
1310 annul bit will be cleared.
1312 For each insn that is merged, if the branch is or will be non-annulling,
1313 we delete the merged insn. */
1316 try_merge_delay_insns (rtx insn
, rtx_insn
*thread
)
1318 rtx_insn
*trial
, *next_trial
;
1319 rtx_insn
*delay_insn
= as_a
<rtx_insn
*> (XVECEXP (PATTERN (insn
), 0, 0));
1320 int annul_p
= JUMP_P (delay_insn
) && INSN_ANNULLED_BRANCH_P (delay_insn
);
1321 int slot_number
= 1;
1322 int num_slots
= XVECLEN (PATTERN (insn
), 0);
1323 rtx next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1324 struct resources set
, needed
, modified
;
1325 rtx_insn_list
*merged_insns
= 0;
1329 flags
= get_jump_flags (delay_insn
, JUMP_LABEL (delay_insn
));
1331 CLEAR_RESOURCE (&needed
);
1332 CLEAR_RESOURCE (&set
);
1334 /* If this is not an annulling branch, take into account anything needed in
1335 INSN's delay slot. This prevents two increments from being incorrectly
1336 folded into one. If we are annulling, this would be the correct
1337 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1338 will essentially disable this optimization. This method is somewhat of
1339 a kludge, but I don't see a better way.) */
1341 for (i
= 1 ; i
< num_slots
; i
++)
1342 if (XVECEXP (PATTERN (insn
), 0, i
))
1343 mark_referenced_resources (XVECEXP (PATTERN (insn
), 0, i
), &needed
,
1346 for (trial
= thread
; !stop_search_p (trial
, 1); trial
= next_trial
)
1348 rtx pat
= PATTERN (trial
);
1349 rtx oldtrial
= trial
;
1351 next_trial
= next_nonnote_insn (trial
);
1353 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1354 if (NONJUMP_INSN_P (trial
)
1355 && (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
))
1358 if (GET_CODE (next_to_match
) == GET_CODE (trial
)
1359 /* We can't share an insn that sets cc0. */
1360 && (!HAVE_cc0
|| ! sets_cc0_p (pat
))
1361 && ! insn_references_resource_p (trial
, &set
, true)
1362 && ! insn_sets_resource_p (trial
, &set
, true)
1363 && ! insn_sets_resource_p (trial
, &needed
, true)
1364 && (trial
= try_split (pat
, trial
, 0)) != 0
1365 /* Update next_trial, in case try_split succeeded. */
1366 && (next_trial
= next_nonnote_insn (trial
))
1367 /* Likewise THREAD. */
1368 && (thread
= oldtrial
== thread
? trial
: thread
)
1369 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (trial
))
1370 /* Have to test this condition if annul condition is different
1371 from (and less restrictive than) non-annulling one. */
1372 && eligible_for_delay (delay_insn
, slot_number
- 1, trial
, flags
))
1377 update_block (trial
, thread
);
1378 if (trial
== thread
)
1379 thread
= next_active_insn (thread
);
1381 delete_related_insns (trial
);
1382 INSN_FROM_TARGET_P (next_to_match
) = 0;
1385 merged_insns
= gen_rtx_INSN_LIST (VOIDmode
, trial
, merged_insns
);
1387 if (++slot_number
== num_slots
)
1390 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1393 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
1394 mark_referenced_resources (trial
, &needed
, true);
1397 /* See if we stopped on a filled insn. If we did, try to see if its
1398 delay slots match. */
1399 if (slot_number
!= num_slots
1400 && trial
&& NONJUMP_INSN_P (trial
)
1401 && GET_CODE (PATTERN (trial
)) == SEQUENCE
1402 && !(JUMP_P (XVECEXP (PATTERN (trial
), 0, 0))
1403 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial
), 0, 0))))
1405 rtx_sequence
*pat
= as_a
<rtx_sequence
*> (PATTERN (trial
));
1406 rtx filled_insn
= XVECEXP (pat
, 0, 0);
1408 /* Account for resources set/needed by the filled insn. */
1409 mark_set_resources (filled_insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1410 mark_referenced_resources (filled_insn
, &needed
, true);
1412 for (i
= 1; i
< pat
->len (); i
++)
1414 rtx_insn
*dtrial
= pat
->insn (i
);
1416 CLEAR_RESOURCE (&modified
);
1417 /* Account for resources set by the the insn following NEXT_TO_MATCH
1418 inside INSN's delay list. */
1419 for (j
= 1; slot_number
+ j
< num_slots
; j
++)
1420 mark_set_resources (XVECEXP (PATTERN (insn
), 0, slot_number
+ j
),
1421 &modified
, 0, MARK_SRC_DEST_CALL
);
1422 /* Account for resources set by the the insn before DTRIAL and inside
1423 TRIAL's delay list. */
1424 for (j
= 1; j
< i
; j
++)
1425 mark_set_resources (XVECEXP (pat
, 0, j
),
1426 &modified
, 0, MARK_SRC_DEST_CALL
);
1427 if (! insn_references_resource_p (dtrial
, &set
, true)
1428 && ! insn_sets_resource_p (dtrial
, &set
, true)
1429 && ! insn_sets_resource_p (dtrial
, &needed
, true)
1430 && (!HAVE_cc0
|| ! sets_cc0_p (PATTERN (dtrial
)))
1431 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (dtrial
))
1432 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1433 resource modified between them (only dtrial is checked because
1434 next_to_match and dtrial shall to be equal in order to hit
1436 && ! insn_references_resource_p (dtrial
, &modified
, true)
1437 && eligible_for_delay (delay_insn
, slot_number
- 1, dtrial
, flags
))
1443 update_block (dtrial
, thread
);
1444 new_rtx
= delete_from_delay_slot (dtrial
);
1445 if (thread
->deleted ())
1447 INSN_FROM_TARGET_P (next_to_match
) = 0;
1450 merged_insns
= gen_rtx_INSN_LIST (SImode
, dtrial
,
1453 if (++slot_number
== num_slots
)
1456 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1460 /* Keep track of the set/referenced resources for the delay
1461 slots of any trial insns we encounter. */
1462 mark_set_resources (dtrial
, &set
, 0, MARK_SRC_DEST_CALL
);
1463 mark_referenced_resources (dtrial
, &needed
, true);
1468 /* If all insns in the delay slot have been matched and we were previously
1469 annulling the branch, we need not any more. In that case delete all the
1470 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1471 the delay list so that we know that it isn't only being used at the
1473 if (slot_number
== num_slots
&& annul_p
)
1475 for (; merged_insns
; merged_insns
= merged_insns
->next ())
1477 if (GET_MODE (merged_insns
) == SImode
)
1481 update_block (merged_insns
->insn (), thread
);
1482 new_rtx
= delete_from_delay_slot (merged_insns
->insn ());
1483 if (thread
->deleted ())
1488 update_block (merged_insns
->insn (), thread
);
1489 delete_related_insns (merged_insns
->insn ());
1493 INSN_ANNULLED_BRANCH_P (delay_insn
) = 0;
1495 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1496 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
)) = 0;
1500 /* See if INSN is redundant with an insn in front of TARGET. Often this
1501 is called when INSN is a candidate for a delay slot of TARGET.
1502 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1503 of INSN. Often INSN will be redundant with an insn in a delay slot of
1504 some previous insn. This happens when we have a series of branches to the
1505 same label; in that case the first insn at the target might want to go
1506 into each of the delay slots.
1508 If we are not careful, this routine can take up a significant fraction
1509 of the total compilation time (4%), but only wins rarely. Hence we
1510 speed this routine up by making two passes. The first pass goes back
1511 until it hits a label and sees if it finds an insn with an identical
1512 pattern. Only in this (relatively rare) event does it check for
1515 We do not split insns we encounter. This could cause us not to find a
1516 redundant insn, but the cost of splitting seems greater than the possible
1517 gain in rare cases. */
1520 redundant_insn (rtx insn
, rtx_insn
*target
, rtx delay_list
)
1522 rtx target_main
= target
;
1523 rtx ipat
= PATTERN (insn
);
1526 struct resources needed
, set
;
1528 unsigned insns_to_search
;
1530 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1531 are allowed to not actually assign to such a register. */
1532 if (find_reg_note (insn
, REG_UNUSED
, NULL_RTX
) != 0)
1535 /* Scan backwards looking for a match. */
1536 for (trial
= PREV_INSN (target
),
1537 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1538 trial
&& insns_to_search
> 0;
1539 trial
= PREV_INSN (trial
))
1541 /* (use (insn))s can come immediately after a barrier if the
1542 label that used to precede them has been deleted as dead.
1543 See delete_related_insns. */
1544 if (LABEL_P (trial
) || BARRIER_P (trial
))
1547 if (!INSN_P (trial
))
1551 pat
= PATTERN (trial
);
1552 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1555 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (pat
))
1557 /* Stop for a CALL and its delay slots because it is difficult to
1558 track its resource needs correctly. */
1559 if (CALL_P (seq
->element (0)))
1562 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1563 slots because it is difficult to track its resource needs
1566 if (INSN_SETS_ARE_DELAYED (seq
->insn (0)))
1569 if (INSN_REFERENCES_ARE_DELAYED (seq
->insn (0)))
1572 /* See if any of the insns in the delay slot match, updating
1573 resource requirements as we go. */
1574 for (i
= seq
->len () - 1; i
> 0; i
--)
1575 if (GET_CODE (seq
->element (i
)) == GET_CODE (insn
)
1576 && rtx_equal_p (PATTERN (seq
->element (i
)), ipat
)
1577 && ! find_reg_note (seq
->element (i
), REG_UNUSED
, NULL_RTX
))
1580 /* If found a match, exit this loop early. */
1585 else if (GET_CODE (trial
) == GET_CODE (insn
) && rtx_equal_p (pat
, ipat
)
1586 && ! find_reg_note (trial
, REG_UNUSED
, NULL_RTX
))
1590 /* If we didn't find an insn that matches, return 0. */
1594 /* See what resources this insn sets and needs. If they overlap, or
1595 if this insn references CC0, it can't be redundant. */
1597 CLEAR_RESOURCE (&needed
);
1598 CLEAR_RESOURCE (&set
);
1599 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1600 mark_referenced_resources (insn
, &needed
, true);
1602 /* If TARGET is a SEQUENCE, get the main insn. */
1603 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1604 target_main
= XVECEXP (PATTERN (target
), 0, 0);
1606 if (resource_conflicts_p (&needed
, &set
)
1607 || (HAVE_cc0
&& reg_mentioned_p (cc0_rtx
, ipat
))
1608 /* The insn requiring the delay may not set anything needed or set by
1610 || insn_sets_resource_p (target_main
, &needed
, true)
1611 || insn_sets_resource_p (target_main
, &set
, true))
1614 /* Insns we pass may not set either NEEDED or SET, so merge them for
1616 needed
.memory
|= set
.memory
;
1617 IOR_HARD_REG_SET (needed
.regs
, set
.regs
);
1619 /* This insn isn't redundant if it conflicts with an insn that either is
1620 or will be in a delay slot of TARGET. */
1624 if (insn_sets_resource_p (XEXP (delay_list
, 0), &needed
, true))
1626 delay_list
= XEXP (delay_list
, 1);
1629 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1630 for (i
= 1; i
< XVECLEN (PATTERN (target
), 0); i
++)
1631 if (insn_sets_resource_p (XVECEXP (PATTERN (target
), 0, i
), &needed
,
1635 /* Scan backwards until we reach a label or an insn that uses something
1636 INSN sets or sets something insn uses or sets. */
1638 for (trial
= PREV_INSN (target
),
1639 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1640 trial
&& !LABEL_P (trial
) && insns_to_search
> 0;
1641 trial
= PREV_INSN (trial
))
1643 if (!INSN_P (trial
))
1647 pat
= PATTERN (trial
);
1648 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1651 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (pat
))
1653 bool annul_p
= false;
1654 rtx_insn
*control
= seq
->insn (0);
1656 /* If this is a CALL_INSN and its delay slots, it is hard to track
1657 the resource needs properly, so give up. */
1658 if (CALL_P (control
))
1661 /* If this is an INSN or JUMP_INSN with delayed effects, it
1662 is hard to track the resource needs properly, so give up. */
1664 if (INSN_SETS_ARE_DELAYED (control
))
1667 if (INSN_REFERENCES_ARE_DELAYED (control
))
1670 if (JUMP_P (control
))
1671 annul_p
= INSN_ANNULLED_BRANCH_P (control
);
1673 /* See if any of the insns in the delay slot match, updating
1674 resource requirements as we go. */
1675 for (i
= seq
->len () - 1; i
> 0; i
--)
1677 rtx candidate
= seq
->element (i
);
1679 /* If an insn will be annulled if the branch is false, it isn't
1680 considered as a possible duplicate insn. */
1681 if (rtx_equal_p (PATTERN (candidate
), ipat
)
1682 && ! (annul_p
&& INSN_FROM_TARGET_P (candidate
)))
1684 /* Show that this insn will be used in the sequel. */
1685 INSN_FROM_TARGET_P (candidate
) = 0;
1689 /* Unless this is an annulled insn from the target of a branch,
1690 we must stop if it sets anything needed or set by INSN. */
1691 if ((!annul_p
|| !INSN_FROM_TARGET_P (candidate
))
1692 && insn_sets_resource_p (candidate
, &needed
, true))
1696 /* If the insn requiring the delay slot conflicts with INSN, we
1698 if (insn_sets_resource_p (control
, &needed
, true))
1703 /* See if TRIAL is the same as INSN. */
1704 pat
= PATTERN (trial
);
1705 if (rtx_equal_p (pat
, ipat
))
1708 /* Can't go any further if TRIAL conflicts with INSN. */
1709 if (insn_sets_resource_p (trial
, &needed
, true))
1717 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1718 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1719 is nonzero, we are allowed to fall into this thread; otherwise, we are
1722 If LABEL is used more than one or we pass a label other than LABEL before
1723 finding an active insn, we do not own this thread. */
1726 own_thread_p (rtx thread
, rtx label
, int allow_fallthrough
)
1728 rtx_insn
*active_insn
;
1731 /* We don't own the function end. */
1732 if (thread
== 0 || ANY_RETURN_P (thread
))
1735 /* We have a non-NULL insn. */
1736 rtx_insn
*thread_insn
= as_a
<rtx_insn
*> (thread
);
1738 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1739 active_insn
= next_active_insn (PREV_INSN (thread_insn
));
1741 for (insn
= thread_insn
; insn
!= active_insn
; insn
= NEXT_INSN (insn
))
1743 && (insn
!= label
|| LABEL_NUSES (insn
) != 1))
1746 if (allow_fallthrough
)
1749 /* Ensure that we reach a BARRIER before any insn or label. */
1750 for (insn
= prev_nonnote_insn (thread_insn
);
1751 insn
== 0 || !BARRIER_P (insn
);
1752 insn
= prev_nonnote_insn (insn
))
1755 || (NONJUMP_INSN_P (insn
)
1756 && GET_CODE (PATTERN (insn
)) != USE
1757 && GET_CODE (PATTERN (insn
)) != CLOBBER
))
1763 /* Called when INSN is being moved from a location near the target of a jump.
1764 We leave a marker of the form (use (INSN)) immediately in front
1765 of WHERE for mark_target_live_regs. These markers will be deleted when
1768 We used to try to update the live status of registers if WHERE is at
1769 the start of a basic block, but that can't work since we may remove a
1770 BARRIER in relax_delay_slots. */
1773 update_block (rtx_insn
*insn
, rtx where
)
1775 /* Ignore if this was in a delay slot and it came from the target of
1777 if (INSN_FROM_TARGET_P (insn
))
1780 emit_insn_before (gen_rtx_USE (VOIDmode
, insn
), where
);
1782 /* INSN might be making a value live in a block where it didn't use to
1783 be. So recompute liveness information for this block. */
1785 incr_ticks_for_insn (insn
);
1788 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1789 the basic block containing the jump. */
1792 reorg_redirect_jump (rtx_insn
*jump
, rtx nlabel
)
1794 incr_ticks_for_insn (jump
);
1795 return redirect_jump (jump
, nlabel
, 1);
1798 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1799 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1800 that reference values used in INSN. If we find one, then we move the
1801 REG_DEAD note to INSN.
1803 This is needed to handle the case where a later insn (after INSN) has a
1804 REG_DEAD note for a register used by INSN, and this later insn subsequently
1805 gets moved before a CODE_LABEL because it is a redundant insn. In this
1806 case, mark_target_live_regs may be confused into thinking the register
1807 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1810 update_reg_dead_notes (rtx insn
, rtx delayed_insn
)
1814 for (p
= next_nonnote_insn (insn
); p
!= delayed_insn
;
1815 p
= next_nonnote_insn (p
))
1816 for (link
= REG_NOTES (p
); link
; link
= next
)
1818 next
= XEXP (link
, 1);
1820 if (REG_NOTE_KIND (link
) != REG_DEAD
1821 || !REG_P (XEXP (link
, 0)))
1824 if (reg_referenced_p (XEXP (link
, 0), PATTERN (insn
)))
1826 /* Move the REG_DEAD note from P to INSN. */
1827 remove_note (p
, link
);
1828 XEXP (link
, 1) = REG_NOTES (insn
);
1829 REG_NOTES (insn
) = link
;
1834 /* Called when an insn redundant with start_insn is deleted. If there
1835 is a REG_DEAD note for the target of start_insn between start_insn
1836 and stop_insn, then the REG_DEAD note needs to be deleted since the
1837 value no longer dies there.
1839 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1840 confused into thinking the register is dead. */
1843 fix_reg_dead_note (rtx start_insn
, rtx stop_insn
)
1847 for (p
= next_nonnote_insn (start_insn
); p
!= stop_insn
;
1848 p
= next_nonnote_insn (p
))
1849 for (link
= REG_NOTES (p
); link
; link
= next
)
1851 next
= XEXP (link
, 1);
1853 if (REG_NOTE_KIND (link
) != REG_DEAD
1854 || !REG_P (XEXP (link
, 0)))
1857 if (reg_set_p (XEXP (link
, 0), PATTERN (start_insn
)))
1859 remove_note (p
, link
);
1865 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1867 This handles the case of udivmodXi4 instructions which optimize their
1868 output depending on whether any REG_UNUSED notes are present.
1869 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1873 update_reg_unused_notes (rtx insn
, rtx redundant_insn
)
1877 for (link
= REG_NOTES (insn
); link
; link
= next
)
1879 next
= XEXP (link
, 1);
1881 if (REG_NOTE_KIND (link
) != REG_UNUSED
1882 || !REG_P (XEXP (link
, 0)))
1885 if (! find_regno_note (redundant_insn
, REG_UNUSED
,
1886 REGNO (XEXP (link
, 0))))
1887 remove_note (insn
, link
);
1891 static vec
<rtx
> sibling_labels
;
1893 /* Return the label before INSN, or put a new label there. If SIBLING is
1894 non-zero, it is another label associated with the new label (if any),
1895 typically the former target of the jump that will be redirected to
1899 get_label_before (rtx_insn
*insn
, rtx sibling
)
1903 /* Find an existing label at this point
1904 or make a new one if there is none. */
1905 label
= prev_nonnote_insn (insn
);
1907 if (label
== 0 || !LABEL_P (label
))
1909 rtx_insn
*prev
= PREV_INSN (insn
);
1911 label
= gen_label_rtx ();
1912 emit_label_after (label
, prev
);
1913 LABEL_NUSES (label
) = 0;
1916 sibling_labels
.safe_push (label
);
1917 sibling_labels
.safe_push (sibling
);
1923 /* Scan a function looking for insns that need a delay slot and find insns to
1924 put into the delay slot.
1926 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1927 as calls). We do these first since we don't want jump insns (that are
1928 easier to fill) to get the only insns that could be used for non-jump insns.
1929 When it is zero, only try to fill JUMP_INSNs.
1931 When slots are filled in this manner, the insns (including the
1932 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1933 it is possible to tell whether a delay slot has really been filled
1934 or not. `final' knows how to deal with this, by communicating
1935 through FINAL_SEQUENCE. */
1938 fill_simple_delay_slots (int non_jumps_p
)
1940 rtx_insn
*insn
, *trial
, *next_trial
;
1943 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
1944 struct resources needed
, set
;
1945 int slots_to_fill
, slots_filled
;
1946 rtx_insn_list
*delay_list
;
1948 for (i
= 0; i
< num_unfilled_slots
; i
++)
1951 /* Get the next insn to fill. If it has already had any slots assigned,
1952 we can't do anything with it. Maybe we'll improve this later. */
1954 insn
= unfilled_slots_base
[i
];
1957 || (NONJUMP_INSN_P (insn
)
1958 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1959 || (JUMP_P (insn
) && non_jumps_p
)
1960 || (!JUMP_P (insn
) && ! non_jumps_p
))
1963 /* It may have been that this insn used to need delay slots, but
1964 now doesn't; ignore in that case. This can happen, for example,
1965 on the HP PA RISC, where the number of delay slots depends on
1966 what insns are nearby. */
1967 slots_to_fill
= num_delay_slots (insn
);
1969 /* Some machine description have defined instructions to have
1970 delay slots only in certain circumstances which may depend on
1971 nearby insns (which change due to reorg's actions).
1973 For example, the PA port normally has delay slots for unconditional
1976 However, the PA port claims such jumps do not have a delay slot
1977 if they are immediate successors of certain CALL_INSNs. This
1978 allows the port to favor filling the delay slot of the call with
1979 the unconditional jump. */
1980 if (slots_to_fill
== 0)
1983 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1984 says how many. After initialization, first try optimizing
1987 nop add %o7,.-L1,%o7
1991 If this case applies, the delay slot of the call is filled with
1992 the unconditional jump. This is done first to avoid having the
1993 delay slot of the call filled in the backward scan. Also, since
1994 the unconditional jump is likely to also have a delay slot, that
1995 insn must exist when it is subsequently scanned.
1997 This is tried on each insn with delay slots as some machines
1998 have insns which perform calls, but are not represented as
2005 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
2007 flags
= get_jump_flags (insn
, NULL_RTX
);
2009 if ((trial
= next_active_insn (insn
))
2011 && simplejump_p (trial
)
2012 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
2013 && no_labels_between_p (insn
, trial
)
2014 && ! can_throw_internal (trial
))
2018 delay_list
= add_to_delay_list (trial
, delay_list
);
2020 /* TRIAL may have had its delay slot filled, then unfilled. When
2021 the delay slot is unfilled, TRIAL is placed back on the unfilled
2022 slots obstack. Unfortunately, it is placed on the end of the
2023 obstack, not in its original location. Therefore, we must search
2024 from entry i + 1 to the end of the unfilled slots obstack to
2025 try and find TRIAL. */
2026 tmp
= &unfilled_slots_base
[i
+ 1];
2027 while (*tmp
!= trial
&& tmp
!= unfilled_slots_next
)
2030 /* Remove the unconditional jump from consideration for delay slot
2031 filling and unthread it. */
2035 rtx_insn
*next
= NEXT_INSN (trial
);
2036 rtx_insn
*prev
= PREV_INSN (trial
);
2038 SET_NEXT_INSN (prev
) = next
;
2040 SET_PREV_INSN (next
) = prev
;
2044 /* Now, scan backwards from the insn to search for a potential
2045 delay-slot candidate. Stop searching when a label or jump is hit.
2047 For each candidate, if it is to go into the delay slot (moved
2048 forward in execution sequence), it must not need or set any resources
2049 that were set by later insns and must not set any resources that
2050 are needed for those insns.
2052 The delay slot insn itself sets resources unless it is a call
2053 (in which case the called routine, not the insn itself, is doing
2056 if (slots_filled
< slots_to_fill
)
2058 /* If the flags register is dead after the insn, then we want to be
2059 able to accept a candidate that clobbers it. For this purpose,
2060 we need to filter the flags register during life analysis, so
2061 that it doesn't create RAW and WAW dependencies, while still
2062 creating the necessary WAR dependencies. */
2064 = (slots_to_fill
== 1
2065 && targetm
.flags_regnum
!= INVALID_REGNUM
2066 && find_regno_note (insn
, REG_DEAD
, targetm
.flags_regnum
));
2067 struct resources fset
;
2068 CLEAR_RESOURCE (&needed
);
2069 CLEAR_RESOURCE (&set
);
2070 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST
);
2073 CLEAR_RESOURCE (&fset
);
2074 mark_set_resources (insn
, &fset
, 0, MARK_SRC_DEST
);
2076 mark_referenced_resources (insn
, &needed
, false);
2078 for (trial
= prev_nonnote_insn (insn
); ! stop_search_p (trial
, 1);
2081 next_trial
= prev_nonnote_insn (trial
);
2083 /* This must be an INSN or CALL_INSN. */
2084 pat
= PATTERN (trial
);
2086 /* Stand-alone USE and CLOBBER are just for flow. */
2087 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2090 /* Check for resource conflict first, to avoid unnecessary
2092 if (! insn_references_resource_p (trial
, &set
, true)
2093 && ! insn_sets_resource_p (trial
,
2094 filter_flags
? &fset
: &set
,
2096 && ! insn_sets_resource_p (trial
, &needed
, true)
2097 /* Can't separate set of cc0 from its use. */
2098 && (!HAVE_cc0
|| ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
)))
2099 && ! can_throw_internal (trial
))
2101 trial
= try_split (pat
, trial
, 1);
2102 next_trial
= prev_nonnote_insn (trial
);
2103 if (eligible_for_delay (insn
, slots_filled
, trial
, flags
))
2105 /* In this case, we are searching backward, so if we
2106 find insns to put on the delay list, we want
2107 to put them at the head, rather than the
2108 tail, of the list. */
2110 update_reg_dead_notes (trial
, insn
);
2111 delay_list
= gen_rtx_INSN_LIST (VOIDmode
,
2113 update_block (trial
, trial
);
2114 delete_related_insns (trial
);
2115 if (slots_to_fill
== ++slots_filled
)
2121 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2124 mark_set_resources (trial
, &fset
, 0, MARK_SRC_DEST_CALL
);
2125 /* If the flags register is set, then it doesn't create RAW
2126 dependencies any longer and it also doesn't create WAW
2127 dependencies since it's dead after the original insn. */
2128 if (TEST_HARD_REG_BIT (fset
.regs
, targetm
.flags_regnum
))
2130 CLEAR_HARD_REG_BIT (needed
.regs
, targetm
.flags_regnum
);
2131 CLEAR_HARD_REG_BIT (fset
.regs
, targetm
.flags_regnum
);
2134 mark_referenced_resources (trial
, &needed
, true);
2138 /* If all needed slots haven't been filled, we come here. */
2140 /* Try to optimize case of jumping around a single insn. */
2141 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2142 if (slots_filled
!= slots_to_fill
2145 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
2146 && !ANY_RETURN_P (JUMP_LABEL (insn
)))
2148 delay_list
= optimize_skip (insn
);
2154 /* Try to get insns from beyond the insn needing the delay slot.
2155 These insns can neither set or reference resources set in insns being
2156 skipped, cannot set resources in the insn being skipped, and, if this
2157 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2158 call might not return).
2160 There used to be code which continued past the target label if
2161 we saw all uses of the target label. This code did not work,
2162 because it failed to account for some instructions which were
2163 both annulled and marked as from the target. This can happen as a
2164 result of optimize_skip. Since this code was redundant with
2165 fill_eager_delay_slots anyways, it was just deleted. */
2167 if (slots_filled
!= slots_to_fill
2168 /* If this instruction could throw an exception which is
2169 caught in the same function, then it's not safe to fill
2170 the delay slot with an instruction from beyond this
2171 point. For example, consider:
2182 Even though `i' is a local variable, we must be sure not
2183 to put `i = 3' in the delay slot if `f' might throw an
2186 Presumably, we should also check to see if we could get
2187 back to this function via `setjmp'. */
2188 && ! can_throw_internal (insn
)
2191 int maybe_never
= 0;
2192 rtx pat
, trial_delay
;
2194 CLEAR_RESOURCE (&needed
);
2195 CLEAR_RESOURCE (&set
);
2196 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
2197 mark_referenced_resources (insn
, &needed
, true);
2202 for (trial
= next_nonnote_insn (insn
); !stop_search_p (trial
, 1);
2205 next_trial
= next_nonnote_insn (trial
);
2207 /* This must be an INSN or CALL_INSN. */
2208 pat
= PATTERN (trial
);
2210 /* Stand-alone USE and CLOBBER are just for flow. */
2211 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2214 /* If this already has filled delay slots, get the insn needing
2216 if (GET_CODE (pat
) == SEQUENCE
)
2217 trial_delay
= XVECEXP (pat
, 0, 0);
2219 trial_delay
= trial
;
2221 /* Stop our search when seeing a jump. */
2222 if (JUMP_P (trial_delay
))
2225 /* See if we have a resource problem before we try to split. */
2226 if (GET_CODE (pat
) != SEQUENCE
2227 && ! insn_references_resource_p (trial
, &set
, true)
2228 && ! insn_sets_resource_p (trial
, &set
, true)
2229 && ! insn_sets_resource_p (trial
, &needed
, true)
2230 && (!HAVE_cc0
&& ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
)))
2231 && ! (maybe_never
&& may_trap_or_fault_p (pat
))
2232 && (trial
= try_split (pat
, trial
, 0))
2233 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
2234 && ! can_throw_internal (trial
))
2236 next_trial
= next_nonnote_insn (trial
);
2237 delay_list
= add_to_delay_list (trial
, delay_list
);
2238 if (HAVE_cc0
&& reg_mentioned_p (cc0_rtx
, pat
))
2239 link_cc0_insns (trial
);
2241 delete_related_insns (trial
);
2242 if (slots_to_fill
== ++slots_filled
)
2247 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2248 mark_referenced_resources (trial
, &needed
, true);
2250 /* Ensure we don't put insns between the setting of cc and the
2251 comparison by moving a setting of cc into an earlier delay
2252 slot since these insns could clobber the condition code. */
2255 /* If this is a call, we might not get here. */
2256 if (CALL_P (trial_delay
))
2260 /* If there are slots left to fill and our search was stopped by an
2261 unconditional branch, try the insn at the branch target. We can
2262 redirect the branch if it works.
2264 Don't do this if the insn at the branch target is a branch. */
2265 if (slots_to_fill
!= slots_filled
2267 && jump_to_label_p (trial
)
2268 && simplejump_p (trial
)
2269 && (next_trial
= next_active_insn (JUMP_LABEL (trial
))) != 0
2270 && ! (NONJUMP_INSN_P (next_trial
)
2271 && GET_CODE (PATTERN (next_trial
)) == SEQUENCE
)
2272 && !JUMP_P (next_trial
)
2273 && ! insn_references_resource_p (next_trial
, &set
, true)
2274 && ! insn_sets_resource_p (next_trial
, &set
, true)
2275 && ! insn_sets_resource_p (next_trial
, &needed
, true)
2276 && (!HAVE_cc0
|| ! reg_mentioned_p (cc0_rtx
, PATTERN (next_trial
)))
2277 && ! (maybe_never
&& may_trap_or_fault_p (PATTERN (next_trial
)))
2278 && (next_trial
= try_split (PATTERN (next_trial
), next_trial
, 0))
2279 && eligible_for_delay (insn
, slots_filled
, next_trial
, flags
)
2280 && ! can_throw_internal (trial
))
2282 /* See comment in relax_delay_slots about necessity of using
2283 next_real_insn here. */
2284 rtx_insn
*new_label
= next_real_insn (next_trial
);
2287 new_label
= get_label_before (new_label
, JUMP_LABEL (trial
));
2289 new_label
= find_end_label (simple_return_rtx
);
2294 = add_to_delay_list (copy_delay_slot_insn (next_trial
),
2297 reorg_redirect_jump (trial
, new_label
);
2302 /* If this is an unconditional jump, then try to get insns from the
2303 target of the jump. */
2305 && simplejump_p (insn
)
2306 && slots_filled
!= slots_to_fill
)
2308 = fill_slots_from_thread (insn
, const_true_rtx
,
2309 next_active_insn (JUMP_LABEL (insn
)),
2311 own_thread_p (JUMP_LABEL (insn
),
2312 JUMP_LABEL (insn
), 0),
2313 slots_to_fill
, &slots_filled
,
2317 unfilled_slots_base
[i
]
2318 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2320 if (slots_to_fill
== slots_filled
)
2321 unfilled_slots_base
[i
] = 0;
2323 note_delay_statistics (slots_filled
, 0);
2327 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2328 return the ultimate label reached by any such chain of jumps.
2329 Return a suitable return rtx if the chain ultimately leads to a
2331 If LABEL is not followed by a jump, return LABEL.
2332 If the chain loops or we can't find end, return LABEL,
2333 since that tells caller to avoid changing the insn.
2334 If the returned label is obtained by following a crossing jump,
2335 set *CROSSING to true, otherwise set it to false. */
2338 follow_jumps (rtx label
, rtx_insn
*jump
, bool *crossing
)
2345 if (ANY_RETURN_P (label
))
2348 rtx_insn
*value
= as_a
<rtx_insn
*> (label
);
2352 && (insn
= next_active_insn (value
)) != 0
2354 && JUMP_LABEL (insn
) != NULL_RTX
2355 && ((any_uncondjump_p (insn
) && onlyjump_p (insn
))
2356 || ANY_RETURN_P (PATTERN (insn
)))
2357 && (next
= NEXT_INSN (insn
))
2358 && BARRIER_P (next
));
2361 rtx this_label_or_return
= JUMP_LABEL (insn
);
2363 /* If we have found a cycle, make the insn jump to itself. */
2364 if (this_label_or_return
== label
)
2367 /* Cannot follow returns and cannot look through tablejumps. */
2368 if (ANY_RETURN_P (this_label_or_return
))
2369 return this_label_or_return
;
2371 rtx_insn
*this_label
= as_a
<rtx_insn
*> (this_label_or_return
);
2372 if (NEXT_INSN (this_label
)
2373 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label
)))
2376 if (!targetm
.can_follow_jump (jump
, insn
))
2379 *crossing
= CROSSING_JUMP_P (jump
);
2387 /* Try to find insns to place in delay slots.
2389 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2390 or is an unconditional branch if CONDITION is const_true_rtx.
2391 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2393 THREAD is a flow-of-control, either the insns to be executed if the
2394 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2396 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2397 to see if any potential delay slot insns set things needed there.
2399 LIKELY is nonzero if it is extremely likely that the branch will be
2400 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2401 end of a loop back up to the top.
2403 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2404 thread. I.e., it is the fallthrough code of our jump or the target of the
2405 jump when we are the only jump going there.
2407 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2408 case, we can only take insns from the head of the thread for our delay
2409 slot. We then adjust the jump to point after the insns we have taken. */
2411 static rtx_insn_list
*
2412 fill_slots_from_thread (rtx_insn
*insn
, rtx condition
, rtx thread_or_return
,
2413 rtx opposite_thread
, int likely
,
2415 int own_thread
, int slots_to_fill
,
2416 int *pslots_filled
, rtx_insn_list
*delay_list
)
2419 struct resources opposite_needed
, set
, needed
;
2425 /* Validate our arguments. */
2426 gcc_assert (condition
!= const_true_rtx
|| thread_if_true
);
2427 gcc_assert (own_thread
|| thread_if_true
);
2429 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
2431 /* If our thread is the end of subroutine, we can't get any delay
2433 if (thread_or_return
== NULL_RTX
|| ANY_RETURN_P (thread_or_return
))
2436 rtx_insn
*thread
= as_a
<rtx_insn
*> (thread_or_return
);
2438 /* If this is an unconditional branch, nothing is needed at the
2439 opposite thread. Otherwise, compute what is needed there. */
2440 if (condition
== const_true_rtx
)
2441 CLEAR_RESOURCE (&opposite_needed
);
2443 mark_target_live_regs (get_insns (), opposite_thread
, &opposite_needed
);
2445 /* If the insn at THREAD can be split, do it here to avoid having to
2446 update THREAD and NEW_THREAD if it is done in the loop below. Also
2447 initialize NEW_THREAD. */
2449 new_thread
= thread
= try_split (PATTERN (thread
), thread
, 0);
2451 /* Scan insns at THREAD. We are looking for an insn that can be removed
2452 from THREAD (it neither sets nor references resources that were set
2453 ahead of it and it doesn't set anything needs by the insns ahead of
2454 it) and that either can be placed in an annulling insn or aren't
2455 needed at OPPOSITE_THREAD. */
2457 CLEAR_RESOURCE (&needed
);
2458 CLEAR_RESOURCE (&set
);
2460 /* If we do not own this thread, we must stop as soon as we find
2461 something that we can't put in a delay slot, since all we can do
2462 is branch into THREAD at a later point. Therefore, labels stop
2463 the search if this is not the `true' thread. */
2465 for (trial
= thread
;
2466 ! stop_search_p (trial
, ! thread_if_true
) && (! lose
|| own_thread
);
2467 trial
= next_nonnote_insn (trial
))
2471 /* If we have passed a label, we no longer own this thread. */
2472 if (LABEL_P (trial
))
2478 pat
= PATTERN (trial
);
2479 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2482 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2483 don't separate or copy insns that set and use CC0. */
2484 if (! insn_references_resource_p (trial
, &set
, true)
2485 && ! insn_sets_resource_p (trial
, &set
, true)
2486 && ! insn_sets_resource_p (trial
, &needed
, true)
2487 && (!HAVE_cc0
|| (! (reg_mentioned_p (cc0_rtx
, pat
)
2488 && (! own_thread
|| ! sets_cc0_p (pat
)))))
2489 && ! can_throw_internal (trial
))
2493 /* If TRIAL is redundant with some insn before INSN, we don't
2494 actually need to add it to the delay list; we can merely pretend
2496 if ((prior_insn
= redundant_insn (trial
, insn
, delay_list
)))
2498 fix_reg_dead_note (prior_insn
, insn
);
2501 update_block (trial
, thread
);
2502 if (trial
== thread
)
2504 thread
= next_active_insn (thread
);
2505 if (new_thread
== trial
)
2506 new_thread
= thread
;
2509 delete_related_insns (trial
);
2513 update_reg_unused_notes (prior_insn
, trial
);
2514 new_thread
= next_active_insn (trial
);
2520 /* There are two ways we can win: If TRIAL doesn't set anything
2521 needed at the opposite thread and can't trap, or if it can
2522 go into an annulled delay slot. But we want neither to copy
2523 nor to speculate frame-related insns. */
2525 && ((condition
== const_true_rtx
2526 && (own_thread
|| !RTX_FRAME_RELATED_P (trial
)))
2527 || (! insn_sets_resource_p (trial
, &opposite_needed
, true)
2528 && ! may_trap_or_fault_p (pat
)
2529 && ! RTX_FRAME_RELATED_P (trial
))))
2532 trial
= try_split (pat
, trial
, 0);
2533 if (new_thread
== old_trial
)
2535 if (thread
== old_trial
)
2537 pat
= PATTERN (trial
);
2538 if (eligible_for_delay (insn
, *pslots_filled
, trial
, flags
))
2542 #ifdef ANNUL_IFTRUE_SLOTS
2545 #ifdef ANNUL_IFFALSE_SLOTS
2551 trial
= try_split (pat
, trial
, 0);
2552 if (new_thread
== old_trial
)
2554 if (thread
== old_trial
)
2556 pat
= PATTERN (trial
);
2557 if ((must_annul
|| delay_list
== NULL
) && (thread_if_true
2558 ? check_annul_list_true_false (0, delay_list
)
2559 && eligible_for_annul_false (insn
, *pslots_filled
, trial
, flags
)
2560 : check_annul_list_true_false (1, delay_list
)
2561 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
2568 if (HAVE_cc0
&& reg_mentioned_p (cc0_rtx
, pat
))
2569 link_cc0_insns (trial
);
2571 /* If we own this thread, delete the insn. If this is the
2572 destination of a branch, show that a basic block status
2573 may have been updated. In any case, mark the new
2574 starting point of this thread. */
2579 update_block (trial
, thread
);
2580 if (trial
== thread
)
2582 thread
= next_active_insn (thread
);
2583 if (new_thread
== trial
)
2584 new_thread
= thread
;
2587 /* We are moving this insn, not deleting it. We must
2588 temporarily increment the use count on any referenced
2589 label lest it be deleted by delete_related_insns. */
2590 for (note
= REG_NOTES (trial
);
2592 note
= XEXP (note
, 1))
2593 if (REG_NOTE_KIND (note
) == REG_LABEL_OPERAND
2594 || REG_NOTE_KIND (note
) == REG_LABEL_TARGET
)
2596 /* REG_LABEL_OPERAND could be
2597 NOTE_INSN_DELETED_LABEL too. */
2598 if (LABEL_P (XEXP (note
, 0)))
2599 LABEL_NUSES (XEXP (note
, 0))++;
2601 gcc_assert (REG_NOTE_KIND (note
)
2602 == REG_LABEL_OPERAND
);
2604 if (jump_to_label_p (trial
))
2605 LABEL_NUSES (JUMP_LABEL (trial
))++;
2607 delete_related_insns (trial
);
2609 for (note
= REG_NOTES (trial
);
2611 note
= XEXP (note
, 1))
2612 if (REG_NOTE_KIND (note
) == REG_LABEL_OPERAND
2613 || REG_NOTE_KIND (note
) == REG_LABEL_TARGET
)
2615 /* REG_LABEL_OPERAND could be
2616 NOTE_INSN_DELETED_LABEL too. */
2617 if (LABEL_P (XEXP (note
, 0)))
2618 LABEL_NUSES (XEXP (note
, 0))--;
2620 gcc_assert (REG_NOTE_KIND (note
)
2621 == REG_LABEL_OPERAND
);
2623 if (jump_to_label_p (trial
))
2624 LABEL_NUSES (JUMP_LABEL (trial
))--;
2627 new_thread
= next_active_insn (trial
);
2629 temp
= own_thread
? trial
: copy_delay_slot_insn (trial
);
2631 INSN_FROM_TARGET_P (temp
) = 1;
2633 delay_list
= add_to_delay_list (temp
, delay_list
);
2635 if (slots_to_fill
== ++(*pslots_filled
))
2637 /* Even though we have filled all the slots, we
2638 may be branching to a location that has a
2639 redundant insn. Skip any if so. */
2640 while (new_thread
&& ! own_thread
2641 && ! insn_sets_resource_p (new_thread
, &set
, true)
2642 && ! insn_sets_resource_p (new_thread
, &needed
,
2644 && ! insn_references_resource_p (new_thread
,
2647 = redundant_insn (new_thread
, insn
,
2650 /* We know we do not own the thread, so no need
2651 to call update_block and delete_insn. */
2652 fix_reg_dead_note (prior_insn
, insn
);
2653 update_reg_unused_notes (prior_insn
, new_thread
);
2654 new_thread
= next_active_insn (new_thread
);
2664 /* This insn can't go into a delay slot. */
2666 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2667 mark_referenced_resources (trial
, &needed
, true);
2669 /* Ensure we don't put insns between the setting of cc and the comparison
2670 by moving a setting of cc into an earlier delay slot since these insns
2671 could clobber the condition code. */
2674 /* If this insn is a register-register copy and the next insn has
2675 a use of our destination, change it to use our source. That way,
2676 it will become a candidate for our delay slot the next time
2677 through this loop. This case occurs commonly in loops that
2680 We could check for more complex cases than those tested below,
2681 but it doesn't seem worth it. It might also be a good idea to try
2682 to swap the two insns. That might do better.
2684 We can't do this if the next insn modifies our destination, because
2685 that would make the replacement into the insn invalid. We also can't
2686 do this if it modifies our source, because it might be an earlyclobber
2687 operand. This latter test also prevents updating the contents of
2688 a PRE_INC. We also can't do this if there's overlap of source and
2689 destination. Overlap may happen for larger-than-register-size modes. */
2691 if (NONJUMP_INSN_P (trial
) && GET_CODE (pat
) == SET
2692 && REG_P (SET_SRC (pat
))
2693 && REG_P (SET_DEST (pat
))
2694 && !reg_overlap_mentioned_p (SET_DEST (pat
), SET_SRC (pat
)))
2696 rtx next
= next_nonnote_insn (trial
);
2698 if (next
&& NONJUMP_INSN_P (next
)
2699 && GET_CODE (PATTERN (next
)) != USE
2700 && ! reg_set_p (SET_DEST (pat
), next
)
2701 && ! reg_set_p (SET_SRC (pat
), next
)
2702 && reg_referenced_p (SET_DEST (pat
), PATTERN (next
))
2703 && ! modified_in_p (SET_DEST (pat
), next
))
2704 validate_replace_rtx (SET_DEST (pat
), SET_SRC (pat
), next
);
2708 /* If we stopped on a branch insn that has delay slots, see if we can
2709 steal some of the insns in those slots. */
2710 if (trial
&& NONJUMP_INSN_P (trial
)
2711 && GET_CODE (PATTERN (trial
)) == SEQUENCE
2712 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0)))
2714 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (trial
));
2715 /* If this is the `true' thread, we will want to follow the jump,
2716 so we can only do this if we have taken everything up to here. */
2717 if (thread_if_true
&& trial
== new_thread
)
2720 = steal_delay_list_from_target (insn
, condition
, sequence
,
2721 delay_list
, &set
, &needed
,
2722 &opposite_needed
, slots_to_fill
,
2723 pslots_filled
, &must_annul
,
2725 /* If we owned the thread and are told that it branched
2726 elsewhere, make sure we own the thread at the new location. */
2727 if (own_thread
&& trial
!= new_thread
)
2728 own_thread
= own_thread_p (new_thread
, new_thread
, 0);
2730 else if (! thread_if_true
)
2732 = steal_delay_list_from_fallthrough (insn
, condition
,
2734 delay_list
, &set
, &needed
,
2735 &opposite_needed
, slots_to_fill
,
2736 pslots_filled
, &must_annul
);
2739 /* If we haven't found anything for this delay slot and it is very
2740 likely that the branch will be taken, see if the insn at our target
2741 increments or decrements a register with an increment that does not
2742 depend on the destination register. If so, try to place the opposite
2743 arithmetic insn after the jump insn and put the arithmetic insn in the
2744 delay slot. If we can't do this, return. */
2745 if (delay_list
== 0 && likely
2746 && new_thread
&& !ANY_RETURN_P (new_thread
)
2747 && NONJUMP_INSN_P (new_thread
)
2748 && !RTX_FRAME_RELATED_P (new_thread
)
2749 && GET_CODE (PATTERN (new_thread
)) != ASM_INPUT
2750 && asm_noperands (PATTERN (new_thread
)) < 0)
2752 rtx pat
= PATTERN (new_thread
);
2756 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2758 trial
= as_a
<rtx_insn
*> (new_thread
);
2759 pat
= PATTERN (trial
);
2761 if (!NONJUMP_INSN_P (trial
)
2762 || GET_CODE (pat
) != SET
2763 || ! eligible_for_delay (insn
, 0, trial
, flags
)
2764 || can_throw_internal (trial
))
2767 dest
= SET_DEST (pat
), src
= SET_SRC (pat
);
2768 if ((GET_CODE (src
) == PLUS
|| GET_CODE (src
) == MINUS
)
2769 && rtx_equal_p (XEXP (src
, 0), dest
)
2770 && (!FLOAT_MODE_P (GET_MODE (src
))
2771 || flag_unsafe_math_optimizations
)
2772 && ! reg_overlap_mentioned_p (dest
, XEXP (src
, 1))
2773 && ! side_effects_p (pat
))
2775 rtx other
= XEXP (src
, 1);
2779 /* If this is a constant adjustment, use the same code with
2780 the negated constant. Otherwise, reverse the sense of the
2782 if (CONST_INT_P (other
))
2783 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
), GET_MODE (src
), dest
,
2784 negate_rtx (GET_MODE (src
), other
));
2786 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
) == PLUS
? MINUS
: PLUS
,
2787 GET_MODE (src
), dest
, other
);
2789 ninsn
= emit_insn_after (gen_rtx_SET (VOIDmode
, dest
, new_arith
),
2792 if (recog_memoized (ninsn
) < 0
2793 || (extract_insn (ninsn
),
2794 !constrain_operands (1, get_preferred_alternatives (ninsn
))))
2796 delete_related_insns (ninsn
);
2802 update_block (trial
, thread
);
2803 if (trial
== thread
)
2805 thread
= next_active_insn (thread
);
2806 if (new_thread
== trial
)
2807 new_thread
= thread
;
2809 delete_related_insns (trial
);
2812 new_thread
= next_active_insn (trial
);
2814 ninsn
= own_thread
? trial
: copy_delay_slot_insn (trial
);
2816 INSN_FROM_TARGET_P (ninsn
) = 1;
2818 delay_list
= add_to_delay_list (ninsn
, NULL
);
2823 if (delay_list
&& must_annul
)
2824 INSN_ANNULLED_BRANCH_P (insn
) = 1;
2826 /* If we are to branch into the middle of this thread, find an appropriate
2827 label or make a new one if none, and redirect INSN to it. If we hit the
2828 end of the function, use the end-of-function label. */
2829 if (new_thread
!= thread
)
2832 bool crossing
= false;
2834 gcc_assert (thread_if_true
);
2836 if (new_thread
&& simplejump_or_return_p (new_thread
)
2837 && redirect_with_delay_list_safe_p (insn
,
2838 JUMP_LABEL (new_thread
),
2840 new_thread
= follow_jumps (JUMP_LABEL (new_thread
), insn
,
2843 if (ANY_RETURN_P (new_thread
))
2844 label
= find_end_label (new_thread
);
2845 else if (LABEL_P (new_thread
))
2848 label
= get_label_before (as_a
<rtx_insn
*> (new_thread
),
2853 reorg_redirect_jump (insn
, label
);
2855 CROSSING_JUMP_P (insn
) = 1;
2862 /* Make another attempt to find insns to place in delay slots.
2864 We previously looked for insns located in front of the delay insn
2865 and, for non-jump delay insns, located behind the delay insn.
2867 Here only try to schedule jump insns and try to move insns from either
2868 the target or the following insns into the delay slot. If annulling is
2869 supported, we will be likely to do this. Otherwise, we can do this only
2873 fill_eager_delay_slots (void)
2877 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
2879 for (i
= 0; i
< num_unfilled_slots
; i
++)
2882 rtx target_label
, insn_at_target
;
2883 rtx_insn
*fallthrough_insn
;
2884 rtx_insn_list
*delay_list
= 0;
2886 int own_fallthrough
;
2887 int prediction
, slots_to_fill
, slots_filled
;
2889 insn
= unfilled_slots_base
[i
];
2893 || ! (condjump_p (insn
) || condjump_in_parallel_p (insn
)))
2896 slots_to_fill
= num_delay_slots (insn
);
2897 /* Some machine description have defined instructions to have
2898 delay slots only in certain circumstances which may depend on
2899 nearby insns (which change due to reorg's actions).
2901 For example, the PA port normally has delay slots for unconditional
2904 However, the PA port claims such jumps do not have a delay slot
2905 if they are immediate successors of certain CALL_INSNs. This
2906 allows the port to favor filling the delay slot of the call with
2907 the unconditional jump. */
2908 if (slots_to_fill
== 0)
2912 target_label
= JUMP_LABEL (insn
);
2913 condition
= get_branch_condition (insn
, target_label
);
2918 /* Get the next active fallthrough and target insns and see if we own
2919 them. Then see whether the branch is likely true. We don't need
2920 to do a lot of this for unconditional branches. */
2922 insn_at_target
= first_active_target_insn (target_label
);
2923 own_target
= own_thread_p (target_label
, target_label
, 0);
2925 if (condition
== const_true_rtx
)
2927 own_fallthrough
= 0;
2928 fallthrough_insn
= 0;
2933 fallthrough_insn
= next_active_insn (insn
);
2934 own_fallthrough
= own_thread_p (NEXT_INSN (insn
), NULL_RTX
, 1);
2935 prediction
= mostly_true_jump (insn
);
2938 /* If this insn is expected to branch, first try to get insns from our
2939 target, then our fallthrough insns. If it is not expected to branch,
2940 try the other order. */
2945 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2946 fallthrough_insn
, prediction
== 2, 1,
2948 slots_to_fill
, &slots_filled
, delay_list
);
2950 if (delay_list
== 0 && own_fallthrough
)
2952 /* Even though we didn't find anything for delay slots,
2953 we might have found a redundant insn which we deleted
2954 from the thread that was filled. So we have to recompute
2955 the next insn at the target. */
2956 target_label
= JUMP_LABEL (insn
);
2957 insn_at_target
= first_active_target_insn (target_label
);
2960 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
2961 insn_at_target
, 0, 0,
2963 slots_to_fill
, &slots_filled
,
2969 if (own_fallthrough
)
2971 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
2972 insn_at_target
, 0, 0,
2974 slots_to_fill
, &slots_filled
,
2977 if (delay_list
== 0)
2979 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2980 next_active_insn (insn
), 0, 1,
2982 slots_to_fill
, &slots_filled
,
2987 unfilled_slots_base
[i
]
2988 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2990 if (slots_to_fill
== slots_filled
)
2991 unfilled_slots_base
[i
] = 0;
2993 note_delay_statistics (slots_filled
, 1);
2997 static void delete_computation (rtx insn
);
2999 /* Recursively delete prior insns that compute the value (used only by INSN
3000 which the caller is deleting) stored in the register mentioned by NOTE
3001 which is a REG_DEAD note associated with INSN. */
3004 delete_prior_computation (rtx note
, rtx insn
)
3007 rtx reg
= XEXP (note
, 0);
3009 for (our_prev
= prev_nonnote_insn (insn
);
3010 our_prev
&& (NONJUMP_INSN_P (our_prev
)
3011 || CALL_P (our_prev
));
3012 our_prev
= prev_nonnote_insn (our_prev
))
3014 rtx pat
= PATTERN (our_prev
);
3016 /* If we reach a CALL which is not calling a const function
3017 or the callee pops the arguments, then give up. */
3018 if (CALL_P (our_prev
)
3019 && (! RTL_CONST_CALL_P (our_prev
)
3020 || GET_CODE (pat
) != SET
|| GET_CODE (SET_SRC (pat
)) != CALL
))
3023 /* If we reach a SEQUENCE, it is too complex to try to
3024 do anything with it, so give up. We can be run during
3025 and after reorg, so SEQUENCE rtl can legitimately show
3027 if (GET_CODE (pat
) == SEQUENCE
)
3030 if (GET_CODE (pat
) == USE
3031 && NONJUMP_INSN_P (XEXP (pat
, 0)))
3032 /* reorg creates USEs that look like this. We leave them
3033 alone because reorg needs them for its own purposes. */
3036 if (reg_set_p (reg
, pat
))
3038 if (side_effects_p (pat
) && !CALL_P (our_prev
))
3041 if (GET_CODE (pat
) == PARALLEL
)
3043 /* If we find a SET of something else, we can't
3048 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3050 rtx part
= XVECEXP (pat
, 0, i
);
3052 if (GET_CODE (part
) == SET
3053 && SET_DEST (part
) != reg
)
3057 if (i
== XVECLEN (pat
, 0))
3058 delete_computation (our_prev
);
3060 else if (GET_CODE (pat
) == SET
3061 && REG_P (SET_DEST (pat
)))
3063 int dest_regno
= REGNO (SET_DEST (pat
));
3064 int dest_endregno
= END_REGNO (SET_DEST (pat
));
3065 int regno
= REGNO (reg
);
3066 int endregno
= END_REGNO (reg
);
3068 if (dest_regno
>= regno
3069 && dest_endregno
<= endregno
)
3070 delete_computation (our_prev
);
3072 /* We may have a multi-word hard register and some, but not
3073 all, of the words of the register are needed in subsequent
3074 insns. Write REG_UNUSED notes for those parts that were not
3076 else if (dest_regno
<= regno
3077 && dest_endregno
>= endregno
)
3081 add_reg_note (our_prev
, REG_UNUSED
, reg
);
3083 for (i
= dest_regno
; i
< dest_endregno
; i
++)
3084 if (! find_regno_note (our_prev
, REG_UNUSED
, i
))
3087 if (i
== dest_endregno
)
3088 delete_computation (our_prev
);
3095 /* If PAT references the register that dies here, it is an
3096 additional use. Hence any prior SET isn't dead. However, this
3097 insn becomes the new place for the REG_DEAD note. */
3098 if (reg_overlap_mentioned_p (reg
, pat
))
3100 XEXP (note
, 1) = REG_NOTES (our_prev
);
3101 REG_NOTES (our_prev
) = note
;
3107 /* Delete INSN and recursively delete insns that compute values used only
3108 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3110 Look at all our REG_DEAD notes. If a previous insn does nothing other
3111 than set a register that dies in this insn, we can delete that insn
3114 On machines with CC0, if CC0 is used in this insn, we may be able to
3115 delete the insn that set it. */
3118 delete_computation (rtx insn
)
3122 if (HAVE_cc0
&& reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
3124 rtx prev
= prev_nonnote_insn (insn
);
3125 /* We assume that at this stage
3126 CC's are always set explicitly
3127 and always immediately before the jump that
3128 will use them. So if the previous insn
3129 exists to set the CC's, delete it
3130 (unless it performs auto-increments, etc.). */
3131 if (prev
&& NONJUMP_INSN_P (prev
)
3132 && sets_cc0_p (PATTERN (prev
)))
3134 if (sets_cc0_p (PATTERN (prev
)) > 0
3135 && ! side_effects_p (PATTERN (prev
)))
3136 delete_computation (prev
);
3138 /* Otherwise, show that cc0 won't be used. */
3139 add_reg_note (prev
, REG_UNUSED
, cc0_rtx
);
3143 for (note
= REG_NOTES (insn
); note
; note
= next
)
3145 next
= XEXP (note
, 1);
3147 if (REG_NOTE_KIND (note
) != REG_DEAD
3148 /* Verify that the REG_NOTE is legitimate. */
3149 || !REG_P (XEXP (note
, 0)))
3152 delete_prior_computation (note
, insn
);
3155 delete_related_insns (insn
);
3158 /* If all INSN does is set the pc, delete it,
3159 and delete the insn that set the condition codes for it
3160 if that's what the previous thing was. */
3163 delete_jump (rtx_insn
*insn
)
3165 rtx set
= single_set (insn
);
3167 if (set
&& GET_CODE (SET_DEST (set
)) == PC
)
3168 delete_computation (insn
);
3172 label_before_next_insn (rtx x
, rtx scan_limit
)
3174 rtx_insn
*insn
= next_active_insn (x
);
3177 insn
= PREV_INSN (insn
);
3178 if (insn
== scan_limit
|| insn
== NULL_RTX
)
3186 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3190 switch_text_sections_between_p (const rtx_insn
*beg
, const rtx_insn
*end
)
3193 for (p
= beg
; p
!= end
; p
= NEXT_INSN (p
))
3194 if (NOTE_P (p
) && NOTE_KIND (p
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
3200 /* Once we have tried two ways to fill a delay slot, make a pass over the
3201 code to try to improve the results and to do such things as more jump
3205 relax_delay_slots (rtx_insn
*first
)
3207 rtx_insn
*insn
, *next
;
3210 rtx_insn
*delay_insn
;
3213 /* Look at every JUMP_INSN and see if we can improve it. */
3214 for (insn
= first
; insn
; insn
= next
)
3219 next
= next_active_insn (insn
);
3221 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3222 the next insn, or jumps to a label that is not the last of a
3223 group of consecutive labels. */
3225 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3226 && !ANY_RETURN_P (target_label
= JUMP_LABEL (insn
)))
3229 = skip_consecutive_labels (follow_jumps (target_label
, insn
,
3231 if (ANY_RETURN_P (target_label
))
3232 target_label
= find_end_label (target_label
);
3234 if (target_label
&& next_active_insn (target_label
) == next
3235 && ! condjump_in_parallel_p (insn
)
3236 && ! (next
&& switch_text_sections_between_p (insn
, next
)))
3242 if (target_label
&& target_label
!= JUMP_LABEL (insn
))
3244 reorg_redirect_jump (insn
, target_label
);
3246 CROSSING_JUMP_P (insn
) = 1;
3249 /* See if this jump conditionally branches around an unconditional
3250 jump. If so, invert this jump and point it to the target of the
3251 second jump. Check if it's possible on the target. */
3252 if (next
&& simplejump_or_return_p (next
)
3253 && any_condjump_p (insn
)
3255 && next_active_insn (target_label
) == next_active_insn (next
)
3256 && no_labels_between_p (insn
, next
)
3257 && targetm
.can_follow_jump (insn
, next
))
3259 rtx label
= JUMP_LABEL (next
);
3261 /* Be careful how we do this to avoid deleting code or
3262 labels that are momentarily dead. See similar optimization
3265 We also need to ensure we properly handle the case when
3266 invert_jump fails. */
3268 ++LABEL_NUSES (target_label
);
3269 if (!ANY_RETURN_P (label
))
3270 ++LABEL_NUSES (label
);
3272 if (invert_jump (insn
, label
, 1))
3274 delete_related_insns (next
);
3278 if (!ANY_RETURN_P (label
))
3279 --LABEL_NUSES (label
);
3281 if (--LABEL_NUSES (target_label
) == 0)
3282 delete_related_insns (target_label
);
3288 /* If this is an unconditional jump and the previous insn is a
3289 conditional jump, try reversing the condition of the previous
3290 insn and swapping our targets. The next pass might be able to
3293 Don't do this if we expect the conditional branch to be true, because
3294 we would then be making the more common case longer. */
3296 if (simplejump_or_return_p (insn
)
3297 && (other
= prev_active_insn (insn
)) != 0
3298 && any_condjump_p (other
)
3299 && no_labels_between_p (other
, insn
)
3300 && 0 > mostly_true_jump (other
))
3302 rtx other_target
= JUMP_LABEL (other
);
3303 target_label
= JUMP_LABEL (insn
);
3305 if (invert_jump (other
, target_label
, 0))
3306 reorg_redirect_jump (insn
, other_target
);
3309 /* Now look only at cases where we have a filled delay slot. */
3310 if (!NONJUMP_INSN_P (insn
) || GET_CODE (PATTERN (insn
)) != SEQUENCE
)
3313 pat
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3314 delay_insn
= pat
->insn (0);
3316 /* See if the first insn in the delay slot is redundant with some
3317 previous insn. Remove it from the delay slot if so; then set up
3318 to reprocess this insn. */
3319 if (redundant_insn (pat
->insn (1), delay_insn
, 0))
3321 update_block (pat
->insn (1), insn
);
3322 delete_from_delay_slot (pat
->insn (1));
3323 next
= prev_active_insn (next
);
3327 /* See if we have a RETURN insn with a filled delay slot followed
3328 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3329 the first RETURN (but not its delay insn). This gives the same
3330 effect in fewer instructions.
3332 Only do so if optimizing for size since this results in slower, but
3334 if (optimize_function_for_size_p (cfun
)
3335 && ANY_RETURN_P (PATTERN (delay_insn
))
3338 && PATTERN (next
) == PATTERN (delay_insn
))
3343 /* Delete the RETURN and just execute the delay list insns.
3345 We do this by deleting the INSN containing the SEQUENCE, then
3346 re-emitting the insns separately, and then deleting the RETURN.
3347 This allows the count of the jump target to be properly
3350 Note that we need to change the INSN_UID of the re-emitted insns
3351 since it is used to hash the insns for mark_target_live_regs and
3352 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3354 Clear the from target bit, since these insns are no longer
3356 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3357 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3359 trial
= PREV_INSN (insn
);
3360 delete_related_insns (insn
);
3361 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3362 add_insn_after (delay_insn
, trial
, NULL
);
3364 for (i
= 1; i
< pat
->len (); i
++)
3365 after
= emit_copy_of_insn_after (pat
->insn (i
), after
);
3366 delete_scheduled_jump (delay_insn
);
3370 /* Now look only at the cases where we have a filled JUMP_INSN. */
3371 if (!JUMP_P (delay_insn
)
3372 || !(condjump_p (delay_insn
) || condjump_in_parallel_p (delay_insn
)))
3375 target_label
= JUMP_LABEL (delay_insn
);
3376 if (target_label
&& ANY_RETURN_P (target_label
))
3379 /* If this jump goes to another unconditional jump, thread it, but
3380 don't convert a jump into a RETURN here. */
3381 trial
= skip_consecutive_labels (follow_jumps (target_label
, delay_insn
,
3383 if (ANY_RETURN_P (trial
))
3384 trial
= find_end_label (trial
);
3386 if (trial
&& trial
!= target_label
3387 && redirect_with_delay_slots_safe_p (delay_insn
, trial
, insn
))
3389 reorg_redirect_jump (delay_insn
, trial
);
3390 target_label
= trial
;
3392 CROSSING_JUMP_P (insn
) = 1;
3395 /* If the first insn at TARGET_LABEL is redundant with a previous
3396 insn, redirect the jump to the following insn and process again.
3397 We use next_real_insn instead of next_active_insn so we
3398 don't skip USE-markers, or we'll end up with incorrect
3400 trial
= next_real_insn (target_label
);
3401 if (trial
&& GET_CODE (PATTERN (trial
)) != SEQUENCE
3402 && redundant_insn (trial
, insn
, 0)
3403 && ! can_throw_internal (trial
))
3405 /* Figure out where to emit the special USE insn so we don't
3406 later incorrectly compute register live/death info. */
3407 rtx_insn
*tmp
= next_active_insn (trial
);
3409 tmp
= find_end_label (simple_return_rtx
);
3413 /* Insert the special USE insn and update dataflow info.
3414 We know "trial" is an insn here as it is the output of
3415 next_real_insn () above. */
3416 update_block (as_a
<rtx_insn
*> (trial
), tmp
);
3418 /* Now emit a label before the special USE insn, and
3419 redirect our jump to the new label. */
3420 target_label
= get_label_before (PREV_INSN (tmp
), target_label
);
3421 reorg_redirect_jump (delay_insn
, target_label
);
3427 /* Similarly, if it is an unconditional jump with one insn in its
3428 delay list and that insn is redundant, thread the jump. */
3429 rtx_sequence
*trial_seq
=
3430 trial
? dyn_cast
<rtx_sequence
*> (PATTERN (trial
)) : NULL
;
3432 && trial_seq
->len () == 2
3433 && JUMP_P (trial_seq
->insn (0))
3434 && simplejump_or_return_p (trial_seq
->insn (0))
3435 && redundant_insn (trial_seq
->insn (1), insn
, 0))
3437 target_label
= JUMP_LABEL (trial_seq
->insn (0));
3438 if (ANY_RETURN_P (target_label
))
3439 target_label
= find_end_label (target_label
);
3442 && redirect_with_delay_slots_safe_p (delay_insn
, target_label
,
3445 update_block (trial_seq
->insn (1), insn
);
3446 reorg_redirect_jump (delay_insn
, target_label
);
3452 /* See if we have a simple (conditional) jump that is useless. */
3453 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3454 && ! condjump_in_parallel_p (delay_insn
)
3455 && prev_active_insn (target_label
) == insn
3456 && ! BARRIER_P (prev_nonnote_insn (target_label
))
3458 /* If the last insn in the delay slot sets CC0 for some insn,
3459 various code assumes that it is in a delay slot. We could
3460 put it back where it belonged and delete the register notes,
3461 but it doesn't seem worthwhile in this uncommon case. */
3462 && ! find_reg_note (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1),
3463 REG_CC_USER
, NULL_RTX
)
3470 /* All this insn does is execute its delay list and jump to the
3471 following insn. So delete the jump and just execute the delay
3474 We do this by deleting the INSN containing the SEQUENCE, then
3475 re-emitting the insns separately, and then deleting the jump.
3476 This allows the count of the jump target to be properly
3479 Note that we need to change the INSN_UID of the re-emitted insns
3480 since it is used to hash the insns for mark_target_live_regs and
3481 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3483 Clear the from target bit, since these insns are no longer
3485 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3486 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3488 trial
= PREV_INSN (insn
);
3489 delete_related_insns (insn
);
3490 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3491 add_insn_after (delay_insn
, trial
, NULL
);
3493 for (i
= 1; i
< pat
->len (); i
++)
3494 after
= emit_copy_of_insn_after (pat
->insn (i
), after
);
3495 delete_scheduled_jump (delay_insn
);
3499 /* See if this is an unconditional jump around a single insn which is
3500 identical to the one in its delay slot. In this case, we can just
3501 delete the branch and the insn in its delay slot. */
3502 if (next
&& NONJUMP_INSN_P (next
)
3503 && label_before_next_insn (next
, insn
) == target_label
3504 && simplejump_p (insn
)
3505 && XVECLEN (pat
, 0) == 2
3506 && rtx_equal_p (PATTERN (next
), PATTERN (pat
->insn (1))))
3508 delete_related_insns (insn
);
3512 /* See if this jump (with its delay slots) conditionally branches
3513 around an unconditional jump (without delay slots). If so, invert
3514 this jump and point it to the target of the second jump. We cannot
3515 do this for annulled jumps, though. Again, don't convert a jump to
3517 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3518 && any_condjump_p (delay_insn
)
3519 && next
&& simplejump_or_return_p (next
)
3520 && next_active_insn (target_label
) == next_active_insn (next
)
3521 && no_labels_between_p (insn
, next
))
3523 rtx label
= JUMP_LABEL (next
);
3524 rtx old_label
= JUMP_LABEL (delay_insn
);
3526 if (ANY_RETURN_P (label
))
3527 label
= find_end_label (label
);
3529 /* find_end_label can generate a new label. Check this first. */
3531 && no_labels_between_p (insn
, next
)
3532 && redirect_with_delay_slots_safe_p (delay_insn
, label
, insn
))
3534 /* Be careful how we do this to avoid deleting code or labels
3535 that are momentarily dead. See similar optimization in
3538 ++LABEL_NUSES (old_label
);
3540 if (invert_jump (delay_insn
, label
, 1))
3544 /* Must update the INSN_FROM_TARGET_P bits now that
3545 the branch is reversed, so that mark_target_live_regs
3546 will handle the delay slot insn correctly. */
3547 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3549 rtx slot
= XVECEXP (PATTERN (insn
), 0, i
);
3550 INSN_FROM_TARGET_P (slot
) = ! INSN_FROM_TARGET_P (slot
);
3553 delete_related_insns (next
);
3557 if (old_label
&& --LABEL_NUSES (old_label
) == 0)
3558 delete_related_insns (old_label
);
3563 /* If we own the thread opposite the way this insn branches, see if we
3564 can merge its delay slots with following insns. */
3565 if (INSN_FROM_TARGET_P (pat
->insn (1))
3566 && own_thread_p (NEXT_INSN (insn
), 0, 1))
3567 try_merge_delay_insns (insn
, next
);
3568 else if (! INSN_FROM_TARGET_P (pat
->insn (1))
3569 && own_thread_p (target_label
, target_label
, 0))
3570 try_merge_delay_insns (insn
, next_active_insn (target_label
));
3572 /* If we get here, we haven't deleted INSN. But we may have deleted
3573 NEXT, so recompute it. */
3574 next
= next_active_insn (insn
);
3579 /* Look for filled jumps to the end of function label. We can try to convert
3580 them into RETURN insns if the insns in the delay slot are valid for the
3584 make_return_insns (rtx_insn
*first
)
3587 rtx_insn
*jump_insn
;
3588 rtx real_return_label
= function_return_label
;
3589 rtx real_simple_return_label
= function_simple_return_label
;
3592 /* See if there is a RETURN insn in the function other than the one we
3593 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3594 into a RETURN to jump to it. */
3595 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3596 if (JUMP_P (insn
) && ANY_RETURN_P (PATTERN (insn
)))
3598 rtx t
= get_label_before (insn
, NULL_RTX
);
3599 if (PATTERN (insn
) == ret_rtx
)
3600 real_return_label
= t
;
3602 real_simple_return_label
= t
;
3606 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3607 was equal to END_OF_FUNCTION_LABEL. */
3608 if (real_return_label
)
3609 LABEL_NUSES (real_return_label
)++;
3610 if (real_simple_return_label
)
3611 LABEL_NUSES (real_simple_return_label
)++;
3613 /* Clear the list of insns to fill so we can use it. */
3614 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3616 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3619 rtx kind
, real_label
;
3621 /* Only look at filled JUMP_INSNs that go to the end of function
3623 if (!NONJUMP_INSN_P (insn
))
3626 if (GET_CODE (PATTERN (insn
)) != SEQUENCE
)
3629 rtx_sequence
*pat
= as_a
<rtx_sequence
*> (PATTERN (insn
));
3631 if (!jump_to_label_p (pat
->insn (0)))
3634 if (JUMP_LABEL (pat
->insn (0)) == function_return_label
)
3637 real_label
= real_return_label
;
3639 else if (JUMP_LABEL (pat
->insn (0)) == function_simple_return_label
)
3641 kind
= simple_return_rtx
;
3642 real_label
= real_simple_return_label
;
3647 jump_insn
= pat
->insn (0);
3649 /* If we can't make the jump into a RETURN, try to redirect it to the best
3650 RETURN and go on to the next insn. */
3651 if (!reorg_redirect_jump (jump_insn
, kind
))
3653 /* Make sure redirecting the jump will not invalidate the delay
3655 if (redirect_with_delay_slots_safe_p (jump_insn
, real_label
, insn
))
3656 reorg_redirect_jump (jump_insn
, real_label
);
3660 /* See if this RETURN can accept the insns current in its delay slot.
3661 It can if it has more or an equal number of slots and the contents
3662 of each is valid. */
3664 flags
= get_jump_flags (jump_insn
, JUMP_LABEL (jump_insn
));
3665 slots
= num_delay_slots (jump_insn
);
3666 if (slots
>= XVECLEN (pat
, 0) - 1)
3668 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3670 #ifdef ANNUL_IFFALSE_SLOTS
3671 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3672 && INSN_FROM_TARGET_P (pat
->insn (i
)))
3673 ? eligible_for_annul_false (jump_insn
, i
- 1,
3674 pat
->insn (i
), flags
) :
3676 #ifdef ANNUL_IFTRUE_SLOTS
3677 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3678 && ! INSN_FROM_TARGET_P (pat
->insn (i
)))
3679 ? eligible_for_annul_true (jump_insn
, i
- 1,
3680 pat
->insn (i
), flags
) :
3682 eligible_for_delay (jump_insn
, i
- 1,
3683 pat
->insn (i
), flags
)))
3689 if (i
== XVECLEN (pat
, 0))
3692 /* We have to do something with this insn. If it is an unconditional
3693 RETURN, delete the SEQUENCE and output the individual insns,
3694 followed by the RETURN. Then set things up so we try to find
3695 insns for its delay slots, if it needs some. */
3696 if (ANY_RETURN_P (PATTERN (jump_insn
)))
3698 rtx_insn
*prev
= PREV_INSN (insn
);
3700 delete_related_insns (insn
);
3701 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3702 prev
= emit_insn_after (PATTERN (XVECEXP (pat
, 0, i
)), prev
);
3704 insn
= emit_jump_insn_after (PATTERN (jump_insn
), prev
);
3705 emit_barrier_after (insn
);
3708 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3711 /* It is probably more efficient to keep this with its current
3712 delay slot as a branch to a RETURN. */
3713 reorg_redirect_jump (jump_insn
, real_label
);
3716 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3717 new delay slots we have created. */
3718 if (real_return_label
!= NULL_RTX
&& --LABEL_NUSES (real_return_label
) == 0)
3719 delete_related_insns (real_return_label
);
3720 if (real_simple_return_label
!= NULL_RTX
3721 && --LABEL_NUSES (real_simple_return_label
) == 0)
3722 delete_related_insns (real_simple_return_label
);
3724 fill_simple_delay_slots (1);
3725 fill_simple_delay_slots (0);
3728 /* Try to find insns to place in delay slots. */
3731 dbr_schedule (rtx_insn
*first
)
3733 rtx_insn
*insn
, *next
, *epilogue_insn
= 0;
3735 bool need_return_insns
;
3737 /* If the current function has no insns other than the prologue and
3738 epilogue, then do not try to fill any delay slots. */
3739 if (n_basic_blocks_for_fn (cfun
) == NUM_FIXED_BLOCKS
)
3742 /* Find the highest INSN_UID and allocate and initialize our map from
3743 INSN_UID's to position in code. */
3744 for (max_uid
= 0, insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3746 if (INSN_UID (insn
) > max_uid
)
3747 max_uid
= INSN_UID (insn
);
3749 && NOTE_KIND (insn
) == NOTE_INSN_EPILOGUE_BEG
)
3750 epilogue_insn
= insn
;
3753 uid_to_ruid
= XNEWVEC (int, max_uid
+ 1);
3754 for (i
= 0, insn
= first
; insn
; i
++, insn
= NEXT_INSN (insn
))
3755 uid_to_ruid
[INSN_UID (insn
)] = i
;
3757 /* Initialize the list of insns that need filling. */
3758 if (unfilled_firstobj
== 0)
3760 gcc_obstack_init (&unfilled_slots_obstack
);
3761 unfilled_firstobj
= XOBNEWVAR (&unfilled_slots_obstack
, rtx
, 0);
3764 for (insn
= next_active_insn (first
); insn
; insn
= next_active_insn (insn
))
3768 /* Skip vector tables. We can't get attributes for them. */
3769 if (JUMP_TABLE_DATA_P (insn
))
3773 INSN_ANNULLED_BRANCH_P (insn
) = 0;
3774 INSN_FROM_TARGET_P (insn
) = 0;
3776 if (num_delay_slots (insn
) > 0)
3777 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3779 /* Ensure all jumps go to the last of a set of consecutive labels. */
3781 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3782 && !ANY_RETURN_P (JUMP_LABEL (insn
))
3783 && ((target
= skip_consecutive_labels (JUMP_LABEL (insn
)))
3784 != JUMP_LABEL (insn
)))
3785 redirect_jump (insn
, target
, 1);
3788 init_resource_info (epilogue_insn
);
3790 /* Show we haven't computed an end-of-function label yet. */
3791 function_return_label
= function_simple_return_label
= NULL
;
3793 /* Initialize the statistics for this function. */
3794 memset (num_insns_needing_delays
, 0, sizeof num_insns_needing_delays
);
3795 memset (num_filled_delays
, 0, sizeof num_filled_delays
);
3797 /* Now do the delay slot filling. Try everything twice in case earlier
3798 changes make more slots fillable. */
3800 for (reorg_pass_number
= 0;
3801 reorg_pass_number
< MAX_REORG_PASSES
;
3802 reorg_pass_number
++)
3804 fill_simple_delay_slots (1);
3805 fill_simple_delay_slots (0);
3806 fill_eager_delay_slots ();
3807 relax_delay_slots (first
);
3810 /* If we made an end of function label, indicate that it is now
3811 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3812 If it is now unused, delete it. */
3813 if (function_return_label
&& --LABEL_NUSES (function_return_label
) == 0)
3814 delete_related_insns (function_return_label
);
3815 if (function_simple_return_label
3816 && --LABEL_NUSES (function_simple_return_label
) == 0)
3817 delete_related_insns (function_simple_return_label
);
3819 need_return_insns
= false;
3820 need_return_insns
|= HAVE_return
&& function_return_label
!= 0;
3821 need_return_insns
|= HAVE_simple_return
&& function_simple_return_label
!= 0;
3822 if (need_return_insns
)
3823 make_return_insns (first
);
3825 /* Delete any USE insns made by update_block; subsequent passes don't need
3826 them or know how to deal with them. */
3827 for (insn
= first
; insn
; insn
= next
)
3829 next
= NEXT_INSN (insn
);
3831 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == USE
3832 && INSN_P (XEXP (PATTERN (insn
), 0)))
3833 next
= delete_related_insns (insn
);
3836 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3838 /* It is not clear why the line below is needed, but it does seem to be. */
3839 unfilled_firstobj
= XOBNEWVAR (&unfilled_slots_obstack
, rtx
, 0);
3843 int i
, j
, need_comma
;
3844 int total_delay_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3845 int total_annul_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3847 for (reorg_pass_number
= 0;
3848 reorg_pass_number
< MAX_REORG_PASSES
;
3849 reorg_pass_number
++)
3851 fprintf (dump_file
, ";; Reorg pass #%d:\n", reorg_pass_number
+ 1);
3852 for (i
= 0; i
< NUM_REORG_FUNCTIONS
; i
++)
3855 fprintf (dump_file
, ";; Reorg function #%d\n", i
);
3857 fprintf (dump_file
, ";; %d insns needing delay slots\n;; ",
3858 num_insns_needing_delays
[i
][reorg_pass_number
]);
3860 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3861 if (num_filled_delays
[i
][j
][reorg_pass_number
])
3864 fprintf (dump_file
, ", ");
3866 fprintf (dump_file
, "%d got %d delays",
3867 num_filled_delays
[i
][j
][reorg_pass_number
], j
);
3869 fprintf (dump_file
, "\n");
3872 memset (total_delay_slots
, 0, sizeof total_delay_slots
);
3873 memset (total_annul_slots
, 0, sizeof total_annul_slots
);
3874 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3876 if (! insn
->deleted ()
3877 && NONJUMP_INSN_P (insn
)
3878 && GET_CODE (PATTERN (insn
)) != USE
3879 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3881 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3884 j
= XVECLEN (PATTERN (insn
), 0) - 1;
3885 if (j
> MAX_DELAY_HISTOGRAM
)
3886 j
= MAX_DELAY_HISTOGRAM
;
3887 control
= XVECEXP (PATTERN (insn
), 0, 0);
3888 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
3889 total_annul_slots
[j
]++;
3891 total_delay_slots
[j
]++;
3893 else if (num_delay_slots (insn
) > 0)
3894 total_delay_slots
[0]++;
3897 fprintf (dump_file
, ";; Reorg totals: ");
3899 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3901 if (total_delay_slots
[j
])
3904 fprintf (dump_file
, ", ");
3906 fprintf (dump_file
, "%d got %d delays", total_delay_slots
[j
], j
);
3909 fprintf (dump_file
, "\n");
3910 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3911 fprintf (dump_file
, ";; Reorg annuls: ");
3913 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3915 if (total_annul_slots
[j
])
3918 fprintf (dump_file
, ", ");
3920 fprintf (dump_file
, "%d got %d delays", total_annul_slots
[j
], j
);
3923 fprintf (dump_file
, "\n");
3925 fprintf (dump_file
, "\n");
3928 if (!sibling_labels
.is_empty ())
3930 update_alignments (sibling_labels
);
3931 sibling_labels
.release ();
3934 free_resource_info ();
3936 crtl
->dbr_scheduled_p
= true;
3938 #endif /* DELAY_SLOTS */
3940 /* Run delay slot optimization. */
3942 rest_of_handle_delay_slots (void)
3945 dbr_schedule (get_insns ());
3952 const pass_data pass_data_delay_slots
=
3954 RTL_PASS
, /* type */
3956 OPTGROUP_NONE
, /* optinfo_flags */
3957 TV_DBR_SCHED
, /* tv_id */
3958 0, /* properties_required */
3959 0, /* properties_provided */
3960 0, /* properties_destroyed */
3961 0, /* todo_flags_start */
3962 0, /* todo_flags_finish */
3965 class pass_delay_slots
: public rtl_opt_pass
3968 pass_delay_slots (gcc::context
*ctxt
)
3969 : rtl_opt_pass (pass_data_delay_slots
, ctxt
)
3972 /* opt_pass methods: */
3973 virtual bool gate (function
*);
3974 virtual unsigned int execute (function
*)
3976 return rest_of_handle_delay_slots ();
3979 }; // class pass_delay_slots
3982 pass_delay_slots::gate (function
*)
3985 /* At -O0 dataflow info isn't updated after RA. */
3986 return optimize
> 0 && flag_delayed_branch
&& !crtl
->dbr_scheduled_p
;
3995 make_pass_delay_slots (gcc::context
*ctxt
)
3997 return new pass_delay_slots (ctxt
);
4000 /* Machine dependent reorg pass. */
4004 const pass_data pass_data_machine_reorg
=
4006 RTL_PASS
, /* type */
4008 OPTGROUP_NONE
, /* optinfo_flags */
4009 TV_MACH_DEP
, /* tv_id */
4010 0, /* properties_required */
4011 0, /* properties_provided */
4012 0, /* properties_destroyed */
4013 0, /* todo_flags_start */
4014 0, /* todo_flags_finish */
4017 class pass_machine_reorg
: public rtl_opt_pass
4020 pass_machine_reorg (gcc::context
*ctxt
)
4021 : rtl_opt_pass (pass_data_machine_reorg
, ctxt
)
4024 /* opt_pass methods: */
4025 virtual bool gate (function
*)
4027 return targetm
.machine_dependent_reorg
!= 0;
4030 virtual unsigned int execute (function
*)
4032 targetm
.machine_dependent_reorg ();
4036 }; // class pass_machine_reorg
4041 make_pass_machine_reorg (gcc::context
*ctxt
)
4043 return new pass_machine_reorg (ctxt
);