1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2021 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with CHECKING_P, since it is awfully slow. */
93 #include "coretypes.h"
105 #include "rtl-error.h"
107 #include "addresses.h"
108 #include "function-abi.h"
110 /* True if X is a constant that can be forced into the constant pool.
111 MODE is the mode of the operand, or VOIDmode if not known. */
112 #define CONST_POOL_OK_P(MODE, X) \
113 ((MODE) != VOIDmode \
115 && GET_CODE (X) != HIGH \
116 && !targetm.cannot_force_const_mem (MODE, X))
118 /* True if C is a non-empty register class that has too few registers
119 to be safely used as a reload target class. */
122 small_register_class_p (reg_class_t rclass
)
124 return (reg_class_size
[(int) rclass
] == 1
125 || (reg_class_size
[(int) rclass
] >= 1
126 && targetm
.class_likely_spilled_p (rclass
)));
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld
[MAX_RELOADS
];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
140 int reload_n_operands
;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads
;
152 /* Each replacement is recorded with a structure like this. */
155 rtx
*where
; /* Location to store in */
156 int what
; /* which reload this is for */
157 machine_mode mode
; /* mode it must have */
160 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
162 /* Number of replacements currently recorded. */
163 static int n_replacements
;
165 /* Used to track what is modified by an operand. */
168 int reg_flag
; /* Nonzero if referencing a register. */
169 int safe
; /* Nonzero if this can't conflict with anything. */
170 rtx base
; /* Base address for MEM. */
171 poly_int64_pod start
; /* Starting offset or register number. */
172 poly_int64_pod end
; /* Ending offset or register number. */
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
184 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
185 static int secondary_memlocs_elim_used
= 0;
187 /* The instruction we are doing reloads for;
188 so we can test whether a register dies in it. */
189 static rtx_insn
*this_insn
;
191 /* Nonzero if this instruction is a user-specified asm with operands. */
192 static int this_insn_is_asm
;
194 /* If hard_regs_live_known is nonzero,
195 we can tell which hard regs are currently live,
196 at least enough to succeed in choosing dummy reloads. */
197 static int hard_regs_live_known
;
199 /* Indexed by hard reg number,
200 element is nonnegative if hard reg has been spilled.
201 This vector is passed to `find_reloads' as an argument
202 and is not changed here. */
203 static short *static_reload_reg_p
;
205 /* Set to 1 in subst_reg_equivs if it changes anything. */
206 static int subst_reg_equivs_changed
;
208 /* On return from push_reload, holds the reload-number for the OUT
209 operand, which can be different for that from the input operand. */
210 static int output_reloadnum
;
212 /* Compare two RTX's. */
213 #define MATCHES(x, y) \
214 (x == y || (x != 0 && (REG_P (x) \
215 ? REG_P (y) && REGNO (x) == REGNO (y) \
216 : rtx_equal_p (x, y) && ! side_effects_p (x))))
218 /* Indicates if two reloads purposes are for similar enough things that we
219 can merge their reloads. */
220 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
221 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
222 || ((when1) == (when2) && (op1) == (op2)) \
223 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
224 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
225 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
226 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
227 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
229 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
230 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
231 ((when1) != (when2) \
232 || ! ((op1) == (op2) \
233 || (when1) == RELOAD_FOR_INPUT \
234 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
235 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
237 /* If we are going to reload an address, compute the reload type to
239 #define ADDR_TYPE(type) \
240 ((type) == RELOAD_FOR_INPUT_ADDRESS \
241 ? RELOAD_FOR_INPADDR_ADDRESS \
242 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
243 ? RELOAD_FOR_OUTADDR_ADDRESS \
246 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
247 machine_mode
, enum reload_type
,
248 enum insn_code
*, secondary_reload_info
*);
249 static enum reg_class
find_valid_class (machine_mode
, machine_mode
,
251 static void push_replacement (rtx
*, int, machine_mode
);
252 static void dup_replacements (rtx
*, rtx
*);
253 static void combine_reloads (void);
254 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
255 enum reload_type
, int, int);
256 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, machine_mode
,
257 machine_mode
, reg_class_t
, int, int);
258 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
259 static struct decomposition
decompose (rtx
);
260 static int immune_p (rtx
, rtx
, struct decomposition
);
261 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
262 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int,
264 static rtx
make_memloc (rtx
, int);
265 static bool maybe_memory_address_addr_space_p (machine_mode
, rtx
,
266 addr_space_t
, rtx
*);
267 static int find_reloads_address (machine_mode
, rtx
*, rtx
, rtx
*,
268 int, enum reload_type
, int, rtx_insn
*);
269 static rtx
subst_reg_equivs (rtx
, rtx_insn
*);
270 static rtx
subst_indexed_address (rtx
);
271 static void update_auto_inc_notes (rtx_insn
*, int, int);
272 static int find_reloads_address_1 (machine_mode
, addr_space_t
, rtx
, int,
273 enum rtx_code
, enum rtx_code
, rtx
*,
274 int, enum reload_type
,int, rtx_insn
*);
275 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
277 enum reload_type
, int);
278 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
279 int, rtx_insn
*, int *);
280 static void copy_replacements_1 (rtx
*, rtx
*, int);
281 static poly_int64
find_inc_amount (rtx
, rtx
);
282 static int refers_to_mem_for_reload_p (rtx
);
283 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
286 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
290 push_reg_equiv_alt_mem (int regno
, rtx mem
)
294 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
295 if (rtx_equal_p (XEXP (it
, 0), mem
))
298 reg_equiv_alt_mem_list (regno
)
299 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
300 reg_equiv_alt_mem_list (regno
));
303 /* Determine if any secondary reloads are needed for loading (if IN_P is
304 nonzero) or storing (if IN_P is zero) X to or from a reload register of
305 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
306 are needed, push them.
308 Return the reload number of the secondary reload we made, or -1 if
309 we didn't need one. *PICODE is set to the insn_code to use if we do
310 need a secondary reload. */
313 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
314 enum reg_class reload_class
,
315 machine_mode reload_mode
, enum reload_type type
,
316 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
318 enum reg_class rclass
= NO_REGS
;
319 enum reg_class scratch_class
;
320 machine_mode mode
= reload_mode
;
321 enum insn_code icode
= CODE_FOR_nothing
;
322 enum insn_code t_icode
= CODE_FOR_nothing
;
323 enum reload_type secondary_type
;
324 int s_reload
, t_reload
= -1;
325 const char *scratch_constraint
;
326 secondary_reload_info sri
;
328 if (type
== RELOAD_FOR_INPUT_ADDRESS
329 || type
== RELOAD_FOR_OUTPUT_ADDRESS
330 || type
== RELOAD_FOR_INPADDR_ADDRESS
331 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
332 secondary_type
= type
;
334 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
336 *picode
= CODE_FOR_nothing
;
338 /* If X is a paradoxical SUBREG, use the inner value to determine both the
339 mode and object being reloaded. */
340 if (paradoxical_subreg_p (x
))
343 reload_mode
= GET_MODE (x
);
346 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
347 is still a pseudo-register by now, it *must* have an equivalent MEM
348 but we don't want to assume that), use that equivalent when seeing if
349 a secondary reload is needed since whether or not a reload is needed
350 might be sensitive to the form of the MEM. */
352 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
353 && reg_equiv_mem (REGNO (x
)))
354 x
= reg_equiv_mem (REGNO (x
));
356 sri
.icode
= CODE_FOR_nothing
;
357 sri
.prev_sri
= prev_sri
;
358 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
360 icode
= (enum insn_code
) sri
.icode
;
362 /* If we don't need any secondary registers, done. */
363 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
366 if (rclass
!= NO_REGS
)
367 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
368 reload_mode
, type
, &t_icode
, &sri
);
370 /* If we will be using an insn, the secondary reload is for a
373 if (icode
!= CODE_FOR_nothing
)
375 /* If IN_P is nonzero, the reload register will be the output in
376 operand 0. If IN_P is zero, the reload register will be the input
377 in operand 1. Outputs should have an initial "=", which we must
380 /* ??? It would be useful to be able to handle only two, or more than
381 three, operands, but for now we can only handle the case of having
382 exactly three: output, input and one temp/scratch. */
383 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
385 /* ??? We currently have no way to represent a reload that needs
386 an icode to reload from an intermediate tertiary reload register.
387 We should probably have a new field in struct reload to tag a
388 chain of scratch operand reloads onto. */
389 gcc_assert (rclass
== NO_REGS
);
391 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
392 gcc_assert (*scratch_constraint
== '=');
393 scratch_constraint
++;
394 if (*scratch_constraint
== '&')
395 scratch_constraint
++;
396 scratch_class
= (reg_class_for_constraint
397 (lookup_constraint (scratch_constraint
)));
399 rclass
= scratch_class
;
400 mode
= insn_data
[(int) icode
].operand
[2].mode
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 cannot use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
418 || t_icode
!= CODE_FOR_nothing
);
420 /* See if we can reuse an existing secondary reload. */
421 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
422 if (rld
[s_reload
].secondary_p
423 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
424 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
425 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
426 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
427 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
428 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
429 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
430 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
431 && (small_register_class_p (rclass
)
432 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
433 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
434 opnum
, rld
[s_reload
].opnum
))
437 rld
[s_reload
].inmode
= mode
;
439 rld
[s_reload
].outmode
= mode
;
441 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
442 rld
[s_reload
].rclass
= rclass
;
444 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
445 rld
[s_reload
].optional
&= optional
;
446 rld
[s_reload
].secondary_p
= 1;
447 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
448 opnum
, rld
[s_reload
].opnum
))
449 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
454 if (s_reload
== n_reloads
)
456 /* If we need a memory location to copy between the two reload regs,
457 set it up now. Note that we do the input case before making
458 the reload and the output case after. This is due to the
459 way reloads are output. */
461 if (in_p
&& icode
== CODE_FOR_nothing
462 && targetm
.secondary_memory_needed (mode
, rclass
, reload_class
))
464 get_secondary_mem (x
, reload_mode
, opnum
, type
);
466 /* We may have just added new reloads. Make sure we add
467 the new reload at the end. */
468 s_reload
= n_reloads
;
471 /* We need to make a new secondary reload for this register class. */
472 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
473 rld
[s_reload
].rclass
= rclass
;
475 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
476 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
477 rld
[s_reload
].reg_rtx
= 0;
478 rld
[s_reload
].optional
= optional
;
479 rld
[s_reload
].inc
= 0;
480 /* Maybe we could combine these, but it seems too tricky. */
481 rld
[s_reload
].nocombine
= 1;
482 rld
[s_reload
].in_reg
= 0;
483 rld
[s_reload
].out_reg
= 0;
484 rld
[s_reload
].opnum
= opnum
;
485 rld
[s_reload
].when_needed
= secondary_type
;
486 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
487 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
488 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
489 rld
[s_reload
].secondary_out_icode
490 = ! in_p
? t_icode
: CODE_FOR_nothing
;
491 rld
[s_reload
].secondary_p
= 1;
495 if (! in_p
&& icode
== CODE_FOR_nothing
496 && targetm
.secondary_memory_needed (mode
, reload_class
, rclass
))
497 get_secondary_mem (x
, mode
, opnum
, type
);
504 /* If a secondary reload is needed, return its class. If both an intermediate
505 register and a scratch register is needed, we return the class of the
506 intermediate register. */
508 secondary_reload_class (bool in_p
, reg_class_t rclass
, machine_mode mode
,
511 enum insn_code icode
;
512 secondary_reload_info sri
;
514 sri
.icode
= CODE_FOR_nothing
;
517 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
518 icode
= (enum insn_code
) sri
.icode
;
520 /* If there are no secondary reloads at all, we return NO_REGS.
521 If an intermediate register is needed, we return its class. */
522 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
525 /* No intermediate register is needed, but we have a special reload
526 pattern, which we assume for now needs a scratch register. */
527 return scratch_reload_class (icode
);
530 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
531 three operands, verify that operand 2 is an output operand, and return
533 ??? We'd like to be able to handle any pattern with at least 2 operands,
534 for zero or more scratch registers, but that needs more infrastructure. */
536 scratch_reload_class (enum insn_code icode
)
538 const char *scratch_constraint
;
539 enum reg_class rclass
;
541 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
542 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
543 gcc_assert (*scratch_constraint
== '=');
544 scratch_constraint
++;
545 if (*scratch_constraint
== '&')
546 scratch_constraint
++;
547 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
548 gcc_assert (rclass
!= NO_REGS
);
552 /* Return a memory location that will be used to copy X in mode MODE.
553 If we haven't already made a location for this mode in this insn,
554 call find_reloads_address on the location being returned. */
557 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, machine_mode mode
,
558 int opnum
, enum reload_type type
)
563 /* By default, if MODE is narrower than a word, widen it to a word.
564 This is required because most machines that require these memory
565 locations do not support short load and stores from all registers
566 (e.g., FP registers). */
568 mode
= targetm
.secondary_memory_needed_mode (mode
);
570 /* If we already have made a MEM for this operand in MODE, return it. */
571 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
572 return secondary_memlocs_elim
[(int) mode
][opnum
];
574 /* If this is the first time we've tried to get a MEM for this mode,
575 allocate a new one. `something_changed' in reload will get set
576 by noticing that the frame size has changed. */
578 if (secondary_memlocs
[(int) mode
] == 0)
580 #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
583 secondary_memlocs
[(int) mode
]
584 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
588 /* Get a version of the address doing any eliminations needed. If that
589 didn't give us a new MEM, make a new one if it isn't valid. */
591 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
592 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
593 MEM_ADDR_SPACE (loc
));
595 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
596 loc
= copy_rtx (loc
);
598 /* The only time the call below will do anything is if the stack
599 offset is too large. In that case IND_LEVELS doesn't matter, so we
600 can just pass a zero. Adjust the type to be the address of the
601 corresponding object. If the address was valid, save the eliminated
602 address. If it wasn't valid, we need to make a reload each time, so
607 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
608 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
611 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
615 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
616 if (secondary_memlocs_elim_used
<= (int)mode
)
617 secondary_memlocs_elim_used
= (int)mode
+ 1;
621 /* Clear any secondary memory locations we've made. */
624 clear_secondary_mem (void)
626 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
630 /* Find the largest class which has at least one register valid in
631 mode INNER, and which for every such register, that register number
632 plus N is also valid in OUTER (if in range) and is cheap to move
633 into REGNO. Such a class must exist. */
635 static enum reg_class
636 find_valid_class (machine_mode outer ATTRIBUTE_UNUSED
,
637 machine_mode inner ATTRIBUTE_UNUSED
, int n
,
638 unsigned int dest_regno ATTRIBUTE_UNUSED
)
643 enum reg_class best_class
= NO_REGS
;
644 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
645 unsigned int best_size
= 0;
648 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
652 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
653 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
655 if (targetm
.hard_regno_mode_ok (regno
, inner
))
658 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
659 && !targetm
.hard_regno_mode_ok (regno
+ n
, outer
))
666 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
668 if ((reg_class_size
[rclass
] > best_size
669 && (best_cost
< 0 || best_cost
>= cost
))
672 best_class
= (enum reg_class
) rclass
;
673 best_size
= reg_class_size
[rclass
];
674 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
679 gcc_assert (best_size
!= 0);
684 /* We are trying to reload a subreg of something that is not a register.
685 Find the largest class which contains only registers valid in
686 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
687 which we would eventually like to obtain the object. */
689 static enum reg_class
690 find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED
,
691 machine_mode mode ATTRIBUTE_UNUSED
,
692 enum reg_class dest_class ATTRIBUTE_UNUSED
)
697 enum reg_class best_class
= NO_REGS
;
698 unsigned int best_size
= 0;
701 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
703 unsigned int computed_rclass_size
= 0;
705 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
707 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
708 && targetm
.hard_regno_mode_ok (regno
, mode
))
709 computed_rclass_size
++;
712 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
714 if ((computed_rclass_size
> best_size
715 && (best_cost
< 0 || best_cost
>= cost
))
718 best_class
= (enum reg_class
) rclass
;
719 best_size
= computed_rclass_size
;
720 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
725 gcc_assert (best_size
!= 0);
727 #ifdef LIMIT_RELOAD_CLASS
728 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
733 /* Return the number of a previously made reload that can be combined with
734 a new one, or n_reloads if none of the existing reloads can be used.
735 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
736 push_reload, they determine the kind of the new reload that we try to
737 combine. P_IN points to the corresponding value of IN, which can be
738 modified by this function.
739 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
742 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
743 enum reload_type type
, int opnum
, int dont_share
)
747 /* We can't merge two reloads if the output of either one is
750 if (earlyclobber_operand_p (out
))
753 /* We can use an existing reload if the class is right
754 and at least one of IN and OUT is a match
755 and the other is at worst neutral.
756 (A zero compared against anything is neutral.)
758 For targets with small register classes, don't use existing reloads
759 unless they are for the same thing since that can cause us to need
760 more reload registers than we otherwise would. */
762 for (i
= 0; i
< n_reloads
; i
++)
763 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
764 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
765 /* If the existing reload has a register, it must fit our class. */
766 && (rld
[i
].reg_rtx
== 0
767 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
768 true_regnum (rld
[i
].reg_rtx
)))
769 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
770 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
771 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
772 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
773 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
774 && (small_register_class_p (rclass
)
775 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
776 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
779 /* Reloading a plain reg for input can match a reload to postincrement
780 that reg, since the postincrement's value is the right value.
781 Likewise, it can match a preincrement reload, since we regard
782 the preincrementation as happening before any ref in this insn
784 for (i
= 0; i
< n_reloads
; i
++)
785 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
786 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
787 /* If the existing reload has a register, it must fit our
789 && (rld
[i
].reg_rtx
== 0
790 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
791 true_regnum (rld
[i
].reg_rtx
)))
792 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
794 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
795 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
796 || (REG_P (rld
[i
].in
)
797 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
798 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
799 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
800 && (small_register_class_p (rclass
)
801 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
802 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
803 opnum
, rld
[i
].opnum
))
805 /* Make sure reload_in ultimately has the increment,
806 not the plain register. */
816 (a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
817 of a multiword value; and
819 (b) the number of *words* in REG does not match the number of *registers*
823 complex_word_subreg_p (machine_mode outer_mode
, rtx reg
)
825 machine_mode inner_mode
= GET_MODE (reg
);
826 poly_uint64 reg_words
= REG_NREGS (reg
) * UNITS_PER_WORD
;
827 return (known_le (GET_MODE_SIZE (outer_mode
), UNITS_PER_WORD
)
828 && maybe_gt (GET_MODE_SIZE (inner_mode
), UNITS_PER_WORD
)
829 && !known_equal_after_align_up (GET_MODE_SIZE (inner_mode
),
830 reg_words
, UNITS_PER_WORD
));
833 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
834 expression. MODE is the mode that X will be used in. OUTPUT is true if
835 the function is invoked for the output part of an enclosing reload. */
838 reload_inner_reg_of_subreg (rtx x
, machine_mode mode
, bool output
)
842 /* Only SUBREGs are problematical. */
843 if (GET_CODE (x
) != SUBREG
)
846 inner
= SUBREG_REG (x
);
848 /* If INNER is a constant or PLUS, then INNER will need reloading. */
849 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
852 /* If INNER is not a hard register, then INNER will not need reloading. */
853 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
856 /* If INNER is not ok for MODE, then INNER will need reloading. */
857 if (!targetm
.hard_regno_mode_ok (subreg_regno (x
), mode
))
860 /* If this is for an output, and the outer part is a word or smaller,
861 INNER is larger than a word and the number of registers in INNER is
862 not the same as the number of words in INNER, then INNER will need
863 reloading (with an in-out reload). */
864 return output
&& complex_word_subreg_p (mode
, inner
);
867 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
868 requiring an extra reload register. The caller has already found that
869 IN contains some reference to REGNO, so check that we can produce the
870 new value in a single step. E.g. if we have
871 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
872 instruction that adds one to a register, this should succeed.
873 However, if we have something like
874 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
875 needs to be loaded into a register first, we need a separate reload
877 Such PLUS reloads are generated by find_reload_address_part.
878 The out-of-range PLUS expressions are usually introduced in the instruction
879 patterns by register elimination and substituting pseudos without a home
880 by their function-invariant equivalences. */
882 can_reload_into (rtx in
, int regno
, machine_mode mode
)
887 struct recog_data_d save_recog_data
;
889 /* For matching constraints, we often get notional input reloads where
890 we want to use the original register as the reload register. I.e.
891 technically this is a non-optional input-output reload, but IN is
892 already a valid register, and has been chosen as the reload register.
893 Speed this up, since it trivially works. */
897 /* To test MEMs properly, we'd have to take into account all the reloads
898 that are already scheduled, which can become quite complicated.
899 And since we've already handled address reloads for this MEM, it
900 should always succeed anyway. */
904 /* If we can make a simple SET insn that does the job, everything should
906 dst
= gen_rtx_REG (mode
, regno
);
907 test_insn
= make_insn_raw (gen_rtx_SET (dst
, in
));
908 save_recog_data
= recog_data
;
909 if (recog_memoized (test_insn
) >= 0)
911 extract_insn (test_insn
);
912 r
= constrain_operands (1, get_enabled_alternatives (test_insn
));
914 recog_data
= save_recog_data
;
918 /* Record one reload that needs to be performed.
919 IN is an rtx saying where the data are to be found before this instruction.
920 OUT says where they must be stored after the instruction.
921 (IN is zero for data not read, and OUT is zero for data not written.)
922 INLOC and OUTLOC point to the places in the instructions where
923 IN and OUT were found.
924 If IN and OUT are both nonzero, it means the same register must be used
925 to reload both IN and OUT.
927 RCLASS is a register class required for the reloaded data.
928 INMODE is the machine mode that the instruction requires
929 for the reg that replaces IN and OUTMODE is likewise for OUT.
931 If IN is zero, then OUT's location and mode should be passed as
934 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
936 OPTIONAL nonzero means this reload does not need to be performed:
937 it can be discarded if that is more convenient.
939 OPNUM and TYPE say what the purpose of this reload is.
941 The return value is the reload-number for this reload.
943 If both IN and OUT are nonzero, in some rare cases we might
944 want to make two separate reloads. (Actually we never do this now.)
945 Therefore, the reload-number for OUT is stored in
946 output_reloadnum when we return; the return value applies to IN.
947 Usually (presently always), when IN and OUT are nonzero,
948 the two reload-numbers are equal, but the caller should be careful to
952 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
953 enum reg_class rclass
, machine_mode inmode
,
954 machine_mode outmode
, int strict_low
, int optional
,
955 int opnum
, enum reload_type type
)
959 int dont_remove_subreg
= 0;
960 #ifdef LIMIT_RELOAD_CLASS
961 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
963 int secondary_in_reload
= -1, secondary_out_reload
= -1;
964 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
965 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
966 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
967 subreg_in_class
= NO_REGS
;
969 /* INMODE and/or OUTMODE could be VOIDmode if no mode
970 has been specified for the operand. In that case,
971 use the operand's mode as the mode to reload. */
972 if (inmode
== VOIDmode
&& in
!= 0)
973 inmode
= GET_MODE (in
);
974 if (outmode
== VOIDmode
&& out
!= 0)
975 outmode
= GET_MODE (out
);
977 /* If find_reloads and friends until now missed to replace a pseudo
978 with a constant of reg_equiv_constant something went wrong
980 Note that it can't simply be done here if we missed it earlier
981 since the constant might need to be pushed into the literal pool
982 and the resulting memref would probably need further
984 if (in
!= 0 && REG_P (in
))
986 int regno
= REGNO (in
);
988 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
989 || reg_renumber
[regno
] >= 0
990 || reg_equiv_constant (regno
) == NULL_RTX
);
993 /* reg_equiv_constant only contains constants which are obviously
994 not appropriate as destination. So if we would need to replace
995 the destination pseudo with a constant we are in real
997 if (out
!= 0 && REG_P (out
))
999 int regno
= REGNO (out
);
1001 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1002 || reg_renumber
[regno
] >= 0
1003 || reg_equiv_constant (regno
) == NULL_RTX
);
1006 /* If we have a read-write operand with an address side-effect,
1007 change either IN or OUT so the side-effect happens only once. */
1008 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1009 switch (GET_CODE (XEXP (in
, 0)))
1011 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1012 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1015 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1016 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1023 /* If we are reloading a (SUBREG constant ...), really reload just the
1024 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1025 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1026 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1027 register is a pseudo, also reload the inside expression.
1028 For machines that extend byte loads, do this for any SUBREG of a pseudo
1029 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1030 M2 is an integral mode that gets extended when loaded.
1031 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1032 where either M1 is not valid for R or M2 is wider than a word but we
1033 only need one register to store an M2-sized quantity in R.
1034 (However, if OUT is nonzero, we need to reload the reg *and*
1035 the subreg, so do nothing here, and let following statement handle it.)
1037 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1038 we can't handle it here because CONST_INT does not indicate a mode.
1040 Similarly, we must reload the inside expression if we have a
1041 STRICT_LOW_PART (presumably, in == out in this case).
1043 Also reload the inner expression if it does not require a secondary
1044 reload but the SUBREG does.
1046 Also reload the inner expression if it is a register that is in
1047 the class whose registers cannot be referenced in a different size
1048 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1049 cannot reload just the inside since we might end up with the wrong
1050 register class. But if it is inside a STRICT_LOW_PART, we have
1051 no choice, so we hope we do get the right register class there.
1053 Finally, reload the inner expression if it is a pseudo that will
1054 become a MEM and the MEM has a mode-dependent address, as in that
1055 case we obviously cannot change the mode of the MEM to that of the
1056 containing SUBREG as that would change the interpretation of the
1059 scalar_int_mode inner_mode
;
1060 if (in
!= 0 && GET_CODE (in
) == SUBREG
1061 && targetm
.can_change_mode_class (GET_MODE (SUBREG_REG (in
)),
1063 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (in
))]
1065 || (subreg_lowpart_p (in
)
1066 && (CONSTANT_P (SUBREG_REG (in
))
1067 || GET_CODE (SUBREG_REG (in
)) == PLUS
1068 || (((REG_P (SUBREG_REG (in
))
1069 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1070 || MEM_P (SUBREG_REG (in
)))
1071 && (paradoxical_subreg_p (inmode
,
1072 GET_MODE (SUBREG_REG (in
)))
1073 || (known_le (GET_MODE_SIZE (inmode
), UNITS_PER_WORD
)
1074 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG
1077 && GET_MODE_SIZE (inner_mode
) <= UNITS_PER_WORD
1078 && paradoxical_subreg_p (inmode
, inner_mode
)
1079 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)
1080 || (WORD_REGISTER_OPERATIONS
1081 && partial_subreg_p (inmode
,
1082 GET_MODE (SUBREG_REG (in
)))
1083 && (known_equal_after_align_down
1084 (GET_MODE_SIZE (inmode
) - 1,
1085 GET_MODE_SIZE (GET_MODE (SUBREG_REG
1088 || (REG_P (SUBREG_REG (in
))
1089 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1090 /* The case where out is nonzero
1091 is handled differently in the following statement. */
1092 && (out
== 0 || subreg_lowpart_p (in
))
1093 && (complex_word_subreg_p (inmode
, SUBREG_REG (in
))
1094 || !targetm
.hard_regno_mode_ok (subreg_regno (in
),
1096 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1097 && (secondary_reload_class (1, rclass
,
1098 GET_MODE (SUBREG_REG (in
)),
1101 || (REG_P (SUBREG_REG (in
))
1102 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1103 && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (in
)),
1104 GET_MODE (SUBREG_REG (in
)),
1106 || (REG_P (SUBREG_REG (in
))
1107 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
1108 && reg_equiv_mem (REGNO (SUBREG_REG (in
)))
1109 && (mode_dependent_address_p
1110 (XEXP (reg_equiv_mem (REGNO (SUBREG_REG (in
))), 0),
1111 MEM_ADDR_SPACE (reg_equiv_mem (REGNO (SUBREG_REG (in
)))))))))
1113 #ifdef LIMIT_RELOAD_CLASS
1114 in_subreg_loc
= inloc
;
1116 inloc
= &SUBREG_REG (in
);
1119 if (!WORD_REGISTER_OPERATIONS
1120 && LOAD_EXTEND_OP (GET_MODE (in
)) == UNKNOWN
1122 /* This is supposed to happen only for paradoxical subregs made by
1123 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1124 gcc_assert (known_le (GET_MODE_SIZE (GET_MODE (in
)),
1125 GET_MODE_SIZE (inmode
)));
1127 inmode
= GET_MODE (in
);
1130 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1131 where M1 is not valid for R if it was not handled by the code above.
1133 Similar issue for (SUBREG constant ...) if it was not handled by the
1134 code above. This can happen if SUBREG_BYTE != 0.
1136 However, we must reload the inner reg *as well as* the subreg in
1139 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1141 if (REG_P (SUBREG_REG (in
)))
1143 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1144 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1145 GET_MODE (SUBREG_REG (in
)),
1148 REGNO (SUBREG_REG (in
)));
1149 else if (CONSTANT_P (SUBREG_REG (in
))
1150 || GET_CODE (SUBREG_REG (in
)) == PLUS
)
1151 subreg_in_class
= find_valid_class_1 (inmode
,
1152 GET_MODE (SUBREG_REG (in
)),
1155 /* This relies on the fact that emit_reload_insns outputs the
1156 instructions for input reloads of type RELOAD_OTHER in the same
1157 order as the reloads. Thus if the outer reload is also of type
1158 RELOAD_OTHER, we are guaranteed that this inner reload will be
1159 output before the outer reload. */
1160 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1161 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1162 dont_remove_subreg
= 1;
1165 /* Similarly for paradoxical and problematical SUBREGs on the output.
1166 Note that there is no reason we need worry about the previous value
1167 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1168 entitled to clobber it all (except in the case of a word mode subreg
1169 or of a STRICT_LOW_PART, in that latter case the constraint should
1170 label it input-output.) */
1171 if (out
!= 0 && GET_CODE (out
) == SUBREG
1172 && (subreg_lowpart_p (out
) || strict_low
)
1173 && targetm
.can_change_mode_class (GET_MODE (SUBREG_REG (out
)),
1175 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (out
))]
1176 && (CONSTANT_P (SUBREG_REG (out
))
1178 || (((REG_P (SUBREG_REG (out
))
1179 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1180 || MEM_P (SUBREG_REG (out
)))
1181 && (paradoxical_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1182 || (WORD_REGISTER_OPERATIONS
1183 && partial_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1184 && (known_equal_after_align_down
1185 (GET_MODE_SIZE (outmode
) - 1,
1186 GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1,
1188 || (REG_P (SUBREG_REG (out
))
1189 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1190 /* The case of a word mode subreg
1191 is handled differently in the following statement. */
1192 && ! (known_le (GET_MODE_SIZE (outmode
), UNITS_PER_WORD
)
1193 && maybe_gt (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))),
1195 && !targetm
.hard_regno_mode_ok (subreg_regno (out
), outmode
))
1196 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1197 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1200 || (REG_P (SUBREG_REG (out
))
1201 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1202 && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1203 GET_MODE (SUBREG_REG (out
)),
1206 #ifdef LIMIT_RELOAD_CLASS
1207 out_subreg_loc
= outloc
;
1209 outloc
= &SUBREG_REG (out
);
1211 gcc_assert (WORD_REGISTER_OPERATIONS
|| !MEM_P (out
)
1212 || known_le (GET_MODE_SIZE (GET_MODE (out
)),
1213 GET_MODE_SIZE (outmode
)));
1214 outmode
= GET_MODE (out
);
1217 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1218 where either M1 is not valid for R or M2 is wider than a word but we
1219 only need one register to store an M2-sized quantity in R.
1221 However, we must reload the inner reg *as well as* the subreg in
1222 that case and the inner reg is an in-out reload. */
1224 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1226 enum reg_class in_out_class
1227 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1228 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1229 GET_MODE (SUBREG_REG (out
)),
1232 REGNO (SUBREG_REG (out
)));
1234 /* This relies on the fact that emit_reload_insns outputs the
1235 instructions for output reloads of type RELOAD_OTHER in reverse
1236 order of the reloads. Thus if the outer reload is also of type
1237 RELOAD_OTHER, we are guaranteed that this inner reload will be
1238 output after the outer reload. */
1239 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1240 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1241 0, 0, opnum
, RELOAD_OTHER
);
1242 dont_remove_subreg
= 1;
1245 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1246 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1247 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1248 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1251 /* If IN is a SUBREG of a hard register, make a new REG. This
1252 simplifies some of the cases below. */
1254 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1255 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1256 && ! dont_remove_subreg
)
1257 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1259 /* Similarly for OUT. */
1260 if (out
!= 0 && GET_CODE (out
) == SUBREG
1261 && REG_P (SUBREG_REG (out
))
1262 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1263 && ! dont_remove_subreg
)
1264 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1266 /* Narrow down the class of register wanted if that is
1267 desirable on this machine for efficiency. */
1269 reg_class_t preferred_class
= rclass
;
1272 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1274 /* Output reloads may need analogous treatment, different in detail. */
1277 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1279 /* Discard what the target said if we cannot do it. */
1280 if (preferred_class
!= NO_REGS
1281 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1282 rclass
= (enum reg_class
) preferred_class
;
1285 /* Make sure we use a class that can handle the actual pseudo
1286 inside any subreg. For example, on the 386, QImode regs
1287 can appear within SImode subregs. Although GENERAL_REGS
1288 can handle SImode, QImode needs a smaller class. */
1289 #ifdef LIMIT_RELOAD_CLASS
1291 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1292 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1293 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1296 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1297 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1298 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1301 /* Verify that this class is at least possible for the mode that
1303 if (this_insn_is_asm
)
1306 if (paradoxical_subreg_p (inmode
, outmode
))
1310 if (mode
== VOIDmode
)
1312 error_for_asm (this_insn
, "cannot reload integer constant "
1313 "operand in %<asm%>");
1318 outmode
= word_mode
;
1320 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1321 if (targetm
.hard_regno_mode_ok (i
, mode
)
1322 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1324 if (i
== FIRST_PSEUDO_REGISTER
)
1326 error_for_asm (this_insn
, "impossible register constraint "
1328 /* Avoid further trouble with this insn. */
1329 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1330 /* We used to continue here setting class to ALL_REGS, but it triggers
1331 sanity check on i386 for:
1332 void foo(long double d)
1336 Returning zero here ought to be safe as we take care in
1337 find_reloads to not process the reloads when instruction was
1344 /* Optional output reloads are always OK even if we have no register class,
1345 since the function of these reloads is only to have spill_reg_store etc.
1346 set, so that the storing insn can be deleted later. */
1347 gcc_assert (rclass
!= NO_REGS
1348 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1350 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1354 /* See if we need a secondary reload register to move between CLASS
1355 and IN or CLASS and OUT. Get the icode and push any required reloads
1356 needed for each of them if so. */
1360 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1361 &secondary_in_icode
, NULL
);
1362 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1363 secondary_out_reload
1364 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1365 type
, &secondary_out_icode
, NULL
);
1367 /* We found no existing reload suitable for re-use.
1368 So add an additional reload. */
1370 if (subreg_in_class
== NO_REGS
1373 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1374 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1375 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1376 /* If a memory location is needed for the copy, make one. */
1377 if (subreg_in_class
!= NO_REGS
1378 && targetm
.secondary_memory_needed (inmode
, subreg_in_class
, rclass
))
1379 get_secondary_mem (in
, inmode
, opnum
, type
);
1384 rld
[i
].rclass
= rclass
;
1385 rld
[i
].inmode
= inmode
;
1386 rld
[i
].outmode
= outmode
;
1388 rld
[i
].optional
= optional
;
1390 rld
[i
].nocombine
= 0;
1391 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1392 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1393 rld
[i
].opnum
= opnum
;
1394 rld
[i
].when_needed
= type
;
1395 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1396 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1397 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1398 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1399 rld
[i
].secondary_p
= 0;
1405 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1406 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1407 && (targetm
.secondary_memory_needed
1408 (outmode
, rclass
, REGNO_REG_CLASS (reg_or_subregno (out
)))))
1409 get_secondary_mem (out
, outmode
, opnum
, type
);
1413 /* We are reusing an existing reload,
1414 but we may have additional information for it.
1415 For example, we may now have both IN and OUT
1416 while the old one may have just one of them. */
1418 /* The modes can be different. If they are, we want to reload in
1419 the larger mode, so that the value is valid for both modes. */
1420 if (inmode
!= VOIDmode
1421 && partial_subreg_p (rld
[i
].inmode
, inmode
))
1422 rld
[i
].inmode
= inmode
;
1423 if (outmode
!= VOIDmode
1424 && partial_subreg_p (rld
[i
].outmode
, outmode
))
1425 rld
[i
].outmode
= outmode
;
1428 rtx in_reg
= inloc
? *inloc
: 0;
1429 /* If we merge reloads for two distinct rtl expressions that
1430 are identical in content, there might be duplicate address
1431 reloads. Remove the extra set now, so that if we later find
1432 that we can inherit this reload, we can get rid of the
1433 address reloads altogether.
1435 Do not do this if both reloads are optional since the result
1436 would be an optional reload which could potentially leave
1437 unresolved address replacements.
1439 It is not sufficient to call transfer_replacements since
1440 choose_reload_regs will remove the replacements for address
1441 reloads of inherited reloads which results in the same
1443 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1444 && ! (rld
[i
].optional
&& optional
))
1446 /* We must keep the address reload with the lower operand
1448 if (opnum
> rld
[i
].opnum
)
1450 remove_address_replacements (in
);
1452 in_reg
= rld
[i
].in_reg
;
1455 remove_address_replacements (rld
[i
].in
);
1457 /* When emitting reloads we don't necessarily look at the in-
1458 and outmode, but also directly at the operands (in and out).
1459 So we can't simply overwrite them with whatever we have found
1460 for this (to-be-merged) reload, we have to "merge" that too.
1461 Reusing another reload already verified that we deal with the
1462 same operands, just possibly in different modes. So we
1463 overwrite the operands only when the new mode is larger.
1464 See also PR33613. */
1466 || partial_subreg_p (GET_MODE (rld
[i
].in
), GET_MODE (in
)))
1470 && partial_subreg_p (GET_MODE (rld
[i
].in_reg
),
1471 GET_MODE (in_reg
))))
1472 rld
[i
].in_reg
= in_reg
;
1478 && partial_subreg_p (GET_MODE (rld
[i
].out
),
1483 || partial_subreg_p (GET_MODE (rld
[i
].out_reg
),
1484 GET_MODE (*outloc
))))
1485 rld
[i
].out_reg
= *outloc
;
1487 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1488 rld
[i
].rclass
= rclass
;
1489 rld
[i
].optional
&= optional
;
1490 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1491 opnum
, rld
[i
].opnum
))
1492 rld
[i
].when_needed
= RELOAD_OTHER
;
1493 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1496 /* If the ostensible rtx being reloaded differs from the rtx found
1497 in the location to substitute, this reload is not safe to combine
1498 because we cannot reliably tell whether it appears in the insn. */
1500 if (in
!= 0 && in
!= *inloc
)
1501 rld
[i
].nocombine
= 1;
1503 /* If we will replace IN and OUT with the reload-reg,
1504 record where they are located so that substitution need
1505 not do a tree walk. */
1507 if (replace_reloads
)
1511 struct replacement
*r
= &replacements
[n_replacements
++];
1516 if (outloc
!= 0 && outloc
!= inloc
)
1518 struct replacement
*r
= &replacements
[n_replacements
++];
1525 /* If this reload is just being introduced and it has both
1526 an incoming quantity and an outgoing quantity that are
1527 supposed to be made to match, see if either one of the two
1528 can serve as the place to reload into.
1530 If one of them is acceptable, set rld[i].reg_rtx
1533 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1535 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1538 earlyclobber_operand_p (out
));
1540 /* If the outgoing register already contains the same value
1541 as the incoming one, we can dispense with loading it.
1542 The easiest way to tell the caller that is to give a phony
1543 value for the incoming operand (same as outgoing one). */
1544 if (rld
[i
].reg_rtx
== out
1545 && (REG_P (in
) || CONSTANT_P (in
))
1546 && find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1547 static_reload_reg_p
, i
, inmode
) != 0)
1551 /* If this is an input reload and the operand contains a register that
1552 dies in this insn and is used nowhere else, see if it is the right class
1553 to be used for this reload. Use it if so. (This occurs most commonly
1554 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1555 this if it is also an output reload that mentions the register unless
1556 the output is a SUBREG that clobbers an entire register.
1558 Note that the operand might be one of the spill regs, if it is a
1559 pseudo reg and we are in a block where spilling has not taken place.
1560 But if there is no spilling in this block, that is OK.
1561 An explicitly used hard reg cannot be a spill reg. */
1563 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1567 machine_mode rel_mode
= inmode
;
1569 if (out
&& partial_subreg_p (rel_mode
, outmode
))
1572 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1573 if (REG_NOTE_KIND (note
) == REG_DEAD
1574 && REG_P (XEXP (note
, 0))
1575 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1576 && reg_mentioned_p (XEXP (note
, 0), in
)
1577 /* Check that a former pseudo is valid; see find_dummy_reload. */
1578 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1579 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1580 ORIGINAL_REGNO (XEXP (note
, 0)))
1581 && REG_NREGS (XEXP (note
, 0)) == 1))
1582 && ! refers_to_regno_for_reload_p (regno
,
1583 end_hard_regno (rel_mode
,
1585 PATTERN (this_insn
), inloc
)
1586 && ! find_reg_fusage (this_insn
, USE
, XEXP (note
, 0))
1587 /* If this is also an output reload, IN cannot be used as
1588 the reload register if it is set in this insn unless IN
1590 && (out
== 0 || in
== out
1591 || ! hard_reg_set_here_p (regno
,
1592 end_hard_regno (rel_mode
, regno
),
1593 PATTERN (this_insn
)))
1594 /* ??? Why is this code so different from the previous?
1595 Is there any simple coherent way to describe the two together?
1596 What's going on here. */
1598 || (GET_CODE (in
) == SUBREG
1599 && (known_equal_after_align_up
1600 (GET_MODE_SIZE (GET_MODE (in
)),
1601 GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))),
1603 /* Make sure the operand fits in the reg that dies. */
1604 && known_le (GET_MODE_SIZE (rel_mode
),
1605 GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1606 && targetm
.hard_regno_mode_ok (regno
, inmode
)
1607 && targetm
.hard_regno_mode_ok (regno
, outmode
))
1610 unsigned int nregs
= MAX (hard_regno_nregs (regno
, inmode
),
1611 hard_regno_nregs (regno
, outmode
));
1613 for (offs
= 0; offs
< nregs
; offs
++)
1614 if (fixed_regs
[regno
+ offs
]
1615 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1620 && (! (refers_to_regno_for_reload_p
1621 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1622 || can_reload_into (in
, regno
, inmode
)))
1624 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1631 output_reloadnum
= i
;
1636 /* Record an additional place we must replace a value
1637 for which we have already recorded a reload.
1638 RELOADNUM is the value returned by push_reload
1639 when the reload was recorded.
1640 This is used in insn patterns that use match_dup. */
1643 push_replacement (rtx
*loc
, int reloadnum
, machine_mode mode
)
1645 if (replace_reloads
)
1647 struct replacement
*r
= &replacements
[n_replacements
++];
1648 r
->what
= reloadnum
;
1654 /* Duplicate any replacement we have recorded to apply at
1655 location ORIG_LOC to also be performed at DUP_LOC.
1656 This is used in insn patterns that use match_dup. */
1659 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1661 int i
, n
= n_replacements
;
1663 for (i
= 0; i
< n
; i
++)
1665 struct replacement
*r
= &replacements
[i
];
1666 if (r
->where
== orig_loc
)
1667 push_replacement (dup_loc
, r
->what
, r
->mode
);
1671 /* Transfer all replacements that used to be in reload FROM to be in
1675 transfer_replacements (int to
, int from
)
1679 for (i
= 0; i
< n_replacements
; i
++)
1680 if (replacements
[i
].what
== from
)
1681 replacements
[i
].what
= to
;
1684 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1685 or a subpart of it. If we have any replacements registered for IN_RTX,
1686 cancel the reloads that were supposed to load them.
1687 Return nonzero if we canceled any reloads. */
1689 remove_address_replacements (rtx in_rtx
)
1692 char reload_flags
[MAX_RELOADS
];
1693 int something_changed
= 0;
1695 memset (reload_flags
, 0, sizeof reload_flags
);
1696 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1698 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1699 reload_flags
[replacements
[i
].what
] |= 1;
1702 replacements
[j
++] = replacements
[i
];
1703 reload_flags
[replacements
[i
].what
] |= 2;
1706 /* Note that the following store must be done before the recursive calls. */
1709 for (i
= n_reloads
- 1; i
>= 0; i
--)
1711 if (reload_flags
[i
] == 1)
1713 deallocate_reload_reg (i
);
1714 remove_address_replacements (rld
[i
].in
);
1716 something_changed
= 1;
1719 return something_changed
;
1722 /* If there is only one output reload, and it is not for an earlyclobber
1723 operand, try to combine it with a (logically unrelated) input reload
1724 to reduce the number of reload registers needed.
1726 This is safe if the input reload does not appear in
1727 the value being output-reloaded, because this implies
1728 it is not needed any more once the original insn completes.
1730 If that doesn't work, see we can use any of the registers that
1731 die in this insn as a reload register. We can if it is of the right
1732 class and does not appear in the value being output-reloaded. */
1735 combine_reloads (void)
1738 int output_reload
= -1;
1739 int secondary_out
= -1;
1742 /* Find the output reload; return unless there is exactly one
1743 and that one is mandatory. */
1745 for (i
= 0; i
< n_reloads
; i
++)
1746 if (rld
[i
].out
!= 0)
1748 if (output_reload
>= 0)
1753 if (output_reload
< 0 || rld
[output_reload
].optional
)
1756 /* An input-output reload isn't combinable. */
1758 if (rld
[output_reload
].in
!= 0)
1761 /* If this reload is for an earlyclobber operand, we can't do anything. */
1762 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1765 /* If there is a reload for part of the address of this operand, we would
1766 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1767 its life to the point where doing this combine would not lower the
1768 number of spill registers needed. */
1769 for (i
= 0; i
< n_reloads
; i
++)
1770 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1771 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1772 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1775 /* Check each input reload; can we combine it? */
1777 for (i
= 0; i
< n_reloads
; i
++)
1778 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1779 /* Life span of this reload must not extend past main insn. */
1780 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1781 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1782 && rld
[i
].when_needed
!= RELOAD_OTHER
1783 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1784 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1785 [(int) rld
[output_reload
].outmode
])
1786 && known_eq (rld
[i
].inc
, 0)
1787 && rld
[i
].reg_rtx
== 0
1788 /* Don't combine two reloads with different secondary
1789 memory locations. */
1790 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1791 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1792 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1793 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1794 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1795 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1796 : (reg_class_subset_p (rld
[i
].rclass
,
1797 rld
[output_reload
].rclass
)
1798 || reg_class_subset_p (rld
[output_reload
].rclass
,
1800 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1801 /* Args reversed because the first arg seems to be
1802 the one that we imagine being modified
1803 while the second is the one that might be affected. */
1804 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1806 /* However, if the input is a register that appears inside
1807 the output, then we also can't share.
1808 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1809 If the same reload reg is used for both reg 69 and the
1810 result to be stored in memory, then that result
1811 will clobber the address of the memory ref. */
1812 && ! (REG_P (rld
[i
].in
)
1813 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1814 rld
[output_reload
].out
))))
1815 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1816 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1817 && (reg_class_size
[(int) rld
[i
].rclass
]
1818 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1819 /* We will allow making things slightly worse by combining an
1820 input and an output, but no worse than that. */
1821 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1822 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1826 /* We have found a reload to combine with! */
1827 rld
[i
].out
= rld
[output_reload
].out
;
1828 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1829 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1830 /* Mark the old output reload as inoperative. */
1831 rld
[output_reload
].out
= 0;
1832 /* The combined reload is needed for the entire insn. */
1833 rld
[i
].when_needed
= RELOAD_OTHER
;
1834 /* If the output reload had a secondary reload, copy it. */
1835 if (rld
[output_reload
].secondary_out_reload
!= -1)
1837 rld
[i
].secondary_out_reload
1838 = rld
[output_reload
].secondary_out_reload
;
1839 rld
[i
].secondary_out_icode
1840 = rld
[output_reload
].secondary_out_icode
;
1843 /* Copy any secondary MEM. */
1844 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1845 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1846 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1847 /* If required, minimize the register class. */
1848 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1850 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1852 /* Transfer all replacements from the old reload to the combined. */
1853 for (j
= 0; j
< n_replacements
; j
++)
1854 if (replacements
[j
].what
== output_reload
)
1855 replacements
[j
].what
= i
;
1860 /* If this insn has only one operand that is modified or written (assumed
1861 to be the first), it must be the one corresponding to this reload. It
1862 is safe to use anything that dies in this insn for that output provided
1863 that it does not occur in the output (we already know it isn't an
1864 earlyclobber. If this is an asm insn, give up. */
1866 if (INSN_CODE (this_insn
) == -1)
1869 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1870 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1871 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1874 /* See if some hard register that dies in this insn and is not used in
1875 the output is the right class. Only works if the register we pick
1876 up can fully hold our output reload. */
1877 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1878 if (REG_NOTE_KIND (note
) == REG_DEAD
1879 && REG_P (XEXP (note
, 0))
1880 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1881 rld
[output_reload
].out
)
1882 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1883 && targetm
.hard_regno_mode_ok (regno
, rld
[output_reload
].outmode
)
1884 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1886 && (hard_regno_nregs (regno
, rld
[output_reload
].outmode
)
1887 <= REG_NREGS (XEXP (note
, 0)))
1888 /* Ensure that a secondary or tertiary reload for this output
1889 won't want this register. */
1890 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1891 || (!(TEST_HARD_REG_BIT
1892 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1893 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1894 || !(TEST_HARD_REG_BIT
1895 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1897 && !fixed_regs
[regno
]
1898 /* Check that a former pseudo is valid; see find_dummy_reload. */
1899 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1900 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1901 ORIGINAL_REGNO (XEXP (note
, 0)))
1902 && REG_NREGS (XEXP (note
, 0)) == 1)))
1904 rld
[output_reload
].reg_rtx
1905 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1910 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1911 See if one of IN and OUT is a register that may be used;
1912 this is desirable since a spill-register won't be needed.
1913 If so, return the register rtx that proves acceptable.
1915 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1916 RCLASS is the register class required for the reload.
1918 If FOR_REAL is >= 0, it is the number of the reload,
1919 and in some cases when it can be discovered that OUT doesn't need
1920 to be computed, clear out rld[FOR_REAL].out.
1922 If FOR_REAL is -1, this should not be done, because this call
1923 is just to see if a register can be found, not to find and install it.
1925 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1926 puts an additional constraint on being able to use IN for OUT since
1927 IN must not appear elsewhere in the insn (it is assumed that IN itself
1928 is safe from the earlyclobber). */
1931 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1932 machine_mode inmode
, machine_mode outmode
,
1933 reg_class_t rclass
, int for_real
, int earlyclobber
)
1941 /* If operands exceed a word, we can't use either of them
1942 unless they have the same size. */
1943 if (maybe_ne (GET_MODE_SIZE (outmode
), GET_MODE_SIZE (inmode
))
1944 && (maybe_gt (GET_MODE_SIZE (outmode
), UNITS_PER_WORD
)
1945 || maybe_gt (GET_MODE_SIZE (inmode
), UNITS_PER_WORD
)))
1948 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1949 respectively refers to a hard register. */
1951 /* Find the inside of any subregs. */
1952 while (GET_CODE (out
) == SUBREG
)
1954 if (REG_P (SUBREG_REG (out
))
1955 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1956 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1957 GET_MODE (SUBREG_REG (out
)),
1960 out
= SUBREG_REG (out
);
1962 while (GET_CODE (in
) == SUBREG
)
1964 if (REG_P (SUBREG_REG (in
))
1965 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1966 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1967 GET_MODE (SUBREG_REG (in
)),
1970 in
= SUBREG_REG (in
);
1973 /* Narrow down the reg class, the same way push_reload will;
1974 otherwise we might find a dummy now, but push_reload won't. */
1976 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1977 if (preferred_class
!= NO_REGS
)
1978 rclass
= (enum reg_class
) preferred_class
;
1981 /* See if OUT will do. */
1983 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1985 unsigned int regno
= REGNO (out
) + out_offset
;
1986 unsigned int nwords
= hard_regno_nregs (regno
, outmode
);
1989 /* When we consider whether the insn uses OUT,
1990 ignore references within IN. They don't prevent us
1991 from copying IN into OUT, because those refs would
1992 move into the insn that reloads IN.
1994 However, we only ignore IN in its role as this reload.
1995 If the insn uses IN elsewhere and it contains OUT,
1996 that counts. We can't be sure it's the "same" operand
1997 so it might not go through this reload.
1999 We also need to avoid using OUT if it, or part of it, is a
2000 fixed register. Modifying such registers, even transiently,
2001 may have undefined effects on the machine, such as modifying
2002 the stack pointer. */
2004 *inloc
= const0_rtx
;
2006 if (regno
< FIRST_PSEUDO_REGISTER
2007 && targetm
.hard_regno_mode_ok (regno
, outmode
)
2008 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2009 PATTERN (this_insn
), outloc
))
2013 for (i
= 0; i
< nwords
; i
++)
2014 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2016 || fixed_regs
[regno
+ i
])
2021 if (REG_P (real_out
))
2024 value
= gen_rtx_REG (outmode
, regno
);
2031 /* Consider using IN if OUT was not acceptable
2032 or if OUT dies in this insn (like the quotient in a divmod insn).
2033 We can't use IN unless it is dies in this insn,
2034 which means we must know accurately which hard regs are live.
2035 Also, the result can't go in IN if IN is used within OUT,
2036 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2037 if (hard_regs_live_known
2039 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2041 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2042 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2043 && !fixed_regs
[REGNO (in
)]
2044 && targetm
.hard_regno_mode_ok (REGNO (in
),
2045 /* The only case where out and real_out
2046 might have different modes is where
2047 real_out is a subreg, and in that
2048 case, out has a real mode. */
2049 (GET_MODE (out
) != VOIDmode
2050 ? GET_MODE (out
) : outmode
))
2051 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2052 /* However only do this if we can be sure that this input
2053 operand doesn't correspond with an uninitialized pseudo.
2054 global can assign some hardreg to it that is the same as
2055 the one assigned to a different, also live pseudo (as it
2056 can ignore the conflict). We must never introduce writes
2057 to such hardregs, as they would clobber the other live
2058 pseudo. See PR 20973. */
2059 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2060 ORIGINAL_REGNO (in
))
2061 /* Similarly, only do this if we can be sure that the death
2062 note is still valid. global can assign some hardreg to
2063 the pseudo referenced in the note and simultaneously a
2064 subword of this hardreg to a different, also live pseudo,
2065 because only another subword of the hardreg is actually
2066 used in the insn. This cannot happen if the pseudo has
2067 been assigned exactly one hardreg. See PR 33732. */
2068 && REG_NREGS (in
) == 1)))
2070 unsigned int regno
= REGNO (in
) + in_offset
;
2071 unsigned int nwords
= hard_regno_nregs (regno
, inmode
);
2073 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2074 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2075 PATTERN (this_insn
))
2077 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2078 PATTERN (this_insn
), inloc
)))
2082 for (i
= 0; i
< nwords
; i
++)
2083 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2089 /* If we were going to use OUT as the reload reg
2090 and changed our mind, it means OUT is a dummy that
2091 dies here. So don't bother copying value to it. */
2092 if (for_real
>= 0 && value
== real_out
)
2093 rld
[for_real
].out
= 0;
2094 if (REG_P (real_in
))
2097 value
= gen_rtx_REG (inmode
, regno
);
2105 /* This page contains subroutines used mainly for determining
2106 whether the IN or an OUT of a reload can serve as the
2109 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2112 earlyclobber_operand_p (rtx x
)
2116 for (i
= 0; i
< n_earlyclobbers
; i
++)
2117 if (reload_earlyclobbers
[i
] == x
)
2123 /* Return 1 if expression X alters a hard reg in the range
2124 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2125 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2126 X should be the body of an instruction. */
2129 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2131 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2133 rtx op0
= SET_DEST (x
);
2135 while (GET_CODE (op0
) == SUBREG
)
2136 op0
= SUBREG_REG (op0
);
2139 unsigned int r
= REGNO (op0
);
2141 /* See if this reg overlaps range under consideration. */
2143 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2147 else if (GET_CODE (x
) == PARALLEL
)
2149 int i
= XVECLEN (x
, 0) - 1;
2152 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2159 /* Return true if ADDR is a valid memory address for mode MODE
2160 in address space AS, and check that each pseudo reg has the
2161 proper kind of hard reg. */
2164 strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED
,
2165 rtx addr
, addr_space_t as
)
2167 #ifdef GO_IF_LEGITIMATE_ADDRESS
2168 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2169 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2175 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2179 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2180 if they are the same hard reg, and has special hacks for
2181 autoincrement and autodecrement.
2182 This is specifically intended for find_reloads to use
2183 in determining whether two operands match.
2184 X is the operand whose number is the lower of the two.
2186 The value is 2 if Y contains a pre-increment that matches
2187 a non-incrementing address in X. */
2189 /* ??? To be completely correct, we should arrange to pass
2190 for X the output operand and for Y the input operand.
2191 For now, we assume that the output operand has the lower number
2192 because that is natural in (SET output (... input ...)). */
2195 operands_match_p (rtx x
, rtx y
)
2198 RTX_CODE code
= GET_CODE (x
);
2204 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2205 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2206 && REG_P (SUBREG_REG (y
)))))
2212 i
= REGNO (SUBREG_REG (x
));
2213 if (i
>= FIRST_PSEUDO_REGISTER
)
2215 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2216 GET_MODE (SUBREG_REG (x
)),
2223 if (GET_CODE (y
) == SUBREG
)
2225 j
= REGNO (SUBREG_REG (y
));
2226 if (j
>= FIRST_PSEUDO_REGISTER
)
2228 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2229 GET_MODE (SUBREG_REG (y
)),
2236 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2237 multiple hard register group of scalar integer registers, so that
2238 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2240 scalar_int_mode xmode
;
2241 if (REG_WORDS_BIG_ENDIAN
2242 && is_a
<scalar_int_mode
> (GET_MODE (x
), &xmode
)
2243 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
2244 && i
< FIRST_PSEUDO_REGISTER
)
2245 i
+= hard_regno_nregs (i
, xmode
) - 1;
2246 scalar_int_mode ymode
;
2247 if (REG_WORDS_BIG_ENDIAN
2248 && is_a
<scalar_int_mode
> (GET_MODE (y
), &ymode
)
2249 && GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
2250 && j
< FIRST_PSEUDO_REGISTER
)
2251 j
+= hard_regno_nregs (j
, ymode
) - 1;
2255 /* If two operands must match, because they are really a single
2256 operand of an assembler insn, then two postincrements are invalid
2257 because the assembler insn would increment only once.
2258 On the other hand, a postincrement matches ordinary indexing
2259 if the postincrement is the output operand. */
2260 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2261 return operands_match_p (XEXP (x
, 0), y
);
2262 /* Two preincrements are invalid
2263 because the assembler insn would increment only once.
2264 On the other hand, a preincrement matches ordinary indexing
2265 if the preincrement is the input operand.
2266 In this case, return 2, since some callers need to do special
2267 things when this happens. */
2268 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2269 || GET_CODE (y
) == PRE_MODIFY
)
2270 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2274 /* Now we have disposed of all the cases in which different rtx codes
2276 if (code
!= GET_CODE (y
))
2279 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2280 if (GET_MODE (x
) != GET_MODE (y
))
2283 /* MEMs referring to different address space are not equivalent. */
2284 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2293 if (!same_vector_encodings_p (x
, y
))
2298 return label_ref_label (x
) == label_ref_label (y
);
2300 return XSTR (x
, 0) == XSTR (y
, 0);
2306 /* Compare the elements. If any pair of corresponding elements
2307 fail to match, return 0 for the whole things. */
2310 fmt
= GET_RTX_FORMAT (code
);
2311 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2317 if (XWINT (x
, i
) != XWINT (y
, i
))
2322 if (XINT (x
, i
) != XINT (y
, i
))
2327 if (maybe_ne (SUBREG_BYTE (x
), SUBREG_BYTE (y
)))
2332 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2335 /* If any subexpression returns 2,
2336 we should return 2 if we are successful. */
2345 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2347 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2349 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2357 /* It is believed that rtx's at this level will never
2358 contain anything but integers and other rtx's,
2359 except for within LABEL_REFs and SYMBOL_REFs. */
2364 return 1 + success_2
;
2367 /* Describe the range of registers or memory referenced by X.
2368 If X is a register, set REG_FLAG and put the first register
2369 number into START and the last plus one into END.
2370 If X is a memory reference, put a base address into BASE
2371 and a range of integer offsets into START and END.
2372 If X is pushing on the stack, we can assume it causes no trouble,
2373 so we set the SAFE field. */
2375 static struct decomposition
2378 struct decomposition val
;
2379 int all_const
= 0, regno
;
2381 memset (&val
, 0, sizeof (val
));
2383 switch (GET_CODE (x
))
2387 rtx base
= NULL_RTX
, offset
= 0;
2388 rtx addr
= XEXP (x
, 0);
2390 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2391 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2393 val
.base
= XEXP (addr
, 0);
2394 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2395 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2396 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2400 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2402 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2403 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2404 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2406 val
.base
= XEXP (addr
, 0);
2407 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2408 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2409 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2414 if (GET_CODE (addr
) == CONST
)
2416 addr
= XEXP (addr
, 0);
2419 if (GET_CODE (addr
) == PLUS
)
2421 if (CONSTANT_P (XEXP (addr
, 0)))
2423 base
= XEXP (addr
, 1);
2424 offset
= XEXP (addr
, 0);
2426 else if (CONSTANT_P (XEXP (addr
, 1)))
2428 base
= XEXP (addr
, 0);
2429 offset
= XEXP (addr
, 1);
2436 offset
= const0_rtx
;
2438 if (GET_CODE (offset
) == CONST
)
2439 offset
= XEXP (offset
, 0);
2440 if (GET_CODE (offset
) == PLUS
)
2442 if (CONST_INT_P (XEXP (offset
, 0)))
2444 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2445 offset
= XEXP (offset
, 0);
2447 else if (CONST_INT_P (XEXP (offset
, 1)))
2449 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2450 offset
= XEXP (offset
, 1);
2454 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2455 offset
= const0_rtx
;
2458 else if (!CONST_INT_P (offset
))
2460 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2461 offset
= const0_rtx
;
2464 if (all_const
&& GET_CODE (base
) == PLUS
)
2465 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2467 gcc_assert (CONST_INT_P (offset
));
2469 val
.start
= INTVAL (offset
);
2470 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2477 regno
= true_regnum (x
);
2478 if (regno
< 0 || regno
>= FIRST_PSEUDO_REGISTER
)
2480 /* A pseudo with no hard reg. */
2481 val
.start
= REGNO (x
);
2482 val
.end
= val
.start
+ 1;
2488 val
.end
= end_hard_regno (GET_MODE (x
), regno
);
2493 if (!REG_P (SUBREG_REG (x
)))
2494 /* This could be more precise, but it's good enough. */
2495 return decompose (SUBREG_REG (x
));
2496 regno
= true_regnum (x
);
2497 if (regno
< 0 || regno
>= FIRST_PSEUDO_REGISTER
)
2498 return decompose (SUBREG_REG (x
));
2503 val
.end
= regno
+ subreg_nregs (x
);
2507 /* This hasn't been assigned yet, so it can't conflict yet. */
2512 gcc_assert (CONSTANT_P (x
));
2519 /* Return 1 if altering Y will not modify the value of X.
2520 Y is also described by YDATA, which should be decompose (Y). */
2523 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2525 struct decomposition xdata
;
2528 /* In this case the decomposition structure contains register
2529 numbers rather than byte offsets. */
2530 return !refers_to_regno_for_reload_p (ydata
.start
.to_constant (),
2531 ydata
.end
.to_constant (),
2536 gcc_assert (MEM_P (y
));
2537 /* If Y is memory and X is not, Y can't affect X. */
2541 xdata
= decompose (x
);
2543 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2545 /* If bases are distinct symbolic constants, there is no overlap. */
2546 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2548 /* Constants and stack slots never overlap. */
2549 if (CONSTANT_P (xdata
.base
)
2550 && (ydata
.base
== frame_pointer_rtx
2551 || ydata
.base
== hard_frame_pointer_rtx
2552 || ydata
.base
== stack_pointer_rtx
))
2554 if (CONSTANT_P (ydata
.base
)
2555 && (xdata
.base
== frame_pointer_rtx
2556 || xdata
.base
== hard_frame_pointer_rtx
2557 || xdata
.base
== stack_pointer_rtx
))
2559 /* If either base is variable, we don't know anything. */
2563 return known_ge (xdata
.start
, ydata
.end
) || known_ge (ydata
.start
, xdata
.end
);
2566 /* Similar, but calls decompose. */
2569 safe_from_earlyclobber (rtx op
, rtx clobber
)
2571 struct decomposition early_data
;
2573 early_data
= decompose (clobber
);
2574 return immune_p (op
, clobber
, early_data
);
2577 /* Main entry point of this file: search the body of INSN
2578 for values that need reloading and record them with push_reload.
2579 REPLACE nonzero means record also where the values occur
2580 so that subst_reloads can be used.
2582 IND_LEVELS says how many levels of indirection are supported by this
2583 machine; a value of zero means that a memory reference is not a valid
2586 LIVE_KNOWN says we have valid information about which hard
2587 regs are live at each point in the program; this is true when
2588 we are called from global_alloc but false when stupid register
2589 allocation has been done.
2591 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2592 which is nonnegative if the reg has been commandeered for reloading into.
2593 It is copied into STATIC_RELOAD_REG_P and referenced from there
2594 by various subroutines.
2596 Return TRUE if some operands need to be changed, because of swapping
2597 commutative operands, reg_equiv_address substitution, or whatever. */
2600 find_reloads (rtx_insn
*insn
, int replace
, int ind_levels
, int live_known
,
2601 short *reload_reg_p
)
2603 int insn_code_number
;
2606 /* These start out as the constraints for the insn
2607 and they are chewed up as we consider alternatives. */
2608 const char *constraints
[MAX_RECOG_OPERANDS
];
2609 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2611 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2612 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2613 /* Nonzero for a MEM operand whose entire address needs a reload.
2614 May be -1 to indicate the entire address may or may not need a reload. */
2615 int address_reloaded
[MAX_RECOG_OPERANDS
];
2616 /* Nonzero for an address operand that needs to be completely reloaded.
2617 May be -1 to indicate the entire operand may or may not need a reload. */
2618 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2619 /* Value of enum reload_type to use for operand. */
2620 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2621 /* Value of enum reload_type to use within address of operand. */
2622 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2623 /* Save the usage of each operand. */
2624 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2625 int no_input_reloads
= 0, no_output_reloads
= 0;
2627 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2628 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2629 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2630 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2631 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2632 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2633 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2634 int this_alternative_number
;
2635 int goal_alternative_number
= 0;
2636 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2637 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2638 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2639 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2640 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2641 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2642 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2643 int goal_alternative_swapped
;
2646 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2647 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2648 rtx body
= PATTERN (insn
);
2649 rtx set
= single_set (insn
);
2650 int goal_earlyclobber
= 0, this_earlyclobber
;
2651 machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2657 n_earlyclobbers
= 0;
2658 replace_reloads
= replace
;
2659 hard_regs_live_known
= live_known
;
2660 static_reload_reg_p
= reload_reg_p
;
2662 if (JUMP_P (insn
) && INSN_CODE (insn
) < 0)
2664 extract_insn (insn
);
2665 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2666 if (recog_data
.operand_type
[i
] != OP_IN
)
2668 if (i
< recog_data
.n_operands
)
2670 error_for_asm (insn
,
2671 "the target does not support %<asm goto%> "
2672 "with outputs in %<asm%>");
2673 ira_nullify_asm_goto (insn
);
2678 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads. */
2679 if (JUMP_P (insn
) || CALL_P (insn
))
2680 no_output_reloads
= 1;
2682 /* The eliminated forms of any secondary memory locations are per-insn, so
2683 clear them out here. */
2685 if (secondary_memlocs_elim_used
)
2687 memset (secondary_memlocs_elim
, 0,
2688 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2689 secondary_memlocs_elim_used
= 0;
2692 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2693 is cheap to move between them. If it is not, there may not be an insn
2694 to do the copy, so we may need a reload. */
2695 if (GET_CODE (body
) == SET
2696 && REG_P (SET_DEST (body
))
2697 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2698 && REG_P (SET_SRC (body
))
2699 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2700 && register_move_cost (GET_MODE (SET_SRC (body
)),
2701 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2702 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2705 extract_insn (insn
);
2707 noperands
= reload_n_operands
= recog_data
.n_operands
;
2708 n_alternatives
= recog_data
.n_alternatives
;
2710 /* Just return "no reloads" if insn has no operands with constraints. */
2711 if (noperands
== 0 || n_alternatives
== 0)
2714 insn_code_number
= INSN_CODE (insn
);
2715 this_insn_is_asm
= insn_code_number
< 0;
2717 memcpy (operand_mode
, recog_data
.operand_mode
,
2718 noperands
* sizeof (machine_mode
));
2719 memcpy (constraints
, recog_data
.constraints
,
2720 noperands
* sizeof (const char *));
2724 /* If we will need to know, later, whether some pair of operands
2725 are the same, we must compare them now and save the result.
2726 Reloading the base and index registers will clobber them
2727 and afterward they will fail to match. */
2729 for (i
= 0; i
< noperands
; i
++)
2735 substed_operand
[i
] = recog_data
.operand
[i
];
2738 modified
[i
] = RELOAD_READ
;
2740 /* Scan this operand's constraint to see if it is an output operand,
2741 an in-out operand, is commutative, or should match another. */
2745 p
+= CONSTRAINT_LEN (c
, p
);
2749 modified
[i
] = RELOAD_WRITE
;
2752 modified
[i
] = RELOAD_READ_WRITE
;
2756 /* The last operand should not be marked commutative. */
2757 gcc_assert (i
!= noperands
- 1);
2759 /* We currently only support one commutative pair of
2760 operands. Some existing asm code currently uses more
2761 than one pair. Previously, that would usually work,
2762 but sometimes it would crash the compiler. We
2763 continue supporting that case as well as we can by
2764 silently ignoring all but the first pair. In the
2765 future we may handle it correctly. */
2766 if (commutative
< 0)
2769 gcc_assert (this_insn_is_asm
);
2772 /* Use of ISDIGIT is tempting here, but it may get expensive because
2773 of locale support we don't want. */
2774 case '0': case '1': case '2': case '3': case '4':
2775 case '5': case '6': case '7': case '8': case '9':
2777 c
= strtoul (p
- 1, &end
, 10);
2780 operands_match
[c
][i
]
2781 = operands_match_p (recog_data
.operand
[c
],
2782 recog_data
.operand
[i
]);
2784 /* An operand may not match itself. */
2785 gcc_assert (c
!= i
);
2787 /* If C can be commuted with C+1, and C might need to match I,
2788 then C+1 might also need to match I. */
2789 if (commutative
>= 0)
2791 if (c
== commutative
|| c
== commutative
+ 1)
2793 int other
= c
+ (c
== commutative
? 1 : -1);
2794 operands_match
[other
][i
]
2795 = operands_match_p (recog_data
.operand
[other
],
2796 recog_data
.operand
[i
]);
2798 if (i
== commutative
|| i
== commutative
+ 1)
2800 int other
= i
+ (i
== commutative
? 1 : -1);
2801 operands_match
[c
][other
]
2802 = operands_match_p (recog_data
.operand
[c
],
2803 recog_data
.operand
[other
]);
2805 /* Note that C is supposed to be less than I.
2806 No need to consider altering both C and I because in
2807 that case we would alter one into the other. */
2814 /* Examine each operand that is a memory reference or memory address
2815 and reload parts of the addresses into index registers.
2816 Also here any references to pseudo regs that didn't get hard regs
2817 but are equivalent to constants get replaced in the insn itself
2818 with those constants. Nobody will ever see them again.
2820 Finally, set up the preferred classes of each operand. */
2822 for (i
= 0; i
< noperands
; i
++)
2824 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2826 address_reloaded
[i
] = 0;
2827 address_operand_reloaded
[i
] = 0;
2828 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2829 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2832 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2833 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2836 if (*constraints
[i
] == 0)
2837 /* Ignore things like match_operator operands. */
2839 else if (insn_extra_address_constraint
2840 (lookup_constraint (constraints
[i
])))
2842 address_operand_reloaded
[i
]
2843 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2844 recog_data
.operand
[i
],
2845 recog_data
.operand_loc
[i
],
2846 i
, operand_type
[i
], ind_levels
, insn
);
2848 /* If we now have a simple operand where we used to have a
2849 PLUS or MULT or ASHIFT, re-recognize and try again. */
2850 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2851 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2852 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2853 || GET_CODE (recog_data
.operand
[i
]) == ASHIFT
2854 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2856 INSN_CODE (insn
) = -1;
2857 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2862 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2863 substed_operand
[i
] = recog_data
.operand
[i
];
2865 /* Address operands are reloaded in their existing mode,
2866 no matter what is specified in the machine description. */
2867 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2869 /* If the address is a single CONST_INT pick address mode
2870 instead otherwise we will later not know in which mode
2871 the reload should be performed. */
2872 if (operand_mode
[i
] == VOIDmode
)
2873 operand_mode
[i
] = Pmode
;
2876 else if (code
== MEM
)
2879 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2880 recog_data
.operand_loc
[i
],
2881 XEXP (recog_data
.operand
[i
], 0),
2882 &XEXP (recog_data
.operand
[i
], 0),
2883 i
, address_type
[i
], ind_levels
, insn
);
2884 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2885 substed_operand
[i
] = recog_data
.operand
[i
];
2887 else if (code
== SUBREG
)
2889 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2891 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2894 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2896 &address_reloaded
[i
]);
2898 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2899 that didn't get a hard register, emit a USE with a REG_EQUAL
2900 note in front so that we might inherit a previous, possibly
2906 && known_ge (GET_MODE_SIZE (GET_MODE (reg
)),
2907 GET_MODE_SIZE (GET_MODE (op
)))
2908 && reg_equiv_constant (REGNO (reg
)) == 0)
2909 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2911 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2913 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2915 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2916 /* We can get a PLUS as an "operand" as a result of register
2917 elimination. See eliminate_regs and gen_reload. We handle
2918 a unary operator by reloading the operand. */
2919 substed_operand
[i
] = recog_data
.operand
[i
]
2920 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2921 ind_levels
, 0, insn
,
2922 &address_reloaded
[i
]);
2923 else if (code
== REG
)
2925 /* This is equivalent to calling find_reloads_toplev.
2926 The code is duplicated for speed.
2927 When we find a pseudo always equivalent to a constant,
2928 we replace it by the constant. We must be sure, however,
2929 that we don't try to replace it in the insn in which it
2931 int regno
= REGNO (recog_data
.operand
[i
]);
2932 if (reg_equiv_constant (regno
) != 0
2933 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2935 /* Record the existing mode so that the check if constants are
2936 allowed will work when operand_mode isn't specified. */
2938 if (operand_mode
[i
] == VOIDmode
)
2939 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2941 substed_operand
[i
] = recog_data
.operand
[i
]
2942 = reg_equiv_constant (regno
);
2944 if (reg_equiv_memory_loc (regno
) != 0
2945 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2946 /* We need not give a valid is_set_dest argument since the case
2947 of a constant equivalence was checked above. */
2948 substed_operand
[i
] = recog_data
.operand
[i
]
2949 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2950 ind_levels
, 0, insn
,
2951 &address_reloaded
[i
]);
2953 /* If the operand is still a register (we didn't replace it with an
2954 equivalent), get the preferred class to reload it into. */
2955 code
= GET_CODE (recog_data
.operand
[i
]);
2957 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2958 >= FIRST_PSEUDO_REGISTER
)
2959 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2963 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2964 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2967 /* If this is simply a copy from operand 1 to operand 0, merge the
2968 preferred classes for the operands. */
2969 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2970 && recog_data
.operand
[1] == SET_SRC (set
))
2972 preferred_class
[0] = preferred_class
[1]
2973 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2974 pref_or_nothing
[0] |= pref_or_nothing
[1];
2975 pref_or_nothing
[1] |= pref_or_nothing
[0];
2978 /* Now see what we need for pseudo-regs that didn't get hard regs
2979 or got the wrong kind of hard reg. For this, we must consider
2980 all the operands together against the register constraints. */
2982 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2984 goal_alternative_swapped
= 0;
2986 /* The constraints are made of several alternatives.
2987 Each operand's constraint looks like foo,bar,... with commas
2988 separating the alternatives. The first alternatives for all
2989 operands go together, the second alternatives go together, etc.
2991 First loop over alternatives. */
2993 alternative_mask enabled
= get_enabled_alternatives (insn
);
2994 for (this_alternative_number
= 0;
2995 this_alternative_number
< n_alternatives
;
2996 this_alternative_number
++)
3000 if (!TEST_BIT (enabled
, this_alternative_number
))
3004 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3005 constraints
[i
] = skip_alternative (constraints
[i
]);
3010 /* If insn is commutative (it's safe to exchange a certain pair
3011 of operands) then we need to try each alternative twice, the
3012 second time matching those two operands as if we had
3013 exchanged them. To do this, really exchange them in
3015 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3017 /* Loop over operands for one constraint alternative. */
3018 /* LOSERS counts those that don't fit this alternative
3019 and would require loading. */
3021 /* BAD is set to 1 if it some operand can't fit this alternative
3022 even after reloading. */
3024 /* REJECT is a count of how undesirable this alternative says it is
3025 if any reloading is required. If the alternative matches exactly
3026 then REJECT is ignored, but otherwise it gets this much
3027 counted against it in addition to the reloading needed. Each
3028 ? counts three times here since we want the disparaging caused by
3029 a bad register class to only count 1/3 as much. */
3034 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3035 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3036 /* Swap the duplicates too. */
3037 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3038 if (recog_data
.dup_num
[i
] == commutative
3039 || recog_data
.dup_num
[i
] == commutative
+ 1)
3040 *recog_data
.dup_loc
[i
]
3041 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3043 std::swap (preferred_class
[commutative
],
3044 preferred_class
[commutative
+ 1]);
3045 std::swap (pref_or_nothing
[commutative
],
3046 pref_or_nothing
[commutative
+ 1]);
3047 std::swap (address_reloaded
[commutative
],
3048 address_reloaded
[commutative
+ 1]);
3051 this_earlyclobber
= 0;
3053 for (i
= 0; i
< noperands
; i
++)
3055 const char *p
= constraints
[i
];
3060 /* 0 => this operand can be reloaded somehow for this alternative. */
3062 /* 0 => this operand can be reloaded if the alternative allows regs. */
3066 rtx operand
= recog_data
.operand
[i
];
3068 /* Nonzero means this is a MEM that must be reloaded into a reg
3069 regardless of what the constraint says. */
3070 int force_reload
= 0;
3072 /* Nonzero if a constant forced into memory would be OK for this
3075 int earlyclobber
= 0;
3076 enum constraint_num cn
;
3079 /* If the predicate accepts a unary operator, it means that
3080 we need to reload the operand, but do not do this for
3081 match_operator and friends. */
3082 if (UNARY_P (operand
) && *p
!= 0)
3083 operand
= XEXP (operand
, 0);
3085 /* If the operand is a SUBREG, extract
3086 the REG or MEM (or maybe even a constant) within.
3087 (Constants can occur as a result of reg_equiv_constant.) */
3089 while (GET_CODE (operand
) == SUBREG
)
3091 /* Offset only matters when operand is a REG and
3092 it is a hard reg. This is because it is passed
3093 to reg_fits_class_p if it is a REG and all pseudos
3094 return 0 from that function. */
3095 if (REG_P (SUBREG_REG (operand
))
3096 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3098 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3099 GET_MODE (SUBREG_REG (operand
)),
3100 SUBREG_BYTE (operand
),
3101 GET_MODE (operand
)) < 0)
3103 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3104 GET_MODE (SUBREG_REG (operand
)),
3105 SUBREG_BYTE (operand
),
3106 GET_MODE (operand
));
3108 operand
= SUBREG_REG (operand
);
3109 /* Force reload if this is a constant or PLUS or if there may
3110 be a problem accessing OPERAND in the outer mode. */
3111 scalar_int_mode inner_mode
;
3112 if (CONSTANT_P (operand
)
3113 || GET_CODE (operand
) == PLUS
3114 /* We must force a reload of paradoxical SUBREGs
3115 of a MEM because the alignment of the inner value
3116 may not be enough to do the outer reference. On
3117 big-endian machines, it may also reference outside
3120 On machines that extend byte operations and we have a
3121 SUBREG where both the inner and outer modes are no wider
3122 than a word and the inner mode is narrower, is integral,
3123 and gets extended when loaded from memory, combine.c has
3124 made assumptions about the behavior of the machine in such
3125 register access. If the data is, in fact, in memory we
3126 must always load using the size assumed to be in the
3127 register and let the insn do the different-sized
3130 This is doubly true if WORD_REGISTER_OPERATIONS. In
3131 this case eliminate_regs has left non-paradoxical
3132 subregs for push_reload to see. Make sure it does
3133 by forcing the reload.
3135 ??? When is it right at this stage to have a subreg
3136 of a mem that is _not_ to be handled specially? IMO
3137 those should have been reduced to just a mem. */
3138 || ((MEM_P (operand
)
3140 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3141 && (WORD_REGISTER_OPERATIONS
3143 (GET_MODE_BITSIZE (GET_MODE (operand
)),
3145 && (paradoxical_subreg_p
3146 (operand_mode
[i
], GET_MODE (operand
)))))
3148 || (known_le (GET_MODE_SIZE (operand_mode
[i
]),
3150 && (is_a
<scalar_int_mode
>
3151 (GET_MODE (operand
), &inner_mode
))
3152 && (GET_MODE_SIZE (inner_mode
)
3154 && paradoxical_subreg_p (operand_mode
[i
],
3156 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)))
3157 /* We must force a reload of a SUBREG's inner expression
3158 if it is a pseudo that will become a MEM and the MEM
3159 has a mode-dependent address, as in that case we
3160 obviously cannot change the mode of the MEM to that
3161 of the containing SUBREG as that would change the
3162 interpretation of the address. */
3164 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3165 && reg_equiv_mem (REGNO (operand
))
3166 && (mode_dependent_address_p
3167 (XEXP (reg_equiv_mem (REGNO (operand
)), 0),
3169 (reg_equiv_mem (REGNO (operand
)))))))
3174 this_alternative
[i
] = NO_REGS
;
3175 this_alternative_win
[i
] = 0;
3176 this_alternative_match_win
[i
] = 0;
3177 this_alternative_offmemok
[i
] = 0;
3178 this_alternative_earlyclobber
[i
] = 0;
3179 this_alternative_matches
[i
] = -1;
3181 /* An empty constraint or empty alternative
3182 allows anything which matched the pattern. */
3183 if (*p
== 0 || *p
== ',')
3186 /* Scan this alternative's specs for this operand;
3187 set WIN if the operand fits any letter in this alternative.
3188 Otherwise, clear BADOP if this operand could
3189 fit some letter after reloads,
3190 or set WINREG if this operand could fit after reloads
3191 provided the constraint allows some registers. */
3194 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3212 /* Ignore rest of this alternative as far as
3213 reloading is concerned. */
3216 while (*p
&& *p
!= ',');
3220 case '0': case '1': case '2': case '3': case '4':
3221 case '5': case '6': case '7': case '8': case '9':
3222 m
= strtoul (p
, &end
, 10);
3226 this_alternative_matches
[i
] = m
;
3227 /* We are supposed to match a previous operand.
3228 If we do, we win if that one did.
3229 If we do not, count both of the operands as losers.
3230 (This is too conservative, since most of the time
3231 only a single reload insn will be needed to make
3232 the two operands win. As a result, this alternative
3233 may be rejected when it is actually desirable.) */
3234 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3235 /* If we are matching as if two operands were swapped,
3236 also pretend that operands_match had been computed
3238 But if I is the second of those and C is the first,
3239 don't exchange them, because operands_match is valid
3240 only on one side of its diagonal. */
3242 [(m
== commutative
|| m
== commutative
+ 1)
3243 ? 2 * commutative
+ 1 - m
: m
]
3244 [(i
== commutative
|| i
== commutative
+ 1)
3245 ? 2 * commutative
+ 1 - i
: i
])
3246 : operands_match
[m
][i
])
3248 /* If we are matching a non-offsettable address where an
3249 offsettable address was expected, then we must reject
3250 this combination, because we can't reload it. */
3251 if (this_alternative_offmemok
[m
]
3252 && MEM_P (recog_data
.operand
[m
])
3253 && this_alternative
[m
] == NO_REGS
3254 && ! this_alternative_win
[m
])
3257 did_match
= this_alternative_win
[m
];
3261 /* Operands don't match. */
3264 /* Retroactively mark the operand we had to match
3265 as a loser, if it wasn't already. */
3266 if (this_alternative_win
[m
])
3268 this_alternative_win
[m
] = 0;
3269 if (this_alternative
[m
] == NO_REGS
)
3271 /* But count the pair only once in the total badness of
3272 this alternative, if the pair can be a dummy reload.
3273 The pointers in operand_loc are not swapped; swap
3274 them by hand if necessary. */
3275 if (swapped
&& i
== commutative
)
3276 loc1
= commutative
+ 1;
3277 else if (swapped
&& i
== commutative
+ 1)
3281 if (swapped
&& m
== commutative
)
3282 loc2
= commutative
+ 1;
3283 else if (swapped
&& m
== commutative
+ 1)
3288 = find_dummy_reload (recog_data
.operand
[i
],
3289 recog_data
.operand
[m
],
3290 recog_data
.operand_loc
[loc1
],
3291 recog_data
.operand_loc
[loc2
],
3292 operand_mode
[i
], operand_mode
[m
],
3293 this_alternative
[m
], -1,
3294 this_alternative_earlyclobber
[m
]);
3299 /* This can be fixed with reloads if the operand
3300 we are supposed to match can be fixed with reloads. */
3302 this_alternative
[i
] = this_alternative
[m
];
3304 /* If we have to reload this operand and some previous
3305 operand also had to match the same thing as this
3306 operand, we don't know how to do that. So reject this
3308 if (! did_match
|| force_reload
)
3309 for (j
= 0; j
< i
; j
++)
3310 if (this_alternative_matches
[j
]
3311 == this_alternative_matches
[i
])
3319 /* All necessary reloads for an address_operand
3320 were handled in find_reloads_address. */
3322 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3328 case TARGET_MEM_CONSTRAINT
:
3333 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3334 && reg_renumber
[REGNO (operand
)] < 0))
3336 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3343 && ! address_reloaded
[i
]
3344 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3345 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3351 && ! address_reloaded
[i
]
3352 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3353 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3357 /* Memory operand whose address is not offsettable. */
3362 && ! (ind_levels
? offsettable_memref_p (operand
)
3363 : offsettable_nonstrict_memref_p (operand
))
3364 /* Certain mem addresses will become offsettable
3365 after they themselves are reloaded. This is important;
3366 we don't want our own handling of unoffsettables
3367 to override the handling of reg_equiv_address. */
3368 && !(REG_P (XEXP (operand
, 0))
3370 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3374 /* Memory operand whose address is offsettable. */
3378 if ((MEM_P (operand
)
3379 /* If IND_LEVELS, find_reloads_address won't reload a
3380 pseudo that didn't get a hard reg, so we have to
3381 reject that case. */
3382 && ((ind_levels
? offsettable_memref_p (operand
)
3383 : offsettable_nonstrict_memref_p (operand
))
3384 /* A reloaded address is offsettable because it is now
3385 just a simple register indirect. */
3386 || address_reloaded
[i
] == 1))
3388 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3389 && reg_renumber
[REGNO (operand
)] < 0
3390 /* If reg_equiv_address is nonzero, we will be
3391 loading it into a register; hence it will be
3392 offsettable, but we cannot say that reg_equiv_mem
3393 is offsettable without checking. */
3394 && ((reg_equiv_mem (REGNO (operand
)) != 0
3395 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3396 || (reg_equiv_address (REGNO (operand
)) != 0))))
3398 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3406 /* Output operand that is stored before the need for the
3407 input operands (and their index registers) is over. */
3408 earlyclobber
= 1, this_earlyclobber
= 1;
3418 /* A PLUS is never a valid operand, but reload can make
3419 it from a register when eliminating registers. */
3420 && GET_CODE (operand
) != PLUS
3421 /* A SCRATCH is not a valid operand. */
3422 && GET_CODE (operand
) != SCRATCH
3423 && (! CONSTANT_P (operand
)
3425 || LEGITIMATE_PIC_OPERAND_P (operand
))
3426 && (GENERAL_REGS
== ALL_REGS
3428 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3429 && reg_renumber
[REGNO (operand
)] < 0)))
3435 cn
= lookup_constraint (p
);
3436 switch (get_constraint_type (cn
))
3439 cl
= reg_class_for_constraint (cn
);
3445 if (CONST_INT_P (operand
)
3446 && (insn_const_int_ok_for_constraint
3447 (INTVAL (operand
), cn
)))
3452 case CT_RELAXED_MEMORY
:
3455 if (constraint_satisfied_p (operand
, cn
))
3457 /* If the address was already reloaded,
3459 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3461 /* Likewise if the address will be reloaded because
3462 reg_equiv_address is nonzero. For reg_equiv_mem
3463 we have to check. */
3464 else if (REG_P (operand
)
3465 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3466 && reg_renumber
[REGNO (operand
)] < 0
3467 && ((reg_equiv_mem (REGNO (operand
)) != 0
3468 && (constraint_satisfied_p
3469 (reg_equiv_mem (REGNO (operand
)),
3471 || (reg_equiv_address (REGNO (operand
))
3475 /* If we didn't already win, we can reload
3476 constants via force_const_mem, and other
3477 MEMs by reloading the address like for 'o'. */
3478 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3485 case CT_SPECIAL_MEMORY
:
3488 if (constraint_satisfied_p (operand
, cn
))
3490 /* Likewise if the address will be reloaded because
3491 reg_equiv_address is nonzero. For reg_equiv_mem
3492 we have to check. */
3493 else if (REG_P (operand
)
3494 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3495 && reg_renumber
[REGNO (operand
)] < 0
3496 && reg_equiv_mem (REGNO (operand
)) != 0
3497 && (constraint_satisfied_p
3498 (reg_equiv_mem (REGNO (operand
)), cn
)))
3503 if (constraint_satisfied_p (operand
, cn
))
3506 /* If we didn't already win, we can reload
3507 the address into a base register. */
3509 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3515 if (constraint_satisfied_p (operand
, cn
))
3523 = reg_class_subunion
[this_alternative
[i
]][cl
];
3524 if (GET_MODE (operand
) == BLKmode
)
3528 && reg_fits_class_p (operand
, this_alternative
[i
],
3529 offset
, GET_MODE (recog_data
.operand
[i
])))
3533 while ((p
+= len
), c
);
3535 if (swapped
== (commutative
>= 0 ? 1 : 0))
3538 /* If this operand could be handled with a reg,
3539 and some reg is allowed, then this operand can be handled. */
3540 if (winreg
&& this_alternative
[i
] != NO_REGS
3541 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3544 /* Record which operands fit this alternative. */
3545 this_alternative_earlyclobber
[i
] = earlyclobber
;
3546 if (win
&& ! force_reload
)
3547 this_alternative_win
[i
] = 1;
3548 else if (did_match
&& ! force_reload
)
3549 this_alternative_match_win
[i
] = 1;
3552 int const_to_mem
= 0;
3554 this_alternative_offmemok
[i
] = offmemok
;
3558 /* Alternative loses if it has no regs for a reg operand. */
3560 && this_alternative
[i
] == NO_REGS
3561 && this_alternative_matches
[i
] < 0)
3564 /* If this is a constant that is reloaded into the desired
3565 class by copying it to memory first, count that as another
3566 reload. This is consistent with other code and is
3567 required to avoid choosing another alternative when
3568 the constant is moved into memory by this function on
3569 an early reload pass. Note that the test here is
3570 precisely the same as in the code below that calls
3572 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3573 && ((targetm
.preferred_reload_class (operand
,
3574 this_alternative
[i
])
3576 || no_input_reloads
))
3579 if (this_alternative
[i
] != NO_REGS
)
3583 /* Alternative loses if it requires a type of reload not
3584 permitted for this insn. We can always reload SCRATCH
3585 and objects with a REG_UNUSED note. */
3586 if (GET_CODE (operand
) != SCRATCH
3587 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3588 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3590 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3594 /* If we can't reload this value at all, reject this
3595 alternative. Note that we could also lose due to
3596 LIMIT_RELOAD_CLASS, but we don't check that
3599 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3601 if (targetm
.preferred_reload_class (operand
,
3602 this_alternative
[i
])
3606 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3607 && (targetm
.preferred_output_reload_class (operand
,
3608 this_alternative
[i
])
3613 /* We prefer to reload pseudos over reloading other things,
3614 since such reloads may be able to be eliminated later.
3615 If we are reloading a SCRATCH, we won't be generating any
3616 insns, just using a register, so it is also preferred.
3617 So bump REJECT in other cases. Don't do this in the
3618 case where we are forcing a constant into memory and
3619 it will then win since we don't want to have a different
3620 alternative match then. */
3621 if (! (REG_P (operand
)
3622 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3623 && GET_CODE (operand
) != SCRATCH
3624 && ! (const_to_mem
&& constmemok
))
3627 /* Input reloads can be inherited more often than output
3628 reloads can be removed, so penalize output reloads. */
3629 if (operand_type
[i
] != RELOAD_FOR_INPUT
3630 && GET_CODE (operand
) != SCRATCH
)
3634 /* If this operand is a pseudo register that didn't get
3635 a hard reg and this alternative accepts some
3636 register, see if the class that we want is a subset
3637 of the preferred class for this register. If not,
3638 but it intersects that class, use the preferred class
3639 instead. If it does not intersect the preferred
3640 class, show that usage of this alternative should be
3641 discouraged; it will be discouraged more still if the
3642 register is `preferred or nothing'. We do this
3643 because it increases the chance of reusing our spill
3644 register in a later insn and avoiding a pair of
3645 memory stores and loads.
3647 Don't bother with this if this alternative will
3648 accept this operand.
3650 Don't do this for a multiword operand, since it is
3651 only a small win and has the risk of requiring more
3652 spill registers, which could cause a large loss.
3654 Don't do this if the preferred class has only one
3655 register because we might otherwise exhaust the
3658 if (! win
&& ! did_match
3659 && this_alternative
[i
] != NO_REGS
3660 && known_le (GET_MODE_SIZE (operand_mode
[i
]), UNITS_PER_WORD
)
3661 && reg_class_size
[(int) preferred_class
[i
]] > 0
3662 && ! small_register_class_p (preferred_class
[i
]))
3664 if (! reg_class_subset_p (this_alternative
[i
],
3665 preferred_class
[i
]))
3667 /* Since we don't have a way of forming the intersection,
3668 we just do something special if the preferred class
3669 is a subset of the class we have; that's the most
3670 common case anyway. */
3671 if (reg_class_subset_p (preferred_class
[i
],
3672 this_alternative
[i
]))
3673 this_alternative
[i
] = preferred_class
[i
];
3675 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3680 /* Now see if any output operands that are marked "earlyclobber"
3681 in this alternative conflict with any input operands
3682 or any memory addresses. */
3684 for (i
= 0; i
< noperands
; i
++)
3685 if (this_alternative_earlyclobber
[i
]
3686 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3688 struct decomposition early_data
;
3690 early_data
= decompose (recog_data
.operand
[i
]);
3692 gcc_assert (modified
[i
] != RELOAD_READ
);
3694 if (this_alternative
[i
] == NO_REGS
)
3696 this_alternative_earlyclobber
[i
] = 0;
3697 gcc_assert (this_insn_is_asm
);
3698 error_for_asm (this_insn
,
3699 "%<&%> constraint used with no register class");
3702 for (j
= 0; j
< noperands
; j
++)
3703 /* Is this an input operand or a memory ref? */
3704 if ((MEM_P (recog_data
.operand
[j
])
3705 || modified
[j
] != RELOAD_WRITE
)
3707 /* Ignore things like match_operator operands. */
3708 && !recog_data
.is_operator
[j
]
3709 /* Don't count an input operand that is constrained to match
3710 the early clobber operand. */
3711 && ! (this_alternative_matches
[j
] == i
3712 && rtx_equal_p (recog_data
.operand
[i
],
3713 recog_data
.operand
[j
]))
3714 /* Is it altered by storing the earlyclobber operand? */
3715 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3718 /* If the output is in a non-empty few-regs class,
3719 it's costly to reload it, so reload the input instead. */
3720 if (small_register_class_p (this_alternative
[i
])
3721 && (REG_P (recog_data
.operand
[j
])
3722 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3725 this_alternative_win
[j
] = 0;
3726 this_alternative_match_win
[j
] = 0;
3731 /* If an earlyclobber operand conflicts with something,
3732 it must be reloaded, so request this and count the cost. */
3736 this_alternative_win
[i
] = 0;
3737 this_alternative_match_win
[j
] = 0;
3738 for (j
= 0; j
< noperands
; j
++)
3739 if (this_alternative_matches
[j
] == i
3740 && this_alternative_match_win
[j
])
3742 this_alternative_win
[j
] = 0;
3743 this_alternative_match_win
[j
] = 0;
3749 /* If one alternative accepts all the operands, no reload required,
3750 choose that alternative; don't consider the remaining ones. */
3753 /* Unswap these so that they are never swapped at `finish'. */
3756 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3757 recog_data
.operand
[commutative
+ 1]
3758 = substed_operand
[commutative
+ 1];
3760 for (i
= 0; i
< noperands
; i
++)
3762 goal_alternative_win
[i
] = this_alternative_win
[i
];
3763 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3764 goal_alternative
[i
] = this_alternative
[i
];
3765 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3766 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3767 goal_alternative_earlyclobber
[i
]
3768 = this_alternative_earlyclobber
[i
];
3770 goal_alternative_number
= this_alternative_number
;
3771 goal_alternative_swapped
= swapped
;
3772 goal_earlyclobber
= this_earlyclobber
;
3776 /* REJECT, set by the ! and ? constraint characters and when a register
3777 would be reloaded into a non-preferred class, discourages the use of
3778 this alternative for a reload goal. REJECT is incremented by six
3779 for each ? and two for each non-preferred class. */
3780 losers
= losers
* 6 + reject
;
3782 /* If this alternative can be made to work by reloading,
3783 and it needs less reloading than the others checked so far,
3784 record it as the chosen goal for reloading. */
3789 for (i
= 0; i
< noperands
; i
++)
3791 goal_alternative
[i
] = this_alternative
[i
];
3792 goal_alternative_win
[i
] = this_alternative_win
[i
];
3793 goal_alternative_match_win
[i
]
3794 = this_alternative_match_win
[i
];
3795 goal_alternative_offmemok
[i
]
3796 = this_alternative_offmemok
[i
];
3797 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3798 goal_alternative_earlyclobber
[i
]
3799 = this_alternative_earlyclobber
[i
];
3801 goal_alternative_swapped
= swapped
;
3803 goal_alternative_number
= this_alternative_number
;
3804 goal_earlyclobber
= this_earlyclobber
;
3810 /* If the commutative operands have been swapped, swap
3811 them back in order to check the next alternative. */
3812 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3813 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3814 /* Unswap the duplicates too. */
3815 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3816 if (recog_data
.dup_num
[i
] == commutative
3817 || recog_data
.dup_num
[i
] == commutative
+ 1)
3818 *recog_data
.dup_loc
[i
]
3819 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3821 /* Unswap the operand related information as well. */
3822 std::swap (preferred_class
[commutative
],
3823 preferred_class
[commutative
+ 1]);
3824 std::swap (pref_or_nothing
[commutative
],
3825 pref_or_nothing
[commutative
+ 1]);
3826 std::swap (address_reloaded
[commutative
],
3827 address_reloaded
[commutative
+ 1]);
3832 /* The operands don't meet the constraints.
3833 goal_alternative describes the alternative
3834 that we could reach by reloading the fewest operands.
3835 Reload so as to fit it. */
3837 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3839 /* No alternative works with reloads?? */
3840 if (insn_code_number
>= 0)
3841 fatal_insn ("unable to generate reloads for:", insn
);
3842 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3843 /* Avoid further trouble with this insn. */
3844 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3849 /* Jump to `finish' from above if all operands are valid already.
3850 In that case, goal_alternative_win is all 1. */
3853 /* Right now, for any pair of operands I and J that are required to match,
3855 goal_alternative_matches[J] is I.
3856 Set up goal_alternative_matched as the inverse function:
3857 goal_alternative_matched[I] = J. */
3859 for (i
= 0; i
< noperands
; i
++)
3860 goal_alternative_matched
[i
] = -1;
3862 for (i
= 0; i
< noperands
; i
++)
3863 if (! goal_alternative_win
[i
]
3864 && goal_alternative_matches
[i
] >= 0)
3865 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3867 for (i
= 0; i
< noperands
; i
++)
3868 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3870 /* If the best alternative is with operands 1 and 2 swapped,
3871 consider them swapped before reporting the reloads. Update the
3872 operand numbers of any reloads already pushed. */
3874 if (goal_alternative_swapped
)
3876 std::swap (substed_operand
[commutative
],
3877 substed_operand
[commutative
+ 1]);
3878 std::swap (recog_data
.operand
[commutative
],
3879 recog_data
.operand
[commutative
+ 1]);
3880 std::swap (*recog_data
.operand_loc
[commutative
],
3881 *recog_data
.operand_loc
[commutative
+ 1]);
3883 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3884 if (recog_data
.dup_num
[i
] == commutative
3885 || recog_data
.dup_num
[i
] == commutative
+ 1)
3886 *recog_data
.dup_loc
[i
]
3887 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3889 for (i
= 0; i
< n_reloads
; i
++)
3891 if (rld
[i
].opnum
== commutative
)
3892 rld
[i
].opnum
= commutative
+ 1;
3893 else if (rld
[i
].opnum
== commutative
+ 1)
3894 rld
[i
].opnum
= commutative
;
3898 for (i
= 0; i
< noperands
; i
++)
3900 operand_reloadnum
[i
] = -1;
3902 /* If this is an earlyclobber operand, we need to widen the scope.
3903 The reload must remain valid from the start of the insn being
3904 reloaded until after the operand is stored into its destination.
3905 We approximate this with RELOAD_OTHER even though we know that we
3906 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3908 One special case that is worth checking is when we have an
3909 output that is earlyclobber but isn't used past the insn (typically
3910 a SCRATCH). In this case, we only need have the reload live
3911 through the insn itself, but not for any of our input or output
3913 But we must not accidentally narrow the scope of an existing
3914 RELOAD_OTHER reload - leave these alone.
3916 In any case, anything needed to address this operand can remain
3917 however they were previously categorized. */
3919 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3921 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3922 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3925 /* Any constants that aren't allowed and can't be reloaded
3926 into registers are here changed into memory references. */
3927 for (i
= 0; i
< noperands
; i
++)
3928 if (! goal_alternative_win
[i
])
3930 rtx op
= recog_data
.operand
[i
];
3931 rtx subreg
= NULL_RTX
;
3932 rtx plus
= NULL_RTX
;
3933 machine_mode mode
= operand_mode
[i
];
3935 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3936 push_reload so we have to let them pass here. */
3937 if (GET_CODE (op
) == SUBREG
)
3940 op
= SUBREG_REG (op
);
3941 mode
= GET_MODE (op
);
3944 if (GET_CODE (op
) == PLUS
)
3950 if (CONST_POOL_OK_P (mode
, op
)
3951 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3953 || no_input_reloads
))
3955 int this_address_reloaded
;
3956 rtx tem
= force_const_mem (mode
, op
);
3958 /* If we stripped a SUBREG or a PLUS above add it back. */
3959 if (plus
!= NULL_RTX
)
3960 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3962 if (subreg
!= NULL_RTX
)
3963 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3965 this_address_reloaded
= 0;
3966 substed_operand
[i
] = recog_data
.operand
[i
]
3967 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3968 0, insn
, &this_address_reloaded
);
3970 /* If the alternative accepts constant pool refs directly
3971 there will be no reload needed at all. */
3972 if (plus
== NULL_RTX
3973 && subreg
== NULL_RTX
3974 && alternative_allows_const_pool_ref (this_address_reloaded
!= 1
3975 ? substed_operand
[i
]
3977 recog_data
.constraints
[i
],
3978 goal_alternative_number
))
3979 goal_alternative_win
[i
] = 1;
3983 /* Record the values of the earlyclobber operands for the caller. */
3984 if (goal_earlyclobber
)
3985 for (i
= 0; i
< noperands
; i
++)
3986 if (goal_alternative_earlyclobber
[i
])
3987 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3989 /* Now record reloads for all the operands that need them. */
3990 for (i
= 0; i
< noperands
; i
++)
3991 if (! goal_alternative_win
[i
])
3993 /* Operands that match previous ones have already been handled. */
3994 if (goal_alternative_matches
[i
] >= 0)
3996 /* Handle an operand with a nonoffsettable address
3997 appearing where an offsettable address will do
3998 by reloading the address into a base register.
4000 ??? We can also do this when the operand is a register and
4001 reg_equiv_mem is not offsettable, but this is a bit tricky,
4002 so we don't bother with it. It may not be worth doing. */
4003 else if (goal_alternative_matched
[i
] == -1
4004 && goal_alternative_offmemok
[i
]
4005 && MEM_P (recog_data
.operand
[i
]))
4007 /* If the address to be reloaded is a VOIDmode constant,
4008 use the default address mode as mode of the reload register,
4009 as would have been done by find_reloads_address. */
4010 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
4011 machine_mode address_mode
;
4013 address_mode
= get_address_mode (recog_data
.operand
[i
]);
4014 operand_reloadnum
[i
]
4015 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
4016 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
4017 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4019 VOIDmode
, 0, 0, i
, RELOAD_OTHER
);
4020 rld
[operand_reloadnum
[i
]].inc
4021 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4023 /* If this operand is an output, we will have made any
4024 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4025 now we are treating part of the operand as an input, so
4026 we must change these to RELOAD_FOR_OTHER_ADDRESS. */
4028 if (modified
[i
] == RELOAD_WRITE
)
4030 for (j
= 0; j
< n_reloads
; j
++)
4032 if (rld
[j
].opnum
== i
)
4034 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4035 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4036 else if (rld
[j
].when_needed
4037 == RELOAD_FOR_OUTADDR_ADDRESS
)
4038 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4043 else if (goal_alternative_matched
[i
] == -1)
4045 operand_reloadnum
[i
]
4046 = push_reload ((modified
[i
] != RELOAD_WRITE
4047 ? recog_data
.operand
[i
] : 0),
4048 (modified
[i
] != RELOAD_READ
4049 ? recog_data
.operand
[i
] : 0),
4050 (modified
[i
] != RELOAD_WRITE
4051 ? recog_data
.operand_loc
[i
] : 0),
4052 (modified
[i
] != RELOAD_READ
4053 ? recog_data
.operand_loc
[i
] : 0),
4054 (enum reg_class
) goal_alternative
[i
],
4055 (modified
[i
] == RELOAD_WRITE
4056 ? VOIDmode
: operand_mode
[i
]),
4057 (modified
[i
] == RELOAD_READ
4058 ? VOIDmode
: operand_mode
[i
]),
4059 (insn_code_number
< 0 ? 0
4060 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4061 0, i
, operand_type
[i
]);
4063 /* In a matching pair of operands, one must be input only
4064 and the other must be output only.
4065 Pass the input operand as IN and the other as OUT. */
4066 else if (modified
[i
] == RELOAD_READ
4067 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4069 operand_reloadnum
[i
]
4070 = push_reload (recog_data
.operand
[i
],
4071 recog_data
.operand
[goal_alternative_matched
[i
]],
4072 recog_data
.operand_loc
[i
],
4073 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4074 (enum reg_class
) goal_alternative
[i
],
4076 operand_mode
[goal_alternative_matched
[i
]],
4077 0, 0, i
, RELOAD_OTHER
);
4078 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4080 else if (modified
[i
] == RELOAD_WRITE
4081 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4083 operand_reloadnum
[goal_alternative_matched
[i
]]
4084 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4085 recog_data
.operand
[i
],
4086 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4087 recog_data
.operand_loc
[i
],
4088 (enum reg_class
) goal_alternative
[i
],
4089 operand_mode
[goal_alternative_matched
[i
]],
4091 0, 0, i
, RELOAD_OTHER
);
4092 operand_reloadnum
[i
] = output_reloadnum
;
4096 gcc_assert (insn_code_number
< 0);
4097 error_for_asm (insn
, "inconsistent operand constraints "
4099 /* Avoid further trouble with this insn. */
4100 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4105 else if (goal_alternative_matched
[i
] < 0
4106 && goal_alternative_matches
[i
] < 0
4107 && address_operand_reloaded
[i
] != 1
4110 /* For each non-matching operand that's a MEM or a pseudo-register
4111 that didn't get a hard register, make an optional reload.
4112 This may get done even if the insn needs no reloads otherwise. */
4114 rtx operand
= recog_data
.operand
[i
];
4116 while (GET_CODE (operand
) == SUBREG
)
4117 operand
= SUBREG_REG (operand
);
4118 if ((MEM_P (operand
)
4120 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4121 /* If this is only for an output, the optional reload would not
4122 actually cause us to use a register now, just note that
4123 something is stored here. */
4124 && (goal_alternative
[i
] != NO_REGS
4125 || modified
[i
] == RELOAD_WRITE
)
4126 && ! no_input_reloads
4127 /* An optional output reload might allow to delete INSN later.
4128 We mustn't make in-out reloads on insns that are not permitted
4130 If this is an asm, we can't delete it; we must not even call
4131 push_reload for an optional output reload in this case,
4132 because we can't be sure that the constraint allows a register,
4133 and push_reload verifies the constraints for asms. */
4134 && (modified
[i
] == RELOAD_READ
4135 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4136 operand_reloadnum
[i
]
4137 = push_reload ((modified
[i
] != RELOAD_WRITE
4138 ? recog_data
.operand
[i
] : 0),
4139 (modified
[i
] != RELOAD_READ
4140 ? recog_data
.operand
[i
] : 0),
4141 (modified
[i
] != RELOAD_WRITE
4142 ? recog_data
.operand_loc
[i
] : 0),
4143 (modified
[i
] != RELOAD_READ
4144 ? recog_data
.operand_loc
[i
] : 0),
4145 (enum reg_class
) goal_alternative
[i
],
4146 (modified
[i
] == RELOAD_WRITE
4147 ? VOIDmode
: operand_mode
[i
]),
4148 (modified
[i
] == RELOAD_READ
4149 ? VOIDmode
: operand_mode
[i
]),
4150 (insn_code_number
< 0 ? 0
4151 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4152 1, i
, operand_type
[i
]);
4153 /* If a memory reference remains (either as a MEM or a pseudo that
4154 did not get a hard register), yet we can't make an optional
4155 reload, check if this is actually a pseudo register reference;
4156 we then need to emit a USE and/or a CLOBBER so that reload
4157 inheritance will do the right thing. */
4161 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4162 && reg_renumber
[REGNO (operand
)] < 0)))
4164 operand
= *recog_data
.operand_loc
[i
];
4166 while (GET_CODE (operand
) == SUBREG
)
4167 operand
= SUBREG_REG (operand
);
4168 if (REG_P (operand
))
4170 if (modified
[i
] != RELOAD_WRITE
)
4171 /* We mark the USE with QImode so that we recognize
4172 it as one that can be safely deleted at the end
4174 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4176 if (modified
[i
] != RELOAD_READ
)
4177 emit_insn_after (gen_clobber (operand
), insn
);
4181 else if (goal_alternative_matches
[i
] >= 0
4182 && goal_alternative_win
[goal_alternative_matches
[i
]]
4183 && modified
[i
] == RELOAD_READ
4184 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4185 && ! no_input_reloads
&& ! no_output_reloads
4188 /* Similarly, make an optional reload for a pair of matching
4189 objects that are in MEM or a pseudo that didn't get a hard reg. */
4191 rtx operand
= recog_data
.operand
[i
];
4193 while (GET_CODE (operand
) == SUBREG
)
4194 operand
= SUBREG_REG (operand
);
4195 if ((MEM_P (operand
)
4197 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4198 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4199 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4200 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4201 recog_data
.operand
[i
],
4202 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4203 recog_data
.operand_loc
[i
],
4204 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4205 operand_mode
[goal_alternative_matches
[i
]],
4207 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4210 /* Perform whatever substitutions on the operands we are supposed
4211 to make due to commutativity or replacement of registers
4212 with equivalent constants or memory slots. */
4214 for (i
= 0; i
< noperands
; i
++)
4216 /* We only do this on the last pass through reload, because it is
4217 possible for some data (like reg_equiv_address) to be changed during
4218 later passes. Moreover, we lose the opportunity to get a useful
4219 reload_{in,out}_reg when we do these replacements. */
4223 rtx substitution
= substed_operand
[i
];
4225 *recog_data
.operand_loc
[i
] = substitution
;
4227 /* If we're replacing an operand with a LABEL_REF, we need to
4228 make sure that there's a REG_LABEL_OPERAND note attached to
4229 this instruction. */
4230 if (GET_CODE (substitution
) == LABEL_REF
4231 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4232 label_ref_label (substitution
))
4233 /* For a JUMP_P, if it was a branch target it must have
4234 already been recorded as such. */
4236 || !label_is_jump_target_p (label_ref_label (substitution
),
4239 add_reg_note (insn
, REG_LABEL_OPERAND
,
4240 label_ref_label (substitution
));
4241 if (LABEL_P (label_ref_label (substitution
)))
4242 ++LABEL_NUSES (label_ref_label (substitution
));
4247 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4250 /* If this insn pattern contains any MATCH_DUP's, make sure that
4251 they will be substituted if the operands they match are substituted.
4252 Also do now any substitutions we already did on the operands.
4254 Don't do this if we aren't making replacements because we might be
4255 propagating things allocated by frame pointer elimination into places
4256 it doesn't expect. */
4258 if (insn_code_number
>= 0 && replace
)
4259 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4261 int opno
= recog_data
.dup_num
[i
];
4262 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4263 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4267 /* This loses because reloading of prior insns can invalidate the equivalence
4268 (or at least find_equiv_reg isn't smart enough to find it any more),
4269 causing this insn to need more reload regs than it needed before.
4270 It may be too late to make the reload regs available.
4271 Now this optimization is done safely in choose_reload_regs. */
4273 /* For each reload of a reg into some other class of reg,
4274 search for an existing equivalent reg (same value now) in the right class.
4275 We can use it as long as we don't need to change its contents. */
4276 for (i
= 0; i
< n_reloads
; i
++)
4277 if (rld
[i
].reg_rtx
== 0
4279 && REG_P (rld
[i
].in
)
4283 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4284 static_reload_reg_p
, 0, rld
[i
].inmode
);
4285 /* Prevent generation of insn to load the value
4286 because the one we found already has the value. */
4288 rld
[i
].in
= rld
[i
].reg_rtx
;
4292 /* If we detected error and replaced asm instruction by USE, forget about the
4294 if (GET_CODE (PATTERN (insn
)) == USE
4295 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4298 /* Perhaps an output reload can be combined with another
4299 to reduce needs by one. */
4300 if (!goal_earlyclobber
)
4303 /* If we have a pair of reloads for parts of an address, they are reloading
4304 the same object, the operands themselves were not reloaded, and they
4305 are for two operands that are supposed to match, merge the reloads and
4306 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4308 for (i
= 0; i
< n_reloads
; i
++)
4312 for (j
= i
+ 1; j
< n_reloads
; j
++)
4313 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4314 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4315 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4316 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4317 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4318 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4319 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4320 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4321 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4322 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4323 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4324 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4325 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4326 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4327 || (goal_alternative_matches
[rld
[j
].opnum
]
4330 for (k
= 0; k
< n_replacements
; k
++)
4331 if (replacements
[k
].what
== j
)
4332 replacements
[k
].what
= i
;
4334 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4335 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4336 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4338 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4343 /* Scan all the reloads and update their type.
4344 If a reload is for the address of an operand and we didn't reload
4345 that operand, change the type. Similarly, change the operand number
4346 of a reload when two operands match. If a reload is optional, treat it
4347 as though the operand isn't reloaded.
4349 ??? This latter case is somewhat odd because if we do the optional
4350 reload, it means the object is hanging around. Thus we need only
4351 do the address reload if the optional reload was NOT done.
4353 Change secondary reloads to be the address type of their operand, not
4356 If an operand's reload is now RELOAD_OTHER, change any
4357 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4358 RELOAD_FOR_OTHER_ADDRESS. */
4360 for (i
= 0; i
< n_reloads
; i
++)
4362 if (rld
[i
].secondary_p
4363 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4364 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4366 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4367 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4368 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4369 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4370 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4371 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4373 /* If we have a secondary reload to go along with this reload,
4374 change its type to RELOAD_FOR_OPADDR_ADDR. */
4376 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4377 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4378 && rld
[i
].secondary_in_reload
!= -1)
4380 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4382 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4384 /* If there's a tertiary reload we have to change it also. */
4385 if (secondary_in_reload
> 0
4386 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4387 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4388 = RELOAD_FOR_OPADDR_ADDR
;
4391 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4392 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4393 && rld
[i
].secondary_out_reload
!= -1)
4395 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4397 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4399 /* If there's a tertiary reload we have to change it also. */
4400 if (secondary_out_reload
4401 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4402 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4403 = RELOAD_FOR_OPADDR_ADDR
;
4406 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4407 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4408 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4410 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4413 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4414 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4415 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4416 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4418 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4420 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4421 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4424 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4425 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4426 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4428 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4429 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4430 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4431 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4432 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4433 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4434 This is complicated by the fact that a single operand can have more
4435 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4436 choose_reload_regs without affecting code quality, and cases that
4437 actually fail are extremely rare, so it turns out to be better to fix
4438 the problem here by not generating cases that choose_reload_regs will
4440 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4441 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4443 We can reduce the register pressure by exploiting that a
4444 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4445 does not conflict with any of them, if it is only used for the first of
4446 the RELOAD_FOR_X_ADDRESS reloads. */
4448 int first_op_addr_num
= -2;
4449 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4450 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4451 int need_change
= 0;
4452 /* We use last_op_addr_reload and the contents of the above arrays
4453 first as flags - -2 means no instance encountered, -1 means exactly
4454 one instance encountered.
4455 If more than one instance has been encountered, we store the reload
4456 number of the first reload of the kind in question; reload numbers
4457 are known to be non-negative. */
4458 for (i
= 0; i
< noperands
; i
++)
4459 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4460 for (i
= n_reloads
- 1; i
>= 0; i
--)
4462 switch (rld
[i
].when_needed
)
4464 case RELOAD_FOR_OPERAND_ADDRESS
:
4465 if (++first_op_addr_num
>= 0)
4467 first_op_addr_num
= i
;
4471 case RELOAD_FOR_INPUT_ADDRESS
:
4472 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4474 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4478 case RELOAD_FOR_OUTPUT_ADDRESS
:
4479 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4481 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4492 for (i
= 0; i
< n_reloads
; i
++)
4495 enum reload_type type
;
4497 switch (rld
[i
].when_needed
)
4499 case RELOAD_FOR_OPADDR_ADDR
:
4500 first_num
= first_op_addr_num
;
4501 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4503 case RELOAD_FOR_INPADDR_ADDRESS
:
4504 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4505 type
= RELOAD_FOR_INPUT_ADDRESS
;
4507 case RELOAD_FOR_OUTADDR_ADDRESS
:
4508 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4509 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4516 else if (i
> first_num
)
4517 rld
[i
].when_needed
= type
;
4520 /* Check if the only TYPE reload that uses reload I is
4521 reload FIRST_NUM. */
4522 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4524 if (rld
[j
].when_needed
== type
4525 && (rld
[i
].secondary_p
4526 ? rld
[j
].secondary_in_reload
== i
4527 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4529 rld
[i
].when_needed
= type
;
4538 /* See if we have any reloads that are now allowed to be merged
4539 because we've changed when the reload is needed to
4540 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4541 check for the most common cases. */
4543 for (i
= 0; i
< n_reloads
; i
++)
4544 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4545 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4546 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4547 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4548 for (j
= 0; j
< n_reloads
; j
++)
4549 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4550 && rld
[j
].when_needed
== rld
[i
].when_needed
4551 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4552 && rld
[i
].rclass
== rld
[j
].rclass
4553 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4554 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4556 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4557 transfer_replacements (i
, j
);
4561 /* Compute reload_mode and reload_nregs. */
4562 for (i
= 0; i
< n_reloads
; i
++)
4564 rld
[i
].mode
= rld
[i
].inmode
;
4565 if (rld
[i
].mode
== VOIDmode
4566 || partial_subreg_p (rld
[i
].mode
, rld
[i
].outmode
))
4567 rld
[i
].mode
= rld
[i
].outmode
;
4569 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4572 /* Special case a simple move with an input reload and a
4573 destination of a hard reg, if the hard reg is ok, use it. */
4574 for (i
= 0; i
< n_reloads
; i
++)
4575 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4576 && GET_CODE (PATTERN (insn
)) == SET
4577 && REG_P (SET_DEST (PATTERN (insn
)))
4578 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4579 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4580 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4582 rtx dest
= SET_DEST (PATTERN (insn
));
4583 unsigned int regno
= REGNO (dest
);
4585 if (regno
< FIRST_PSEUDO_REGISTER
4586 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4587 && targetm
.hard_regno_mode_ok (regno
, rld
[i
].mode
))
4589 int nr
= hard_regno_nregs (regno
, rld
[i
].mode
);
4592 for (nri
= 1; nri
< nr
; nri
++)
4593 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4600 rld
[i
].reg_rtx
= dest
;
4607 /* Return true if alternative number ALTNUM in constraint-string
4608 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4609 MEM gives the reference if its address hasn't been fully reloaded,
4610 otherwise it is NULL. */
4613 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4614 const char *constraint
, int altnum
)
4618 /* Skip alternatives before the one requested. */
4621 while (*constraint
++ != ',')
4625 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4626 If one of them is present, this alternative accepts the result of
4627 passing a constant-pool reference through find_reloads_toplev.
4629 The same is true of extra memory constraints if the address
4630 was reloaded into a register. However, the target may elect
4631 to disallow the original constant address, forcing it to be
4632 reloaded into a register instead. */
4633 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4634 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4636 enum constraint_num cn
= lookup_constraint (constraint
);
4637 if (insn_extra_memory_constraint (cn
)
4638 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4644 /* Scan X for memory references and scan the addresses for reloading.
4645 Also checks for references to "constant" regs that we want to eliminate
4646 and replaces them with the values they stand for.
4647 We may alter X destructively if it contains a reference to such.
4648 If X is just a constant reg, we return the equivalent value
4651 IND_LEVELS says how many levels of indirect addressing this machine
4654 OPNUM and TYPE identify the purpose of the reload.
4656 IS_SET_DEST is true if X is the destination of a SET, which is not
4657 appropriate to be replaced by a constant.
4659 INSN, if nonzero, is the insn in which we do the reload. It is used
4660 to determine if we may generate output reloads, and where to put USEs
4661 for pseudos that we have to replace with stack slots.
4663 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4664 result of find_reloads_address. */
4667 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4668 int ind_levels
, int is_set_dest
, rtx_insn
*insn
,
4669 int *address_reloaded
)
4671 RTX_CODE code
= GET_CODE (x
);
4673 const char *fmt
= GET_RTX_FORMAT (code
);
4679 /* This code is duplicated for speed in find_reloads. */
4680 int regno
= REGNO (x
);
4681 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4682 x
= reg_equiv_constant (regno
);
4684 /* This creates (subreg (mem...)) which would cause an unnecessary
4685 reload of the mem. */
4686 else if (reg_equiv_mem (regno
) != 0)
4687 x
= reg_equiv_mem (regno
);
4689 else if (reg_equiv_memory_loc (regno
)
4690 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4692 rtx mem
= make_memloc (x
, regno
);
4693 if (reg_equiv_address (regno
)
4694 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4696 /* If this is not a toplevel operand, find_reloads doesn't see
4697 this substitution. We have to emit a USE of the pseudo so
4698 that delete_output_reload can see it. */
4699 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4700 /* We mark the USE with QImode so that we recognize it
4701 as one that can be safely deleted at the end of
4703 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4706 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4707 opnum
, type
, ind_levels
, insn
);
4708 if (!rtx_equal_p (x
, mem
))
4709 push_reg_equiv_alt_mem (regno
, x
);
4710 if (address_reloaded
)
4711 *address_reloaded
= i
;
4720 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4721 opnum
, type
, ind_levels
, insn
);
4722 if (address_reloaded
)
4723 *address_reloaded
= i
;
4728 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4730 /* Check for SUBREG containing a REG that's equivalent to a
4731 constant. If the constant has a known value, truncate it
4732 right now. Similarly if we are extracting a single-word of a
4733 multi-word constant. If the constant is symbolic, allow it
4734 to be substituted normally. push_reload will strip the
4735 subreg later. The constant must not be VOIDmode, because we
4736 will lose the mode of the register (this should never happen
4737 because one of the cases above should handle it). */
4739 int regno
= REGNO (SUBREG_REG (x
));
4742 if (regno
>= FIRST_PSEUDO_REGISTER
4743 && reg_renumber
[regno
] < 0
4744 && reg_equiv_constant (regno
) != 0)
4747 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4748 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4750 if (CONSTANT_P (tem
)
4751 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4753 tem
= force_const_mem (GET_MODE (x
), tem
);
4754 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4755 &XEXP (tem
, 0), opnum
, type
,
4757 if (address_reloaded
)
4758 *address_reloaded
= i
;
4763 /* If the subreg contains a reg that will be converted to a mem,
4764 attempt to convert the whole subreg to a (narrower or wider)
4765 memory reference instead. If this succeeds, we're done --
4766 otherwise fall through to check whether the inner reg still
4767 needs address reloads anyway. */
4769 if (regno
>= FIRST_PSEUDO_REGISTER
4770 && reg_equiv_memory_loc (regno
) != 0)
4772 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4773 insn
, address_reloaded
);
4779 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4783 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4784 ind_levels
, is_set_dest
, insn
,
4786 /* If we have replaced a reg with it's equivalent memory loc -
4787 that can still be handled here e.g. if it's in a paradoxical
4788 subreg - we must make the change in a copy, rather than using
4789 a destructive change. This way, find_reloads can still elect
4790 not to do the change. */
4791 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4793 x
= shallow_copy_rtx (x
);
4796 XEXP (x
, i
) = new_part
;
4802 /* Return a mem ref for the memory equivalent of reg REGNO.
4803 This mem ref is not shared with anything. */
4806 make_memloc (rtx ad
, int regno
)
4808 /* We must rerun eliminate_regs, in case the elimination
4809 offsets have changed. */
4811 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4814 /* If TEM might contain a pseudo, we must copy it to avoid
4815 modifying it when we do the substitution for the reload. */
4816 if (rtx_varies_p (tem
, 0))
4817 tem
= copy_rtx (tem
);
4819 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4820 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4822 /* Copy the result if it's still the same as the equivalence, to avoid
4823 modifying it when we do the substitution for the reload. */
4824 if (tem
== reg_equiv_memory_loc (regno
))
4825 tem
= copy_rtx (tem
);
4829 /* Returns true if AD could be turned into a valid memory reference
4830 to mode MODE in address space AS by reloading the part pointed to
4831 by PART into a register. */
4834 maybe_memory_address_addr_space_p (machine_mode mode
, rtx ad
,
4835 addr_space_t as
, rtx
*part
)
4839 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4842 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4848 /* Record all reloads needed for handling memory address AD
4849 which appears in *LOC in a memory reference to mode MODE
4850 which itself is found in location *MEMREFLOC.
4851 Note that we take shortcuts assuming that no multi-reg machine mode
4852 occurs as part of an address.
4854 OPNUM and TYPE specify the purpose of this reload.
4856 IND_LEVELS says how many levels of indirect addressing this machine
4859 INSN, if nonzero, is the insn in which we do the reload. It is used
4860 to determine if we may generate output reloads, and where to put USEs
4861 for pseudos that we have to replace with stack slots.
4863 Value is one if this address is reloaded or replaced as a whole; it is
4864 zero if the top level of this address was not reloaded or replaced, and
4865 it is -1 if it may or may not have been reloaded or replaced.
4867 Note that there is no verification that the address will be valid after
4868 this routine does its work. Instead, we rely on the fact that the address
4869 was valid when reload started. So we need only undo things that reload
4870 could have broken. These are wrong register types, pseudos not allocated
4871 to a hard register, and frame pointer elimination. */
4874 find_reloads_address (machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4875 rtx
*loc
, int opnum
, enum reload_type type
,
4876 int ind_levels
, rtx_insn
*insn
)
4878 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4879 : ADDR_SPACE_GENERIC
;
4881 int removed_and
= 0;
4885 /* If the address is a register, see if it is a legitimate address and
4886 reload if not. We first handle the cases where we need not reload
4887 or where we must reload in a non-standard way. */
4893 if (reg_equiv_constant (regno
) != 0)
4895 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4896 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4897 GET_MODE (ad
), opnum
, type
, ind_levels
);
4901 tem
= reg_equiv_memory_loc (regno
);
4904 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4906 tem
= make_memloc (ad
, regno
);
4907 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4909 MEM_ADDR_SPACE (tem
)))
4913 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4914 &XEXP (tem
, 0), opnum
,
4915 ADDR_TYPE (type
), ind_levels
, insn
);
4916 if (!rtx_equal_p (tem
, orig
))
4917 push_reg_equiv_alt_mem (regno
, tem
);
4919 /* We can avoid a reload if the register's equivalent memory
4920 expression is valid as an indirect memory address.
4921 But not all addresses are valid in a mem used as an indirect
4922 address: only reg or reg+constant. */
4925 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4926 && (REG_P (XEXP (tem
, 0))
4927 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4928 && REG_P (XEXP (XEXP (tem
, 0), 0))
4929 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4931 /* TEM is not the same as what we'll be replacing the
4932 pseudo with after reload, put a USE in front of INSN
4933 in the final reload pass. */
4935 && num_not_at_initial_offset
4936 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4939 /* We mark the USE with QImode so that we
4940 recognize it as one that can be safely
4941 deleted at the end of reload. */
4942 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4945 /* This doesn't really count as replacing the address
4946 as a whole, since it is still a memory access. */
4954 /* The only remaining case where we can avoid a reload is if this is a
4955 hard register that is valid as a base register and which is not the
4956 subject of a CLOBBER in this insn. */
4958 else if (regno
< FIRST_PSEUDO_REGISTER
4959 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
4960 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4963 /* If we do not have one of the cases above, we must do the reload. */
4964 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
4965 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4966 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4970 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4972 /* The address appears valid, so reloads are not needed.
4973 But the address may contain an eliminable register.
4974 This can happen because a machine with indirect addressing
4975 may consider a pseudo register by itself a valid address even when
4976 it has failed to get a hard reg.
4977 So do a tree-walk to find and eliminate all such regs. */
4979 /* But first quickly dispose of a common case. */
4980 if (GET_CODE (ad
) == PLUS
4981 && CONST_INT_P (XEXP (ad
, 1))
4982 && REG_P (XEXP (ad
, 0))
4983 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
4986 subst_reg_equivs_changed
= 0;
4987 *loc
= subst_reg_equivs (ad
, insn
);
4989 if (! subst_reg_equivs_changed
)
4992 /* Check result for validity after substitution. */
4993 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4997 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5000 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
5002 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
5007 *memrefloc
= copy_rtx (*memrefloc
);
5008 XEXP (*memrefloc
, 0) = ad
;
5009 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5015 /* The address is not valid. We have to figure out why. First see if
5016 we have an outer AND and remove it if so. Then analyze what's inside. */
5018 if (GET_CODE (ad
) == AND
)
5021 loc
= &XEXP (ad
, 0);
5025 /* One possibility for why the address is invalid is that it is itself
5026 a MEM. This can happen when the frame pointer is being eliminated, a
5027 pseudo is not allocated to a hard register, and the offset between the
5028 frame and stack pointers is not its initial value. In that case the
5029 pseudo will have been replaced by a MEM referring to the
5033 /* First ensure that the address in this MEM is valid. Then, unless
5034 indirect addresses are valid, reload the MEM into a register. */
5036 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5037 opnum
, ADDR_TYPE (type
),
5038 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5040 /* If tem was changed, then we must create a new memory reference to
5041 hold it and store it back into memrefloc. */
5042 if (tem
!= ad
&& memrefloc
)
5044 *memrefloc
= copy_rtx (*memrefloc
);
5045 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5046 loc
= &XEXP (*memrefloc
, 0);
5048 loc
= &XEXP (*loc
, 0);
5051 /* Check similar cases as for indirect addresses as above except
5052 that we can allow pseudos and a MEM since they should have been
5053 taken care of above. */
5056 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5057 || MEM_P (XEXP (tem
, 0))
5058 || ! (REG_P (XEXP (tem
, 0))
5059 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5060 && REG_P (XEXP (XEXP (tem
, 0), 0))
5061 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5063 /* Must use TEM here, not AD, since it is the one that will
5064 have any subexpressions reloaded, if needed. */
5065 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5066 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5069 return ! removed_and
;
5075 /* If we have address of a stack slot but it's not valid because the
5076 displacement is too large, compute the sum in a register.
5077 Handle all base registers here, not just fp/ap/sp, because on some
5078 targets (namely SH) we can also get too large displacements from
5079 big-endian corrections. */
5080 else if (GET_CODE (ad
) == PLUS
5081 && REG_P (XEXP (ad
, 0))
5082 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5083 && CONST_INT_P (XEXP (ad
, 1))
5084 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5086 /* Similarly, if we were to reload the base register and the
5087 mem+offset address is still invalid, then we want to reload
5088 the whole address, not just the base register. */
5089 || ! maybe_memory_address_addr_space_p
5090 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5093 /* Unshare the MEM rtx so we can safely alter it. */
5096 *memrefloc
= copy_rtx (*memrefloc
);
5097 loc
= &XEXP (*memrefloc
, 0);
5099 loc
= &XEXP (*loc
, 0);
5102 if (double_reg_address_ok
[mode
]
5103 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5106 /* Unshare the sum as well. */
5107 *loc
= ad
= copy_rtx (ad
);
5109 /* Reload the displacement into an index reg.
5110 We assume the frame pointer or arg pointer is a base reg. */
5111 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5112 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5118 /* If the sum of two regs is not necessarily valid,
5119 reload the sum into a base reg.
5120 That will at least work. */
5121 find_reloads_address_part (ad
, loc
,
5122 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5123 GET_MODE (ad
), opnum
, type
, ind_levels
);
5125 return ! removed_and
;
5128 /* If we have an indexed stack slot, there are three possible reasons why
5129 it might be invalid: The index might need to be reloaded, the address
5130 might have been made by frame pointer elimination and hence have a
5131 constant out of range, or both reasons might apply.
5133 We can easily check for an index needing reload, but even if that is the
5134 case, we might also have an invalid constant. To avoid making the
5135 conservative assumption and requiring two reloads, we see if this address
5136 is valid when not interpreted strictly. If it is, the only problem is
5137 that the index needs a reload and find_reloads_address_1 will take care
5140 Handle all base registers here, not just fp/ap/sp, because on some
5141 targets (namely SPARC) we can also get invalid addresses from preventive
5142 subreg big-endian corrections made by find_reloads_toplev. We
5143 can also get expressions involving LO_SUM (rather than PLUS) from
5144 find_reloads_subreg_address.
5146 If we decide to do something, it must be that `double_reg_address_ok'
5147 is true. We generate a reload of the base register + constant and
5148 rework the sum so that the reload register will be added to the index.
5149 This is safe because we know the address isn't shared.
5151 We check for the base register as both the first and second operand of
5152 the innermost PLUS and/or LO_SUM. */
5154 for (op_index
= 0; op_index
< 2; ++op_index
)
5156 rtx operand
, addend
;
5157 enum rtx_code inner_code
;
5159 if (GET_CODE (ad
) != PLUS
)
5162 inner_code
= GET_CODE (XEXP (ad
, 0));
5163 if (!(GET_CODE (ad
) == PLUS
5164 && CONST_INT_P (XEXP (ad
, 1))
5165 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5168 operand
= XEXP (XEXP (ad
, 0), op_index
);
5169 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5172 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5174 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5176 || operand
== frame_pointer_rtx
5177 || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
5178 && operand
== hard_frame_pointer_rtx
)
5179 || (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
5180 && operand
== arg_pointer_rtx
)
5181 || operand
== stack_pointer_rtx
)
5182 && ! maybe_memory_address_addr_space_p
5183 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5188 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5189 INTVAL (XEXP (ad
, 1)));
5191 /* Form the adjusted address. */
5192 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5193 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5194 op_index
== 0 ? offset_reg
: addend
,
5195 op_index
== 0 ? addend
: offset_reg
);
5197 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5198 op_index
== 0 ? offset_reg
: addend
,
5199 op_index
== 0 ? addend
: offset_reg
);
5202 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5203 find_reloads_address_part (XEXP (ad
, op_index
),
5204 &XEXP (ad
, op_index
), cls
,
5205 GET_MODE (ad
), opnum
, type
, ind_levels
);
5206 find_reloads_address_1 (mode
, as
,
5207 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5208 GET_CODE (XEXP (ad
, op_index
)),
5209 &XEXP (ad
, 1 - op_index
), opnum
,
5216 /* See if address becomes valid when an eliminable register
5217 in a sum is replaced. */
5220 if (GET_CODE (ad
) == PLUS
)
5221 tem
= subst_indexed_address (ad
);
5222 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5224 /* Ok, we win that way. Replace any additional eliminable
5227 subst_reg_equivs_changed
= 0;
5228 tem
= subst_reg_equivs (tem
, insn
);
5230 /* Make sure that didn't make the address invalid again. */
5232 if (! subst_reg_equivs_changed
5233 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5240 /* If constants aren't valid addresses, reload the constant address
5242 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5244 machine_mode address_mode
= GET_MODE (ad
);
5245 if (address_mode
== VOIDmode
)
5246 address_mode
= targetm
.addr_space
.address_mode (as
);
5248 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5249 Unshare it so we can safely alter it. */
5250 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5251 && CONSTANT_POOL_ADDRESS_P (ad
))
5253 *memrefloc
= copy_rtx (*memrefloc
);
5254 loc
= &XEXP (*memrefloc
, 0);
5256 loc
= &XEXP (*loc
, 0);
5259 find_reloads_address_part (ad
, loc
,
5260 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5261 address_mode
, opnum
, type
, ind_levels
);
5262 return ! removed_and
;
5265 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5266 opnum
, type
, ind_levels
, insn
);
5269 /* Find all pseudo regs appearing in AD
5270 that are eliminable in favor of equivalent values
5271 and do not have hard regs; replace them by their equivalents.
5272 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5273 front of it for pseudos that we have to replace with stack slots. */
5276 subst_reg_equivs (rtx ad
, rtx_insn
*insn
)
5278 RTX_CODE code
= GET_CODE (ad
);
5294 int regno
= REGNO (ad
);
5296 if (reg_equiv_constant (regno
) != 0)
5298 subst_reg_equivs_changed
= 1;
5299 return reg_equiv_constant (regno
);
5301 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5303 rtx mem
= make_memloc (ad
, regno
);
5304 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5306 subst_reg_equivs_changed
= 1;
5307 /* We mark the USE with QImode so that we recognize it
5308 as one that can be safely deleted at the end of
5310 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5319 /* Quickly dispose of a common case. */
5320 if (XEXP (ad
, 0) == frame_pointer_rtx
5321 && CONST_INT_P (XEXP (ad
, 1)))
5329 fmt
= GET_RTX_FORMAT (code
);
5330 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5332 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5336 /* Compute the sum of X and Y, making canonicalizations assumed in an
5337 address, namely: sum constant integers, surround the sum of two
5338 constants with a CONST, put the constant as the second operand, and
5339 group the constant on the outermost sum.
5341 This routine assumes both inputs are already in canonical form. */
5344 form_sum (machine_mode mode
, rtx x
, rtx y
)
5348 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5349 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5351 if (CONST_INT_P (x
))
5352 return plus_constant (mode
, y
, INTVAL (x
));
5353 else if (CONST_INT_P (y
))
5354 return plus_constant (mode
, x
, INTVAL (y
));
5355 else if (CONSTANT_P (x
))
5356 tem
= x
, x
= y
, y
= tem
;
5358 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5359 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5361 /* Note that if the operands of Y are specified in the opposite
5362 order in the recursive calls below, infinite recursion will occur. */
5363 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5364 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5366 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5367 constant will have been placed second. */
5368 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5370 if (GET_CODE (x
) == CONST
)
5372 if (GET_CODE (y
) == CONST
)
5375 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5378 return gen_rtx_PLUS (mode
, x
, y
);
5381 /* If ADDR is a sum containing a pseudo register that should be
5382 replaced with a constant (from reg_equiv_constant),
5383 return the result of doing so, and also apply the associative
5384 law so that the result is more likely to be a valid address.
5385 (But it is not guaranteed to be one.)
5387 Note that at most one register is replaced, even if more are
5388 replaceable. Also, we try to put the result into a canonical form
5389 so it is more likely to be a valid address.
5391 In all other cases, return ADDR. */
5394 subst_indexed_address (rtx addr
)
5396 rtx op0
= 0, op1
= 0, op2
= 0;
5400 if (GET_CODE (addr
) == PLUS
)
5402 /* Try to find a register to replace. */
5403 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5405 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5406 && reg_renumber
[regno
] < 0
5407 && reg_equiv_constant (regno
) != 0)
5408 op0
= reg_equiv_constant (regno
);
5409 else if (REG_P (op1
)
5410 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5411 && reg_renumber
[regno
] < 0
5412 && reg_equiv_constant (regno
) != 0)
5413 op1
= reg_equiv_constant (regno
);
5414 else if (GET_CODE (op0
) == PLUS
5415 && (tem
= subst_indexed_address (op0
)) != op0
)
5417 else if (GET_CODE (op1
) == PLUS
5418 && (tem
= subst_indexed_address (op1
)) != op1
)
5423 /* Pick out up to three things to add. */
5424 if (GET_CODE (op1
) == PLUS
)
5425 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5426 else if (GET_CODE (op0
) == PLUS
)
5427 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5429 /* Compute the sum. */
5431 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5433 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5440 /* Update the REG_INC notes for an insn. It updates all REG_INC
5441 notes for the instruction which refer to REGNO the to refer
5442 to the reload number.
5444 INSN is the insn for which any REG_INC notes need updating.
5446 REGNO is the register number which has been reloaded.
5448 RELOADNUM is the reload number. */
5451 update_auto_inc_notes (rtx_insn
*insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5452 int reloadnum ATTRIBUTE_UNUSED
)
5457 for (rtx link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5458 if (REG_NOTE_KIND (link
) == REG_INC
5459 && (int) REGNO (XEXP (link
, 0)) == regno
)
5460 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5463 /* Record the pseudo registers we must reload into hard registers in a
5464 subexpression of a would-be memory address, X referring to a value
5465 in mode MODE. (This function is not called if the address we find
5468 CONTEXT = 1 means we are considering regs as index regs,
5469 = 0 means we are considering them as base regs.
5470 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5472 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5473 is the code of the index part of the address. Otherwise, pass SCRATCH
5475 OPNUM and TYPE specify the purpose of any reloads made.
5477 IND_LEVELS says how many levels of indirect addressing are
5478 supported at this point in the address.
5480 INSN, if nonzero, is the insn in which we do the reload. It is used
5481 to determine if we may generate output reloads.
5483 We return nonzero if X, as a whole, is reloaded or replaced. */
5485 /* Note that we take shortcuts assuming that no multi-reg machine mode
5486 occurs as part of an address.
5487 Also, this is not fully machine-customizable; it works for machines
5488 such as VAXen and 68000's and 32000's, but other possible machines
5489 could have addressing modes that this does not handle right.
5490 If you add push_reload calls here, you need to make sure gen_reload
5491 handles those cases gracefully. */
5494 find_reloads_address_1 (machine_mode mode
, addr_space_t as
,
5496 enum rtx_code outer_code
, enum rtx_code index_code
,
5497 rtx
*loc
, int opnum
, enum reload_type type
,
5498 int ind_levels
, rtx_insn
*insn
)
5500 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5502 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5503 : REGNO_OK_FOR_INDEX_P (REGNO))
5505 enum reg_class context_reg_class
;
5506 RTX_CODE code
= GET_CODE (x
);
5507 bool reloaded_inner_of_autoinc
= false;
5510 context_reg_class
= INDEX_REG_CLASS
;
5512 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5518 rtx orig_op0
= XEXP (x
, 0);
5519 rtx orig_op1
= XEXP (x
, 1);
5520 RTX_CODE code0
= GET_CODE (orig_op0
);
5521 RTX_CODE code1
= GET_CODE (orig_op1
);
5525 if (GET_CODE (op0
) == SUBREG
)
5527 op0
= SUBREG_REG (op0
);
5528 code0
= GET_CODE (op0
);
5529 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5530 op0
= gen_rtx_REG (word_mode
,
5532 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5533 GET_MODE (SUBREG_REG (orig_op0
)),
5534 SUBREG_BYTE (orig_op0
),
5535 GET_MODE (orig_op0
))));
5538 if (GET_CODE (op1
) == SUBREG
)
5540 op1
= SUBREG_REG (op1
);
5541 code1
= GET_CODE (op1
);
5542 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5543 /* ??? Why is this given op1's mode and above for
5544 ??? op0 SUBREGs we use word_mode? */
5545 op1
= gen_rtx_REG (GET_MODE (op1
),
5547 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5548 GET_MODE (SUBREG_REG (orig_op1
)),
5549 SUBREG_BYTE (orig_op1
),
5550 GET_MODE (orig_op1
))));
5552 /* Plus in the index register may be created only as a result of
5553 register rematerialization for expression like &localvar*4. Reload it.
5554 It may be possible to combine the displacement on the outer level,
5555 but it is probably not worthwhile to do so. */
5558 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5559 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5560 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5562 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5566 if (code0
== MULT
|| code0
== ASHIFT
5567 || code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5568 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5570 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5571 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5573 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5574 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5578 else if (code1
== MULT
|| code1
== ASHIFT
5579 || code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5580 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5582 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5583 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5585 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5586 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5590 else if (code0
== CONST_INT
|| code0
== CONST
5591 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5592 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5593 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5596 else if (code1
== CONST_INT
|| code1
== CONST
5597 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5598 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5599 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5602 else if (code0
== REG
&& code1
== REG
)
5604 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5605 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5607 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5608 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5610 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5611 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5612 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5614 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5615 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5616 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5618 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5619 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5620 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5622 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5623 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5624 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5628 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5629 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5631 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5632 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5637 else if (code0
== REG
)
5639 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5640 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5642 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5643 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5647 else if (code1
== REG
)
5649 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5650 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5652 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5653 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5663 rtx op0
= XEXP (x
, 0);
5664 rtx op1
= XEXP (x
, 1);
5665 enum rtx_code index_code
;
5669 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5672 /* Currently, we only support {PRE,POST}_MODIFY constructs
5673 where a base register is {inc,dec}remented by the contents
5674 of another register or by a constant value. Thus, these
5675 operands must match. */
5676 gcc_assert (op0
== XEXP (op1
, 0));
5678 /* Require index register (or constant). Let's just handle the
5679 register case in the meantime... If the target allows
5680 auto-modify by a constant then we could try replacing a pseudo
5681 register with its equivalent constant where applicable.
5683 We also handle the case where the register was eliminated
5684 resulting in a PLUS subexpression.
5686 If we later decide to reload the whole PRE_MODIFY or
5687 POST_MODIFY, inc_for_reload might clobber the reload register
5688 before reading the index. The index register might therefore
5689 need to live longer than a TYPE reload normally would, so be
5690 conservative and class it as RELOAD_OTHER. */
5691 if ((REG_P (XEXP (op1
, 1))
5692 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5693 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5694 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5695 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5698 gcc_assert (REG_P (XEXP (op1
, 0)));
5700 regno
= REGNO (XEXP (op1
, 0));
5701 index_code
= GET_CODE (XEXP (op1
, 1));
5703 /* A register that is incremented cannot be constant! */
5704 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5705 || reg_equiv_constant (regno
) == 0);
5707 /* Handle a register that is equivalent to a memory location
5708 which cannot be addressed directly. */
5709 if (reg_equiv_memory_loc (regno
) != 0
5710 && (reg_equiv_address (regno
) != 0
5711 || num_not_at_initial_offset
))
5713 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5715 if (reg_equiv_address (regno
)
5716 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5720 /* First reload the memory location's address.
5721 We can't use ADDR_TYPE (type) here, because we need to
5722 write back the value after reading it, hence we actually
5723 need two registers. */
5724 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5725 &XEXP (tem
, 0), opnum
,
5729 if (!rtx_equal_p (tem
, orig
))
5730 push_reg_equiv_alt_mem (regno
, tem
);
5732 /* Then reload the memory location into a base
5734 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5736 base_reg_class (mode
, as
,
5738 GET_MODE (x
), GET_MODE (x
), 0,
5739 0, opnum
, RELOAD_OTHER
);
5741 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5746 if (reg_renumber
[regno
] >= 0)
5747 regno
= reg_renumber
[regno
];
5749 /* We require a base register here... */
5750 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5752 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5753 &XEXP (op1
, 0), &XEXP (x
, 0),
5754 base_reg_class (mode
, as
,
5756 GET_MODE (x
), GET_MODE (x
), 0, 0,
5757 opnum
, RELOAD_OTHER
);
5759 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5769 if (REG_P (XEXP (x
, 0)))
5771 int regno
= REGNO (XEXP (x
, 0));
5775 /* A register that is incremented cannot be constant! */
5776 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5777 || reg_equiv_constant (regno
) == 0);
5779 /* Handle a register that is equivalent to a memory location
5780 which cannot be addressed directly. */
5781 if (reg_equiv_memory_loc (regno
) != 0
5782 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5784 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5785 if (reg_equiv_address (regno
)
5786 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5790 /* First reload the memory location's address.
5791 We can't use ADDR_TYPE (type) here, because we need to
5792 write back the value after reading it, hence we actually
5793 need two registers. */
5794 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5795 &XEXP (tem
, 0), opnum
, type
,
5797 reloaded_inner_of_autoinc
= true;
5798 if (!rtx_equal_p (tem
, orig
))
5799 push_reg_equiv_alt_mem (regno
, tem
);
5800 /* Put this inside a new increment-expression. */
5801 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5802 /* Proceed to reload that, as if it contained a register. */
5806 /* If we have a hard register that is ok in this incdec context,
5807 don't make a reload. If the register isn't nice enough for
5808 autoincdec, we can reload it. But, if an autoincrement of a
5809 register that we here verified as playing nice, still outside
5810 isn't "valid", it must be that no autoincrement is "valid".
5811 If that is true and something made an autoincrement anyway,
5812 this must be a special context where one is allowed.
5813 (For example, a "push" instruction.)
5814 We can't improve this address, so leave it alone. */
5816 /* Otherwise, reload the autoincrement into a suitable hard reg
5817 and record how much to increment by. */
5819 if (reg_renumber
[regno
] >= 0)
5820 regno
= reg_renumber
[regno
];
5821 if (regno
>= FIRST_PSEUDO_REGISTER
5822 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5827 /* If we can output the register afterwards, do so, this
5828 saves the extra update.
5829 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5831 But don't do this if we cannot directly address the
5832 memory location, since this will make it harder to
5833 reuse address reloads, and increases register pressure.
5834 Also don't do this if we can probably update x directly. */
5835 rtx equiv
= (MEM_P (XEXP (x
, 0))
5837 : reg_equiv_mem (regno
));
5838 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5839 if (insn
&& NONJUMP_INSN_P (insn
)
5840 && (regno
< FIRST_PSEUDO_REGISTER
5842 && memory_operand (equiv
, GET_MODE (equiv
))
5843 && ! (icode
!= CODE_FOR_nothing
5844 && insn_operand_matches (icode
, 0, equiv
)
5845 && insn_operand_matches (icode
, 1, equiv
))))
5846 /* Using RELOAD_OTHER means we emit this and the reload we
5847 made earlier in the wrong order. */
5848 && !reloaded_inner_of_autoinc
)
5850 /* We use the original pseudo for loc, so that
5851 emit_reload_insns() knows which pseudo this
5852 reload refers to and updates the pseudo rtx, not
5853 its equivalent memory location, as well as the
5854 corresponding entry in reg_last_reload_reg. */
5855 loc
= &XEXP (x_orig
, 0);
5858 = push_reload (x
, x
, loc
, loc
,
5860 GET_MODE (x
), GET_MODE (x
), 0, 0,
5861 opnum
, RELOAD_OTHER
);
5866 = push_reload (x
, x
, loc
, (rtx
*) 0,
5868 GET_MODE (x
), GET_MODE (x
), 0, 0,
5871 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5876 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5886 /* Look for parts to reload in the inner expression and reload them
5887 too, in addition to this operation. Reloading all inner parts in
5888 addition to this one shouldn't be necessary, but at this point,
5889 we don't know if we can possibly omit any part that *can* be
5890 reloaded. Targets that are better off reloading just either part
5891 (or perhaps even a different part of an outer expression), should
5892 define LEGITIMIZE_RELOAD_ADDRESS. */
5893 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5894 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5895 type
, ind_levels
, insn
);
5896 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5898 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5902 /* This is probably the result of a substitution, by eliminate_regs, of
5903 an equivalent address for a pseudo that was not allocated to a hard
5904 register. Verify that the specified address is valid and reload it
5907 Since we know we are going to reload this item, don't decrement for
5908 the indirection level.
5910 Note that this is actually conservative: it would be slightly more
5911 efficient to use the value of SPILL_INDIRECT_LEVELS from
5914 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5915 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5916 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5918 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5923 int regno
= REGNO (x
);
5925 if (reg_equiv_constant (regno
) != 0)
5927 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5929 GET_MODE (x
), opnum
, type
, ind_levels
);
5933 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5934 that feeds this insn. */
5935 if (reg_equiv_mem (regno
) != 0)
5937 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5939 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5944 if (reg_equiv_memory_loc (regno
)
5945 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5947 rtx tem
= make_memloc (x
, regno
);
5948 if (reg_equiv_address (regno
) != 0
5949 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5952 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5953 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5955 if (!rtx_equal_p (x
, tem
))
5956 push_reg_equiv_alt_mem (regno
, x
);
5960 if (reg_renumber
[regno
] >= 0)
5961 regno
= reg_renumber
[regno
];
5963 if (regno
>= FIRST_PSEUDO_REGISTER
5964 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5967 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5969 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5973 /* If a register appearing in an address is the subject of a CLOBBER
5974 in this insn, reload it into some other register to be safe.
5975 The CLOBBER is supposed to make the register unavailable
5976 from before this insn to after it. */
5977 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5979 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5981 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5988 if (REG_P (SUBREG_REG (x
)))
5990 /* If this is a SUBREG of a hard register and the resulting register
5991 is of the wrong class, reload the whole SUBREG. This avoids
5992 needless copies if SUBREG_REG is multi-word. */
5993 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5995 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5997 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
6000 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6002 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6006 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6007 is larger than the class size, then reload the whole SUBREG. */
6010 enum reg_class rclass
= context_reg_class
;
6011 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6012 > reg_class_size
[(int) rclass
])
6014 /* If the inner register will be replaced by a memory
6015 reference, we can do this only if we can replace the
6016 whole subreg by a (narrower) memory reference. If
6017 this is not possible, fall through and reload just
6018 the inner register (including address reloads). */
6019 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6021 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6027 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6028 GET_MODE (tem
), VOIDmode
, 0, 0,
6035 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6036 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6049 const char *fmt
= GET_RTX_FORMAT (code
);
6052 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6055 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6057 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6058 code
, SCRATCH
, &XEXP (x
, i
),
6059 opnum
, type
, ind_levels
, insn
);
6063 #undef REG_OK_FOR_CONTEXT
6067 /* X, which is found at *LOC, is a part of an address that needs to be
6068 reloaded into a register of class RCLASS. If X is a constant, or if
6069 X is a PLUS that contains a constant, check that the constant is a
6070 legitimate operand and that we are supposed to be able to load
6071 it into the register.
6073 If not, force the constant into memory and reload the MEM instead.
6075 MODE is the mode to use, in case X is an integer constant.
6077 OPNUM and TYPE describe the purpose of any reloads made.
6079 IND_LEVELS says how many levels of indirect addressing this machine
6083 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6084 machine_mode mode
, int opnum
,
6085 enum reload_type type
, int ind_levels
)
6088 && (!targetm
.legitimate_constant_p (mode
, x
)
6089 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6091 x
= force_const_mem (mode
, x
);
6092 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6093 opnum
, type
, ind_levels
, 0);
6096 else if (GET_CODE (x
) == PLUS
6097 && CONSTANT_P (XEXP (x
, 1))
6098 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6099 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6104 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6105 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6106 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6107 opnum
, type
, ind_levels
, 0);
6110 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6111 mode
, VOIDmode
, 0, 0, opnum
, type
);
6114 /* X, a subreg of a pseudo, is a part of an address that needs to be
6115 reloaded, and the pseusdo is equivalent to a memory location.
6117 Attempt to replace the whole subreg by a (possibly narrower or wider)
6118 memory reference. If this is possible, return this new memory
6119 reference, and push all required address reloads. Otherwise,
6122 OPNUM and TYPE identify the purpose of the reload.
6124 IND_LEVELS says how many levels of indirect addressing are
6125 supported at this point in the address.
6127 INSN, if nonzero, is the insn in which we do the reload. It is used
6128 to determine where to put USEs for pseudos that we have to replace with
6132 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6133 int ind_levels
, rtx_insn
*insn
,
6134 int *address_reloaded
)
6136 machine_mode outer_mode
= GET_MODE (x
);
6137 machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6138 int regno
= REGNO (SUBREG_REG (x
));
6143 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6145 /* We cannot replace the subreg with a modified memory reference if:
6147 - we have a paradoxical subreg that implicitly acts as a zero or
6148 sign extension operation due to LOAD_EXTEND_OP;
6150 - we have a subreg that is implicitly supposed to act on the full
6151 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6153 - the address of the equivalent memory location is mode-dependent; or
6155 - we have a paradoxical subreg and the resulting memory is not
6156 sufficiently aligned to allow access in the wider mode.
6158 In addition, we choose not to perform the replacement for *any*
6159 paradoxical subreg, even if it were possible in principle. This
6160 is to avoid generating wider memory references than necessary.
6162 This corresponds to how previous versions of reload used to handle
6163 paradoxical subregs where no address reload was required. */
6165 if (paradoxical_subreg_p (x
))
6168 if (WORD_REGISTER_OPERATIONS
6169 && partial_subreg_p (outer_mode
, inner_mode
)
6170 && known_equal_after_align_down (GET_MODE_SIZE (outer_mode
) - 1,
6171 GET_MODE_SIZE (inner_mode
) - 1,
6175 /* Since we don't attempt to handle paradoxical subregs, we can just
6176 call into simplify_subreg, which will handle all remaining checks
6178 orig
= make_memloc (SUBREG_REG (x
), regno
);
6179 offset
= SUBREG_BYTE (x
);
6180 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6181 if (!tem
|| !MEM_P (tem
))
6184 /* Now push all required address reloads, if any. */
6185 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6186 XEXP (tem
, 0), &XEXP (tem
, 0),
6187 opnum
, type
, ind_levels
, insn
);
6188 /* ??? Do we need to handle nonzero offsets somehow? */
6189 if (known_eq (offset
, 0) && !rtx_equal_p (tem
, orig
))
6190 push_reg_equiv_alt_mem (regno
, tem
);
6192 /* For some processors an address may be valid in the original mode but
6193 not in a smaller mode. For example, ARM accepts a scaled index register
6194 in SImode but not in HImode. Note that this is only a problem if the
6195 address in reg_equiv_mem is already invalid in the new mode; other
6196 cases would be fixed by find_reloads_address as usual.
6198 ??? We attempt to handle such cases here by doing an additional reload
6199 of the full address after the usual processing by find_reloads_address.
6200 Note that this may not work in the general case, but it seems to cover
6201 the cases where this situation currently occurs. A more general fix
6202 might be to reload the *value* instead of the address, but this would
6203 not be expected by the callers of this routine as-is.
6205 If find_reloads_address already completed replaced the address, there
6206 is nothing further to do. */
6208 && reg_equiv_mem (regno
) != 0
6209 && !strict_memory_address_addr_space_p
6210 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6211 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6213 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6214 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6216 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6220 /* If this is not a toplevel operand, find_reloads doesn't see this
6221 substitution. We have to emit a USE of the pseudo so that
6222 delete_output_reload can see it. */
6223 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6224 /* We mark the USE with QImode so that we recognize it as one that
6225 can be safely deleted at the end of reload. */
6226 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6229 if (address_reloaded
)
6230 *address_reloaded
= reloaded
;
6235 /* Substitute into the current INSN the registers into which we have reloaded
6236 the things that need reloading. The array `replacements'
6237 contains the locations of all pointers that must be changed
6238 and says what to replace them with.
6240 Return the rtx that X translates into; usually X, but modified. */
6243 subst_reloads (rtx_insn
*insn
)
6247 for (i
= 0; i
< n_replacements
; i
++)
6249 struct replacement
*r
= &replacements
[i
];
6250 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6254 /* This checking takes a very long time on some platforms
6255 causing the gcc.c-torture/compile/limits-fnargs.c test
6256 to time out during testing. See PR 31850.
6258 Internal consistency test. Check that we don't modify
6259 anything in the equivalence arrays. Whenever something from
6260 those arrays needs to be reloaded, it must be unshared before
6261 being substituted into; the equivalence must not be modified.
6262 Otherwise, if the equivalence is used after that, it will
6263 have been modified, and the thing substituted (probably a
6264 register) is likely overwritten and not a usable equivalence. */
6267 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6269 #define CHECK_MODF(ARRAY) \
6270 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6271 || !loc_mentioned_in_p (r->where, \
6272 (*reg_equivs)[check_regno].ARRAY))
6274 CHECK_MODF (constant
);
6275 CHECK_MODF (memory_loc
);
6276 CHECK_MODF (address
);
6280 #endif /* DEBUG_RELOAD */
6282 /* If we're replacing a LABEL_REF with a register, there must
6283 already be an indication (to e.g. flow) which label this
6284 register refers to. */
6285 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6287 || find_reg_note (insn
,
6289 XEXP (*r
->where
, 0))
6290 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6292 /* Encapsulate RELOADREG so its machine mode matches what
6293 used to be there. Note that gen_lowpart_common will
6294 do the wrong thing if RELOADREG is multi-word. RELOADREG
6295 will always be a REG here. */
6296 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6297 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6299 *r
->where
= reloadreg
;
6301 /* If reload got no reg and isn't optional, something's wrong. */
6303 gcc_assert (rld
[r
->what
].optional
);
6307 /* Make a copy of any replacements being done into X and move those
6308 copies to locations in Y, a copy of X. */
6311 copy_replacements (rtx x
, rtx y
)
6313 copy_replacements_1 (&x
, &y
, n_replacements
);
6317 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6321 struct replacement
*r
;
6325 for (j
= 0; j
< orig_replacements
; j
++)
6326 if (replacements
[j
].where
== px
)
6328 r
= &replacements
[n_replacements
++];
6330 r
->what
= replacements
[j
].what
;
6331 r
->mode
= replacements
[j
].mode
;
6336 code
= GET_CODE (x
);
6337 fmt
= GET_RTX_FORMAT (code
);
6339 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6342 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6343 else if (fmt
[i
] == 'E')
6344 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6345 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6350 /* Change any replacements being done to *X to be done to *Y. */
6353 move_replacements (rtx
*x
, rtx
*y
)
6357 for (i
= 0; i
< n_replacements
; i
++)
6358 if (replacements
[i
].where
== x
)
6359 replacements
[i
].where
= y
;
6362 /* If LOC was scheduled to be replaced by something, return the replacement.
6363 Otherwise, return *LOC. */
6366 find_replacement (rtx
*loc
)
6368 struct replacement
*r
;
6370 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6372 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6374 if (reloadreg
&& r
->where
== loc
)
6376 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6377 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6381 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6382 && r
->where
== &SUBREG_REG (*loc
))
6384 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6385 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6387 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6388 GET_MODE (SUBREG_REG (*loc
)),
6389 SUBREG_BYTE (*loc
));
6393 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6394 what's inside and make a new rtl if so. */
6395 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6396 || GET_CODE (*loc
) == MULT
)
6398 rtx x
= find_replacement (&XEXP (*loc
, 0));
6399 rtx y
= find_replacement (&XEXP (*loc
, 1));
6401 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6402 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6408 /* Return nonzero if register in range [REGNO, ENDREGNO)
6409 appears either explicitly or implicitly in X
6410 other than being stored into (except for earlyclobber operands).
6412 References contained within the substructure at LOC do not count.
6413 LOC may be zero, meaning don't ignore anything.
6415 This is similar to refers_to_regno_p in rtlanal.c except that we
6416 look at equivalences for pseudos that didn't get hard registers. */
6419 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6431 code
= GET_CODE (x
);
6438 /* If this is a pseudo, a hard register must not have been allocated.
6439 X must therefore either be a constant or be in memory. */
6440 if (r
>= FIRST_PSEUDO_REGISTER
)
6442 if (reg_equiv_memory_loc (r
))
6443 return refers_to_regno_for_reload_p (regno
, endregno
,
6444 reg_equiv_memory_loc (r
),
6447 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6451 return endregno
> r
&& regno
< END_REGNO (x
);
6454 /* If this is a SUBREG of a hard reg, we can see exactly which
6455 registers are being modified. Otherwise, handle normally. */
6456 if (REG_P (SUBREG_REG (x
))
6457 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6459 unsigned int inner_regno
= subreg_regno (x
);
6460 unsigned int inner_endregno
6461 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6462 ? subreg_nregs (x
) : 1);
6464 return endregno
> inner_regno
&& regno
< inner_endregno
;
6470 if (&SET_DEST (x
) != loc
6471 /* Note setting a SUBREG counts as referring to the REG it is in for
6472 a pseudo but not for hard registers since we can
6473 treat each word individually. */
6474 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6475 && loc
!= &SUBREG_REG (SET_DEST (x
))
6476 && REG_P (SUBREG_REG (SET_DEST (x
)))
6477 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6478 && refers_to_regno_for_reload_p (regno
, endregno
,
6479 SUBREG_REG (SET_DEST (x
)),
6481 /* If the output is an earlyclobber operand, this is
6483 || ((!REG_P (SET_DEST (x
))
6484 || earlyclobber_operand_p (SET_DEST (x
)))
6485 && refers_to_regno_for_reload_p (regno
, endregno
,
6486 SET_DEST (x
), loc
))))
6489 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6498 /* X does not match, so try its subexpressions. */
6500 fmt
= GET_RTX_FORMAT (code
);
6501 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6503 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6511 if (refers_to_regno_for_reload_p (regno
, endregno
,
6515 else if (fmt
[i
] == 'E')
6518 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6519 if (loc
!= &XVECEXP (x
, i
, j
)
6520 && refers_to_regno_for_reload_p (regno
, endregno
,
6521 XVECEXP (x
, i
, j
), loc
))
6528 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6529 we check if any register number in X conflicts with the relevant register
6530 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6531 contains a MEM (we don't bother checking for memory addresses that can't
6532 conflict because we expect this to be a rare case.
6534 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6535 that we look at equivalences for pseudos that didn't get hard registers. */
6538 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6540 int regno
, endregno
;
6542 /* Overly conservative. */
6543 if (GET_CODE (x
) == STRICT_LOW_PART
6544 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6547 /* If either argument is a constant, then modifying X cannot affect IN. */
6548 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6550 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6551 return refers_to_mem_for_reload_p (in
);
6552 else if (GET_CODE (x
) == SUBREG
)
6554 regno
= REGNO (SUBREG_REG (x
));
6555 if (regno
< FIRST_PSEUDO_REGISTER
)
6556 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6557 GET_MODE (SUBREG_REG (x
)),
6560 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6561 ? subreg_nregs (x
) : 1);
6563 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6569 /* If this is a pseudo, it must not have been assigned a hard register.
6570 Therefore, it must either be in memory or be a constant. */
6572 if (regno
>= FIRST_PSEUDO_REGISTER
)
6574 if (reg_equiv_memory_loc (regno
))
6575 return refers_to_mem_for_reload_p (in
);
6576 gcc_assert (reg_equiv_constant (regno
));
6580 endregno
= END_REGNO (x
);
6582 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6585 return refers_to_mem_for_reload_p (in
);
6586 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
)
6587 return reg_mentioned_p (x
, in
);
6590 gcc_assert (GET_CODE (x
) == PLUS
);
6592 /* We actually want to know if X is mentioned somewhere inside IN.
6593 We must not say that (plus (sp) (const_int 124)) is in
6594 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6595 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6596 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6601 else if (GET_CODE (in
) == PLUS
)
6602 return (rtx_equal_p (x
, in
)
6603 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6604 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6605 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6606 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6612 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6616 refers_to_mem_for_reload_p (rtx x
)
6625 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6626 && reg_equiv_memory_loc (REGNO (x
)));
6628 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6629 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6631 && (MEM_P (XEXP (x
, i
))
6632 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6638 /* Check the insns before INSN to see if there is a suitable register
6639 containing the same value as GOAL.
6640 If OTHER is -1, look for a register in class RCLASS.
6641 Otherwise, just see if register number OTHER shares GOAL's value.
6643 Return an rtx for the register found, or zero if none is found.
6645 If RELOAD_REG_P is (short *)1,
6646 we reject any hard reg that appears in reload_reg_rtx
6647 because such a hard reg is also needed coming into this insn.
6649 If RELOAD_REG_P is any other nonzero value,
6650 it is a vector indexed by hard reg number
6651 and we reject any hard reg whose element in the vector is nonnegative
6652 as well as any that appears in reload_reg_rtx.
6654 If GOAL is zero, then GOALREG is a register number; we look
6655 for an equivalent for that register.
6657 MODE is the machine mode of the value we want an equivalence for.
6658 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6660 This function is used by jump.c as well as in the reload pass.
6662 If GOAL is the sum of the stack pointer and a constant, we treat it
6663 as if it were a constant except that sp is required to be unchanging. */
6666 find_equiv_reg (rtx goal
, rtx_insn
*insn
, enum reg_class rclass
, int other
,
6667 short *reload_reg_p
, int goalreg
, machine_mode mode
)
6670 rtx goaltry
, valtry
, value
;
6677 int goal_mem_addr_varies
= 0;
6678 int need_stable_sp
= 0;
6685 else if (REG_P (goal
))
6686 regno
= REGNO (goal
);
6687 else if (MEM_P (goal
))
6689 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6690 if (MEM_VOLATILE_P (goal
))
6692 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6694 /* An address with side effects must be reexecuted. */
6709 else if (CONSTANT_P (goal
))
6711 else if (GET_CODE (goal
) == PLUS
6712 && XEXP (goal
, 0) == stack_pointer_rtx
6713 && CONSTANT_P (XEXP (goal
, 1)))
6714 goal_const
= need_stable_sp
= 1;
6715 else if (GET_CODE (goal
) == PLUS
6716 && XEXP (goal
, 0) == frame_pointer_rtx
6717 && CONSTANT_P (XEXP (goal
, 1)))
6723 /* Scan insns back from INSN, looking for one that copies
6724 a value into or out of GOAL.
6725 Stop and give up if we reach a label. */
6730 if (p
&& DEBUG_INSN_P (p
))
6733 if (p
== 0 || LABEL_P (p
)
6734 || num
> param_max_reload_search_insns
)
6737 /* Don't reuse register contents from before a setjmp-type
6738 function call; on the second return (from the longjmp) it
6739 might have been clobbered by a later reuse. It doesn't
6740 seem worthwhile to actually go and see if it is actually
6741 reused even if that information would be readily available;
6742 just don't reuse it across the setjmp call. */
6743 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6746 if (NONJUMP_INSN_P (p
)
6747 /* If we don't want spill regs ... */
6748 && (! (reload_reg_p
!= 0
6749 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6750 /* ... then ignore insns introduced by reload; they aren't
6751 useful and can cause results in reload_as_needed to be
6752 different from what they were when calculating the need for
6753 spills. If we notice an input-reload insn here, we will
6754 reject it below, but it might hide a usable equivalent.
6755 That makes bad code. It may even fail: perhaps no reg was
6756 spilled for this insn because it was assumed we would find
6758 || INSN_UID (p
) < reload_first_uid
))
6761 pat
= single_set (p
);
6763 /* First check for something that sets some reg equal to GOAL. */
6766 && true_regnum (SET_SRC (pat
)) == regno
6767 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6770 && true_regnum (SET_DEST (pat
)) == regno
6771 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6773 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6774 /* When looking for stack pointer + const,
6775 make sure we don't use a stack adjust. */
6776 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6777 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6779 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6780 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6782 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6783 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6784 /* If we are looking for a constant,
6785 and something equivalent to that constant was copied
6786 into a reg, we can use that reg. */
6787 || (goal_const
&& REG_NOTES (p
) != 0
6788 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6789 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6791 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6792 || (REG_P (SET_DEST (pat
))
6793 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6794 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6795 && CONST_INT_P (goal
)
6796 && (goaltry
= operand_subword (XEXP (tem
, 0), 0,
6798 && rtx_equal_p (goal
, goaltry
)
6800 = operand_subword (SET_DEST (pat
), 0, 0,
6802 && (valueno
= true_regnum (valtry
)) >= 0)))
6803 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6805 && REG_P (SET_DEST (pat
))
6806 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6807 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6808 && CONST_INT_P (goal
)
6809 && (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6811 && rtx_equal_p (goal
, goaltry
)
6813 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6814 && (valueno
= true_regnum (valtry
)) >= 0)))
6818 if (valueno
!= other
)
6821 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6823 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6833 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6834 (or copying VALUE into GOAL, if GOAL is also a register).
6835 Now verify that VALUE is really valid. */
6837 /* VALUENO is the register number of VALUE; a hard register. */
6839 /* Don't try to re-use something that is killed in this insn. We want
6840 to be able to trust REG_UNUSED notes. */
6841 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6844 /* If we propose to get the value from the stack pointer or if GOAL is
6845 a MEM based on the stack pointer, we need a stable SP. */
6846 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6847 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6851 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6852 if (GET_MODE (value
) != mode
)
6855 /* Reject VALUE if it was loaded from GOAL
6856 and is also a register that appears in the address of GOAL. */
6858 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6859 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6863 /* Reject registers that overlap GOAL. */
6865 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6866 nregs
= hard_regno_nregs (regno
, mode
);
6869 valuenregs
= hard_regno_nregs (valueno
, mode
);
6871 if (!goal_mem
&& !goal_const
6872 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6875 /* Reject VALUE if it is one of the regs reserved for reloads.
6876 Reload1 knows how to reuse them anyway, and it would get
6877 confused if we allocated one without its knowledge.
6878 (Now that insns introduced by reload are ignored above,
6879 this case shouldn't happen, but I'm not positive.) */
6881 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6884 for (i
= 0; i
< valuenregs
; ++i
)
6885 if (reload_reg_p
[valueno
+ i
] >= 0)
6889 /* Reject VALUE if it is a register being used for an input reload
6890 even if it is not one of those reserved. */
6892 if (reload_reg_p
!= 0)
6895 for (i
= 0; i
< n_reloads
; i
++)
6896 if (rld
[i
].reg_rtx
!= 0
6898 && (int) REGNO (rld
[i
].reg_rtx
) < valueno
+ valuenregs
6899 && (int) END_REGNO (rld
[i
].reg_rtx
) > valueno
)
6904 /* We must treat frame pointer as varying here,
6905 since it can vary--in a nonlocal goto as generated by expand_goto. */
6906 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6908 /* Now verify that the values of GOAL and VALUE remain unaltered
6909 until INSN is reached. */
6918 /* Don't trust the conversion past a function call
6919 if either of the two is in a call-clobbered register, or memory. */
6922 if (goal_mem
|| need_stable_sp
)
6925 function_abi callee_abi
= insn_callee_abi (p
);
6927 && regno
< FIRST_PSEUDO_REGISTER
6928 && callee_abi
.clobbers_reg_p (mode
, regno
))
6932 && valueno
< FIRST_PSEUDO_REGISTER
6933 && callee_abi
.clobbers_reg_p (mode
, valueno
))
6941 /* Watch out for unspec_volatile, and volatile asms. */
6942 if (volatile_insn_p (pat
))
6945 /* If this insn P stores in either GOAL or VALUE, return 0.
6946 If GOAL is a memory ref and this insn writes memory, return 0.
6947 If GOAL is a memory ref and its address is not constant,
6948 and this insn P changes a register used in GOAL, return 0. */
6950 if (GET_CODE (pat
) == COND_EXEC
)
6951 pat
= COND_EXEC_CODE (pat
);
6952 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6954 rtx dest
= SET_DEST (pat
);
6955 while (GET_CODE (dest
) == SUBREG
6956 || GET_CODE (dest
) == ZERO_EXTRACT
6957 || GET_CODE (dest
) == STRICT_LOW_PART
)
6958 dest
= XEXP (dest
, 0);
6961 int xregno
= REGNO (dest
);
6962 int end_xregno
= END_REGNO (dest
);
6963 if (xregno
< regno
+ nregs
&& end_xregno
> regno
)
6965 if (xregno
< valueno
+ valuenregs
6966 && end_xregno
> valueno
)
6968 if (goal_mem_addr_varies
6969 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6971 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6974 else if (goal_mem
&& MEM_P (dest
)
6975 && ! push_operand (dest
, GET_MODE (dest
)))
6977 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6978 && reg_equiv_memory_loc (regno
) != 0)
6980 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6983 else if (GET_CODE (pat
) == PARALLEL
)
6986 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6988 rtx v1
= XVECEXP (pat
, 0, i
);
6989 if (GET_CODE (v1
) == COND_EXEC
)
6990 v1
= COND_EXEC_CODE (v1
);
6991 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6993 rtx dest
= SET_DEST (v1
);
6994 while (GET_CODE (dest
) == SUBREG
6995 || GET_CODE (dest
) == ZERO_EXTRACT
6996 || GET_CODE (dest
) == STRICT_LOW_PART
)
6997 dest
= XEXP (dest
, 0);
7000 int xregno
= REGNO (dest
);
7001 int end_xregno
= END_REGNO (dest
);
7002 if (xregno
< regno
+ nregs
7003 && end_xregno
> regno
)
7005 if (xregno
< valueno
+ valuenregs
7006 && end_xregno
> valueno
)
7008 if (goal_mem_addr_varies
7009 && reg_overlap_mentioned_for_reload_p (dest
,
7012 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7015 else if (goal_mem
&& MEM_P (dest
)
7016 && ! push_operand (dest
, GET_MODE (dest
)))
7018 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7019 && reg_equiv_memory_loc (regno
) != 0)
7021 else if (need_stable_sp
7022 && push_operand (dest
, GET_MODE (dest
)))
7028 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7032 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7033 link
= XEXP (link
, 1))
7035 pat
= XEXP (link
, 0);
7036 if (GET_CODE (pat
) == CLOBBER
)
7038 rtx dest
= SET_DEST (pat
);
7042 int xregno
= REGNO (dest
);
7043 int end_xregno
= END_REGNO (dest
);
7045 if (xregno
< regno
+ nregs
7046 && end_xregno
> regno
)
7048 else if (xregno
< valueno
+ valuenregs
7049 && end_xregno
> valueno
)
7051 else if (goal_mem_addr_varies
7052 && reg_overlap_mentioned_for_reload_p (dest
,
7057 else if (goal_mem
&& MEM_P (dest
)
7058 && ! push_operand (dest
, GET_MODE (dest
)))
7060 else if (need_stable_sp
7061 && push_operand (dest
, GET_MODE (dest
)))
7068 /* If this insn auto-increments or auto-decrements
7069 either regno or valueno, return 0 now.
7070 If GOAL is a memory ref and its address is not constant,
7071 and this insn P increments a register used in GOAL, return 0. */
7075 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7076 if (REG_NOTE_KIND (link
) == REG_INC
7077 && REG_P (XEXP (link
, 0)))
7079 int incno
= REGNO (XEXP (link
, 0));
7080 if (incno
< regno
+ nregs
&& incno
>= regno
)
7082 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7084 if (goal_mem_addr_varies
7085 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7095 /* Find a place where INCED appears in an increment or decrement operator
7096 within X, and return the amount INCED is incremented or decremented by.
7097 The value is always positive. */
7100 find_inc_amount (rtx x
, rtx inced
)
7102 enum rtx_code code
= GET_CODE (x
);
7108 rtx addr
= XEXP (x
, 0);
7109 if ((GET_CODE (addr
) == PRE_DEC
7110 || GET_CODE (addr
) == POST_DEC
7111 || GET_CODE (addr
) == PRE_INC
7112 || GET_CODE (addr
) == POST_INC
)
7113 && XEXP (addr
, 0) == inced
)
7114 return GET_MODE_SIZE (GET_MODE (x
));
7115 else if ((GET_CODE (addr
) == PRE_MODIFY
7116 || GET_CODE (addr
) == POST_MODIFY
)
7117 && GET_CODE (XEXP (addr
, 1)) == PLUS
7118 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7119 && XEXP (addr
, 0) == inced
7120 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7122 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7123 return i
< 0 ? -i
: i
;
7127 fmt
= GET_RTX_FORMAT (code
);
7128 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7132 poly_int64 tem
= find_inc_amount (XEXP (x
, i
), inced
);
7133 if (maybe_ne (tem
, 0))
7139 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7141 poly_int64 tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7142 if (maybe_ne (tem
, 0))
7151 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7152 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7155 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7165 if (! INSN_P (insn
))
7168 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7169 if (REG_NOTE_KIND (link
) == REG_INC
)
7171 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7172 if (test
>= regno
&& test
< endregno
)
7178 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7179 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7180 REG_INC. REGNO must refer to a hard register. */
7183 regno_clobbered_p (unsigned int regno
, rtx_insn
*insn
, machine_mode mode
,
7186 /* regno must be a hard register. */
7187 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7189 unsigned int endregno
= end_hard_regno (mode
, regno
);
7191 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7192 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7193 && REG_P (XEXP (PATTERN (insn
), 0)))
7195 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7197 return test
>= regno
&& test
< endregno
;
7200 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7203 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7205 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7209 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7210 if ((GET_CODE (elt
) == CLOBBER
7211 || (sets
== 1 && GET_CODE (elt
) == SET
))
7212 && REG_P (XEXP (elt
, 0)))
7214 unsigned int test
= REGNO (XEXP (elt
, 0));
7216 if (test
>= regno
&& test
< endregno
)
7220 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7228 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7230 reload_adjust_reg_for_mode (rtx reloadreg
, machine_mode mode
)
7234 if (GET_MODE (reloadreg
) == mode
)
7237 regno
= REGNO (reloadreg
);
7239 if (REG_WORDS_BIG_ENDIAN
)
7240 regno
+= ((int) REG_NREGS (reloadreg
)
7241 - (int) hard_regno_nregs (regno
, mode
));
7243 return gen_rtx_REG (mode
, regno
);
7246 static const char *const reload_when_needed_name
[] =
7249 "RELOAD_FOR_OUTPUT",
7251 "RELOAD_FOR_INPUT_ADDRESS",
7252 "RELOAD_FOR_INPADDR_ADDRESS",
7253 "RELOAD_FOR_OUTPUT_ADDRESS",
7254 "RELOAD_FOR_OUTADDR_ADDRESS",
7255 "RELOAD_FOR_OPERAND_ADDRESS",
7256 "RELOAD_FOR_OPADDR_ADDR",
7258 "RELOAD_FOR_OTHER_ADDRESS"
7261 /* These functions are used to print the variables set by 'find_reloads' */
7264 debug_reload_to_stream (FILE *f
)
7271 for (r
= 0; r
< n_reloads
; r
++)
7273 fprintf (f
, "Reload %d: ", r
);
7277 fprintf (f
, "reload_in (%s) = ",
7278 GET_MODE_NAME (rld
[r
].inmode
));
7279 print_inline_rtx (f
, rld
[r
].in
, 24);
7280 fprintf (f
, "\n\t");
7283 if (rld
[r
].out
!= 0)
7285 fprintf (f
, "reload_out (%s) = ",
7286 GET_MODE_NAME (rld
[r
].outmode
));
7287 print_inline_rtx (f
, rld
[r
].out
, 24);
7288 fprintf (f
, "\n\t");
7291 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7293 fprintf (f
, "%s (opnum = %d)",
7294 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7297 if (rld
[r
].optional
)
7298 fprintf (f
, ", optional");
7300 if (rld
[r
].nongroup
)
7301 fprintf (f
, ", nongroup");
7303 if (maybe_ne (rld
[r
].inc
, 0))
7305 fprintf (f
, ", inc by ");
7306 print_dec (rld
[r
].inc
, f
, SIGNED
);
7309 if (rld
[r
].nocombine
)
7310 fprintf (f
, ", can't combine");
7312 if (rld
[r
].secondary_p
)
7313 fprintf (f
, ", secondary_reload_p");
7315 if (rld
[r
].in_reg
!= 0)
7317 fprintf (f
, "\n\treload_in_reg: ");
7318 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7321 if (rld
[r
].out_reg
!= 0)
7323 fprintf (f
, "\n\treload_out_reg: ");
7324 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7327 if (rld
[r
].reg_rtx
!= 0)
7329 fprintf (f
, "\n\treload_reg_rtx: ");
7330 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7334 if (rld
[r
].secondary_in_reload
!= -1)
7336 fprintf (f
, "%ssecondary_in_reload = %d",
7337 prefix
, rld
[r
].secondary_in_reload
);
7341 if (rld
[r
].secondary_out_reload
!= -1)
7342 fprintf (f
, "%ssecondary_out_reload = %d\n",
7343 prefix
, rld
[r
].secondary_out_reload
);
7346 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7348 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7349 insn_data
[rld
[r
].secondary_in_icode
].name
);
7353 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7354 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7355 insn_data
[rld
[r
].secondary_out_icode
].name
);
7364 debug_reload_to_stream (stderr
);