1 # Copyright
(C
) 1999-2017 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
443 void f() __attribute__((ifunc("g")));
447 # Returns true if --gc-sections is supported on the target.
449 proc check_gc_sections_available { } {
450 global gc_sections_available_saved
453 if {![info exists gc_sections_available_saved]} {
454 # Some targets don't support gc
-sections despite whatever
's
455 # advertised by ld's options.
456 if { [istarget alpha
*-*-*]
457 ||
[istarget ia64
-*-*] } {
458 set gc_sections_available_saved
0
462 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
464 if { [board_info target
exists ldflags
]
465 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
466 set gc_sections_available_saved
0
470 # VxWorks kernel modules are relocatable objects linked with
-r
,
471 #
while RTP executables are linked with
-q
(--emit
-relocs
).
472 # Both of these options are incompatible with
--gc
-sections.
473 if { [istarget
*-*-vxworks
*] } {
474 set gc_sections_available_saved
0
478 # Check
if the
ld used by gcc supports
--gc
-sections.
479 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
480 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
481 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
482 set gc_sections_available_saved
1
484 set gc_sections_available_saved
0
487 return $gc_sections_available_saved
490 #
Return 1 if according to target_info struct and explicit target list
491 # target is supposed to support trampolines.
493 proc check_effective_target_trampolines
{ } {
494 if [target_info
exists gcc
,no_trampolines
] {
497 if { [istarget avr
-*-*]
498 ||
[istarget msp430
-*-*]
499 ||
[istarget nvptx
-*-*]
500 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
501 ||
[istarget hppa64
-hp
-hpux11.23
] } {
507 #
Return 1 if target has limited stack size.
509 proc check_effective_target_stack_size
{ } {
510 if [target_info
exists gcc
,stack_size
] {
516 #
Return the value attribute of an effective target
, otherwise
return 0.
518 proc dg
-effective
-target
-value
{ effective_target
} {
519 if { "$effective_target" == "stack_size" } {
520 if [check_effective_target_stack_size
] {
521 return [target_info gcc
,stack_size
]
528 #
Return 1 if signal.h is supported.
530 proc check_effective_target_signal
{ } {
531 if [target_info
exists gcc
,signal_suppress
] {
537 #
Return 1 if according to target_info struct and explicit target list
538 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
539 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
540 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
541 # depend
on this option should
do that
).
543 proc check_effective_target_keeps_null_pointer_checks
{ } {
544 if [target_info
exists keeps_null_pointer_checks
] {
547 if { [istarget avr
-*-*] } {
553 #
Return the autofdo profile wrapper
555 # Linux by default allows
516KB of perf event buffers
556 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
557 # Each individual perf tries to grab it
558 # This causes problems with parallel test suite runs. Instead
559 #
limit us to
8 pages
(32K
), which should be good enough
560 #
for the small test programs. With the default settings
561 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
562 proc profopt
-perf
-wrapper
{ } {
564 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
567 #
Return true
if profiling is supported
on the target.
569 proc check_profiling_available
{ test_what
} {
570 global profiling_available_saved
572 verbose
"Profiling argument is <$test_what>" 1
574 # These conditions depend
on the
argument so examine them before
575 # looking at the
cache variable.
577 # Tree profiling requires TLS runtime support.
578 if { $test_what
== "-fprofile-generate" } {
579 if { ![check_effective_target_tls_runtime
] } {
584 if { $test_what
== "-fauto-profile" } {
585 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
586 verbose
"autofdo only supported on linux"
589 # not cross compiling?
591 verbose
"autofdo not supported for non native builds"
594 set event
[profopt
-perf
-wrapper
]
596 verbose
"autofdo not supported"
600 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
601 if { [lindex $
status 0] != 0 } {
602 verbose
"autofdo not supported because perf does not work"
606 # no good way to check this in advance
-- check later instead.
607 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
608 #
if { [lindex $
status 0] != 255 } {
609 # verbose
"autofdo not supported due to missing create_gcov"
614 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
615 # vendor compiler. We cannot reliably predict the directory where the
616 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
617 # necessarily find mcrt1.o even if we have it.
618 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
622 # We don't yet support profiling
for MIPS16.
623 if { [istarget mips
*-*-*]
624 && ![check_effective_target_nomips16
]
625 && ($test_what
== "-p" || $test_what == "-pg") } {
629 # MinGW does not support
-p.
630 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
634 # cygwin does not support
-p.
635 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
639 # uClibc does not have gcrt1.o.
640 if { [check_effective_target_uclibc
]
641 && ($test_what
== "-p" || $test_what == "-pg") } {
645 # Now examine the
cache variable.
646 if {![info exists profiling_available_saved
]} {
647 # Some targets don
't have any implementation of __bb_init_func or are
648 # missing other needed machinery.
649 if {[istarget aarch64*-*-elf]
650 || [istarget am3*-*-linux*]
651 || [istarget arm*-*-eabi*]
652 || [istarget arm*-*-elf]
653 || [istarget arm*-*-symbianelf*]
654 || [istarget avr-*-*]
655 || [istarget bfin-*-*]
656 || [istarget cris-*-*]
657 || [istarget crisv32-*-*]
658 || [istarget fido-*-elf]
659 || [istarget h8300-*-*]
660 || [istarget lm32-*-*]
661 || [istarget m32c-*-elf]
662 || [istarget m68k-*-elf]
663 || [istarget m68k-*-uclinux*]
664 || [istarget mips*-*-elf*]
665 || [istarget mmix-*-*]
666 || [istarget mn10300-*-elf*]
667 || [istarget moxie-*-elf*]
668 || [istarget msp430-*-*]
669 || [istarget nds32*-*-elf]
670 || [istarget nios2-*-elf]
671 || [istarget nvptx-*-*]
672 || [istarget powerpc-*-eabi*]
673 || [istarget powerpc-*-elf]
675 || [istarget tic6x-*-elf]
676 || [istarget visium-*-*]
677 || [istarget xstormy16-*]
678 || [istarget xtensa*-*-elf]
679 || [istarget *-*-rtems*]
680 || [istarget *-*-vxworks*] } {
681 set profiling_available_saved 0
683 set profiling_available_saved 1
687 # -pg link test result can't be cached since it may change between
689 set profiling_working $profiling_available_saved
690 if { $profiling_available_saved
== 1
691 && ![check_no_compiler_messages_nocache profiling executable
{
692 int main
() { return 0; } } "-pg"] } {
693 set profiling_working
0
696 return $profiling_working
699 # Check to see
if a target is
"freestanding". This is as per the definition
700 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
701 # extra headers or libraries other than what is considered essential.
702 proc check_effective_target_freestanding
{ } {
703 if { [istarget nvptx
-*-*] } {
709 #
Return 1 if target has packed layout of structure members by
710 # default
, 0 otherwise. Note that this is slightly different than
711 # whether the target has
"natural alignment": both attributes may be
714 proc check_effective_target_default_packed
{ } {
715 return [check_no_compiler_messages default_packed assembly
{
716 struct x
{ char a
; long b
; } c
;
717 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
721 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
722 # documentation
, where the test also comes from.
724 proc check_effective_target_pcc_bitfield_type_matters
{ } {
725 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
726 # bitfields, but let's stick to the example code from the docs.
727 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
728 struct foo1
{ char x
; char
:0; char y
; };
729 struct foo2
{ char x
; int :0; char y
; };
730 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
734 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
736 proc add_options_for_tls
{ flags
} {
737 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
738 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
739 # Need to duplicate native TLS check from
740 # check_effective_target_tls_native to avoid recursion.
741 if { ([istarget powerpc
-ibm
-aix
*]) &&
742 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
744 int f
(void
) { return i
; }
745 void g
(int j
) { i
= j
; }
747 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
752 #
Return 1 if indirect jumps are supported
, 0 otherwise.
754 proc check_effective_target_indirect_jumps
{} {
755 if { [istarget nvptx
-*-*] } {
761 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
763 proc check_effective_target_nonlocal_goto
{} {
764 if { [istarget nvptx
-*-*] } {
770 #
Return 1 if global constructors are supported
, 0 otherwise.
772 proc check_effective_target_global_constructor
{} {
773 if { [istarget nvptx
-*-*] } {
779 #
Return 1 if taking label
values is supported
, 0 otherwise.
781 proc check_effective_target_label_values
{} {
782 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
789 #
Return 1 if builtin_return_address and builtin_frame_address are
790 # supported
, 0 otherwise.
792 proc check_effective_target_return_address
{} {
793 if { [istarget nvptx
-*-*] } {
799 #
Return 1 if the assembler does not verify function types against
800 # calls
, 0 otherwise. Such verification will typically
show up problems
801 # with K
&R C function declarations.
803 proc check_effective_target_untyped_assembly
{} {
804 if { [istarget nvptx
-*-*] } {
810 #
Return 1 if alloca is supported
, 0 otherwise.
812 proc check_effective_target_alloca
{} {
813 if { [istarget nvptx
-*-*] } {
814 return [check_no_compiler_messages alloca assembly
{
816 void g
(int n
) { f
(__builtin_alloca
(n
)); }
822 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
824 proc check_effective_target_tls
{} {
825 return [check_no_compiler_messages tls assembly
{
827 int f
(void
) { return i
; }
828 void g
(int j
) { i
= j
; }
832 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
834 proc check_effective_target_tls_native
{} {
835 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
836 # functions
, so we fail to automatically detect it.
837 if { [istarget
*-*-vxworks
*] } {
841 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
843 int f
(void
) { return i
; }
844 void g
(int j
) { i
= j
; }
848 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
850 proc check_effective_target_tls_emulated
{} {
851 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
852 # functions
, so we fail to automatically detect it.
853 if { [istarget
*-*-vxworks
*] } {
857 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
859 int f
(void
) { return i
; }
860 void g
(int j
) { i
= j
; }
864 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
866 proc check_effective_target_tls_runtime
{} {
867 # The runtime does not have TLS support
, but just
868 # running the test below is insufficient to
show this.
869 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
872 return [check_runtime tls_runtime
{
873 __thread
int thr
= 0;
874 int main
(void
) { return thr
; }
875 } [add_options_for_tls
""]]
878 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
880 proc check_effective_target_cas_char
{} {
881 return [check_no_compiler_messages cas_char assembly
{
882 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
888 proc check_effective_target_cas_int
{} {
889 return [check_no_compiler_messages cas_int assembly
{
890 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
892 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
900 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
902 proc check_effective_target_function_sections
{} {
903 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
904 if { [istarget
*-*-darwin
*] } {
908 return [check_no_compiler_messages functionsections assembly
{
910 } "-ffunction-sections"]
913 #
Return 1 if instruction scheduling is available
, 0 otherwise.
915 proc check_effective_target_scheduling
{} {
916 return [check_no_compiler_messages scheduling object
{
918 } "-fschedule-insns"]
921 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
923 proc check_effective_target_trapping
{} {
924 return [check_no_compiler_messages trapping object
{
925 int add
(int a
, int b
) { return a
+ b
; }
929 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
932 proc check_effective_target_fgraphite
{} {
933 return [check_no_compiler_messages fgraphite object
{
938 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
941 proc check_effective_target_fopenacc
{} {
942 # nvptx can be built with the device
-side bits of openacc
, but it
943 # does not make sense to test it as an openacc host.
944 if [istarget nvptx
-*-*] { return 0 }
946 return [check_no_compiler_messages fopenacc object
{
951 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
954 proc check_effective_target_fopenmp
{} {
955 # nvptx can be built with the device
-side bits of libgomp
, but it
956 # does not make sense to test it as an openmp host.
957 if [istarget nvptx
-*-*] { return 0 }
959 return [check_no_compiler_messages fopenmp object
{
964 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
967 proc check_effective_target_fgnu_tm
{} {
968 return [check_no_compiler_messages fgnu_tm object
{
973 #
Return 1 if the target supports mmap
, 0 otherwise.
975 proc check_effective_target_mmap
{} {
976 return [check_function_available
"mmap"]
979 #
Return 1 if the target supports dlopen
, 0 otherwise.
980 proc check_effective_target_dlopen
{} {
981 return [check_no_compiler_messages dlopen executable
{
983 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
984 } [add_options_for_dlopen
""]]
987 proc add_options_for_dlopen
{ flags
} {
991 #
Return 1 if the target supports clone
, 0 otherwise.
992 proc check_effective_target_clone
{} {
993 return [check_function_available
"clone"]
996 #
Return 1 if the target supports setrlimit
, 0 otherwise.
997 proc check_effective_target_setrlimit
{} {
998 # Darwin has non
-posix compliant RLIMIT_AS
999 if { [istarget
*-*-darwin
*] } {
1002 return [check_function_available
"setrlimit"]
1005 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1006 proc check_effective_target_gettimeofday
{} {
1007 return [check_function_available
"gettimeofday"]
1010 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1011 proc check_effective_target_swapcontext
{} {
1012 return [check_no_compiler_messages swapcontext executable
{
1013 #
include <ucontext.h
>
1016 ucontext_t orig_context
,child_context
;
1017 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1022 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1023 # code
, 0 otherwise.
1025 proc check_effective_target_pthread
{} {
1026 return [check_no_compiler_messages pthread object
{
1031 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1032 # code
, 0 otherwise.
1034 proc check_effective_target_stabs
{} {
1035 return [check_no_compiler_messages stabs object
{
1040 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1041 #
for trivial code
, 0 otherwise.
1043 proc check_effective_target_pe_aligned_commons
{} {
1044 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1045 return [check_no_compiler_messages pe_aligned_commons object
{
1047 } "-mpe-aligned-commons"]
1052 #
Return 1 if the target supports
-static
1053 proc check_effective_target_static
{} {
1054 return [check_no_compiler_messages static executable
{
1055 int main
(void
) { return 0; }
1059 #
Return 1 if the target supports
-fstack
-protector
1060 proc check_effective_target_fstack_protector
{} {
1061 return [check_runtime fstack_protector
{
1062 int main
(void
) { return 0; }
1063 } "-fstack-protector"]
1066 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1067 proc check_stack_check_available
{ stack_kind
} {
1068 if [string match
"" $stack_kind] then {
1069 set stack_opt
"-fstack-check"
1070 } else { set stack_opt
"-fstack-check=$stack_kind" }
1072 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1073 int main
(void
) { return 0; }
1077 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1078 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1079 # warn when
-fprofile
-use is also supplied we test that combination too.
1081 proc check_effective_target_freorder
{} {
1082 if { [check_no_compiler_messages freorder object
{
1084 } "-freorder-blocks-and-partition"]
1085 && [check_no_compiler_messages fprofile_use_freorder object
{
1087 } "-fprofile-use -freorder-blocks-and-partition"] } {
1093 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1094 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1095 # out of scope
for this test.
1097 proc check_effective_target_fpic
{ } {
1098 # Note that M68K has a multilib that supports
-fpic but not
1099 #
-fPIC
, so we need to check both. We test with a
program that
1100 # requires GOT references.
1101 foreach
arg {fpic fPIC
} {
1102 if [check_no_compiler_messages $
arg object
{
1103 extern
int foo
(void
); extern
int bar
;
1104 int baz
(void
) { return foo
() + bar
; }
1112 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1113 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1114 # assumes compiler will give warning if -fpic not supported. Here we check
1115 # whether binutils supports those new -fpic relocation modifiers, and assume
1116 # -fpic is supported if there is binutils support. GCC configuration will
1117 # enable -fpic for AArch64 in this case.
1119 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1120 # memory model -fpic relocation types.
1122 proc check_effective_target_aarch64_small_fpic { } {
1123 if { [istarget aarch64*-*-*] } {
1124 return [check_no_compiler_messages aarch64_small_fpic object {
1125 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1132 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1133 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1134 # in binutils since
2015-03-04 as PR gas
/17843.
1136 # This test directive make sure binutils support all features needed by TLS LE
1137 # under
-mtls
-size
=32 on AArch64.
1139 proc check_effective_target_aarch64_tlsle32
{ } {
1140 if { [istarget aarch64
*-*-*] } {
1141 return [check_no_compiler_messages aarch64_tlsle32 object
{
1142 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1149 #
Return 1 if -shared is supported
, as in no warnings or errors
1150 # emitted
, 0 otherwise.
1152 proc check_effective_target_shared
{ } {
1153 # Note that M68K has a multilib that supports
-fpic but not
1154 #
-fPIC
, so we need to check both. We test with a
program that
1155 # requires GOT references.
1156 return [check_no_compiler_messages shared executable
{
1157 extern
int foo
(void
); extern
int bar
;
1158 int baz
(void
) { return foo
() + bar
; }
1162 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1164 proc check_effective_target_pie
{ } {
1165 if { [istarget
*-*-darwin\
[912\
]*]
1166 ||
[istarget
*-*-dragonfly
*]
1167 ||
[istarget
*-*-freebsd
*]
1168 ||
[istarget
*-*-linux
*]
1169 ||
[istarget
*-*-gnu
*] } {
1172 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1173 # Full PIE support was added in Solaris
11.x and Solaris
12, but gcc
1174 # errors out
if missing
, so check
for that.
1175 return [check_no_compiler_messages pie executable
{
1176 int main
(void
) { return 0; }
1182 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1184 proc check_effective_target_mpaired_single
{ } {
1185 return [check_no_compiler_messages mpaired_single object
{
1187 } "-mpaired-single"]
1190 #
Return true
if the target has access to FPU instructions.
1192 proc check_effective_target_hard_float
{ } {
1193 if { [istarget mips
*-*-*] } {
1194 return [check_no_compiler_messages hard_float assembly
{
1195 #
if (defined __mips_soft_float || defined __mips16
)
1196 #error __mips_soft_float || __mips16
1201 # This proc is actually checking the availabilty of FPU
1202 # support
for doubles
, so
on the RX we must fail
if the
1203 #
64-bit double multilib has been selected.
1204 if { [istarget rx
-*-*] } {
1206 #
return [check_no_compiler_messages hard_float assembly
{
1207 #
if defined __RX_64_BIT_DOUBLES__
1208 #error __RX_64_BIT_DOUBLES__
1213 # The generic test equates hard_float with
"no call for adding doubles".
1214 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1215 double a
(double b
, double c
) { return b
+ c
; }
1219 #
Return true
if the target is a
64-bit MIPS target.
1221 proc check_effective_target_mips64
{ } {
1222 return [check_no_compiler_messages mips64 assembly
{
1229 #
Return true
if the target is a MIPS target that does not produce
1232 proc check_effective_target_nomips16
{ } {
1233 return [check_no_compiler_messages nomips16 object
{
1237 /* A cheap way of testing
for -mflip
-mips16.
*/
1238 void foo
(void
) { asm
("addiu $20,$20,1"); }
1239 void bar
(void
) { asm
("addiu $20,$20,1"); }
1244 # Add the options needed
for MIPS16 function attributes. At the moment
,
1245 # we don
't support MIPS16 PIC.
1247 proc add_options_for_mips16_attribute { flags } {
1248 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1251 # Return true if we can force a mode that allows MIPS16 code generation.
1252 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1255 proc check_effective_target_mips16_attribute
{ } {
1256 return [check_no_compiler_messages mips16_attribute assembly
{
1260 #
if defined __mips_hard_float \
1261 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1262 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1263 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1265 } [add_options_for_mips16_attribute
""]]
1268 #
Return 1 if the target supports long double larger than double when
1269 # using the new ABI
, 0 otherwise.
1271 proc check_effective_target_mips_newabi_large_long_double
{ } {
1272 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1273 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1277 #
Return true
if the target is a MIPS target that has access
1278 # to the LL and SC instructions.
1280 proc check_effective_target_mips_llsc
{ } {
1281 if { ![istarget mips
*-*-*] } {
1284 # Assume that these instructions are always implemented
for
1285 # non
-elf
* targets
, via emulation
if necessary.
1286 if { ![istarget
*-*-elf
*] } {
1289 # Otherwise assume LL
/SC support
for everything but MIPS I.
1290 return [check_no_compiler_messages mips_llsc assembly
{
1297 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1299 proc check_effective_target_mips_rel
{ } {
1300 if { ![istarget mips
*-*-*] } {
1303 return [check_no_compiler_messages mips_rel object
{
1304 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1305 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1306 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1311 #
Return true
if the target is a MIPS target that uses the EABI.
1313 proc check_effective_target_mips_eabi
{ } {
1314 if { ![istarget mips
*-*-*] } {
1317 return [check_no_compiler_messages mips_eabi object
{
1324 #
Return 1 if the current multilib does not generate PIC by default.
1326 proc check_effective_target_nonpic
{ } {
1327 return [check_no_compiler_messages nonpic assembly
{
1334 #
Return 1 if the current multilib generates PIE by default.
1336 proc check_effective_target_pie_enabled
{ } {
1337 return [check_no_compiler_messages pie_enabled assembly
{
1344 #
Return 1 if the target generates
-fstack
-protector by default.
1346 proc check_effective_target_fstack_protector_enabled
{} {
1347 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1348 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1349 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1355 #
Return 1 if the target does not use a
status wrapper.
1357 proc check_effective_target_unwrapped
{ } {
1358 if { [target_info needs_status_wrapper
] != "" \
1359 && [target_info needs_status_wrapper
] != "0" } {
1365 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1367 proc check_iconv_available
{ test_what
} {
1370 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1371 if { ![info exists libiconv
] } {
1372 set libiconv
"-liconv"
1374 set test_what
[lindex $test_what
1]
1375 return [check_runtime_nocache $test_what
[subst
{
1381 cd
= iconv_open
("$test_what", "UTF-8");
1382 if (cd
== (iconv_t
) -1)
1389 #
Return true
if Cilk Library is supported
on the target.
1390 proc check_effective_target_cilkplus_runtime
{ } {
1391 return [ check_no_compiler_messages_nocache cilkplus_runtime executable
{
1395 int __cilkrts_set_param
(const char
*, const char
*);
1397 int x
= __cilkrts_set_param
("nworkers", "0");
1400 } "-fcilkplus -lcilkrts" ]
1403 #
Return true
if the atomic library is supported
on the target.
1404 proc check_effective_target_libatomic_available
{ } {
1405 return [check_no_compiler_messages libatomic_available executable
{
1406 int main
(void
) { return 0; }
1410 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1412 proc check_ascii_locale_available
{ } {
1416 #
Return true
if named sections are supported
on this target.
1418 proc check_named_sections_available
{ } {
1419 return [check_no_compiler_messages named_sections assembly
{
1420 int __attribute__
((section
("whatever"))) foo;
1424 #
Return true
if the
"naked" function attribute is supported on this target.
1426 proc check_effective_target_naked_functions
{ } {
1427 return [check_no_compiler_messages naked_functions assembly
{
1428 void f
() __attribute__
((naked
));
1432 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1435 # When the target
name changes
, replace the cached result.
1437 proc check_effective_target_fortran_large_real
{ } {
1438 return [check_no_compiler_messages fortran_large_real executable
{
1440 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1447 #
Return 1 if the target supports Fortran real kind real
(16),
1448 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1449 # this checks
for Real
(16) only
; the other returned real
(10) if
1450 # both real
(10) and real
(16) are available.
1452 # When the target
name changes
, replace the cached result.
1454 proc check_effective_target_fortran_real_16
{ } {
1455 return [check_no_compiler_messages fortran_real_16 executable
{
1464 #
Return 1 if the target supports Fortran
's IEEE modules,
1467 # When the target name changes, replace the cached result.
1469 proc check_effective_target_fortran_ieee { flags } {
1470 return [check_no_compiler_messages fortran_ieee executable {
1472 use, intrinsic :: ieee_features
1478 # Return 1 if the target supports SQRT for the largest floating-point
1479 # type. (Some targets lack the libm support for this FP type.)
1480 # On most targets, this check effectively checks either whether sqrtl is
1481 # available or on __float128 systems whether libquadmath is installed,
1482 # which provides sqrtq.
1484 # When the target name changes, replace the cached result.
1486 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1487 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1489 use iso_fortran_env, only: real_kinds
1490 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1491 real(kind=maxFP), volatile :: x
1499 # Return 1 if the target supports Fortran integer kinds larger than
1500 # integer(8), 0 otherwise.
1502 # When the target name changes, replace the cached result.
1504 proc check_effective_target_fortran_large_int { } {
1505 return [check_no_compiler_messages fortran_large_int executable {
1507 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1508 integer(kind=k) :: i
1513 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1515 # When the target name changes, replace the cached result.
1517 proc check_effective_target_fortran_integer_16 { } {
1518 return [check_no_compiler_messages fortran_integer_16 executable {
1525 # Return 1 if we can statically link libgfortran, 0 otherwise.
1527 # When the target name changes, replace the cached result.
1529 proc check_effective_target_static_libgfortran { } {
1530 return [check_no_compiler_messages static_libgfortran executable {
1537 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1539 proc check_effective_target_rdynamic { } {
1540 return [check_no_compiler_messages rdynamic executable {
1541 int main() { return 0; }
1545 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1547 proc check_effective_target_cilkplus { } {
1548 # Skip cilk-plus tests on int16 and size16 targets for now.
1549 # The cilk-plus tests are not generic enough to cover these
1550 # cases and would throw hundreds of FAILs.
1551 if { [check_effective_target_int16]
1552 || ![check_effective_target_size32plus] } {
1556 # Skip AVR, its RAM is too small and too many tests would fail.
1557 if { [istarget avr-*-*] } {
1561 if { ! [check_effective_target_pthread] } {
1568 proc check_linker_plugin_available { } {
1569 return [check_no_compiler_messages_nocache linker_plugin executable {
1570 int main() { return 0; }
1571 } "-flto -fuse-linker-plugin"]
1574 # Return 1 if the target OS supports running SSE executables, 0
1575 # otherwise. Cache the result.
1577 proc check_sse_os_support_available { } {
1578 return [check_cached_effective_target sse_os_support_available {
1579 # If this is not the right target then we can skip the test.
1580 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1582 } elseif { [istarget i?86-*-solaris2*] } {
1583 # The Solaris 2 kernel doesn't save and restore SSE registers
1584 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1585 check_runtime_nocache sse_os_support_available
{
1588 asm volatile
("movaps %xmm0,%xmm0");
1598 #
Return 1 if the target OS supports running AVX executables
, 0
1599 # otherwise.
Cache the result.
1601 proc check_avx_os_support_available
{ } {
1602 return [check_cached_effective_target avx_os_support_available
{
1603 #
If this is not the right target
then we can skip the test.
1604 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1607 # Check that OS has AVX and SSE saving enabled.
1608 check_runtime_nocache avx_os_support_available
{
1611 unsigned
int eax
, edx
;
1613 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1614 return (eax
& 0x06) != 0x06;
1621 #
Return 1 if the target OS supports running AVX executables
, 0
1622 # otherwise.
Cache the result.
1624 proc check_avx512_os_support_available
{ } {
1625 return [check_cached_effective_target avx512_os_support_available
{
1626 #
If this is not the right target
then we can skip the test.
1627 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1630 # Check that OS has AVX512
, AVX and SSE saving enabled.
1631 check_runtime_nocache avx512_os_support_available
{
1634 unsigned
int eax
, edx
;
1636 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1637 return (eax
& 0xe6) != 0xe6;
1644 #
Return 1 if the target supports executing SSE instructions
, 0
1645 # otherwise.
Cache the result.
1647 proc check_sse_hw_available
{ } {
1648 return [check_cached_effective_target sse_hw_available
{
1649 #
If this is not the right target
then we can skip the test.
1650 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1653 check_runtime_nocache sse_hw_available
{
1657 unsigned
int eax
, ebx
, ecx
, edx
;
1658 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1661 return !(edx
& bit_SSE
);
1668 #
Return 1 if the target supports executing SSE2 instructions
, 0
1669 # otherwise.
Cache the result.
1671 proc check_sse2_hw_available
{ } {
1672 return [check_cached_effective_target sse2_hw_available
{
1673 #
If this is not the right target
then we can skip the test.
1674 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1677 check_runtime_nocache sse2_hw_available
{
1681 unsigned
int eax
, ebx
, ecx
, edx
;
1682 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1685 return !(edx
& bit_SSE2
);
1692 #
Return 1 if the target supports executing SSE4 instructions
, 0
1693 # otherwise.
Cache the result.
1695 proc check_sse4_hw_available
{ } {
1696 return [check_cached_effective_target sse4_hw_available
{
1697 #
If this is not the right target
then we can skip the test.
1698 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1701 check_runtime_nocache sse4_hw_available
{
1705 unsigned
int eax
, ebx
, ecx
, edx
;
1706 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1709 return !(ecx
& bit_SSE4_2
);
1716 #
Return 1 if the target supports executing AVX instructions
, 0
1717 # otherwise.
Cache the result.
1719 proc check_avx_hw_available
{ } {
1720 return [check_cached_effective_target avx_hw_available
{
1721 #
If this is not the right target
then we can skip the test.
1722 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1725 check_runtime_nocache avx_hw_available
{
1729 unsigned
int eax
, ebx
, ecx
, edx
;
1730 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1733 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1734 != (bit_AVX | bit_OSXSAVE
));
1741 #
Return 1 if the target supports executing AVX2 instructions
, 0
1742 # otherwise.
Cache the result.
1744 proc check_avx2_hw_available
{ } {
1745 return [check_cached_effective_target avx2_hw_available
{
1746 #
If this is not the right target
then we can skip the test.
1747 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1750 check_runtime_nocache avx2_hw_available
{
1755 unsigned
int eax
, ebx
, ecx
, edx
;
1757 if (__get_cpuid_max
(0, NULL
) < 7)
1760 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1762 if (!(ecx
& bit_OSXSAVE
))
1765 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1767 return !(ebx
& bit_AVX2
);
1774 #
Return 1 if the target supports executing AVX512 foundation instructions
, 0
1775 # otherwise.
Cache the result.
1777 proc check_avx512f_hw_available
{ } {
1778 return [check_cached_effective_target avx512f_hw_available
{
1779 #
If this is not the right target
then we can skip the test.
1780 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1783 check_runtime_nocache avx512f_hw_available
{
1788 unsigned
int eax
, ebx
, ecx
, edx
;
1790 if (__get_cpuid_max
(0, NULL
) < 7)
1793 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1795 if (!(ecx
& bit_OSXSAVE
))
1798 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1800 return !(ebx
& bit_AVX512F
);
1807 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1809 proc check_effective_target_sse_runtime
{ } {
1810 if { [check_effective_target_sse
]
1811 && [check_sse_hw_available
]
1812 && [check_sse_os_support_available
] } {
1818 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1820 proc check_effective_target_sse2_runtime
{ } {
1821 if { [check_effective_target_sse2
]
1822 && [check_sse2_hw_available
]
1823 && [check_sse_os_support_available
] } {
1829 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1831 proc check_effective_target_sse4_runtime
{ } {
1832 if { [check_effective_target_sse4
]
1833 && [check_sse4_hw_available
]
1834 && [check_sse_os_support_available
] } {
1840 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1842 proc check_effective_target_avx_runtime
{ } {
1843 if { [check_effective_target_avx
]
1844 && [check_avx_hw_available
]
1845 && [check_avx_os_support_available
] } {
1851 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1853 proc check_effective_target_avx2_runtime
{ } {
1854 if { [check_effective_target_avx2
]
1855 && [check_avx2_hw_available
]
1856 && [check_avx_os_support_available
] } {
1862 #
Return 1 if the target supports running AVX512f executables
, 0 otherwise.
1864 proc check_effective_target_avx512f_runtime
{ } {
1865 if { [check_effective_target_avx512f
]
1866 && [check_avx512f_hw_available
]
1867 && [check_avx512_os_support_available
] } {
1873 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1874 #
0 otherwise.
Cache the result.
1876 proc check_mpaired_single_hw_available
{ } {
1877 return [check_cached_effective_target mpaired_single_hw_available
{
1878 #
If this is not the right target
then we can skip the test.
1879 if { !([istarget mips
*-*-*]) } {
1882 check_runtime_nocache mpaired_single_hw_available
{
1885 asm volatile
("pll.ps $f2,$f4,$f6");
1893 #
Return 1 if the target supports executing Loongson vector instructions
,
1894 #
0 otherwise.
Cache the result.
1896 proc check_mips_loongson_hw_available
{ } {
1897 return [check_cached_effective_target mips_loongson_hw_available
{
1898 #
If this is not the right target
then we can skip the test.
1899 if { !([istarget mips
*-*-*]) } {
1902 check_runtime_nocache mips_loongson_hw_available
{
1903 #
include <loongson.h
>
1906 asm volatile
("paddw $f2,$f4,$f6");
1914 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1915 # otherwise.
Cache the result.
1917 proc check_mips_msa_hw_available
{ } {
1918 return [check_cached_effective_target mips_msa_hw_available
{
1919 #
If this is not the right target
then we can skip the test.
1920 if { !([istarget mips
*-*-*]) } {
1923 check_runtime_nocache mips_msa_hw_available
{
1924 #
if !defined
(__mips_msa
)
1925 #error
"MSA NOT AVAIL"
1927 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1928 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1930 #
if !defined
(__mips_hard_float
)
1931 #error
"MSA HARD_FLOAT REQUIRED"
1933 #
if __mips_fpr
!= 64
1934 #error
"MSA 64-bit FPR REQUIRED"
1940 v8i16 v
= __builtin_msa_ldi_h
(0);
1950 #
Return 1 if the target supports running MIPS Paired
-Single
1951 # executables
, 0 otherwise.
1953 proc check_effective_target_mpaired_single_runtime
{ } {
1954 if { [check_effective_target_mpaired_single
]
1955 && [check_mpaired_single_hw_available
] } {
1961 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1963 proc check_effective_target_mips_loongson_runtime
{ } {
1964 if { [check_effective_target_mips_loongson
]
1965 && [check_mips_loongson_hw_available
] } {
1971 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1973 proc check_effective_target_mips_msa_runtime
{ } {
1974 if { [check_effective_target_mips_msa
]
1975 && [check_mips_msa_hw_available
] } {
1981 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
1982 #
move instructions
for moves from GPR to FPR.
1984 proc check_effective_target_powerpc64_no_dm
{ } {
1985 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
1986 # checks
if we
do not use direct moves
, but use the old
-fashioned
1987 # slower
move-via
-the
-stack.
1988 return [check_no_messages_and_pattern powerpc64_no_dm \
1989 {\mmulld\M.
*\mlfd
} assembly
{
1990 double f
(long long x
) { return x
*x
; }
1994 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
1995 # including having a new enough library to support the test.
Cache the result.
1996 # Require at least a power7 to run
on.
1998 proc check_ppc_cpu_supports_hw_available
{ } {
1999 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
2000 # Some simulators are known to not support VSX
/power8 instructions.
2001 #
For now
, disable
on Darwin
2002 if { [istarget powerpc
-*-eabi
]
2003 ||
[istarget powerpc
*-*-eabispe
]
2004 ||
[istarget
*-*-darwin
*]} {
2008 check_runtime_nocache ppc_cpu_supports_hw_available
{
2012 asm volatile
("xxlor vs0,vs0,vs0");
2014 asm volatile
("xxlor 0,0,0");
2016 if (!__builtin_cpu_supports
("vsx"))
2025 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
2026 # otherwise.
Cache the result.
2028 proc check_750cl_hw_available
{ } {
2029 return [check_cached_effective_target
750cl_hw_available
{
2030 #
If this is not the right target
then we can skip the test.
2031 if { ![istarget powerpc
-*paired
*] } {
2034 check_runtime_nocache
750cl_hw_available
{
2038 asm volatile
("ps_mul v0,v0,v0");
2040 asm volatile
("ps_mul 0,0,0");
2049 #
Return 1 if the target supports executing power8 vector instructions
, 0
2050 # otherwise.
Cache the result.
2052 proc check_p8vector_hw_available
{ } {
2053 return [check_cached_effective_target p8vector_hw_available
{
2054 # Some simulators are known to not support VSX
/power8 instructions.
2055 #
For now
, disable
on Darwin
2056 if { [istarget powerpc
-*-eabi
]
2057 ||
[istarget powerpc
*-*-eabispe
]
2058 ||
[istarget
*-*-darwin
*]} {
2061 set options
"-mpower8-vector"
2062 check_runtime_nocache p8vector_hw_available
{
2066 asm volatile
("xxlorc vs0,vs0,vs0");
2068 asm volatile
("xxlorc 0,0,0");
2077 #
Return 1 if the target supports executing power9 vector instructions
, 0
2078 # otherwise.
Cache the result.
2080 proc check_p9vector_hw_available
{ } {
2081 return [check_cached_effective_target p9vector_hw_available
{
2082 # Some simulators are known to not support VSX
/power8
/power9
2083 # instructions.
For now
, disable
on Darwin.
2084 if { [istarget powerpc
-*-eabi
]
2085 ||
[istarget powerpc
*-*-eabispe
]
2086 ||
[istarget
*-*-darwin
*]} {
2089 set options
"-mpower9-vector"
2090 check_runtime_nocache p9vector_hw_available
{
2094 vector double v
= (vector double
) { 0.0, 0.0 };
2095 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2103 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2104 # otherwise.
Cache the result.
2106 proc check_p9modulo_hw_available
{ } {
2107 return [check_cached_effective_target p9modulo_hw_available
{
2108 # Some simulators are known to not support VSX
/power8
/power9
2109 # instructions.
For now
, disable
on Darwin.
2110 if { [istarget powerpc
-*-eabi
]
2111 ||
[istarget powerpc
*-*-eabispe
]
2112 ||
[istarget
*-*-darwin
*]} {
2115 set options
"-mmodulo"
2116 check_runtime_nocache p9modulo_hw_available
{
2119 int i
= 5, j
= 3, r
= -1;
2120 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2128 #
Return 1 if the target supports executing __float128
on PowerPC via software
2129 # emulation
, 0 otherwise.
Cache the result.
2131 proc check_ppc_float128_sw_available
{ } {
2132 return [check_cached_effective_target ppc_float128_sw_available
{
2133 # Some simulators are known to not support VSX
/power8
/power9
2134 # instructions.
For now
, disable
on Darwin.
2135 if { [istarget powerpc
-*-eabi
]
2136 ||
[istarget powerpc
*-*-eabispe
]
2137 ||
[istarget
*-*-darwin
*]} {
2140 set options
"-mfloat128 -mvsx"
2141 check_runtime_nocache ppc_float128_sw_available
{
2142 volatile __float128 x
= 1.0q
;
2143 volatile __float128 y
= 2.0q
;
2146 __float128 z
= x
+ y
;
2154 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2155 # hardware instructions
, 0 otherwise.
Cache the result.
2157 proc check_ppc_float128_hw_available
{ } {
2158 return [check_cached_effective_target ppc_float128_hw_available
{
2159 # Some simulators are known to not support VSX
/power8
/power9
2160 # instructions.
For now
, disable
on Darwin.
2161 if { [istarget powerpc
-*-eabi
]
2162 ||
[istarget powerpc
*-*-eabispe
]
2163 ||
[istarget
*-*-darwin
*]} {
2166 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2167 check_runtime_nocache ppc_float128_hw_available
{
2168 volatile __float128 x
= 1.0q
;
2169 volatile __float128 y
= 2.0q
;
2172 __float128 z
= x
+ y
;
2173 __float128 w
= -1.0q
;
2175 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2176 return ((z
!= 3.0q
) ||
(z
!= w
);
2183 #
Return 1 if the target supports executing VSX instructions
, 0
2184 # otherwise.
Cache the result.
2186 proc check_vsx_hw_available
{ } {
2187 return [check_cached_effective_target vsx_hw_available
{
2188 # Some simulators are known to not support VSX instructions.
2189 #
For now
, disable
on Darwin
2190 if { [istarget powerpc
-*-eabi
]
2191 ||
[istarget powerpc
*-*-eabispe
]
2192 ||
[istarget
*-*-darwin
*]} {
2196 check_runtime_nocache vsx_hw_available
{
2200 asm volatile
("xxlor vs0,vs0,vs0");
2202 asm volatile
("xxlor 0,0,0");
2211 #
Return 1 if the target supports executing AltiVec instructions
, 0
2212 # otherwise.
Cache the result.
2214 proc check_vmx_hw_available
{ } {
2215 return [check_cached_effective_target vmx_hw_available
{
2216 # Some simulators are known to not support VMX instructions.
2217 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2220 # Most targets don
't require special flags for this test case, but
2221 # Darwin does. Just to be sure, make sure VSX is not enabled for
2222 # the altivec tests.
2223 if { [istarget *-*-darwin*]
2224 || [istarget *-*-aix*] } {
2225 set options "-maltivec -mno-vsx"
2227 set options "-mno-vsx"
2229 check_runtime_nocache vmx_hw_available {
2233 asm volatile ("vor v0,v0,v0");
2235 asm volatile ("vor 0,0,0");
2244 proc check_ppc_recip_hw_available { } {
2245 return [check_cached_effective_target ppc_recip_hw_available {
2246 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2247 # For now, disable on Darwin
2248 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2251 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2252 check_runtime_nocache ppc_recip_hw_available {
2253 volatile double d_recip, d_rsqrt, d_four = 4.0;
2254 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2257 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2258 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2259 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2260 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2268 # Return 1 if the target supports executing AltiVec and Cell PPU
2269 # instructions, 0 otherwise. Cache the result.
2271 proc check_effective_target_cell_hw { } {
2272 return [check_cached_effective_target cell_hw_available {
2273 # Some simulators are known to not support VMX and PPU instructions.
2274 if { [istarget powerpc-*-eabi*] } {
2277 # Most targets don't require special flags
for this test
2278 # case
, but Darwin and AIX
do.
2279 if { [istarget
*-*-darwin
*]
2280 ||
[istarget
*-*-aix
*] } {
2281 set options
"-maltivec -mcpu=cell"
2283 set options
"-mcpu=cell"
2285 check_runtime_nocache cell_hw_available
{
2289 asm volatile
("vor v0,v0,v0");
2290 asm volatile
("lvlx v0,r0,r0");
2292 asm volatile
("vor 0,0,0");
2293 asm volatile
("lvlx 0,0,0");
2302 #
Return 1 if the target supports executing
64-bit instructions
, 0
2303 # otherwise.
Cache the result.
2305 proc check_effective_target_powerpc64
{ } {
2306 global powerpc64_available_saved
2309 if [info exists powerpc64_available_saved
] {
2310 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2312 set powerpc64_available_saved
0
2314 # Some simulators are known to not support powerpc64 instructions.
2315 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2316 verbose
"check_effective_target_powerpc64 returning 0" 2
2317 return $powerpc64_available_saved
2320 #
Set up
, compile, and
execute a test
program containing a
64-bit
2321 # instruction.
Include the current process ID in the file
2322 # names to prevent conflicts with invocations
for multiple
2327 set f
[open $src
"w"]
2328 puts $f
"int main() {"
2329 puts $f
"#ifdef __MACH__"
2330 puts $f
" asm volatile (\"extsw r0,r0\");"
2332 puts $f
" asm volatile (\"extsw 0,0\");"
2334 puts $f
" return 0; }"
2337 set opts
"additional_flags=-mcpu=G5"
2339 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2340 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2343 if [string match
"" $lines] then {
2344 # No error message
, compilation succeeded.
2345 set result
[$
{tool
}_load
"./$exe" "" ""]
2346 set status [lindex $result
0]
2347 remote_file build
delete $exe
2348 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2350 if { $
status == "pass" } then {
2351 set powerpc64_available_saved
1
2354 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2358 return $powerpc64_available_saved
2361 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2362 # complex float arguments. This affects gfortran tests that
call cabsf
2363 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2364 #
argument passing as the compiler under test
, 1 otherwise.
2366 proc check_effective_target_broken_cplxf_arg
{ } {
2367 # Skip the work
for targets known not to be affected.
2368 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2372 return [check_cached_effective_target broken_cplxf_arg
{
2373 check_runtime_nocache broken_cplxf_arg
{
2374 #
include <complex.h
>
2375 extern void abort
(void
);
2376 float fabsf
(float
);
2377 float cabsf
(_Complex float
);
2384 if (fabsf
(f
- 5.0) > 0.0001)
2385 /* Yes
, it
's broken. */
2387 /* All fine, not broken. */
2394 # Return 1 is this is a TI C6X target supporting C67X instructions
2395 proc check_effective_target_ti_c67x { } {
2396 return [check_no_compiler_messages ti_c67x assembly {
2397 #if !defined(_TMS320C6700)
2398 #error !_TMS320C6700
2403 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2404 proc check_effective_target_ti_c64xp { } {
2405 return [check_no_compiler_messages ti_c64xp assembly {
2406 #if !defined(_TMS320C6400_PLUS)
2407 #error !_TMS320C6400_PLUS
2413 proc check_alpha_max_hw_available { } {
2414 return [check_runtime alpha_max_hw_available {
2415 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2419 # Returns true iff the FUNCTION is available on the target system.
2420 # (This is essentially a Tcl implementation of Autoconf's
2423 proc check_function_available
{ function
} {
2424 return [check_no_compiler_messages $
{function
}_available \
2430 int main
() { $function
(); }
2434 # Returns true iff
"fork" is available on the target system.
2436 proc check_fork_available
{} {
2437 return [check_function_available
"fork"]
2440 # Returns true iff
"mkfifo" is available on the target system.
2442 proc check_mkfifo_available
{} {
2443 if { [istarget
*-*-cygwin
*] } {
2444 # Cygwin has mkfifo
, but support is incomplete.
2448 return [check_function_available
"mkfifo"]
2451 # Returns true iff
"__cxa_atexit" is used on the target system.
2453 proc check_cxa_atexit_available
{ } {
2454 return [check_cached_effective_target cxa_atexit_available
{
2455 if { [istarget hppa
*-*-hpux10
*] } {
2456 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2458 } elseif { [istarget *-*-vxworks] } {
2459 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2462 check_runtime_nocache cxa_atexit_available
{
2465 static unsigned
int count;
2482 Y
() { f
(); count = 2; }
2491 int main
() { return 0; }
2497 proc check_effective_target_objc2
{ } {
2498 return [check_no_compiler_messages objc2 object
{
2507 proc check_effective_target_next_runtime
{ } {
2508 return [check_no_compiler_messages objc2 object
{
2509 #ifdef __NEXT_RUNTIME__
2512 #error
!__NEXT_RUNTIME__
2517 #
Return 1 if we
're generating 32-bit code using default options, 0
2520 proc check_effective_target_ilp32 { } {
2521 return [check_no_compiler_messages ilp32 object {
2522 int dummy[sizeof (int) == 4
2523 && sizeof (void *) == 4
2524 && sizeof (long) == 4 ? 1 : -1];
2528 # Return 1 if we're generating ia32 code using default options
, 0
2531 proc check_effective_target_ia32
{ } {
2532 return [check_no_compiler_messages ia32 object
{
2533 int dummy
[sizeof
(int) == 4
2534 && sizeof
(void
*) == 4
2535 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2539 #
Return 1 if we
're generating x32 code using default options, 0
2542 proc check_effective_target_x32 { } {
2543 return [check_no_compiler_messages x32 object {
2544 int dummy[sizeof (int) == 4
2545 && sizeof (void *) == 4
2546 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2550 # Return 1 if we're generating
32-bit integers using default
2551 # options
, 0 otherwise.
2553 proc check_effective_target_int32
{ } {
2554 return [check_no_compiler_messages int32 object
{
2555 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2559 #
Return 1 if we
're generating 32-bit or larger integers using default
2560 # options, 0 otherwise.
2562 proc check_effective_target_int32plus { } {
2563 return [check_no_compiler_messages int32plus object {
2564 int dummy[sizeof (int) >= 4 ? 1 : -1];
2568 # Return 1 if we're generating
32-bit or larger pointers using default
2569 # options
, 0 otherwise.
2571 proc check_effective_target_ptr32plus
{ } {
2572 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2573 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2574 # cannot really hold a
32-bit address
, so we always
return false here.
2575 if { [istarget msp430
-*-*] } {
2579 return [check_no_compiler_messages ptr32plus object
{
2580 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2584 #
Return 1 if we support
32-bit or larger array and structure sizes
2585 # using default options
, 0 otherwise. Avoid false positive
on
2586 # targets with
20 or
24 bit address spaces.
2588 proc check_effective_target_size32plus
{ } {
2589 return [check_no_compiler_messages size32plus object
{
2590 char dummy
[16777217L];
2594 # Returns
1 if we
're generating 16-bit or smaller integers with the
2595 # default options, 0 otherwise.
2597 proc check_effective_target_int16 { } {
2598 return [check_no_compiler_messages int16 object {
2599 int dummy[sizeof (int) < 4 ? 1 : -1];
2603 # Return 1 if we're generating
64-bit code using default options
, 0
2606 proc check_effective_target_lp64
{ } {
2607 return [check_no_compiler_messages lp64 object
{
2608 int dummy
[sizeof
(int) == 4
2609 && sizeof
(void
*) == 8
2610 && sizeof
(long
) == 8 ?
1 : -1];
2614 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2617 proc check_effective_target_llp64 { } {
2618 return [check_no_compiler_messages llp64 object {
2619 int dummy[sizeof (int) == 4
2620 && sizeof (void *) == 8
2621 && sizeof (long long) == 8
2622 && sizeof (long) == 4 ? 1 : -1];
2626 # Return 1 if long and int have different sizes,
2629 proc check_effective_target_long_neq_int { } {
2630 return [check_no_compiler_messages long_ne_int object {
2631 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2635 # Return 1 if the target supports long double larger than double,
2638 proc check_effective_target_large_long_double { } {
2639 return [check_no_compiler_messages large_long_double object {
2640 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2644 # Return 1 if the target supports double larger than float,
2647 proc check_effective_target_large_double { } {
2648 return [check_no_compiler_messages large_double object {
2649 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2653 # Return 1 if the target supports long double of 128 bits,
2656 proc check_effective_target_longdouble128 { } {
2657 return [check_no_compiler_messages longdouble128 object {
2658 int dummy[sizeof(long double) == 16 ? 1 : -1];
2662 # Return 1 if the target supports double of 64 bits,
2665 proc check_effective_target_double64 { } {
2666 return [check_no_compiler_messages double64 object {
2667 int dummy[sizeof(double) == 8 ? 1 : -1];
2671 # Return 1 if the target supports double of at least 64 bits,
2674 proc check_effective_target_double64plus { } {
2675 return [check_no_compiler_messages double64plus object {
2676 int dummy[sizeof(double) >= 8 ? 1 : -1];
2680 # Return 1 if the target supports 'w
' suffix on floating constant
2683 proc check_effective_target_has_w_floating_suffix { } {
2685 if [check_effective_target_c++] {
2686 append opts "-std=gnu++03"
2688 return [check_no_compiler_messages w_fp_suffix object {
2693 # Return 1 if the target supports 'q
' suffix on floating constant
2696 proc check_effective_target_has_q_floating_suffix { } {
2698 if [check_effective_target_c++] {
2699 append opts "-std=gnu++03"
2701 return [check_no_compiler_messages q_fp_suffix object {
2706 # Return 1 if the target supports the _FloatN / _FloatNx type
2707 # indicated in the function name, 0 otherwise.
2709 proc check_effective_target_float16 {} {
2710 return [check_no_compiler_messages_nocache float16 object {
2712 } [add_options_for_float16 ""]]
2715 proc check_effective_target_float32 {} {
2716 return [check_no_compiler_messages_nocache float32 object {
2718 } [add_options_for_float32 ""]]
2721 proc check_effective_target_float64 {} {
2722 return [check_no_compiler_messages_nocache float64 object {
2724 } [add_options_for_float64 ""]]
2727 proc check_effective_target_float128 {} {
2728 return [check_no_compiler_messages_nocache float128 object {
2730 } [add_options_for_float128 ""]]
2733 proc check_effective_target_float32x {} {
2734 return [check_no_compiler_messages_nocache float32x object {
2736 } [add_options_for_float32x ""]]
2739 proc check_effective_target_float64x {} {
2740 return [check_no_compiler_messages_nocache float64x object {
2742 } [add_options_for_float64x ""]]
2745 proc check_effective_target_float128x {} {
2746 return [check_no_compiler_messages_nocache float128x object {
2748 } [add_options_for_float128x ""]]
2751 # Likewise, but runtime support for any special options used as well
2752 # as compile-time support is required.
2754 proc check_effective_target_float16_runtime {} {
2755 return [check_effective_target_float16]
2758 proc check_effective_target_float32_runtime {} {
2759 return [check_effective_target_float32]
2762 proc check_effective_target_float64_runtime {} {
2763 return [check_effective_target_float64]
2766 proc check_effective_target_float128_runtime {} {
2767 if { ![check_effective_target_float128] } {
2770 if { [istarget powerpc*-*-*] } {
2771 return [check_effective_target_base_quadfloat_support]
2776 proc check_effective_target_float32x_runtime {} {
2777 return [check_effective_target_float32x]
2780 proc check_effective_target_float64x_runtime {} {
2781 if { ![check_effective_target_float64x] } {
2784 if { [istarget powerpc*-*-*] } {
2785 return [check_effective_target_base_quadfloat_support]
2790 proc check_effective_target_float128x_runtime {} {
2791 return [check_effective_target_float128x]
2794 # Return 1 if the target hardware supports any options added for
2795 # _FloatN and _FloatNx types, 0 otherwise.
2797 proc check_effective_target_floatn_nx_runtime {} {
2798 if { [istarget powerpc*-*-aix*] } {
2801 if { [istarget powerpc*-*-*] } {
2802 return [check_effective_target_base_quadfloat_support]
2807 # Add options needed to use the _FloatN / _FloatNx type indicated in
2808 # the function name.
2810 proc add_options_for_float16 { flags } {
2811 if { [istarget arm*-*-*] } {
2812 return "$flags -mfp16-format=ieee"
2817 proc add_options_for_float32 { flags } {
2821 proc add_options_for_float64 { flags } {
2825 proc add_options_for_float128 { flags } {
2826 return [add_options_for___float128 "$flags"]
2829 proc add_options_for_float32x { flags } {
2833 proc add_options_for_float64x { flags } {
2834 return [add_options_for___float128 "$flags"]
2837 proc add_options_for_float128x { flags } {
2841 # Return 1 if the target supports __float128,
2844 proc check_effective_target___float128 { } {
2845 if { [istarget powerpc*-*-*] } {
2846 return [check_ppc_float128_sw_available]
2848 if { [istarget ia64-*-*]
2849 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2855 proc add_options_for___float128 { flags } {
2856 if { [istarget powerpc*-*-*] } {
2857 return "$flags -mfloat128 -mvsx"
2862 # Return 1 if the target supports any special run-time requirements
2863 # for __float128 or _Float128,
2866 proc check_effective_target_base_quadfloat_support { } {
2867 if { [istarget powerpc*-*-*] } {
2868 return [check_vsx_hw_available]
2873 # Return 1 if the target supports compiling fixed-point,
2876 proc check_effective_target_fixed_point { } {
2877 return [check_no_compiler_messages fixed_point object {
2878 _Sat _Fract x; _Sat _Accum y;
2882 # Return 1 if the target supports compiling decimal floating point,
2885 proc check_effective_target_dfp_nocache { } {
2886 verbose "check_effective_target_dfp_nocache: compiling source" 2
2887 set ret [check_no_compiler_messages_nocache dfp object {
2888 float x __attribute__((mode(DD)));
2890 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2894 proc check_effective_target_dfprt_nocache { } {
2895 return [check_runtime_nocache dfprt {
2896 typedef float d64 __attribute__((mode(DD)));
2897 d64 x = 1.2df, y = 2.3dd, z;
2898 int main () { z = x + y; return 0; }
2902 # Return 1 if the target supports compiling Decimal Floating Point,
2905 # This won't change
for different subtargets so
cache the result.
2907 proc check_effective_target_dfp
{ } {
2908 return [check_cached_effective_target dfp
{
2909 check_effective_target_dfp_nocache
2913 #
Return 1 if the target supports linking and executing Decimal Floating
2914 # Point
, 0 otherwise.
2916 # This won
't change for different subtargets so cache the result.
2918 proc check_effective_target_dfprt { } {
2919 return [check_cached_effective_target dfprt {
2920 check_effective_target_dfprt_nocache
2924 proc check_effective_target_powerpc_popcntb_ok { } {
2925 return [check_cached_effective_target powerpc_popcntb_ok {
2927 # Disable on Darwin.
2928 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2931 check_runtime_nocache powerpc_popcntb_ok {
2933 volatile int a = 0x12345678;
2936 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2944 # Return 1 if the target supports executing DFP hardware instructions,
2945 # 0 otherwise. Cache the result.
2947 proc check_dfp_hw_available { } {
2948 return [check_cached_effective_target dfp_hw_available {
2949 # For now, disable on Darwin
2950 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2953 check_runtime_nocache dfp_hw_available {
2954 volatile _Decimal64 r;
2955 volatile _Decimal64 a = 4.0DD;
2956 volatile _Decimal64 b = 2.0DD;
2959 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2960 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2961 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2962 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2965 } "-mcpu=power6 -mhard-float"
2970 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2972 proc check_effective_target_ucn_nocache { } {
2973 # -std=c99 is only valid for C
2974 if [check_effective_target_c] {
2975 set ucnopts "-std=c99"
2979 verbose "check_effective_target_ucn_nocache: compiling source" 2
2980 set ret [check_no_compiler_messages_nocache ucn object {
2983 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2987 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2989 # This won't change
for different subtargets
, so
cache the result.
2991 proc check_effective_target_ucn
{ } {
2992 return [check_cached_effective_target ucn
{
2993 check_effective_target_ucn_nocache
2997 #
Return 1 if the target needs a command line
argument to enable a SIMD
3000 proc check_effective_target_vect_cmdline_needed
{ } {
3001 global et_vect_cmdline_needed_saved
3002 global et_vect_cmdline_needed_target_name
3004 if { ![info exists et_vect_cmdline_needed_target_name
] } {
3005 set et_vect_cmdline_needed_target_name
""
3008 #
If the target has changed since we
set the cached value
, clear it.
3009 set current_target
[current_target_name
]
3010 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
3011 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3012 set et_vect_cmdline_needed_target_name $current_target
3013 if { [info exists et_vect_cmdline_needed_saved
] } {
3014 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
3015 unset et_vect_cmdline_needed_saved
3019 if [info exists et_vect_cmdline_needed_saved
] {
3020 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
3022 set et_vect_cmdline_needed_saved
1
3023 if { [istarget alpha
*-*-*]
3024 ||
[istarget ia64
-*-*]
3025 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3026 && ![is
-effective
-target ia32
])
3027 ||
([istarget powerpc
*-*-*]
3028 && ([check_effective_target_powerpc_spe
]
3029 ||
[check_effective_target_powerpc_altivec
]))
3030 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
3031 ||
[istarget spu
-*-*]
3032 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
3033 ||
[istarget aarch64
*-*-*] } {
3034 set et_vect_cmdline_needed_saved
0
3038 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3039 return $et_vect_cmdline_needed_saved
3042 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
3044 # This won
't change for different subtargets so cache the result.
3046 proc check_effective_target_vect_int { } {
3047 global et_vect_int_saved
3050 if [info exists et_vect_int_saved($et_index)] {
3051 verbose "check_effective_target_vect_int: using cached result" 2
3053 set et_vect_int_saved($et_index) 0
3054 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3055 || ([istarget powerpc*-*-*]
3056 && ![istarget powerpc-*-linux*paired*])
3057 || [istarget spu-*-*]
3058 || [istarget sparc*-*-*]
3059 || [istarget alpha*-*-*]
3060 || [istarget ia64-*-*]
3061 || [istarget aarch64*-*-*]
3062 || [is-effective-target arm_neon]
3063 || ([istarget mips*-*-*]
3064 && ([et-is-effective-target mips_loongson]
3065 || [et-is-effective-target mips_msa])) } {
3066 set et_vect_int_saved($et_index) 1
3070 verbose "check_effective_target_vect_int:\
3071 returning $et_vect_int_saved($et_index)" 2
3072 return $et_vect_int_saved($et_index)
3075 # Return 1 if the target supports signed int->float conversion
3078 proc check_effective_target_vect_intfloat_cvt { } {
3079 global et_vect_intfloat_cvt_saved
3082 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3083 verbose "check_effective_target_vect_intfloat_cvt:\
3084 using cached result" 2
3086 set et_vect_intfloat_cvt_saved($et_index) 0
3087 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3088 || ([istarget powerpc*-*-*]
3089 && ![istarget powerpc-*-linux*paired*])
3090 || [is-effective-target arm_neon]
3091 || ([istarget mips*-*-*]
3092 && [et-is-effective-target mips_msa]) } {
3093 set et_vect_intfloat_cvt_saved($et_index) 1
3097 verbose "check_effective_target_vect_intfloat_cvt:\
3098 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3099 return $et_vect_intfloat_cvt_saved($et_index)
3102 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3104 proc check_effective_target_int128
{ } {
3105 return [check_no_compiler_messages int128 object
{
3107 #ifndef __SIZEOF_INT128__
3116 #
Return 1 if the target supports unsigned
int->float conversion
3119 proc check_effective_target_vect_uintfloat_cvt
{ } {
3120 global et_vect_uintfloat_cvt_saved
3123 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
3124 verbose
"check_effective_target_vect_uintfloat_cvt:\
3125 using cached result
" 2
3127 set et_vect_uintfloat_cvt_saved
($et_index
) 0
3128 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3129 ||
([istarget powerpc
*-*-*]
3130 && ![istarget powerpc
-*-linux
*paired
*])
3131 ||
[istarget aarch64
*-*-*]
3132 ||
[is
-effective
-target arm_neon
]
3133 ||
([istarget mips
*-*-*]
3134 && [et
-is
-effective
-target mips_msa
]) } {
3135 set et_vect_uintfloat_cvt_saved
($et_index
) 1
3139 verbose
"check_effective_target_vect_uintfloat_cvt:\
3140 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
3141 return $et_vect_uintfloat_cvt_saved
($et_index
)
3145 #
Return 1 if the target supports signed float
->int conversion
3148 proc check_effective_target_vect_floatint_cvt
{ } {
3149 global et_vect_floatint_cvt_saved
3152 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3153 verbose
"check_effective_target_vect_floatint_cvt:\
3154 using cached result
" 2
3156 set et_vect_floatint_cvt_saved
($et_index
) 0
3157 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3158 ||
([istarget powerpc
*-*-*]
3159 && ![istarget powerpc
-*-linux
*paired
*])
3160 ||
[is
-effective
-target arm_neon
]
3161 ||
([istarget mips
*-*-*]
3162 && [et
-is
-effective
-target mips_msa
]) } {
3163 set et_vect_floatint_cvt_saved
($et_index
) 1
3167 verbose
"check_effective_target_vect_floatint_cvt:\
3168 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3169 return $et_vect_floatint_cvt_saved
($et_index
)
3172 #
Return 1 if the target supports unsigned float
->int conversion
3175 proc check_effective_target_vect_floatuint_cvt
{ } {
3176 global et_vect_floatuint_cvt_saved
3179 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3180 verbose
"check_effective_target_vect_floatuint_cvt:\
3181 using cached result
" 2
3183 set et_vect_floatuint_cvt_saved
($et_index
) 0
3184 if { ([istarget powerpc
*-*-*]
3185 && ![istarget powerpc
-*-linux
*paired
*])
3186 ||
[is
-effective
-target arm_neon
]
3187 ||
([istarget mips
*-*-*]
3188 && [et
-is
-effective
-target mips_msa
]) } {
3189 set et_vect_floatuint_cvt_saved
($et_index
) 1
3193 verbose
"check_effective_target_vect_floatuint_cvt:\
3194 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3195 return $et_vect_floatuint_cvt_saved
($et_index
)
3198 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3200 # This won
't change for different subtargets so cache the result.
3202 proc check_effective_target_vect_simd_clones { } {
3203 global et_vect_simd_clones_saved
3206 if [info exists et_vect_simd_clones_saved($et_index)] {
3207 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3209 set et_vect_simd_clones_saved($et_index) 0
3210 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3211 # avx2 and avx512f clone. Only the right clone for the
3212 # specified arch will be chosen, but still we need to at least
3213 # be able to assemble avx512f.
3214 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3215 && [check_effective_target_avx512f]) } {
3216 set et_vect_simd_clones_saved($et_index) 1
3220 verbose "check_effective_target_vect_simd_clones:\
3221 returning $et_vect_simd_clones_saved($et_index)" 2
3222 return $et_vect_simd_clones_saved($et_index)
3225 # Return 1 if this is a AArch64 target supporting big endian
3226 proc check_effective_target_aarch64_big_endian { } {
3227 return [check_no_compiler_messages aarch64_big_endian assembly {
3228 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3229 #error !__aarch64__ || !__AARCH64EB__
3234 # Return 1 if this is a AArch64 target supporting little endian
3235 proc check_effective_target_aarch64_little_endian { } {
3236 if { ![istarget aarch64*-*-*] } {
3240 return [check_no_compiler_messages aarch64_little_endian assembly {
3241 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3247 # Return 1 if this is a compiler supporting ARC atomic operations
3248 proc check_effective_target_arc_atomic { } {
3249 return [check_no_compiler_messages arc_atomic assembly {
3250 #if !defined(__ARC_ATOMIC__)
3256 # Return 1 if this is an arm target using 32-bit instructions
3257 proc check_effective_target_arm32 { } {
3258 if { ![istarget arm*-*-*] } {
3262 return [check_no_compiler_messages arm32 assembly {
3263 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3264 #error !__arm || __thumb__ && !__thumb2__
3269 # Return 1 if this is an arm target not using Thumb
3270 proc check_effective_target_arm_nothumb { } {
3271 if { ![istarget arm*-*-*] } {
3275 return [check_no_compiler_messages arm_nothumb assembly {
3276 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3277 #error !__arm__ || __thumb || __thumb2__
3282 # Return 1 if this is a little-endian ARM target
3283 proc check_effective_target_arm_little_endian { } {
3284 if { ![istarget arm*-*-*] } {
3288 return [check_no_compiler_messages arm_little_endian assembly {
3289 #if !defined(__arm__) || !defined(__ARMEL__)
3290 #error !__arm__ || !__ARMEL__
3295 # Return 1 if this is an ARM target that only supports aligned vector accesses
3296 proc check_effective_target_arm_vect_no_misalign { } {
3297 if { ![istarget arm*-*-*] } {
3301 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3302 #if !defined(__arm__) \
3303 || (defined(__ARM_FEATURE_UNALIGNED) \
3304 && defined(__ARMEL__))
3305 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3311 # Return 1 if this is an ARM target supporting -mfpu=vfp
3312 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3315 proc check_effective_target_arm_vfp_ok { } {
3316 if { [check_effective_target_arm32] } {
3317 return [check_no_compiler_messages arm_vfp_ok object {
3319 } "-mfpu=vfp -mfloat-abi=softfp"]
3325 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3326 # -mfloat-abi=softfp.
3328 proc check_effective_target_arm_vfp3_ok { } {
3329 if { [check_effective_target_arm32] } {
3330 return [check_no_compiler_messages arm_vfp3_ok object {
3332 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3338 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3339 # -mfloat-abi=softfp.
3340 proc check_effective_target_arm_v8_vfp_ok {} {
3341 if { [check_effective_target_arm32] } {
3342 return [check_no_compiler_messages arm_v8_vfp_ok object {
3345 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3348 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3354 # Return 1 if this is an ARM target supporting -mfpu=vfp
3355 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3358 proc check_effective_target_arm_hard_vfp_ok { } {
3359 if { [check_effective_target_arm32]
3360 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3361 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3362 int main() { return 0;}
3363 } "-mfpu=vfp -mfloat-abi=hard"]
3369 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3370 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3371 # incompatible with these options. Also set et_arm_fp_flags to the
3372 # best options to add.
3374 proc check_effective_target_arm_fp_ok_nocache { } {
3375 global et_arm_fp_flags
3376 set et_arm_fp_flags ""
3377 if { [check_effective_target_arm32] } {
3378 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3379 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3381 #error __ARM_FP not defined
3384 set et_arm_fp_flags $flags
3393 proc check_effective_target_arm_fp_ok { } {
3394 return [check_cached_effective_target arm_fp_ok \
3395 check_effective_target_arm_fp_ok_nocache]
3398 # Add the options needed to define __ARM_FP. We need either
3399 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3400 # specified by the multilib, use it.
3402 proc add_options_for_arm_fp { flags } {
3403 if { ! [check_effective_target_arm_fp_ok] } {
3406 global et_arm_fp_flags
3407 return "$flags $et_arm_fp_flags"
3410 # Return 1 if this is an ARM target that supports DSP multiply with
3411 # current multilib flags.
3413 proc check_effective_target_arm_dsp { } {
3414 return [check_no_compiler_messages arm_dsp assembly {
3415 #ifndef __ARM_FEATURE_DSP
3422 # Return 1 if this is an ARM target that supports unaligned word/halfword
3423 # load/store instructions.
3425 proc check_effective_target_arm_unaligned { } {
3426 return [check_no_compiler_messages arm_unaligned assembly {
3427 #ifndef __ARM_FEATURE_UNALIGNED
3428 #error no unaligned support
3434 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3435 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3436 # incompatible with these options. Also set et_arm_crypto_flags to the
3437 # best options to add.
3439 proc check_effective_target_arm_crypto_ok_nocache { } {
3440 global et_arm_crypto_flags
3441 set et_arm_crypto_flags ""
3442 if { [check_effective_target_arm_v8_neon_ok] } {
3443 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3444 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3445 #include "arm_neon.h"
3447 foo (uint8x16_t a, uint8x16_t b)
3449 return vaeseq_u8 (a, b);
3452 set et_arm_crypto_flags $flags
3461 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3463 proc check_effective_target_arm_crypto_ok { } {
3464 return [check_cached_effective_target arm_crypto_ok \
3465 check_effective_target_arm_crypto_ok_nocache]
3468 # Add options for crypto extensions.
3469 proc add_options_for_arm_crypto { flags } {
3470 if { ! [check_effective_target_arm_crypto_ok] } {
3473 global et_arm_crypto_flags
3474 return "$flags $et_arm_crypto_flags"
3477 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3478 # or -mfloat-abi=hard, but if one is already specified by the
3479 # multilib, use it. Similarly, if a -mfpu option already enables
3480 # NEON, do not add -mfpu=neon.
3482 proc add_options_for_arm_neon { flags } {
3483 if { ! [check_effective_target_arm_neon_ok] } {
3486 global et_arm_neon_flags
3487 return "$flags $et_arm_neon_flags"
3490 proc add_options_for_arm_v8_vfp { flags } {
3491 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3494 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3497 proc add_options_for_arm_v8_neon { flags } {
3498 if { ! [check_effective_target_arm_v8_neon_ok] } {
3501 global et_arm_v8_neon_flags
3502 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3505 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3506 # options for AArch64 and for ARM.
3508 proc add_options_for_arm_v8_1a_neon { flags } {
3509 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3512 global et_arm_v8_1a_neon_flags
3513 return "$flags $et_arm_v8_1a_neon_flags"
3516 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3517 # Also adds the ARMv8 FP options for ARM and for AArch64.
3519 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3520 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3523 global et_arm_v8_2a_fp16_scalar_flags
3524 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3527 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3528 # the ARMv8 NEON options for ARM and for AArch64.
3530 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3531 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3534 global et_arm_v8_2a_fp16_neon_flags
3535 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3538 proc add_options_for_arm_crc { flags } {
3539 if { ! [check_effective_target_arm_crc_ok] } {
3542 global et_arm_crc_flags
3543 return "$flags $et_arm_crc_flags"
3546 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3547 # or -mfloat-abi=hard, but if one is already specified by the
3548 # multilib, use it. Similarly, if a -mfpu option already enables
3549 # NEON, do not add -mfpu=neon.
3551 proc add_options_for_arm_neonv2 { flags } {
3552 if { ! [check_effective_target_arm_neonv2_ok] } {
3555 global et_arm_neonv2_flags
3556 return "$flags $et_arm_neonv2_flags"
3559 # Add the options needed for vfp3.
3560 proc add_options_for_arm_vfp3 { flags } {
3561 if { ! [check_effective_target_arm_vfp3_ok] } {
3564 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3567 # Return 1 if this is an ARM target supporting -mfpu=neon
3568 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3569 # incompatible with these options. Also set et_arm_neon_flags to the
3570 # best options to add.
3572 proc check_effective_target_arm_neon_ok_nocache { } {
3573 global et_arm_neon_flags
3574 set et_arm_neon_flags ""
3575 if { [check_effective_target_arm32] } {
3576 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3577 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3578 #include <arm_neon.h>
3580 #ifndef __ARM_NEON__
3583 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3584 configured for -mcpu=arm926ej-s, for example. */
3585 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3586 #error Architecture does not support NEON.
3589 set et_arm_neon_flags $flags
3598 proc check_effective_target_arm_neon_ok { } {
3599 return [check_cached_effective_target arm_neon_ok \
3600 check_effective_target_arm_neon_ok_nocache]
3603 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3604 # -mfloat-abi= option. Useful in tests where add_options is not
3605 # supported (such as lto tests).
3607 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3608 if { [check_effective_target_arm32] } {
3609 foreach flags {"-mfpu=neon"} {
3610 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3611 #include <arm_neon.h>
3613 #ifndef __ARM_NEON__
3616 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3617 configured for -mcpu=arm926ej-s, for example. */
3618 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3619 #error Architecture does not support NEON.
3630 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3631 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3632 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3635 proc check_effective_target_arm_crc_ok_nocache { } {
3636 global et_arm_crc_flags
3637 set et_arm_crc_flags "-march=armv8-a+crc"
3638 return [check_no_compiler_messages_nocache arm_crc_ok object {
3639 #if !defined (__ARM_FEATURE_CRC32)
3642 } "$et_arm_crc_flags"]
3645 proc check_effective_target_arm_crc_ok { } {
3646 return [check_cached_effective_target arm_crc_ok \
3647 check_effective_target_arm_crc_ok_nocache]
3650 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3651 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3652 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3653 # the best options to add.
3655 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3656 global et_arm_neon_fp16_flags
3657 global et_arm_neon_flags
3658 set et_arm_neon_fp16_flags ""
3659 if { [check_effective_target_arm32]
3660 && [check_effective_target_arm_neon_ok] } {
3661 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3662 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3663 "-mfp16-format=ieee"
3664 "-mfloat-abi=softfp -mfp16-format=ieee"
3665 "-mfpu=neon-fp16 -mfp16-format=ieee"
3666 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3667 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3668 #include "arm_neon.h"
3670 foo (float32x4_t arg)
3672 return vcvt_f16_f32 (arg);
3674 } "$et_arm_neon_flags $flags"] } {
3675 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3684 proc check_effective_target_arm_neon_fp16_ok { } {
3685 return [check_cached_effective_target arm_neon_fp16_ok \
3686 check_effective_target_arm_neon_fp16_ok_nocache]
3689 proc check_effective_target_arm_neon_fp16_hw { } {
3690 if {! [check_effective_target_arm_neon_fp16_ok] } {
3693 global et_arm_neon_fp16_flags
3694 check_runtime_nocache arm_neon_fp16_hw {
3696 main (int argc, char **argv)
3698 asm ("vcvt.f32.f16 q1, d0");
3701 } $et_arm_neon_fp16_flags
3704 proc add_options_for_arm_neon_fp16 { flags } {
3705 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3708 global et_arm_neon_fp16_flags
3709 return "$flags $et_arm_neon_fp16_flags"
3712 # Return 1 if this is an ARM target supporting the FP16 alternative
3713 # format. Some multilibs may be incompatible with the options needed. Also
3714 # set et_arm_neon_fp16_flags to the best options to add.
3716 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3717 global et_arm_neon_fp16_flags
3718 set et_arm_neon_fp16_flags ""
3719 if { [check_effective_target_arm32] } {
3720 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3721 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3722 if { [check_no_compiler_messages_nocache \
3723 arm_fp16_alternative_ok object {
3724 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3725 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3727 } "$flags -mfp16-format=alternative"] } {
3728 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3737 proc check_effective_target_arm_fp16_alternative_ok { } {
3738 return [check_cached_effective_target arm_fp16_alternative_ok \
3739 check_effective_target_arm_fp16_alternative_ok_nocache]
3742 # Return 1 if this is an ARM target supports specifying the FP16 none
3743 # format. Some multilibs may be incompatible with the options needed.
3745 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3746 if { [check_effective_target_arm32] } {
3747 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3748 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3749 if { [check_no_compiler_messages_nocache \
3750 arm_fp16_none_ok object {
3751 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3752 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3754 #if defined (__ARM_FP16_FORMAT_IEEE)
3755 #error __ARM_FP16_FORMAT_IEEE defined
3757 } "$flags -mfp16-format=none"] } {
3766 proc check_effective_target_arm_fp16_none_ok { } {
3767 return [check_cached_effective_target arm_fp16_none_ok \
3768 check_effective_target_arm_fp16_none_ok_nocache]
3771 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3772 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3773 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3774 # best options to add.
3776 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3777 global et_arm_v8_neon_flags
3778 set et_arm_v8_neon_flags ""
3779 if { [check_effective_target_arm32] } {
3780 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3781 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3783 #error not armv8 or later
3785 #include "arm_neon.h"
3789 __asm__ volatile ("vrintn.f32 q0, q0");
3791 } "$flags -march=armv8-a"] } {
3792 set et_arm_v8_neon_flags $flags
3801 proc check_effective_target_arm_v8_neon_ok { } {
3802 return [check_cached_effective_target arm_v8_neon_ok \
3803 check_effective_target_arm_v8_neon_ok_nocache]
3806 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3807 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3808 # incompatible with these options. Also set et_arm_neonv2_flags to the
3809 # best options to add.
3811 proc check_effective_target_arm_neonv2_ok_nocache { } {
3812 global et_arm_neonv2_flags
3813 global et_arm_neon_flags
3814 set et_arm_neonv2_flags ""
3815 if { [check_effective_target_arm32]
3816 && [check_effective_target_arm_neon_ok] } {
3817 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3818 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3819 #include "arm_neon.h"
3821 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3823 return vfma_f32 (a, b, c);
3825 } "$et_arm_neon_flags $flags"] } {
3826 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3835 proc check_effective_target_arm_neonv2_ok { } {
3836 return [check_cached_effective_target arm_neonv2_ok \
3837 check_effective_target_arm_neonv2_ok_nocache]
3840 # Add the options needed for VFP FP16 support. We need either
3841 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3842 # the multilib, use it.
3844 proc add_options_for_arm_fp16 { flags } {
3845 if { ! [check_effective_target_arm_fp16_ok] } {
3848 global et_arm_fp16_flags
3849 return "$flags $et_arm_fp16_flags"
3852 # Add the options needed to enable support for IEEE format
3853 # half-precision support. This is valid for ARM targets.
3855 proc add_options_for_arm_fp16_ieee { flags } {
3856 if { ! [check_effective_target_arm_fp16_ok] } {
3859 global et_arm_fp16_flags
3860 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3863 # Add the options needed to enable support for ARM Alternative format
3864 # half-precision support. This is valid for ARM targets.
3866 proc add_options_for_arm_fp16_alternative { flags } {
3867 if { ! [check_effective_target_arm_fp16_ok] } {
3870 global et_arm_fp16_flags
3871 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3874 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3875 # Skip multilibs that are incompatible with these options and set
3876 # et_arm_fp16_flags to the best options to add. This test is valid for
3879 proc check_effective_target_arm_fp16_ok_nocache { } {
3880 global et_arm_fp16_flags
3881 set et_arm_fp16_flags ""
3882 if { ! [check_effective_target_arm32] } {
3886 [list "" { *-*-* } { "-mfpu=*" } \
3887 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3888 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3889 # Multilib flags would override -mfpu.
3892 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3893 # Must generate floating-point instructions.
3896 if [check_effective_target_arm_hf_eabi] {
3897 # Use existing float-abi and force an fpu which supports fp16
3898 set et_arm_fp16_flags "-mfpu=vfpv4"
3901 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3902 # The existing -mfpu value is OK; use it, but add softfp.
3903 set et_arm_fp16_flags "-mfloat-abi=softfp"
3906 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3907 # macro to check for this support.
3908 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3909 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3912 set et_arm_fp16_flags "$flags"
3919 proc check_effective_target_arm_fp16_ok { } {
3920 return [check_cached_effective_target arm_fp16_ok \
3921 check_effective_target_arm_fp16_ok_nocache]
3924 # Return 1 if the target supports executing VFP FP16 instructions, 0
3925 # otherwise. This test is valid for ARM only.
3927 proc check_effective_target_arm_fp16_hw { } {
3928 if {! [check_effective_target_arm_fp16_ok] } {
3931 global et_arm_fp16_flags
3932 check_runtime_nocache arm_fp16_hw {
3934 main (int argc, char **argv)
3938 asm ("vcvtb.f32.f16 %0, %1"
3939 : "=w" (r) : "w" (a)
3940 : /* No clobbers. */);
3941 return (r == 1.0) ? 0 : 1;
3943 } "$et_arm_fp16_flags -mfp16-format=ieee"
3946 # Creates a series of routines that return 1 if the given architecture
3947 # can be selected and a routine to give the flags to select that architecture
3948 # Note: Extra flags may be added to disable options from newer compilers
3949 # (Thumb in particular - but others may be added in the future).
3950 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
3951 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
3952 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
3953 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3954 # /* { dg-add-options arm_arch_v5 } */
3955 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3956 foreach { armfunc armflag armdefs } {
3957 v4 "-march=armv4 -marm" __ARM_ARCH_4__
3958 v4t "-march=armv4t" __ARM_ARCH_4T__
3959 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3960 v5t "-march=armv5t" __ARM_ARCH_5T__
3961 v5te "-march=armv5te" __ARM_ARCH_5TE__
3962 v6 "-march=armv6" __ARM_ARCH_6__
3963 v6k "-march=armv6k" __ARM_ARCH_6K__
3964 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3965 v6z "-march=armv6z" __ARM_ARCH_6Z__
3966 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
3967 v7a "-march=armv7-a" __ARM_ARCH_7A__
3968 v7r "-march=armv7-r" __ARM_ARCH_7R__
3969 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3970 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3971 v7ve "-march=armv7ve -marm"
3972 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
3973 v8a "-march=armv8-a" __ARM_ARCH_8A__
3974 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3975 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3976 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
3977 __ARM_ARCH_8M_BASE__
3978 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
3979 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
3980 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
3981 proc check_effective_target_arm_arch_FUNC_ok { } {
3982 if { [ string match "*-marm*" "FLAG" ] &&
3983 ![check_effective_target_arm_arm_ok] } {
3986 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3993 proc add_options_for_arm_arch_FUNC { flags } {
3994 return "$flags FLAG"
3997 proc check_effective_target_arm_arch_FUNC_multilib { } {
3998 return [check_runtime arm_arch_FUNC_multilib {
4004 } [add_options_for_arm_arch_FUNC ""]]
4009 # Return 1 if GCC was configured with --with-mode=
4010 proc check_effective_target_default_mode { } {
4012 return [check_configured_with "with-mode="]
4015 # Return 1 if this is an ARM target where -marm causes ARM to be
4018 proc check_effective_target_arm_arm_ok { } {
4019 return [check_no_compiler_messages arm_arm_ok assembly {
4020 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4021 #error !__arm__ || __thumb__ || __thumb2__
4027 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4030 proc check_effective_target_arm_thumb1_ok { } {
4031 return [check_no_compiler_messages arm_thumb1_ok assembly {
4032 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4033 #error !__arm__ || !__thumb__ || __thumb2__
4035 int foo (int i) { return i; }
4039 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4042 proc check_effective_target_arm_thumb2_ok { } {
4043 return [check_no_compiler_messages arm_thumb2_ok assembly {
4044 #if !defined(__thumb2__)
4047 int foo (int i) { return i; }
4051 # Return 1 if this is an ARM target where Thumb-1 is used without options
4052 # added by the test.
4054 proc check_effective_target_arm_thumb1 { } {
4055 return [check_no_compiler_messages arm_thumb1 assembly {
4056 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4057 #error !__arm__ || !__thumb__ || __thumb2__
4063 # Return 1 if this is an ARM target where Thumb-2 is used without options
4064 # added by the test.
4066 proc check_effective_target_arm_thumb2 { } {
4067 return [check_no_compiler_messages arm_thumb2 assembly {
4068 #if !defined(__thumb2__)
4075 # Return 1 if this is an ARM target where conditional execution is available.
4077 proc check_effective_target_arm_cond_exec { } {
4078 return [check_no_compiler_messages arm_cond_exec assembly {
4079 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4086 # Return 1 if this is an ARM cortex-M profile cpu
4088 proc check_effective_target_arm_cortex_m { } {
4089 if { ![istarget arm*-*-*] } {
4092 return [check_no_compiler_messages arm_cortex_m assembly {
4093 #if defined(__ARM_ARCH_ISA_ARM)
4094 #error __ARM_ARCH_ISA_ARM is defined
4100 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4101 # used and MOVT/MOVW instructions to be available.
4103 proc check_effective_target_arm_thumb1_movt_ok {} {
4104 if [check_effective_target_arm_thumb1_ok] {
4105 return [check_no_compiler_messages arm_movt object {
4109 asm ("movt r0, #42");
4117 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4118 # used and CBZ and CBNZ instructions are available.
4120 proc check_effective_target_arm_thumb1_cbz_ok {} {
4121 if [check_effective_target_arm_thumb1_ok] {
4122 return [check_no_compiler_messages arm_movt object {
4126 asm ("cbz r0, 2f\n2:");
4134 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4137 proc check_effective_target_arm_cmse_ok {} {
4138 return [check_no_compiler_messages arm_cmse object {
4147 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4149 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4150 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4151 int foo (void) { return 0; }
4152 } "-O2 -mprint-tune-info" ]
4155 # Return 1 if the target supports executing NEON instructions, 0
4156 # otherwise. Cache the result.
4158 proc check_effective_target_arm_neon_hw { } {
4159 return [check_runtime arm_neon_hw_available {
4163 long long a = 0, b = 1;
4164 asm ("vorr %P0, %P1, %P2"
4166 : "0" (a), "w" (b));
4169 } [add_options_for_arm_neon ""]]
4172 proc check_effective_target_arm_neonv2_hw { } {
4173 return [check_runtime arm_neon_hwv2_available {
4174 #include "arm_neon.h"
4178 float32x2_t a, b, c;
4179 asm ("vfma.f32 %P0, %P1, %P2"
4181 : "w" (b), "w" (c));
4184 } [add_options_for_arm_neonv2 ""]]
4187 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4188 # otherwise. The test is valid for AArch64 and ARM. Record the command
4189 # line options needed.
4191 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4192 global et_arm_v8_1a_neon_flags
4193 set et_arm_v8_1a_neon_flags ""
4195 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4199 # Iterate through sets of options to find the compiler flags that
4200 # need to be added to the -march option. Start with the empty set
4201 # since AArch64 only needs the -march setting.
4202 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4203 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4204 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4205 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4206 #if !defined (__ARM_FEATURE_QRDMX)
4207 #error "__ARM_FEATURE_QRDMX not defined"
4209 } "$flags $arches"] } {
4210 set et_arm_v8_1a_neon_flags "$flags $arches"
4219 proc check_effective_target_arm_v8_1a_neon_ok { } {
4220 return [check_cached_effective_target arm_v8_1a_neon_ok \
4221 check_effective_target_arm_v8_1a_neon_ok_nocache]
4224 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4225 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4226 # Record the command line options needed.
4228 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4229 global et_arm_v8_2a_fp16_scalar_flags
4230 set et_arm_v8_2a_fp16_scalar_flags ""
4232 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4236 # Iterate through sets of options to find the compiler flags that
4237 # need to be added to the -march option.
4238 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4239 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4240 if { [check_no_compiler_messages_nocache \
4241 arm_v8_2a_fp16_scalar_ok object {
4242 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4243 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4245 } "$flags -march=armv8.2-a+fp16"] } {
4246 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4254 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4255 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4256 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4259 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4260 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4261 # Record the command line options needed.
4263 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4264 global et_arm_v8_2a_fp16_neon_flags
4265 set et_arm_v8_2a_fp16_neon_flags ""
4267 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4271 # Iterate through sets of options to find the compiler flags that
4272 # need to be added to the -march option.
4273 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4274 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4275 if { [check_no_compiler_messages_nocache \
4276 arm_v8_2a_fp16_neon_ok object {
4277 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4278 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4280 } "$flags -march=armv8.2-a+fp16"] } {
4281 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4289 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4290 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4291 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4294 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4297 proc check_effective_target_arm_v8_neon_hw { } {
4298 return [check_runtime arm_v8_neon_hw_available {
4299 #include "arm_neon.h"
4303 float32x2_t a = { 1.0f, 2.0f };
4304 #ifdef __ARM_ARCH_ISA_A64
4305 asm ("frinta %0.2s, %1.2s"
4309 asm ("vrinta.f32 %P0, %P1"
4313 return a[0] == 2.0f;
4315 } [add_options_for_arm_v8_neon ""]]
4318 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4319 # otherwise. The test is valid for AArch64 and ARM.
4321 proc check_effective_target_arm_v8_1a_neon_hw { } {
4322 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4325 return [check_runtime arm_v8_1a_neon_hw_available {
4329 #ifdef __ARM_ARCH_ISA_A64
4330 __Int32x2_t a = {0, 1};
4331 __Int32x2_t b = {0, 2};
4334 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4337 : /* No clobbers. */);
4341 __simd64_int32_t a = {0, 1};
4342 __simd64_int32_t b = {0, 2};
4343 __simd64_int32_t result;
4345 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4348 : /* No clobbers. */);
4353 } [add_options_for_arm_v8_1a_neon ""]]
4356 # Return 1 if the target supports executing floating point instructions from
4357 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4360 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4361 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4364 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4371 #ifdef __ARM_ARCH_ISA_A64
4373 asm ("fabs %h0, %h1"
4376 : /* No clobbers. */);
4380 asm ("vabs.f16 %0, %1"
4383 : /* No clobbers. */);
4387 return (result == 1.0) ? 0 : 1;
4389 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4392 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4393 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4396 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4397 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4400 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4404 #ifdef __ARM_ARCH_ISA_A64
4406 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4407 __Float16x4_t result;
4409 asm ("fabs %0.4h, %1.4h"
4412 : /* No clobbers. */);
4416 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4417 __simd64_float16_t result;
4419 asm ("vabs.f16 %P0, %P1"
4422 : /* No clobbers. */);
4426 return (result[0] == 1.0) ? 0 : 1;
4428 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4431 # Return 1 if this is a ARM target with NEON enabled.
4433 proc check_effective_target_arm_neon { } {
4434 if { [check_effective_target_arm32] } {
4435 return [check_no_compiler_messages arm_neon object {
4436 #ifndef __ARM_NEON__
4447 proc check_effective_target_arm_neonv2 { } {
4448 if { [check_effective_target_arm32] } {
4449 return [check_no_compiler_messages arm_neon object {
4450 #ifndef __ARM_NEON__
4453 #ifndef __ARM_FEATURE_FMA
4465 # Return 1 if this is an ARM target with load acquire and store release
4466 # instructions for 8-, 16- and 32-bit types.
4468 proc check_effective_target_arm_acq_rel { } {
4469 return [check_no_compiler_messages arm_acq_rel object {
4471 load_acquire_store_release (void)
4473 asm ("lda r0, [r1]\n\t"
4479 : : : "r0", "memory");
4484 # Add the options needed for MIPS Paired-Single.
4486 proc add_options_for_mpaired_single { flags } {
4487 if { ! [check_effective_target_mpaired_single] } {
4490 return "$flags -mpaired-single"
4493 # Add the options needed for MIPS SIMD Architecture.
4495 proc add_options_for_mips_msa { flags } {
4496 if { ! [check_effective_target_mips_msa] } {
4499 return "$flags -mmsa"
4502 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4503 # the Loongson vector modes.
4505 proc check_effective_target_mips_loongson { } {
4506 return [check_no_compiler_messages loongson assembly {
4507 #if !defined(__mips_loongson_vector_rev)
4508 #error !__mips_loongson_vector_rev
4513 # Return 1 if this is a MIPS target that supports the legacy NAN.
4515 proc check_effective_target_mips_nanlegacy { } {
4516 return [check_no_compiler_messages nanlegacy assembly {
4518 int main () { return 0; }
4522 # Return 1 if an MSA program can be compiled to object
4524 proc check_effective_target_mips_msa { } {
4525 if ![check_effective_target_nomips16] {
4528 return [check_no_compiler_messages msa object {
4529 #if !defined(__mips_msa)
4530 #error "MSA NOT AVAIL"
4532 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4533 #error "MSA NOT AVAIL FOR ISA REV < 2"
4535 #if !defined(__mips_hard_float)
4536 #error "MSA HARD_FLOAT REQUIRED"
4538 #if __mips_fpr != 64
4539 #error "MSA 64-bit FPR REQUIRED"
4545 v8i16 v = __builtin_msa_ldi_h (1);
4553 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4556 proc check_effective_target_arm_eabi { } {
4557 return [check_no_compiler_messages arm_eabi object {
4558 #ifndef __ARM_EABI__
4566 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4567 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4569 proc check_effective_target_arm_hf_eabi { } {
4570 return [check_no_compiler_messages arm_hf_eabi object {
4571 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4572 #error not hard-float EABI
4579 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4580 # Some multilibs may be incompatible with this option.
4582 proc check_effective_target_arm_iwmmxt_ok { } {
4583 if { [check_effective_target_arm32] } {
4584 return [check_no_compiler_messages arm_iwmmxt_ok object {
4592 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4593 # for an ARM target.
4594 proc check_effective_target_arm_prefer_ldrd_strd { } {
4595 if { ![check_effective_target_arm32] } {
4599 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4600 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4604 # Return 1 if this is a PowerPC target supporting -meabi.
4606 proc check_effective_target_powerpc_eabi_ok { } {
4607 if { [istarget powerpc*-*-*] } {
4608 return [check_no_compiler_messages powerpc_eabi_ok object {
4616 # Return 1 if this is a PowerPC target with floating-point registers.
4618 proc check_effective_target_powerpc_fprs { } {
4619 if { [istarget powerpc*-*-*]
4620 || [istarget rs6000-*-*] } {
4621 return [check_no_compiler_messages powerpc_fprs object {
4633 # Return 1 if this is a PowerPC target with hardware double-precision
4636 proc check_effective_target_powerpc_hard_double { } {
4637 if { [istarget powerpc*-*-*]
4638 || [istarget rs6000-*-*] } {
4639 return [check_no_compiler_messages powerpc_hard_double object {
4651 # Return 1 if this is a PowerPC target supporting -maltivec.
4653 proc check_effective_target_powerpc_altivec_ok { } {
4654 if { ([istarget powerpc*-*-*]
4655 && ![istarget powerpc-*-linux*paired*])
4656 || [istarget rs6000-*-*] } {
4657 # AltiVec is not supported on AIX before 5.3.
4658 if { [istarget powerpc*-*-aix4*]
4659 || [istarget powerpc*-*-aix5.1*]
4660 || [istarget powerpc*-*-aix5.2*] } {
4663 return [check_no_compiler_messages powerpc_altivec_ok object {
4671 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4673 proc check_effective_target_powerpc_p8vector_ok { } {
4674 if { ([istarget powerpc*-*-*]
4675 && ![istarget powerpc-*-linux*paired*])
4676 || [istarget rs6000-*-*] } {
4677 # AltiVec is not supported on AIX before 5.3.
4678 if { [istarget powerpc*-*-aix4*]
4679 || [istarget powerpc*-*-aix5.1*]
4680 || [istarget powerpc*-*-aix5.2*] } {
4683 return [check_no_compiler_messages powerpc_p8vector_ok object {
4686 asm volatile ("xxlorc vs0,vs0,vs0");
4688 asm volatile ("xxlorc 0,0,0");
4692 } "-mpower8-vector"]
4698 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4700 proc check_effective_target_powerpc_p9vector_ok { } {
4701 if { ([istarget powerpc*-*-*]
4702 && ![istarget powerpc-*-linux*paired*])
4703 || [istarget rs6000-*-*] } {
4704 # AltiVec is not supported on AIX before 5.3.
4705 if { [istarget powerpc*-*-aix4*]
4706 || [istarget powerpc*-*-aix5.1*]
4707 || [istarget powerpc*-*-aix5.2*] } {
4710 return [check_no_compiler_messages powerpc_p9vector_ok object {
4713 vector double v = (vector double) { 0.0, 0.0 };
4714 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4717 } "-mpower9-vector"]
4723 # Return 1 if this is a PowerPC target supporting -mmodulo
4725 proc check_effective_target_powerpc_p9modulo_ok { } {
4726 if { ([istarget powerpc*-*-*]
4727 && ![istarget powerpc-*-linux*paired*])
4728 || [istarget rs6000-*-*] } {
4729 # AltiVec is not supported on AIX before 5.3.
4730 if { [istarget powerpc*-*-aix4*]
4731 || [istarget powerpc*-*-aix5.1*]
4732 || [istarget powerpc*-*-aix5.2*] } {
4735 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4737 int i = 5, j = 3, r = -1;
4738 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4747 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4748 # software emulation on power7/power8 systems or hardware support on power9.
4750 proc check_effective_target_powerpc_float128_sw_ok { } {
4751 if { ([istarget powerpc*-*-*]
4752 && ![istarget powerpc-*-linux*paired*])
4753 || [istarget rs6000-*-*] } {
4754 # AltiVec is not supported on AIX before 5.3.
4755 if { [istarget powerpc*-*-aix4*]
4756 || [istarget powerpc*-*-aix5.1*]
4757 || [istarget powerpc*-*-aix5.2*] } {
4760 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4761 volatile __float128 x = 1.0q;
4762 volatile __float128 y = 2.0q;
4764 __float128 z = x + y;
4767 } "-mfloat128 -mvsx"]
4773 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4774 # support on power9.
4776 proc check_effective_target_powerpc_float128_hw_ok { } {
4777 if { ([istarget powerpc*-*-*]
4778 && ![istarget powerpc-*-linux*paired*])
4779 || [istarget rs6000-*-*] } {
4780 # AltiVec is not supported on AIX before 5.3.
4781 if { [istarget powerpc*-*-aix4*]
4782 || [istarget powerpc*-*-aix5.1*]
4783 || [istarget powerpc*-*-aix5.2*] } {
4786 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4787 volatile __float128 x = 1.0q;
4788 volatile __float128 y = 2.0q;
4791 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4794 } "-mfloat128-hardware"]
4800 # Return 1 if this is a PowerPC target supporting -mvsx
4802 proc check_effective_target_powerpc_vsx_ok { } {
4803 if { ([istarget powerpc*-*-*]
4804 && ![istarget powerpc-*-linux*paired*])
4805 || [istarget rs6000-*-*] } {
4806 # VSX is not supported on AIX before 7.1.
4807 if { [istarget powerpc*-*-aix4*]
4808 || [istarget powerpc*-*-aix5*]
4809 || [istarget powerpc*-*-aix6*] } {
4812 return [check_no_compiler_messages powerpc_vsx_ok object {
4815 asm volatile ("xxlor vs0,vs0,vs0");
4817 asm volatile ("xxlor 0,0,0");
4827 # Return 1 if this is a PowerPC target supporting -mhtm
4829 proc check_effective_target_powerpc_htm_ok { } {
4830 if { ([istarget powerpc*-*-*]
4831 && ![istarget powerpc-*-linux*paired*])
4832 || [istarget rs6000-*-*] } {
4833 # HTM is not supported on AIX yet.
4834 if { [istarget powerpc*-*-aix*] } {
4837 return [check_no_compiler_messages powerpc_htm_ok object {
4839 asm volatile ("tbegin. 0");
4848 # Return 1 if the target supports executing HTM hardware instructions,
4849 # 0 otherwise. Cache the result.
4851 proc check_htm_hw_available { } {
4852 return [check_cached_effective_target htm_hw_available {
4853 # For now, disable on Darwin
4854 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4857 check_runtime_nocache htm_hw_available {
4867 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4869 proc check_effective_target_powerpc_ppu_ok { } {
4870 if [check_effective_target_powerpc_altivec_ok] {
4871 return [check_no_compiler_messages cell_asm_available object {
4874 asm volatile ("lvlx v0,v0,v0");
4876 asm volatile ("lvlx 0,0,0");
4886 # Return 1 if this is a PowerPC target that supports SPU.
4888 proc check_effective_target_powerpc_spu { } {
4889 if { [istarget powerpc*-*-linux*] } {
4890 return [check_effective_target_powerpc_altivec_ok]
4896 # Return 1 if this is a PowerPC SPE target. The check includes options
4897 # specified by dg-options for this test, so don't
cache the result.
4899 proc check_effective_target_powerpc_spe_nocache
{ } {
4900 if { [istarget powerpc
*-*-*] } {
4901 return [check_no_compiler_messages_nocache powerpc_spe object
{
4907 } [current_compiler_flags
]]
4913 #
Return 1 if this is a PowerPC target with SPE enabled.
4915 proc check_effective_target_powerpc_spe
{ } {
4916 if { [istarget powerpc
*-*-*] } {
4917 return [check_no_compiler_messages powerpc_spe object
{
4929 #
Return 1 if this is a PowerPC target with Altivec enabled.
4931 proc check_effective_target_powerpc_altivec
{ } {
4932 if { [istarget powerpc
*-*-*] } {
4933 return [check_no_compiler_messages powerpc_altivec object
{
4945 #
Return 1 if this is a PowerPC
405 target. The check includes options
4946 # specified by dg
-options
for this test
, so don
't cache the result.
4948 proc check_effective_target_powerpc_405_nocache { } {
4949 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4950 return [check_no_compiler_messages_nocache powerpc_405 object {
4956 } [current_compiler_flags]]
4962 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4964 proc check_effective_target_powerpc_elfv2 { } {
4965 if { [istarget powerpc*-*-*] } {
4966 return [check_no_compiler_messages powerpc_elfv2 object {
4968 #error not ELF v2 ABI
4978 # Return 1 if this is a SPU target with a toolchain that
4979 # supports automatic overlay generation.
4981 proc check_effective_target_spu_auto_overlay { } {
4982 if { [istarget spu*-*-elf*] } {
4983 return [check_no_compiler_messages spu_auto_overlay executable {
4985 } "-Wl,--auto-overlay" ]
4991 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4992 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4993 # test environment appears to run executables on such a simulator.
4995 proc check_effective_target_ultrasparc_hw { } {
4996 return [check_runtime ultrasparc_hw {
4997 int main() { return 0; }
4998 } "-mcpu=ultrasparc"]
5001 # Return 1 if the test environment supports executing UltraSPARC VIS2
5002 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5004 proc check_effective_target_ultrasparc_vis2_hw { } {
5005 return [check_runtime ultrasparc_vis2_hw {
5006 int main() { __asm__(".word 0x81b00320"); return 0; }
5007 } "-mcpu=ultrasparc3"]
5010 # Return 1 if the test environment supports executing UltraSPARC VIS3
5011 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5013 proc check_effective_target_ultrasparc_vis3_hw { } {
5014 return [check_runtime ultrasparc_vis3_hw {
5015 int main() { __asm__(".word 0x81b00220"); return 0; }
5019 # Return 1 if this is a SPARC-V9 target.
5021 proc check_effective_target_sparc_v9 { } {
5022 if { [istarget sparc*-*-*] } {
5023 return [check_no_compiler_messages sparc_v9 object {
5025 asm volatile ("return %i7+8");
5034 # Return 1 if this is a SPARC target with VIS enabled.
5036 proc check_effective_target_sparc_vis { } {
5037 if { [istarget sparc*-*-*] } {
5038 return [check_no_compiler_messages sparc_vis object {
5050 # Return 1 if the target supports hardware vector shift operation.
5052 proc check_effective_target_vect_shift { } {
5053 global et_vect_shift_saved
5056 if [info exists et_vect_shift_saved($et_index)] {
5057 verbose "check_effective_target_vect_shift: using cached result" 2
5059 set et_vect_shift_saved($et_index) 0
5060 if { ([istarget powerpc*-*-*]
5061 && ![istarget powerpc-*-linux*paired*])
5062 || [istarget ia64-*-*]
5063 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5064 || [istarget aarch64*-*-*]
5065 || [is-effective-target arm_neon]
5066 || ([istarget mips*-*-*]
5067 && ([et-is-effective-target mips_msa]
5068 || [et-is-effective-target mips_loongson])) } {
5069 set et_vect_shift_saved($et_index) 1
5073 verbose "check_effective_target_vect_shift:\
5074 returning $et_vect_shift_saved($et_index)" 2
5075 return $et_vect_shift_saved($et_index)
5078 proc check_effective_target_whole_vector_shift { } {
5079 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5080 || [istarget ia64-*-*]
5081 || [istarget aarch64*-*-*]
5082 || [istarget powerpc64*-*-*]
5083 || ([is-effective-target arm_neon]
5084 && [check_effective_target_arm_little_endian])
5085 || ([istarget mips*-*-*]
5086 && [et-is-effective-target mips_loongson]) } {
5092 verbose "check_effective_target_vect_long: returning $answer" 2
5096 # Return 1 if the target supports vector bswap operations.
5098 proc check_effective_target_vect_bswap { } {
5099 global et_vect_bswap_saved
5102 if [info exists et_vect_bswap_saved($et_index)] {
5103 verbose "check_effective_target_vect_bswap: using cached result" 2
5105 set et_vect_bswap_saved($et_index) 0
5106 if { [istarget aarch64*-*-*]
5107 || [is-effective-target arm_neon]
5109 set et_vect_bswap_saved($et_index) 1
5113 verbose "check_effective_target_vect_bswap:\
5114 returning $et_vect_bswap_saved($et_index)" 2
5115 return $et_vect_bswap_saved($et_index)
5118 # Return 1 if the target supports hardware vector shift operation for char.
5120 proc check_effective_target_vect_shift_char { } {
5121 global et_vect_shift_char_saved
5124 if [info exists et_vect_shift_char_saved($et_index)] {
5125 verbose "check_effective_target_vect_shift_char: using cached result" 2
5127 set et_vect_shift_char_saved($et_index) 0
5128 if { ([istarget powerpc*-*-*]
5129 && ![istarget powerpc-*-linux*paired*])
5130 || [is-effective-target arm_neon]
5131 || ([istarget mips*-*-*]
5132 && [et-is-effective-target mips_msa]) } {
5133 set et_vect_shift_char_saved($et_index) 1
5137 verbose "check_effective_target_vect_shift_char:\
5138 returning $et_vect_shift_char_saved($et_index)" 2
5139 return $et_vect_shift_char_saved($et_index)
5142 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5144 # This can change for different subtargets so do not cache the result.
5146 proc check_effective_target_vect_long { } {
5147 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5148 || (([istarget powerpc*-*-*]
5149 && ![istarget powerpc-*-linux*paired*])
5150 && [check_effective_target_ilp32])
5151 || [is-effective-target arm_neon]
5152 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5153 || [istarget aarch64*-*-*]
5154 || ([istarget mips*-*-*]
5155 && [et-is-effective-target mips_msa]) } {
5161 verbose "check_effective_target_vect_long: returning $answer" 2
5165 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5167 # This won't change
for different subtargets so
cache the result.
5169 proc check_effective_target_vect_float
{ } {
5170 global et_vect_float_saved
5173 if [info exists et_vect_float_saved
($et_index
)] {
5174 verbose
"check_effective_target_vect_float: using cached result" 2
5176 set et_vect_float_saved
($et_index
) 0
5177 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5178 ||
[istarget powerpc
*-*-*]
5179 ||
[istarget spu
-*-*]
5180 ||
[istarget mips
-sde
-elf
]
5181 ||
[istarget mipsisa64
*-*-*]
5182 ||
[istarget ia64
-*-*]
5183 ||
[istarget aarch64
*-*-*]
5184 ||
([istarget mips
*-*-*]
5185 && [et
-is
-effective
-target mips_msa
])
5186 ||
[is
-effective
-target arm_neon
] } {
5187 set et_vect_float_saved
($et_index
) 1
5191 verbose
"check_effective_target_vect_float:\
5192 returning $et_vect_float_saved
($et_index
)" 2
5193 return $et_vect_float_saved
($et_index
)
5196 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5198 # This won
't change for different subtargets so cache the result.
5200 proc check_effective_target_vect_double { } {
5201 global et_vect_double_saved
5204 if [info exists et_vect_double_saved($et_index)] {
5205 verbose "check_effective_target_vect_double: using cached result" 2
5207 set et_vect_double_saved($et_index) 0
5208 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5209 && [check_no_compiler_messages vect_double assembly {
5210 #ifdef __tune_atom__
5211 # error No double vectorizer support.
5214 || [istarget aarch64*-*-*]
5215 || [istarget spu-*-*]
5216 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5217 || ([istarget mips*-*-*]
5218 && [et-is-effective-target mips_msa]) } {
5219 set et_vect_double_saved($et_index) 1
5223 verbose "check_effective_target_vect_double:\
5224 returning $et_vect_double_saved($et_index)" 2
5225 return $et_vect_double_saved($et_index)
5228 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5230 # This won't change
for different subtargets so
cache the result.
5232 proc check_effective_target_vect_long_long
{ } {
5233 global et_vect_long_long_saved
5236 if [info exists et_vect_long_long_saved
($et_index
)] {
5237 verbose
"check_effective_target_vect_long_long: using cached result" 2
5239 set et_vect_long_long_saved
($et_index
) 0
5240 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5241 ||
([istarget mips
*-*-*]
5242 && [et
-is
-effective
-target mips_msa
]) } {
5243 set et_vect_long_long_saved
($et_index
) 1
5247 verbose
"check_effective_target_vect_long_long:\
5248 returning $et_vect_long_long_saved
($et_index
)" 2
5249 return $et_vect_long_long_saved
($et_index
)
5253 #
Return 1 if the target plus current options does not support a vector
5254 #
max instruction
on "int", 0 otherwise.
5256 # This won
't change for different subtargets so cache the result.
5258 proc check_effective_target_vect_no_int_min_max { } {
5259 global et_vect_no_int_min_max_saved
5262 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5263 verbose "check_effective_target_vect_no_int_min_max:\
5264 using cached result" 2
5266 set et_vect_no_int_min_max_saved($et_index) 0
5267 if { [istarget sparc*-*-*]
5268 || [istarget spu-*-*]
5269 || [istarget alpha*-*-*]
5270 || ([istarget mips*-*-*]
5271 && [et-is-effective-target mips_loongson]) } {
5272 set et_vect_no_int_min_max_saved($et_index) 1
5275 verbose "check_effective_target_vect_no_int_min_max:\
5276 returning $et_vect_no_int_min_max_saved($et_index)" 2
5277 return $et_vect_no_int_min_max_saved($et_index)
5280 # Return 1 if the target plus current options does not support a vector
5281 # add instruction on "int", 0 otherwise.
5283 # This won't change
for different subtargets so
cache the result.
5285 proc check_effective_target_vect_no_int_add
{ } {
5286 global et_vect_no_int_add_saved
5289 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5290 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5292 set et_vect_no_int_add_saved
($et_index
) 0
5293 # Alpha only supports vector add
on V8QI and V4HI.
5294 if { [istarget alpha
*-*-*] } {
5295 set et_vect_no_int_add_saved
($et_index
) 1
5298 verbose
"check_effective_target_vect_no_int_add:\
5299 returning $et_vect_no_int_add_saved
($et_index
)" 2
5300 return $et_vect_no_int_add_saved
($et_index
)
5303 #
Return 1 if the target plus current options does not support vector
5304 # bitwise instructions
, 0 otherwise.
5306 # This won
't change for different subtargets so cache the result.
5308 proc check_effective_target_vect_no_bitwise { } {
5309 global et_vect_no_bitwise_saved
5312 if [info exists et_vect_no_bitwise_saved($et_index)] {
5313 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5315 set et_vect_no_bitwise_saved($et_index) 0
5317 verbose "check_effective_target_vect_no_bitwise:\
5318 returning $et_vect_no_bitwise_saved($et_index)" 2
5319 return $et_vect_no_bitwise_saved($et_index)
5322 # Return 1 if the target plus current options supports vector permutation,
5325 # This won't change
for different subtargets so
cache the result.
5327 proc check_effective_target_vect_perm
{ } {
5328 global et_vect_perm_saved
5331 if [info exists et_vect_perm_saved
($et_index
)] {
5332 verbose
"check_effective_target_vect_perm: using cached result" 2
5334 set et_vect_perm_saved
($et_index
) 0
5335 if { [is
-effective
-target arm_neon
]
5336 ||
[istarget aarch64
*-*-*]
5337 ||
[istarget powerpc
*-*-*]
5338 ||
[istarget spu
-*-*]
5339 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5340 ||
([istarget mips
*-*-*]
5341 && ([et
-is
-effective
-target mpaired_single
]
5342 ||
[et
-is
-effective
-target mips_msa
])) } {
5343 set et_vect_perm_saved
($et_index
) 1
5346 verbose
"check_effective_target_vect_perm:\
5347 returning $et_vect_perm_saved
($et_index
)" 2
5348 return $et_vect_perm_saved
($et_index
)
5351 #
Return 1 if the target plus current options supports vector permutation
5352 #
on byte
-sized elements
, 0 otherwise.
5354 # This won
't change for different subtargets so cache the result.
5356 proc check_effective_target_vect_perm_byte { } {
5357 global et_vect_perm_byte_saved
5360 if [info exists et_vect_perm_byte_saved($et_index)] {
5361 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5363 set et_vect_perm_byte_saved($et_index) 0
5364 if { ([is-effective-target arm_neon]
5365 && [is-effective-target arm_little_endian])
5366 || ([istarget aarch64*-*-*]
5367 && [is-effective-target aarch64_little_endian])
5368 || [istarget powerpc*-*-*]
5369 || [istarget spu-*-*]
5370 || ([istarget mips-*.*]
5371 && [et-is-effective-target mips_msa]) } {
5372 set et_vect_perm_byte_saved($et_index) 1
5375 verbose "check_effective_target_vect_perm_byte:\
5376 returning $et_vect_perm_byte_saved($et_index)" 2
5377 return $et_vect_perm_byte_saved($et_index)
5380 # Return 1 if the target plus current options supports vector permutation
5381 # on short-sized elements, 0 otherwise.
5383 # This won't change
for different subtargets so
cache the result.
5385 proc check_effective_target_vect_perm_short
{ } {
5386 global et_vect_perm_short_saved
5389 if [info exists et_vect_perm_short_saved
($et_index
)] {
5390 verbose
"check_effective_target_vect_perm_short: using cached result" 2
5392 set et_vect_perm_short_saved
($et_index
) 0
5393 if { ([is
-effective
-target arm_neon
]
5394 && [is
-effective
-target arm_little_endian
])
5395 ||
([istarget aarch64
*-*-*]
5396 && [is
-effective
-target aarch64_little_endian
])
5397 ||
[istarget powerpc
*-*-*]
5398 ||
[istarget spu
-*-*]
5399 ||
([istarget mips
*-*-*]
5400 && [et
-is
-effective
-target mips_msa
]) } {
5401 set et_vect_perm_short_saved
($et_index
) 1
5404 verbose
"check_effective_target_vect_perm_short:\
5405 returning $et_vect_perm_short_saved
($et_index
)" 2
5406 return $et_vect_perm_short_saved
($et_index
)
5409 #
Return 1 if the target plus current options supports folding of
5410 # copysign into XORSIGN.
5412 # This won
't change for different subtargets so cache the result.
5414 proc check_effective_target_xorsign { } {
5415 global et_xorsign_saved
5418 if [info exists et_xorsign_saved($et_index)] {
5419 verbose "check_effective_target_xorsign: using cached result" 2
5421 set et_xorsign_saved($et_index) 0
5422 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5423 set et_xorsign_saved($et_index) 1
5426 verbose "check_effective_target_xorsign:\
5427 returning $et_xorsign_saved($et_index)" 2
5428 return $et_xorsign_saved($et_index)
5431 # Return 1 if the target plus current options supports a vector
5432 # widening summation of *short* args into *int* result, 0 otherwise.
5434 # This won't change
for different subtargets so
cache the result.
5436 proc check_effective_target_vect_widen_sum_hi_to_si_pattern
{ } {
5437 global et_vect_widen_sum_hi_to_si_pattern_saved
5440 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)] {
5441 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5442 using cached result
" 2
5444 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 0
5445 if { [istarget powerpc
*-*-*]
5446 ||
[istarget aarch64
*-*-*]
5447 ||
[is
-effective
-target arm_neon
]
5448 ||
[istarget ia64
-*-*] } {
5449 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 1
5452 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5453 returning $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)" 2
5454 return $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)
5457 #
Return 1 if the target plus current options supports a vector
5458 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5459 # A target can also support this widening summation
if it can support
5460 # promotion
(unpacking
) from shorts to ints.
5462 # This won
't change for different subtargets so cache the result.
5464 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5465 global et_vect_widen_sum_hi_to_si_saved
5468 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5469 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5470 using cached result" 2
5472 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5473 [check_effective_target_vect_unpack]
5474 if { [istarget powerpc*-*-*]
5475 || [istarget ia64-*-*] } {
5476 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5479 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5480 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5481 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5484 # Return 1 if the target plus current options supports a vector
5485 # widening summation of *char* args into *short* result, 0 otherwise.
5486 # A target can also support this widening summation if it can support
5487 # promotion (unpacking) from chars to shorts.
5489 # This won't change
for different subtargets so
cache the result.
5491 proc check_effective_target_vect_widen_sum_qi_to_hi
{ } {
5492 global et_vect_widen_sum_qi_to_hi_saved
5495 if [info exists et_vect_widen_sum_qi_to_hi_saved
($et_index
)] {
5496 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
5497 using cached result
" 2
5499 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 0
5500 if { [check_effective_target_vect_unpack
]
5501 ||
[is
-effective
-target arm_neon
]
5502 ||
[istarget ia64
-*-*] } {
5503 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 1
5506 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
5507 returning $et_vect_widen_sum_qi_to_hi_saved
($et_index
)" 2
5508 return $et_vect_widen_sum_qi_to_hi_saved
($et_index
)
5511 #
Return 1 if the target plus current options supports a vector
5512 # widening summation of
*char
* args into
*int* result
, 0 otherwise.
5514 # This won
't change for different subtargets so cache the result.
5516 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5517 global et_vect_widen_sum_qi_to_si_saved
5520 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5521 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5522 using cached result" 2
5524 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5525 if { [istarget powerpc*-*-*] } {
5526 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5529 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5530 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5531 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5534 # Return 1 if the target plus current options supports a vector
5535 # widening multiplication of *char* args into *short* result, 0 otherwise.
5536 # A target can also support this widening multplication if it can support
5537 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5538 # multiplication of shorts).
5540 # This won't change
for different subtargets so
cache the result.
5543 proc check_effective_target_vect_widen_mult_qi_to_hi
{ } {
5544 global et_vect_widen_mult_qi_to_hi_saved
5547 if [info exists et_vect_widen_mult_qi_to_hi_saved
($et_index
)] {
5548 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
5549 using cached result
" 2
5551 if { [check_effective_target_vect_unpack
]
5552 && [check_effective_target_vect_short_mult
] } {
5553 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
5555 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 0
5557 if { [istarget powerpc
*-*-*]
5558 ||
[istarget aarch64
*-*-*]
5559 ||
[is
-effective
-target arm_neon
] } {
5560 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
5563 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
5564 returning $et_vect_widen_mult_qi_to_hi_saved
($et_index
)" 2
5565 return $et_vect_widen_mult_qi_to_hi_saved
($et_index
)
5568 #
Return 1 if the target plus current options supports a vector
5569 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
5570 # A target can also support this widening multplication
if it can support
5571 # promotion
(unpacking
) from shorts to ints
, and vect_int_mult
(non
-widening
5572 # multiplication of ints
).
5574 # This won
't change for different subtargets so cache the result.
5577 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5578 global et_vect_widen_mult_hi_to_si_saved
5581 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5582 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5583 using cached result" 2
5585 if { [check_effective_target_vect_unpack]
5586 && [check_effective_target_vect_int_mult] } {
5587 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5589 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5591 if { [istarget powerpc*-*-*]
5592 || [istarget spu-*-*]
5593 || [istarget ia64-*-*]
5594 || [istarget aarch64*-*-*]
5595 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5596 || [is-effective-target arm_neon] } {
5597 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5600 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5601 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5602 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5605 # Return 1 if the target plus current options supports a vector
5606 # widening multiplication of *char* args into *short* result, 0 otherwise.
5608 # This won't change
for different subtargets so
cache the result.
5610 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern
{ } {
5611 global et_vect_widen_mult_qi_to_hi_pattern_saved
5614 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)] {
5615 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5616 using cached result
" 2
5618 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 0
5619 if { [istarget powerpc
*-*-*]
5620 ||
([is
-effective
-target arm_neon
]
5621 && [check_effective_target_arm_little_endian
]) } {
5622 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 1
5625 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5626 returning $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)" 2
5627 return $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)
5630 #
Return 1 if the target plus current options supports a vector
5631 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
5633 # This won
't change for different subtargets so cache the result.
5635 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5636 global et_vect_widen_mult_hi_to_si_pattern_saved
5639 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5640 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5641 using cached result" 2
5643 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5644 if { [istarget powerpc*-*-*]
5645 || [istarget spu-*-*]
5646 || [istarget ia64-*-*]
5647 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5648 || ([is-effective-target arm_neon]
5649 && [check_effective_target_arm_little_endian]) } {
5650 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5653 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5654 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5655 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5658 # Return 1 if the target plus current options supports a vector
5659 # widening multiplication of *int* args into *long* result, 0 otherwise.
5661 # This won't change
for different subtargets so
cache the result.
5663 proc check_effective_target_vect_widen_mult_si_to_di_pattern
{ } {
5664 global et_vect_widen_mult_si_to_di_pattern_saved
5667 if [info exists et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)] {
5668 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
5669 using cached result
" 2
5671 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 0
5672 if {[istarget ia64
-*-*]
5673 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
5674 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 1
5677 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
5678 returning $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)" 2
5679 return $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)
5682 #
Return 1 if the target plus current options supports a vector
5683 # widening shift
, 0 otherwise.
5685 # This won
't change for different subtargets so cache the result.
5687 proc check_effective_target_vect_widen_shift { } {
5688 global et_vect_widen_shift_saved
5691 if [info exists et_vect_shift_saved($et_index)] {
5692 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5694 set et_vect_widen_shift_saved($et_index) 0
5695 if { [is-effective-target arm_neon] } {
5696 set et_vect_widen_shift_saved($et_index) 1
5699 verbose "check_effective_target_vect_widen_shift:\
5700 returning $et_vect_widen_shift_saved($et_index)" 2
5701 return $et_vect_widen_shift_saved($et_index)
5704 # Return 1 if the target plus current options supports a vector
5705 # dot-product of signed chars, 0 otherwise.
5707 # This won't change
for different subtargets so
cache the result.
5709 proc check_effective_target_vect_sdot_qi
{ } {
5710 global et_vect_sdot_qi_saved
5713 if [info exists et_vect_sdot_qi_saved
($et_index
)] {
5714 verbose
"check_effective_target_vect_sdot_qi: using cached result" 2
5716 set et_vect_sdot_qi_saved
($et_index
) 0
5717 if { [istarget ia64
-*-*]
5718 ||
([istarget mips
*-*-*]
5719 && [et
-is
-effective
-target mips_msa
]) } {
5720 set et_vect_udot_qi_saved
1
5723 verbose
"check_effective_target_vect_sdot_qi:\
5724 returning $et_vect_sdot_qi_saved
($et_index
)" 2
5725 return $et_vect_sdot_qi_saved
($et_index
)
5728 #
Return 1 if the target plus current options supports a vector
5729 # dot
-product of unsigned chars
, 0 otherwise.
5731 # This won
't change for different subtargets so cache the result.
5733 proc check_effective_target_vect_udot_qi { } {
5734 global et_vect_udot_qi_saved
5737 if [info exists et_vect_udot_qi_saved($et_index)] {
5738 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5740 set et_vect_udot_qi_saved($et_index) 0
5741 if { [istarget powerpc*-*-*]
5742 || [istarget ia64-*-*]
5743 || ([istarget mips*-*-*]
5744 && [et-is-effective-target mips_msa]) } {
5745 set et_vect_udot_qi_saved($et_index) 1
5748 verbose "check_effective_target_vect_udot_qi:\
5749 returning $et_vect_udot_qi_saved($et_index)" 2
5750 return $et_vect_udot_qi_saved($et_index)
5753 # Return 1 if the target plus current options supports a vector
5754 # dot-product of signed shorts, 0 otherwise.
5756 # This won't change
for different subtargets so
cache the result.
5758 proc check_effective_target_vect_sdot_hi
{ } {
5759 global et_vect_sdot_hi_saved
5762 if [info exists et_vect_sdot_hi_saved
($et_index
)] {
5763 verbose
"check_effective_target_vect_sdot_hi: using cached result" 2
5765 set et_vect_sdot_hi_saved
($et_index
) 0
5766 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
5767 ||
[istarget ia64
-*-*]
5768 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5769 ||
([istarget mips
*-*-*]
5770 && [et
-is
-effective
-target mips_msa
]) } {
5771 set et_vect_sdot_hi_saved
($et_index
) 1
5774 verbose
"check_effective_target_vect_sdot_hi:\
5775 returning $et_vect_sdot_hi_saved
($et_index
)" 2
5776 return $et_vect_sdot_hi_saved
($et_index
)
5779 #
Return 1 if the target plus current options supports a vector
5780 # dot
-product of unsigned shorts
, 0 otherwise.
5782 # This won
't change for different subtargets so cache the result.
5784 proc check_effective_target_vect_udot_hi { } {
5785 global et_vect_udot_hi_saved
5788 if [info exists et_vect_udot_hi_saved($et_index)] {
5789 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5791 set et_vect_udot_hi_saved($et_index) 0
5792 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5793 || ([istarget mips*-*-*]
5794 && [et-is-effective-target mips_msa]) } {
5795 set et_vect_udot_hi_saved($et_index) 1
5798 verbose "check_effective_target_vect_udot_hi:\
5799 returning $et_vect_udot_hi_saved($et_index)" 2
5800 return $et_vect_udot_hi_saved($et_index)
5803 # Return 1 if the target plus current options supports a vector
5804 # sad operation of unsigned chars, 0 otherwise.
5806 # This won't change
for different subtargets so
cache the result.
5808 proc check_effective_target_vect_usad_char
{ } {
5809 global et_vect_usad_char_saved
5812 if [info exists et_vect_usad_char_saved
($et_index
)] {
5813 verbose
"check_effective_target_vect_usad_char: using cached result" 2
5815 set et_vect_usad_char_saved
($et_index
) 0
5816 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
5817 set et_vect_usad_char_saved
($et_index
) 1
5820 verbose
"check_effective_target_vect_usad_char:\
5821 returning $et_vect_usad_char_saved
($et_index
)" 2
5822 return $et_vect_usad_char_saved
($et_index
)
5825 #
Return 1 if the target plus current options supports a vector
5826 # demotion
(packing
) of shorts
(to chars
) and ints
(to shorts
)
5827 # using modulo arithmetic
, 0 otherwise.
5829 # This won
't change for different subtargets so cache the result.
5831 proc check_effective_target_vect_pack_trunc { } {
5832 global et_vect_pack_trunc_saved
5835 if [info exists et_vect_pack_trunc_saved($et_index)] {
5836 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5838 set et_vect_pack_trunc_saved($et_index) 0
5839 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5840 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5841 || [istarget aarch64*-*-*]
5842 || [istarget spu-*-*]
5843 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5844 && [check_effective_target_arm_little_endian])
5845 || ([istarget mips*-*-*]
5846 && [et-is-effective-target mips_msa]) } {
5847 set et_vect_pack_trunc_saved($et_index) 1
5850 verbose "check_effective_target_vect_pack_trunc:\
5851 returning $et_vect_pack_trunc_saved($et_index)" 2
5852 return $et_vect_pack_trunc_saved($et_index)
5855 # Return 1 if the target plus current options supports a vector
5856 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5858 # This won't change
for different subtargets so
cache the result.
5860 proc check_effective_target_vect_unpack
{ } {
5861 global et_vect_unpack_saved
5864 if [info exists et_vect_unpack_saved
($et_index
)] {
5865 verbose
"check_effective_target_vect_unpack: using cached result" 2
5867 set et_vect_unpack_saved
($et_index
) 0
5868 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*paired
*])
5869 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5870 ||
[istarget spu
-*-*]
5871 ||
[istarget ia64
-*-*]
5872 ||
[istarget aarch64
*-*-*]
5873 ||
([istarget mips
*-*-*]
5874 && [et
-is
-effective
-target mips_msa
])
5875 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
5876 && [check_effective_target_arm_little_endian
]) } {
5877 set et_vect_unpack_saved
($et_index
) 1
5880 verbose
"check_effective_target_vect_unpack:\
5881 returning $et_vect_unpack_saved
($et_index
)" 2
5882 return $et_vect_unpack_saved
($et_index
)
5885 #
Return 1 if the target plus current options does not guarantee
5886 # that its STACK_BOUNDARY is
>= the reguired vector alignment.
5888 # This won
't change for different subtargets so cache the result.
5890 proc check_effective_target_unaligned_stack { } {
5891 global et_unaligned_stack_saved
5893 if [info exists et_unaligned_stack_saved] {
5894 verbose "check_effective_target_unaligned_stack: using cached result" 2
5896 set et_unaligned_stack_saved 0
5898 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5899 return $et_unaligned_stack_saved
5902 # Return 1 if the target plus current options does not support a vector
5903 # alignment mechanism, 0 otherwise.
5905 # This won't change
for different subtargets so
cache the result.
5907 proc check_effective_target_vect_no_align
{ } {
5908 global et_vect_no_align_saved
5911 if [info exists et_vect_no_align_saved
($et_index
)] {
5912 verbose
"check_effective_target_vect_no_align: using cached result" 2
5914 set et_vect_no_align_saved
($et_index
) 0
5915 if { [istarget mipsisa64
*-*-*]
5916 ||
[istarget mips
-sde
-elf
]
5917 ||
[istarget sparc
*-*-*]
5918 ||
[istarget ia64
-*-*]
5919 ||
[check_effective_target_arm_vect_no_misalign
]
5920 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
5921 ||
([istarget mips
*-*-*]
5922 && [et
-is
-effective
-target mips_loongson
]) } {
5923 set et_vect_no_align_saved
($et_index
) 1
5926 verbose
"check_effective_target_vect_no_align:\
5927 returning $et_vect_no_align_saved
($et_index
)" 2
5928 return $et_vect_no_align_saved
($et_index
)
5931 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
5933 # This won
't change for different subtargets so cache the result.
5935 proc check_effective_target_vect_hw_misalign { } {
5936 global et_vect_hw_misalign_saved
5939 if [info exists et_vect_hw_misalign_saved($et_index)] {
5940 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
5942 set et_vect_hw_misalign_saved($et_index) 0
5943 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5944 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5945 || [istarget aarch64*-*-*]
5946 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
5947 set et_vect_hw_misalign_saved($et_index) 1
5949 if { [istarget arm*-*-*] } {
5950 set et_vect_hw_misalign_saved($et_index) [check_effective_target_arm_vect_no_misalign]
5953 verbose "check_effective_target_vect_hw_misalign:\
5954 returning $et_vect_hw_misalign_saved($et_index)" 2
5955 return $et_vect_hw_misalign_saved($et_index)
5959 # Return 1 if arrays are aligned to the vector alignment
5960 # boundary, 0 otherwise.
5962 proc check_effective_target_vect_aligned_arrays { } {
5963 set et_vect_aligned_arrays 0
5964 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5965 && !([is-effective-target ia32]
5966 || ([check_avx_available] && ![check_prefer_avx128])))
5967 || [istarget spu-*-*] } {
5968 set et_vect_aligned_arrays 1
5971 verbose "check_effective_target_vect_aligned_arrays:\
5972 returning $et_vect_aligned_arrays" 2
5973 return $et_vect_aligned_arrays
5976 # Return 1 if types of size 32 bit or less are naturally aligned
5977 # (aligned to their type-size), 0 otherwise.
5979 # This won't change
for different subtargets so
cache the result.
5981 proc check_effective_target_natural_alignment_32
{ } {
5982 global et_natural_alignment_32
5984 if [info exists et_natural_alignment_32_saved
] {
5985 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
5987 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
5988 set et_natural_alignment_32_saved
1
5989 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
])
5990 ||
[istarget avr
-*-*] } {
5991 set et_natural_alignment_32_saved
0
5994 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5995 return $et_natural_alignment_32_saved
5998 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
5999 # type
-size
), 0 otherwise.
6001 # This won
't change for different subtargets so cache the result.
6003 proc check_effective_target_natural_alignment_64 { } {
6004 global et_natural_alignment_64
6006 if [info exists et_natural_alignment_64_saved] {
6007 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6009 set et_natural_alignment_64_saved 0
6010 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6011 || [istarget spu-*-*] } {
6012 set et_natural_alignment_64_saved 1
6015 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6016 return $et_natural_alignment_64_saved
6019 # Return 1 if all vector types are naturally aligned (aligned to their
6020 # type-size), 0 otherwise.
6022 proc check_effective_target_vect_natural_alignment { } {
6023 set et_vect_natural_alignment 1
6024 if { [check_effective_target_arm_eabi]
6025 || [istarget nvptx-*-*]
6026 || [istarget s390*-*-*] } {
6027 set et_vect_natural_alignment 0
6029 verbose "check_effective_target_vect_natural_alignment:\
6030 returning $et_vect_natural_alignment" 2
6031 return $et_vect_natural_alignment
6034 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6036 proc check_effective_target_vector_alignment_reachable { } {
6037 set et_vector_alignment_reachable 0
6038 if { [check_effective_target_vect_aligned_arrays]
6039 || [check_effective_target_natural_alignment_32] } {
6040 set et_vector_alignment_reachable 1
6042 verbose "check_effective_target_vector_alignment_reachable:\
6043 returning $et_vector_alignment_reachable" 2
6044 return $et_vector_alignment_reachable
6047 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6049 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6050 set et_vector_alignment_reachable_for_64bit 0
6051 if { [check_effective_target_vect_aligned_arrays]
6052 || [check_effective_target_natural_alignment_64] } {
6053 set et_vector_alignment_reachable_for_64bit 1
6055 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6056 returning $et_vector_alignment_reachable_for_64bit" 2
6057 return $et_vector_alignment_reachable_for_64bit
6060 # Return 1 if the target only requires element alignment for vector accesses
6062 proc check_effective_target_vect_element_align { } {
6063 global et_vect_element_align
6066 if [info exists et_vect_element_align($et_index)] {
6067 verbose "check_effective_target_vect_element_align:\
6068 using cached result" 2
6070 set et_vect_element_align($et_index) 0
6071 if { ([istarget arm*-*-*]
6072 && ![check_effective_target_arm_vect_no_misalign])
6073 || [check_effective_target_vect_hw_misalign] } {
6074 set et_vect_element_align($et_index) 1
6078 verbose "check_effective_target_vect_element_align:\
6079 returning $et_vect_element_align($et_index)" 2
6080 return $et_vect_element_align($et_index)
6083 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6085 proc check_effective_target_vect_load_lanes { } {
6086 global et_vect_load_lanes
6088 if [info exists et_vect_load_lanes] {
6089 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6091 set et_vect_load_lanes 0
6092 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6093 || [istarget aarch64*-*-*] } {
6094 set et_vect_load_lanes 1
6098 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6099 return $et_vect_load_lanes
6102 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6104 proc check_effective_target_vect_condition { } {
6105 global et_vect_cond_saved
6108 if [info exists et_vect_cond_saved($et_index)] {
6109 verbose "check_effective_target_vect_cond: using cached result" 2
6111 set et_vect_cond_saved($et_index) 0
6112 if { [istarget aarch64*-*-*]
6113 || [istarget powerpc*-*-*]
6114 || [istarget ia64-*-*]
6115 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6116 || [istarget spu-*-*]
6117 || ([istarget mips*-*-*]
6118 && [et-is-effective-target mips_msa])
6119 || ([istarget arm*-*-*]
6120 && [check_effective_target_arm_neon_ok]) } {
6121 set et_vect_cond_saved($et_index) 1
6125 verbose "check_effective_target_vect_cond:\
6126 returning $et_vect_cond_saved($et_index)" 2
6127 return $et_vect_cond_saved($et_index)
6130 # Return 1 if the target supports vector conditional operations where
6131 # the comparison has different type from the lhs, 0 otherwise.
6133 proc check_effective_target_vect_cond_mixed { } {
6134 global et_vect_cond_mixed_saved
6137 if [info exists et_vect_cond_mixed_saved($et_index)] {
6138 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6140 set et_vect_cond_mixed_saved($et_index) 0
6141 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6142 || [istarget aarch64*-*-*]
6143 || [istarget powerpc*-*-*]
6144 || ([istarget mips*-*-*]
6145 && [et-is-effective-target mips_msa]) } {
6146 set et_vect_cond_mixed_saved($et_index) 1
6150 verbose "check_effective_target_vect_cond_mixed:\
6151 returning $et_vect_cond_mixed_saved($et_index)" 2
6152 return $et_vect_cond_mixed_saved($et_index)
6155 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6157 proc check_effective_target_vect_char_mult { } {
6158 global et_vect_char_mult_saved
6161 if [info exists et_vect_char_mult_saved($et_index)] {
6162 verbose "check_effective_target_vect_char_mult: using cached result" 2
6164 set et_vect_char_mult_saved($et_index) 0
6165 if { [istarget aarch64*-*-*]
6166 || [istarget ia64-*-*]
6167 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6168 || [check_effective_target_arm32]
6169 || [check_effective_target_powerpc_altivec]
6170 || ([istarget mips*-*-*]
6171 && [et-is-effective-target mips_msa]) } {
6172 set et_vect_char_mult_saved($et_index) 1
6176 verbose "check_effective_target_vect_char_mult:\
6177 returning $et_vect_char_mult_saved($et_index)" 2
6178 return $et_vect_char_mult_saved($et_index)
6181 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6183 proc check_effective_target_vect_short_mult { } {
6184 global et_vect_short_mult_saved
6187 if [info exists et_vect_short_mult_saved($et_index)] {
6188 verbose "check_effective_target_vect_short_mult: using cached result" 2
6190 set et_vect_short_mult_saved($et_index) 0
6191 if { [istarget ia64-*-*]
6192 || [istarget spu-*-*]
6193 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6194 || [istarget powerpc*-*-*]
6195 || [istarget aarch64*-*-*]
6196 || [check_effective_target_arm32]
6197 || ([istarget mips*-*-*]
6198 && ([et-is-effective-target mips_msa]
6199 || [et-is-effective-target mips_loongson])) } {
6200 set et_vect_short_mult_saved($et_index) 1
6204 verbose "check_effective_target_vect_short_mult:\
6205 returning $et_vect_short_mult_saved($et_index)" 2
6206 return $et_vect_short_mult_saved($et_index)
6209 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6211 proc check_effective_target_vect_int_mult { } {
6212 global et_vect_int_mult_saved
6215 if [info exists et_vect_int_mult_saved($et_index)] {
6216 verbose "check_effective_target_vect_int_mult: using cached result" 2
6218 set et_vect_int_mult_saved($et_index) 0
6219 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6220 || [istarget spu-*-*]
6221 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6222 || [istarget ia64-*-*]
6223 || [istarget aarch64*-*-*]
6224 || ([istarget mips*-*-*]
6225 && [et-is-effective-target mips_msa])
6226 || [check_effective_target_arm32] } {
6227 set et_vect_int_mult_saved($et_index) 1
6231 verbose "check_effective_target_vect_int_mult:\
6232 returning $et_vect_int_mult_saved($et_index)" 2
6233 return $et_vect_int_mult_saved($et_index)
6236 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6238 proc check_effective_target_vect_extract_even_odd { } {
6239 global et_vect_extract_even_odd_saved
6242 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6243 verbose "check_effective_target_vect_extract_even_odd:\
6244 using cached result" 2
6246 set et_vect_extract_even_odd_saved($et_index) 0
6247 if { [istarget aarch64*-*-*]
6248 || [istarget powerpc*-*-*]
6249 || [is-effective-target arm_neon]
6250 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6251 || [istarget ia64-*-*]
6252 || [istarget spu-*-*]
6253 || ([istarget mips*-*-*]
6254 && ([et-is-effective-target mips_msa]
6255 || [et-is-effective-target mpaired_single])) } {
6256 set et_vect_extract_even_odd_saved($et_index) 1
6260 verbose "check_effective_target_vect_extract_even_odd:\
6261 returning $et_vect_extract_even_odd_saved($et_index)" 2
6262 return $et_vect_extract_even_odd_saved($et_index)
6265 # Return 1 if the target supports vector interleaving, 0 otherwise.
6267 proc check_effective_target_vect_interleave { } {
6268 global et_vect_interleave_saved
6271 if [info exists et_vect_interleave_saved($et_index)] {
6272 verbose "check_effective_target_vect_interleave: using cached result" 2
6274 set et_vect_interleave_saved($et_index) 0
6275 if { [istarget aarch64*-*-*]
6276 || [istarget powerpc*-*-*]
6277 || [is-effective-target arm_neon]
6278 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6279 || [istarget ia64-*-*]
6280 || [istarget spu-*-*]
6281 || ([istarget mips*-*-*]
6282 && ([et-is-effective-target mpaired_single]
6283 || [et-is-effective-target mips_msa])) } {
6284 set et_vect_interleave_saved($et_index) 1
6288 verbose "check_effective_target_vect_interleave:\
6289 returning $et_vect_interleave_saved($et_index)" 2
6290 return $et_vect_interleave_saved($et_index)
6293 foreach N {2 3 4 8} {
6294 eval [string map [list N $N] {
6295 # Return 1 if the target supports 2-vector interleaving
6296 proc check_effective_target_vect_stridedN { } {
6297 global et_vect_stridedN_saved
6300 if [info exists et_vect_stridedN_saved($et_index)] {
6301 verbose "check_effective_target_vect_stridedN:\
6302 using cached result" 2
6304 set et_vect_stridedN_saved($et_index) 0
6306 && [check_effective_target_vect_interleave]
6307 && [check_effective_target_vect_extract_even_odd] } {
6308 set et_vect_stridedN_saved($et_index) 1
6310 if { ([istarget arm*-*-*]
6311 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6312 set et_vect_stridedN_saved($et_index) 1
6316 verbose "check_effective_target_vect_stridedN:\
6317 returning $et_vect_stridedN_saved($et_index)" 2
6318 return $et_vect_stridedN_saved($et_index)
6323 # Return 1 if the target supports multiple vector sizes
6325 proc check_effective_target_vect_multiple_sizes { } {
6326 global et_vect_multiple_sizes_saved
6329 set et_vect_multiple_sizes_saved($et_index) 0
6330 if { [istarget aarch64*-*-*]
6331 || [is-effective-target arm_neon]
6332 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6333 && ([check_avx_available] && ![check_prefer_avx128])) } {
6334 set et_vect_multiple_sizes_saved($et_index) 1
6337 verbose "check_effective_target_vect_multiple_sizes:\
6338 returning $et_vect_multiple_sizes_saved($et_index)" 2
6339 return $et_vect_multiple_sizes_saved($et_index)
6342 # Return 1 if the target supports vectors of 64 bits.
6344 proc check_effective_target_vect64 { } {
6345 global et_vect64_saved
6348 if [info exists et_vect64_saved($et_index)] {
6349 verbose "check_effective_target_vect64: using cached result" 2
6351 set et_vect64_saved($et_index) 0
6352 if { ([is-effective-target arm_neon]
6353 && [check_effective_target_arm_little_endian])
6354 || [istarget aarch64*-*-*]
6355 || [istarget sparc*-*-*] } {
6356 set et_vect64_saved($et_index) 1
6360 verbose "check_effective_target_vect64:\
6361 returning $et_vect64_saved($et_index)" 2
6362 return $et_vect64_saved($et_index)
6365 # Return 1 if the target supports vector copysignf calls.
6367 proc check_effective_target_vect_call_copysignf { } {
6368 global et_vect_call_copysignf_saved
6371 if [info exists et_vect_call_copysignf_saved($et_index)] {
6372 verbose "check_effective_target_vect_call_copysignf:\
6373 using cached result" 2
6375 set et_vect_call_copysignf_saved($et_index) 0
6376 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6377 || [istarget powerpc*-*-*]
6378 || [istarget aarch64*-*-*] } {
6379 set et_vect_call_copysignf_saved($et_index) 1
6383 verbose "check_effective_target_vect_call_copysignf:\
6384 returning $et_vect_call_copysignf_saved($et_index)" 2
6385 return $et_vect_call_copysignf_saved($et_index)
6388 # Return 1 if the target supports hardware square root instructions.
6390 proc check_effective_target_sqrt_insn { } {
6391 global et_sqrt_insn_saved
6393 if [info exists et_sqrt_insn_saved] {
6394 verbose "check_effective_target_hw_sqrt: using cached result" 2
6396 set et_sqrt_insn_saved 0
6397 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6398 || [istarget powerpc*-*-*]
6399 || [istarget aarch64*-*-*]
6400 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
6401 set et_sqrt_insn_saved 1
6405 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6406 return $et_sqrt_insn_saved
6409 # Return 1 if the target supports vector sqrtf calls.
6411 proc check_effective_target_vect_call_sqrtf { } {
6412 global et_vect_call_sqrtf_saved
6415 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6416 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6418 set et_vect_call_sqrtf_saved($et_index) 0
6419 if { [istarget aarch64*-*-*]
6420 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6421 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
6422 set et_vect_call_sqrtf_saved($et_index) 1
6426 verbose "check_effective_target_vect_call_sqrtf:\
6427 returning $et_vect_call_sqrtf_saved($et_index)" 2
6428 return $et_vect_call_sqrtf_saved($et_index)
6431 # Return 1 if the target supports vector lrint calls.
6433 proc check_effective_target_vect_call_lrint { } {
6434 set et_vect_call_lrint 0
6435 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6436 && [check_effective_target_ilp32]) } {
6437 set et_vect_call_lrint 1
6440 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6441 return $et_vect_call_lrint
6444 # Return 1 if the target supports vector btrunc calls.
6446 proc check_effective_target_vect_call_btrunc { } {
6447 global et_vect_call_btrunc_saved
6450 if [info exists et_vect_call_btrunc_saved($et_index)] {
6451 verbose "check_effective_target_vect_call_btrunc:\
6452 using cached result" 2
6454 set et_vect_call_btrunc_saved($et_index) 0
6455 if { [istarget aarch64*-*-*] } {
6456 set et_vect_call_btrunc_saved($et_index) 1
6460 verbose "check_effective_target_vect_call_btrunc:\
6461 returning $et_vect_call_btrunc_saved($et_index)" 2
6462 return $et_vect_call_btrunc_saved($et_index)
6465 # Return 1 if the target supports vector btruncf calls.
6467 proc check_effective_target_vect_call_btruncf { } {
6468 global et_vect_call_btruncf_saved
6471 if [info exists et_vect_call_btruncf_saved($et_index)] {
6472 verbose "check_effective_target_vect_call_btruncf:\
6473 using cached result" 2
6475 set et_vect_call_btruncf_saved($et_index) 0
6476 if { [istarget aarch64*-*-*] } {
6477 set et_vect_call_btruncf_saved($et_index) 1
6481 verbose "check_effective_target_vect_call_btruncf:\
6482 returning $et_vect_call_btruncf_saved($et_index)" 2
6483 return $et_vect_call_btruncf_saved($et_index)
6486 # Return 1 if the target supports vector ceil calls.
6488 proc check_effective_target_vect_call_ceil { } {
6489 global et_vect_call_ceil_saved
6492 if [info exists et_vect_call_ceil_saved($et_index)] {
6493 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6495 set et_vect_call_ceil_saved($et_index) 0
6496 if { [istarget aarch64*-*-*] } {
6497 set et_vect_call_ceil_saved($et_index) 1
6501 verbose "check_effective_target_vect_call_ceil:\
6502 returning $et_vect_call_ceil_saved($et_index)" 2
6503 return $et_vect_call_ceil_saved($et_index)
6506 # Return 1 if the target supports vector ceilf calls.
6508 proc check_effective_target_vect_call_ceilf { } {
6509 global et_vect_call_ceilf_saved
6512 if [info exists et_vect_call_ceilf_saved($et_index)] {
6513 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6515 set et_vect_call_ceilf_saved($et_index) 0
6516 if { [istarget aarch64*-*-*] } {
6517 set et_vect_call_ceilf_saved($et_index) 1
6521 verbose "check_effective_target_vect_call_ceilf:\
6522 returning $et_vect_call_ceilf_saved($et_index)" 2
6523 return $et_vect_call_ceilf_saved($et_index)
6526 # Return 1 if the target supports vector floor calls.
6528 proc check_effective_target_vect_call_floor { } {
6529 global et_vect_call_floor_saved
6532 if [info exists et_vect_call_floor_saved($et_index)] {
6533 verbose "check_effective_target_vect_call_floor: using cached result" 2
6535 set et_vect_call_floor_saved($et_index) 0
6536 if { [istarget aarch64*-*-*] } {
6537 set et_vect_call_floor_saved($et_index) 1
6541 verbose "check_effective_target_vect_call_floor:\
6542 returning $et_vect_call_floor_saved($et_index)" 2
6543 return $et_vect_call_floor_saved($et_index)
6546 # Return 1 if the target supports vector floorf calls.
6548 proc check_effective_target_vect_call_floorf { } {
6549 global et_vect_call_floorf_saved
6552 if [info exists et_vect_call_floorf_saved($et_index)] {
6553 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6555 set et_vect_call_floorf_saved($et_index) 0
6556 if { [istarget aarch64*-*-*] } {
6557 set et_vect_call_floorf_saved($et_index) 1
6561 verbose "check_effective_target_vect_call_floorf:\
6562 returning $et_vect_call_floorf_saved($et_index)" 2
6563 return $et_vect_call_floorf_saved($et_index)
6566 # Return 1 if the target supports vector lceil calls.
6568 proc check_effective_target_vect_call_lceil { } {
6569 global et_vect_call_lceil_saved
6572 if [info exists et_vect_call_lceil_saved($et_index)] {
6573 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6575 set et_vect_call_lceil_saved($et_index) 0
6576 if { [istarget aarch64*-*-*] } {
6577 set et_vect_call_lceil_saved($et_index) 1
6581 verbose "check_effective_target_vect_call_lceil:\
6582 returning $et_vect_call_lceil_saved($et_index)" 2
6583 return $et_vect_call_lceil_saved($et_index)
6586 # Return 1 if the target supports vector lfloor calls.
6588 proc check_effective_target_vect_call_lfloor { } {
6589 global et_vect_call_lfloor_saved
6592 if [info exists et_vect_call_lfloor_saved($et_index)] {
6593 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6595 set et_vect_call_lfloor_saved($et_index) 0
6596 if { [istarget aarch64*-*-*] } {
6597 set et_vect_call_lfloor_saved($et_index) 1
6601 verbose "check_effective_target_vect_call_lfloor:\
6602 returning $et_vect_call_lfloor_saved($et_index)" 2
6603 return $et_vect_call_lfloor_saved($et_index)
6606 # Return 1 if the target supports vector nearbyint calls.
6608 proc check_effective_target_vect_call_nearbyint { } {
6609 global et_vect_call_nearbyint_saved
6612 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6613 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6615 set et_vect_call_nearbyint_saved($et_index) 0
6616 if { [istarget aarch64*-*-*] } {
6617 set et_vect_call_nearbyint_saved($et_index) 1
6621 verbose "check_effective_target_vect_call_nearbyint:\
6622 returning $et_vect_call_nearbyint_saved($et_index)" 2
6623 return $et_vect_call_nearbyint_saved($et_index)
6626 # Return 1 if the target supports vector nearbyintf calls.
6628 proc check_effective_target_vect_call_nearbyintf { } {
6629 global et_vect_call_nearbyintf_saved
6632 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6633 verbose "check_effective_target_vect_call_nearbyintf:\
6634 using cached result" 2
6636 set et_vect_call_nearbyintf_saved($et_index) 0
6637 if { [istarget aarch64*-*-*] } {
6638 set et_vect_call_nearbyintf_saved($et_index) 1
6642 verbose "check_effective_target_vect_call_nearbyintf:\
6643 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6644 return $et_vect_call_nearbyintf_saved($et_index)
6647 # Return 1 if the target supports vector round calls.
6649 proc check_effective_target_vect_call_round { } {
6650 global et_vect_call_round_saved
6653 if [info exists et_vect_call_round_saved($et_index)] {
6654 verbose "check_effective_target_vect_call_round: using cached result" 2
6656 set et_vect_call_round_saved($et_index) 0
6657 if { [istarget aarch64*-*-*] } {
6658 set et_vect_call_round_saved($et_index) 1
6662 verbose "check_effective_target_vect_call_round:\
6663 returning $et_vect_call_round_saved($et_index)" 2
6664 return $et_vect_call_round_saved($et_index)
6667 # Return 1 if the target supports vector roundf calls.
6669 proc check_effective_target_vect_call_roundf { } {
6670 global et_vect_call_roundf_saved
6673 if [info exists et_vect_call_roundf_saved($et_index)] {
6674 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6676 set et_vect_call_roundf_saved($et_index) 0
6677 if { [istarget aarch64*-*-*] } {
6678 set et_vect_call_roundf_saved($et_index) 1
6682 verbose "check_effective_target_vect_call_roundf:\
6683 returning $et_vect_call_roundf_saved($et_index)" 2
6684 return $et_vect_call_roundf_saved($et_index)
6687 # Return 1 if the target supports section-anchors
6689 proc check_effective_target_section_anchors { } {
6690 global et_section_anchors_saved
6692 if [info exists et_section_anchors_saved] {
6693 verbose "check_effective_target_section_anchors: using cached result" 2
6695 set et_section_anchors_saved 0
6696 if { [istarget powerpc*-*-*]
6697 || [istarget arm*-*-*]
6698 || [istarget aarch64*-*-*] } {
6699 set et_section_anchors_saved 1
6703 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6704 return $et_section_anchors_saved
6707 # Return 1 if the target supports atomic operations on "int_128" values.
6709 proc check_effective_target_sync_int_128 { } {
6710 if { [istarget spu-*-*] } {
6717 # Return 1 if the target supports atomic operations on "int_128" values
6718 # and can execute them.
6719 # This requires support for both compare-and-swap and true atomic loads.
6721 proc check_effective_target_sync_int_128_runtime { } {
6722 if { [istarget spu-*-*] } {
6729 # Return 1 if the target supports atomic operations on "long long".
6731 # Note: 32bit x86 targets require -march=pentium in dg-options.
6732 # Note: 32bit s390 targets require -mzarch in dg-options.
6734 proc check_effective_target_sync_long_long { } {
6735 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6736 || [istarget aarch64*-*-*]
6737 || [istarget arm*-*-*]
6738 || [istarget alpha*-*-*]
6739 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6740 || [istarget s390*-*-*]
6741 || [istarget spu-*-*] } {
6748 # Return 1 if the target supports atomic operations on "long long"
6749 # and can execute them.
6751 # Note: 32bit x86 targets require -march=pentium in dg-options.
6753 proc check_effective_target_sync_long_long_runtime { } {
6754 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6755 && [check_cached_effective_target sync_long_long_available {
6756 check_runtime_nocache sync_long_long_available {
6760 unsigned int eax, ebx, ecx, edx;
6761 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6762 return !(edx & bit_CMPXCHG8B);
6767 || [istarget aarch64*-*-*]
6768 || ([istarget arm*-*-linux-*]
6769 && [check_runtime sync_longlong_runtime {
6775 if (sizeof (long long) != 8)
6778 /* Just check for native;
6779 checking for kernel fallback is tricky. */
6780 asm volatile ("ldrexd r0,r1, [%0]"
6781 : : "r" (&l1) : "r0", "r1");
6785 || [istarget alpha*-*-*]
6786 || ([istarget sparc*-*-*]
6787 && [check_effective_target_lp64]
6788 && [check_effective_target_ultrasparc_hw])
6789 || [istarget spu-*-*]
6790 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6797 # Return 1 if the target supports byte swap instructions.
6799 proc check_effective_target_bswap { } {
6800 global et_bswap_saved
6802 if [info exists et_bswap_saved] {
6803 verbose "check_effective_target_bswap: using cached result" 2
6805 set et_bswap_saved 0
6806 if { [istarget aarch64*-*-*]
6807 || [istarget alpha*-*-*]
6808 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6809 || [istarget m68k-*-*]
6810 || [istarget powerpc*-*-*]
6811 || [istarget rs6000-*-*]
6812 || [istarget s390*-*-*]
6813 || ([istarget arm*-*-*]
6814 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6816 #error not armv6 or later
6820 set et_bswap_saved 1
6824 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
6825 return $et_bswap_saved
6828 # Return 1 if the target supports 16-bit byte swap instructions.
6830 proc check_effective_target_bswap16 { } {
6831 global et_bswap16_saved
6833 if [info exists et_bswap16_saved] {
6834 verbose "check_effective_target_bswap16: using cached result" 2
6836 set et_bswap16_saved 0
6837 if { [is-effective-target bswap]
6838 && ![istarget alpha*-*-*]
6839 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
6840 set et_bswap16_saved 1
6844 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
6845 return $et_bswap16_saved
6848 # Return 1 if the target supports 32-bit byte swap instructions.
6850 proc check_effective_target_bswap32 { } {
6851 global et_bswap32_saved
6853 if [info exists et_bswap32_saved] {
6854 verbose "check_effective_target_bswap32: using cached result" 2
6856 set et_bswap32_saved 0
6857 if { [is-effective-target bswap] } {
6858 set et_bswap32_saved 1
6862 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
6863 return $et_bswap32_saved
6866 # Return 1 if the target supports 64-bit byte swap instructions.
6868 # Note: 32bit s390 targets require -mzarch in dg-options.
6870 proc check_effective_target_bswap64 { } {
6871 global et_bswap64_saved
6873 # expand_unop can expand 64-bit byte swap on 32-bit targets
6874 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
6880 # Return 1 if the target supports atomic operations on "int" and "long".
6882 proc check_effective_target_sync_int_long { } {
6883 global et_sync_int_long_saved
6885 if [info exists et_sync_int_long_saved] {
6886 verbose "check_effective_target_sync_int_long: using cached result" 2
6888 set et_sync_int_long_saved 0
6889 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6890 #
load-reserved/store
-conditional instructions.
6891 if { [istarget ia64
-*-*]
6892 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6893 ||
[istarget aarch64
*-*-*]
6894 ||
[istarget alpha
*-*-*]
6895 ||
[istarget arm
*-*-linux
-*]
6896 ||
([istarget arm
*-*-*]
6897 && [check_effective_target_arm_acq_rel
])
6898 ||
[istarget bfin
*-*linux
*]
6899 ||
[istarget hppa
*-*linux
*]
6900 ||
[istarget s390
*-*-*]
6901 ||
[istarget powerpc
*-*-*]
6902 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
6903 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
6904 ||
[istarget spu
-*-*]
6905 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
6906 ||
[check_effective_target_mips_llsc
] } {
6907 set et_sync_int_long_saved
1
6911 verbose
"check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6912 return $et_sync_int_long_saved
6915 #
Return 1 if the target supports atomic operations
on "char" and "short".
6917 proc check_effective_target_sync_char_short
{ } {
6918 global et_sync_char_short_saved
6920 if [info exists et_sync_char_short_saved
] {
6921 verbose
"check_effective_target_sync_char_short: using cached result" 2
6923 set et_sync_char_short_saved
0
6924 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
6925 # load-reserved/store-conditional instructions.
6926 if { [istarget aarch64*-*-*]
6927 || [istarget ia64-*-*]
6928 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6929 || [istarget alpha*-*-*]
6930 || [istarget arm*-*-linux-*]
6931 || ([istarget arm*-*-*]
6932 && [check_effective_target_arm_acq_rel])
6933 || [istarget hppa*-*linux*]
6934 || [istarget s390*-*-*]
6935 || [istarget powerpc*-*-*]
6936 || [istarget crisv32-*-*] || [istarget cris-*-*]
6937 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6938 || [istarget spu-*-*]
6939 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6940 || [check_effective_target_mips_llsc] } {
6941 set et_sync_char_short_saved 1
6945 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6946 return $et_sync_char_short_saved
6949 # Return 1 if the target uses a ColdFire FPU.
6951 proc check_effective_target_coldfire_fpu { } {
6952 return [check_no_compiler_messages coldfire_fpu assembly {
6959 # Return true if this is a uClibc target.
6961 proc check_effective_target_uclibc {} {
6962 return [check_no_compiler_messages uclibc object {
6963 #include <features.h>
6964 #if !defined (__UCLIBC__)
6970 # Return true if this is a uclibc target and if the uclibc feature
6971 # described by __$feature__ is not present.
6973 proc check_missing_uclibc_feature {feature} {
6974 return [check_no_compiler_messages $feature object "
6975 #include <features.h>
6976 #if !defined (__UCLIBC) || defined (__${feature}__)
6982 # Return true if this is a Newlib target.
6984 proc check_effective_target_newlib {} {
6985 return [check_no_compiler_messages newlib object {
6990 # Some newlib versions don't provide a frexpl and instead depend
6991 #
on frexp to implement long double conversions in their printf
-like
6992 # functions. This leads to broken results. Detect such versions here.
6994 proc check_effective_target_newlib_broken_long_double_io
{} {
6995 if { [is
-effective
-target newlib
] && ![is
-effective
-target frexpl
] } {
7001 #
Return true
if this is NOT a Bionic target.
7003 proc check_effective_target_non_bionic
{} {
7004 return [check_no_compiler_messages non_bionic object
{
7006 #
if defined
(__BIONIC__
)
7012 #
Return true
if this target has error.h header.
7014 proc check_effective_target_error_h
{} {
7015 return [check_no_compiler_messages error_h object
{
7020 #
Return true
if this target has tgmath.h header.
7022 proc check_effective_target_tgmath_h
{} {
7023 return [check_no_compiler_messages tgmath_h object
{
7028 #
Return true
if target
's libc supports complex functions.
7030 proc check_effective_target_libc_has_complex_functions {} {
7031 return [check_no_compiler_messages libc_has_complex_functions object {
7032 #include <complex.h>
7037 # (a) an error of a few ULP is expected in string to floating-point
7038 # conversion functions; and
7039 # (b) overflow is not always detected correctly by those functions.
7041 proc check_effective_target_lax_strtofp {} {
7042 # By default, assume that all uClibc targets suffer from this.
7043 return [check_effective_target_uclibc]
7046 # Return 1 if this is a target for which wcsftime is a dummy
7047 # function that always returns 0.
7049 proc check_effective_target_dummy_wcsftime {} {
7050 # By default, assume that all uClibc targets suffer from this.
7051 return [check_effective_target_uclibc]
7054 # Return 1 if constructors with initialization priority arguments are
7055 # supposed on this target.
7057 proc check_effective_target_init_priority {} {
7058 return [check_no_compiler_messages init_priority assembly "
7059 void f() __attribute__((constructor (1000)));
7064 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7065 # This can be used with any check_* proc that takes no argument and
7066 # returns only 1 or 0. It could be used with check_* procs that take
7067 # arguments with keywords that pass particular arguments.
7069 proc is-effective-target { arg } {
7072 if { ![info exists et_index] } {
7073 # Initialize the effective target index that is used in some
7074 # check_effective_target_* procs.
7077 if { [info procs check_effective_target_${arg}] != [list] } {
7078 set selected [check_effective_target_${arg}]
7081 "vmx_hw" { set selected [check_vmx_hw_available] }
7082 "vsx_hw" { set selected [check_vsx_hw_available] }
7083 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7084 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7085 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7086 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7087 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7088 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7089 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7090 "dfp_hw" { set selected [check_dfp_hw_available] }
7091 "htm_hw" { set selected [check_htm_hw_available] }
7092 "named_sections" { set selected [check_named_sections_available] }
7093 "gc_sections" { set selected [check_gc_sections_available] }
7094 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7095 default { error "unknown effective target keyword `$arg'" }
7098 verbose
"is-effective-target: $arg $selected" 2
7102 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7104 proc is
-effective
-target
-keyword
{ arg } {
7105 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7108 # These have different names
for their check_
* procs.
7110 "vmx_hw" { return 1 }
7111 "vsx_hw" { return 1 }
7112 "p8vector_hw" { return 1 }
7113 "p9vector_hw" { return 1 }
7114 "p9modulo_hw" { return 1 }
7115 "ppc_float128_sw" { return 1 }
7116 "ppc_float128_hw" { return 1 }
7117 "ppc_recip_hw" { return 1 }
7118 "dfp_hw" { return 1 }
7119 "htm_hw" { return 1 }
7120 "named_sections" { return 1 }
7121 "gc_sections" { return 1 }
7122 "cxa_atexit" { return 1 }
7123 default
{ return 0 }
7128 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7129 # indicate what target is currently being processed. This is
for
7130 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7133 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7134 global dg
-do-what
-default
7135 global EFFECTIVE_TARGETS
7138 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7139 foreach target $EFFECTIVE_TARGETS
{
7140 set target_flags $flags
7141 set dg
-do-what
-default
compile
7142 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7143 if { [info procs add_options_for_$
{target
}] != [list
] } {
7144 set target_flags
[add_options_for_$
{target
} "$flags"]
7146 if { [info procs check_effective_target_$
{target
}_runtime
]
7147 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7148 set dg
-do-what
-default run
7150 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7154 $runtest $testcases $flags $
{default
-extra
-flags
}
7158 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7159 # et_index
, 0 otherwise.
7161 proc et
-is
-effective
-target
{ target
} {
7162 global EFFECTIVE_TARGETS
7165 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7166 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7172 #
Return 1 if target default to short enums
7174 proc check_effective_target_short_enums
{ } {
7175 return [check_no_compiler_messages short_enums assembly
{
7177 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7181 #
Return 1 if target supports merging string constants at link time.
7183 proc check_effective_target_string_merging
{ } {
7184 return [check_no_messages_and_pattern string_merging \
7185 "rodata\\.str" assembly {
7186 const char
*var
= "String";
7190 #
Return 1 if target has the basic signed and unsigned types in
7191 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7192 # working
<stdint.h
> for all targets.
7194 proc check_effective_target_stdint_types
{ } {
7195 return [check_no_compiler_messages stdint_types assembly
{
7197 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7198 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7202 #
Return 1 if target has the basic signed and unsigned types in
7203 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7204 # these types agree with those in the header, as some systems have
7205 # only <inttypes.h>.
7207 proc check_effective_target_inttypes_types { } {
7208 return [check_no_compiler_messages inttypes_types assembly {
7209 #include <inttypes.h>
7210 int8_t a; int16_t b; int32_t c; int64_t d;
7211 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7215 # Return 1 if programs are intended to be run on a simulator
7216 # (i.e. slowly) rather than hardware (i.e. fast).
7218 proc check_effective_target_simulator { } {
7220 # All "src/sim" simulators set this one.
7221 if [board_info target exists is_simulator] {
7222 return [board_info target is_simulator]
7225 # The "sid" simulators don't
set that one
, but at least they
set
7227 if [board_info target
exists slow_simulator
] {
7228 return [board_info target slow_simulator
]
7234 #
Return 1 if programs are intended to be run
on hardware rather than
7237 proc check_effective_target_hw
{ } {
7239 # All
"src/sim" simulators set this one.
7240 if [board_info target
exists is_simulator
] {
7241 if [board_info target is_simulator
] {
7248 # The
"sid" simulators don't set that one, but at least they set
7250 if [board_info target
exists slow_simulator
] {
7251 if [board_info target slow_simulator
] {
7261 #
Return 1 if the target is a VxWorks kernel.
7263 proc check_effective_target_vxworks_kernel
{ } {
7264 return [check_no_compiler_messages vxworks_kernel assembly
{
7265 #
if !defined __vxworks || defined __RTP__
7271 #
Return 1 if the target is a VxWorks RTP.
7273 proc check_effective_target_vxworks_rtp
{ } {
7274 return [check_no_compiler_messages vxworks_rtp assembly
{
7275 #
if !defined __vxworks ||
!defined __RTP__
7281 #
Return 1 if the target is expected to provide wide character support.
7283 proc check_effective_target_wchar
{ } {
7284 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7287 return [check_no_compiler_messages wchar assembly
{
7292 #
Return 1 if the target has
<pthread.h
>.
7294 proc check_effective_target_pthread_h
{ } {
7295 return [check_no_compiler_messages pthread_h assembly
{
7296 #
include <pthread.h
>
7300 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7301 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7302 # chsize. We test
for a trivially functional truncation
; no stubs.
7303 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7304 # different function to be used.
7306 proc check_effective_target_fd_truncate { } {
7308 #define _FILE_OFFSET_BITS 64
7315 FILE *f = fopen ("tst.tmp", "wb");
7317 const char t[] = "test writing more than ten characters";
7321 write (fd, t, sizeof (t) - 1);
7323 if (ftruncate (fd, 10) != 0)
7332 f = fopen ("tst.tmp", "rb");
7333 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7341 if { [check_runtime ftruncate $prog] } {
7345 regsub "ftruncate" $prog "chsize" prog
7346 return [check_runtime chsize $prog]
7349 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7351 proc add_options_for_c99_runtime { flags } {
7352 if { [istarget *-*-solaris2*] } {
7353 return "$flags -std=c99"
7355 if { [istarget powerpc-*-darwin*] } {
7356 return "$flags -mmacosx-version-min=10.3"
7361 # Add to FLAGS all the target-specific flags needed to enable
7362 # full IEEE compliance mode.
7364 proc add_options_for_ieee { flags } {
7365 if { [istarget alpha*-*-*]
7366 || [istarget sh*-*-*] } {
7367 return "$flags -mieee"
7369 if { [istarget rx-*-*] } {
7370 return "$flags -mnofpu"
7375 if {![info exists flags_to_postpone]} {
7376 set flags_to_postpone ""
7379 # Add to FLAGS the flags needed to enable functions to bind locally
7380 # when using pic/PIC passes in the testsuite.
7381 proc add_options_for_bind_pic_locally { flags } {
7382 global flags_to_postpone
7384 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7385 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7386 # order to make sure that the multilib_flags doesn't override this.
7388 if {[check_no_compiler_messages using_pic2 assembly
{
7393 set flags_to_postpone
"-fPIE"
7396 if {[check_no_compiler_messages using_pic1 assembly
{
7401 set flags_to_postpone
"-fpie"
7407 # Add to FLAGS the flags needed to enable
64-bit vectors.
7409 proc add_options_for_double_vectors
{ flags
} {
7410 if [is
-effective
-target arm_neon_ok
] {
7411 return "$flags -mvectorize-with-neon-double"
7417 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
7419 proc add_options_for_stack_size
{ flags
} {
7420 if [is
-effective
-target stack_size
] {
7421 set stack_size
[dg
-effective
-target
-value stack_size
]
7422 return "$flags -DSTACK_SIZE=$stack_size"
7428 #
Return 1 if the target provides a full C99 runtime.
7430 proc check_effective_target_c99_runtime
{ } {
7431 return [check_cached_effective_target c99_runtime
{
7434 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7435 set contents
[read $file
]
7438 #ifndef HAVE_C99_RUNTIME
7439 #error
!HAVE_C99_RUNTIME
7442 check_no_compiler_messages_nocache c99_runtime assembly \
7443 $contents
[add_options_for_c99_runtime
""]
7447 #
Return 1 if target wchar_t is at least
4 bytes.
7449 proc check_effective_target_4byte_wchar_t
{ } {
7450 return [check_no_compiler_messages
4byte_wchar_t object
{
7451 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
7455 #
Return 1 if the target supports automatic stack alignment.
7457 proc check_effective_target_automatic_stack_alignment
{ } {
7458 # Ordinarily x86 supports automatic stack alignment ...
7459 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
7460 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
7461 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
7462 return [check_effective_target_ilp32];
7469 # Return true if we are compiling for AVX target.
7471 proc check_avx_available { } {
7472 if { [check_no_compiler_messages avx_available assembly {
7482 # Return true if 32- and 16-bytes vectors are available.
7484 proc check_effective_target_vect_sizes_32B_16B { } {
7485 if { [check_avx_available] && ![check_prefer_avx128] } {
7492 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7495 proc check_prefer_avx128 { } {
7496 if ![check_avx_available] {
7499 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7500 float a[1024],b[1024],c[1024];
7501 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7502 } "-O2 -ftree-vectorize"]
7506 # Return 1 if avx512f instructions can be compiled.
7508 proc check_effective_target_avx512f { } {
7509 return [check_no_compiler_messages avx512f object {
7510 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7512 __m512d _mm512_add (__m512d a)
7514 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7519 # Return 1 if avx instructions can be compiled.
7521 proc check_effective_target_avx { } {
7522 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7525 return [check_no_compiler_messages avx object {
7526 void _mm256_zeroall (void)
7528 __builtin_ia32_vzeroall ();
7533 # Return 1 if avx2 instructions can be compiled.
7534 proc check_effective_target_avx2 { } {
7535 return [check_no_compiler_messages avx2 object {
7536 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7538 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7540 return __builtin_ia32_andnotsi256 (__X, __Y);
7545 # Return 1 if sse instructions can be compiled.
7546 proc check_effective_target_sse { } {
7547 return [check_no_compiler_messages sse object {
7550 __builtin_ia32_stmxcsr ();
7556 # Return 1 if sse2 instructions can be compiled.
7557 proc check_effective_target_sse2 { } {
7558 return [check_no_compiler_messages sse2 object {
7559 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7561 __m128i _mm_srli_si128 (__m128i __A, int __N)
7563 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7568 # Return 1 if sse4.1 instructions can be compiled.
7569 proc check_effective_target_sse4 { } {
7570 return [check_no_compiler_messages sse4.1 object {
7571 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7572 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7574 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7576 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7582 # Return 1 if F16C instructions can be compiled.
7584 proc check_effective_target_f16c { } {
7585 return [check_no_compiler_messages f16c object {
7586 #include "immintrin.h"
7588 foo (unsigned short val)
7590 return _cvtsh_ss (val);
7595 # Return 1 if C wchar_t type is compatible with char16_t.
7597 proc check_effective_target_wchar_t_char16_t_compatible { } {
7598 return [check_no_compiler_messages wchar_t_char16_t object {
7600 __CHAR16_TYPE__ *p16 = &wc;
7601 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7605 # Return 1 if C wchar_t type is compatible with char32_t.
7607 proc check_effective_target_wchar_t_char32_t_compatible { } {
7608 return [check_no_compiler_messages wchar_t_char32_t object {
7610 __CHAR32_TYPE__ *p32 = &wc;
7611 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7615 # Return 1 if pow10 function exists.
7617 proc check_effective_target_pow10 { } {
7618 return [check_runtime pow10 {
7628 # Return 1 if frexpl function exists.
7630 proc check_effective_target_frexpl { } {
7631 return [check_runtime frexpl {
7636 x = frexpl (5.0, &y);
7643 # Return 1 if issignaling function exists.
7644 proc check_effective_target_issignaling {} {
7645 return [check_runtime issignaling {
7650 return issignaling (0.0);
7655 # Return 1 if current options generate DFP instructions, 0 otherwise.
7656 proc check_effective_target_hard_dfp {} {
7657 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7658 typedef float d64 __attribute__((mode(DD)));
7660 void foo (void) { z = x + y; }
7664 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7665 # for strchr etc. functions.
7667 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7668 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7671 #if !defined(__cplusplus) \
7672 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7673 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7674 ISO C++ correct string.h and wchar.h protos not supported.
7681 # Return 1 if GNU as is used.
7683 proc check_effective_target_gas { } {
7684 global use_gas_saved
7687 if {![info exists use_gas_saved]} {
7688 # Check if the as used by gcc is GNU as.
7689 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7690 # Provide /dev/null as input, otherwise gas times out reading from
7692 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7693 set as_output [lindex $status 1]
7694 if { [ string first "GNU" $as_output ] >= 0 } {
7700 return $use_gas_saved
7703 # Return 1 if GNU ld is used.
7705 proc check_effective_target_gld { } {
7706 global use_gld_saved
7709 if {![info exists use_gld_saved]} {
7710 # Check if the ld used by gcc is GNU ld.
7711 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7712 set status [remote_exec host "$gcc_ld" "--version"]
7713 set ld_output [lindex $status 1]
7714 if { [ string first "GNU" $ld_output ] >= 0 } {
7720 return $use_gld_saved
7723 # Return 1 if the compiler has been configure with link-time optimization
7726 proc check_effective_target_lto { } {
7727 if { [istarget nvptx-*-*] } {
7730 return [check_no_compiler_messages lto object {
7735 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7737 proc check_effective_target_maybe_x32 { } {
7738 return [check_no_compiler_messages maybe_x32 object {
7740 } "-mx32 -maddress-mode=short"]
7743 # Return 1 if this target supports the -fsplit-stack option, 0
7746 proc check_effective_target_split_stack {} {
7747 return [check_no_compiler_messages split_stack object {
7752 # Return 1 if this target supports the -masm=intel option, 0
7755 proc check_effective_target_masm_intel {} {
7756 return [check_no_compiler_messages masm_intel object {
7757 extern void abort (void);
7761 # Return 1 if the language for the compiler under test is C.
7763 proc check_effective_target_c { } {
7765 if [string match $tool "gcc"] {
7771 # Return 1 if the language for the compiler under test is C++.
7773 proc check_effective_target_c++ { } {
7775 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7781 set cxx_default "c++14"
7782 # Check whether the current active language standard supports the features
7783 # of C++11/C++14 by checking for the presence of one of the -std flags.
7784 # This assumes that the default for the compiler is $cxx_default, and that
7785 # there will never be multiple -std= arguments on the command line.
7786 proc check_effective_target_c++11_only { } {
7788 if ![check_effective_target_c++] {
7791 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7794 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7799 proc check_effective_target_c++11 { } {
7800 if [check_effective_target_c++11_only] {
7803 return [check_effective_target_c++14]
7805 proc check_effective_target_c++11_down { } {
7806 if ![check_effective_target_c++] {
7809 return [expr ![check_effective_target_c++14] ]
7812 proc check_effective_target_c++14_only { } {
7814 if ![check_effective_target_c++] {
7817 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7820 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7826 proc check_effective_target_c++14 { } {
7827 if [check_effective_target_c++14_only] {
7830 return [check_effective_target_c++1z]
7832 proc check_effective_target_c++14_down { } {
7833 if ![check_effective_target_c++] {
7836 return [expr ![check_effective_target_c++1z] ]
7839 proc check_effective_target_c++98_only { } {
7841 if ![check_effective_target_c++] {
7844 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7847 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7853 proc check_effective_target_c++1z_only { } {
7855 if ![check_effective_target_c++] {
7858 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7861 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7866 proc check_effective_target_c++1z { } {
7867 return [check_effective_target_c++1z_only]
7870 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7871 proc check_effective_target_concepts { } {
7872 return [check-flags { "" { } { -fconcepts } }]
7875 # Return 1 if expensive testcases should be run.
7877 proc check_effective_target_run_expensive_tests { } {
7878 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7884 # Returns 1 if "mempcpy" is available on the target system.
7886 proc check_effective_target_mempcpy {} {
7887 return [check_function_available "mempcpy"]
7890 # Returns 1 if "stpcpy" is available on the target system.
7892 proc check_effective_target_stpcpy {} {
7893 return [check_function_available "stpcpy"]
7896 # Check whether the vectorizer tests are supported by the target and
7897 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7898 # If a port wants to execute the tests more than once it should append
7899 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7900 # will be added by a call to add_options_for_<target>.
7901 # Set dg-do-what-default to either compile or run, depending on target
7902 # capabilities. Do not set this if the supported target is appended to
7903 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7904 # automatically. Return the number of effective targets if vectorizer tests
7905 # are supported, 0 otherwise.
7907 proc check_vect_support_and_set_flags { } {
7908 global DEFAULT_VECTCFLAGS
7909 global dg-do-what-default
7910 global EFFECTIVE_TARGETS
7912 if [istarget powerpc-*paired*] {
7913 lappend DEFAULT_VECTCFLAGS "-mpaired"
7914 if [check_750cl_hw_available] {
7915 set dg-do-what-default run
7917 set dg-do-what-default compile
7919 } elseif [istarget powerpc*-*-*] {
7920 # Skip targets not supporting -maltivec.
7921 if ![is-effective-target powerpc_altivec_ok] {
7925 lappend DEFAULT_VECTCFLAGS "-maltivec"
7926 if [check_p9vector_hw_available] {
7927 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7928 } elseif [check_p8vector_hw_available] {
7929 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7930 } elseif [check_vsx_hw_available] {
7931 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7934 if [check_vmx_hw_available] {
7935 set dg-do-what-default run
7937 if [is-effective-target ilp32] {
7938 # Specify a cpu that supports VMX for compile-only tests.
7939 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7941 set dg-do-what-default compile
7943 } elseif { [istarget spu-*-*] } {
7944 set dg-do-what-default run
7945 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7946 lappend DEFAULT_VECTCFLAGS "-msse2"
7947 if { [check_effective_target_sse2_runtime] } {
7948 set dg-do-what-default run
7950 set dg-do-what-default compile
7952 } elseif { [istarget mips*-*-*]
7953 && [check_effective_target_nomips16] } {
7954 if { [check_effective_target_mpaired_single] } {
7955 lappend EFFECTIVE_TARGETS mpaired_single
7957 if { [check_effective_target_mips_loongson] } {
7958 lappend EFFECTIVE_TARGETS mips_loongson
7960 if { [check_effective_target_mips_msa] } {
7961 lappend EFFECTIVE_TARGETS mips_msa
7963 return [llength $EFFECTIVE_TARGETS]
7964 } elseif [istarget sparc*-*-*] {
7965 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7966 if [check_effective_target_ultrasparc_hw] {
7967 set dg-do-what-default run
7969 set dg-do-what-default compile
7971 } elseif [istarget alpha*-*-*] {
7972 # Alpha's vectorization capabilities are extremely limited.
7973 # It
's more effort than its worth disabling all of the tests
7974 # that it cannot pass. But if you actually want to see what
7975 # does work, command out the return.
7978 lappend DEFAULT_VECTCFLAGS "-mmax"
7979 if [check_alpha_max_hw_available] {
7980 set dg-do-what-default run
7982 set dg-do-what-default compile
7984 } elseif [istarget ia64-*-*] {
7985 set dg-do-what-default run
7986 } elseif [is-effective-target arm_neon_ok] {
7987 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7988 # NEON does not support denormals, so is not used for vectorization by
7989 # default to avoid loss of precision. We must pass -ffast-math to test
7990 # vectorization of float operations.
7991 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7992 if [is-effective-target arm_neon_hw] {
7993 set dg-do-what-default run
7995 set dg-do-what-default compile
7997 } elseif [istarget "aarch64*-*-*"] {
7998 set dg-do-what-default run
8006 # Return 1 if the target does *not* require strict alignment.
8008 proc check_effective_target_non_strict_align {} {
8010 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8011 # are interfaces defined for misaligned access and thus
8012 # depending on the architecture levels unaligned access is
8014 if [istarget "arm*-*-*"] {
8015 return [check_effective_target_arm_unaligned]
8018 return [check_no_compiler_messages non_strict_align assembly {
8020 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8022 void foo(void) { z = (c *) y; }
8026 # Return 1 if the target has <ucontext.h>.
8028 proc check_effective_target_ucontext_h { } {
8029 return [check_no_compiler_messages ucontext_h assembly {
8030 #include <ucontext.h>
8034 proc check_effective_target_aarch64_tiny { } {
8035 if { [istarget aarch64*-*-*] } {
8036 return [check_no_compiler_messages aarch64_tiny object {
8037 #ifdef __AARCH64_CMODEL_TINY__
8040 #error target not AArch64 tiny code model
8048 # Create functions to check that the AArch64 assembler supports the
8049 # various architecture extensions via the .arch_extension pseudo-op.
8051 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
8052 eval [string map [list FUNC $aarch64_ext] {
8053 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8054 if { [istarget aarch64*-*-*] } {
8055 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8056 __asm__ (".arch_extension FUNC");
8057 } "-march=armv8-a+FUNC"]
8065 proc check_effective_target_aarch64_small { } {
8066 if { [istarget aarch64*-*-*] } {
8067 return [check_no_compiler_messages aarch64_small object {
8068 #ifdef __AARCH64_CMODEL_SMALL__
8071 #error target not AArch64 small code model
8079 proc check_effective_target_aarch64_large { } {
8080 if { [istarget aarch64*-*-*] } {
8081 return [check_no_compiler_messages aarch64_large object {
8082 #ifdef __AARCH64_CMODEL_LARGE__
8085 #error target not AArch64 large code model
8094 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8095 # register set, instruction set, addressing capabilities and ABI.
8097 proc check_effective_target_avr_tiny { } {
8098 if { [istarget avr*-*-*] } {
8099 return [check_no_compiler_messages avr_tiny object {
8103 #error target not a reduced AVR Tiny core
8111 # Return 1 if <fenv.h> is available with all the standard IEEE
8112 # exceptions and floating-point exceptions are raised by arithmetic
8113 # operations. (If the target requires special options for "inexact"
8114 # exceptions, those need to be specified in the testcases.)
8116 proc check_effective_target_fenv_exceptions {} {
8117 return [check_runtime fenv_exceptions {
8120 #ifndef FE_DIVBYZERO
8121 # error Missing FE_DIVBYZERO
8124 # error Missing FE_INEXACT
8127 # error Missing FE_INVALID
8130 # error Missing FE_OVERFLOW
8132 #ifndef FE_UNDERFLOW
8133 # error Missing FE_UNDERFLOW
8135 volatile float a = 0.0f, r;
8140 if (fetestexcept (FE_INVALID))
8145 } [add_options_for_ieee "-std=gnu99"]]
8148 proc check_effective_target_tiny {} {
8149 global et_target_tiny_saved
8151 if [info exists et_target_tiny_saved] {
8152 verbose "check_effective_target_tiny: using cached result" 2
8154 set et_target_tiny_saved 0
8155 if { [istarget aarch64*-*-*]
8156 && [check_effective_target_aarch64_tiny] } {
8157 set et_target_tiny_saved 1
8159 if { [istarget avr-*-*]
8160 && [check_effective_target_avr_tiny] } {
8161 set et_target_tiny_saved 1
8165 return $et_target_tiny_saved
8168 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8170 proc check_effective_target_logical_op_short_circuit {} {
8171 if { [istarget mips*-*-*]
8172 || [istarget arc*-*-*]
8173 || [istarget avr*-*-*]
8174 || [istarget crisv32-*-*] || [istarget cris-*-*]
8175 || [istarget mmix-*-*]
8176 || [istarget s390*-*-*]
8177 || [istarget powerpc*-*-*]
8178 || [istarget nios2*-*-*]
8179 || [istarget riscv*-*-*]
8180 || [istarget visium-*-*]
8181 || [check_effective_target_arm_cortex_m] } {
8187 # Record that dg-final test TEST requires convential compilation.
8189 proc force_conventional_output_for { test } {
8190 if { [info proc $test] == "" } {
8191 perror "$test does not exist"
8194 proc ${test}_required_options {} {
8195 global gcc_force_conventional_output
8196 return $gcc_force_conventional_output
8200 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8201 # otherwise. Cache the result.
8203 proc check_effective_target_pie_copyreloc { } {
8204 global pie_copyreloc_available_saved
8206 global GCC_UNDER_TEST
8208 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8212 # Need auto-host.h to check linker support.
8213 if { ![file exists ../../auto-host.h ] } {
8217 if [info exists pie_copyreloc_available_saved] {
8218 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8220 # Set up and compile to see if linker supports PIE with copy
8221 # reloc. Include the current process ID in the file names to
8222 # prevent conflicts with invocations for multiple testsuites.
8227 set f [open $src "w"]
8228 puts $f "#include \"../../auto-host.h\""
8229 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8230 puts $f "# error Linker does not support PIE with copy reloc."
8234 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8235 set lines [${tool}_target_compile $src $obj object ""]
8240 if [string match "" $lines] then {
8241 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8242 set pie_copyreloc_available_saved 1
8244 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8245 set pie_copyreloc_available_saved 0
8249 return $pie_copyreloc_available_saved
8252 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8253 # otherwise. Cache the result.
8255 proc check_effective_target_got32x_reloc { } {
8256 global got32x_reloc_available_saved
8258 global GCC_UNDER_TEST
8260 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8264 # Need auto-host.h to check linker support.
8265 if { ![file exists ../../auto-host.h ] } {
8269 if [info exists got32x_reloc_available_saved] {
8270 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8272 # Include the current process ID in the file names to prevent
8273 # conflicts with invocations for multiple testsuites.
8275 set src got32x[pid].c
8276 set obj got32x[pid].o
8278 set f [open $src "w"]
8279 puts $f "#include \"../../auto-host.h\""
8280 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8281 puts $f "# error Assembler does not support R_386_GOT32X."
8285 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8286 set lines [${tool}_target_compile $src $obj object ""]
8291 if [string match "" $lines] then {
8292 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8293 set got32x_reloc_available_saved 1
8295 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8296 set got32x_reloc_available_saved 0
8300 return $got32x_reloc_available_saved
8303 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8304 # 0 otherwise. Cache the result.
8306 proc check_effective_target_tls_get_addr_via_got { } {
8307 global tls_get_addr_via_got_available_saved
8309 global GCC_UNDER_TEST
8311 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8315 # Need auto-host.h to check linker support.
8316 if { ![file exists ../../auto-host.h ] } {
8320 if [info exists tls_get_addr_via_got_available_saved] {
8321 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8323 # Include the current process ID in the file names to prevent
8324 # conflicts with invocations for multiple testsuites.
8326 set src tls_get_addr_via_got[pid].c
8327 set obj tls_get_addr_via_got[pid].o
8329 set f [open $src "w"]
8330 puts $f "#include \"../../auto-host.h\""
8331 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8332 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8336 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8337 set lines [${tool}_target_compile $src $obj object ""]
8342 if [string match "" $lines] then {
8343 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8344 set tls_get_addr_via_got_available_saved 1
8346 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8347 set tls_get_addr_via_got_available_saved 0
8351 return $tls_get_addr_via_got_available_saved
8354 # Return 1 if the target uses comdat groups.
8356 proc check_effective_target_comdat_group {} {
8357 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8359 inline int foo () { return 1; }
8364 # Return 1 if target supports __builtin_eh_return
8365 proc check_effective_target_builtin_eh_return { } {
8366 return [check_no_compiler_messages builtin_eh_return object {
8367 void test (long l, void *p)
8369 __builtin_eh_return (l, p);
8374 # Return 1 if the target supports max reduction for vectors.
8376 proc check_effective_target_vect_max_reduc { } {
8377 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8383 # Return 1 if there is an nvptx offload compiler.
8385 proc check_effective_target_offload_nvptx { } {
8386 return [check_no_compiler_messages offload_nvptx object {
8387 int main () {return 0;}
8388 } "-foffload=nvptx-none" ]
8391 # Return 1 if the compiler has been configured with hsa offloading.
8393 proc check_effective_target_offload_hsa { } {
8394 return [check_no_compiler_messages offload_hsa assembly {
8395 int main () {return 0;}
8399 # Return 1 if the target support -fprofile-update=atomic
8400 proc check_effective_target_profile_update_atomic {} {
8401 return [check_no_compiler_messages profile_update_atomic assembly {
8402 int main (void) { return 0; }
8403 } "-fprofile-update=atomic -fprofile-generate"]
8406 # Return 1 if vector (va - vector add) instructions are understood by
8407 # the assembler and can be executed. This also covers checking for
8408 # the VX kernel feature. A kernel without that feature does not
8409 # enable the vector facility and the following check will die with a
8411 proc check_effective_target_s390_vx { } {
8412 if ![istarget s390*-*-*] then {
8416 return [check_runtime s390_check_vx {
8419 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8422 } "-march=z13 -mzarch" ]
8425 # Same as above but for the arch12 vector enhancement facility. Test
8426 # is performed with the vector nand instruction.
8427 proc check_effective_target_s390_vxe { } {
8428 if ![istarget s390*-*-*] then {
8432 return [check_runtime s390_check_vxe {
8435 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8438 } "-march=arch12 -mzarch" ]
8441 #For versions of ARM architectures that have hardware div insn,
8442 #disable the divmod transform
8444 proc check_effective_target_arm_divmod_simode { } {
8445 return [check_no_compiler_messages arm_divmod assembly {
8446 #ifdef __ARM_ARCH_EXT_IDIV__
8453 # Return 1 if target supports divmod hardware insn or divmod libcall.
8455 proc check_effective_target_divmod { } {
8456 #TODO: Add checks for all targets that have either hardware divmod insn
8457 # or define libfunc for divmod.
8458 if { [istarget arm*-*-*]
8459 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8465 # Return 1 if target supports divmod for SImode. The reason for
8466 # separating this from check_effective_target_divmod is that
8467 # some versions of ARM architecture define div instruction
8468 # only for simode, and for these archs, we do not want to enable
8469 # divmod transform for simode.
8471 proc check_effective_target_divmod_simode { } {
8472 if { [istarget arm*-*-*] } {
8473 return [check_effective_target_arm_divmod_simode]
8476 return [check_effective_target_divmod]
8479 # Return 1 if store merging optimization is applicable for target.
8480 # Store merging is not profitable for targets like the avr which
8481 # can load/store only one byte at a time. Use int size as a proxy
8482 # for the number of bytes the target can write, and skip for targets
8483 # with a smallish (< 32) size.
8485 proc check_effective_target_store_merge { } {
8486 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8493 # Return 1 if we're able to assemble rdrand
8495 proc check_effective_target_rdrand
{ } {
8496 return [check_no_compiler_messages_nocache rdrand object
{
8501 __builtin_ia32_rdrand32_step
(&val
);
8507 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, stc
, mcr and
8509 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
8510 if { ![istarget arm
*-*-*] } {
8513 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
8514 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
8520 proc check_effective_target_arm_coproc1_ok
{ } {
8521 return [check_cached_effective_target arm_coproc1_ok \
8522 check_effective_target_arm_coproc1_ok_nocache
]
8525 #
Return 1 if the target supports all coprocessor instructions checked by
8526 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
8527 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
8528 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
8529 if { ![check_effective_target_arm_coproc1_ok
] } {
8532 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
8539 proc check_effective_target_arm_coproc2_ok
{ } {
8540 return [check_cached_effective_target arm_coproc2_ok \
8541 check_effective_target_arm_coproc2_ok_nocache
]
8544 #
Return 1 if the target supports all coprocessor instructions checked by
8545 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
8547 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
8548 if { ![check_effective_target_arm_coproc2_ok
] } {
8551 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
8552 #
if __ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
)
8558 proc check_effective_target_arm_coproc3_ok
{ } {
8559 return [check_cached_effective_target arm_coproc3_ok \
8560 check_effective_target_arm_coproc3_ok_nocache
]
8563 #
Return 1 if the target supports all coprocessor instructions checked by
8564 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
8566 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
8567 if { ![check_effective_target_arm_coproc3_ok
] } {
8570 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
8577 proc check_effective_target_arm_coproc4_ok
{ } {
8578 return [check_cached_effective_target arm_coproc4_ok \
8579 check_effective_target_arm_coproc4_ok_nocache
]
8582 #
Return 1 if the target supports the auto_inc_dec optimization pass.
8583 proc check_effective_target_autoincdec
{ } {
8584 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
8585 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
8589 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
8590 if { [file
exists $dumpfile
] } {
8591 file
delete $dumpfile