1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
32 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "basic-block.h"
45 /* Turn STACK_GROWS_DOWNWARD into a boolean. */
46 #ifdef STACK_GROWS_DOWNWARD
47 #undef STACK_GROWS_DOWNWARD
48 #define STACK_GROWS_DOWNWARD 1
50 #define STACK_GROWS_DOWNWARD 0
53 static int perhaps_ends_bb_p
PARAMS ((rtx
));
54 static int optimize_reg_copy_1
PARAMS ((rtx
, rtx
, rtx
));
55 static void optimize_reg_copy_2
PARAMS ((rtx
, rtx
, rtx
));
56 static void optimize_reg_copy_3
PARAMS ((rtx
, rtx
, rtx
));
57 static rtx gen_add3_insn
PARAMS ((rtx
, rtx
, rtx
));
58 static void copy_src_to_dest
PARAMS ((rtx
, rtx
, rtx
, int));
59 static int *regmove_bb_head
;
62 int with
[MAX_RECOG_OPERANDS
];
63 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
64 int commutative
[MAX_RECOG_OPERANDS
];
65 int early_clobber
[MAX_RECOG_OPERANDS
];
68 static rtx discover_flags_reg
PARAMS ((void));
69 static void mark_flags_life_zones
PARAMS ((rtx
));
70 static void flags_set_1
PARAMS ((rtx
, rtx
, void *));
72 static int try_auto_increment
PARAMS ((rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int));
73 static int find_matches
PARAMS ((rtx
, struct match
*));
74 static void replace_in_call_usage
PARAMS ((rtx
*, int, rtx
, rtx
));
75 static int fixup_match_1
PARAMS ((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
77 static int reg_is_remote_constant_p
PARAMS ((rtx
, rtx
, rtx
));
78 static int stable_and_no_regs_but_for_p
PARAMS ((rtx
, rtx
, rtx
));
79 static int regclass_compatible_p
PARAMS ((int, int));
80 static int replacement_quality
PARAMS ((rtx
));
81 static int fixup_match_2
PARAMS ((rtx
, rtx
, rtx
, rtx
, FILE *));
83 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
84 causing too much register allocation problems. */
86 regclass_compatible_p (class0
, class1
)
89 return (class0
== class1
90 || (reg_class_subset_p (class0
, class1
)
91 && ! CLASS_LIKELY_SPILLED_P (class0
))
92 || (reg_class_subset_p (class1
, class0
)
93 && ! CLASS_LIKELY_SPILLED_P (class1
)));
96 /* Generate and return an insn body to add r1 and c,
97 storing the result in r0. */
99 gen_add3_insn (r0
, r1
, c
)
102 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
104 if (icode
== CODE_FOR_nothing
105 || ! ((*insn_data
[icode
].operand
[0].predicate
)
106 (r0
, insn_data
[icode
].operand
[0].mode
))
107 || ! ((*insn_data
[icode
].operand
[1].predicate
)
108 (r1
, insn_data
[icode
].operand
[1].mode
))
109 || ! ((*insn_data
[icode
].operand
[2].predicate
)
110 (c
, insn_data
[icode
].operand
[2].mode
)))
113 return (GEN_FCN (icode
) (r0
, r1
, c
));
117 /* INC_INSN is an instruction that adds INCREMENT to REG.
118 Try to fold INC_INSN as a post/pre in/decrement into INSN.
119 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
120 Return nonzero for success. */
122 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
123 rtx reg
, insn
, inc_insn
,inc_insn_set
;
124 HOST_WIDE_INT increment
;
127 enum rtx_code inc_code
;
129 rtx pset
= single_set (insn
);
132 /* Can't use the size of SET_SRC, we might have something like
133 (sign_extend:SI (mem:QI ... */
134 rtx use
= find_use_as_address (pset
, reg
, 0);
135 if (use
!= 0 && use
!= (rtx
) 1)
137 int size
= GET_MODE_SIZE (GET_MODE (use
));
139 || (HAVE_POST_INCREMENT
140 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
141 || (HAVE_PRE_INCREMENT
142 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
143 || (HAVE_POST_DECREMENT
144 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
145 || (HAVE_PRE_DECREMENT
146 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
152 &SET_SRC (inc_insn_set
),
153 XEXP (SET_SRC (inc_insn_set
), 0), 1);
154 validate_change (insn
, &XEXP (use
, 0),
155 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
156 if (apply_change_group ())
158 /* If there is a REG_DEAD note on this insn, we must
159 change this not to REG_UNUSED meaning that the register
160 is set, but the value is dead. Failure to do so will
161 result in a sched1 abort -- when it recomputes lifetime
162 information, the number of REG_DEAD notes will have
164 rtx note
= find_reg_note (insn
, REG_DEAD
, reg
);
166 PUT_MODE (note
, REG_UNUSED
);
169 = gen_rtx_EXPR_LIST (REG_INC
,
170 reg
, REG_NOTES (insn
));
173 PUT_CODE (inc_insn
, NOTE
);
174 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
175 NOTE_SOURCE_FILE (inc_insn
) = 0;
185 /* Determine if the pattern generated by add_optab has a clobber,
186 such as might be issued for a flags hard register. To make the
187 code elsewhere simpler, we handle cc0 in this same framework.
189 Return the register if one was discovered. Return NULL_RTX if
190 if no flags were found. Return pc_rtx if we got confused. */
193 discover_flags_reg ()
196 tmp
= gen_rtx_REG (word_mode
, 10000);
197 tmp
= gen_add3_insn (tmp
, tmp
, GEN_INT (2));
199 /* If we get something that isn't a simple set, or a
200 [(set ..) (clobber ..)], this whole function will go wrong. */
201 if (GET_CODE (tmp
) == SET
)
203 else if (GET_CODE (tmp
) == PARALLEL
)
207 if (XVECLEN (tmp
, 0) != 2)
209 tmp
= XVECEXP (tmp
, 0, 1);
210 if (GET_CODE (tmp
) != CLOBBER
)
214 /* Don't do anything foolish if the md wanted to clobber a
215 scratch or something. We only care about hard regs.
216 Moreover we don't like the notion of subregs of hard regs. */
217 if (GET_CODE (tmp
) == SUBREG
218 && GET_CODE (SUBREG_REG (tmp
)) == REG
219 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
221 found
= (GET_CODE (tmp
) == REG
&& REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
223 return (found
? tmp
: NULL_RTX
);
229 /* It is a tedious task identifying when the flags register is live and
230 when it is safe to optimize. Since we process the instruction stream
231 multiple times, locate and record these live zones by marking the
232 mode of the instructions --
234 QImode is used on the instruction at which the flags becomes live.
236 HImode is used within the range (exclusive) that the flags are
237 live. Thus the user of the flags is not marked.
239 All other instructions are cleared to VOIDmode. */
241 /* Used to communicate with flags_set_1. */
242 static rtx flags_set_1_rtx
;
243 static int flags_set_1_set
;
246 mark_flags_life_zones (flags
)
254 /* If we found a flags register on a cc0 host, bail. */
255 if (flags
== NULL_RTX
)
257 else if (flags
!= cc0_rtx
)
261 /* Simple cases first: if no flags, clear all modes. If confusing,
262 mark the entire function as being in a flags shadow. */
263 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
265 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
267 for (insn
= get_insns(); insn
; insn
= NEXT_INSN (insn
))
268 PUT_MODE (insn
, mode
);
276 flags_regno
= REGNO (flags
);
277 flags_nregs
= HARD_REGNO_NREGS (flags_regno
, GET_MODE (flags
));
279 flags_set_1_rtx
= flags
;
281 /* Process each basic block. */
282 for (block
= n_basic_blocks
- 1; block
>= 0; block
--)
287 insn
= BLOCK_HEAD (block
);
288 end
= BLOCK_END (block
);
290 /* Look out for the (unlikely) case of flags being live across
291 basic block boundaries. */
296 for (i
= 0; i
< flags_nregs
; ++i
)
297 live
|= REGNO_REG_SET_P (BASIC_BLOCK (block
)->global_live_at_start
,
304 /* Process liveness in reverse order of importance --
305 alive, death, birth. This lets more important info
306 overwrite the mode of lesser info. */
311 /* In the cc0 case, death is not marked in reg notes,
312 but is instead the mere use of cc0 when it is alive. */
313 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
316 /* In the hard reg case, we watch death notes. */
317 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
320 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
322 /* In either case, birth is denoted simply by it's presence
323 as the destination of a set. */
325 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
329 PUT_MODE (insn
, QImode
);
333 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
337 insn
= NEXT_INSN (insn
);
342 /* A subroutine of mark_flags_life_zones, called through note_stores. */
345 flags_set_1 (x
, pat
, data
)
347 void *data ATTRIBUTE_UNUSED
;
349 if (GET_CODE (pat
) == SET
350 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
354 static int *regno_src_regno
;
356 /* Indicate how good a choice REG (which appears as a source) is to replace
357 a destination register with. The higher the returned value, the better
358 the choice. The main objective is to avoid using a register that is
359 a candidate for tying to a hard register, since the output might in
360 turn be a candidate to be tied to a different hard register. */
362 replacement_quality(reg
)
367 /* Bad if this isn't a register at all. */
368 if (GET_CODE (reg
) != REG
)
371 /* If this register is not meant to get a hard register,
372 it is a poor choice. */
373 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
376 src_regno
= regno_src_regno
[REGNO (reg
)];
378 /* If it was not copied from another register, it is fine. */
382 /* Copied from a hard register? */
383 if (src_regno
< FIRST_PSEUDO_REGISTER
)
386 /* Copied from a pseudo register - not as bad as from a hard register,
387 yet still cumbersome, since the register live length will be lengthened
388 when the registers get tied. */
392 /* Return 1 if INSN might end a basic block. */
394 static int perhaps_ends_bb_p (insn
)
397 switch (GET_CODE (insn
))
401 /* These always end a basic block. */
405 /* A CALL_INSN might be the last insn of a basic block, if it is inside
406 an EH region or if there are nonlocal gotos. Note that this test is
407 very conservative. */
408 if (nonlocal_goto_handler_labels
)
412 return can_throw_internal (insn
);
416 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
419 Search forward to see if SRC dies before either it or DEST is modified,
420 but don't scan past the end of a basic block. If so, we can replace SRC
421 with DEST and let SRC die in INSN.
423 This will reduce the number of registers live in that range and may enable
424 DEST to be tied to SRC, thus often saving one register in addition to a
425 register-register copy. */
428 optimize_reg_copy_1 (insn
, dest
, src
)
436 int sregno
= REGNO (src
);
437 int dregno
= REGNO (dest
);
439 /* We don't want to mess with hard regs if register classes are small. */
441 || (SMALL_REGISTER_CLASSES
442 && (sregno
< FIRST_PSEUDO_REGISTER
443 || dregno
< FIRST_PSEUDO_REGISTER
))
444 /* We don't see all updates to SP if they are in an auto-inc memory
445 reference, so we must disallow this optimization on them. */
446 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
449 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
451 /* ??? We can't scan past the end of a basic block without updating
452 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
453 if (perhaps_ends_bb_p (p
))
455 else if (! INSN_P (p
))
458 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
459 /* Don't change a USE of a register. */
460 || (GET_CODE (PATTERN (p
)) == USE
461 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
464 /* See if all of SRC dies in P. This test is slightly more
465 conservative than it needs to be. */
466 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
467 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
475 /* We can do the optimization. Scan forward from INSN again,
476 replacing regs as we go. Set FAILED if a replacement can't
477 be done. In that case, we can't move the death note for SRC.
478 This should be rare. */
480 /* Set to stop at next insn. */
481 for (q
= next_real_insn (insn
);
482 q
!= next_real_insn (p
);
483 q
= next_real_insn (q
))
485 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
487 /* If SRC is a hard register, we might miss some
488 overlapping registers with validate_replace_rtx,
489 so we would have to undo it. We can't if DEST is
490 present in the insn, so fail in that combination
492 if (sregno
< FIRST_PSEUDO_REGISTER
493 && reg_mentioned_p (dest
, PATTERN (q
)))
496 /* Replace all uses and make sure that the register
497 isn't still present. */
498 else if (validate_replace_rtx (src
, dest
, q
)
499 && (sregno
>= FIRST_PSEUDO_REGISTER
500 || ! reg_overlap_mentioned_p (src
,
505 validate_replace_rtx (dest
, src
, q
);
510 /* For SREGNO, count the total number of insns scanned.
511 For DREGNO, count the total number of insns scanned after
512 passing the death note for DREGNO. */
517 /* If the insn in which SRC dies is a CALL_INSN, don't count it
518 as a call that has been crossed. Otherwise, count it. */
519 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
521 /* Similarly, total calls for SREGNO, total calls beyond
522 the death note for DREGNO. */
528 /* If DEST dies here, remove the death note and save it for
529 later. Make sure ALL of DEST dies here; again, this is
530 overly conservative. */
532 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
534 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
535 failed
= 1, dest_death
= 0;
537 remove_note (q
, dest_death
);
543 /* These counters need to be updated if and only if we are
544 going to move the REG_DEAD note. */
545 if (sregno
>= FIRST_PSEUDO_REGISTER
)
547 if (REG_LIVE_LENGTH (sregno
) >= 0)
549 REG_LIVE_LENGTH (sregno
) -= s_length
;
550 /* REG_LIVE_LENGTH is only an approximation after
551 combine if sched is not run, so make sure that we
552 still have a reasonable value. */
553 if (REG_LIVE_LENGTH (sregno
) < 2)
554 REG_LIVE_LENGTH (sregno
) = 2;
557 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
560 /* Move death note of SRC from P to INSN. */
561 remove_note (p
, note
);
562 XEXP (note
, 1) = REG_NOTES (insn
);
563 REG_NOTES (insn
) = note
;
566 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
568 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
570 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
571 remove_note (insn
, dest_death
);
574 /* Put death note of DEST on P if we saw it die. */
577 XEXP (dest_death
, 1) = REG_NOTES (p
);
578 REG_NOTES (p
) = dest_death
;
580 if (dregno
>= FIRST_PSEUDO_REGISTER
)
582 /* If and only if we are moving the death note for DREGNO,
583 then we need to update its counters. */
584 if (REG_LIVE_LENGTH (dregno
) >= 0)
585 REG_LIVE_LENGTH (dregno
) += d_length
;
586 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
593 /* If SRC is a hard register which is set or killed in some other
594 way, we can't do this optimization. */
595 else if (sregno
< FIRST_PSEUDO_REGISTER
596 && dead_or_set_p (p
, src
))
602 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
603 a sequence of insns that modify DEST followed by an insn that sets
604 SRC to DEST in which DEST dies, with no prior modification of DEST.
605 (There is no need to check if the insns in between actually modify
606 DEST. We should not have cases where DEST is not modified, but
607 the optimization is safe if no such modification is detected.)
608 In that case, we can replace all uses of DEST, starting with INSN and
609 ending with the set of SRC to DEST, with SRC. We do not do this
610 optimization if a CALL_INSN is crossed unless SRC already crosses a
611 call or if DEST dies before the copy back to SRC.
613 It is assumed that DEST and SRC are pseudos; it is too complicated to do
614 this for hard registers since the substitutions we may make might fail. */
617 optimize_reg_copy_2 (insn
, dest
, src
)
624 int sregno
= REGNO (src
);
625 int dregno
= REGNO (dest
);
627 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
629 /* ??? We can't scan past the end of a basic block without updating
630 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
631 if (perhaps_ends_bb_p (p
))
633 else if (! INSN_P (p
))
636 set
= single_set (p
);
637 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
638 && find_reg_note (p
, REG_DEAD
, dest
))
640 /* We can do the optimization. Scan forward from INSN again,
641 replacing regs as we go. */
643 /* Set to stop at next insn. */
644 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
647 if (reg_mentioned_p (dest
, PATTERN (q
)))
648 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
651 if (GET_CODE (q
) == CALL_INSN
)
653 REG_N_CALLS_CROSSED (dregno
)--;
654 REG_N_CALLS_CROSSED (sregno
)++;
658 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
659 REG_N_DEATHS (dregno
)--;
660 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
661 REG_N_DEATHS (sregno
)--;
665 if (reg_set_p (src
, p
)
666 || find_reg_note (p
, REG_DEAD
, dest
)
667 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
671 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
672 Look if SRC dies there, and if it is only set once, by loading
673 it from memory. If so, try to encorporate the zero/sign extension
674 into the memory read, change SRC to the mode of DEST, and alter
675 the remaining accesses to use the appropriate SUBREG. This allows
676 SRC and DEST to be tied later. */
678 optimize_reg_copy_3 (insn
, dest
, src
)
683 rtx src_reg
= XEXP (src
, 0);
684 int src_no
= REGNO (src_reg
);
685 int dst_no
= REGNO (dest
);
687 enum machine_mode old_mode
;
689 if (src_no
< FIRST_PSEUDO_REGISTER
690 || dst_no
< FIRST_PSEUDO_REGISTER
691 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
692 || REG_N_SETS (src_no
) != 1)
694 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
695 /* ??? We can't scan past the end of a basic block without updating
696 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
697 if (perhaps_ends_bb_p (p
))
703 if (! (set
= single_set (p
))
704 || GET_CODE (SET_SRC (set
)) != MEM
705 || SET_DEST (set
) != src_reg
)
708 /* Be conserative: although this optimization is also valid for
709 volatile memory references, that could cause trouble in later passes. */
710 if (MEM_VOLATILE_P (SET_SRC (set
)))
713 /* Do not use a SUBREG to truncate from one mode to another if truncation
715 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
716 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
717 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
720 old_mode
= GET_MODE (src_reg
);
721 PUT_MODE (src_reg
, GET_MODE (src
));
722 XEXP (src
, 0) = SET_SRC (set
);
724 /* Include this change in the group so that it's easily undone if
725 one of the changes in the group is invalid. */
726 validate_change (p
, &SET_SRC (set
), src
, 1);
728 /* Now walk forward making additional replacements. We want to be able
729 to undo all the changes if a later substitution fails. */
730 subreg
= gen_rtx_SUBREG (old_mode
, src_reg
, 0);
731 while (p
= NEXT_INSN (p
), p
!= insn
)
736 /* Make a tenative change. */
737 validate_replace_rtx_group (src_reg
, subreg
, p
);
740 validate_replace_rtx_group (src
, src_reg
, insn
);
742 /* Now see if all the changes are valid. */
743 if (! apply_change_group ())
745 /* One or more changes were no good. Back out everything. */
746 PUT_MODE (src_reg
, old_mode
);
747 XEXP (src
, 0) = src_reg
;
752 /* If we were not able to update the users of src to use dest directly, try
753 instead moving the value to dest directly before the operation. */
756 copy_src_to_dest (insn
, src
, dest
, old_max_uid
)
775 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
776 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
777 parameter when there is no frame pointer that is not allocated a register.
778 For now, we just reject them, rather than incrementing the live length. */
780 if (GET_CODE (src
) == REG
781 && REG_LIVE_LENGTH (REGNO (src
)) > 0
782 && GET_CODE (dest
) == REG
783 && !RTX_UNCHANGING_P (dest
)
784 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
785 && (set
= single_set (insn
)) != NULL_RTX
786 && !reg_mentioned_p (dest
, SET_SRC (set
))
787 && GET_MODE (src
) == GET_MODE (dest
))
789 int old_num_regs
= reg_rtx_no
;
791 /* Generate the src->dest move. */
793 emit_move_insn (dest
, src
);
794 seq
= gen_sequence ();
796 /* If this sequence uses new registers, we may not use it. */
797 if (old_num_regs
!= reg_rtx_no
798 || ! validate_replace_rtx (src
, dest
, insn
))
800 /* We have to restore reg_rtx_no to its old value, lest
801 recompute_reg_usage will try to compute the usage of the
802 new regs, yet reg_n_info is not valid for them. */
803 reg_rtx_no
= old_num_regs
;
806 emit_insn_before (seq
, insn
);
807 move_insn
= PREV_INSN (insn
);
808 p_move_notes
= ®_NOTES (move_insn
);
809 p_insn_notes
= ®_NOTES (insn
);
811 /* Move any notes mentioning src to the move instruction */
812 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
814 next
= XEXP (link
, 1);
815 if (XEXP (link
, 0) == src
)
817 *p_move_notes
= link
;
818 p_move_notes
= &XEXP (link
, 1);
822 *p_insn_notes
= link
;
823 p_insn_notes
= &XEXP (link
, 1);
827 *p_move_notes
= NULL_RTX
;
828 *p_insn_notes
= NULL_RTX
;
830 /* Is the insn the head of a basic block? If so extend it */
831 insn_uid
= INSN_UID (insn
);
832 move_uid
= INSN_UID (move_insn
);
833 if (insn_uid
< old_max_uid
)
835 bb
= regmove_bb_head
[insn_uid
];
838 BLOCK_HEAD (bb
) = move_insn
;
839 regmove_bb_head
[insn_uid
] = -1;
843 /* Update the various register tables. */
844 dest_regno
= REGNO (dest
);
845 REG_N_SETS (dest_regno
) ++;
846 REG_LIVE_LENGTH (dest_regno
)++;
847 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
848 REGNO_FIRST_UID (dest_regno
) = move_uid
;
850 src_regno
= REGNO (src
);
851 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
852 REG_LIVE_LENGTH (src_regno
)++;
854 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
855 REGNO_FIRST_UID (src_regno
) = move_uid
;
857 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
858 REGNO_LAST_UID (src_regno
) = move_uid
;
860 if (REGNO_LAST_NOTE_UID (src_regno
) == insn_uid
)
861 REGNO_LAST_NOTE_UID (src_regno
) = move_uid
;
866 /* Return whether REG is set in only one location, and is set to a
867 constant, but is set in a different basic block from INSN (an
868 instructions which uses REG). In this case REG is equivalent to a
869 constant, and we don't want to break that equivalence, because that
870 may increase register pressure and make reload harder. If REG is
871 set in the same basic block as INSN, we don't worry about it,
872 because we'll probably need a register anyhow (??? but what if REG
873 is used in a different basic block as well as this one?). FIRST is
874 the first insn in the function. */
877 reg_is_remote_constant_p (reg
, insn
, first
)
884 if (REG_N_SETS (REGNO (reg
)) != 1)
887 /* Look for the set. */
888 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
892 if (REG_NOTE_KIND (p
) != 0)
894 s
= single_set (XEXP (p
, 0));
896 && GET_CODE (SET_DEST (s
)) == REG
897 && REGNO (SET_DEST (s
)) == REGNO (reg
))
899 /* The register is set in the same basic block. */
904 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
912 && GET_CODE (SET_DEST (s
)) == REG
913 && REGNO (SET_DEST (s
)) == REGNO (reg
))
915 /* This is the instruction which sets REG. If there is a
916 REG_EQUAL note, then REG is equivalent to a constant. */
917 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
926 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
927 another add immediate instruction with the same source and dest registers,
928 and if we find one, we change INSN to an increment, and return 1. If
929 no changes are made, we return 0.
932 (set (reg100) (plus reg1 offset1))
934 (set (reg100) (plus reg1 offset2))
936 (set (reg100) (plus reg1 offset1))
938 (set (reg100) (plus reg100 offset2-offset1)) */
940 /* ??? What does this comment mean? */
941 /* cse disrupts preincrement / postdecrement squences when it finds a
942 hard register as ultimate source, like the frame pointer. */
945 fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
946 rtx insn
, dst
, src
, offset
;
947 FILE *regmove_dump_file
;
949 rtx p
, dst_death
= 0;
950 int length
, num_calls
= 0;
952 /* If SRC dies in INSN, we'd have to move the death note. This is
953 considered to be very unlikely, so we just skip the optimization
955 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
958 /* Scan backward to find the first instruction that sets DST. */
960 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
964 /* ??? We can't scan past the end of a basic block without updating
965 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
966 if (perhaps_ends_bb_p (p
))
968 else if (! INSN_P (p
))
971 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
976 pset
= single_set (p
);
977 if (pset
&& SET_DEST (pset
) == dst
978 && GET_CODE (SET_SRC (pset
)) == PLUS
979 && XEXP (SET_SRC (pset
), 0) == src
980 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
982 HOST_WIDE_INT newconst
983 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
984 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
986 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
988 /* Remove the death note for DST from DST_DEATH. */
991 remove_death (REGNO (dst
), dst_death
);
992 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
993 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
996 if (regmove_dump_file
)
997 fprintf (regmove_dump_file
,
998 "Fixed operand of insn %d.\n",
1002 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1004 if (GET_CODE (p
) == CODE_LABEL
1005 || GET_CODE (p
) == JUMP_INSN
)
1009 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1011 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
1016 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1018 if (GET_CODE (p
) == CODE_LABEL
1019 || GET_CODE (p
) == JUMP_INSN
)
1023 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1025 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1034 if (reg_set_p (dst
, PATTERN (p
)))
1037 /* If we have passed a call instruction, and the
1038 pseudo-reg SRC is not already live across a call,
1039 then don't perform the optimization. */
1040 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1041 hard regs are clobbered. Thus, we only use it for src for
1043 if (GET_CODE (p
) == CALL_INSN
)
1048 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1051 if (call_used_regs
[REGNO (dst
)]
1052 || find_reg_fusage (p
, CLOBBER
, dst
))
1055 else if (reg_set_p (src
, PATTERN (p
)))
1062 /* Main entry for the register move optimization.
1063 F is the first instruction.
1064 NREGS is one plus the highest pseudo-reg number used in the instruction.
1065 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1066 (or 0 if none should be output). */
1069 regmove_optimize (f
, nregs
, regmove_dump_file
)
1072 FILE *regmove_dump_file
;
1074 int old_max_uid
= get_max_uid ();
1079 rtx copy_src
, copy_dst
;
1081 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1082 confused by non-call exceptions ending blocks. */
1083 if (flag_non_call_exceptions
)
1086 /* Find out where a potential flags register is live, and so that we
1087 can supress some optimizations in those zones. */
1088 mark_flags_life_zones (discover_flags_reg ());
1090 regno_src_regno
= (int *) xmalloc (sizeof *regno_src_regno
* nregs
);
1091 for (i
= nregs
; --i
>= 0; ) regno_src_regno
[i
] = -1;
1093 regmove_bb_head
= (int *) xmalloc (sizeof (int) * (old_max_uid
+ 1));
1094 for (i
= old_max_uid
; i
>= 0; i
--) regmove_bb_head
[i
] = -1;
1095 for (i
= 0; i
< n_basic_blocks
; i
++)
1096 regmove_bb_head
[INSN_UID (BLOCK_HEAD (i
))] = i
;
1098 /* A forward/backward pass. Replace output operands with input operands. */
1100 for (pass
= 0; pass
<= 2; pass
++)
1102 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1105 if (regmove_dump_file
)
1106 fprintf (regmove_dump_file
, "Starting %s pass...\n",
1107 pass
? "backward" : "forward");
1109 for (insn
= pass
? get_last_insn () : f
; insn
;
1110 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1113 int op_no
, match_no
;
1115 set
= single_set (insn
);
1119 if (flag_expensive_optimizations
&& ! pass
1120 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1121 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1122 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
1123 && GET_CODE (SET_DEST(set
)) == REG
)
1124 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1126 if (flag_expensive_optimizations
&& ! pass
1127 && GET_CODE (SET_SRC (set
)) == REG
1128 && GET_CODE (SET_DEST(set
)) == REG
)
1130 /* If this is a register-register copy where SRC is not dead,
1131 see if we can optimize it. If this optimization succeeds,
1132 it will become a copy where SRC is dead. */
1133 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1134 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1135 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1137 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1138 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1139 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1140 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1141 && SET_SRC (set
) != SET_DEST (set
))
1143 int srcregno
= REGNO (SET_SRC(set
));
1144 if (regno_src_regno
[srcregno
] >= 0)
1145 srcregno
= regno_src_regno
[srcregno
];
1146 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1153 if (! find_matches (insn
, &match
))
1156 /* Now scan through the operands looking for a source operand
1157 which is supposed to match the destination operand.
1158 Then scan forward for an instruction which uses the dest
1160 If it dies there, then replace the dest in both operands with
1161 the source operand. */
1163 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1165 rtx src
, dst
, src_subreg
;
1166 enum reg_class src_class
, dst_class
;
1168 match_no
= match
.with
[op_no
];
1170 /* Nothing to do if the two operands aren't supposed to match. */
1174 src
= recog_data
.operand
[op_no
];
1175 dst
= recog_data
.operand
[match_no
];
1177 if (GET_CODE (src
) != REG
)
1181 if (GET_CODE (dst
) == SUBREG
1182 && GET_MODE_SIZE (GET_MODE (dst
))
1183 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1186 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
1187 src
, SUBREG_WORD (dst
));
1188 dst
= SUBREG_REG (dst
);
1190 if (GET_CODE (dst
) != REG
1191 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1194 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1196 if (match
.commutative
[op_no
] < op_no
)
1197 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1201 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1204 /* op_no/src must be a read-only operand, and
1205 match_operand/dst must be a write-only operand. */
1206 if (match
.use
[op_no
] != READ
1207 || match
.use
[match_no
] != WRITE
)
1210 if (match
.early_clobber
[match_no
]
1211 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1214 /* Make sure match_operand is the destination. */
1215 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1218 /* If the operands already match, then there is nothing to do. */
1219 if (operands_match_p (src
, dst
))
1222 /* But in the commutative case, we might find a better match. */
1223 if (match
.commutative
[op_no
] >= 0)
1225 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1226 if (operands_match_p (comm
, dst
)
1227 && (replacement_quality (comm
)
1228 >= replacement_quality (src
)))
1232 src_class
= reg_preferred_class (REGNO (src
));
1233 dst_class
= reg_preferred_class (REGNO (dst
));
1234 if (! regclass_compatible_p (src_class
, dst_class
))
1237 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1245 /* A backward pass. Replace input operands with output operands. */
1247 if (regmove_dump_file
)
1248 fprintf (regmove_dump_file
, "Starting backward pass...\n");
1250 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1254 int op_no
, match_no
;
1257 if (! find_matches (insn
, &match
))
1260 /* Now scan through the operands looking for a destination operand
1261 which is supposed to match a source operand.
1262 Then scan backward for an instruction which sets the source
1263 operand. If safe, then replace the source operand with the
1264 dest operand in both instructions. */
1266 copy_src
= NULL_RTX
;
1267 copy_dst
= NULL_RTX
;
1268 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1270 rtx set
, p
, src
, dst
;
1271 rtx src_note
, dst_note
;
1273 enum reg_class src_class
, dst_class
;
1276 match_no
= match
.with
[op_no
];
1278 /* Nothing to do if the two operands aren't supposed to match. */
1282 dst
= recog_data
.operand
[match_no
];
1283 src
= recog_data
.operand
[op_no
];
1285 if (GET_CODE (src
) != REG
)
1288 if (GET_CODE (dst
) != REG
1289 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1290 || REG_LIVE_LENGTH (REGNO (dst
)) < 0
1291 || RTX_UNCHANGING_P (dst
))
1294 /* If the operands already match, then there is nothing to do. */
1295 if (operands_match_p (src
, dst
))
1298 if (match
.commutative
[op_no
] >= 0)
1300 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1301 if (operands_match_p (comm
, dst
))
1305 set
= single_set (insn
);
1309 /* match_no/dst must be a write-only operand, and
1310 operand_operand/src must be a read-only operand. */
1311 if (match
.use
[op_no
] != READ
1312 || match
.use
[match_no
] != WRITE
)
1315 if (match
.early_clobber
[match_no
]
1316 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1319 /* Make sure match_no is the destination. */
1320 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1323 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1325 if (GET_CODE (SET_SRC (set
)) == PLUS
1326 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1327 && XEXP (SET_SRC (set
), 0) == src
1328 && fixup_match_2 (insn
, dst
, src
,
1329 XEXP (SET_SRC (set
), 1),
1334 src_class
= reg_preferred_class (REGNO (src
));
1335 dst_class
= reg_preferred_class (REGNO (dst
));
1336 if (! regclass_compatible_p (src_class
, dst_class
))
1346 /* Can not modify an earlier insn to set dst if this insn
1347 uses an old value in the source. */
1348 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1358 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1369 /* If src is set once in a different basic block,
1370 and is set equal to a constant, then do not use
1371 it for this optimization, as this would make it
1372 no longer equivalent to a constant. */
1374 if (reg_is_remote_constant_p (src
, insn
, f
))
1385 if (regmove_dump_file
)
1386 fprintf (regmove_dump_file
,
1387 "Could fix operand %d of insn %d matching operand %d.\n",
1388 op_no
, INSN_UID (insn
), match_no
);
1390 /* Scan backward to find the first instruction that uses
1391 the input operand. If the operand is set here, then
1392 replace it in both instructions with match_no. */
1394 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1398 /* ??? We can't scan past the end of a basic block without
1399 updating the register lifetime info
1400 (REG_DEAD/basic_block_live_at_start). */
1401 if (perhaps_ends_bb_p (p
))
1403 else if (! INSN_P (p
))
1408 /* ??? See if all of SRC is set in P. This test is much
1409 more conservative than it needs to be. */
1410 pset
= single_set (p
);
1411 if (pset
&& SET_DEST (pset
) == src
)
1413 /* We use validate_replace_rtx, in case there
1414 are multiple identical source operands. All of
1415 them have to be changed at the same time. */
1416 if (validate_replace_rtx (src
, dst
, insn
))
1418 if (validate_change (p
, &SET_DEST (pset
),
1423 /* Change all source operands back.
1424 This modifies the dst as a side-effect. */
1425 validate_replace_rtx (dst
, src
, insn
);
1426 /* Now make sure the dst is right. */
1427 validate_change (insn
,
1428 recog_data
.operand_loc
[match_no
],
1435 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1436 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1439 /* If we have passed a call instruction, and the
1440 pseudo-reg DST is not already live across a call,
1441 then don't perform the optimization. */
1442 if (GET_CODE (p
) == CALL_INSN
)
1446 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1455 /* Remove the death note for SRC from INSN. */
1456 remove_note (insn
, src_note
);
1457 /* Move the death note for SRC to P if it is used
1459 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1461 XEXP (src_note
, 1) = REG_NOTES (p
);
1462 REG_NOTES (p
) = src_note
;
1464 /* If there is a REG_DEAD note for DST on P, then remove
1465 it, because DST is now set there. */
1466 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1467 remove_note (p
, dst_note
);
1469 dstno
= REGNO (dst
);
1470 srcno
= REGNO (src
);
1472 REG_N_SETS (dstno
)++;
1473 REG_N_SETS (srcno
)--;
1475 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1476 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1478 REG_LIVE_LENGTH (dstno
) += length
;
1479 if (REG_LIVE_LENGTH (srcno
) >= 0)
1481 REG_LIVE_LENGTH (srcno
) -= length
;
1482 /* REG_LIVE_LENGTH is only an approximation after
1483 combine if sched is not run, so make sure that we
1484 still have a reasonable value. */
1485 if (REG_LIVE_LENGTH (srcno
) < 2)
1486 REG_LIVE_LENGTH (srcno
) = 2;
1489 if (regmove_dump_file
)
1490 fprintf (regmove_dump_file
,
1491 "Fixed operand %d of insn %d matching operand %d.\n",
1492 op_no
, INSN_UID (insn
), match_no
);
1498 /* If we weren't able to replace any of the alternatives, try an
1499 alternative appoach of copying the source to the destination. */
1500 if (!success
&& copy_src
!= NULL_RTX
)
1501 copy_src_to_dest (insn
, copy_src
, copy_dst
, old_max_uid
);
1506 /* In fixup_match_1, some insns may have been inserted after basic block
1507 ends. Fix that here. */
1508 for (i
= 0; i
< n_basic_blocks
; i
++)
1510 rtx end
= BLOCK_END (i
);
1512 rtx next
= NEXT_INSN (new);
1513 while (next
!= 0 && INSN_UID (next
) >= old_max_uid
1514 && (i
== n_basic_blocks
- 1 || BLOCK_HEAD (i
+ 1) != next
))
1515 new = next
, next
= NEXT_INSN (new);
1516 BLOCK_END (i
) = new;
1521 free (regno_src_regno
);
1522 free (regmove_bb_head
);
1525 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1526 Returns 0 if INSN can't be recognized, or if the alternative can't be
1529 Initialize the info in MATCHP based on the constraints. */
1532 find_matches (insn
, matchp
)
1534 struct match
*matchp
;
1536 int likely_spilled
[MAX_RECOG_OPERANDS
];
1538 int any_matches
= 0;
1540 extract_insn (insn
);
1541 if (! constrain_operands (0))
1544 /* Must initialize this before main loop, because the code for
1545 the commutative case may set matches for operands other than
1547 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1548 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1550 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1556 p
= recog_data
.constraints
[op_no
];
1558 likely_spilled
[op_no
] = 0;
1559 matchp
->use
[op_no
] = READ
;
1560 matchp
->early_clobber
[op_no
] = 0;
1562 matchp
->use
[op_no
] = WRITE
;
1564 matchp
->use
[op_no
] = READWRITE
;
1566 for (;*p
&& i
< which_alternative
; p
++)
1570 while ((c
= *p
++) != '\0' && c
!= ',')
1578 matchp
->early_clobber
[op_no
] = 1;
1581 matchp
->commutative
[op_no
] = op_no
+ 1;
1582 matchp
->commutative
[op_no
+ 1] = op_no
;
1584 case '0': case '1': case '2': case '3': case '4':
1585 case '5': case '6': case '7': case '8': case '9':
1587 if (c
< op_no
&& likely_spilled
[(unsigned char) c
])
1589 matchp
->with
[op_no
] = c
;
1591 if (matchp
->commutative
[op_no
] >= 0)
1592 matchp
->with
[matchp
->commutative
[op_no
]] = c
;
1594 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1595 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1596 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1597 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1598 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c
)))
1599 likely_spilled
[op_no
] = 1;
1606 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1607 assumed to be in INSN. */
1610 replace_in_call_usage (loc
, dst_reg
, src
, insn
)
1624 code
= GET_CODE (x
);
1627 if (REGNO (x
) != dst_reg
)
1630 validate_change (insn
, loc
, src
, 1);
1635 /* Process each of our operands recursively. */
1636 fmt
= GET_RTX_FORMAT (code
);
1637 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++, fmt
++)
1639 replace_in_call_usage (&XEXP (x
, i
), dst_reg
, src
, insn
);
1640 else if (*fmt
== 'E')
1641 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1642 replace_in_call_usage (& XVECEXP (x
, i
, j
), dst_reg
, src
, insn
);
1645 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1646 the only set in INSN. INSN has just been recognized and constrained.
1647 SRC is operand number OPERAND_NUMBER in INSN.
1648 DST is operand number MATCH_NUMBER in INSN.
1649 If BACKWARD is nonzero, we have been called in a backward pass.
1650 Return nonzero for success. */
1653 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1654 match_number
, regmove_dump_file
)
1655 rtx insn
, set
, src
, src_subreg
, dst
;
1656 int backward
, operand_number
, match_number
;
1657 FILE *regmove_dump_file
;
1660 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1662 int num_calls
= 0, s_num_calls
= 0;
1663 enum rtx_code code
= NOTE
;
1664 HOST_WIDE_INT insn_const
= 0, newconst
;
1665 rtx overlap
= 0; /* need to move insn ? */
1666 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1667 int length
, s_length
;
1669 /* If SRC is marked as unchanging, we may not change it.
1670 ??? Maybe we could get better code by removing the unchanging bit
1671 instead, and changing it back if we don't succeed? */
1672 if (RTX_UNCHANGING_P (src
))
1677 /* Look for (set (regX) (op regA constX))
1678 (set (regY) (op regA constY))
1680 (set (regA) (op regA constX)).
1681 (set (regY) (op regA constY-constX)).
1682 This works for add and shift operations, if
1683 regA is dead after or set by the second insn. */
1685 code
= GET_CODE (SET_SRC (set
));
1686 if ((code
== PLUS
|| code
== LSHIFTRT
1687 || code
== ASHIFT
|| code
== ASHIFTRT
)
1688 && XEXP (SET_SRC (set
), 0) == src
1689 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1690 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1691 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1694 /* We might find a src_note while scanning. */
1698 if (regmove_dump_file
)
1699 fprintf (regmove_dump_file
,
1700 "Could fix operand %d of insn %d matching operand %d.\n",
1701 operand_number
, INSN_UID (insn
), match_number
);
1703 /* If SRC is equivalent to a constant set in a different basic block,
1704 then do not use it for this optimization. We want the equivalence
1705 so that if we have to reload this register, we can reload the
1706 constant, rather than extending the lifespan of the register. */
1707 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1710 /* Scan forward to find the next instruction that
1711 uses the output operand. If the operand dies here,
1712 then replace it in both instructions with
1715 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1717 if (GET_CODE (p
) == CALL_INSN
)
1718 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p
),
1719 REGNO (dst
), src
, p
);
1721 /* ??? We can't scan past the end of a basic block without updating
1722 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1723 if (perhaps_ends_bb_p (p
))
1725 else if (! INSN_P (p
))
1732 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1733 || (GET_CODE (PATTERN (p
)) == USE
1734 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1737 /* See if all of DST dies in P. This test is
1738 slightly more conservative than it needs to be. */
1739 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1740 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1742 /* If we would be moving INSN, check that we won't move it
1743 into the shadow of a live a live flags register. */
1744 /* ??? We only try to move it in front of P, although
1745 we could move it anywhere between OVERLAP and P. */
1746 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1752 rtx set2
= NULL_RTX
;
1754 /* If an optimization is done, the value of SRC while P
1755 is executed will be changed. Check that this is OK. */
1756 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1758 for (q
= p
; q
; q
= NEXT_INSN (q
))
1760 /* ??? We can't scan past the end of a basic block without
1761 updating the register lifetime info
1762 (REG_DEAD/basic_block_live_at_start). */
1763 if (perhaps_ends_bb_p (q
))
1768 else if (! INSN_P (q
))
1770 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1771 || reg_set_p (src
, q
))
1775 set2
= single_set (q
);
1776 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1777 || XEXP (SET_SRC (set2
), 0) != src
1778 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1779 || (SET_DEST (set2
) != src
1780 && ! find_reg_note (q
, REG_DEAD
, src
)))
1782 /* If this is a PLUS, we can still save a register by doing
1785 src -= insn_const; .
1786 This also gives opportunities for subsequent
1787 optimizations in the backward pass, so do it there. */
1788 if (code
== PLUS
&& backward
1789 /* Don't do this if we can likely tie DST to SET_DEST
1790 of P later; we can't do this tying here if we got a
1792 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1794 && GET_CODE (SET_DEST (single_set (p
))) == REG
1795 && (REGNO (SET_DEST (single_set (p
)))
1796 < FIRST_PSEUDO_REGISTER
))
1797 /* We may only emit an insn directly after P if we
1798 are not in the shadow of a live flags register. */
1799 && GET_MODE (p
) == VOIDmode
)
1804 newconst
= -insn_const
;
1812 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1813 /* Reject out of range shifts. */
1816 || ((unsigned HOST_WIDE_INT
) newconst
1817 >= (GET_MODE_BITSIZE (GET_MODE
1818 (SET_SRC (set2
)))))))
1823 if (SET_DEST (set2
) != src
)
1824 post_inc_set
= set2
;
1827 /* We use 1 as last argument to validate_change so that all
1828 changes are accepted or rejected together by apply_change_group
1829 when it is called by validate_replace_rtx . */
1830 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1831 GEN_INT (newconst
), 1);
1833 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1834 if (validate_replace_rtx (dst
, src_subreg
, p
))
1839 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1841 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1843 /* INSN was already checked to be movable wrt. the registers that it
1844 sets / uses when we found no REG_DEAD note for src on it, but it
1845 still might clobber the flags register. We'll have to check that
1846 we won't insert it into the shadow of a live flags register when
1847 we finally know where we are to move it. */
1849 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1852 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1853 already live across a call, then don't perform the optimization. */
1854 if (GET_CODE (p
) == CALL_INSN
)
1856 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1870 /* Remove the death note for DST from P. */
1871 remove_note (p
, dst_note
);
1874 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1875 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1877 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1879 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1880 REG_N_SETS (REGNO (src
))++;
1881 REG_LIVE_LENGTH (REGNO (src
))++;
1885 /* The lifetime of src and dest overlap,
1886 but we can change this by moving insn. */
1887 rtx pat
= PATTERN (insn
);
1889 remove_note (overlap
, src_note
);
1890 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1892 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1896 rtx notes
= REG_NOTES (insn
);
1898 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1899 PUT_CODE (insn
, NOTE
);
1900 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1901 NOTE_SOURCE_FILE (insn
) = 0;
1902 /* emit_insn_after_with_line_notes has no
1903 return value, so search for the new insn. */
1905 while (! INSN_P (insn
) || PATTERN (insn
) != pat
)
1906 insn
= PREV_INSN (insn
);
1908 REG_NOTES (insn
) = notes
;
1911 /* Sometimes we'd generate src = const; src += n;
1912 if so, replace the instruction that set src
1913 in the first place. */
1915 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1917 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1918 rtx q
, set2
= NULL_RTX
;
1919 int num_calls2
= 0, s_length2
= 0;
1921 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1923 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1925 /* ??? We can't scan past the end of a basic block without
1926 updating the register lifetime info
1927 (REG_DEAD/basic_block_live_at_start). */
1928 if (perhaps_ends_bb_p (q
))
1933 else if (! INSN_P (q
))
1937 if (reg_set_p (src
, q
))
1939 set2
= single_set (q
);
1942 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1947 if (GET_CODE (p
) == CALL_INSN
)
1950 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1951 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1954 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
1955 NOTE_SOURCE_FILE (q
) = 0;
1956 REG_N_SETS (REGNO (src
))--;
1957 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1958 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1964 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1965 && (code
== PLUS
|| code
== MINUS
) && insn_const
1966 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1968 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1970 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1972 /* If post_inc still prevails, try to find an
1973 insn where it can be used as a pre-in/decrement.
1974 If code is MINUS, this was already tried. */
1975 if (post_inc
&& code
== PLUS
1976 /* Check that newconst is likely to be usable
1977 in a pre-in/decrement before starting the search. */
1978 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
1979 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
1980 && exact_log2 (newconst
))
1984 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1985 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
1987 /* ??? We can't scan past the end of a basic block without updating
1988 the register lifetime info
1989 (REG_DEAD/basic_block_live_at_start). */
1990 if (perhaps_ends_bb_p (q
))
1992 else if (! INSN_P (q
))
1994 else if (src
!= inc_dest
1995 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
1996 || reg_set_p (src
, q
)))
1998 else if (reg_set_p (inc_dest
, q
))
2000 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
2002 try_auto_increment (q
, post_inc
,
2003 post_inc_set
, inc_dest
, newconst
, 1);
2009 /* Move the death note for DST to INSN if it is used
2011 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
2013 XEXP (dst_note
, 1) = REG_NOTES (insn
);
2014 REG_NOTES (insn
) = dst_note
;
2019 /* Move the death note for SRC from INSN to P. */
2021 remove_note (insn
, src_note
);
2022 XEXP (src_note
, 1) = REG_NOTES (p
);
2023 REG_NOTES (p
) = src_note
;
2025 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
2028 REG_N_SETS (REGNO (src
))++;
2029 REG_N_SETS (REGNO (dst
))--;
2031 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
2033 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
2034 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
2036 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
2037 /* REG_LIVE_LENGTH is only an approximation after
2038 combine if sched is not run, so make sure that we
2039 still have a reasonable value. */
2040 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
2041 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
2043 if (regmove_dump_file
)
2044 fprintf (regmove_dump_file
,
2045 "Fixed operand %d of insn %d matching operand %d.\n",
2046 operand_number
, INSN_UID (insn
), match_number
);
2051 /* return nonzero if X is stable and mentions no regsiters but for
2052 mentioning SRC or mentioning / changing DST . If in doubt, presume
2054 The rationale is that we want to check if we can move an insn easily
2055 while just paying attention to SRC and DST. A register is considered
2056 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2057 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2058 want any registers but SRC and DST. */
2060 stable_and_no_regs_but_for_p (x
, src
, dst
)
2063 RTX_CODE code
= GET_CODE (x
);
2064 switch (GET_RTX_CLASS (code
))
2066 case '<': case '1': case 'c': case '2': case 'b': case '3':
2069 const char *fmt
= GET_RTX_FORMAT (code
);
2070 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2072 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2078 return x
== src
|| x
== dst
;
2079 /* If this is a MEM, look inside - there might be a register hidden in
2080 the address of an unchanging MEM. */
2082 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2086 return ! rtx_unstable_p (x
);
2090 /* Track stack adjustments and stack memory references. Attempt to
2091 reduce the number of stack adjustments by back-propogating across
2092 the memory references.
2094 This is intended primarily for use with targets that do not define
2095 ACCUMULATE_OUTGOING_ARGS. It is of significantly more value to
2096 targets that define PREFERRED_STACK_BOUNDARY more aligned than
2097 STACK_BOUNDARY (e.g. x86), or if not all registers can be pushed
2098 (e.g. x86 fp regs) which would ordinarily have to be implemented
2099 as a sub/mov pair due to restrictions in calls.c.
2101 Propogation stops when any of the insns that need adjusting are
2102 (a) no longer valid because we've exceeded their range, (b) a
2103 non-trivial push instruction, or (c) a call instruction.
2105 Restriction B is based on the assumption that push instructions
2106 are smaller or faster. If a port really wants to remove all
2107 pushes, it should have defined ACCUMULATE_OUTGOING_ARGS. The
2108 one exception that is made is for an add immediately followed
2111 /* This structure records stack memory references between stack adjusting
2116 HOST_WIDE_INT sp_offset
;
2118 struct csa_memlist
*next
;
2121 static int stack_memref_p
PARAMS ((rtx
));
2122 static rtx single_set_for_csa
PARAMS ((rtx
));
2123 static void free_csa_memlist
PARAMS ((struct csa_memlist
*));
2124 static struct csa_memlist
*record_one_stack_memref
2125 PARAMS ((rtx
, rtx
*, struct csa_memlist
*));
2126 static int try_apply_stack_adjustment
2127 PARAMS ((rtx
, struct csa_memlist
*, HOST_WIDE_INT
, HOST_WIDE_INT
));
2128 static void combine_stack_adjustments_for_block
PARAMS ((basic_block
));
2129 static int record_stack_memrefs
PARAMS ((rtx
*, void *));
2132 /* Main entry point for stack adjustment combination. */
2135 combine_stack_adjustments ()
2139 for (i
= 0; i
< n_basic_blocks
; ++i
)
2140 combine_stack_adjustments_for_block (BASIC_BLOCK (i
));
2143 /* Recognize a MEM of the form (sp) or (plus sp const). */
2149 if (GET_CODE (x
) != MEM
)
2153 if (x
== stack_pointer_rtx
)
2155 if (GET_CODE (x
) == PLUS
2156 && XEXP (x
, 0) == stack_pointer_rtx
2157 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2163 /* Recognize either normal single_set or the hack in i386.md for
2164 tying fp and sp adjustments. */
2167 single_set_for_csa (insn
)
2171 rtx tmp
= single_set (insn
);
2175 if (GET_CODE (insn
) != INSN
2176 || GET_CODE (PATTERN (insn
)) != PARALLEL
)
2179 tmp
= PATTERN (insn
);
2180 if (GET_CODE (XVECEXP (tmp
, 0, 0)) != SET
)
2183 for (i
= 1; i
< XVECLEN (tmp
, 0); ++i
)
2185 rtx
this = XVECEXP (tmp
, 0, i
);
2187 /* The special case is allowing a no-op set. */
2188 if (GET_CODE (this) == SET
2189 && SET_SRC (this) == SET_DEST (this))
2191 else if (GET_CODE (this) != CLOBBER
2192 && GET_CODE (this) != USE
)
2196 return XVECEXP (tmp
, 0, 0);
2199 /* Free the list of csa_memlist nodes. */
2202 free_csa_memlist (memlist
)
2203 struct csa_memlist
*memlist
;
2205 struct csa_memlist
*next
;
2206 for (; memlist
; memlist
= next
)
2208 next
= memlist
->next
;
2213 /* Create a new csa_memlist node from the given memory reference.
2214 It is already known that the memory is stack_memref_p. */
2216 static struct csa_memlist
*
2217 record_one_stack_memref (insn
, mem
, next_memlist
)
2219 struct csa_memlist
*next_memlist
;
2221 struct csa_memlist
*ml
;
2223 ml
= (struct csa_memlist
*) xmalloc (sizeof (*ml
));
2225 if (XEXP (*mem
, 0) == stack_pointer_rtx
)
2228 ml
->sp_offset
= INTVAL (XEXP (XEXP (*mem
, 0), 1));
2232 ml
->next
= next_memlist
;
2237 /* Attempt to apply ADJUST to the stack adjusting insn INSN, as well
2238 as each of the memories in MEMLIST. Return true on success. */
2241 try_apply_stack_adjustment (insn
, memlist
, new_adjust
, delta
)
2243 struct csa_memlist
*memlist
;
2244 HOST_WIDE_INT new_adjust
, delta
;
2246 struct csa_memlist
*ml
;
2249 set
= single_set_for_csa (insn
);
2250 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (new_adjust
), 1);
2252 for (ml
= memlist
; ml
; ml
= ml
->next
)
2254 HOST_WIDE_INT c
= ml
->sp_offset
- delta
;
2255 rtx
new = gen_rtx_MEM (GET_MODE (*ml
->mem
),
2256 plus_constant (stack_pointer_rtx
, c
));
2258 MEM_COPY_ATTRIBUTES (new, *ml
->mem
);
2259 validate_change (ml
->insn
, ml
->mem
, new, 1);
2262 if (apply_change_group ())
2264 /* Succeeded. Update our knowledge of the memory references. */
2265 for (ml
= memlist
; ml
; ml
= ml
->next
)
2266 ml
->sp_offset
-= delta
;
2274 /* Called via for_each_rtx and used to record all stack memory references in
2275 the insn and discard all other stack pointer references. */
2276 struct record_stack_memrefs_data
2279 struct csa_memlist
*memlist
;
2283 record_stack_memrefs (xp
, data
)
2288 struct record_stack_memrefs_data
*d
=
2289 (struct record_stack_memrefs_data
*) data
;
2292 switch (GET_CODE (x
))
2295 if (!reg_mentioned_p (stack_pointer_rtx
, x
))
2297 /* We are not able to handle correctly all possible memrefs containing
2298 stack pointer, so this check is neccesary. */
2299 if (stack_memref_p (x
))
2301 d
->memlist
= record_one_stack_memref (d
->insn
, xp
, d
->memlist
);
2306 /* ??? We want be able to handle non-memory stack pointer
2307 references later. For now just discard all insns refering to
2308 stack pointer outside mem expressions. We would probably
2309 want to teach validate_replace to simplify expressions first.
2311 We can't just compare with STACK_POINTER_RTX because the
2312 reference to the stack pointer might be in some other mode.
2313 In particular, an explict clobber in an asm statement will
2314 result in a QImode clober. */
2315 if (REGNO (x
) == STACK_POINTER_REGNUM
)
2324 /* Subroutine of combine_stack_adjustments, called for each basic block. */
2327 combine_stack_adjustments_for_block (bb
)
2330 HOST_WIDE_INT last_sp_adjust
= 0;
2331 rtx last_sp_set
= NULL_RTX
;
2332 struct csa_memlist
*memlist
= NULL
;
2335 struct record_stack_memrefs_data data
;
2337 for (insn
= bb
->head
; ; insn
= next
)
2341 pending_delete
= NULL_RTX
;
2342 next
= NEXT_INSN (insn
);
2344 if (! INSN_P (insn
))
2347 set
= single_set_for_csa (insn
);
2350 rtx dest
= SET_DEST (set
);
2351 rtx src
= SET_SRC (set
);
2353 /* Find constant additions to the stack pointer. */
2354 if (dest
== stack_pointer_rtx
2355 && GET_CODE (src
) == PLUS
2356 && XEXP (src
, 0) == stack_pointer_rtx
2357 && GET_CODE (XEXP (src
, 1)) == CONST_INT
)
2359 HOST_WIDE_INT this_adjust
= INTVAL (XEXP (src
, 1));
2361 /* If we've not seen an adjustment previously, record
2362 it now and continue. */
2366 last_sp_adjust
= this_adjust
;
2370 /* If not all recorded memrefs can be adjusted, or the
2371 adjustment is now too large for a constant addition,
2372 we cannot merge the two stack adjustments.
2374 Also we need to be carefull to not move stack pointer
2375 such that we create stack accesses outside the allocated
2376 area. We can combine an allocation into the first insn,
2377 or a deallocation into the second insn. We can not
2378 combine an allocation followed by a deallocation.
2380 The only somewhat frequent ocurrence of the later is when
2381 a function allocates a stack frame but does not use it.
2382 For this case, we would need to analyze rtl stream to be
2383 sure that allocated area is really unused. This means not
2384 only checking the memory references, but also all registers
2385 or global memory references possibly containing a stack
2388 Perhaps the best way to address this problem is to teach
2389 gcc not to allocate stack for objects never used. */
2391 /* Combine an allocation into the first instruction. */
2392 if (STACK_GROWS_DOWNWARD
? this_adjust
<= 0 : this_adjust
>= 0)
2394 if (try_apply_stack_adjustment (last_sp_set
, memlist
,
2395 last_sp_adjust
+ this_adjust
,
2399 pending_delete
= insn
;
2400 last_sp_adjust
+= this_adjust
;
2405 /* Otherwise we have a deallocation. Do not combine with
2406 a previous allocation. Combine into the second insn. */
2407 else if (STACK_GROWS_DOWNWARD
2408 ? last_sp_adjust
>= 0 : last_sp_adjust
<= 0)
2410 if (try_apply_stack_adjustment (insn
, memlist
,
2411 last_sp_adjust
+ this_adjust
,
2415 flow_delete_insn (last_sp_set
);
2417 last_sp_adjust
+= this_adjust
;
2418 free_csa_memlist (memlist
);
2424 /* Combination failed. Restart processing from here. */
2425 free_csa_memlist (memlist
);
2428 last_sp_adjust
= this_adjust
;
2432 /* Find a predecrement of exactly the previous adjustment and
2433 turn it into a direct store. Obviously we can't do this if
2434 there were any intervening uses of the stack pointer. */
2436 && GET_CODE (dest
) == MEM
2437 && ((GET_CODE (XEXP (dest
, 0)) == PRE_DEC
2439 == (HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (dest
))))
2440 || (GET_CODE (XEXP (dest
, 0)) == PRE_MODIFY
2441 && GET_CODE (XEXP (XEXP (dest
, 0), 1)) == PLUS
2442 && XEXP (XEXP (XEXP (dest
, 0), 1), 0) == stack_pointer_rtx
2443 && (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2445 && (INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2446 == -last_sp_adjust
)))
2447 && XEXP (XEXP (dest
, 0), 0) == stack_pointer_rtx
2448 && ! reg_mentioned_p (stack_pointer_rtx
, src
)
2449 && memory_address_p (GET_MODE (dest
), stack_pointer_rtx
)
2450 && validate_change (insn
, &SET_DEST (set
),
2451 change_address (dest
, VOIDmode
,
2452 stack_pointer_rtx
), 0))
2454 if (last_sp_set
== bb
->head
)
2455 bb
->head
= NEXT_INSN (last_sp_set
);
2456 flow_delete_insn (last_sp_set
);
2458 free_csa_memlist (memlist
);
2460 last_sp_set
= NULL_RTX
;
2467 data
.memlist
= memlist
;
2468 if (GET_CODE (insn
) != CALL_INSN
&& last_sp_set
2469 && !for_each_rtx (&PATTERN (insn
), record_stack_memrefs
, &data
))
2471 memlist
= data
.memlist
;
2474 memlist
= data
.memlist
;
2476 /* Otherwise, we were not able to process the instruction.
2477 Do not continue collecting data across such a one. */
2479 && (GET_CODE (insn
) == CALL_INSN
2480 || reg_mentioned_p (stack_pointer_rtx
, PATTERN (insn
))))
2482 free_csa_memlist (memlist
);
2484 last_sp_set
= NULL_RTX
;
2489 if (insn
== bb
->end
)
2493 flow_delete_insn (pending_delete
);
2498 bb
->end
= PREV_INSN (pending_delete
);
2499 flow_delete_insn (pending_delete
);