1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
244 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
245 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
246 static void combine_reloads
PARAMS ((void));
247 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
248 enum reload_type
, int, int));
249 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
250 enum machine_mode
, enum machine_mode
,
251 enum reg_class
, int, int));
252 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
253 static struct decomposition decompose
PARAMS ((rtx
));
254 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
255 static int alternative_allows_memconst
PARAMS ((const char *, int));
256 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
258 static rtx make_memloc
PARAMS ((rtx
, int));
259 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
260 int, enum reload_type
, int, rtx
));
261 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
262 static rtx subst_indexed_address
PARAMS ((rtx
));
263 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
264 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
265 int, enum reload_type
,int, rtx
));
266 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
267 enum machine_mode
, int,
268 enum reload_type
, int));
269 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
271 static int find_inc_amount
PARAMS ((rtx
, rtx
));
273 #ifdef HAVE_SECONDARY_RELOADS
275 /* Determine if any secondary reloads are needed for loading (if IN_P is
276 non-zero) or storing (if IN_P is zero) X to or from a reload register of
277 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
278 are needed, push them.
280 Return the reload number of the secondary reload we made, or -1 if
281 we didn't need one. *PICODE is set to the insn_code to use if we do
282 need a secondary reload. */
285 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
291 enum reg_class reload_class
;
292 enum machine_mode reload_mode
;
293 enum reload_type type
;
294 enum insn_code
*picode
;
296 enum reg_class
class = NO_REGS
;
297 enum machine_mode mode
= reload_mode
;
298 enum insn_code icode
= CODE_FOR_nothing
;
299 enum reg_class t_class
= NO_REGS
;
300 enum machine_mode t_mode
= VOIDmode
;
301 enum insn_code t_icode
= CODE_FOR_nothing
;
302 enum reload_type secondary_type
;
303 int s_reload
, t_reload
= -1;
305 if (type
== RELOAD_FOR_INPUT_ADDRESS
306 || type
== RELOAD_FOR_OUTPUT_ADDRESS
307 || type
== RELOAD_FOR_INPADDR_ADDRESS
308 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
309 secondary_type
= type
;
311 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
313 *picode
= CODE_FOR_nothing
;
315 /* If X is a paradoxical SUBREG, use the inner value to determine both the
316 mode and object being reloaded. */
317 if (GET_CODE (x
) == SUBREG
318 && (GET_MODE_SIZE (GET_MODE (x
))
319 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
322 reload_mode
= GET_MODE (x
);
325 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
326 is still a pseudo-register by now, it *must* have an equivalent MEM
327 but we don't want to assume that), use that equivalent when seeing if
328 a secondary reload is needed since whether or not a reload is needed
329 might be sensitive to the form of the MEM. */
331 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
332 && reg_equiv_mem
[REGNO (x
)] != 0)
333 x
= reg_equiv_mem
[REGNO (x
)];
335 #ifdef SECONDARY_INPUT_RELOAD_CLASS
337 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
340 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
342 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
345 /* If we don't need any secondary registers, done. */
346 if (class == NO_REGS
)
349 /* Get a possible insn to use. If the predicate doesn't accept X, don't
352 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
353 : reload_out_optab
[(int) reload_mode
]);
355 if (icode
!= CODE_FOR_nothing
356 && insn_data
[(int) icode
].operand
[in_p
].predicate
357 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
358 icode
= CODE_FOR_nothing
;
360 /* If we will be using an insn, see if it can directly handle the reload
361 register we will be using. If it can, the secondary reload is for a
362 scratch register. If it can't, we will use the secondary reload for
363 an intermediate register and require a tertiary reload for the scratch
366 if (icode
!= CODE_FOR_nothing
)
368 /* If IN_P is non-zero, the reload register will be the output in
369 operand 0. If IN_P is zero, the reload register will be the input
370 in operand 1. Outputs should have an initial "=", which we must
373 enum reg_class insn_class
;
375 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
376 insn_class
= ALL_REGS
;
380 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
382 = (insn_letter
== 'r' ? GENERAL_REGS
383 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
385 if (insn_class
== NO_REGS
)
388 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
392 /* The scratch register's constraint must start with "=&". */
393 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
394 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
397 if (reg_class_subset_p (reload_class
, insn_class
))
398 mode
= insn_data
[(int) icode
].operand
[2].mode
;
401 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
403 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
404 t_class
= (t_letter
== 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
407 icode
= CODE_FOR_nothing
;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
426 && t_icode
== CODE_FOR_nothing
)
429 /* If we need a tertiary reload, see if we have one we can reuse or else
432 if (t_class
!= NO_REGS
)
434 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
435 if (rld
[t_reload
].secondary_p
436 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
437 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
438 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
439 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
440 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
441 == CODE_FOR_nothing
))
442 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
443 == CODE_FOR_nothing
)))
444 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
445 && MERGABLE_RELOADS (secondary_type
,
446 rld
[t_reload
].when_needed
,
447 opnum
, rld
[t_reload
].opnum
))
450 rld
[t_reload
].inmode
= t_mode
;
452 rld
[t_reload
].outmode
= t_mode
;
454 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
455 rld
[t_reload
].class = t_class
;
457 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
458 rld
[t_reload
].optional
&= optional
;
459 rld
[t_reload
].secondary_p
= 1;
460 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
461 opnum
, rld
[t_reload
].opnum
))
462 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
465 if (t_reload
== n_reloads
)
467 /* We need to make a new tertiary reload for this register class. */
468 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
469 rld
[t_reload
].class = t_class
;
470 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
471 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
472 rld
[t_reload
].reg_rtx
= 0;
473 rld
[t_reload
].optional
= optional
;
474 rld
[t_reload
].inc
= 0;
475 /* Maybe we could combine these, but it seems too tricky. */
476 rld
[t_reload
].nocombine
= 1;
477 rld
[t_reload
].in_reg
= 0;
478 rld
[t_reload
].out_reg
= 0;
479 rld
[t_reload
].opnum
= opnum
;
480 rld
[t_reload
].when_needed
= secondary_type
;
481 rld
[t_reload
].secondary_in_reload
= -1;
482 rld
[t_reload
].secondary_out_reload
= -1;
483 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
484 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
485 rld
[t_reload
].secondary_p
= 1;
491 /* See if we can reuse an existing secondary reload. */
492 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
493 if (rld
[s_reload
].secondary_p
494 && (reg_class_subset_p (class, rld
[s_reload
].class)
495 || reg_class_subset_p (rld
[s_reload
].class, class))
496 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
497 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
498 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
499 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
500 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
501 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
502 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
503 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
504 opnum
, rld
[s_reload
].opnum
))
507 rld
[s_reload
].inmode
= mode
;
509 rld
[s_reload
].outmode
= mode
;
511 if (reg_class_subset_p (class, rld
[s_reload
].class))
512 rld
[s_reload
].class = class;
514 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
515 rld
[s_reload
].optional
&= optional
;
516 rld
[s_reload
].secondary_p
= 1;
517 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
518 opnum
, rld
[s_reload
].opnum
))
519 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
522 if (s_reload
== n_reloads
)
524 #ifdef SECONDARY_MEMORY_NEEDED
525 /* If we need a memory location to copy between the two reload regs,
526 set it up now. Note that we do the input case before making
527 the reload and the output case after. This is due to the
528 way reloads are output. */
530 if (in_p
&& icode
== CODE_FOR_nothing
531 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
533 get_secondary_mem (x
, reload_mode
, opnum
, type
);
535 /* We may have just added new reloads. Make sure we add
536 the new reload at the end. */
537 s_reload
= n_reloads
;
541 /* We need to make a new secondary reload for this register class. */
542 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
543 rld
[s_reload
].class = class;
545 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
546 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
547 rld
[s_reload
].reg_rtx
= 0;
548 rld
[s_reload
].optional
= optional
;
549 rld
[s_reload
].inc
= 0;
550 /* Maybe we could combine these, but it seems too tricky. */
551 rld
[s_reload
].nocombine
= 1;
552 rld
[s_reload
].in_reg
= 0;
553 rld
[s_reload
].out_reg
= 0;
554 rld
[s_reload
].opnum
= opnum
;
555 rld
[s_reload
].when_needed
= secondary_type
;
556 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
557 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
558 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
559 rld
[s_reload
].secondary_out_icode
560 = ! in_p
? t_icode
: CODE_FOR_nothing
;
561 rld
[s_reload
].secondary_p
= 1;
565 #ifdef SECONDARY_MEMORY_NEEDED
566 if (! in_p
&& icode
== CODE_FOR_nothing
567 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
568 get_secondary_mem (x
, mode
, opnum
, type
);
575 #endif /* HAVE_SECONDARY_RELOADS */
577 #ifdef SECONDARY_MEMORY_NEEDED
579 /* Return a memory location that will be used to copy X in mode MODE.
580 If we haven't already made a location for this mode in this insn,
581 call find_reloads_address on the location being returned. */
584 get_secondary_mem (x
, mode
, opnum
, type
)
585 rtx x ATTRIBUTE_UNUSED
;
586 enum machine_mode mode
;
588 enum reload_type type
;
593 /* By default, if MODE is narrower than a word, widen it to a word.
594 This is required because most machines that require these memory
595 locations do not support short load and stores from all registers
596 (e.g., FP registers). */
598 #ifdef SECONDARY_MEMORY_NEEDED_MODE
599 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
601 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
602 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
605 /* If we already have made a MEM for this operand in MODE, return it. */
606 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
607 return secondary_memlocs_elim
[(int) mode
][opnum
];
609 /* If this is the first time we've tried to get a MEM for this mode,
610 allocate a new one. `something_changed' in reload will get set
611 by noticing that the frame size has changed. */
613 if (secondary_memlocs
[(int) mode
] == 0)
615 #ifdef SECONDARY_MEMORY_NEEDED_RTX
616 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
618 secondary_memlocs
[(int) mode
]
619 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
623 /* Get a version of the address doing any eliminations needed. If that
624 didn't give us a new MEM, make a new one if it isn't valid. */
626 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
627 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
629 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
630 loc
= copy_rtx (loc
);
632 /* The only time the call below will do anything is if the stack
633 offset is too large. In that case IND_LEVELS doesn't matter, so we
634 can just pass a zero. Adjust the type to be the address of the
635 corresponding object. If the address was valid, save the eliminated
636 address. If it wasn't valid, we need to make a reload each time, so
641 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
642 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
645 find_reloads_address (mode
, (rtx
*)0, XEXP (loc
, 0), &XEXP (loc
, 0),
649 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
653 /* Clear any secondary memory locations we've made. */
656 clear_secondary_mem ()
658 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
660 #endif /* SECONDARY_MEMORY_NEEDED */
662 /* Find the largest class for which every register number plus N is valid in
663 M1 (if in range). Abort if no such class exists. */
665 static enum reg_class
666 find_valid_class (m1
, n
)
667 enum machine_mode m1 ATTRIBUTE_UNUSED
;
672 enum reg_class best_class
= NO_REGS
;
673 unsigned int best_size
= 0;
675 for (class = 1; class < N_REG_CLASSES
; class++)
678 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
679 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
680 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
681 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
684 if (! bad
&& reg_class_size
[class] > best_size
)
685 best_class
= class, best_size
= reg_class_size
[class];
694 /* Return the number of a previously made reload that can be combined with
695 a new one, or n_reloads if none of the existing reloads can be used.
696 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
697 push_reload, they determine the kind of the new reload that we try to
698 combine. P_IN points to the corresponding value of IN, which can be
699 modified by this function.
700 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
703 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
705 enum reg_class
class;
706 enum reload_type type
;
707 int opnum
, dont_share
;
711 /* We can't merge two reloads if the output of either one is
714 if (earlyclobber_operand_p (out
))
717 /* We can use an existing reload if the class is right
718 and at least one of IN and OUT is a match
719 and the other is at worst neutral.
720 (A zero compared against anything is neutral.)
722 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
723 for the same thing since that can cause us to need more reload registers
724 than we otherwise would. */
726 for (i
= 0; i
< n_reloads
; i
++)
727 if ((reg_class_subset_p (class, rld
[i
].class)
728 || reg_class_subset_p (rld
[i
].class, class))
729 /* If the existing reload has a register, it must fit our class. */
730 && (rld
[i
].reg_rtx
== 0
731 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
732 true_regnum (rld
[i
].reg_rtx
)))
733 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
734 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
735 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
736 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
737 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
738 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
739 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
742 /* Reloading a plain reg for input can match a reload to postincrement
743 that reg, since the postincrement's value is the right value.
744 Likewise, it can match a preincrement reload, since we regard
745 the preincrementation as happening before any ref in this insn
747 for (i
= 0; i
< n_reloads
; i
++)
748 if ((reg_class_subset_p (class, rld
[i
].class)
749 || reg_class_subset_p (rld
[i
].class, class))
750 /* If the existing reload has a register, it must fit our
752 && (rld
[i
].reg_rtx
== 0
753 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
754 true_regnum (rld
[i
].reg_rtx
)))
755 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
756 && ((GET_CODE (in
) == REG
757 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
758 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
759 || (GET_CODE (rld
[i
].in
) == REG
760 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
761 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
762 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
763 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
764 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
765 opnum
, rld
[i
].opnum
))
767 /* Make sure reload_in ultimately has the increment,
768 not the plain register. */
769 if (GET_CODE (in
) == REG
)
776 /* Return nonzero if X is a SUBREG which will require reloading of its
777 SUBREG_REG expression. */
780 reload_inner_reg_of_subreg (x
, mode
)
782 enum machine_mode mode
;
786 /* Only SUBREGs are problematical. */
787 if (GET_CODE (x
) != SUBREG
)
790 inner
= SUBREG_REG (x
);
792 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
793 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
796 /* If INNER is not a hard register, then INNER will not need to
798 if (GET_CODE (inner
) != REG
799 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
802 /* If INNER is not ok for MODE, then INNER will need reloading. */
803 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
806 /* If the outer part is a word or smaller, INNER larger than a
807 word and the number of regs for INNER is not the same as the
808 number of words in INNER, then INNER will need reloading. */
809 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
810 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
811 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
812 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
815 /* Record one reload that needs to be performed.
816 IN is an rtx saying where the data are to be found before this instruction.
817 OUT says where they must be stored after the instruction.
818 (IN is zero for data not read, and OUT is zero for data not written.)
819 INLOC and OUTLOC point to the places in the instructions where
820 IN and OUT were found.
821 If IN and OUT are both non-zero, it means the same register must be used
822 to reload both IN and OUT.
824 CLASS is a register class required for the reloaded data.
825 INMODE is the machine mode that the instruction requires
826 for the reg that replaces IN and OUTMODE is likewise for OUT.
828 If IN is zero, then OUT's location and mode should be passed as
831 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
833 OPTIONAL nonzero means this reload does not need to be performed:
834 it can be discarded if that is more convenient.
836 OPNUM and TYPE say what the purpose of this reload is.
838 The return value is the reload-number for this reload.
840 If both IN and OUT are nonzero, in some rare cases we might
841 want to make two separate reloads. (Actually we never do this now.)
842 Therefore, the reload-number for OUT is stored in
843 output_reloadnum when we return; the return value applies to IN.
844 Usually (presently always), when IN and OUT are nonzero,
845 the two reload-numbers are equal, but the caller should be careful to
849 push_reload (in
, out
, inloc
, outloc
, class,
850 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
853 enum reg_class
class;
854 enum machine_mode inmode
, outmode
;
858 enum reload_type type
;
862 int dont_remove_subreg
= 0;
863 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
864 int secondary_in_reload
= -1, secondary_out_reload
= -1;
865 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
866 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
868 /* INMODE and/or OUTMODE could be VOIDmode if no mode
869 has been specified for the operand. In that case,
870 use the operand's mode as the mode to reload. */
871 if (inmode
== VOIDmode
&& in
!= 0)
872 inmode
= GET_MODE (in
);
873 if (outmode
== VOIDmode
&& out
!= 0)
874 outmode
= GET_MODE (out
);
876 /* If IN is a pseudo register everywhere-equivalent to a constant, and
877 it is not in a hard register, reload straight from the constant,
878 since we want to get rid of such pseudo registers.
879 Often this is done earlier, but not always in find_reloads_address. */
880 if (in
!= 0 && GET_CODE (in
) == REG
)
882 int regno
= REGNO (in
);
884 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
885 && reg_equiv_constant
[regno
] != 0)
886 in
= reg_equiv_constant
[regno
];
889 /* Likewise for OUT. Of course, OUT will never be equivalent to
890 an actual constant, but it might be equivalent to a memory location
891 (in the case of a parameter). */
892 if (out
!= 0 && GET_CODE (out
) == REG
)
894 int regno
= REGNO (out
);
896 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
897 && reg_equiv_constant
[regno
] != 0)
898 out
= reg_equiv_constant
[regno
];
901 /* If we have a read-write operand with an address side-effect,
902 change either IN or OUT so the side-effect happens only once. */
903 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
904 switch (GET_CODE (XEXP (in
, 0)))
906 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
907 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
910 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
911 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
918 /* If we are reloading a (SUBREG constant ...), really reload just the
919 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
920 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
921 a pseudo and hence will become a MEM) with M1 wider than M2 and the
922 register is a pseudo, also reload the inside expression.
923 For machines that extend byte loads, do this for any SUBREG of a pseudo
924 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
925 M2 is an integral mode that gets extended when loaded.
926 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
927 either M1 is not valid for R or M2 is wider than a word but we only
928 need one word to store an M2-sized quantity in R.
929 (However, if OUT is nonzero, we need to reload the reg *and*
930 the subreg, so do nothing here, and let following statement handle it.)
932 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
933 we can't handle it here because CONST_INT does not indicate a mode.
935 Similarly, we must reload the inside expression if we have a
936 STRICT_LOW_PART (presumably, in == out in the cas).
938 Also reload the inner expression if it does not require a secondary
939 reload but the SUBREG does.
941 Finally, reload the inner expression if it is a register that is in
942 the class whose registers cannot be referenced in a different size
943 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
944 cannot reload just the inside since we might end up with the wrong
945 register class. But if it is inside a STRICT_LOW_PART, we have
946 no choice, so we hope we do get the right register class there. */
948 if (in
!= 0 && GET_CODE (in
) == SUBREG
949 && (subreg_lowpart_p (in
) || strict_low
)
950 #ifdef CLASS_CANNOT_CHANGE_MODE
951 && (class != CLASS_CANNOT_CHANGE_MODE
952 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
954 && (CONSTANT_P (SUBREG_REG (in
))
955 || GET_CODE (SUBREG_REG (in
)) == PLUS
957 || (((GET_CODE (SUBREG_REG (in
)) == REG
958 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
959 || GET_CODE (SUBREG_REG (in
)) == MEM
)
960 && ((GET_MODE_SIZE (inmode
)
961 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
962 #ifdef LOAD_EXTEND_OP
963 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
964 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
966 && (GET_MODE_SIZE (inmode
)
967 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
968 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
969 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
971 #ifdef WORD_REGISTER_OPERATIONS
972 || ((GET_MODE_SIZE (inmode
)
973 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
974 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
975 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
979 || (GET_CODE (SUBREG_REG (in
)) == REG
980 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
981 /* The case where out is nonzero
982 is handled differently in the following statement. */
983 && (out
== 0 || subreg_lowpart_p (in
))
984 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
987 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
989 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
990 GET_MODE (SUBREG_REG (in
)))))
991 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
992 #ifdef SECONDARY_INPUT_RELOAD_CLASS
993 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
994 && (SECONDARY_INPUT_RELOAD_CLASS (class,
995 GET_MODE (SUBREG_REG (in
)),
999 #ifdef CLASS_CANNOT_CHANGE_MODE
1000 || (GET_CODE (SUBREG_REG (in
)) == REG
1001 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1002 && (TEST_HARD_REG_BIT
1003 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1004 REGNO (SUBREG_REG (in
))))
1005 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1010 in_subreg_loc
= inloc
;
1011 inloc
= &SUBREG_REG (in
);
1013 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1014 if (GET_CODE (in
) == MEM
)
1015 /* This is supposed to happen only for paradoxical subregs made by
1016 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1017 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1020 inmode
= GET_MODE (in
);
1023 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1024 either M1 is not valid for R or M2 is wider than a word but we only
1025 need one word to store an M2-sized quantity in R.
1027 However, we must reload the inner reg *as well as* the subreg in
1030 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1031 code above. This can happen if SUBREG_BYTE != 0. */
1033 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1035 enum reg_class in_class
= class;
1037 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1039 = find_valid_class (inmode
,
1040 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1041 GET_MODE (SUBREG_REG (in
)),
1045 /* This relies on the fact that emit_reload_insns outputs the
1046 instructions for input reloads of type RELOAD_OTHER in the same
1047 order as the reloads. Thus if the outer reload is also of type
1048 RELOAD_OTHER, we are guaranteed that this inner reload will be
1049 output before the outer reload. */
1050 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*)0,
1051 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1052 dont_remove_subreg
= 1;
1055 /* Similarly for paradoxical and problematical SUBREGs on the output.
1056 Note that there is no reason we need worry about the previous value
1057 of SUBREG_REG (out); even if wider than out,
1058 storing in a subreg is entitled to clobber it all
1059 (except in the case of STRICT_LOW_PART,
1060 and in that case the constraint should label it input-output.) */
1061 if (out
!= 0 && GET_CODE (out
) == SUBREG
1062 && (subreg_lowpart_p (out
) || strict_low
)
1063 #ifdef CLASS_CANNOT_CHANGE_MODE
1064 && (class != CLASS_CANNOT_CHANGE_MODE
1065 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1068 && (CONSTANT_P (SUBREG_REG (out
))
1070 || (((GET_CODE (SUBREG_REG (out
)) == REG
1071 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1072 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1073 && ((GET_MODE_SIZE (outmode
)
1074 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1075 #ifdef WORD_REGISTER_OPERATIONS
1076 || ((GET_MODE_SIZE (outmode
)
1077 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1078 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1079 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1083 || (GET_CODE (SUBREG_REG (out
)) == REG
1084 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1085 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1086 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1088 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1090 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1091 GET_MODE (SUBREG_REG (out
)))))
1092 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1093 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1094 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1095 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1096 GET_MODE (SUBREG_REG (out
)),
1100 #ifdef CLASS_CANNOT_CHANGE_MODE
1101 || (GET_CODE (SUBREG_REG (out
)) == REG
1102 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1103 && (TEST_HARD_REG_BIT
1104 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1105 REGNO (SUBREG_REG (out
))))
1106 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1111 out_subreg_loc
= outloc
;
1112 outloc
= &SUBREG_REG (out
);
1114 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1115 if (GET_CODE (out
) == MEM
1116 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1119 outmode
= GET_MODE (out
);
1122 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1123 either M1 is not valid for R or M2 is wider than a word but we only
1124 need one word to store an M2-sized quantity in R.
1126 However, we must reload the inner reg *as well as* the subreg in
1127 that case. In this case, the inner reg is an in-out reload. */
1129 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1131 /* This relies on the fact that emit_reload_insns outputs the
1132 instructions for output reloads of type RELOAD_OTHER in reverse
1133 order of the reloads. Thus if the outer reload is also of type
1134 RELOAD_OTHER, we are guaranteed that this inner reload will be
1135 output after the outer reload. */
1136 dont_remove_subreg
= 1;
1137 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1139 find_valid_class (outmode
,
1140 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1141 GET_MODE (SUBREG_REG (out
)),
1144 VOIDmode
, VOIDmode
, 0, 0,
1145 opnum
, RELOAD_OTHER
);
1148 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1149 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1150 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1151 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1154 /* If IN is a SUBREG of a hard register, make a new REG. This
1155 simplifies some of the cases below. */
1157 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1158 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1159 && ! dont_remove_subreg
)
1160 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1162 /* Similarly for OUT. */
1163 if (out
!= 0 && GET_CODE (out
) == SUBREG
1164 && GET_CODE (SUBREG_REG (out
)) == REG
1165 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1166 && ! dont_remove_subreg
)
1167 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1169 /* Narrow down the class of register wanted if that is
1170 desirable on this machine for efficiency. */
1172 class = PREFERRED_RELOAD_CLASS (in
, class);
1174 /* Output reloads may need analogous treatment, different in detail. */
1175 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1177 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1180 /* Make sure we use a class that can handle the actual pseudo
1181 inside any subreg. For example, on the 386, QImode regs
1182 can appear within SImode subregs. Although GENERAL_REGS
1183 can handle SImode, QImode needs a smaller class. */
1184 #ifdef LIMIT_RELOAD_CLASS
1186 class = LIMIT_RELOAD_CLASS (inmode
, class);
1187 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1188 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1191 class = LIMIT_RELOAD_CLASS (outmode
, class);
1192 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1193 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1196 /* Verify that this class is at least possible for the mode that
1198 if (this_insn_is_asm
)
1200 enum machine_mode mode
;
1201 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1205 if (mode
== VOIDmode
)
1207 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1212 outmode
= word_mode
;
1214 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1215 if (HARD_REGNO_MODE_OK (i
, mode
)
1216 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1218 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1221 for (j
= 1; j
< nregs
; j
++)
1222 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1227 if (i
== FIRST_PSEUDO_REGISTER
)
1229 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1234 /* Optional output reloads are always OK even if we have no register class,
1235 since the function of these reloads is only to have spill_reg_store etc.
1236 set, so that the storing insn can be deleted later. */
1237 if (class == NO_REGS
1238 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1241 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1245 /* See if we need a secondary reload register to move between CLASS
1246 and IN or CLASS and OUT. Get the icode and push any required reloads
1247 needed for each of them if so. */
1249 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1252 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1253 &secondary_in_icode
);
1256 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1257 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1258 secondary_out_reload
1259 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1260 type
, &secondary_out_icode
);
1263 /* We found no existing reload suitable for re-use.
1264 So add an additional reload. */
1266 #ifdef SECONDARY_MEMORY_NEEDED
1267 /* If a memory location is needed for the copy, make one. */
1268 if (in
!= 0 && GET_CODE (in
) == REG
1269 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1270 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1272 get_secondary_mem (in
, inmode
, opnum
, type
);
1278 rld
[i
].class = class;
1279 rld
[i
].inmode
= inmode
;
1280 rld
[i
].outmode
= outmode
;
1282 rld
[i
].optional
= optional
;
1284 rld
[i
].nocombine
= 0;
1285 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1286 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1287 rld
[i
].opnum
= opnum
;
1288 rld
[i
].when_needed
= type
;
1289 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1290 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1291 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1292 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1293 rld
[i
].secondary_p
= 0;
1297 #ifdef SECONDARY_MEMORY_NEEDED
1298 if (out
!= 0 && GET_CODE (out
) == REG
1299 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1300 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1302 get_secondary_mem (out
, outmode
, opnum
, type
);
1307 /* We are reusing an existing reload,
1308 but we may have additional information for it.
1309 For example, we may now have both IN and OUT
1310 while the old one may have just one of them. */
1312 /* The modes can be different. If they are, we want to reload in
1313 the larger mode, so that the value is valid for both modes. */
1314 if (inmode
!= VOIDmode
1315 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1316 rld
[i
].inmode
= inmode
;
1317 if (outmode
!= VOIDmode
1318 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1319 rld
[i
].outmode
= outmode
;
1322 rtx in_reg
= inloc
? *inloc
: 0;
1323 /* If we merge reloads for two distinct rtl expressions that
1324 are identical in content, there might be duplicate address
1325 reloads. Remove the extra set now, so that if we later find
1326 that we can inherit this reload, we can get rid of the
1327 address reloads altogether.
1329 Do not do this if both reloads are optional since the result
1330 would be an optional reload which could potentially leave
1331 unresolved address replacements.
1333 It is not sufficient to call transfer_replacements since
1334 choose_reload_regs will remove the replacements for address
1335 reloads of inherited reloads which results in the same
1337 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1338 && ! (rld
[i
].optional
&& optional
))
1340 /* We must keep the address reload with the lower operand
1342 if (opnum
> rld
[i
].opnum
)
1344 remove_address_replacements (in
);
1346 in_reg
= rld
[i
].in_reg
;
1349 remove_address_replacements (rld
[i
].in
);
1352 rld
[i
].in_reg
= in_reg
;
1357 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1359 if (reg_class_subset_p (class, rld
[i
].class))
1360 rld
[i
].class = class;
1361 rld
[i
].optional
&= optional
;
1362 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1363 opnum
, rld
[i
].opnum
))
1364 rld
[i
].when_needed
= RELOAD_OTHER
;
1365 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1368 /* If the ostensible rtx being reloaded differs from the rtx found
1369 in the location to substitute, this reload is not safe to combine
1370 because we cannot reliably tell whether it appears in the insn. */
1372 if (in
!= 0 && in
!= *inloc
)
1373 rld
[i
].nocombine
= 1;
1376 /* This was replaced by changes in find_reloads_address_1 and the new
1377 function inc_for_reload, which go with a new meaning of reload_inc. */
1379 /* If this is an IN/OUT reload in an insn that sets the CC,
1380 it must be for an autoincrement. It doesn't work to store
1381 the incremented value after the insn because that would clobber the CC.
1382 So we must do the increment of the value reloaded from,
1383 increment it, store it back, then decrement again. */
1384 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1388 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1389 /* If we did not find a nonzero amount-to-increment-by,
1390 that contradicts the belief that IN is being incremented
1391 in an address in this insn. */
1392 if (rld
[i
].inc
== 0)
1397 /* If we will replace IN and OUT with the reload-reg,
1398 record where they are located so that substitution need
1399 not do a tree walk. */
1401 if (replace_reloads
)
1405 struct replacement
*r
= &replacements
[n_replacements
++];
1407 r
->subreg_loc
= in_subreg_loc
;
1411 if (outloc
!= 0 && outloc
!= inloc
)
1413 struct replacement
*r
= &replacements
[n_replacements
++];
1416 r
->subreg_loc
= out_subreg_loc
;
1421 /* If this reload is just being introduced and it has both
1422 an incoming quantity and an outgoing quantity that are
1423 supposed to be made to match, see if either one of the two
1424 can serve as the place to reload into.
1426 If one of them is acceptable, set rld[i].reg_rtx
1429 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1431 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1434 earlyclobber_operand_p (out
));
1436 /* If the outgoing register already contains the same value
1437 as the incoming one, we can dispense with loading it.
1438 The easiest way to tell the caller that is to give a phony
1439 value for the incoming operand (same as outgoing one). */
1440 if (rld
[i
].reg_rtx
== out
1441 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1442 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1443 static_reload_reg_p
, i
, inmode
))
1447 /* If this is an input reload and the operand contains a register that
1448 dies in this insn and is used nowhere else, see if it is the right class
1449 to be used for this reload. Use it if so. (This occurs most commonly
1450 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1451 this if it is also an output reload that mentions the register unless
1452 the output is a SUBREG that clobbers an entire register.
1454 Note that the operand might be one of the spill regs, if it is a
1455 pseudo reg and we are in a block where spilling has not taken place.
1456 But if there is no spilling in this block, that is OK.
1457 An explicitly used hard reg cannot be a spill reg. */
1459 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1463 enum machine_mode rel_mode
= inmode
;
1465 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1468 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1469 if (REG_NOTE_KIND (note
) == REG_DEAD
1470 && GET_CODE (XEXP (note
, 0)) == REG
1471 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1472 && reg_mentioned_p (XEXP (note
, 0), in
)
1473 && ! refers_to_regno_for_reload_p (regno
,
1475 + HARD_REGNO_NREGS (regno
,
1477 PATTERN (this_insn
), inloc
)
1478 /* If this is also an output reload, IN cannot be used as
1479 the reload register if it is set in this insn unless IN
1481 && (out
== 0 || in
== out
1482 || ! hard_reg_set_here_p (regno
,
1484 + HARD_REGNO_NREGS (regno
,
1486 PATTERN (this_insn
)))
1487 /* ??? Why is this code so different from the previous?
1488 Is there any simple coherent way to describe the two together?
1489 What's going on here. */
1491 || (GET_CODE (in
) == SUBREG
1492 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1494 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1495 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1496 /* Make sure the operand fits in the reg that dies. */
1497 && (GET_MODE_SIZE (rel_mode
)
1498 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1499 && HARD_REGNO_MODE_OK (regno
, inmode
)
1500 && HARD_REGNO_MODE_OK (regno
, outmode
))
1503 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1504 HARD_REGNO_NREGS (regno
, outmode
));
1506 for (offs
= 0; offs
< nregs
; offs
++)
1507 if (fixed_regs
[regno
+ offs
]
1508 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1514 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1521 output_reloadnum
= i
;
1526 /* Record an additional place we must replace a value
1527 for which we have already recorded a reload.
1528 RELOADNUM is the value returned by push_reload
1529 when the reload was recorded.
1530 This is used in insn patterns that use match_dup. */
1533 push_replacement (loc
, reloadnum
, mode
)
1536 enum machine_mode mode
;
1538 if (replace_reloads
)
1540 struct replacement
*r
= &replacements
[n_replacements
++];
1541 r
->what
= reloadnum
;
1548 /* Transfer all replacements that used to be in reload FROM to be in
1552 transfer_replacements (to
, from
)
1557 for (i
= 0; i
< n_replacements
; i
++)
1558 if (replacements
[i
].what
== from
)
1559 replacements
[i
].what
= to
;
1562 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1563 or a subpart of it. If we have any replacements registered for IN_RTX,
1564 cancel the reloads that were supposed to load them.
1565 Return non-zero if we canceled any reloads. */
1567 remove_address_replacements (in_rtx
)
1571 char reload_flags
[MAX_RELOADS
];
1572 int something_changed
= 0;
1574 memset (reload_flags
, 0, sizeof reload_flags
);
1575 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1577 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1578 reload_flags
[replacements
[i
].what
] |= 1;
1581 replacements
[j
++] = replacements
[i
];
1582 reload_flags
[replacements
[i
].what
] |= 2;
1585 /* Note that the following store must be done before the recursive calls. */
1588 for (i
= n_reloads
- 1; i
>= 0; i
--)
1590 if (reload_flags
[i
] == 1)
1592 deallocate_reload_reg (i
);
1593 remove_address_replacements (rld
[i
].in
);
1595 something_changed
= 1;
1598 return something_changed
;
1601 /* If there is only one output reload, and it is not for an earlyclobber
1602 operand, try to combine it with a (logically unrelated) input reload
1603 to reduce the number of reload registers needed.
1605 This is safe if the input reload does not appear in
1606 the value being output-reloaded, because this implies
1607 it is not needed any more once the original insn completes.
1609 If that doesn't work, see we can use any of the registers that
1610 die in this insn as a reload register. We can if it is of the right
1611 class and does not appear in the value being output-reloaded. */
1617 int output_reload
= -1;
1618 int secondary_out
= -1;
1621 /* Find the output reload; return unless there is exactly one
1622 and that one is mandatory. */
1624 for (i
= 0; i
< n_reloads
; i
++)
1625 if (rld
[i
].out
!= 0)
1627 if (output_reload
>= 0)
1632 if (output_reload
< 0 || rld
[output_reload
].optional
)
1635 /* An input-output reload isn't combinable. */
1637 if (rld
[output_reload
].in
!= 0)
1640 /* If this reload is for an earlyclobber operand, we can't do anything. */
1641 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1644 /* If there is a reload for part of the address of this operand, we would
1645 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1646 its life to the point where doing this combine would not lower the
1647 number of spill registers needed. */
1648 for (i
= 0; i
< n_reloads
; i
++)
1649 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1650 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1651 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1654 /* Check each input reload; can we combine it? */
1656 for (i
= 0; i
< n_reloads
; i
++)
1657 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1658 /* Life span of this reload must not extend past main insn. */
1659 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1660 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1661 && rld
[i
].when_needed
!= RELOAD_OTHER
1662 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1663 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1664 rld
[output_reload
].outmode
))
1666 && rld
[i
].reg_rtx
== 0
1667 #ifdef SECONDARY_MEMORY_NEEDED
1668 /* Don't combine two reloads with different secondary
1669 memory locations. */
1670 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1671 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1672 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1673 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1675 && (SMALL_REGISTER_CLASSES
1676 ? (rld
[i
].class == rld
[output_reload
].class)
1677 : (reg_class_subset_p (rld
[i
].class,
1678 rld
[output_reload
].class)
1679 || reg_class_subset_p (rld
[output_reload
].class,
1681 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1682 /* Args reversed because the first arg seems to be
1683 the one that we imagine being modified
1684 while the second is the one that might be affected. */
1685 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1687 /* However, if the input is a register that appears inside
1688 the output, then we also can't share.
1689 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1690 If the same reload reg is used for both reg 69 and the
1691 result to be stored in memory, then that result
1692 will clobber the address of the memory ref. */
1693 && ! (GET_CODE (rld
[i
].in
) == REG
1694 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1695 rld
[output_reload
].out
))))
1696 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1697 && (reg_class_size
[(int) rld
[i
].class]
1698 || SMALL_REGISTER_CLASSES
)
1699 /* We will allow making things slightly worse by combining an
1700 input and an output, but no worse than that. */
1701 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1702 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1706 /* We have found a reload to combine with! */
1707 rld
[i
].out
= rld
[output_reload
].out
;
1708 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1709 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1710 /* Mark the old output reload as inoperative. */
1711 rld
[output_reload
].out
= 0;
1712 /* The combined reload is needed for the entire insn. */
1713 rld
[i
].when_needed
= RELOAD_OTHER
;
1714 /* If the output reload had a secondary reload, copy it. */
1715 if (rld
[output_reload
].secondary_out_reload
!= -1)
1717 rld
[i
].secondary_out_reload
1718 = rld
[output_reload
].secondary_out_reload
;
1719 rld
[i
].secondary_out_icode
1720 = rld
[output_reload
].secondary_out_icode
;
1723 #ifdef SECONDARY_MEMORY_NEEDED
1724 /* Copy any secondary MEM. */
1725 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1726 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1727 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1729 /* If required, minimize the register class. */
1730 if (reg_class_subset_p (rld
[output_reload
].class,
1732 rld
[i
].class = rld
[output_reload
].class;
1734 /* Transfer all replacements from the old reload to the combined. */
1735 for (j
= 0; j
< n_replacements
; j
++)
1736 if (replacements
[j
].what
== output_reload
)
1737 replacements
[j
].what
= i
;
1742 /* If this insn has only one operand that is modified or written (assumed
1743 to be the first), it must be the one corresponding to this reload. It
1744 is safe to use anything that dies in this insn for that output provided
1745 that it does not occur in the output (we already know it isn't an
1746 earlyclobber. If this is an asm insn, give up. */
1748 if (INSN_CODE (this_insn
) == -1)
1751 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1752 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1753 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1756 /* See if some hard register that dies in this insn and is not used in
1757 the output is the right class. Only works if the register we pick
1758 up can fully hold our output reload. */
1759 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1760 if (REG_NOTE_KIND (note
) == REG_DEAD
1761 && GET_CODE (XEXP (note
, 0)) == REG
1762 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1763 rld
[output_reload
].out
)
1764 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1765 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1766 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1767 REGNO (XEXP (note
, 0)))
1768 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1769 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1770 /* Ensure that a secondary or tertiary reload for this output
1771 won't want this register. */
1772 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1773 || (! (TEST_HARD_REG_BIT
1774 (reg_class_contents
[(int) rld
[secondary_out
].class],
1775 REGNO (XEXP (note
, 0))))
1776 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1777 || ! (TEST_HARD_REG_BIT
1778 (reg_class_contents
[(int) rld
[secondary_out
].class],
1779 REGNO (XEXP (note
, 0)))))))
1780 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1782 rld
[output_reload
].reg_rtx
1783 = gen_rtx_REG (rld
[output_reload
].outmode
,
1784 REGNO (XEXP (note
, 0)));
1789 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1790 See if one of IN and OUT is a register that may be used;
1791 this is desirable since a spill-register won't be needed.
1792 If so, return the register rtx that proves acceptable.
1794 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1795 CLASS is the register class required for the reload.
1797 If FOR_REAL is >= 0, it is the number of the reload,
1798 and in some cases when it can be discovered that OUT doesn't need
1799 to be computed, clear out rld[FOR_REAL].out.
1801 If FOR_REAL is -1, this should not be done, because this call
1802 is just to see if a register can be found, not to find and install it.
1804 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1805 puts an additional constraint on being able to use IN for OUT since
1806 IN must not appear elsewhere in the insn (it is assumed that IN itself
1807 is safe from the earlyclobber). */
1810 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1811 inmode
, outmode
, class, for_real
, earlyclobber
)
1812 rtx real_in
, real_out
;
1813 rtx
*inloc
, *outloc
;
1814 enum machine_mode inmode
, outmode
;
1815 enum reg_class
class;
1825 /* If operands exceed a word, we can't use either of them
1826 unless they have the same size. */
1827 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1828 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1829 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1832 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1833 respectively refers to a hard register. */
1835 /* Find the inside of any subregs. */
1836 while (GET_CODE (out
) == SUBREG
)
1838 if (GET_CODE (SUBREG_REG (out
)) == REG
1839 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1840 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1841 GET_MODE (SUBREG_REG (out
)),
1844 out
= SUBREG_REG (out
);
1846 while (GET_CODE (in
) == SUBREG
)
1848 if (GET_CODE (SUBREG_REG (in
)) == REG
1849 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1850 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1851 GET_MODE (SUBREG_REG (in
)),
1854 in
= SUBREG_REG (in
);
1857 /* Narrow down the reg class, the same way push_reload will;
1858 otherwise we might find a dummy now, but push_reload won't. */
1859 class = PREFERRED_RELOAD_CLASS (in
, class);
1861 /* See if OUT will do. */
1862 if (GET_CODE (out
) == REG
1863 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1865 unsigned int regno
= REGNO (out
) + out_offset
;
1866 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1869 /* When we consider whether the insn uses OUT,
1870 ignore references within IN. They don't prevent us
1871 from copying IN into OUT, because those refs would
1872 move into the insn that reloads IN.
1874 However, we only ignore IN in its role as this reload.
1875 If the insn uses IN elsewhere and it contains OUT,
1876 that counts. We can't be sure it's the "same" operand
1877 so it might not go through this reload. */
1879 *inloc
= const0_rtx
;
1881 if (regno
< FIRST_PSEUDO_REGISTER
1882 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1883 PATTERN (this_insn
), outloc
))
1887 for (i
= 0; i
< nwords
; i
++)
1888 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1894 if (GET_CODE (real_out
) == REG
)
1897 value
= gen_rtx_REG (outmode
, regno
);
1904 /* Consider using IN if OUT was not acceptable
1905 or if OUT dies in this insn (like the quotient in a divmod insn).
1906 We can't use IN unless it is dies in this insn,
1907 which means we must know accurately which hard regs are live.
1908 Also, the result can't go in IN if IN is used within OUT,
1909 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1910 if (hard_regs_live_known
1911 && GET_CODE (in
) == REG
1912 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1914 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1915 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1916 && !fixed_regs
[REGNO (in
)]
1917 && HARD_REGNO_MODE_OK (REGNO (in
),
1918 /* The only case where out and real_out might
1919 have different modes is where real_out
1920 is a subreg, and in that case, out
1922 (GET_MODE (out
) != VOIDmode
1923 ? GET_MODE (out
) : outmode
)))
1925 unsigned int regno
= REGNO (in
) + in_offset
;
1926 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1928 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*)0)
1929 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1930 PATTERN (this_insn
))
1932 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1933 PATTERN (this_insn
), inloc
)))
1937 for (i
= 0; i
< nwords
; i
++)
1938 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1944 /* If we were going to use OUT as the reload reg
1945 and changed our mind, it means OUT is a dummy that
1946 dies here. So don't bother copying value to it. */
1947 if (for_real
>= 0 && value
== real_out
)
1948 rld
[for_real
].out
= 0;
1949 if (GET_CODE (real_in
) == REG
)
1952 value
= gen_rtx_REG (inmode
, regno
);
1960 /* This page contains subroutines used mainly for determining
1961 whether the IN or an OUT of a reload can serve as the
1964 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1967 earlyclobber_operand_p (x
)
1972 for (i
= 0; i
< n_earlyclobbers
; i
++)
1973 if (reload_earlyclobbers
[i
] == x
)
1979 /* Return 1 if expression X alters a hard reg in the range
1980 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1981 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1982 X should be the body of an instruction. */
1985 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1986 unsigned int beg_regno
, end_regno
;
1989 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1991 rtx op0
= SET_DEST (x
);
1993 while (GET_CODE (op0
) == SUBREG
)
1994 op0
= SUBREG_REG (op0
);
1995 if (GET_CODE (op0
) == REG
)
1997 unsigned int r
= REGNO (op0
);
1999 /* See if this reg overlaps range under consideration. */
2001 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2005 else if (GET_CODE (x
) == PARALLEL
)
2007 int i
= XVECLEN (x
, 0) - 1;
2010 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2017 /* Return 1 if ADDR is a valid memory address for mode MODE,
2018 and check that each pseudo reg has the proper kind of
2022 strict_memory_address_p (mode
, addr
)
2023 enum machine_mode mode ATTRIBUTE_UNUSED
;
2026 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2033 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2034 if they are the same hard reg, and has special hacks for
2035 autoincrement and autodecrement.
2036 This is specifically intended for find_reloads to use
2037 in determining whether two operands match.
2038 X is the operand whose number is the lower of the two.
2040 The value is 2 if Y contains a pre-increment that matches
2041 a non-incrementing address in X. */
2043 /* ??? To be completely correct, we should arrange to pass
2044 for X the output operand and for Y the input operand.
2045 For now, we assume that the output operand has the lower number
2046 because that is natural in (SET output (... input ...)). */
2049 operands_match_p (x
, y
)
2053 RTX_CODE code
= GET_CODE (x
);
2059 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2060 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2061 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2067 i
= REGNO (SUBREG_REG (x
));
2068 if (i
>= FIRST_PSEUDO_REGISTER
)
2070 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2071 GET_MODE (SUBREG_REG (x
)),
2078 if (GET_CODE (y
) == SUBREG
)
2080 j
= REGNO (SUBREG_REG (y
));
2081 if (j
>= FIRST_PSEUDO_REGISTER
)
2083 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2084 GET_MODE (SUBREG_REG (y
)),
2091 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2092 multiple hard register group, so that for example (reg:DI 0) and
2093 (reg:SI 1) will be considered the same register. */
2094 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2095 && i
< FIRST_PSEUDO_REGISTER
)
2096 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2097 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2098 && j
< FIRST_PSEUDO_REGISTER
)
2099 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2103 /* If two operands must match, because they are really a single
2104 operand of an assembler insn, then two postincrements are invalid
2105 because the assembler insn would increment only once.
2106 On the other hand, an postincrement matches ordinary indexing
2107 if the postincrement is the output operand. */
2108 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2109 return operands_match_p (XEXP (x
, 0), y
);
2110 /* Two preincrements are invalid
2111 because the assembler insn would increment only once.
2112 On the other hand, an preincrement matches ordinary indexing
2113 if the preincrement is the input operand.
2114 In this case, return 2, since some callers need to do special
2115 things when this happens. */
2116 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2117 || GET_CODE (y
) == PRE_MODIFY
)
2118 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2122 /* Now we have disposed of all the cases
2123 in which different rtx codes can match. */
2124 if (code
!= GET_CODE (y
))
2126 if (code
== LABEL_REF
)
2127 return XEXP (x
, 0) == XEXP (y
, 0);
2128 if (code
== SYMBOL_REF
)
2129 return XSTR (x
, 0) == XSTR (y
, 0);
2131 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2133 if (GET_MODE (x
) != GET_MODE (y
))
2136 /* Compare the elements. If any pair of corresponding elements
2137 fail to match, return 0 for the whole things. */
2140 fmt
= GET_RTX_FORMAT (code
);
2141 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2147 if (XWINT (x
, i
) != XWINT (y
, i
))
2152 if (XINT (x
, i
) != XINT (y
, i
))
2157 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2160 /* If any subexpression returns 2,
2161 we should return 2 if we are successful. */
2170 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2172 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2174 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2182 /* It is believed that rtx's at this level will never
2183 contain anything but integers and other rtx's,
2184 except for within LABEL_REFs and SYMBOL_REFs. */
2189 return 1 + success_2
;
2192 /* Describe the range of registers or memory referenced by X.
2193 If X is a register, set REG_FLAG and put the first register
2194 number into START and the last plus one into END.
2195 If X is a memory reference, put a base address into BASE
2196 and a range of integer offsets into START and END.
2197 If X is pushing on the stack, we can assume it causes no trouble,
2198 so we set the SAFE field. */
2200 static struct decomposition
2204 struct decomposition val
;
2210 if (GET_CODE (x
) == MEM
)
2212 rtx base
= NULL_RTX
, offset
= 0;
2213 rtx addr
= XEXP (x
, 0);
2215 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2216 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2218 val
.base
= XEXP (addr
, 0);
2219 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2220 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2221 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2225 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2227 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2228 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2229 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2231 val
.base
= XEXP (addr
, 0);
2232 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2233 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2234 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2239 if (GET_CODE (addr
) == CONST
)
2241 addr
= XEXP (addr
, 0);
2244 if (GET_CODE (addr
) == PLUS
)
2246 if (CONSTANT_P (XEXP (addr
, 0)))
2248 base
= XEXP (addr
, 1);
2249 offset
= XEXP (addr
, 0);
2251 else if (CONSTANT_P (XEXP (addr
, 1)))
2253 base
= XEXP (addr
, 0);
2254 offset
= XEXP (addr
, 1);
2261 offset
= const0_rtx
;
2263 if (GET_CODE (offset
) == CONST
)
2264 offset
= XEXP (offset
, 0);
2265 if (GET_CODE (offset
) == PLUS
)
2267 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2269 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2270 offset
= XEXP (offset
, 0);
2272 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2274 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2275 offset
= XEXP (offset
, 1);
2279 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2280 offset
= const0_rtx
;
2283 else if (GET_CODE (offset
) != CONST_INT
)
2285 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2286 offset
= const0_rtx
;
2289 if (all_const
&& GET_CODE (base
) == PLUS
)
2290 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2292 if (GET_CODE (offset
) != CONST_INT
)
2295 val
.start
= INTVAL (offset
);
2296 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2300 else if (GET_CODE (x
) == REG
)
2303 val
.start
= true_regnum (x
);
2306 /* A pseudo with no hard reg. */
2307 val
.start
= REGNO (x
);
2308 val
.end
= val
.start
+ 1;
2312 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2314 else if (GET_CODE (x
) == SUBREG
)
2316 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2317 /* This could be more precise, but it's good enough. */
2318 return decompose (SUBREG_REG (x
));
2320 val
.start
= true_regnum (x
);
2322 return decompose (SUBREG_REG (x
));
2325 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2327 else if (CONSTANT_P (x
)
2328 /* This hasn't been assigned yet, so it can't conflict yet. */
2329 || GET_CODE (x
) == SCRATCH
)
2336 /* Return 1 if altering Y will not modify the value of X.
2337 Y is also described by YDATA, which should be decompose (Y). */
2340 immune_p (x
, y
, ydata
)
2342 struct decomposition ydata
;
2344 struct decomposition xdata
;
2347 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*)0);
2351 if (GET_CODE (y
) != MEM
)
2353 /* If Y is memory and X is not, Y can't affect X. */
2354 if (GET_CODE (x
) != MEM
)
2357 xdata
= decompose (x
);
2359 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2361 /* If bases are distinct symbolic constants, there is no overlap. */
2362 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2364 /* Constants and stack slots never overlap. */
2365 if (CONSTANT_P (xdata
.base
)
2366 && (ydata
.base
== frame_pointer_rtx
2367 || ydata
.base
== hard_frame_pointer_rtx
2368 || ydata
.base
== stack_pointer_rtx
))
2370 if (CONSTANT_P (ydata
.base
)
2371 && (xdata
.base
== frame_pointer_rtx
2372 || xdata
.base
== hard_frame_pointer_rtx
2373 || xdata
.base
== stack_pointer_rtx
))
2375 /* If either base is variable, we don't know anything. */
2379 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2382 /* Similar, but calls decompose. */
2385 safe_from_earlyclobber (op
, clobber
)
2388 struct decomposition early_data
;
2390 early_data
= decompose (clobber
);
2391 return immune_p (op
, clobber
, early_data
);
2394 /* Main entry point of this file: search the body of INSN
2395 for values that need reloading and record them with push_reload.
2396 REPLACE nonzero means record also where the values occur
2397 so that subst_reloads can be used.
2399 IND_LEVELS says how many levels of indirection are supported by this
2400 machine; a value of zero means that a memory reference is not a valid
2403 LIVE_KNOWN says we have valid information about which hard
2404 regs are live at each point in the program; this is true when
2405 we are called from global_alloc but false when stupid register
2406 allocation has been done.
2408 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2409 which is nonnegative if the reg has been commandeered for reloading into.
2410 It is copied into STATIC_RELOAD_REG_P and referenced from there
2411 by various subroutines.
2413 Return TRUE if some operands need to be changed, because of swapping
2414 commutative operands, reg_equiv_address substitution, or whatever. */
2417 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2419 int replace
, ind_levels
;
2421 short *reload_reg_p
;
2423 int insn_code_number
;
2426 /* These start out as the constraints for the insn
2427 and they are chewed up as we consider alternatives. */
2428 char *constraints
[MAX_RECOG_OPERANDS
];
2429 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2431 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2432 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2433 /* Nonzero for a MEM operand whose entire address needs a reload. */
2434 int address_reloaded
[MAX_RECOG_OPERANDS
];
2435 /* Value of enum reload_type to use for operand. */
2436 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2437 /* Value of enum reload_type to use within address of operand. */
2438 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2439 /* Save the usage of each operand. */
2440 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2441 int no_input_reloads
= 0, no_output_reloads
= 0;
2443 int this_alternative
[MAX_RECOG_OPERANDS
];
2444 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2445 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2446 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2447 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2448 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2450 int goal_alternative
[MAX_RECOG_OPERANDS
];
2451 int this_alternative_number
;
2452 int goal_alternative_number
= 0;
2453 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2454 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2455 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2456 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2457 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2458 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2459 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2460 int goal_alternative_swapped
;
2463 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2464 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2465 rtx body
= PATTERN (insn
);
2466 rtx set
= single_set (insn
);
2467 int goal_earlyclobber
= 0, this_earlyclobber
;
2468 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2474 n_earlyclobbers
= 0;
2475 replace_reloads
= replace
;
2476 hard_regs_live_known
= live_known
;
2477 static_reload_reg_p
= reload_reg_p
;
2479 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2480 neither are insns that SET cc0. Insns that use CC0 are not allowed
2481 to have any input reloads. */
2482 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2483 no_output_reloads
= 1;
2486 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2487 no_input_reloads
= 1;
2488 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2489 no_output_reloads
= 1;
2492 #ifdef SECONDARY_MEMORY_NEEDED
2493 /* The eliminated forms of any secondary memory locations are per-insn, so
2494 clear them out here. */
2496 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2499 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2500 is cheap to move between them. If it is not, there may not be an insn
2501 to do the copy, so we may need a reload. */
2502 if (GET_CODE (body
) == SET
2503 && GET_CODE (SET_DEST (body
)) == REG
2504 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2505 && GET_CODE (SET_SRC (body
)) == REG
2506 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2507 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2508 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2509 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2512 extract_insn (insn
);
2514 noperands
= reload_n_operands
= recog_data
.n_operands
;
2515 n_alternatives
= recog_data
.n_alternatives
;
2517 /* Just return "no reloads" if insn has no operands with constraints. */
2518 if (noperands
== 0 || n_alternatives
== 0)
2521 insn_code_number
= INSN_CODE (insn
);
2522 this_insn_is_asm
= insn_code_number
< 0;
2524 memcpy (operand_mode
, recog_data
.operand_mode
,
2525 noperands
* sizeof (enum machine_mode
));
2526 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2530 /* If we will need to know, later, whether some pair of operands
2531 are the same, we must compare them now and save the result.
2532 Reloading the base and index registers will clobber them
2533 and afterward they will fail to match. */
2535 for (i
= 0; i
< noperands
; i
++)
2540 substed_operand
[i
] = recog_data
.operand
[i
];
2543 modified
[i
] = RELOAD_READ
;
2545 /* Scan this operand's constraint to see if it is an output operand,
2546 an in-out operand, is commutative, or should match another. */
2551 modified
[i
] = RELOAD_WRITE
;
2553 modified
[i
] = RELOAD_READ_WRITE
;
2556 /* The last operand should not be marked commutative. */
2557 if (i
== noperands
- 1)
2562 else if (ISDIGIT (c
))
2564 c
= strtoul (p
- 1, &p
, 10);
2566 operands_match
[c
][i
]
2567 = operands_match_p (recog_data
.operand
[c
],
2568 recog_data
.operand
[i
]);
2570 /* An operand may not match itself. */
2574 /* If C can be commuted with C+1, and C might need to match I,
2575 then C+1 might also need to match I. */
2576 if (commutative
>= 0)
2578 if (c
== commutative
|| c
== commutative
+ 1)
2580 int other
= c
+ (c
== commutative
? 1 : -1);
2581 operands_match
[other
][i
]
2582 = operands_match_p (recog_data
.operand
[other
],
2583 recog_data
.operand
[i
]);
2585 if (i
== commutative
|| i
== commutative
+ 1)
2587 int other
= i
+ (i
== commutative
? 1 : -1);
2588 operands_match
[c
][other
]
2589 = operands_match_p (recog_data
.operand
[c
],
2590 recog_data
.operand
[other
]);
2592 /* Note that C is supposed to be less than I.
2593 No need to consider altering both C and I because in
2594 that case we would alter one into the other. */
2600 /* Examine each operand that is a memory reference or memory address
2601 and reload parts of the addresses into index registers.
2602 Also here any references to pseudo regs that didn't get hard regs
2603 but are equivalent to constants get replaced in the insn itself
2604 with those constants. Nobody will ever see them again.
2606 Finally, set up the preferred classes of each operand. */
2608 for (i
= 0; i
< noperands
; i
++)
2610 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2612 address_reloaded
[i
] = 0;
2613 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2614 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2617 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2618 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2621 if (*constraints
[i
] == 0)
2622 /* Ignore things like match_operator operands. */
2624 else if (constraints
[i
][0] == 'p')
2626 find_reloads_address (VOIDmode
, (rtx
*)0,
2627 recog_data
.operand
[i
],
2628 recog_data
.operand_loc
[i
],
2629 i
, operand_type
[i
], ind_levels
, insn
);
2631 /* If we now have a simple operand where we used to have a
2632 PLUS or MULT, re-recognize and try again. */
2633 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2634 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2635 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2636 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2638 INSN_CODE (insn
) = -1;
2639 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2644 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2645 substed_operand
[i
] = recog_data
.operand
[i
];
2647 else if (code
== MEM
)
2650 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2651 recog_data
.operand_loc
[i
],
2652 XEXP (recog_data
.operand
[i
], 0),
2653 &XEXP (recog_data
.operand
[i
], 0),
2654 i
, address_type
[i
], ind_levels
, insn
);
2655 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2656 substed_operand
[i
] = recog_data
.operand
[i
];
2658 else if (code
== SUBREG
)
2660 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2662 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2665 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2667 &address_reloaded
[i
]);
2669 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2670 that didn't get a hard register, emit a USE with a REG_EQUAL
2671 note in front so that we might inherit a previous, possibly
2675 && GET_CODE (op
) == MEM
2676 && GET_CODE (reg
) == REG
2677 && (GET_MODE_SIZE (GET_MODE (reg
))
2678 >= GET_MODE_SIZE (GET_MODE (op
))))
2679 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2681 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2683 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2685 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2686 /* We can get a PLUS as an "operand" as a result of register
2687 elimination. See eliminate_regs and gen_reload. We handle
2688 a unary operator by reloading the operand. */
2689 substed_operand
[i
] = recog_data
.operand
[i
]
2690 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2691 ind_levels
, 0, insn
,
2692 &address_reloaded
[i
]);
2693 else if (code
== REG
)
2695 /* This is equivalent to calling find_reloads_toplev.
2696 The code is duplicated for speed.
2697 When we find a pseudo always equivalent to a constant,
2698 we replace it by the constant. We must be sure, however,
2699 that we don't try to replace it in the insn in which it
2701 int regno
= REGNO (recog_data
.operand
[i
]);
2702 if (reg_equiv_constant
[regno
] != 0
2703 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2705 /* Record the existing mode so that the check if constants are
2706 allowed will work when operand_mode isn't specified. */
2708 if (operand_mode
[i
] == VOIDmode
)
2709 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2711 substed_operand
[i
] = recog_data
.operand
[i
]
2712 = reg_equiv_constant
[regno
];
2714 if (reg_equiv_memory_loc
[regno
] != 0
2715 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2716 /* We need not give a valid is_set_dest argument since the case
2717 of a constant equivalence was checked above. */
2718 substed_operand
[i
] = recog_data
.operand
[i
]
2719 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2720 ind_levels
, 0, insn
,
2721 &address_reloaded
[i
]);
2723 /* If the operand is still a register (we didn't replace it with an
2724 equivalent), get the preferred class to reload it into. */
2725 code
= GET_CODE (recog_data
.operand
[i
]);
2727 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2728 >= FIRST_PSEUDO_REGISTER
)
2729 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2733 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2734 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2737 /* If this is simply a copy from operand 1 to operand 0, merge the
2738 preferred classes for the operands. */
2739 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2740 && recog_data
.operand
[1] == SET_SRC (set
))
2742 preferred_class
[0] = preferred_class
[1]
2743 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2744 pref_or_nothing
[0] |= pref_or_nothing
[1];
2745 pref_or_nothing
[1] |= pref_or_nothing
[0];
2748 /* Now see what we need for pseudo-regs that didn't get hard regs
2749 or got the wrong kind of hard reg. For this, we must consider
2750 all the operands together against the register constraints. */
2752 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2755 goal_alternative_swapped
= 0;
2758 /* The constraints are made of several alternatives.
2759 Each operand's constraint looks like foo,bar,... with commas
2760 separating the alternatives. The first alternatives for all
2761 operands go together, the second alternatives go together, etc.
2763 First loop over alternatives. */
2765 for (this_alternative_number
= 0;
2766 this_alternative_number
< n_alternatives
;
2767 this_alternative_number
++)
2769 /* Loop over operands for one constraint alternative. */
2770 /* LOSERS counts those that don't fit this alternative
2771 and would require loading. */
2773 /* BAD is set to 1 if it some operand can't fit this alternative
2774 even after reloading. */
2776 /* REJECT is a count of how undesirable this alternative says it is
2777 if any reloading is required. If the alternative matches exactly
2778 then REJECT is ignored, but otherwise it gets this much
2779 counted against it in addition to the reloading needed. Each
2780 ? counts three times here since we want the disparaging caused by
2781 a bad register class to only count 1/3 as much. */
2784 this_earlyclobber
= 0;
2786 for (i
= 0; i
< noperands
; i
++)
2788 char *p
= constraints
[i
];
2791 /* 0 => this operand can be reloaded somehow for this alternative. */
2793 /* 0 => this operand can be reloaded if the alternative allows regs. */
2796 rtx operand
= recog_data
.operand
[i
];
2798 /* Nonzero means this is a MEM that must be reloaded into a reg
2799 regardless of what the constraint says. */
2800 int force_reload
= 0;
2802 /* Nonzero if a constant forced into memory would be OK for this
2805 int earlyclobber
= 0;
2807 /* If the predicate accepts a unary operator, it means that
2808 we need to reload the operand, but do not do this for
2809 match_operator and friends. */
2810 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2811 operand
= XEXP (operand
, 0);
2813 /* If the operand is a SUBREG, extract
2814 the REG or MEM (or maybe even a constant) within.
2815 (Constants can occur as a result of reg_equiv_constant.) */
2817 while (GET_CODE (operand
) == SUBREG
)
2819 /* Offset only matters when operand is a REG and
2820 it is a hard reg. This is because it is passed
2821 to reg_fits_class_p if it is a REG and all pseudos
2822 return 0 from that function. */
2823 if (GET_CODE (SUBREG_REG (operand
)) == REG
2824 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2826 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2827 GET_MODE (SUBREG_REG (operand
)),
2828 SUBREG_BYTE (operand
),
2829 GET_MODE (operand
));
2831 operand
= SUBREG_REG (operand
);
2832 /* Force reload if this is a constant or PLUS or if there may
2833 be a problem accessing OPERAND in the outer mode. */
2834 if (CONSTANT_P (operand
)
2835 || GET_CODE (operand
) == PLUS
2836 /* We must force a reload of paradoxical SUBREGs
2837 of a MEM because the alignment of the inner value
2838 may not be enough to do the outer reference. On
2839 big-endian machines, it may also reference outside
2842 On machines that extend byte operations and we have a
2843 SUBREG where both the inner and outer modes are no wider
2844 than a word and the inner mode is narrower, is integral,
2845 and gets extended when loaded from memory, combine.c has
2846 made assumptions about the behavior of the machine in such
2847 register access. If the data is, in fact, in memory we
2848 must always load using the size assumed to be in the
2849 register and let the insn do the different-sized
2852 This is doubly true if WORD_REGISTER_OPERATIONS. In
2853 this case eliminate_regs has left non-paradoxical
2854 subregs for push_reloads to see. Make sure it does
2855 by forcing the reload.
2857 ??? When is it right at this stage to have a subreg
2858 of a mem that is _not_ to be handled specialy? IMO
2859 those should have been reduced to just a mem. */
2860 || ((GET_CODE (operand
) == MEM
2861 || (GET_CODE (operand
)== REG
2862 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2863 #ifndef WORD_REGISTER_OPERATIONS
2864 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2865 < BIGGEST_ALIGNMENT
)
2866 && (GET_MODE_SIZE (operand_mode
[i
])
2867 > GET_MODE_SIZE (GET_MODE (operand
))))
2868 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2869 #ifdef LOAD_EXTEND_OP
2870 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2871 && (GET_MODE_SIZE (GET_MODE (operand
))
2873 && (GET_MODE_SIZE (operand_mode
[i
])
2874 > GET_MODE_SIZE (GET_MODE (operand
)))
2875 && INTEGRAL_MODE_P (GET_MODE (operand
))
2876 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2881 /* This following hunk of code should no longer be
2882 needed at all with SUBREG_BYTE. If you need this
2883 code back, please explain to me why so I can
2884 fix the real problem. -DaveM */
2886 /* Subreg of a hard reg which can't handle the subreg's mode
2887 or which would handle that mode in the wrong number of
2888 registers for subregging to work. */
2889 || (GET_CODE (operand
) == REG
2890 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2891 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2892 && (GET_MODE_SIZE (GET_MODE (operand
))
2894 && ((GET_MODE_SIZE (GET_MODE (operand
))
2896 != HARD_REGNO_NREGS (REGNO (operand
),
2897 GET_MODE (operand
))))
2898 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2905 this_alternative
[i
] = (int) NO_REGS
;
2906 this_alternative_win
[i
] = 0;
2907 this_alternative_match_win
[i
] = 0;
2908 this_alternative_offmemok
[i
] = 0;
2909 this_alternative_earlyclobber
[i
] = 0;
2910 this_alternative_matches
[i
] = -1;
2912 /* An empty constraint or empty alternative
2913 allows anything which matched the pattern. */
2914 if (*p
== 0 || *p
== ',')
2917 /* Scan this alternative's specs for this operand;
2918 set WIN if the operand fits any letter in this alternative.
2919 Otherwise, clear BADOP if this operand could
2920 fit some letter after reloads,
2921 or set WINREG if this operand could fit after reloads
2922 provided the constraint allows some registers. */
2924 while (*p
&& (c
= *p
++) != ',')
2927 case '=': case '+': case '*':
2931 /* The last operand should not be marked commutative. */
2932 if (i
!= noperands
- 1)
2945 /* Ignore rest of this alternative as far as
2946 reloading is concerned. */
2947 while (*p
&& *p
!= ',')
2951 case '0': case '1': case '2': case '3': case '4':
2952 case '5': case '6': case '7': case '8': case '9':
2953 c
= strtoul (p
- 1, &p
, 10);
2955 this_alternative_matches
[i
] = c
;
2956 /* We are supposed to match a previous operand.
2957 If we do, we win if that one did.
2958 If we do not, count both of the operands as losers.
2959 (This is too conservative, since most of the time
2960 only a single reload insn will be needed to make
2961 the two operands win. As a result, this alternative
2962 may be rejected when it is actually desirable.) */
2963 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2964 /* If we are matching as if two operands were swapped,
2965 also pretend that operands_match had been computed
2967 But if I is the second of those and C is the first,
2968 don't exchange them, because operands_match is valid
2969 only on one side of its diagonal. */
2971 [(c
== commutative
|| c
== commutative
+ 1)
2972 ? 2 * commutative
+ 1 - c
: c
]
2973 [(i
== commutative
|| i
== commutative
+ 1)
2974 ? 2 * commutative
+ 1 - i
: i
])
2975 : operands_match
[c
][i
])
2977 /* If we are matching a non-offsettable address where an
2978 offsettable address was expected, then we must reject
2979 this combination, because we can't reload it. */
2980 if (this_alternative_offmemok
[c
]
2981 && GET_CODE (recog_data
.operand
[c
]) == MEM
2982 && this_alternative
[c
] == (int) NO_REGS
2983 && ! this_alternative_win
[c
])
2986 did_match
= this_alternative_win
[c
];
2990 /* Operands don't match. */
2992 /* Retroactively mark the operand we had to match
2993 as a loser, if it wasn't already. */
2994 if (this_alternative_win
[c
])
2996 this_alternative_win
[c
] = 0;
2997 if (this_alternative
[c
] == (int) NO_REGS
)
2999 /* But count the pair only once in the total badness of
3000 this alternative, if the pair can be a dummy reload. */
3002 = find_dummy_reload (recog_data
.operand
[i
],
3003 recog_data
.operand
[c
],
3004 recog_data
.operand_loc
[i
],
3005 recog_data
.operand_loc
[c
],
3006 operand_mode
[i
], operand_mode
[c
],
3007 this_alternative
[c
], -1,
3008 this_alternative_earlyclobber
[c
]);
3013 /* This can be fixed with reloads if the operand
3014 we are supposed to match can be fixed with reloads. */
3016 this_alternative
[i
] = this_alternative
[c
];
3018 /* If we have to reload this operand and some previous
3019 operand also had to match the same thing as this
3020 operand, we don't know how to do that. So reject this
3022 if (! did_match
|| force_reload
)
3023 for (j
= 0; j
< i
; j
++)
3024 if (this_alternative_matches
[j
]
3025 == this_alternative_matches
[i
])
3030 /* All necessary reloads for an address_operand
3031 were handled in find_reloads_address. */
3032 this_alternative
[i
] = (int) BASE_REG_CLASS
;
3039 if (GET_CODE (operand
) == MEM
3040 || (GET_CODE (operand
) == REG
3041 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3042 && reg_renumber
[REGNO (operand
)] < 0))
3044 if (CONSTANT_P (operand
)
3045 /* force_const_mem does not accept HIGH. */
3046 && GET_CODE (operand
) != HIGH
)
3052 if (GET_CODE (operand
) == MEM
3053 && ! address_reloaded
[i
]
3054 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3055 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3060 if (GET_CODE (operand
) == MEM
3061 && ! address_reloaded
[i
]
3062 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3063 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3067 /* Memory operand whose address is not offsettable. */
3071 if (GET_CODE (operand
) == MEM
3072 && ! (ind_levels
? offsettable_memref_p (operand
)
3073 : offsettable_nonstrict_memref_p (operand
))
3074 /* Certain mem addresses will become offsettable
3075 after they themselves are reloaded. This is important;
3076 we don't want our own handling of unoffsettables
3077 to override the handling of reg_equiv_address. */
3078 && !(GET_CODE (XEXP (operand
, 0)) == REG
3080 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3084 /* Memory operand whose address is offsettable. */
3088 if ((GET_CODE (operand
) == MEM
3089 /* If IND_LEVELS, find_reloads_address won't reload a
3090 pseudo that didn't get a hard reg, so we have to
3091 reject that case. */
3092 && ((ind_levels
? offsettable_memref_p (operand
)
3093 : offsettable_nonstrict_memref_p (operand
))
3094 /* A reloaded address is offsettable because it is now
3095 just a simple register indirect. */
3096 || address_reloaded
[i
]))
3097 || (GET_CODE (operand
) == REG
3098 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3099 && reg_renumber
[REGNO (operand
)] < 0
3100 /* If reg_equiv_address is nonzero, we will be
3101 loading it into a register; hence it will be
3102 offsettable, but we cannot say that reg_equiv_mem
3103 is offsettable without checking. */
3104 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3105 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3106 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3108 /* force_const_mem does not accept HIGH. */
3109 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3110 || GET_CODE (operand
) == MEM
)
3117 /* Output operand that is stored before the need for the
3118 input operands (and their index registers) is over. */
3119 earlyclobber
= 1, this_earlyclobber
= 1;
3123 #ifndef REAL_ARITHMETIC
3124 /* Match any floating double constant, but only if
3125 we can examine the bits of it reliably. */
3126 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3127 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3128 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3131 if (GET_CODE (operand
) == CONST_DOUBLE
)
3136 if (GET_CODE (operand
) == CONST_DOUBLE
)
3142 if (GET_CODE (operand
) == CONST_DOUBLE
3143 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3148 if (GET_CODE (operand
) == CONST_INT
3149 || (GET_CODE (operand
) == CONST_DOUBLE
3150 && GET_MODE (operand
) == VOIDmode
))
3153 if (CONSTANT_P (operand
)
3154 #ifdef LEGITIMATE_PIC_OPERAND_P
3155 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3162 if (GET_CODE (operand
) == CONST_INT
3163 || (GET_CODE (operand
) == CONST_DOUBLE
3164 && GET_MODE (operand
) == VOIDmode
))
3176 if (GET_CODE (operand
) == CONST_INT
3177 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3187 /* A PLUS is never a valid operand, but reload can make
3188 it from a register when eliminating registers. */
3189 && GET_CODE (operand
) != PLUS
3190 /* A SCRATCH is not a valid operand. */
3191 && GET_CODE (operand
) != SCRATCH
3192 #ifdef LEGITIMATE_PIC_OPERAND_P
3193 && (! CONSTANT_P (operand
)
3195 || LEGITIMATE_PIC_OPERAND_P (operand
))
3197 && (GENERAL_REGS
== ALL_REGS
3198 || GET_CODE (operand
) != REG
3199 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3200 && reg_renumber
[REGNO (operand
)] < 0)))
3202 /* Drop through into 'r' case. */
3206 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3210 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3212 #ifdef EXTRA_CONSTRAINT
3213 if (EXTRA_CONSTRAINT (operand
, c
))
3220 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3222 if (GET_MODE (operand
) == BLKmode
)
3225 if (GET_CODE (operand
) == REG
3226 && reg_fits_class_p (operand
, this_alternative
[i
],
3227 offset
, GET_MODE (recog_data
.operand
[i
])))
3234 /* If this operand could be handled with a reg,
3235 and some reg is allowed, then this operand can be handled. */
3236 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3239 /* Record which operands fit this alternative. */
3240 this_alternative_earlyclobber
[i
] = earlyclobber
;
3241 if (win
&& ! force_reload
)
3242 this_alternative_win
[i
] = 1;
3243 else if (did_match
&& ! force_reload
)
3244 this_alternative_match_win
[i
] = 1;
3247 int const_to_mem
= 0;
3249 this_alternative_offmemok
[i
] = offmemok
;
3253 /* Alternative loses if it has no regs for a reg operand. */
3254 if (GET_CODE (operand
) == REG
3255 && this_alternative
[i
] == (int) NO_REGS
3256 && this_alternative_matches
[i
] < 0)
3259 /* If this is a constant that is reloaded into the desired
3260 class by copying it to memory first, count that as another
3261 reload. This is consistent with other code and is
3262 required to avoid choosing another alternative when
3263 the constant is moved into memory by this function on
3264 an early reload pass. Note that the test here is
3265 precisely the same as in the code below that calls
3267 if (CONSTANT_P (operand
)
3268 /* force_const_mem does not accept HIGH. */
3269 && GET_CODE (operand
) != HIGH
3270 && ((PREFERRED_RELOAD_CLASS (operand
,
3271 (enum reg_class
) this_alternative
[i
])
3273 || no_input_reloads
)
3274 && operand_mode
[i
] != VOIDmode
)
3277 if (this_alternative
[i
] != (int) NO_REGS
)
3281 /* If we can't reload this value at all, reject this
3282 alternative. Note that we could also lose due to
3283 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3286 if (! CONSTANT_P (operand
)
3287 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3288 && (PREFERRED_RELOAD_CLASS (operand
,
3289 (enum reg_class
) this_alternative
[i
])
3293 /* Alternative loses if it requires a type of reload not
3294 permitted for this insn. We can always reload SCRATCH
3295 and objects with a REG_UNUSED note. */
3296 else if (GET_CODE (operand
) != SCRATCH
3297 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3298 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3300 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3304 /* We prefer to reload pseudos over reloading other things,
3305 since such reloads may be able to be eliminated later.
3306 If we are reloading a SCRATCH, we won't be generating any
3307 insns, just using a register, so it is also preferred.
3308 So bump REJECT in other cases. Don't do this in the
3309 case where we are forcing a constant into memory and
3310 it will then win since we don't want to have a different
3311 alternative match then. */
3312 if (! (GET_CODE (operand
) == REG
3313 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3314 && GET_CODE (operand
) != SCRATCH
3315 && ! (const_to_mem
&& constmemok
))
3318 /* Input reloads can be inherited more often than output
3319 reloads can be removed, so penalize output reloads. */
3320 if (operand_type
[i
] != RELOAD_FOR_INPUT
3321 && GET_CODE (operand
) != SCRATCH
)
3325 /* If this operand is a pseudo register that didn't get a hard
3326 reg and this alternative accepts some register, see if the
3327 class that we want is a subset of the preferred class for this
3328 register. If not, but it intersects that class, use the
3329 preferred class instead. If it does not intersect the preferred
3330 class, show that usage of this alternative should be discouraged;
3331 it will be discouraged more still if the register is `preferred
3332 or nothing'. We do this because it increases the chance of
3333 reusing our spill register in a later insn and avoiding a pair
3334 of memory stores and loads.
3336 Don't bother with this if this alternative will accept this
3339 Don't do this for a multiword operand, since it is only a
3340 small win and has the risk of requiring more spill registers,
3341 which could cause a large loss.
3343 Don't do this if the preferred class has only one register
3344 because we might otherwise exhaust the class. */
3346 if (! win
&& ! did_match
3347 && this_alternative
[i
] != (int) NO_REGS
3348 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3349 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3351 if (! reg_class_subset_p (this_alternative
[i
],
3352 preferred_class
[i
]))
3354 /* Since we don't have a way of forming the intersection,
3355 we just do something special if the preferred class
3356 is a subset of the class we have; that's the most
3357 common case anyway. */
3358 if (reg_class_subset_p (preferred_class
[i
],
3359 this_alternative
[i
]))
3360 this_alternative
[i
] = (int) preferred_class
[i
];
3362 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3367 /* Now see if any output operands that are marked "earlyclobber"
3368 in this alternative conflict with any input operands
3369 or any memory addresses. */
3371 for (i
= 0; i
< noperands
; i
++)
3372 if (this_alternative_earlyclobber
[i
]
3373 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3375 struct decomposition early_data
;
3377 early_data
= decompose (recog_data
.operand
[i
]);
3379 if (modified
[i
] == RELOAD_READ
)
3382 if (this_alternative
[i
] == NO_REGS
)
3384 this_alternative_earlyclobber
[i
] = 0;
3385 if (this_insn_is_asm
)
3386 error_for_asm (this_insn
,
3387 "`&' constraint used with no register class");
3392 for (j
= 0; j
< noperands
; j
++)
3393 /* Is this an input operand or a memory ref? */
3394 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3395 || modified
[j
] != RELOAD_WRITE
)
3397 /* Ignore things like match_operator operands. */
3398 && *recog_data
.constraints
[j
] != 0
3399 /* Don't count an input operand that is constrained to match
3400 the early clobber operand. */
3401 && ! (this_alternative_matches
[j
] == i
3402 && rtx_equal_p (recog_data
.operand
[i
],
3403 recog_data
.operand
[j
]))
3404 /* Is it altered by storing the earlyclobber operand? */
3405 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3408 /* If the output is in a single-reg class,
3409 it's costly to reload it, so reload the input instead. */
3410 if (reg_class_size
[this_alternative
[i
]] == 1
3411 && (GET_CODE (recog_data
.operand
[j
]) == REG
3412 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3415 this_alternative_win
[j
] = 0;
3416 this_alternative_match_win
[j
] = 0;
3421 /* If an earlyclobber operand conflicts with something,
3422 it must be reloaded, so request this and count the cost. */
3426 this_alternative_win
[i
] = 0;
3427 this_alternative_match_win
[j
] = 0;
3428 for (j
= 0; j
< noperands
; j
++)
3429 if (this_alternative_matches
[j
] == i
3430 && this_alternative_match_win
[j
])
3432 this_alternative_win
[j
] = 0;
3433 this_alternative_match_win
[j
] = 0;
3439 /* If one alternative accepts all the operands, no reload required,
3440 choose that alternative; don't consider the remaining ones. */
3443 /* Unswap these so that they are never swapped at `finish'. */
3444 if (commutative
>= 0)
3446 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3447 recog_data
.operand
[commutative
+ 1]
3448 = substed_operand
[commutative
+ 1];
3450 for (i
= 0; i
< noperands
; i
++)
3452 goal_alternative_win
[i
] = this_alternative_win
[i
];
3453 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3454 goal_alternative
[i
] = this_alternative
[i
];
3455 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3456 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3457 goal_alternative_earlyclobber
[i
]
3458 = this_alternative_earlyclobber
[i
];
3460 goal_alternative_number
= this_alternative_number
;
3461 goal_alternative_swapped
= swapped
;
3462 goal_earlyclobber
= this_earlyclobber
;
3466 /* REJECT, set by the ! and ? constraint characters and when a register
3467 would be reloaded into a non-preferred class, discourages the use of
3468 this alternative for a reload goal. REJECT is incremented by six
3469 for each ? and two for each non-preferred class. */
3470 losers
= losers
* 6 + reject
;
3472 /* If this alternative can be made to work by reloading,
3473 and it needs less reloading than the others checked so far,
3474 record it as the chosen goal for reloading. */
3475 if (! bad
&& best
> losers
)
3477 for (i
= 0; i
< noperands
; i
++)
3479 goal_alternative
[i
] = this_alternative
[i
];
3480 goal_alternative_win
[i
] = this_alternative_win
[i
];
3481 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3482 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3483 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3484 goal_alternative_earlyclobber
[i
]
3485 = this_alternative_earlyclobber
[i
];
3487 goal_alternative_swapped
= swapped
;
3489 goal_alternative_number
= this_alternative_number
;
3490 goal_earlyclobber
= this_earlyclobber
;
3494 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3495 then we need to try each alternative twice,
3496 the second time matching those two operands
3497 as if we had exchanged them.
3498 To do this, really exchange them in operands.
3500 If we have just tried the alternatives the second time,
3501 return operands to normal and drop through. */
3503 if (commutative
>= 0)
3508 enum reg_class tclass
;
3511 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3512 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3513 /* Swap the duplicates too. */
3514 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3515 if (recog_data
.dup_num
[i
] == commutative
3516 || recog_data
.dup_num
[i
] == commutative
+ 1)
3517 *recog_data
.dup_loc
[i
]
3518 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3520 tclass
= preferred_class
[commutative
];
3521 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3522 preferred_class
[commutative
+ 1] = tclass
;
3524 t
= pref_or_nothing
[commutative
];
3525 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3526 pref_or_nothing
[commutative
+ 1] = t
;
3528 memcpy (constraints
, recog_data
.constraints
,
3529 noperands
* sizeof (char *));
3534 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3535 recog_data
.operand
[commutative
+ 1]
3536 = substed_operand
[commutative
+ 1];
3537 /* Unswap the duplicates too. */
3538 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3539 if (recog_data
.dup_num
[i
] == commutative
3540 || recog_data
.dup_num
[i
] == commutative
+ 1)
3541 *recog_data
.dup_loc
[i
]
3542 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3546 /* The operands don't meet the constraints.
3547 goal_alternative describes the alternative
3548 that we could reach by reloading the fewest operands.
3549 Reload so as to fit it. */
3551 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3553 /* No alternative works with reloads?? */
3554 if (insn_code_number
>= 0)
3555 fatal_insn ("unable to generate reloads for:", insn
);
3556 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3557 /* Avoid further trouble with this insn. */
3558 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3563 /* Jump to `finish' from above if all operands are valid already.
3564 In that case, goal_alternative_win is all 1. */
3567 /* Right now, for any pair of operands I and J that are required to match,
3569 goal_alternative_matches[J] is I.
3570 Set up goal_alternative_matched as the inverse function:
3571 goal_alternative_matched[I] = J. */
3573 for (i
= 0; i
< noperands
; i
++)
3574 goal_alternative_matched
[i
] = -1;
3576 for (i
= 0; i
< noperands
; i
++)
3577 if (! goal_alternative_win
[i
]
3578 && goal_alternative_matches
[i
] >= 0)
3579 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3581 for (i
= 0; i
< noperands
; i
++)
3582 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3584 /* If the best alternative is with operands 1 and 2 swapped,
3585 consider them swapped before reporting the reloads. Update the
3586 operand numbers of any reloads already pushed. */
3588 if (goal_alternative_swapped
)
3592 tem
= substed_operand
[commutative
];
3593 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3594 substed_operand
[commutative
+ 1] = tem
;
3595 tem
= recog_data
.operand
[commutative
];
3596 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3597 recog_data
.operand
[commutative
+ 1] = tem
;
3598 tem
= *recog_data
.operand_loc
[commutative
];
3599 *recog_data
.operand_loc
[commutative
]
3600 = *recog_data
.operand_loc
[commutative
+ 1];
3601 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3603 for (i
= 0; i
< n_reloads
; i
++)
3605 if (rld
[i
].opnum
== commutative
)
3606 rld
[i
].opnum
= commutative
+ 1;
3607 else if (rld
[i
].opnum
== commutative
+ 1)
3608 rld
[i
].opnum
= commutative
;
3612 for (i
= 0; i
< noperands
; i
++)
3614 operand_reloadnum
[i
] = -1;
3616 /* If this is an earlyclobber operand, we need to widen the scope.
3617 The reload must remain valid from the start of the insn being
3618 reloaded until after the operand is stored into its destination.
3619 We approximate this with RELOAD_OTHER even though we know that we
3620 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3622 One special case that is worth checking is when we have an
3623 output that is earlyclobber but isn't used past the insn (typically
3624 a SCRATCH). In this case, we only need have the reload live
3625 through the insn itself, but not for any of our input or output
3627 But we must not accidentally narrow the scope of an existing
3628 RELOAD_OTHER reload - leave these alone.
3630 In any case, anything needed to address this operand can remain
3631 however they were previously categorized. */
3633 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3635 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3636 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3639 /* Any constants that aren't allowed and can't be reloaded
3640 into registers are here changed into memory references. */
3641 for (i
= 0; i
< noperands
; i
++)
3642 if (! goal_alternative_win
[i
]
3643 && CONSTANT_P (recog_data
.operand
[i
])
3644 /* force_const_mem does not accept HIGH. */
3645 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3646 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3647 (enum reg_class
) goal_alternative
[i
])
3649 || no_input_reloads
)
3650 && operand_mode
[i
] != VOIDmode
)
3652 substed_operand
[i
] = recog_data
.operand
[i
]
3653 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3654 recog_data
.operand
[i
]),
3655 i
, address_type
[i
], ind_levels
, 0, insn
,
3657 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3658 goal_alternative_number
))
3659 goal_alternative_win
[i
] = 1;
3662 /* Record the values of the earlyclobber operands for the caller. */
3663 if (goal_earlyclobber
)
3664 for (i
= 0; i
< noperands
; i
++)
3665 if (goal_alternative_earlyclobber
[i
])
3666 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3668 /* Now record reloads for all the operands that need them. */
3669 for (i
= 0; i
< noperands
; i
++)
3670 if (! goal_alternative_win
[i
])
3672 /* Operands that match previous ones have already been handled. */
3673 if (goal_alternative_matches
[i
] >= 0)
3675 /* Handle an operand with a nonoffsettable address
3676 appearing where an offsettable address will do
3677 by reloading the address into a base register.
3679 ??? We can also do this when the operand is a register and
3680 reg_equiv_mem is not offsettable, but this is a bit tricky,
3681 so we don't bother with it. It may not be worth doing. */
3682 else if (goal_alternative_matched
[i
] == -1
3683 && goal_alternative_offmemok
[i
]
3684 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3686 operand_reloadnum
[i
]
3687 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3688 &XEXP (recog_data
.operand
[i
], 0), (rtx
*)0,
3690 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3691 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3692 rld
[operand_reloadnum
[i
]].inc
3693 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3695 /* If this operand is an output, we will have made any
3696 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3697 now we are treating part of the operand as an input, so
3698 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3700 if (modified
[i
] == RELOAD_WRITE
)
3702 for (j
= 0; j
< n_reloads
; j
++)
3704 if (rld
[j
].opnum
== i
)
3706 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3707 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3708 else if (rld
[j
].when_needed
3709 == RELOAD_FOR_OUTADDR_ADDRESS
)
3710 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3715 else if (goal_alternative_matched
[i
] == -1)
3717 operand_reloadnum
[i
]
3718 = push_reload ((modified
[i
] != RELOAD_WRITE
3719 ? recog_data
.operand
[i
] : 0),
3720 (modified
[i
] != RELOAD_READ
3721 ? recog_data
.operand
[i
] : 0),
3722 (modified
[i
] != RELOAD_WRITE
3723 ? recog_data
.operand_loc
[i
] : 0),
3724 (modified
[i
] != RELOAD_READ
3725 ? recog_data
.operand_loc
[i
] : 0),
3726 (enum reg_class
) goal_alternative
[i
],
3727 (modified
[i
] == RELOAD_WRITE
3728 ? VOIDmode
: operand_mode
[i
]),
3729 (modified
[i
] == RELOAD_READ
3730 ? VOIDmode
: operand_mode
[i
]),
3731 (insn_code_number
< 0 ? 0
3732 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3733 0, i
, operand_type
[i
]);
3735 /* In a matching pair of operands, one must be input only
3736 and the other must be output only.
3737 Pass the input operand as IN and the other as OUT. */
3738 else if (modified
[i
] == RELOAD_READ
3739 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3741 operand_reloadnum
[i
]
3742 = push_reload (recog_data
.operand
[i
],
3743 recog_data
.operand
[goal_alternative_matched
[i
]],
3744 recog_data
.operand_loc
[i
],
3745 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3746 (enum reg_class
) goal_alternative
[i
],
3748 operand_mode
[goal_alternative_matched
[i
]],
3749 0, 0, i
, RELOAD_OTHER
);
3750 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3752 else if (modified
[i
] == RELOAD_WRITE
3753 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3755 operand_reloadnum
[goal_alternative_matched
[i
]]
3756 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3757 recog_data
.operand
[i
],
3758 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3759 recog_data
.operand_loc
[i
],
3760 (enum reg_class
) goal_alternative
[i
],
3761 operand_mode
[goal_alternative_matched
[i
]],
3763 0, 0, i
, RELOAD_OTHER
);
3764 operand_reloadnum
[i
] = output_reloadnum
;
3766 else if (insn_code_number
>= 0)
3770 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3771 /* Avoid further trouble with this insn. */
3772 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3777 else if (goal_alternative_matched
[i
] < 0
3778 && goal_alternative_matches
[i
] < 0
3781 /* For each non-matching operand that's a MEM or a pseudo-register
3782 that didn't get a hard register, make an optional reload.
3783 This may get done even if the insn needs no reloads otherwise. */
3785 rtx operand
= recog_data
.operand
[i
];
3787 while (GET_CODE (operand
) == SUBREG
)
3788 operand
= SUBREG_REG (operand
);
3789 if ((GET_CODE (operand
) == MEM
3790 || (GET_CODE (operand
) == REG
3791 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3792 /* If this is only for an output, the optional reload would not
3793 actually cause us to use a register now, just note that
3794 something is stored here. */
3795 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3796 || modified
[i
] == RELOAD_WRITE
)
3797 && ! no_input_reloads
3798 /* An optional output reload might allow to delete INSN later.
3799 We mustn't make in-out reloads on insns that are not permitted
3801 If this is an asm, we can't delete it; we must not even call
3802 push_reload for an optional output reload in this case,
3803 because we can't be sure that the constraint allows a register,
3804 and push_reload verifies the constraints for asms. */
3805 && (modified
[i
] == RELOAD_READ
3806 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3807 operand_reloadnum
[i
]
3808 = push_reload ((modified
[i
] != RELOAD_WRITE
3809 ? recog_data
.operand
[i
] : 0),
3810 (modified
[i
] != RELOAD_READ
3811 ? recog_data
.operand
[i
] : 0),
3812 (modified
[i
] != RELOAD_WRITE
3813 ? recog_data
.operand_loc
[i
] : 0),
3814 (modified
[i
] != RELOAD_READ
3815 ? recog_data
.operand_loc
[i
] : 0),
3816 (enum reg_class
) goal_alternative
[i
],
3817 (modified
[i
] == RELOAD_WRITE
3818 ? VOIDmode
: operand_mode
[i
]),
3819 (modified
[i
] == RELOAD_READ
3820 ? VOIDmode
: operand_mode
[i
]),
3821 (insn_code_number
< 0 ? 0
3822 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3823 1, i
, operand_type
[i
]);
3824 /* If a memory reference remains (either as a MEM or a pseudo that
3825 did not get a hard register), yet we can't make an optional
3826 reload, check if this is actually a pseudo register reference;
3827 we then need to emit a USE and/or a CLOBBER so that reload
3828 inheritance will do the right thing. */
3830 && (GET_CODE (operand
) == MEM
3831 || (GET_CODE (operand
) == REG
3832 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3833 && reg_renumber
[REGNO (operand
)] < 0)))
3835 operand
= *recog_data
.operand_loc
[i
];
3837 while (GET_CODE (operand
) == SUBREG
)
3838 operand
= SUBREG_REG (operand
);
3839 if (GET_CODE (operand
) == REG
)
3841 if (modified
[i
] != RELOAD_WRITE
)
3842 /* We mark the USE with QImode so that we recognize
3843 it as one that can be safely deleted at the end
3845 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3847 if (modified
[i
] != RELOAD_READ
)
3848 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3852 else if (goal_alternative_matches
[i
] >= 0
3853 && goal_alternative_win
[goal_alternative_matches
[i
]]
3854 && modified
[i
] == RELOAD_READ
3855 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3856 && ! no_input_reloads
&& ! no_output_reloads
3859 /* Similarly, make an optional reload for a pair of matching
3860 objects that are in MEM or a pseudo that didn't get a hard reg. */
3862 rtx operand
= recog_data
.operand
[i
];
3864 while (GET_CODE (operand
) == SUBREG
)
3865 operand
= SUBREG_REG (operand
);
3866 if ((GET_CODE (operand
) == MEM
3867 || (GET_CODE (operand
) == REG
3868 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3869 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3871 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3872 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3873 recog_data
.operand
[i
],
3874 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3875 recog_data
.operand_loc
[i
],
3876 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3877 operand_mode
[goal_alternative_matches
[i
]],
3879 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3882 /* Perform whatever substitutions on the operands we are supposed
3883 to make due to commutativity or replacement of registers
3884 with equivalent constants or memory slots. */
3886 for (i
= 0; i
< noperands
; i
++)
3888 /* We only do this on the last pass through reload, because it is
3889 possible for some data (like reg_equiv_address) to be changed during
3890 later passes. Moreover, we loose the opportunity to get a useful
3891 reload_{in,out}_reg when we do these replacements. */
3895 rtx substitution
= substed_operand
[i
];
3897 *recog_data
.operand_loc
[i
] = substitution
;
3899 /* If we're replacing an operand with a LABEL_REF, we need
3900 to make sure that there's a REG_LABEL note attached to
3901 this instruction. */
3902 if (GET_CODE (insn
) != JUMP_INSN
3903 && GET_CODE (substitution
) == LABEL_REF
3904 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3905 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
3906 XEXP (substitution
, 0),
3910 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3913 /* If this insn pattern contains any MATCH_DUP's, make sure that
3914 they will be substituted if the operands they match are substituted.
3915 Also do now any substitutions we already did on the operands.
3917 Don't do this if we aren't making replacements because we might be
3918 propagating things allocated by frame pointer elimination into places
3919 it doesn't expect. */
3921 if (insn_code_number
>= 0 && replace
)
3922 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3924 int opno
= recog_data
.dup_num
[i
];
3925 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3926 if (operand_reloadnum
[opno
] >= 0)
3927 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3928 insn_data
[insn_code_number
].operand
[opno
].mode
);
3932 /* This loses because reloading of prior insns can invalidate the equivalence
3933 (or at least find_equiv_reg isn't smart enough to find it any more),
3934 causing this insn to need more reload regs than it needed before.
3935 It may be too late to make the reload regs available.
3936 Now this optimization is done safely in choose_reload_regs. */
3938 /* For each reload of a reg into some other class of reg,
3939 search for an existing equivalent reg (same value now) in the right class.
3940 We can use it as long as we don't need to change its contents. */
3941 for (i
= 0; i
< n_reloads
; i
++)
3942 if (rld
[i
].reg_rtx
== 0
3944 && GET_CODE (rld
[i
].in
) == REG
3948 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3949 static_reload_reg_p
, 0, rld
[i
].inmode
);
3950 /* Prevent generation of insn to load the value
3951 because the one we found already has the value. */
3953 rld
[i
].in
= rld
[i
].reg_rtx
;
3957 /* Perhaps an output reload can be combined with another
3958 to reduce needs by one. */
3959 if (!goal_earlyclobber
)
3962 /* If we have a pair of reloads for parts of an address, they are reloading
3963 the same object, the operands themselves were not reloaded, and they
3964 are for two operands that are supposed to match, merge the reloads and
3965 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3967 for (i
= 0; i
< n_reloads
; i
++)
3971 for (j
= i
+ 1; j
< n_reloads
; j
++)
3972 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3973 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3974 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3975 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3976 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3977 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3978 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3979 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3980 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3981 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3982 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3983 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3984 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3985 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3986 || (goal_alternative_matches
[rld
[j
].opnum
]
3989 for (k
= 0; k
< n_replacements
; k
++)
3990 if (replacements
[k
].what
== j
)
3991 replacements
[k
].what
= i
;
3993 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3994 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3995 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3997 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4002 /* Scan all the reloads and update their type.
4003 If a reload is for the address of an operand and we didn't reload
4004 that operand, change the type. Similarly, change the operand number
4005 of a reload when two operands match. If a reload is optional, treat it
4006 as though the operand isn't reloaded.
4008 ??? This latter case is somewhat odd because if we do the optional
4009 reload, it means the object is hanging around. Thus we need only
4010 do the address reload if the optional reload was NOT done.
4012 Change secondary reloads to be the address type of their operand, not
4015 If an operand's reload is now RELOAD_OTHER, change any
4016 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4017 RELOAD_FOR_OTHER_ADDRESS. */
4019 for (i
= 0; i
< n_reloads
; i
++)
4021 if (rld
[i
].secondary_p
4022 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4023 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4025 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4026 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4027 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4028 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4029 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4030 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4032 /* If we have a secondary reload to go along with this reload,
4033 change its type to RELOAD_FOR_OPADDR_ADDR. */
4035 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4036 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4037 && rld
[i
].secondary_in_reload
!= -1)
4039 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4041 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4043 /* If there's a tertiary reload we have to change it also. */
4044 if (secondary_in_reload
> 0
4045 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4046 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4047 = RELOAD_FOR_OPADDR_ADDR
;
4050 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4051 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4052 && rld
[i
].secondary_out_reload
!= -1)
4054 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4056 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4058 /* If there's a tertiary reload we have to change it also. */
4059 if (secondary_out_reload
4060 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4061 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4062 = RELOAD_FOR_OPADDR_ADDR
;
4065 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4066 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4067 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4069 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4072 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4073 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4074 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4075 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4077 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4079 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4080 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4083 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4084 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4085 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4087 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4088 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4089 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4090 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4091 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4092 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4093 This is complicated by the fact that a single operand can have more
4094 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4095 choose_reload_regs without affecting code quality, and cases that
4096 actually fail are extremely rare, so it turns out to be better to fix
4097 the problem here by not generating cases that choose_reload_regs will
4099 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4100 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4102 We can reduce the register pressure by exploiting that a
4103 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4104 does not conflict with any of them, if it is only used for the first of
4105 the RELOAD_FOR_X_ADDRESS reloads. */
4107 int first_op_addr_num
= -2;
4108 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4109 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4110 int need_change
= 0;
4111 /* We use last_op_addr_reload and the contents of the above arrays
4112 first as flags - -2 means no instance encountered, -1 means exactly
4113 one instance encountered.
4114 If more than one instance has been encountered, we store the reload
4115 number of the first reload of the kind in question; reload numbers
4116 are known to be non-negative. */
4117 for (i
= 0; i
< noperands
; i
++)
4118 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4119 for (i
= n_reloads
- 1; i
>= 0; i
--)
4121 switch (rld
[i
].when_needed
)
4123 case RELOAD_FOR_OPERAND_ADDRESS
:
4124 if (++first_op_addr_num
>= 0)
4126 first_op_addr_num
= i
;
4130 case RELOAD_FOR_INPUT_ADDRESS
:
4131 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4133 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4137 case RELOAD_FOR_OUTPUT_ADDRESS
:
4138 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4140 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4151 for (i
= 0; i
< n_reloads
; i
++)
4154 enum reload_type type
;
4156 switch (rld
[i
].when_needed
)
4158 case RELOAD_FOR_OPADDR_ADDR
:
4159 first_num
= first_op_addr_num
;
4160 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4162 case RELOAD_FOR_INPADDR_ADDRESS
:
4163 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4164 type
= RELOAD_FOR_INPUT_ADDRESS
;
4166 case RELOAD_FOR_OUTADDR_ADDRESS
:
4167 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4168 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4175 else if (i
> first_num
)
4176 rld
[i
].when_needed
= type
;
4179 /* Check if the only TYPE reload that uses reload I is
4180 reload FIRST_NUM. */
4181 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4183 if (rld
[j
].when_needed
== type
4184 && (rld
[i
].secondary_p
4185 ? rld
[j
].secondary_in_reload
== i
4186 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4188 rld
[i
].when_needed
= type
;
4197 /* See if we have any reloads that are now allowed to be merged
4198 because we've changed when the reload is needed to
4199 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4200 check for the most common cases. */
4202 for (i
= 0; i
< n_reloads
; i
++)
4203 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4204 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4205 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4206 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4207 for (j
= 0; j
< n_reloads
; j
++)
4208 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4209 && rld
[j
].when_needed
== rld
[i
].when_needed
4210 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4211 && rld
[i
].class == rld
[j
].class
4212 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4213 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4215 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4216 transfer_replacements (i
, j
);
4221 /* If we made any reloads for addresses, see if they violate a
4222 "no input reloads" requirement for this insn. But loads that we
4223 do after the insn (such as for output addresses) are fine. */
4224 if (no_input_reloads
)
4225 for (i
= 0; i
< n_reloads
; i
++)
4227 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4228 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4232 /* Compute reload_mode and reload_nregs. */
4233 for (i
= 0; i
< n_reloads
; i
++)
4236 = (rld
[i
].inmode
== VOIDmode
4237 || (GET_MODE_SIZE (rld
[i
].outmode
)
4238 > GET_MODE_SIZE (rld
[i
].inmode
)))
4239 ? rld
[i
].outmode
: rld
[i
].inmode
;
4241 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4247 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4248 accepts a memory operand with constant address. */
4251 alternative_allows_memconst (constraint
, altnum
)
4252 const char *constraint
;
4256 /* Skip alternatives before the one requested. */
4259 while (*constraint
++ != ',');
4262 /* Scan the requested alternative for 'm' or 'o'.
4263 If one of them is present, this alternative accepts memory constants. */
4264 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4265 if (c
== 'm' || c
== 'o')
4270 /* Scan X for memory references and scan the addresses for reloading.
4271 Also checks for references to "constant" regs that we want to eliminate
4272 and replaces them with the values they stand for.
4273 We may alter X destructively if it contains a reference to such.
4274 If X is just a constant reg, we return the equivalent value
4277 IND_LEVELS says how many levels of indirect addressing this machine
4280 OPNUM and TYPE identify the purpose of the reload.
4282 IS_SET_DEST is true if X is the destination of a SET, which is not
4283 appropriate to be replaced by a constant.
4285 INSN, if nonzero, is the insn in which we do the reload. It is used
4286 to determine if we may generate output reloads, and where to put USEs
4287 for pseudos that we have to replace with stack slots.
4289 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4290 result of find_reloads_address. */
4293 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4297 enum reload_type type
;
4301 int *address_reloaded
;
4303 RTX_CODE code
= GET_CODE (x
);
4305 const char *fmt
= GET_RTX_FORMAT (code
);
4311 /* This code is duplicated for speed in find_reloads. */
4312 int regno
= REGNO (x
);
4313 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4314 x
= reg_equiv_constant
[regno
];
4316 /* This creates (subreg (mem...)) which would cause an unnecessary
4317 reload of the mem. */
4318 else if (reg_equiv_mem
[regno
] != 0)
4319 x
= reg_equiv_mem
[regno
];
4321 else if (reg_equiv_memory_loc
[regno
]
4322 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4324 rtx mem
= make_memloc (x
, regno
);
4325 if (reg_equiv_address
[regno
]
4326 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4328 /* If this is not a toplevel operand, find_reloads doesn't see
4329 this substitution. We have to emit a USE of the pseudo so
4330 that delete_output_reload can see it. */
4331 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4332 /* We mark the USE with QImode so that we recognize it
4333 as one that can be safely deleted at the end of
4335 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4338 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4339 opnum
, type
, ind_levels
, insn
);
4340 if (address_reloaded
)
4341 *address_reloaded
= i
;
4350 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4351 opnum
, type
, ind_levels
, insn
);
4352 if (address_reloaded
)
4353 *address_reloaded
= i
;
4358 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4360 /* Check for SUBREG containing a REG that's equivalent to a constant.
4361 If the constant has a known value, truncate it right now.
4362 Similarly if we are extracting a single-word of a multi-word
4363 constant. If the constant is symbolic, allow it to be substituted
4364 normally. push_reload will strip the subreg later. If the
4365 constant is VOIDmode, abort because we will lose the mode of
4366 the register (this should never happen because one of the cases
4367 above should handle it). */
4369 int regno
= REGNO (SUBREG_REG (x
));
4372 if (subreg_lowpart_p (x
)
4373 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4374 && reg_equiv_constant
[regno
] != 0
4375 && (tem
= gen_lowpart_common (GET_MODE (x
),
4376 reg_equiv_constant
[regno
])) != 0)
4379 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4380 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4381 && reg_equiv_constant
[regno
] != 0
4382 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4383 SUBREG_BYTE (x
) / UNITS_PER_WORD
, 0,
4384 GET_MODE (SUBREG_REG (x
)))) != 0)
4386 /* TEM is now a word sized constant for the bits from X that
4387 we wanted. However, TEM may be the wrong representation.
4389 Use gen_lowpart_common to convert a CONST_INT into a
4390 CONST_DOUBLE and vice versa as needed according to by the mode
4392 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4398 /* If the SUBREG is wider than a word, the above test will fail.
4399 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4400 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4401 a 32 bit target. We still can - and have to - handle this
4402 for non-paradoxical subregs of CONST_INTs. */
4403 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4404 && reg_equiv_constant
[regno
] != 0
4405 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4406 && (GET_MODE_SIZE (GET_MODE (x
))
4407 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4409 int shift
= SUBREG_BYTE (x
) * BITS_PER_UNIT
;
4410 if (WORDS_BIG_ENDIAN
)
4411 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4412 - GET_MODE_BITSIZE (GET_MODE (x
))
4414 /* Here we use the knowledge that CONST_INTs have a
4415 HOST_WIDE_INT field. */
4416 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4417 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4418 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4421 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4422 && reg_equiv_constant
[regno
] != 0
4423 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4426 /* If the subreg contains a reg that will be converted to a mem,
4427 convert the subreg to a narrower memref now.
4428 Otherwise, we would get (subreg (mem ...) ...),
4429 which would force reload of the mem.
4431 We also need to do this if there is an equivalent MEM that is
4432 not offsettable. In that case, alter_subreg would produce an
4433 invalid address on big-endian machines.
4435 For machines that extend byte loads, we must not reload using
4436 a wider mode if we have a paradoxical SUBREG. find_reloads will
4437 force a reload in that case. So we should not do anything here. */
4439 else if (regno
>= FIRST_PSEUDO_REGISTER
4440 #ifdef LOAD_EXTEND_OP
4441 && (GET_MODE_SIZE (GET_MODE (x
))
4442 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4444 && (reg_equiv_address
[regno
] != 0
4445 || (reg_equiv_mem
[regno
] != 0
4446 && (! strict_memory_address_p (GET_MODE (x
),
4447 XEXP (reg_equiv_mem
[regno
], 0))
4448 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4449 || num_not_at_initial_offset
))))
4450 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4454 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4458 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4459 ind_levels
, is_set_dest
, insn
,
4461 /* If we have replaced a reg with it's equivalent memory loc -
4462 that can still be handled here e.g. if it's in a paradoxical
4463 subreg - we must make the change in a copy, rather than using
4464 a destructive change. This way, find_reloads can still elect
4465 not to do the change. */
4466 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4468 x
= shallow_copy_rtx (x
);
4471 XEXP (x
, i
) = new_part
;
4477 /* Return a mem ref for the memory equivalent of reg REGNO.
4478 This mem ref is not shared with anything. */
4481 make_memloc (ad
, regno
)
4485 /* We must rerun eliminate_regs, in case the elimination
4486 offsets have changed. */
4488 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4490 /* If TEM might contain a pseudo, we must copy it to avoid
4491 modifying it when we do the substitution for the reload. */
4492 if (rtx_varies_p (tem
, 0))
4493 tem
= copy_rtx (tem
);
4495 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4496 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4498 /* Copy the result if it's still the same as the equivalence, to avoid
4499 modifying it when we do the substitution for the reload. */
4500 if (tem
== reg_equiv_memory_loc
[regno
])
4501 tem
= copy_rtx (tem
);
4505 /* Record all reloads needed for handling memory address AD
4506 which appears in *LOC in a memory reference to mode MODE
4507 which itself is found in location *MEMREFLOC.
4508 Note that we take shortcuts assuming that no multi-reg machine mode
4509 occurs as part of an address.
4511 OPNUM and TYPE specify the purpose of this reload.
4513 IND_LEVELS says how many levels of indirect addressing this machine
4516 INSN, if nonzero, is the insn in which we do the reload. It is used
4517 to determine if we may generate output reloads, and where to put USEs
4518 for pseudos that we have to replace with stack slots.
4520 Value is nonzero if this address is reloaded or replaced as a whole.
4521 This is interesting to the caller if the address is an autoincrement.
4523 Note that there is no verification that the address will be valid after
4524 this routine does its work. Instead, we rely on the fact that the address
4525 was valid when reload started. So we need only undo things that reload
4526 could have broken. These are wrong register types, pseudos not allocated
4527 to a hard register, and frame pointer elimination. */
4530 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4531 enum machine_mode mode
;
4536 enum reload_type type
;
4541 int removed_and
= 0;
4544 /* If the address is a register, see if it is a legitimate address and
4545 reload if not. We first handle the cases where we need not reload
4546 or where we must reload in a non-standard way. */
4548 if (GET_CODE (ad
) == REG
)
4552 /* If the register is equivalent to an invariant expression, substitute
4553 the invariant, and eliminate any eliminable register references. */
4554 tem
= reg_equiv_constant
[regno
];
4556 && (tem
= eliminate_regs (tem
, mode
, insn
))
4557 && strict_memory_address_p (mode
, tem
))
4563 tem
= reg_equiv_memory_loc
[regno
];
4566 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4568 tem
= make_memloc (ad
, regno
);
4569 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4571 find_reloads_address (GET_MODE (tem
), (rtx
*)0, XEXP (tem
, 0),
4572 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4575 /* We can avoid a reload if the register's equivalent memory
4576 expression is valid as an indirect memory address.
4577 But not all addresses are valid in a mem used as an indirect
4578 address: only reg or reg+constant. */
4581 && strict_memory_address_p (mode
, tem
)
4582 && (GET_CODE (XEXP (tem
, 0)) == REG
4583 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4584 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4585 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4587 /* TEM is not the same as what we'll be replacing the
4588 pseudo with after reload, put a USE in front of INSN
4589 in the final reload pass. */
4591 && num_not_at_initial_offset
4592 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4595 /* We mark the USE with QImode so that we
4596 recognize it as one that can be safely
4597 deleted at the end of reload. */
4598 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4601 /* This doesn't really count as replacing the address
4602 as a whole, since it is still a memory access. */
4610 /* The only remaining case where we can avoid a reload is if this is a
4611 hard register that is valid as a base register and which is not the
4612 subject of a CLOBBER in this insn. */
4614 else if (regno
< FIRST_PSEUDO_REGISTER
4615 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4616 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4619 /* If we do not have one of the cases above, we must do the reload. */
4620 push_reload (ad
, NULL_RTX
, loc
, (rtx
*)0, BASE_REG_CLASS
,
4621 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4625 if (strict_memory_address_p (mode
, ad
))
4627 /* The address appears valid, so reloads are not needed.
4628 But the address may contain an eliminable register.
4629 This can happen because a machine with indirect addressing
4630 may consider a pseudo register by itself a valid address even when
4631 it has failed to get a hard reg.
4632 So do a tree-walk to find and eliminate all such regs. */
4634 /* But first quickly dispose of a common case. */
4635 if (GET_CODE (ad
) == PLUS
4636 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4637 && GET_CODE (XEXP (ad
, 0)) == REG
4638 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4641 subst_reg_equivs_changed
= 0;
4642 *loc
= subst_reg_equivs (ad
, insn
);
4644 if (! subst_reg_equivs_changed
)
4647 /* Check result for validity after substitution. */
4648 if (strict_memory_address_p (mode
, ad
))
4652 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4657 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4662 *memrefloc
= copy_rtx (*memrefloc
);
4663 XEXP (*memrefloc
, 0) = ad
;
4664 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4670 /* The address is not valid. We have to figure out why. First see if
4671 we have an outer AND and remove it if so. Then analyze what's inside. */
4673 if (GET_CODE (ad
) == AND
)
4676 loc
= &XEXP (ad
, 0);
4680 /* One possibility for why the address is invalid is that it is itself
4681 a MEM. This can happen when the frame pointer is being eliminated, a
4682 pseudo is not allocated to a hard register, and the offset between the
4683 frame and stack pointers is not its initial value. In that case the
4684 pseudo will have been replaced by a MEM referring to the
4686 if (GET_CODE (ad
) == MEM
)
4688 /* First ensure that the address in this MEM is valid. Then, unless
4689 indirect addresses are valid, reload the MEM into a register. */
4691 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4692 opnum
, ADDR_TYPE (type
),
4693 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4695 /* If tem was changed, then we must create a new memory reference to
4696 hold it and store it back into memrefloc. */
4697 if (tem
!= ad
&& memrefloc
)
4699 *memrefloc
= copy_rtx (*memrefloc
);
4700 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4701 loc
= &XEXP (*memrefloc
, 0);
4703 loc
= &XEXP (*loc
, 0);
4706 /* Check similar cases as for indirect addresses as above except
4707 that we can allow pseudos and a MEM since they should have been
4708 taken care of above. */
4711 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4712 || GET_CODE (XEXP (tem
, 0)) == MEM
4713 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4714 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4715 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4716 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4718 /* Must use TEM here, not AD, since it is the one that will
4719 have any subexpressions reloaded, if needed. */
4720 push_reload (tem
, NULL_RTX
, loc
, (rtx
*)0,
4721 BASE_REG_CLASS
, GET_MODE (tem
),
4724 return ! removed_and
;
4730 /* If we have address of a stack slot but it's not valid because the
4731 displacement is too large, compute the sum in a register.
4732 Handle all base registers here, not just fp/ap/sp, because on some
4733 targets (namely SH) we can also get too large displacements from
4734 big-endian corrections. */
4735 else if (GET_CODE (ad
) == PLUS
4736 && GET_CODE (XEXP (ad
, 0)) == REG
4737 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4738 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4739 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4741 /* Unshare the MEM rtx so we can safely alter it. */
4744 *memrefloc
= copy_rtx (*memrefloc
);
4745 loc
= &XEXP (*memrefloc
, 0);
4747 loc
= &XEXP (*loc
, 0);
4750 if (double_reg_address_ok
)
4752 /* Unshare the sum as well. */
4753 *loc
= ad
= copy_rtx (ad
);
4755 /* Reload the displacement into an index reg.
4756 We assume the frame pointer or arg pointer is a base reg. */
4757 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4758 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4764 /* If the sum of two regs is not necessarily valid,
4765 reload the sum into a base reg.
4766 That will at least work. */
4767 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4768 Pmode
, opnum
, type
, ind_levels
);
4770 return ! removed_and
;
4773 /* If we have an indexed stack slot, there are three possible reasons why
4774 it might be invalid: The index might need to be reloaded, the address
4775 might have been made by frame pointer elimination and hence have a
4776 constant out of range, or both reasons might apply.
4778 We can easily check for an index needing reload, but even if that is the
4779 case, we might also have an invalid constant. To avoid making the
4780 conservative assumption and requiring two reloads, we see if this address
4781 is valid when not interpreted strictly. If it is, the only problem is
4782 that the index needs a reload and find_reloads_address_1 will take care
4785 If we decide to do something here, it must be that
4786 `double_reg_address_ok' is true and that this address rtl was made by
4787 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4788 rework the sum so that the reload register will be added to the index.
4789 This is safe because we know the address isn't shared.
4791 We check for fp/ap/sp as both the first and second operand of the
4794 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4795 && GET_CODE (XEXP (ad
, 0)) == PLUS
4796 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4797 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4798 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4800 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4801 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4803 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4804 && ! memory_address_p (mode
, ad
))
4806 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4807 plus_constant (XEXP (XEXP (ad
, 0), 0),
4808 INTVAL (XEXP (ad
, 1))),
4809 XEXP (XEXP (ad
, 0), 1));
4810 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4811 GET_MODE (ad
), opnum
, type
, ind_levels
);
4812 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4818 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4819 && GET_CODE (XEXP (ad
, 0)) == PLUS
4820 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4821 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4822 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4824 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4825 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4827 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4828 && ! memory_address_p (mode
, ad
))
4830 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4831 XEXP (XEXP (ad
, 0), 0),
4832 plus_constant (XEXP (XEXP (ad
, 0), 1),
4833 INTVAL (XEXP (ad
, 1))));
4834 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4835 GET_MODE (ad
), opnum
, type
, ind_levels
);
4836 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4842 /* See if address becomes valid when an eliminable register
4843 in a sum is replaced. */
4846 if (GET_CODE (ad
) == PLUS
)
4847 tem
= subst_indexed_address (ad
);
4848 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4850 /* Ok, we win that way. Replace any additional eliminable
4853 subst_reg_equivs_changed
= 0;
4854 tem
= subst_reg_equivs (tem
, insn
);
4856 /* Make sure that didn't make the address invalid again. */
4858 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4865 /* If constants aren't valid addresses, reload the constant address
4867 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4869 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4870 Unshare it so we can safely alter it. */
4871 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4872 && CONSTANT_POOL_ADDRESS_P (ad
))
4874 *memrefloc
= copy_rtx (*memrefloc
);
4875 loc
= &XEXP (*memrefloc
, 0);
4877 loc
= &XEXP (*loc
, 0);
4880 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4882 return ! removed_and
;
4885 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4889 /* Find all pseudo regs appearing in AD
4890 that are eliminable in favor of equivalent values
4891 and do not have hard regs; replace them by their equivalents.
4892 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4893 front of it for pseudos that we have to replace with stack slots. */
4896 subst_reg_equivs (ad
, insn
)
4900 RTX_CODE code
= GET_CODE (ad
);
4918 int regno
= REGNO (ad
);
4920 if (reg_equiv_constant
[regno
] != 0)
4922 subst_reg_equivs_changed
= 1;
4923 return reg_equiv_constant
[regno
];
4925 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4927 rtx mem
= make_memloc (ad
, regno
);
4928 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4930 subst_reg_equivs_changed
= 1;
4931 /* We mark the USE with QImode so that we recognize it
4932 as one that can be safely deleted at the end of
4934 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
4943 /* Quickly dispose of a common case. */
4944 if (XEXP (ad
, 0) == frame_pointer_rtx
4945 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4953 fmt
= GET_RTX_FORMAT (code
);
4954 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4956 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4960 /* Compute the sum of X and Y, making canonicalizations assumed in an
4961 address, namely: sum constant integers, surround the sum of two
4962 constants with a CONST, put the constant as the second operand, and
4963 group the constant on the outermost sum.
4965 This routine assumes both inputs are already in canonical form. */
4972 enum machine_mode mode
= GET_MODE (x
);
4974 if (mode
== VOIDmode
)
4975 mode
= GET_MODE (y
);
4977 if (mode
== VOIDmode
)
4980 if (GET_CODE (x
) == CONST_INT
)
4981 return plus_constant (y
, INTVAL (x
));
4982 else if (GET_CODE (y
) == CONST_INT
)
4983 return plus_constant (x
, INTVAL (y
));
4984 else if (CONSTANT_P (x
))
4985 tem
= x
, x
= y
, y
= tem
;
4987 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4988 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4990 /* Note that if the operands of Y are specified in the opposite
4991 order in the recursive calls below, infinite recursion will occur. */
4992 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4993 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4995 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4996 constant will have been placed second. */
4997 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4999 if (GET_CODE (x
) == CONST
)
5001 if (GET_CODE (y
) == CONST
)
5004 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5007 return gen_rtx_PLUS (mode
, x
, y
);
5010 /* If ADDR is a sum containing a pseudo register that should be
5011 replaced with a constant (from reg_equiv_constant),
5012 return the result of doing so, and also apply the associative
5013 law so that the result is more likely to be a valid address.
5014 (But it is not guaranteed to be one.)
5016 Note that at most one register is replaced, even if more are
5017 replaceable. Also, we try to put the result into a canonical form
5018 so it is more likely to be a valid address.
5020 In all other cases, return ADDR. */
5023 subst_indexed_address (addr
)
5026 rtx op0
= 0, op1
= 0, op2
= 0;
5030 if (GET_CODE (addr
) == PLUS
)
5032 /* Try to find a register to replace. */
5033 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5034 if (GET_CODE (op0
) == REG
5035 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5036 && reg_renumber
[regno
] < 0
5037 && reg_equiv_constant
[regno
] != 0)
5038 op0
= reg_equiv_constant
[regno
];
5039 else if (GET_CODE (op1
) == REG
5040 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5041 && reg_renumber
[regno
] < 0
5042 && reg_equiv_constant
[regno
] != 0)
5043 op1
= reg_equiv_constant
[regno
];
5044 else if (GET_CODE (op0
) == PLUS
5045 && (tem
= subst_indexed_address (op0
)) != op0
)
5047 else if (GET_CODE (op1
) == PLUS
5048 && (tem
= subst_indexed_address (op1
)) != op1
)
5053 /* Pick out up to three things to add. */
5054 if (GET_CODE (op1
) == PLUS
)
5055 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5056 else if (GET_CODE (op0
) == PLUS
)
5057 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5059 /* Compute the sum. */
5061 op1
= form_sum (op1
, op2
);
5063 op0
= form_sum (op0
, op1
);
5070 /* Update the REG_INC notes for an insn. It updates all REG_INC
5071 notes for the instruction which refer to REGNO the to refer
5072 to the reload number.
5074 INSN is the insn for which any REG_INC notes need updating.
5076 REGNO is the register number which has been reloaded.
5078 RELOADNUM is the reload number. */
5081 update_auto_inc_notes (insn
, regno
, reloadnum
)
5082 rtx insn ATTRIBUTE_UNUSED
;
5083 int regno ATTRIBUTE_UNUSED
;
5084 int reloadnum ATTRIBUTE_UNUSED
;
5089 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5090 if (REG_NOTE_KIND (link
) == REG_INC
5091 && REGNO (XEXP (link
, 0)) == regno
)
5092 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5096 /* Record the pseudo registers we must reload into hard registers in a
5097 subexpression of a would-be memory address, X referring to a value
5098 in mode MODE. (This function is not called if the address we find
5101 CONTEXT = 1 means we are considering regs as index regs,
5102 = 0 means we are considering them as base regs.
5104 OPNUM and TYPE specify the purpose of any reloads made.
5106 IND_LEVELS says how many levels of indirect addressing are
5107 supported at this point in the address.
5109 INSN, if nonzero, is the insn in which we do the reload. It is used
5110 to determine if we may generate output reloads.
5112 We return nonzero if X, as a whole, is reloaded or replaced. */
5114 /* Note that we take shortcuts assuming that no multi-reg machine mode
5115 occurs as part of an address.
5116 Also, this is not fully machine-customizable; it works for machines
5117 such as VAXen and 68000's and 32000's, but other possible machines
5118 could have addressing modes that this does not handle right. */
5121 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5122 enum machine_mode mode
;
5127 enum reload_type type
;
5131 RTX_CODE code
= GET_CODE (x
);
5137 rtx orig_op0
= XEXP (x
, 0);
5138 rtx orig_op1
= XEXP (x
, 1);
5139 RTX_CODE code0
= GET_CODE (orig_op0
);
5140 RTX_CODE code1
= GET_CODE (orig_op1
);
5144 if (GET_CODE (op0
) == SUBREG
)
5146 op0
= SUBREG_REG (op0
);
5147 code0
= GET_CODE (op0
);
5148 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5149 op0
= gen_rtx_REG (word_mode
,
5151 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5152 GET_MODE (SUBREG_REG (orig_op0
)),
5153 SUBREG_BYTE (orig_op0
),
5154 GET_MODE (orig_op0
))));
5157 if (GET_CODE (op1
) == SUBREG
)
5159 op1
= SUBREG_REG (op1
);
5160 code1
= GET_CODE (op1
);
5161 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5162 /* ??? Why is this given op1's mode and above for
5163 ??? op0 SUBREGs we use word_mode? */
5164 op1
= gen_rtx_REG (GET_MODE (op1
),
5166 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5167 GET_MODE (SUBREG_REG (orig_op1
)),
5168 SUBREG_BYTE (orig_op1
),
5169 GET_MODE (orig_op1
))));
5172 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5173 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5175 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5176 type
, ind_levels
, insn
);
5177 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5178 type
, ind_levels
, insn
);
5181 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5182 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5184 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5185 type
, ind_levels
, insn
);
5186 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5187 type
, ind_levels
, insn
);
5190 else if (code0
== CONST_INT
|| code0
== CONST
5191 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5192 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5193 type
, ind_levels
, insn
);
5195 else if (code1
== CONST_INT
|| code1
== CONST
5196 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5197 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5198 type
, ind_levels
, insn
);
5200 else if (code0
== REG
&& code1
== REG
)
5202 if (REG_OK_FOR_INDEX_P (op0
)
5203 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5205 else if (REG_OK_FOR_INDEX_P (op1
)
5206 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5208 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5209 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5210 type
, ind_levels
, insn
);
5211 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5212 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5213 type
, ind_levels
, insn
);
5214 else if (REG_OK_FOR_INDEX_P (op1
))
5215 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5216 type
, ind_levels
, insn
);
5217 else if (REG_OK_FOR_INDEX_P (op0
))
5218 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5219 type
, ind_levels
, insn
);
5222 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5223 type
, ind_levels
, insn
);
5224 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5225 type
, ind_levels
, insn
);
5229 else if (code0
== REG
)
5231 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5232 type
, ind_levels
, insn
);
5233 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5234 type
, ind_levels
, insn
);
5237 else if (code1
== REG
)
5239 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5240 type
, ind_levels
, insn
);
5241 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5242 type
, ind_levels
, insn
);
5251 rtx op0
= XEXP (x
, 0);
5252 rtx op1
= XEXP (x
, 1);
5254 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5257 /* Currently, we only support {PRE,POST}_MODIFY constructs
5258 where a base register is {inc,dec}remented by the contents
5259 of another register or by a constant value. Thus, these
5260 operands must match. */
5261 if (op0
!= XEXP (op1
, 0))
5264 /* Require index register (or constant). Let's just handle the
5265 register case in the meantime... If the target allows
5266 auto-modify by a constant then we could try replacing a pseudo
5267 register with its equivalent constant where applicable. */
5268 if (REG_P (XEXP (op1
, 1)))
5269 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5270 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5271 opnum
, type
, ind_levels
, insn
);
5273 if (REG_P (XEXP (op1
, 0)))
5275 int regno
= REGNO (XEXP (op1
, 0));
5278 /* A register that is incremented cannot be constant! */
5279 if (regno
>= FIRST_PSEUDO_REGISTER
5280 && reg_equiv_constant
[regno
] != 0)
5283 /* Handle a register that is equivalent to a memory location
5284 which cannot be addressed directly. */
5285 if (reg_equiv_memory_loc
[regno
] != 0
5286 && (reg_equiv_address
[regno
] != 0
5287 || num_not_at_initial_offset
))
5289 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5291 if (reg_equiv_address
[regno
]
5292 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5294 /* First reload the memory location's address.
5295 We can't use ADDR_TYPE (type) here, because we need to
5296 write back the value after reading it, hence we actually
5297 need two registers. */
5298 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5299 &XEXP (tem
, 0), opnum
,
5303 /* Then reload the memory location into a base
5305 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5306 &XEXP (op1
, 0), BASE_REG_CLASS
,
5307 GET_MODE (x
), GET_MODE (x
), 0,
5308 0, opnum
, RELOAD_OTHER
);
5310 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5315 if (reg_renumber
[regno
] >= 0)
5316 regno
= reg_renumber
[regno
];
5318 /* We require a base register here... */
5319 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5321 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5322 &XEXP (op1
, 0), &XEXP (x
, 0),
5324 GET_MODE (x
), GET_MODE (x
), 0, 0,
5325 opnum
, RELOAD_OTHER
);
5327 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5340 if (GET_CODE (XEXP (x
, 0)) == REG
)
5342 int regno
= REGNO (XEXP (x
, 0));
5346 /* A register that is incremented cannot be constant! */
5347 if (regno
>= FIRST_PSEUDO_REGISTER
5348 && reg_equiv_constant
[regno
] != 0)
5351 /* Handle a register that is equivalent to a memory location
5352 which cannot be addressed directly. */
5353 if (reg_equiv_memory_loc
[regno
] != 0
5354 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5356 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5357 if (reg_equiv_address
[regno
]
5358 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5360 /* First reload the memory location's address.
5361 We can't use ADDR_TYPE (type) here, because we need to
5362 write back the value after reading it, hence we actually
5363 need two registers. */
5364 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5365 &XEXP (tem
, 0), opnum
, type
,
5367 /* Put this inside a new increment-expression. */
5368 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5369 /* Proceed to reload that, as if it contained a register. */
5373 /* If we have a hard register that is ok as an index,
5374 don't make a reload. If an autoincrement of a nice register
5375 isn't "valid", it must be that no autoincrement is "valid".
5376 If that is true and something made an autoincrement anyway,
5377 this must be a special context where one is allowed.
5378 (For example, a "push" instruction.)
5379 We can't improve this address, so leave it alone. */
5381 /* Otherwise, reload the autoincrement into a suitable hard reg
5382 and record how much to increment by. */
5384 if (reg_renumber
[regno
] >= 0)
5385 regno
= reg_renumber
[regno
];
5386 if ((regno
>= FIRST_PSEUDO_REGISTER
5387 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5388 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5392 /* If we can output the register afterwards, do so, this
5393 saves the extra update.
5394 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5395 CALL_INSN - and it does not set CC0.
5396 But don't do this if we cannot directly address the
5397 memory location, since this will make it harder to
5398 reuse address reloads, and increases register pressure.
5399 Also don't do this if we can probably update x directly. */
5400 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5402 : reg_equiv_mem
[regno
]);
5403 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5404 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5405 && memory_operand (equiv
, GET_MODE (equiv
))
5407 && ! sets_cc0_p (PATTERN (insn
))
5409 && ! (icode
!= CODE_FOR_nothing
5410 && ((*insn_data
[icode
].operand
[0].predicate
)
5412 && ((*insn_data
[icode
].operand
[1].predicate
)
5415 /* We use the original pseudo for loc, so that
5416 emit_reload_insns() knows which pseudo this
5417 reload refers to and updates the pseudo rtx, not
5418 its equivalent memory location, as well as the
5419 corresponding entry in reg_last_reload_reg. */
5420 loc
= &XEXP (x_orig
, 0);
5423 = push_reload (x
, x
, loc
, loc
,
5424 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5425 GET_MODE (x
), GET_MODE (x
), 0, 0,
5426 opnum
, RELOAD_OTHER
);
5431 = push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5432 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5433 GET_MODE (x
), GET_MODE (x
), 0, 0,
5436 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5441 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5447 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5449 /* This is probably the result of a substitution, by eliminate_regs,
5450 of an equivalent address for a pseudo that was not allocated to a
5451 hard register. Verify that the specified address is valid and
5452 reload it into a register. */
5453 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5454 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5458 /* Since we know we are going to reload this item, don't decrement
5459 for the indirection level.
5461 Note that this is actually conservative: it would be slightly
5462 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5464 /* We can't use ADDR_TYPE (type) here, because we need to
5465 write back the value after reading it, hence we actually
5466 need two registers. */
5467 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5468 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5469 opnum
, type
, ind_levels
, insn
);
5471 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5472 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5473 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5475 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5477 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5479 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5486 /* This is probably the result of a substitution, by eliminate_regs, of
5487 an equivalent address for a pseudo that was not allocated to a hard
5488 register. Verify that the specified address is valid and reload it
5491 Since we know we are going to reload this item, don't decrement for
5492 the indirection level.
5494 Note that this is actually conservative: it would be slightly more
5495 efficient to use the value of SPILL_INDIRECT_LEVELS from
5498 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5499 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5500 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*)0,
5501 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5502 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5507 int regno
= REGNO (x
);
5509 if (reg_equiv_constant
[regno
] != 0)
5511 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5512 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5513 GET_MODE (x
), opnum
, type
, ind_levels
);
5517 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5518 that feeds this insn. */
5519 if (reg_equiv_mem
[regno
] != 0)
5521 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*)0,
5522 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5523 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5528 if (reg_equiv_memory_loc
[regno
]
5529 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5531 rtx tem
= make_memloc (x
, regno
);
5532 if (reg_equiv_address
[regno
] != 0
5533 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5536 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5537 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5542 if (reg_renumber
[regno
] >= 0)
5543 regno
= reg_renumber
[regno
];
5545 if ((regno
>= FIRST_PSEUDO_REGISTER
5546 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5547 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5549 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5550 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5551 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5555 /* If a register appearing in an address is the subject of a CLOBBER
5556 in this insn, reload it into some other register to be safe.
5557 The CLOBBER is supposed to make the register unavailable
5558 from before this insn to after it. */
5559 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5561 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5562 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5563 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5570 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5572 /* If this is a SUBREG of a hard register and the resulting register
5573 is of the wrong class, reload the whole SUBREG. This avoids
5574 needless copies if SUBREG_REG is multi-word. */
5575 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5577 int regno
= subreg_regno (x
);
5579 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5580 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5582 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5583 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5584 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5588 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5589 is larger than the class size, then reload the whole SUBREG. */
5592 enum reg_class
class = (context
? INDEX_REG_CLASS
5594 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5595 > reg_class_size
[class])
5597 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5599 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5600 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5612 const char *fmt
= GET_RTX_FORMAT (code
);
5615 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5618 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5619 opnum
, type
, ind_levels
, insn
);
5626 /* X, which is found at *LOC, is a part of an address that needs to be
5627 reloaded into a register of class CLASS. If X is a constant, or if
5628 X is a PLUS that contains a constant, check that the constant is a
5629 legitimate operand and that we are supposed to be able to load
5630 it into the register.
5632 If not, force the constant into memory and reload the MEM instead.
5634 MODE is the mode to use, in case X is an integer constant.
5636 OPNUM and TYPE describe the purpose of any reloads made.
5638 IND_LEVELS says how many levels of indirect addressing this machine
5642 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5645 enum reg_class
class;
5646 enum machine_mode mode
;
5648 enum reload_type type
;
5652 && (! LEGITIMATE_CONSTANT_P (x
)
5653 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5657 tem
= x
= force_const_mem (mode
, x
);
5658 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5659 opnum
, type
, ind_levels
, 0);
5662 else if (GET_CODE (x
) == PLUS
5663 && CONSTANT_P (XEXP (x
, 1))
5664 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5665 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5669 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5670 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5671 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5672 opnum
, type
, ind_levels
, 0);
5675 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5676 mode
, VOIDmode
, 0, 0, opnum
, type
);
5679 /* X, a subreg of a pseudo, is a part of an address that needs to be
5682 If the pseudo is equivalent to a memory location that cannot be directly
5683 addressed, make the necessary address reloads.
5685 If address reloads have been necessary, or if the address is changed
5686 by register elimination, return the rtx of the memory location;
5687 otherwise, return X.
5689 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5692 OPNUM and TYPE identify the purpose of the reload.
5694 IND_LEVELS says how many levels of indirect addressing are
5695 supported at this point in the address.
5697 INSN, if nonzero, is the insn in which we do the reload. It is used
5698 to determine where to put USEs for pseudos that we have to replace with
5702 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5707 enum reload_type type
;
5711 int regno
= REGNO (SUBREG_REG (x
));
5713 if (reg_equiv_memory_loc
[regno
])
5715 /* If the address is not directly addressable, or if the address is not
5716 offsettable, then it must be replaced. */
5718 && (reg_equiv_address
[regno
]
5719 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5722 if (force_replace
|| num_not_at_initial_offset
)
5724 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5726 /* If the address changes because of register elimination, then
5727 it must be replaced. */
5729 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5731 int offset
= SUBREG_BYTE (x
);
5732 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5733 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5735 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5736 PUT_MODE (tem
, GET_MODE (x
));
5738 /* If this was a paradoxical subreg that we replaced, the
5739 resulting memory must be sufficiently aligned to allow
5740 us to widen the mode of the memory. */
5741 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5745 base
= XEXP (tem
, 0);
5746 if (GET_CODE (base
) == PLUS
)
5748 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5749 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5751 base
= XEXP (base
, 0);
5753 if (GET_CODE (base
) != REG
5754 || (REGNO_POINTER_ALIGN (REGNO (base
))
5755 < outer_size
* BITS_PER_UNIT
))
5759 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5760 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5763 /* If this is not a toplevel operand, find_reloads doesn't see
5764 this substitution. We have to emit a USE of the pseudo so
5765 that delete_output_reload can see it. */
5766 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5767 /* We mark the USE with QImode so that we recognize it
5768 as one that can be safely deleted at the end of
5770 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5780 /* Substitute into the current INSN the registers into which we have reloaded
5781 the things that need reloading. The array `replacements'
5782 contains the locations of all pointers that must be changed
5783 and says what to replace them with.
5785 Return the rtx that X translates into; usually X, but modified. */
5788 subst_reloads (insn
)
5793 for (i
= 0; i
< n_replacements
; i
++)
5795 struct replacement
*r
= &replacements
[i
];
5796 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5799 #ifdef ENABLE_CHECKING
5800 /* Internal consistency test. Check that we don't modify
5801 anything in the equivalence arrays. Whenever something from
5802 those arrays needs to be reloaded, it must be unshared before
5803 being substituted into; the equivalence must not be modified.
5804 Otherwise, if the equivalence is used after that, it will
5805 have been modified, and the thing substituted (probably a
5806 register) is likely overwritten and not a usable equivalence. */
5809 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5811 #define CHECK_MODF(ARRAY) \
5812 if (ARRAY[check_regno] \
5813 && loc_mentioned_in_p (r->where, \
5814 ARRAY[check_regno])) \
5817 CHECK_MODF (reg_equiv_constant
);
5818 CHECK_MODF (reg_equiv_memory_loc
);
5819 CHECK_MODF (reg_equiv_address
);
5820 CHECK_MODF (reg_equiv_mem
);
5823 #endif /* ENABLE_CHECKING */
5825 /* If we're replacing a LABEL_REF with a register, add a
5826 REG_LABEL note to indicate to flow which label this
5827 register refers to. */
5828 if (GET_CODE (*r
->where
) == LABEL_REF
5829 && GET_CODE (insn
) == JUMP_INSN
)
5830 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5831 XEXP (*r
->where
, 0),
5834 /* Encapsulate RELOADREG so its machine mode matches what
5835 used to be there. Note that gen_lowpart_common will
5836 do the wrong thing if RELOADREG is multi-word. RELOADREG
5837 will always be a REG here. */
5838 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5839 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5841 /* If we are putting this into a SUBREG and RELOADREG is a
5842 SUBREG, we would be making nested SUBREGs, so we have to fix
5843 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5845 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5847 if (GET_MODE (*r
->subreg_loc
)
5848 == GET_MODE (SUBREG_REG (reloadreg
)))
5849 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5853 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5855 /* When working with SUBREGs the rule is that the byte
5856 offset must be a multiple of the SUBREG's mode. */
5857 final_offset
= (final_offset
/
5858 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5859 final_offset
= (final_offset
*
5860 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5862 *r
->where
= SUBREG_REG (reloadreg
);
5863 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5867 *r
->where
= reloadreg
;
5869 /* If reload got no reg and isn't optional, something's wrong. */
5870 else if (! rld
[r
->what
].optional
)
5875 /* Make a copy of any replacements being done into X and move those copies
5876 to locations in Y, a copy of X. We only look at the highest level of
5880 copy_replacements (x
, y
)
5885 enum rtx_code code
= GET_CODE (x
);
5886 const char *fmt
= GET_RTX_FORMAT (code
);
5887 struct replacement
*r
;
5889 /* We can't support X being a SUBREG because we might then need to know its
5890 location if something inside it was replaced. */
5894 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5896 for (j
= 0; j
< n_replacements
; j
++)
5898 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5900 r
= &replacements
[n_replacements
++];
5901 r
->where
= replacements
[j
].where
;
5902 r
->subreg_loc
= &XEXP (y
, i
);
5903 r
->what
= replacements
[j
].what
;
5904 r
->mode
= replacements
[j
].mode
;
5906 else if (replacements
[j
].where
== &XEXP (x
, i
))
5908 r
= &replacements
[n_replacements
++];
5909 r
->where
= &XEXP (y
, i
);
5911 r
->what
= replacements
[j
].what
;
5912 r
->mode
= replacements
[j
].mode
;
5917 /* Change any replacements being done to *X to be done to *Y */
5920 move_replacements (x
, y
)
5926 for (i
= 0; i
< n_replacements
; i
++)
5927 if (replacements
[i
].subreg_loc
== x
)
5928 replacements
[i
].subreg_loc
= y
;
5929 else if (replacements
[i
].where
== x
)
5931 replacements
[i
].where
= y
;
5932 replacements
[i
].subreg_loc
= 0;
5936 /* If LOC was scheduled to be replaced by something, return the replacement.
5937 Otherwise, return *LOC. */
5940 find_replacement (loc
)
5943 struct replacement
*r
;
5945 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5947 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5949 if (reloadreg
&& r
->where
== loc
)
5951 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5952 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5956 else if (reloadreg
&& r
->subreg_loc
== loc
)
5958 /* RELOADREG must be either a REG or a SUBREG.
5960 ??? Is it actually still ever a SUBREG? If so, why? */
5962 if (GET_CODE (reloadreg
) == REG
)
5963 return gen_rtx_REG (GET_MODE (*loc
),
5964 (REGNO (reloadreg
) +
5965 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
5966 GET_MODE (SUBREG_REG (*loc
)),
5969 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5973 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
5975 /* When working with SUBREGs the rule is that the byte
5976 offset must be a multiple of the SUBREG's mode. */
5977 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
5978 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
5979 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5985 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5986 what's inside and make a new rtl if so. */
5987 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5988 || GET_CODE (*loc
) == MULT
)
5990 rtx x
= find_replacement (&XEXP (*loc
, 0));
5991 rtx y
= find_replacement (&XEXP (*loc
, 1));
5993 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5994 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6000 /* Return nonzero if register in range [REGNO, ENDREGNO)
6001 appears either explicitly or implicitly in X
6002 other than being stored into (except for earlyclobber operands).
6004 References contained within the substructure at LOC do not count.
6005 LOC may be zero, meaning don't ignore anything.
6007 This is similar to refers_to_regno_p in rtlanal.c except that we
6008 look at equivalences for pseudos that didn't get hard registers. */
6011 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6012 unsigned int regno
, endregno
;
6025 code
= GET_CODE (x
);
6032 /* If this is a pseudo, a hard register must not have been allocated.
6033 X must therefore either be a constant or be in memory. */
6034 if (r
>= FIRST_PSEUDO_REGISTER
)
6036 if (reg_equiv_memory_loc
[r
])
6037 return refers_to_regno_for_reload_p (regno
, endregno
,
6038 reg_equiv_memory_loc
[r
],
6041 if (reg_equiv_constant
[r
])
6047 return (endregno
> r
6048 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6049 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6053 /* If this is a SUBREG of a hard reg, we can see exactly which
6054 registers are being modified. Otherwise, handle normally. */
6055 if (GET_CODE (SUBREG_REG (x
)) == REG
6056 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6058 unsigned int inner_regno
= subreg_regno (x
);
6059 unsigned int inner_endregno
6060 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6061 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6063 return endregno
> inner_regno
&& regno
< inner_endregno
;
6069 if (&SET_DEST (x
) != loc
6070 /* Note setting a SUBREG counts as referring to the REG it is in for
6071 a pseudo but not for hard registers since we can
6072 treat each word individually. */
6073 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6074 && loc
!= &SUBREG_REG (SET_DEST (x
))
6075 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6076 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6077 && refers_to_regno_for_reload_p (regno
, endregno
,
6078 SUBREG_REG (SET_DEST (x
)),
6080 /* If the output is an earlyclobber operand, this is
6082 || ((GET_CODE (SET_DEST (x
)) != REG
6083 || earlyclobber_operand_p (SET_DEST (x
)))
6084 && refers_to_regno_for_reload_p (regno
, endregno
,
6085 SET_DEST (x
), loc
))))
6088 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6097 /* X does not match, so try its subexpressions. */
6099 fmt
= GET_RTX_FORMAT (code
);
6100 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6102 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6110 if (refers_to_regno_for_reload_p (regno
, endregno
,
6114 else if (fmt
[i
] == 'E')
6117 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6118 if (loc
!= &XVECEXP (x
, i
, j
)
6119 && refers_to_regno_for_reload_p (regno
, endregno
,
6120 XVECEXP (x
, i
, j
), loc
))
6127 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6128 we check if any register number in X conflicts with the relevant register
6129 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6130 contains a MEM (we don't bother checking for memory addresses that can't
6131 conflict because we expect this to be a rare case.
6133 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6134 that we look at equivalences for pseudos that didn't get hard registers. */
6137 reg_overlap_mentioned_for_reload_p (x
, in
)
6140 int regno
, endregno
;
6142 /* Overly conservative. */
6143 if (GET_CODE (x
) == STRICT_LOW_PART
)
6146 /* If either argument is a constant, then modifying X can not affect IN. */
6147 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6149 else if (GET_CODE (x
) == SUBREG
)
6151 regno
= REGNO (SUBREG_REG (x
));
6152 if (regno
< FIRST_PSEUDO_REGISTER
)
6153 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6154 GET_MODE (SUBREG_REG (x
)),
6158 else if (GET_CODE (x
) == REG
)
6162 /* If this is a pseudo, it must not have been assigned a hard register.
6163 Therefore, it must either be in memory or be a constant. */
6165 if (regno
>= FIRST_PSEUDO_REGISTER
)
6167 if (reg_equiv_memory_loc
[regno
])
6168 return refers_to_mem_for_reload_p (in
);
6169 else if (reg_equiv_constant
[regno
])
6174 else if (GET_CODE (x
) == MEM
)
6175 return refers_to_mem_for_reload_p (in
);
6176 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6177 || GET_CODE (x
) == CC0
)
6178 return reg_mentioned_p (x
, in
);
6182 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6183 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6185 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*)0);
6188 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6192 refers_to_mem_for_reload_p (x
)
6198 if (GET_CODE (x
) == MEM
)
6201 if (GET_CODE (x
) == REG
)
6202 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6203 && reg_equiv_memory_loc
[REGNO (x
)]);
6205 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6206 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6208 && (GET_CODE (XEXP (x
, i
)) == MEM
6209 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6215 /* Check the insns before INSN to see if there is a suitable register
6216 containing the same value as GOAL.
6217 If OTHER is -1, look for a register in class CLASS.
6218 Otherwise, just see if register number OTHER shares GOAL's value.
6220 Return an rtx for the register found, or zero if none is found.
6222 If RELOAD_REG_P is (short *)1,
6223 we reject any hard reg that appears in reload_reg_rtx
6224 because such a hard reg is also needed coming into this insn.
6226 If RELOAD_REG_P is any other nonzero value,
6227 it is a vector indexed by hard reg number
6228 and we reject any hard reg whose element in the vector is nonnegative
6229 as well as any that appears in reload_reg_rtx.
6231 If GOAL is zero, then GOALREG is a register number; we look
6232 for an equivalent for that register.
6234 MODE is the machine mode of the value we want an equivalence for.
6235 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6237 This function is used by jump.c as well as in the reload pass.
6239 If GOAL is the sum of the stack pointer and a constant, we treat it
6240 as if it were a constant except that sp is required to be unchanging. */
6243 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6246 enum reg_class
class;
6248 short *reload_reg_p
;
6250 enum machine_mode mode
;
6253 rtx goaltry
, valtry
, value
, where
;
6259 int goal_mem_addr_varies
= 0;
6260 int need_stable_sp
= 0;
6266 else if (GET_CODE (goal
) == REG
)
6267 regno
= REGNO (goal
);
6268 else if (GET_CODE (goal
) == MEM
)
6270 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6271 if (MEM_VOLATILE_P (goal
))
6273 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6275 /* An address with side effects must be reexecuted. */
6290 else if (CONSTANT_P (goal
))
6292 else if (GET_CODE (goal
) == PLUS
6293 && XEXP (goal
, 0) == stack_pointer_rtx
6294 && CONSTANT_P (XEXP (goal
, 1)))
6295 goal_const
= need_stable_sp
= 1;
6296 else if (GET_CODE (goal
) == PLUS
6297 && XEXP (goal
, 0) == frame_pointer_rtx
6298 && CONSTANT_P (XEXP (goal
, 1)))
6303 /* Scan insns back from INSN, looking for one that copies
6304 a value into or out of GOAL.
6305 Stop and give up if we reach a label. */
6310 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6313 if (GET_CODE (p
) == INSN
6314 /* If we don't want spill regs ... */
6315 && (! (reload_reg_p
!= 0
6316 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6317 /* ... then ignore insns introduced by reload; they aren't
6318 useful and can cause results in reload_as_needed to be
6319 different from what they were when calculating the need for
6320 spills. If we notice an input-reload insn here, we will
6321 reject it below, but it might hide a usable equivalent.
6322 That makes bad code. It may even abort: perhaps no reg was
6323 spilled for this insn because it was assumed we would find
6325 || INSN_UID (p
) < reload_first_uid
))
6328 pat
= single_set (p
);
6330 /* First check for something that sets some reg equal to GOAL. */
6333 && true_regnum (SET_SRC (pat
)) == regno
6334 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6337 && true_regnum (SET_DEST (pat
)) == regno
6338 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6340 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6341 /* When looking for stack pointer + const,
6342 make sure we don't use a stack adjust. */
6343 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6344 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6346 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6347 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6349 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6350 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6351 /* If we are looking for a constant,
6352 and something equivalent to that constant was copied
6353 into a reg, we can use that reg. */
6354 || (goal_const
&& REG_NOTES (p
) != 0
6355 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6356 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6358 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6359 || (GET_CODE (SET_DEST (pat
)) == REG
6360 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6361 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6363 && GET_CODE (goal
) == CONST_INT
6365 = operand_subword (XEXP (tem
, 0), 0, 0,
6367 && rtx_equal_p (goal
, goaltry
)
6369 = operand_subword (SET_DEST (pat
), 0, 0,
6371 && (valueno
= true_regnum (valtry
)) >= 0)))
6372 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6374 && GET_CODE (SET_DEST (pat
)) == REG
6375 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6376 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6378 && GET_CODE (goal
) == CONST_INT
6379 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6381 && rtx_equal_p (goal
, goaltry
)
6383 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6384 && (valueno
= true_regnum (valtry
)) >= 0)))
6388 if (valueno
!= other
)
6391 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6397 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6398 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6411 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6412 (or copying VALUE into GOAL, if GOAL is also a register).
6413 Now verify that VALUE is really valid. */
6415 /* VALUENO is the register number of VALUE; a hard register. */
6417 /* Don't try to re-use something that is killed in this insn. We want
6418 to be able to trust REG_UNUSED notes. */
6419 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6422 /* If we propose to get the value from the stack pointer or if GOAL is
6423 a MEM based on the stack pointer, we need a stable SP. */
6424 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6425 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6429 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6430 if (GET_MODE (value
) != mode
)
6433 /* Reject VALUE if it was loaded from GOAL
6434 and is also a register that appears in the address of GOAL. */
6436 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6437 && refers_to_regno_for_reload_p (valueno
,
6439 + HARD_REGNO_NREGS (valueno
, mode
)),
6443 /* Reject registers that overlap GOAL. */
6445 if (!goal_mem
&& !goal_const
6446 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6447 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6450 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6451 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6453 /* Reject VALUE if it is one of the regs reserved for reloads.
6454 Reload1 knows how to reuse them anyway, and it would get
6455 confused if we allocated one without its knowledge.
6456 (Now that insns introduced by reload are ignored above,
6457 this case shouldn't happen, but I'm not positive.) */
6459 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6462 for (i
= 0; i
< valuenregs
; ++i
)
6463 if (reload_reg_p
[valueno
+ i
] >= 0)
6467 /* Reject VALUE if it is a register being used for an input reload
6468 even if it is not one of those reserved. */
6470 if (reload_reg_p
!= 0)
6473 for (i
= 0; i
< n_reloads
; i
++)
6474 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6476 int regno1
= REGNO (rld
[i
].reg_rtx
);
6477 int nregs1
= HARD_REGNO_NREGS (regno1
,
6478 GET_MODE (rld
[i
].reg_rtx
));
6479 if (regno1
< valueno
+ valuenregs
6480 && regno1
+ nregs1
> valueno
)
6486 /* We must treat frame pointer as varying here,
6487 since it can vary--in a nonlocal goto as generated by expand_goto. */
6488 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6490 /* Now verify that the values of GOAL and VALUE remain unaltered
6491 until INSN is reached. */
6500 /* Don't trust the conversion past a function call
6501 if either of the two is in a call-clobbered register, or memory. */
6502 if (GET_CODE (p
) == CALL_INSN
)
6506 if (goal_mem
|| need_stable_sp
)
6509 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6510 for (i
= 0; i
< nregs
; ++i
)
6511 if (call_used_regs
[regno
+ i
])
6514 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6515 for (i
= 0; i
< valuenregs
; ++i
)
6516 if (call_used_regs
[valueno
+ i
])
6518 #ifdef NON_SAVING_SETJMP
6519 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6528 /* Watch out for unspec_volatile, and volatile asms. */
6529 if (volatile_insn_p (pat
))
6532 /* If this insn P stores in either GOAL or VALUE, return 0.
6533 If GOAL is a memory ref and this insn writes memory, return 0.
6534 If GOAL is a memory ref and its address is not constant,
6535 and this insn P changes a register used in GOAL, return 0. */
6537 if (GET_CODE (pat
) == COND_EXEC
)
6538 pat
= COND_EXEC_CODE (pat
);
6539 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6541 rtx dest
= SET_DEST (pat
);
6542 while (GET_CODE (dest
) == SUBREG
6543 || GET_CODE (dest
) == ZERO_EXTRACT
6544 || GET_CODE (dest
) == SIGN_EXTRACT
6545 || GET_CODE (dest
) == STRICT_LOW_PART
)
6546 dest
= XEXP (dest
, 0);
6547 if (GET_CODE (dest
) == REG
)
6549 int xregno
= REGNO (dest
);
6551 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6552 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6555 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6557 if (xregno
< valueno
+ valuenregs
6558 && xregno
+ xnregs
> valueno
)
6560 if (goal_mem_addr_varies
6561 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6563 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6566 else if (goal_mem
&& GET_CODE (dest
) == MEM
6567 && ! push_operand (dest
, GET_MODE (dest
)))
6569 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6570 && reg_equiv_memory_loc
[regno
] != 0)
6572 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6575 else if (GET_CODE (pat
) == PARALLEL
)
6578 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6580 rtx v1
= XVECEXP (pat
, 0, i
);
6581 if (GET_CODE (v1
) == COND_EXEC
)
6582 v1
= COND_EXEC_CODE (v1
);
6583 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6585 rtx dest
= SET_DEST (v1
);
6586 while (GET_CODE (dest
) == SUBREG
6587 || GET_CODE (dest
) == ZERO_EXTRACT
6588 || GET_CODE (dest
) == SIGN_EXTRACT
6589 || GET_CODE (dest
) == STRICT_LOW_PART
)
6590 dest
= XEXP (dest
, 0);
6591 if (GET_CODE (dest
) == REG
)
6593 int xregno
= REGNO (dest
);
6595 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6596 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6599 if (xregno
< regno
+ nregs
6600 && xregno
+ xnregs
> regno
)
6602 if (xregno
< valueno
+ valuenregs
6603 && xregno
+ xnregs
> valueno
)
6605 if (goal_mem_addr_varies
6606 && reg_overlap_mentioned_for_reload_p (dest
,
6609 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6612 else if (goal_mem
&& GET_CODE (dest
) == MEM
6613 && ! push_operand (dest
, GET_MODE (dest
)))
6615 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6616 && reg_equiv_memory_loc
[regno
] != 0)
6618 else if (need_stable_sp
6619 && push_operand (dest
, GET_MODE (dest
)))
6625 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6629 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6630 link
= XEXP (link
, 1))
6632 pat
= XEXP (link
, 0);
6633 if (GET_CODE (pat
) == CLOBBER
)
6635 rtx dest
= SET_DEST (pat
);
6637 if (GET_CODE (dest
) == REG
)
6639 int xregno
= REGNO (dest
);
6641 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6643 if (xregno
< regno
+ nregs
6644 && xregno
+ xnregs
> regno
)
6646 else if (xregno
< valueno
+ valuenregs
6647 && xregno
+ xnregs
> valueno
)
6649 else if (goal_mem_addr_varies
6650 && reg_overlap_mentioned_for_reload_p (dest
,
6655 else if (goal_mem
&& GET_CODE (dest
) == MEM
6656 && ! push_operand (dest
, GET_MODE (dest
)))
6658 else if (need_stable_sp
6659 && push_operand (dest
, GET_MODE (dest
)))
6666 /* If this insn auto-increments or auto-decrements
6667 either regno or valueno, return 0 now.
6668 If GOAL is a memory ref and its address is not constant,
6669 and this insn P increments a register used in GOAL, return 0. */
6673 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6674 if (REG_NOTE_KIND (link
) == REG_INC
6675 && GET_CODE (XEXP (link
, 0)) == REG
)
6677 int incno
= REGNO (XEXP (link
, 0));
6678 if (incno
< regno
+ nregs
&& incno
>= regno
)
6680 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6682 if (goal_mem_addr_varies
6683 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6693 /* Find a place where INCED appears in an increment or decrement operator
6694 within X, and return the amount INCED is incremented or decremented by.
6695 The value is always positive. */
6698 find_inc_amount (x
, inced
)
6701 enum rtx_code code
= GET_CODE (x
);
6707 rtx addr
= XEXP (x
, 0);
6708 if ((GET_CODE (addr
) == PRE_DEC
6709 || GET_CODE (addr
) == POST_DEC
6710 || GET_CODE (addr
) == PRE_INC
6711 || GET_CODE (addr
) == POST_INC
)
6712 && XEXP (addr
, 0) == inced
)
6713 return GET_MODE_SIZE (GET_MODE (x
));
6714 else if ((GET_CODE (addr
) == PRE_MODIFY
6715 || GET_CODE (addr
) == POST_MODIFY
)
6716 && GET_CODE (XEXP (addr
, 1)) == PLUS
6717 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6718 && XEXP (addr
, 0) == inced
6719 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6721 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6722 return i
< 0 ? -i
: i
;
6726 fmt
= GET_RTX_FORMAT (code
);
6727 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6731 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6738 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6740 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6750 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6751 If SETS is nonzero, also consider SETs. */
6754 regno_clobbered_p (regno
, insn
, mode
, sets
)
6757 enum machine_mode mode
;
6760 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6761 unsigned int endregno
= regno
+ nregs
;
6763 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6764 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6765 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6767 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6769 return test
>= regno
&& test
< endregno
;
6772 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6774 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6778 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6779 if ((GET_CODE (elt
) == CLOBBER
6780 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6781 && GET_CODE (XEXP (elt
, 0)) == REG
)
6783 unsigned int test
= REGNO (XEXP (elt
, 0));
6785 if (test
>= regno
&& test
< endregno
)
6794 static const char *const reload_when_needed_name
[] =
6797 "RELOAD_FOR_OUTPUT",
6799 "RELOAD_FOR_INPUT_ADDRESS",
6800 "RELOAD_FOR_INPADDR_ADDRESS",
6801 "RELOAD_FOR_OUTPUT_ADDRESS",
6802 "RELOAD_FOR_OUTADDR_ADDRESS",
6803 "RELOAD_FOR_OPERAND_ADDRESS",
6804 "RELOAD_FOR_OPADDR_ADDR",
6806 "RELOAD_FOR_OTHER_ADDRESS"
6809 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6811 /* These functions are used to print the variables set by 'find_reloads' */
6814 debug_reload_to_stream (f
)
6822 for (r
= 0; r
< n_reloads
; r
++)
6824 fprintf (f
, "Reload %d: ", r
);
6828 fprintf (f
, "reload_in (%s) = ",
6829 GET_MODE_NAME (rld
[r
].inmode
));
6830 print_inline_rtx (f
, rld
[r
].in
, 24);
6831 fprintf (f
, "\n\t");
6834 if (rld
[r
].out
!= 0)
6836 fprintf (f
, "reload_out (%s) = ",
6837 GET_MODE_NAME (rld
[r
].outmode
));
6838 print_inline_rtx (f
, rld
[r
].out
, 24);
6839 fprintf (f
, "\n\t");
6842 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6844 fprintf (f
, "%s (opnum = %d)",
6845 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6848 if (rld
[r
].optional
)
6849 fprintf (f
, ", optional");
6851 if (rld
[r
].nongroup
)
6852 fprintf (f
, ", nongroup");
6854 if (rld
[r
].inc
!= 0)
6855 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6857 if (rld
[r
].nocombine
)
6858 fprintf (f
, ", can't combine");
6860 if (rld
[r
].secondary_p
)
6861 fprintf (f
, ", secondary_reload_p");
6863 if (rld
[r
].in_reg
!= 0)
6865 fprintf (f
, "\n\treload_in_reg: ");
6866 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6869 if (rld
[r
].out_reg
!= 0)
6871 fprintf (f
, "\n\treload_out_reg: ");
6872 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6875 if (rld
[r
].reg_rtx
!= 0)
6877 fprintf (f
, "\n\treload_reg_rtx: ");
6878 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6882 if (rld
[r
].secondary_in_reload
!= -1)
6884 fprintf (f
, "%ssecondary_in_reload = %d",
6885 prefix
, rld
[r
].secondary_in_reload
);
6889 if (rld
[r
].secondary_out_reload
!= -1)
6890 fprintf (f
, "%ssecondary_out_reload = %d\n",
6891 prefix
, rld
[r
].secondary_out_reload
);
6894 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6896 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6897 insn_data
[rld
[r
].secondary_in_icode
].name
);
6901 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6902 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6903 insn_data
[rld
[r
].secondary_out_icode
].name
);
6912 debug_reload_to_stream (stderr
);