1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
50 #include "insn-config.h"
56 #include "bc-opcode.h"
57 #include "bc-typecd.h"
65 #ifdef BCDEBUG_PRINT_CODE
68 #include "bc-opname.h"
75 /* Commonly used modes. */
77 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
78 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
79 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
81 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
82 After rtl generation, it is 1 plus the largest register number used. */
84 int reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static int label_num
= 1;
91 /* Lowest label number in current function. */
93 static int first_label_num
;
95 /* Highest label number in current function.
96 Zero means use the value of label_num instead.
97 This is nonzero only when belatedly compiling an inline function. */
99 static int last_label_num
;
101 /* Value label_num had when set_new_first_and_last_label_number was called.
102 If label_num has not changed since then, last_label_num is valid. */
104 static int base_label_num
;
106 /* Nonzero means do not generate NOTEs for source line numbers. */
108 static int no_line_numbers
;
110 /* Commonly used rtx's, so that we only need space for one copy.
111 These are initialized once for the entire compilation.
112 All of these except perhaps the floating-point CONST_DOUBLEs
113 are unique; no other rtx-object will be equal to any of these. */
115 rtx pc_rtx
; /* (PC) */
116 rtx cc0_rtx
; /* (CC0) */
117 rtx cc1_rtx
; /* (CC1) (not actually used nowadays) */
118 rtx const0_rtx
; /* (CONST_INT 0) */
119 rtx const1_rtx
; /* (CONST_INT 1) */
120 rtx const2_rtx
; /* (CONST_INT 2) */
121 rtx constm1_rtx
; /* (CONST_INT -1) */
122 rtx const_true_rtx
; /* (CONST_INT STORE_FLAG_VALUE) */
124 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
125 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
126 record a copy of const[012]_rtx. */
128 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
130 REAL_VALUE_TYPE dconst0
;
131 REAL_VALUE_TYPE dconst1
;
132 REAL_VALUE_TYPE dconst2
;
133 REAL_VALUE_TYPE dconstm1
;
135 /* All references to the following fixed hard registers go through
136 these unique rtl objects. On machines where the frame-pointer and
137 arg-pointer are the same register, they use the same unique object.
139 After register allocation, other rtl objects which used to be pseudo-regs
140 may be clobbered to refer to the frame-pointer register.
141 But references that were originally to the frame-pointer can be
142 distinguished from the others because they contain frame_pointer_rtx.
144 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
145 tricky: until register elimination has taken place hard_frame_pointer_rtx
146 should be used if it is being set, and frame_pointer_rtx otherwise. After
147 register elimination hard_frame_pointer_rtx should always be used.
148 On machines where the two registers are same (most) then these are the
151 In an inline procedure, the stack and frame pointer rtxs may not be
152 used for anything else. */
153 rtx stack_pointer_rtx
; /* (REG:Pmode STACK_POINTER_REGNUM) */
154 rtx frame_pointer_rtx
; /* (REG:Pmode FRAME_POINTER_REGNUM) */
155 rtx hard_frame_pointer_rtx
; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */
156 rtx arg_pointer_rtx
; /* (REG:Pmode ARG_POINTER_REGNUM) */
157 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
158 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
159 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
160 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
161 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
163 /* This is used to implement __builtin_return_address for some machines.
164 See for instance the MIPS port. */
165 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
167 rtx virtual_incoming_args_rtx
; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
168 rtx virtual_stack_vars_rtx
; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
169 rtx virtual_stack_dynamic_rtx
; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
170 rtx virtual_outgoing_args_rtx
; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
172 /* We make one copy of (const_int C) where C is in
173 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
174 to save space during the compilation and simplify comparisons of
177 #define MAX_SAVED_CONST_INT 64
179 static rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
181 /* The ends of the doubly-linked chain of rtl for the current function.
182 Both are reset to null at the start of rtl generation for the function.
184 start_sequence saves both of these on `sequence_stack' along with
185 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
187 static rtx first_insn
= NULL
;
188 static rtx last_insn
= NULL
;
190 /* RTL_EXPR within which the current sequence will be placed. Use to
191 prevent reuse of any temporaries within the sequence until after the
192 RTL_EXPR is emitted. */
194 tree sequence_rtl_expr
= NULL
;
196 /* INSN_UID for next insn emitted.
197 Reset to 1 for each function compiled. */
199 static int cur_insn_uid
= 1;
201 /* Line number and source file of the last line-number NOTE emitted.
202 This is used to avoid generating duplicates. */
204 static int last_linenum
= 0;
205 static char *last_filename
= 0;
207 /* A vector indexed by pseudo reg number. The allocated length
208 of this vector is regno_pointer_flag_length. Since this
209 vector is needed during the expansion phase when the total
210 number of registers in the function is not yet known,
211 it is copied and made bigger when necessary. */
213 char *regno_pointer_flag
;
214 int regno_pointer_flag_length
;
216 /* Indexed by pseudo register number, if nonzero gives the known alignment
217 for that pseudo (if regno_pointer_flag is set).
218 Allocated in parallel with regno_pointer_flag. */
219 char *regno_pointer_align
;
221 /* Indexed by pseudo register number, gives the rtx for that pseudo.
222 Allocated in parallel with regno_pointer_flag. */
226 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
227 Each element describes one pending sequence.
228 The main insn-chain is saved in the last element of the chain,
229 unless the chain is empty. */
231 struct sequence_stack
*sequence_stack
;
233 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
234 shortly thrown away. We use two mechanisms to prevent this waste:
236 First, we keep a list of the expressions used to represent the sequence
237 stack in sequence_element_free_list.
239 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
240 rtvec for use by gen_sequence. One entry for each size is sufficient
241 because most cases are calls to gen_sequence followed by immediately
242 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
243 destructive on the insn in it anyway and hence can't be redone.
245 We do not bother to save this cached data over nested function calls.
246 Instead, we just reinitialize them. */
248 #define SEQUENCE_RESULT_SIZE 5
250 static struct sequence_stack
*sequence_element_free_list
;
251 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
253 /* During RTL generation, we also keep a list of free INSN rtl codes. */
254 static rtx free_insn
;
256 extern int rtx_equal_function_value_matters
;
258 /* Filename and line number of last line-number note,
259 whether we actually emitted it or not. */
260 extern char *emit_filename
;
261 extern int emit_lineno
;
263 rtx
change_address ();
266 extern struct obstack
*rtl_obstack
;
268 extern int stack_depth
;
269 extern int max_stack_depth
;
271 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
273 ** This routine generates an RTX of the size specified by
274 ** <code>, which is an RTX code. The RTX structure is initialized
275 ** from the arguments <element1> through <elementn>, which are
276 ** interpreted according to the specific RTX type's format. The
277 ** special machine mode associated with the rtx (if any) is specified
280 ** gen_rtx can be invoked in a way which resembles the lisp-like
281 ** rtx it will generate. For example, the following rtx structure:
283 ** (plus:QI (mem:QI (reg:SI 1))
284 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
286 ** ...would be generated by the following C code:
288 ** gen_rtx (PLUS, QImode,
289 ** gen_rtx (MEM, QImode,
290 ** gen_rtx (REG, SImode, 1)),
291 ** gen_rtx (MEM, QImode,
292 ** gen_rtx (PLUS, SImode,
293 ** gen_rtx (REG, SImode, 2),
294 ** gen_rtx (REG, SImode, 3)))),
299 gen_rtx
VPROTO((enum rtx_code code
, enum machine_mode mode
, ...))
303 enum machine_mode mode
;
306 register int i
; /* Array indices... */
307 register char *fmt
; /* Current rtx's format... */
308 register rtx rt_val
; /* RTX to return to caller... */
313 code
= va_arg (p
, enum rtx_code
);
314 mode
= va_arg (p
, enum machine_mode
);
317 if (code
== CONST_INT
)
319 HOST_WIDE_INT arg
= va_arg (p
, HOST_WIDE_INT
);
321 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
322 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
324 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
325 return const_true_rtx
;
327 rt_val
= rtx_alloc (code
);
328 INTVAL (rt_val
) = arg
;
330 else if (code
== REG
)
332 int regno
= va_arg (p
, int);
334 /* In case the MD file explicitly references the frame pointer, have
335 all such references point to the same frame pointer. This is used
336 during frame pointer elimination to distinguish the explicit
337 references to these registers from pseudos that happened to be
340 If we have eliminated the frame pointer or arg pointer, we will
341 be using it as a normal register, for example as a spill register.
342 In such cases, we might be accessing it in a mode that is not
343 Pmode and therefore cannot use the pre-allocated rtx.
345 Also don't do this when we are making new REGs in reload,
346 since we don't want to get confused with the real pointers. */
348 if (frame_pointer_rtx
&& regno
== FRAME_POINTER_REGNUM
&& mode
== Pmode
349 && ! reload_in_progress
)
350 return frame_pointer_rtx
;
351 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
352 if (hard_frame_pointer_rtx
&& regno
== HARD_FRAME_POINTER_REGNUM
353 && mode
== Pmode
&& ! reload_in_progress
)
354 return hard_frame_pointer_rtx
;
356 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
357 if (arg_pointer_rtx
&& regno
== ARG_POINTER_REGNUM
&& mode
== Pmode
358 && ! reload_in_progress
)
359 return arg_pointer_rtx
;
361 #ifdef RETURN_ADDRESS_POINTER_REGNUM
362 if (return_address_pointer_rtx
&& regno
== RETURN_ADDRESS_POINTER_REGNUM
363 && mode
== Pmode
&& ! reload_in_progress
)
364 return return_address_pointer_rtx
;
366 if (stack_pointer_rtx
&& regno
== STACK_POINTER_REGNUM
&& mode
== Pmode
367 && ! reload_in_progress
)
368 return stack_pointer_rtx
;
371 rt_val
= rtx_alloc (code
);
373 REGNO (rt_val
) = regno
;
379 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
380 rt_val
->mode
= mode
; /* Store the machine mode... */
382 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
383 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
387 case '0': /* Unused field. */
390 case 'i': /* An integer? */
391 XINT (rt_val
, i
) = va_arg (p
, int);
394 case 'w': /* A wide integer? */
395 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
398 case 's': /* A string? */
399 XSTR (rt_val
, i
) = va_arg (p
, char *);
402 case 'e': /* An expression? */
403 case 'u': /* An insn? Same except when printing. */
404 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
407 case 'E': /* An RTX vector? */
408 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
417 return rt_val
; /* Return the new RTX... */
420 /* gen_rtvec (n, [rt1, ..., rtn])
422 ** This routine creates an rtvec and stores within it the
423 ** pointers to rtx's which are its arguments.
428 gen_rtvec
VPROTO((int n
, ...))
444 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
446 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
448 for (i
= 0; i
< n
; i
++)
449 vector
[i
] = va_arg (p
, rtx
);
452 return gen_rtvec_v (n
, vector
);
456 gen_rtvec_v (n
, argp
)
461 register rtvec rt_val
;
464 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
466 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
468 for (i
= 0; i
< n
; i
++)
469 rt_val
->elem
[i
].rtx
= *argp
++;
474 /* Generate a REG rtx for a new pseudo register of mode MODE.
475 This pseudo is assigned the next sequential register number. */
479 enum machine_mode mode
;
483 /* Don't let anything called by or after reload create new registers
484 (actually, registers can't be created after flow, but this is a good
487 if (reload_in_progress
|| reload_completed
)
490 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
491 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
)
493 /* For complex modes, don't make a single pseudo.
494 Instead, make a CONCAT of two pseudos.
495 This allows noncontiguous allocation of the real and imaginary parts,
496 which makes much better code. Besides, allocating DCmode
497 pseudos overstrains reload on some machines like the 386. */
498 rtx realpart
, imagpart
;
499 int size
= GET_MODE_UNIT_SIZE (mode
);
500 enum machine_mode partmode
501 = mode_for_size (size
* BITS_PER_UNIT
,
502 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
503 ? MODE_FLOAT
: MODE_INT
),
506 realpart
= gen_reg_rtx (partmode
);
507 imagpart
= gen_reg_rtx (partmode
);
508 return gen_rtx (CONCAT
, mode
, realpart
, imagpart
);
511 /* Make sure regno_pointer_flag and regno_reg_rtx are large
512 enough to have an element for this pseudo reg number. */
514 if (reg_rtx_no
== regno_pointer_flag_length
)
518 (char *) savealloc (regno_pointer_flag_length
* 2);
519 bcopy (regno_pointer_flag
, new, regno_pointer_flag_length
);
520 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
521 regno_pointer_flag
= new;
523 new = (char *) savealloc (regno_pointer_flag_length
* 2);
524 bcopy (regno_pointer_align
, new, regno_pointer_flag_length
);
525 bzero (&new[regno_pointer_flag_length
], regno_pointer_flag_length
);
526 regno_pointer_align
= new;
528 new1
= (rtx
*) savealloc (regno_pointer_flag_length
* 2 * sizeof (rtx
));
529 bcopy ((char *) regno_reg_rtx
, (char *) new1
,
530 regno_pointer_flag_length
* sizeof (rtx
));
531 bzero ((char *) &new1
[regno_pointer_flag_length
],
532 regno_pointer_flag_length
* sizeof (rtx
));
533 regno_reg_rtx
= new1
;
535 regno_pointer_flag_length
*= 2;
538 val
= gen_rtx (REG
, mode
, reg_rtx_no
);
539 regno_reg_rtx
[reg_rtx_no
++] = val
;
543 /* Identify REG (which may be a CONCAT) as a user register. */
549 if (GET_CODE (reg
) == CONCAT
)
551 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
552 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
554 else if (GET_CODE (reg
) == REG
)
555 REG_USERVAR_P (reg
) = 1;
560 /* Identify REG as a probable pointer register and show its alignment
561 as ALIGN, if nonzero. */
564 mark_reg_pointer (reg
, align
)
568 REGNO_POINTER_FLAG (REGNO (reg
)) = 1;
571 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
574 /* Return 1 plus largest pseudo reg number used in the current function. */
582 /* Return 1 + the largest label number used so far in the current function. */
587 if (last_label_num
&& label_num
== base_label_num
)
588 return last_label_num
;
592 /* Return first label number used in this function (if any were used). */
595 get_first_label_num ()
597 return first_label_num
;
600 /* Return a value representing some low-order bits of X, where the number
601 of low-order bits is given by MODE. Note that no conversion is done
602 between floating-point and fixed-point values, rather, the bit
603 representation is returned.
605 This function handles the cases in common between gen_lowpart, below,
606 and two variants in cse.c and combine.c. These are the cases that can
607 be safely handled at all points in the compilation.
609 If this is not a case we can handle, return 0. */
612 gen_lowpart_common (mode
, x
)
613 enum machine_mode mode
;
618 if (GET_MODE (x
) == mode
)
621 /* MODE must occupy no more words than the mode of X. */
622 if (GET_MODE (x
) != VOIDmode
623 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
624 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
628 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
629 word
= ((GET_MODE_SIZE (GET_MODE (x
))
630 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
633 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
634 && (GET_MODE_CLASS (mode
) == MODE_INT
635 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
637 /* If we are getting the low-order part of something that has been
638 sign- or zero-extended, we can either just use the object being
639 extended or make a narrower extension. If we want an even smaller
640 piece than the size of the object being extended, call ourselves
643 This case is used mostly by combine and cse. */
645 if (GET_MODE (XEXP (x
, 0)) == mode
)
647 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
648 return gen_lowpart_common (mode
, XEXP (x
, 0));
649 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
650 return gen_rtx (GET_CODE (x
), mode
, XEXP (x
, 0));
652 else if (GET_CODE (x
) == SUBREG
653 && (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
654 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
655 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
657 : gen_rtx (SUBREG
, mode
, SUBREG_REG (x
), SUBREG_WORD (x
)));
658 else if (GET_CODE (x
) == REG
)
660 /* If the register is not valid for MODE, return 0. If we don't
661 do this, there is no way to fix up the resulting REG later.
662 But we do do this if the current REG is not valid for its
663 mode. This latter is a kludge, but is required due to the
664 way that parameters are passed on some machines, most
666 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
667 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
668 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
670 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
671 /* integrate.c can't handle parts of a return value register. */
672 && (! REG_FUNCTION_VALUE_P (x
)
673 || ! rtx_equal_function_value_matters
)
674 /* We want to keep the stack, frame, and arg pointers
676 && x
!= frame_pointer_rtx
677 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
678 && x
!= arg_pointer_rtx
680 && x
!= stack_pointer_rtx
)
681 return gen_rtx (REG
, mode
, REGNO (x
) + word
);
683 return gen_rtx (SUBREG
, mode
, x
, word
);
685 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
686 from the low-order part of the constant. */
687 else if ((GET_MODE_CLASS (mode
) == MODE_INT
688 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
689 && GET_MODE (x
) == VOIDmode
690 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
692 /* If MODE is twice the host word size, X is already the desired
693 representation. Otherwise, if MODE is wider than a word, we can't
694 do this. If MODE is exactly a word, return just one CONST_INT.
695 If MODE is smaller than a word, clear the bits that don't belong
696 in our mode, unless they and our sign bit are all one. So we get
697 either a reasonable negative value or a reasonable unsigned value
700 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
702 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
704 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
705 return (GET_CODE (x
) == CONST_INT
? x
706 : GEN_INT (CONST_DOUBLE_LOW (x
)));
709 /* MODE must be narrower than HOST_BITS_PER_INT. */
710 int width
= GET_MODE_BITSIZE (mode
);
711 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
712 : CONST_DOUBLE_LOW (x
));
714 if (((val
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
715 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
716 val
&= ((HOST_WIDE_INT
) 1 << width
) - 1;
718 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
723 /* If X is an integral constant but we want it in floating-point, it
724 must be the case that we have a union of an integer and a floating-point
725 value. If the machine-parameters allow it, simulate that union here
726 and return the result. The two-word and single-word cases are
729 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
730 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
731 || flag_pretend_float
)
732 && GET_MODE_CLASS (mode
) == MODE_FLOAT
733 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
734 && GET_CODE (x
) == CONST_INT
735 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
736 #ifdef REAL_ARITHMETIC
742 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
743 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
747 union {HOST_WIDE_INT i
; float d
; } u
;
750 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
753 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
754 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
755 || flag_pretend_float
)
756 && GET_MODE_CLASS (mode
) == MODE_FLOAT
757 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
758 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
759 && GET_MODE (x
) == VOIDmode
760 && (sizeof (double) * HOST_BITS_PER_CHAR
761 == 2 * HOST_BITS_PER_WIDE_INT
))
762 #ifdef REAL_ARITHMETIC
766 HOST_WIDE_INT low
, high
;
768 if (GET_CODE (x
) == CONST_INT
)
769 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
771 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
773 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
775 if (WORDS_BIG_ENDIAN
)
776 i
[0] = high
, i
[1] = low
;
778 i
[0] = low
, i
[1] = high
;
780 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
781 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
785 union {HOST_WIDE_INT i
[2]; double d
; } u
;
786 HOST_WIDE_INT low
, high
;
788 if (GET_CODE (x
) == CONST_INT
)
789 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
791 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
793 #ifdef HOST_WORDS_BIG_ENDIAN
794 u
.i
[0] = high
, u
.i
[1] = low
;
796 u
.i
[0] = low
, u
.i
[1] = high
;
799 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
802 /* Similarly, if this is converting a floating-point value into a
803 single-word integer. Only do this is the host and target parameters are
806 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
807 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
808 || flag_pretend_float
)
809 && (GET_MODE_CLASS (mode
) == MODE_INT
810 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
811 && GET_CODE (x
) == CONST_DOUBLE
812 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
813 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
814 return operand_subword (x
, word
, 0, GET_MODE (x
));
816 /* Similarly, if this is converting a floating-point value into a
817 two-word integer, we can do this one word at a time and make an
818 integer. Only do this is the host and target parameters are
821 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
822 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
823 || flag_pretend_float
)
824 && (GET_MODE_CLASS (mode
) == MODE_INT
825 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
826 && GET_CODE (x
) == CONST_DOUBLE
827 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
828 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
831 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
833 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
835 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
836 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
837 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
840 /* Otherwise, we can't do this. */
844 /* Return the real part (which has mode MODE) of a complex value X.
845 This always comes at the low address in memory. */
848 gen_realpart (mode
, x
)
849 enum machine_mode mode
;
852 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
854 else if (WORDS_BIG_ENDIAN
)
855 return gen_highpart (mode
, x
);
857 return gen_lowpart (mode
, x
);
860 /* Return the imaginary part (which has mode MODE) of a complex value X.
861 This always comes at the high address in memory. */
864 gen_imagpart (mode
, x
)
865 enum machine_mode mode
;
868 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
870 else if (WORDS_BIG_ENDIAN
)
871 return gen_lowpart (mode
, x
);
873 return gen_highpart (mode
, x
);
876 /* Return 1 iff X, assumed to be a SUBREG,
877 refers to the real part of the complex value in its containing reg.
878 Complex values are always stored with the real part in the first word,
879 regardless of WORDS_BIG_ENDIAN. */
882 subreg_realpart_p (x
)
885 if (GET_CODE (x
) != SUBREG
)
888 return SUBREG_WORD (x
) == 0;
891 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
892 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
893 least-significant part of X.
894 MODE specifies how big a part of X to return;
895 it usually should not be larger than a word.
896 If X is a MEM whose address is a QUEUED, the value may be so also. */
899 gen_lowpart (mode
, x
)
900 enum machine_mode mode
;
903 rtx result
= gen_lowpart_common (mode
, x
);
907 else if (GET_CODE (x
) == REG
)
909 /* Must be a hard reg that's not valid in MODE. */
910 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
915 else if (GET_CODE (x
) == MEM
)
917 /* The only additional case we can do is MEM. */
918 register int offset
= 0;
919 if (WORDS_BIG_ENDIAN
)
920 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
921 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
923 if (BYTES_BIG_ENDIAN
)
924 /* Adjust the address so that the address-after-the-data
926 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
927 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
929 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
935 /* Like `gen_lowpart', but refer to the most significant part.
936 This is used to access the imaginary part of a complex number. */
939 gen_highpart (mode
, x
)
940 enum machine_mode mode
;
943 /* This case loses if X is a subreg. To catch bugs early,
944 complain if an invalid MODE is used even in other cases. */
945 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
946 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
948 if (GET_CODE (x
) == CONST_DOUBLE
949 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
950 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
953 return gen_rtx (CONST_INT
, VOIDmode
,
954 CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
955 else if (GET_CODE (x
) == CONST_INT
)
957 else if (GET_CODE (x
) == MEM
)
959 register int offset
= 0;
960 if (! WORDS_BIG_ENDIAN
)
961 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
962 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
964 if (! BYTES_BIG_ENDIAN
965 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
966 offset
-= (GET_MODE_SIZE (mode
)
967 - MIN (UNITS_PER_WORD
,
968 GET_MODE_SIZE (GET_MODE (x
))));
970 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
972 else if (GET_CODE (x
) == SUBREG
)
974 /* The only time this should occur is when we are looking at a
975 multi-word item with a SUBREG whose mode is the same as that of the
976 item. It isn't clear what we would do if it wasn't. */
977 if (SUBREG_WORD (x
) != 0)
979 return gen_highpart (mode
, SUBREG_REG (x
));
981 else if (GET_CODE (x
) == REG
)
985 if (! WORDS_BIG_ENDIAN
986 && GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
987 word
= ((GET_MODE_SIZE (GET_MODE (x
))
988 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
992 * ??? This fails miserably for complex values being passed in registers
993 * where the sizeof the real and imaginary part are not equal to the
994 * sizeof SImode. FIXME
997 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
998 /* integrate.c can't handle parts of a return value register. */
999 && (! REG_FUNCTION_VALUE_P (x
)
1000 || ! rtx_equal_function_value_matters
)
1001 /* We want to keep the stack, frame, and arg pointers special. */
1002 && x
!= frame_pointer_rtx
1003 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1004 && x
!= arg_pointer_rtx
1006 && x
!= stack_pointer_rtx
)
1007 return gen_rtx (REG
, mode
, REGNO (x
) + word
);
1009 return gen_rtx (SUBREG
, mode
, x
, word
);
1015 /* Return 1 iff X, assumed to be a SUBREG,
1016 refers to the least significant part of its containing reg.
1017 If X is not a SUBREG, always return 1 (it is its own low part!). */
1020 subreg_lowpart_p (x
)
1023 if (GET_CODE (x
) != SUBREG
)
1026 if (WORDS_BIG_ENDIAN
1027 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1028 return (SUBREG_WORD (x
)
1029 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1030 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1033 return SUBREG_WORD (x
) == 0;
1036 /* Return subword I of operand OP.
1037 The word number, I, is interpreted as the word number starting at the
1038 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1039 otherwise it is the high-order word.
1041 If we cannot extract the required word, we return zero. Otherwise, an
1042 rtx corresponding to the requested word will be returned.
1044 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1045 reload has completed, a valid address will always be returned. After
1046 reload, if a valid address cannot be returned, we return zero.
1048 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1049 it is the responsibility of the caller.
1051 MODE is the mode of OP in case it is a CONST_INT. */
1054 operand_subword (op
, i
, validate_address
, mode
)
1057 int validate_address
;
1058 enum machine_mode mode
;
1061 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1063 if (mode
== VOIDmode
)
1064 mode
= GET_MODE (op
);
1066 if (mode
== VOIDmode
)
1069 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1071 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
1072 || (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
)))
1075 /* If OP is already an integer word, return it. */
1076 if (GET_MODE_CLASS (mode
) == MODE_INT
1077 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1080 /* If OP is a REG or SUBREG, we can handle it very simply. */
1081 if (GET_CODE (op
) == REG
)
1083 /* If the register is not valid for MODE, return 0. If we don't
1084 do this, there is no way to fix up the resulting REG later. */
1085 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1086 && ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
))
1088 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1089 || (REG_FUNCTION_VALUE_P (op
)
1090 && rtx_equal_function_value_matters
)
1091 /* We want to keep the stack, frame, and arg pointers
1093 || op
== frame_pointer_rtx
1094 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1095 || op
== arg_pointer_rtx
1097 || op
== stack_pointer_rtx
)
1098 return gen_rtx (SUBREG
, word_mode
, op
, i
);
1100 return gen_rtx (REG
, word_mode
, REGNO (op
) + i
);
1102 else if (GET_CODE (op
) == SUBREG
)
1103 return gen_rtx (SUBREG
, word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1104 else if (GET_CODE (op
) == CONCAT
)
1106 int partwords
= GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1108 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1109 return operand_subword (XEXP (op
, 1), i
- partwords
,
1110 validate_address
, mode
);
1113 /* Form a new MEM at the requested address. */
1114 if (GET_CODE (op
) == MEM
)
1116 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1119 if (validate_address
)
1121 if (reload_completed
)
1123 if (! strict_memory_address_p (word_mode
, addr
))
1127 addr
= memory_address (word_mode
, addr
);
1130 new = gen_rtx (MEM
, word_mode
, addr
);
1132 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op
);
1133 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op
);
1134 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op
);
1139 /* The only remaining cases are when OP is a constant. If the host and
1140 target floating formats are the same, handling two-word floating
1141 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1142 are defined as returning one or two 32 bit values, respectively,
1143 and not values of BITS_PER_WORD bits. */
1144 #ifdef REAL_ARITHMETIC
1145 /* The output is some bits, the width of the target machine's word.
1146 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1148 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1149 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1150 && GET_MODE_BITSIZE (mode
) == 64
1151 && GET_CODE (op
) == CONST_DOUBLE
)
1156 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1157 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1159 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1160 which the words are written depends on the word endianness.
1162 ??? This is a potential portability problem and should
1163 be fixed at some point. */
1164 if (BITS_PER_WORD
== 32)
1165 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1166 #if HOST_BITS_PER_WIDE_INT > 32
1167 else if (BITS_PER_WORD
>= 64 && i
== 0)
1168 return GEN_INT ((((HOST_WIDE_INT
) k
[! WORDS_BIG_ENDIAN
]) << 32)
1169 | (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
]);
1171 else if (BITS_PER_WORD
== 16)
1178 return GEN_INT ((HOST_WIDE_INT
) value
);
1183 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1184 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1185 && GET_MODE_BITSIZE (mode
) > 64
1186 && GET_CODE (op
) == CONST_DOUBLE
)
1191 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1192 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1194 if (BITS_PER_WORD
== 32)
1195 return GEN_INT ((HOST_WIDE_INT
) k
[i
]);
1197 #else /* no REAL_ARITHMETIC */
1198 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1199 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1200 || flag_pretend_float
)
1201 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1202 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1203 && GET_CODE (op
) == CONST_DOUBLE
)
1205 /* The constant is stored in the host's word-ordering,
1206 but we want to access it in the target's word-ordering. Some
1207 compilers don't like a conditional inside macro args, so we have two
1208 copies of the return. */
1209 #ifdef HOST_WORDS_BIG_ENDIAN
1210 return GEN_INT (i
== WORDS_BIG_ENDIAN
1211 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1213 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1214 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1217 #endif /* no REAL_ARITHMETIC */
1219 /* Single word float is a little harder, since single- and double-word
1220 values often do not have the same high-order bits. We have already
1221 verified that we want the only defined word of the single-word value. */
1222 #ifdef REAL_ARITHMETIC
1223 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1224 && GET_MODE_BITSIZE (mode
) == 32
1225 && GET_CODE (op
) == CONST_DOUBLE
)
1230 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1231 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1232 return GEN_INT ((HOST_WIDE_INT
) l
);
1235 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1236 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1237 || flag_pretend_float
)
1238 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1239 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1240 && GET_CODE (op
) == CONST_DOUBLE
)
1243 union {float f
; HOST_WIDE_INT i
; } u
;
1245 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1248 return GEN_INT (u
.i
);
1250 #endif /* no REAL_ARITHMETIC */
1252 /* The only remaining cases that we can handle are integers.
1253 Convert to proper endianness now since these cases need it.
1254 At this point, i == 0 means the low-order word.
1256 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1257 in general. However, if OP is (const_int 0), we can just return
1260 if (op
== const0_rtx
)
1263 if (GET_MODE_CLASS (mode
) != MODE_INT
1264 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1265 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1268 if (WORDS_BIG_ENDIAN
)
1269 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1271 /* Find out which word on the host machine this value is in and get
1272 it from the constant. */
1273 val
= (i
/ size_ratio
== 0
1274 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1275 : (GET_CODE (op
) == CONST_INT
1276 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1278 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1279 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1280 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
))
1281 & (((HOST_WIDE_INT
) 1
1282 << (BITS_PER_WORD
% HOST_BITS_PER_WIDE_INT
)) - 1));
1284 return GEN_INT (val
);
1287 /* Similar to `operand_subword', but never return 0. If we can't extract
1288 the required subword, put OP into a register and try again. If that fails,
1289 abort. We always validate the address in this case. It is not valid
1290 to call this function after reload; it is mostly meant for RTL
1293 MODE is the mode of OP, in case it is CONST_INT. */
1296 operand_subword_force (op
, i
, mode
)
1299 enum machine_mode mode
;
1301 rtx result
= operand_subword (op
, i
, 1, mode
);
1306 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1307 op
= force_reg (mode
, op
);
1309 result
= operand_subword (op
, i
, 1, mode
);
1316 /* Given a compare instruction, swap the operands.
1317 A test instruction is changed into a compare of 0 against the operand. */
1320 reverse_comparison (insn
)
1323 rtx body
= PATTERN (insn
);
1326 if (GET_CODE (body
) == SET
)
1327 comp
= SET_SRC (body
);
1329 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1331 if (GET_CODE (comp
) == COMPARE
)
1333 rtx op0
= XEXP (comp
, 0);
1334 rtx op1
= XEXP (comp
, 1);
1335 XEXP (comp
, 0) = op1
;
1336 XEXP (comp
, 1) = op0
;
1340 rtx
new = gen_rtx (COMPARE
, VOIDmode
,
1341 CONST0_RTX (GET_MODE (comp
)), comp
);
1342 if (GET_CODE (body
) == SET
)
1343 SET_SRC (body
) = new;
1345 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1349 /* Return a memory reference like MEMREF, but with its mode changed
1350 to MODE and its address changed to ADDR.
1351 (VOIDmode means don't change the mode.
1352 NULL for ADDR means don't change the address.) */
1355 change_address (memref
, mode
, addr
)
1357 enum machine_mode mode
;
1362 if (GET_CODE (memref
) != MEM
)
1364 if (mode
== VOIDmode
)
1365 mode
= GET_MODE (memref
);
1367 addr
= XEXP (memref
, 0);
1369 /* If reload is in progress or has completed, ADDR must be valid.
1370 Otherwise, we can call memory_address to make it valid. */
1371 if (reload_completed
|| reload_in_progress
)
1373 if (! memory_address_p (mode
, addr
))
1377 addr
= memory_address (mode
, addr
);
1379 new = gen_rtx (MEM
, mode
, addr
);
1380 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref
);
1381 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref
);
1382 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref
);
1386 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1393 label
= (output_bytecode
1394 ? gen_rtx (CODE_LABEL
, VOIDmode
, NULL
, bc_get_bytecode_label ())
1395 : gen_rtx (CODE_LABEL
, VOIDmode
, 0, 0, 0, label_num
++, NULL_PTR
));
1397 LABEL_NUSES (label
) = 0;
1401 /* For procedure integration. */
1403 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1404 from a permanent obstack when the opportunity arises. */
1407 gen_inline_header_rtx (first_insn
, first_parm_insn
, first_labelno
,
1408 last_labelno
, max_parm_regnum
, max_regnum
, args_size
,
1409 pops_args
, stack_slots
, forced_labels
, function_flags
,
1410 outgoing_args_size
, original_arg_vector
,
1411 original_decl_initial
, regno_rtx
, regno_flag
,
1413 rtx first_insn
, first_parm_insn
;
1414 int first_labelno
, last_labelno
, max_parm_regnum
, max_regnum
, args_size
;
1419 int outgoing_args_size
;
1420 rtvec original_arg_vector
;
1421 rtx original_decl_initial
;
1426 rtx header
= gen_rtx (INLINE_HEADER
, VOIDmode
,
1427 cur_insn_uid
++, NULL_RTX
,
1428 first_insn
, first_parm_insn
,
1429 first_labelno
, last_labelno
,
1430 max_parm_regnum
, max_regnum
, args_size
, pops_args
,
1431 stack_slots
, forced_labels
, function_flags
,
1432 outgoing_args_size
, original_arg_vector
,
1433 original_decl_initial
,
1434 regno_rtx
, regno_flag
, regno_align
);
1438 /* Install new pointers to the first and last insns in the chain.
1439 Also, set cur_insn_uid to one higher than the last in use.
1440 Used for an inline-procedure after copying the insn chain. */
1443 set_new_first_and_last_insn (first
, last
)
1452 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1453 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1458 /* Set the range of label numbers found in the current function.
1459 This is used when belatedly compiling an inline function. */
1462 set_new_first_and_last_label_num (first
, last
)
1465 base_label_num
= label_num
;
1466 first_label_num
= first
;
1467 last_label_num
= last
;
1470 /* Save all variables describing the current status into the structure *P.
1471 This is used before starting a nested function. */
1474 save_emit_status (p
)
1477 p
->reg_rtx_no
= reg_rtx_no
;
1478 p
->first_label_num
= first_label_num
;
1479 p
->first_insn
= first_insn
;
1480 p
->last_insn
= last_insn
;
1481 p
->sequence_rtl_expr
= sequence_rtl_expr
;
1482 p
->sequence_stack
= sequence_stack
;
1483 p
->cur_insn_uid
= cur_insn_uid
;
1484 p
->last_linenum
= last_linenum
;
1485 p
->last_filename
= last_filename
;
1486 p
->regno_pointer_flag
= regno_pointer_flag
;
1487 p
->regno_pointer_align
= regno_pointer_align
;
1488 p
->regno_pointer_flag_length
= regno_pointer_flag_length
;
1489 p
->regno_reg_rtx
= regno_reg_rtx
;
1492 /* Restore all variables describing the current status from the structure *P.
1493 This is used after a nested function. */
1496 restore_emit_status (p
)
1501 reg_rtx_no
= p
->reg_rtx_no
;
1502 first_label_num
= p
->first_label_num
;
1504 first_insn
= p
->first_insn
;
1505 last_insn
= p
->last_insn
;
1506 sequence_rtl_expr
= p
->sequence_rtl_expr
;
1507 sequence_stack
= p
->sequence_stack
;
1508 cur_insn_uid
= p
->cur_insn_uid
;
1509 last_linenum
= p
->last_linenum
;
1510 last_filename
= p
->last_filename
;
1511 regno_pointer_flag
= p
->regno_pointer_flag
;
1512 regno_pointer_align
= p
->regno_pointer_align
;
1513 regno_pointer_flag_length
= p
->regno_pointer_flag_length
;
1514 regno_reg_rtx
= p
->regno_reg_rtx
;
1516 /* Clear our cache of rtx expressions for start_sequence and
1518 sequence_element_free_list
= 0;
1519 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
1520 sequence_result
[i
] = 0;
1525 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1526 It does not work to do this twice, because the mark bits set here
1527 are not cleared afterwards. */
1530 unshare_all_rtl (insn
)
1533 for (; insn
; insn
= NEXT_INSN (insn
))
1534 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
1535 || GET_CODE (insn
) == CALL_INSN
)
1537 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1538 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1539 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1542 /* Make sure the addresses of stack slots found outside the insn chain
1543 (such as, in DECL_RTL of a variable) are not shared
1544 with the insn chain.
1546 This special care is necessary when the stack slot MEM does not
1547 actually appear in the insn chain. If it does appear, its address
1548 is unshared from all else at that point. */
1550 copy_rtx_if_shared (stack_slot_list
);
1553 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1554 Recursively does the same for subexpressions. */
1557 copy_rtx_if_shared (orig
)
1560 register rtx x
= orig
;
1562 register enum rtx_code code
;
1563 register char *format_ptr
;
1569 code
= GET_CODE (x
);
1571 /* These types may be freely shared. */
1584 /* SCRATCH must be shared because they represent distinct values. */
1588 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1589 a LABEL_REF, it isn't sharable. */
1590 if (GET_CODE (XEXP (x
, 0)) == PLUS
1591 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1592 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1601 /* The chain of insns is not being copied. */
1605 /* A MEM is allowed to be shared if its address is constant
1606 or is a constant plus one of the special registers. */
1607 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
1608 || XEXP (x
, 0) == virtual_stack_vars_rtx
1609 || XEXP (x
, 0) == virtual_incoming_args_rtx
)
1612 if (GET_CODE (XEXP (x
, 0)) == PLUS
1613 && (XEXP (XEXP (x
, 0), 0) == virtual_stack_vars_rtx
1614 || XEXP (XEXP (x
, 0), 0) == virtual_incoming_args_rtx
)
1615 && CONSTANT_ADDRESS_P (XEXP (XEXP (x
, 0), 1)))
1617 /* This MEM can appear in more than one place,
1618 but its address better not be shared with anything else. */
1620 XEXP (x
, 0) = copy_rtx_if_shared (XEXP (x
, 0));
1626 /* This rtx may not be shared. If it has already been seen,
1627 replace it with a copy of itself. */
1633 copy
= rtx_alloc (code
);
1634 bcopy ((char *) x
, (char *) copy
,
1635 (sizeof (*copy
) - sizeof (copy
->fld
)
1636 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1642 /* Now scan the subexpressions recursively.
1643 We can store any replaced subexpressions directly into X
1644 since we know X is not shared! Any vectors in X
1645 must be copied if X was copied. */
1647 format_ptr
= GET_RTX_FORMAT (code
);
1649 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1651 switch (*format_ptr
++)
1654 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1658 if (XVEC (x
, i
) != NULL
)
1661 int len
= XVECLEN (x
, i
);
1663 if (copied
&& len
> 0)
1664 XVEC (x
, i
) = gen_rtvec_v (len
, &XVECEXP (x
, i
, 0));
1665 for (j
= 0; j
< len
; j
++)
1666 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1674 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1675 to look for shared sub-parts. */
1678 reset_used_flags (x
)
1682 register enum rtx_code code
;
1683 register char *format_ptr
;
1688 code
= GET_CODE (x
);
1690 /* These types may be freely shared so we needn't do any resetting
1711 /* The chain of insns is not being copied. */
1717 format_ptr
= GET_RTX_FORMAT (code
);
1718 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1720 switch (*format_ptr
++)
1723 reset_used_flags (XEXP (x
, i
));
1727 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1728 reset_used_flags (XVECEXP (x
, i
, j
));
1734 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1735 Return X or the rtx for the pseudo reg the value of X was copied into.
1736 OTHER must be valid as a SET_DEST. */
1739 make_safe_from (x
, other
)
1743 switch (GET_CODE (other
))
1746 other
= SUBREG_REG (other
);
1748 case STRICT_LOW_PART
:
1751 other
= XEXP (other
, 0);
1757 if ((GET_CODE (other
) == MEM
1759 && GET_CODE (x
) != REG
1760 && GET_CODE (x
) != SUBREG
)
1761 || (GET_CODE (other
) == REG
1762 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
1763 || reg_mentioned_p (other
, x
))))
1765 rtx temp
= gen_reg_rtx (GET_MODE (x
));
1766 emit_move_insn (temp
, x
);
1772 /* Emission of insns (adding them to the doubly-linked list). */
1774 /* Return the first insn of the current sequence or current function. */
1782 /* Return the last insn emitted in current sequence or current function. */
1790 /* Specify a new insn as the last in the chain. */
1793 set_last_insn (insn
)
1796 if (NEXT_INSN (insn
) != 0)
1801 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1804 get_last_insn_anywhere ()
1806 struct sequence_stack
*stack
;
1809 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
1810 if (stack
->last
!= 0)
1815 /* Return a number larger than any instruction's uid in this function. */
1820 return cur_insn_uid
;
1823 /* Return the next insn. If it is a SEQUENCE, return the first insn
1832 insn
= NEXT_INSN (insn
);
1833 if (insn
&& GET_CODE (insn
) == INSN
1834 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1835 insn
= XVECEXP (PATTERN (insn
), 0, 0);
1841 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1845 previous_insn (insn
)
1850 insn
= PREV_INSN (insn
);
1851 if (insn
&& GET_CODE (insn
) == INSN
1852 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1853 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
1859 /* Return the next insn after INSN that is not a NOTE. This routine does not
1860 look inside SEQUENCEs. */
1863 next_nonnote_insn (insn
)
1868 insn
= NEXT_INSN (insn
);
1869 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
1876 /* Return the previous insn before INSN that is not a NOTE. This routine does
1877 not look inside SEQUENCEs. */
1880 prev_nonnote_insn (insn
)
1885 insn
= PREV_INSN (insn
);
1886 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
1893 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1894 or 0, if there is none. This routine does not look inside
1898 next_real_insn (insn
)
1903 insn
= NEXT_INSN (insn
);
1904 if (insn
== 0 || GET_CODE (insn
) == INSN
1905 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
1912 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1913 or 0, if there is none. This routine does not look inside
1917 prev_real_insn (insn
)
1922 insn
= PREV_INSN (insn
);
1923 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
1924 || GET_CODE (insn
) == JUMP_INSN
)
1931 /* Find the next insn after INSN that really does something. This routine
1932 does not look inside SEQUENCEs. Until reload has completed, this is the
1933 same as next_real_insn. */
1936 next_active_insn (insn
)
1941 insn
= NEXT_INSN (insn
);
1943 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
1944 || (GET_CODE (insn
) == INSN
1945 && (! reload_completed
1946 || (GET_CODE (PATTERN (insn
)) != USE
1947 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
1954 /* Find the last insn before INSN that really does something. This routine
1955 does not look inside SEQUENCEs. Until reload has completed, this is the
1956 same as prev_real_insn. */
1959 prev_active_insn (insn
)
1964 insn
= PREV_INSN (insn
);
1966 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
1967 || (GET_CODE (insn
) == INSN
1968 && (! reload_completed
1969 || (GET_CODE (PATTERN (insn
)) != USE
1970 && GET_CODE (PATTERN (insn
)) != CLOBBER
))))
1977 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1985 insn
= NEXT_INSN (insn
);
1986 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
1993 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2001 insn
= PREV_INSN (insn
);
2002 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2010 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2011 and REG_CC_USER notes so we can find it. */
2014 link_cc0_insns (insn
)
2017 rtx user
= next_nonnote_insn (insn
);
2019 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2020 user
= XVECEXP (PATTERN (user
), 0, 0);
2022 REG_NOTES (user
) = gen_rtx (INSN_LIST
, REG_CC_SETTER
, insn
,
2024 REG_NOTES (insn
) = gen_rtx (INSN_LIST
, REG_CC_USER
, user
, REG_NOTES (insn
));
2027 /* Return the next insn that uses CC0 after INSN, which is assumed to
2028 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2029 applied to the result of this function should yield INSN).
2031 Normally, this is simply the next insn. However, if a REG_CC_USER note
2032 is present, it contains the insn that uses CC0.
2034 Return 0 if we can't find the insn. */
2037 next_cc0_user (insn
)
2040 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2043 return XEXP (note
, 0);
2045 insn
= next_nonnote_insn (insn
);
2046 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2047 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2049 if (insn
&& GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2050 && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2056 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2057 note, it is the previous insn. */
2060 prev_cc0_setter (insn
)
2063 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2067 return XEXP (note
, 0);
2069 insn
= prev_nonnote_insn (insn
);
2070 if (! sets_cc0_p (PATTERN (insn
)))
2077 /* Try splitting insns that can be split for better scheduling.
2078 PAT is the pattern which might split.
2079 TRIAL is the insn providing PAT.
2080 LAST is non-zero if we should return the last insn of the sequence produced.
2082 If this routine succeeds in splitting, it returns the first or last
2083 replacement insn depending on the value of LAST. Otherwise, it
2084 returns TRIAL. If the insn to be returned can be split, it will be. */
2087 try_split (pat
, trial
, last
)
2091 rtx before
= PREV_INSN (trial
);
2092 rtx after
= NEXT_INSN (trial
);
2093 rtx seq
= split_insns (pat
, trial
);
2094 int has_barrier
= 0;
2097 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2098 We may need to handle this specially. */
2099 if (after
&& GET_CODE (after
) == BARRIER
)
2102 after
= NEXT_INSN (after
);
2107 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2108 The latter case will normally arise only when being done so that
2109 it, in turn, will be split (SFmode on the 29k is an example). */
2110 if (GET_CODE (seq
) == SEQUENCE
)
2112 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2113 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2114 increment the usage count so we don't delete the label. */
2117 if (GET_CODE (trial
) == JUMP_INSN
)
2118 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2119 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2121 JUMP_LABEL (XVECEXP (seq
, 0, i
)) = JUMP_LABEL (trial
);
2123 if (JUMP_LABEL (trial
))
2124 LABEL_NUSES (JUMP_LABEL (trial
))++;
2127 tem
= emit_insn_after (seq
, before
);
2129 delete_insn (trial
);
2131 emit_barrier_after (tem
);
2133 /* Recursively call try_split for each new insn created; by the
2134 time control returns here that insn will be fully split, so
2135 set LAST and continue from the insn after the one returned.
2136 We can't use next_active_insn here since AFTER may be a note.
2137 Ignore deleted insns, which can be occur if not optimizing. */
2138 for (tem
= NEXT_INSN (before
); tem
!= after
;
2139 tem
= NEXT_INSN (tem
))
2140 if (! INSN_DELETED_P (tem
))
2141 tem
= try_split (PATTERN (tem
), tem
, 1);
2143 /* Avoid infinite loop if the result matches the original pattern. */
2144 else if (rtx_equal_p (seq
, pat
))
2148 PATTERN (trial
) = seq
;
2149 INSN_CODE (trial
) = -1;
2150 try_split (seq
, trial
, last
);
2153 /* Return either the first or the last insn, depending on which was
2155 return last
? prev_active_insn (after
) : next_active_insn (before
);
2161 /* Make and return an INSN rtx, initializing all its slots.
2162 Store PATTERN in the pattern slots. */
2165 make_insn_raw (pattern
)
2170 /* If in RTL generation phase, see if FREE_INSN can be used. */
2171 if (free_insn
!= 0 && rtx_equal_function_value_matters
)
2174 free_insn
= NEXT_INSN (free_insn
);
2175 PUT_CODE (insn
, INSN
);
2178 insn
= rtx_alloc (INSN
);
2180 INSN_UID (insn
) = cur_insn_uid
++;
2181 PATTERN (insn
) = pattern
;
2182 INSN_CODE (insn
) = -1;
2183 LOG_LINKS (insn
) = NULL
;
2184 REG_NOTES (insn
) = NULL
;
2189 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2192 make_jump_insn_raw (pattern
)
2197 insn
= rtx_alloc (JUMP_INSN
);
2198 INSN_UID (insn
) = cur_insn_uid
++;
2200 PATTERN (insn
) = pattern
;
2201 INSN_CODE (insn
) = -1;
2202 LOG_LINKS (insn
) = NULL
;
2203 REG_NOTES (insn
) = NULL
;
2204 JUMP_LABEL (insn
) = NULL
;
2209 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2212 make_call_insn_raw (pattern
)
2217 insn
= rtx_alloc (CALL_INSN
);
2218 INSN_UID (insn
) = cur_insn_uid
++;
2220 PATTERN (insn
) = pattern
;
2221 INSN_CODE (insn
) = -1;
2222 LOG_LINKS (insn
) = NULL
;
2223 REG_NOTES (insn
) = NULL
;
2224 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2229 /* Add INSN to the end of the doubly-linked list.
2230 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2236 PREV_INSN (insn
) = last_insn
;
2237 NEXT_INSN (insn
) = 0;
2239 if (NULL
!= last_insn
)
2240 NEXT_INSN (last_insn
) = insn
;
2242 if (NULL
== first_insn
)
2248 /* Add INSN into the doubly-linked list after insn AFTER. This and
2249 the next should be the only functions called to insert an insn once
2250 delay slots have been filled since only they know how to update a
2254 add_insn_after (insn
, after
)
2257 rtx next
= NEXT_INSN (after
);
2259 if (optimize
&& INSN_DELETED_P (after
))
2262 NEXT_INSN (insn
) = next
;
2263 PREV_INSN (insn
) = after
;
2267 PREV_INSN (next
) = insn
;
2268 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2269 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2271 else if (last_insn
== after
)
2275 struct sequence_stack
*stack
= sequence_stack
;
2276 /* Scan all pending sequences too. */
2277 for (; stack
; stack
= stack
->next
)
2278 if (after
== stack
->last
)
2288 NEXT_INSN (after
) = insn
;
2289 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2291 rtx sequence
= PATTERN (after
);
2292 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2296 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2297 the previous should be the only functions called to insert an insn once
2298 delay slots have been filled since only they know how to update a
2302 add_insn_before (insn
, before
)
2305 rtx prev
= PREV_INSN (before
);
2307 if (optimize
&& INSN_DELETED_P (before
))
2310 PREV_INSN (insn
) = prev
;
2311 NEXT_INSN (insn
) = before
;
2315 NEXT_INSN (prev
) = insn
;
2316 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2318 rtx sequence
= PATTERN (prev
);
2319 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2322 else if (first_insn
== before
)
2326 struct sequence_stack
*stack
= sequence_stack
;
2327 /* Scan all pending sequences too. */
2328 for (; stack
; stack
= stack
->next
)
2329 if (before
== stack
->first
)
2331 stack
->first
= insn
;
2339 PREV_INSN (before
) = insn
;
2340 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2341 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2344 /* Delete all insns made since FROM.
2345 FROM becomes the new last instruction. */
2348 delete_insns_since (from
)
2354 NEXT_INSN (from
) = 0;
2358 /* This function is deprecated, please use sequences instead.
2360 Move a consecutive bunch of insns to a different place in the chain.
2361 The insns to be moved are those between FROM and TO.
2362 They are moved to a new position after the insn AFTER.
2363 AFTER must not be FROM or TO or any insn in between.
2365 This function does not know about SEQUENCEs and hence should not be
2366 called after delay-slot filling has been done. */
2369 reorder_insns (from
, to
, after
)
2370 rtx from
, to
, after
;
2372 /* Splice this bunch out of where it is now. */
2373 if (PREV_INSN (from
))
2374 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2376 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2377 if (last_insn
== to
)
2378 last_insn
= PREV_INSN (from
);
2379 if (first_insn
== from
)
2380 first_insn
= NEXT_INSN (to
);
2382 /* Make the new neighbors point to it and it to them. */
2383 if (NEXT_INSN (after
))
2384 PREV_INSN (NEXT_INSN (after
)) = to
;
2386 NEXT_INSN (to
) = NEXT_INSN (after
);
2387 PREV_INSN (from
) = after
;
2388 NEXT_INSN (after
) = from
;
2389 if (after
== last_insn
)
2393 /* Return the line note insn preceding INSN. */
2396 find_line_note (insn
)
2399 if (no_line_numbers
)
2402 for (; insn
; insn
= PREV_INSN (insn
))
2403 if (GET_CODE (insn
) == NOTE
2404 && NOTE_LINE_NUMBER (insn
) >= 0)
2410 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2411 of the moved insns when debugging. This may insert a note between AFTER
2412 and FROM, and another one after TO. */
2415 reorder_insns_with_line_notes (from
, to
, after
)
2416 rtx from
, to
, after
;
2418 rtx from_line
= find_line_note (from
);
2419 rtx after_line
= find_line_note (after
);
2421 reorder_insns (from
, to
, after
);
2423 if (from_line
== after_line
)
2427 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2428 NOTE_LINE_NUMBER (from_line
),
2431 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2432 NOTE_LINE_NUMBER (after_line
),
2436 /* Emit an insn of given code and pattern
2437 at a specified place within the doubly-linked list. */
2439 /* Make an instruction with body PATTERN
2440 and output it before the instruction BEFORE. */
2443 emit_insn_before (pattern
, before
)
2444 register rtx pattern
, before
;
2446 register rtx insn
= before
;
2448 if (GET_CODE (pattern
) == SEQUENCE
)
2452 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2454 insn
= XVECEXP (pattern
, 0, i
);
2455 add_insn_before (insn
, before
);
2457 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2458 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2462 insn
= make_insn_raw (pattern
);
2463 add_insn_before (insn
, before
);
2469 /* Make an instruction with body PATTERN and code JUMP_INSN
2470 and output it before the instruction BEFORE. */
2473 emit_jump_insn_before (pattern
, before
)
2474 register rtx pattern
, before
;
2478 if (GET_CODE (pattern
) == SEQUENCE
)
2479 insn
= emit_insn_before (pattern
, before
);
2482 insn
= make_jump_insn_raw (pattern
);
2483 add_insn_before (insn
, before
);
2489 /* Make an instruction with body PATTERN and code CALL_INSN
2490 and output it before the instruction BEFORE. */
2493 emit_call_insn_before (pattern
, before
)
2494 register rtx pattern
, before
;
2498 if (GET_CODE (pattern
) == SEQUENCE
)
2499 insn
= emit_insn_before (pattern
, before
);
2502 insn
= make_call_insn_raw (pattern
);
2503 add_insn_before (insn
, before
);
2504 PUT_CODE (insn
, CALL_INSN
);
2510 /* Make an insn of code BARRIER
2511 and output it before the insn AFTER. */
2514 emit_barrier_before (before
)
2515 register rtx before
;
2517 register rtx insn
= rtx_alloc (BARRIER
);
2519 INSN_UID (insn
) = cur_insn_uid
++;
2521 add_insn_before (insn
, before
);
2525 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2528 emit_note_before (subtype
, before
)
2532 register rtx note
= rtx_alloc (NOTE
);
2533 INSN_UID (note
) = cur_insn_uid
++;
2534 NOTE_SOURCE_FILE (note
) = 0;
2535 NOTE_LINE_NUMBER (note
) = subtype
;
2537 add_insn_before (note
, before
);
2541 /* Make an insn of code INSN with body PATTERN
2542 and output it after the insn AFTER. */
2545 emit_insn_after (pattern
, after
)
2546 register rtx pattern
, after
;
2548 register rtx insn
= after
;
2550 if (GET_CODE (pattern
) == SEQUENCE
)
2554 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2556 insn
= XVECEXP (pattern
, 0, i
);
2557 add_insn_after (insn
, after
);
2560 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2561 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2565 insn
= make_insn_raw (pattern
);
2566 add_insn_after (insn
, after
);
2572 /* Similar to emit_insn_after, except that line notes are to be inserted so
2573 as to act as if this insn were at FROM. */
2576 emit_insn_after_with_line_notes (pattern
, after
, from
)
2577 rtx pattern
, after
, from
;
2579 rtx from_line
= find_line_note (from
);
2580 rtx after_line
= find_line_note (after
);
2581 rtx insn
= emit_insn_after (pattern
, after
);
2584 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2585 NOTE_LINE_NUMBER (from_line
),
2589 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2590 NOTE_LINE_NUMBER (after_line
),
2594 /* Make an insn of code JUMP_INSN with body PATTERN
2595 and output it after the insn AFTER. */
2598 emit_jump_insn_after (pattern
, after
)
2599 register rtx pattern
, after
;
2603 if (GET_CODE (pattern
) == SEQUENCE
)
2604 insn
= emit_insn_after (pattern
, after
);
2607 insn
= make_jump_insn_raw (pattern
);
2608 add_insn_after (insn
, after
);
2614 /* Make an insn of code BARRIER
2615 and output it after the insn AFTER. */
2618 emit_barrier_after (after
)
2621 register rtx insn
= rtx_alloc (BARRIER
);
2623 INSN_UID (insn
) = cur_insn_uid
++;
2625 add_insn_after (insn
, after
);
2629 /* Emit the label LABEL after the insn AFTER. */
2632 emit_label_after (label
, after
)
2635 /* This can be called twice for the same label
2636 as a result of the confusion that follows a syntax error!
2637 So make it harmless. */
2638 if (INSN_UID (label
) == 0)
2640 INSN_UID (label
) = cur_insn_uid
++;
2641 add_insn_after (label
, after
);
2647 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2650 emit_note_after (subtype
, after
)
2654 register rtx note
= rtx_alloc (NOTE
);
2655 INSN_UID (note
) = cur_insn_uid
++;
2656 NOTE_SOURCE_FILE (note
) = 0;
2657 NOTE_LINE_NUMBER (note
) = subtype
;
2658 add_insn_after (note
, after
);
2662 /* Emit a line note for FILE and LINE after the insn AFTER. */
2665 emit_line_note_after (file
, line
, after
)
2672 if (no_line_numbers
&& line
> 0)
2678 note
= rtx_alloc (NOTE
);
2679 INSN_UID (note
) = cur_insn_uid
++;
2680 NOTE_SOURCE_FILE (note
) = file
;
2681 NOTE_LINE_NUMBER (note
) = line
;
2682 add_insn_after (note
, after
);
2686 /* Make an insn of code INSN with pattern PATTERN
2687 and add it to the end of the doubly-linked list.
2688 If PATTERN is a SEQUENCE, take the elements of it
2689 and emit an insn for each element.
2691 Returns the last insn emitted. */
2697 rtx insn
= last_insn
;
2699 if (GET_CODE (pattern
) == SEQUENCE
)
2703 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2705 insn
= XVECEXP (pattern
, 0, i
);
2708 if (XVECLEN (pattern
, 0) < SEQUENCE_RESULT_SIZE
)
2709 sequence_result
[XVECLEN (pattern
, 0)] = pattern
;
2713 insn
= make_insn_raw (pattern
);
2720 /* Emit the insns in a chain starting with INSN.
2721 Return the last insn emitted. */
2731 rtx next
= NEXT_INSN (insn
);
2740 /* Emit the insns in a chain starting with INSN and place them in front of
2741 the insn BEFORE. Return the last insn emitted. */
2744 emit_insns_before (insn
, before
)
2752 rtx next
= NEXT_INSN (insn
);
2753 add_insn_before (insn
, before
);
2761 /* Emit the insns in a chain starting with FIRST and place them in back of
2762 the insn AFTER. Return the last insn emitted. */
2765 emit_insns_after (first
, after
)
2770 register rtx after_after
;
2778 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
2781 after_after
= NEXT_INSN (after
);
2783 NEXT_INSN (after
) = first
;
2784 PREV_INSN (first
) = after
;
2785 NEXT_INSN (last
) = after_after
;
2787 PREV_INSN (after_after
) = last
;
2789 if (after
== last_insn
)
2794 /* Make an insn of code JUMP_INSN with pattern PATTERN
2795 and add it to the end of the doubly-linked list. */
2798 emit_jump_insn (pattern
)
2801 if (GET_CODE (pattern
) == SEQUENCE
)
2802 return emit_insn (pattern
);
2805 register rtx insn
= make_jump_insn_raw (pattern
);
2811 /* Make an insn of code CALL_INSN with pattern PATTERN
2812 and add it to the end of the doubly-linked list. */
2815 emit_call_insn (pattern
)
2818 if (GET_CODE (pattern
) == SEQUENCE
)
2819 return emit_insn (pattern
);
2822 register rtx insn
= make_call_insn_raw (pattern
);
2824 PUT_CODE (insn
, CALL_INSN
);
2829 /* Add the label LABEL to the end of the doubly-linked list. */
2835 /* This can be called twice for the same label
2836 as a result of the confusion that follows a syntax error!
2837 So make it harmless. */
2838 if (INSN_UID (label
) == 0)
2840 INSN_UID (label
) = cur_insn_uid
++;
2846 /* Make an insn of code BARRIER
2847 and add it to the end of the doubly-linked list. */
2852 register rtx barrier
= rtx_alloc (BARRIER
);
2853 INSN_UID (barrier
) = cur_insn_uid
++;
2858 /* Make an insn of code NOTE
2859 with data-fields specified by FILE and LINE
2860 and add it to the end of the doubly-linked list,
2861 but only if line-numbers are desired for debugging info. */
2864 emit_line_note (file
, line
)
2868 if (output_bytecode
)
2870 /* FIXME: for now we do nothing, but eventually we will have to deal with
2871 debugging information. */
2875 emit_filename
= file
;
2879 if (no_line_numbers
)
2883 return emit_note (file
, line
);
2886 /* Make an insn of code NOTE
2887 with data-fields specified by FILE and LINE
2888 and add it to the end of the doubly-linked list.
2889 If it is a line-number NOTE, omit it if it matches the previous one. */
2892 emit_note (file
, line
)
2900 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
2901 && line
== last_linenum
)
2903 last_filename
= file
;
2904 last_linenum
= line
;
2907 if (no_line_numbers
&& line
> 0)
2913 note
= rtx_alloc (NOTE
);
2914 INSN_UID (note
) = cur_insn_uid
++;
2915 NOTE_SOURCE_FILE (note
) = file
;
2916 NOTE_LINE_NUMBER (note
) = line
;
2921 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2924 emit_line_note_force (file
, line
)
2929 return emit_line_note (file
, line
);
2932 /* Cause next statement to emit a line note even if the line number
2933 has not changed. This is used at the beginning of a function. */
2936 force_next_line_note ()
2941 /* Return an indication of which type of insn should have X as a body.
2942 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2948 if (GET_CODE (x
) == CODE_LABEL
)
2950 if (GET_CODE (x
) == CALL
)
2952 if (GET_CODE (x
) == RETURN
)
2954 if (GET_CODE (x
) == SET
)
2956 if (SET_DEST (x
) == pc_rtx
)
2958 else if (GET_CODE (SET_SRC (x
)) == CALL
)
2963 if (GET_CODE (x
) == PARALLEL
)
2966 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
2967 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
2969 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
2970 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
2972 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
2973 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
2979 /* Emit the rtl pattern X as an appropriate kind of insn.
2980 If X is a label, it is simply added into the insn chain. */
2986 enum rtx_code code
= classify_insn (x
);
2988 if (code
== CODE_LABEL
)
2989 return emit_label (x
);
2990 else if (code
== INSN
)
2991 return emit_insn (x
);
2992 else if (code
== JUMP_INSN
)
2994 register rtx insn
= emit_jump_insn (x
);
2995 if (simplejump_p (insn
) || GET_CODE (x
) == RETURN
)
2996 return emit_barrier ();
2999 else if (code
== CALL_INSN
)
3000 return emit_call_insn (x
);
3005 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3010 struct sequence_stack
*tem
;
3012 if (sequence_element_free_list
)
3014 /* Reuse a previously-saved struct sequence_stack. */
3015 tem
= sequence_element_free_list
;
3016 sequence_element_free_list
= tem
->next
;
3019 tem
= (struct sequence_stack
*) permalloc (sizeof (struct sequence_stack
));
3021 tem
->next
= sequence_stack
;
3022 tem
->first
= first_insn
;
3023 tem
->last
= last_insn
;
3024 tem
->sequence_rtl_expr
= sequence_rtl_expr
;
3026 sequence_stack
= tem
;
3032 /* Similarly, but indicate that this sequence will be placed in
3036 start_sequence_for_rtl_expr (t
)
3041 sequence_rtl_expr
= t
;
3044 /* Set up the insn chain starting with FIRST
3045 as the current sequence, saving the previously current one. */
3048 push_to_sequence (first
)
3055 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3061 /* Set up the outer-level insn chain
3062 as the current sequence, saving the previously current one. */
3065 push_topmost_sequence ()
3067 struct sequence_stack
*stack
, *top
;
3071 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3074 first_insn
= top
->first
;
3075 last_insn
= top
->last
;
3076 sequence_rtl_expr
= top
->sequence_rtl_expr
;
3079 /* After emitting to the outer-level insn chain, update the outer-level
3080 insn chain, and restore the previous saved state. */
3083 pop_topmost_sequence ()
3085 struct sequence_stack
*stack
, *top
;
3087 for (stack
= sequence_stack
; stack
; stack
= stack
->next
)
3090 top
->first
= first_insn
;
3091 top
->last
= last_insn
;
3092 /* ??? Why don't we save sequence_rtl_expr here? */
3097 /* After emitting to a sequence, restore previous saved state.
3099 To get the contents of the sequence just made,
3100 you must call `gen_sequence' *before* calling here. */
3105 struct sequence_stack
*tem
= sequence_stack
;
3107 first_insn
= tem
->first
;
3108 last_insn
= tem
->last
;
3109 sequence_rtl_expr
= tem
->sequence_rtl_expr
;
3110 sequence_stack
= tem
->next
;
3112 tem
->next
= sequence_element_free_list
;
3113 sequence_element_free_list
= tem
;
3116 /* Return 1 if currently emitting into a sequence. */
3121 return sequence_stack
!= 0;
3124 /* Generate a SEQUENCE rtx containing the insns already emitted
3125 to the current sequence.
3127 This is how the gen_... function from a DEFINE_EXPAND
3128 constructs the SEQUENCE that it returns. */
3138 /* Count the insns in the chain. */
3140 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3143 /* If only one insn, return its pattern rather than a SEQUENCE.
3144 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3145 the case of an empty list.) */
3147 && (GET_CODE (first_insn
) == INSN
3148 || GET_CODE (first_insn
) == JUMP_INSN
3149 /* Don't discard the call usage field. */
3150 || (GET_CODE (first_insn
) == CALL_INSN
3151 && CALL_INSN_FUNCTION_USAGE (first_insn
) == NULL_RTX
)))
3153 NEXT_INSN (first_insn
) = free_insn
;
3154 free_insn
= first_insn
;
3155 return PATTERN (first_insn
);
3158 /* Put them in a vector. See if we already have a SEQUENCE of the
3159 appropriate length around. */
3160 if (len
< SEQUENCE_RESULT_SIZE
&& (result
= sequence_result
[len
]) != 0)
3161 sequence_result
[len
] = 0;
3164 /* Ensure that this rtl goes in saveable_obstack, since we may
3166 push_obstacks_nochange ();
3167 rtl_in_saveable_obstack ();
3168 result
= gen_rtx (SEQUENCE
, VOIDmode
, rtvec_alloc (len
));
3172 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3173 XVECEXP (result
, 0, i
) = tem
;
3178 /* Initialize data structures and variables in this file
3179 before generating rtl for each function. */
3188 sequence_rtl_expr
= NULL
;
3190 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3193 first_label_num
= label_num
;
3195 sequence_stack
= NULL
;
3197 /* Clear the start_sequence/gen_sequence cache. */
3198 sequence_element_free_list
= 0;
3199 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3200 sequence_result
[i
] = 0;
3203 /* Init the tables that describe all the pseudo regs. */
3205 regno_pointer_flag_length
= LAST_VIRTUAL_REGISTER
+ 101;
3208 = (char *) savealloc (regno_pointer_flag_length
);
3209 bzero (regno_pointer_flag
, regno_pointer_flag_length
);
3212 = (char *) savealloc (regno_pointer_flag_length
);
3213 bzero (regno_pointer_align
, regno_pointer_flag_length
);
3216 = (rtx
*) savealloc (regno_pointer_flag_length
* sizeof (rtx
));
3217 bzero ((char *) regno_reg_rtx
, regno_pointer_flag_length
* sizeof (rtx
));
3219 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3220 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3221 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3222 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3223 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3225 /* Indicate that the virtual registers and stack locations are
3227 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM
) = 1;
3228 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM
) = 1;
3229 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM
) = 1;
3230 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM
) = 1;
3232 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM
) = 1;
3233 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM
) = 1;
3234 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM
) = 1;
3235 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM
) = 1;
3237 #ifdef STACK_BOUNDARY
3238 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3239 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3240 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
)
3241 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3242 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3244 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
)
3245 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3246 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
)
3247 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3248 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
)
3249 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3250 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
)
3251 = STACK_BOUNDARY
/ BITS_PER_UNIT
;
3254 #ifdef INIT_EXPANDERS
3259 /* Create some permanent unique rtl objects shared between all functions.
3260 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3263 init_emit_once (line_numbers
)
3267 enum machine_mode mode
;
3269 no_line_numbers
= ! line_numbers
;
3271 sequence_stack
= NULL
;
3273 /* Compute the word and byte modes. */
3275 byte_mode
= VOIDmode
;
3276 word_mode
= VOIDmode
;
3278 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3279 mode
= GET_MODE_WIDER_MODE (mode
))
3281 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
3282 && byte_mode
== VOIDmode
)
3285 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
3286 && word_mode
== VOIDmode
)
3290 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
3292 /* Create the unique rtx's for certain rtx codes and operand values. */
3294 pc_rtx
= gen_rtx (PC
, VOIDmode
);
3295 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
3297 /* Don't use gen_rtx here since gen_rtx in this case
3298 tries to use these variables. */
3299 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
3301 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] = rtx_alloc (CONST_INT
);
3302 PUT_MODE (const_int_rtx
[i
+ MAX_SAVED_CONST_INT
], VOIDmode
);
3303 INTVAL (const_int_rtx
[i
+ MAX_SAVED_CONST_INT
]) = i
;
3306 /* These four calls obtain some of the rtx expressions made above. */
3307 const0_rtx
= GEN_INT (0);
3308 const1_rtx
= GEN_INT (1);
3309 const2_rtx
= GEN_INT (2);
3310 constm1_rtx
= GEN_INT (-1);
3312 /* This will usually be one of the above constants, but may be a new rtx. */
3313 const_true_rtx
= GEN_INT (STORE_FLAG_VALUE
);
3315 dconst0
= REAL_VALUE_ATOF ("0", DFmode
);
3316 dconst1
= REAL_VALUE_ATOF ("1", DFmode
);
3317 dconst2
= REAL_VALUE_ATOF ("2", DFmode
);
3318 dconstm1
= REAL_VALUE_ATOF ("-1", DFmode
);
3320 for (i
= 0; i
<= 2; i
++)
3322 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
3323 mode
= GET_MODE_WIDER_MODE (mode
))
3325 rtx tem
= rtx_alloc (CONST_DOUBLE
);
3326 union real_extract u
;
3328 bzero ((char *) &u
, sizeof u
); /* Zero any holes in a structure. */
3329 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
3331 bcopy ((char *) &u
, (char *) &CONST_DOUBLE_LOW (tem
), sizeof u
);
3332 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
3333 PUT_MODE (tem
, mode
);
3335 const_tiny_rtx
[i
][(int) mode
] = tem
;
3338 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
3340 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
3341 mode
= GET_MODE_WIDER_MODE (mode
))
3342 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3344 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
3346 mode
= GET_MODE_WIDER_MODE (mode
))
3347 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
3350 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_CC
); mode
!= VOIDmode
;
3351 mode
= GET_MODE_WIDER_MODE (mode
))
3352 const_tiny_rtx
[0][(int) mode
] = const0_rtx
;
3354 stack_pointer_rtx
= gen_rtx (REG
, Pmode
, STACK_POINTER_REGNUM
);
3355 frame_pointer_rtx
= gen_rtx (REG
, Pmode
, FRAME_POINTER_REGNUM
);
3357 if (HARD_FRAME_POINTER_REGNUM
== FRAME_POINTER_REGNUM
)
3358 hard_frame_pointer_rtx
= frame_pointer_rtx
;
3360 hard_frame_pointer_rtx
= gen_rtx (REG
, Pmode
, HARD_FRAME_POINTER_REGNUM
);
3362 if (FRAME_POINTER_REGNUM
== ARG_POINTER_REGNUM
)
3363 arg_pointer_rtx
= frame_pointer_rtx
;
3364 else if (HARD_FRAME_POINTER_REGNUM
== ARG_POINTER_REGNUM
)
3365 arg_pointer_rtx
= hard_frame_pointer_rtx
;
3366 else if (STACK_POINTER_REGNUM
== ARG_POINTER_REGNUM
)
3367 arg_pointer_rtx
= stack_pointer_rtx
;
3369 arg_pointer_rtx
= gen_rtx (REG
, Pmode
, ARG_POINTER_REGNUM
);
3371 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3372 return_address_pointer_rtx
= gen_rtx (REG
, Pmode
,
3373 RETURN_ADDRESS_POINTER_REGNUM
);
3376 /* Create the virtual registers. Do so here since the following objects
3377 might reference them. */
3379 virtual_incoming_args_rtx
= gen_rtx (REG
, Pmode
,
3380 VIRTUAL_INCOMING_ARGS_REGNUM
);
3381 virtual_stack_vars_rtx
= gen_rtx (REG
, Pmode
,
3382 VIRTUAL_STACK_VARS_REGNUM
);
3383 virtual_stack_dynamic_rtx
= gen_rtx (REG
, Pmode
,
3384 VIRTUAL_STACK_DYNAMIC_REGNUM
);
3385 virtual_outgoing_args_rtx
= gen_rtx (REG
, Pmode
,
3386 VIRTUAL_OUTGOING_ARGS_REGNUM
);
3389 struct_value_rtx
= STRUCT_VALUE
;
3391 struct_value_rtx
= gen_rtx (REG
, Pmode
, STRUCT_VALUE_REGNUM
);
3394 #ifdef STRUCT_VALUE_INCOMING
3395 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
3397 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3398 struct_value_incoming_rtx
3399 = gen_rtx (REG
, Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
3401 struct_value_incoming_rtx
= struct_value_rtx
;
3405 #ifdef STATIC_CHAIN_REGNUM
3406 static_chain_rtx
= gen_rtx (REG
, Pmode
, STATIC_CHAIN_REGNUM
);
3408 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3409 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
3410 static_chain_incoming_rtx
= gen_rtx (REG
, Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
3413 static_chain_incoming_rtx
= static_chain_rtx
;
3417 static_chain_rtx
= STATIC_CHAIN
;
3419 #ifdef STATIC_CHAIN_INCOMING
3420 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
3422 static_chain_incoming_rtx
= static_chain_rtx
;
3426 #ifdef PIC_OFFSET_TABLE_REGNUM
3427 pic_offset_table_rtx
= gen_rtx (REG
, Pmode
, PIC_OFFSET_TABLE_REGNUM
);