1 ;; Predicate definitions for MIPS.
2 ;; Copyright (C) 2004, 2007, 2008 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 (define_predicate "const_uns_arith_operand"
21 (and (match_code "const_int")
22 (match_test "SMALL_OPERAND_UNSIGNED (INTVAL (op))")))
24 (define_predicate "uns_arith_operand"
25 (ior (match_operand 0 "const_uns_arith_operand")
26 (match_operand 0 "register_operand")))
28 (define_predicate "const_arith_operand"
29 (and (match_code "const_int")
30 (match_test "SMALL_OPERAND (INTVAL (op))")))
32 (define_predicate "arith_operand"
33 (ior (match_operand 0 "const_arith_operand")
34 (match_operand 0 "register_operand")))
36 (define_predicate "const_uimm6_operand"
37 (and (match_code "const_int")
38 (match_test "UIMM6_OPERAND (INTVAL (op))")))
40 (define_predicate "const_imm10_operand"
41 (and (match_code "const_int")
42 (match_test "IMM10_OPERAND (INTVAL (op))")))
44 (define_predicate "reg_imm10_operand"
45 (ior (match_operand 0 "const_imm10_operand")
46 (match_operand 0 "register_operand")))
48 (define_predicate "sle_operand"
49 (and (match_code "const_int")
50 (match_test "SMALL_OPERAND (INTVAL (op) + 1)")))
52 (define_predicate "sleu_operand"
53 (and (match_operand 0 "sle_operand")
54 (match_test "INTVAL (op) + 1 != 0")))
56 (define_predicate "const_0_operand"
57 (and (match_code "const_int,const_double,const_vector")
58 (match_test "op == CONST0_RTX (GET_MODE (op))")))
60 (define_predicate "reg_or_0_operand"
61 (ior (and (match_operand 0 "const_0_operand")
62 (match_test "!TARGET_MIPS16"))
63 (match_operand 0 "register_operand")))
65 (define_predicate "const_1_operand"
66 (and (match_code "const_int,const_double,const_vector")
67 (match_test "op == CONST1_RTX (GET_MODE (op))")))
69 (define_predicate "reg_or_1_operand"
70 (ior (match_operand 0 "const_1_operand")
71 (match_operand 0 "register_operand")))
73 ;; This is used for indexing into vectors, and hence only accepts const_int.
74 (define_predicate "const_0_or_1_operand"
75 (and (match_code "const_int")
76 (ior (match_test "op == CONST0_RTX (GET_MODE (op))")
77 (match_test "op == CONST1_RTX (GET_MODE (op))"))))
79 (define_predicate "qi_mask_operand"
80 (and (match_code "const_int")
81 (match_test "UINTVAL (op) == 0xff")))
83 (define_predicate "hi_mask_operand"
84 (and (match_code "const_int")
85 (match_test "UINTVAL (op) == 0xffff")))
87 (define_predicate "si_mask_operand"
88 (and (match_code "const_int")
89 (match_test "UINTVAL (op) == 0xffffffff")))
91 (define_predicate "and_load_operand"
92 (ior (match_operand 0 "qi_mask_operand")
93 (match_operand 0 "hi_mask_operand")
94 (match_operand 0 "si_mask_operand")))
96 (define_predicate "low_bitmask_operand"
97 (and (match_test "ISA_HAS_EXT_INS")
98 (match_code "const_int")
99 (match_test "low_bitmask_len (mode, INTVAL (op)) > 16")))
101 (define_predicate "and_reg_operand"
102 (ior (match_operand 0 "register_operand")
103 (and (match_test "!TARGET_MIPS16")
104 (match_operand 0 "const_uns_arith_operand"))
105 (match_operand 0 "low_bitmask_operand")
106 (match_operand 0 "si_mask_operand")))
108 (define_predicate "and_operand"
109 (ior (match_operand 0 "and_load_operand")
110 (match_operand 0 "and_reg_operand")))
112 (define_predicate "d_operand"
113 (and (match_code "reg")
114 (match_test "TARGET_MIPS16
115 ? M16_REG_P (REGNO (op))
116 : GP_REG_P (REGNO (op))")))
118 (define_predicate "lo_operand"
119 (and (match_code "reg")
120 (match_test "REGNO (op) == LO_REGNUM")))
122 (define_predicate "fcc_reload_operand"
123 (and (match_code "reg,subreg")
124 (match_test "ST_REG_P (true_regnum (op))")))
126 (define_special_predicate "pc_or_label_operand"
127 (match_code "pc,label_ref"))
129 (define_predicate "const_call_insn_operand"
130 (match_code "const,symbol_ref,label_ref")
132 enum mips_symbol_type symbol_type;
134 if (!mips_symbolic_constant_p (op, SYMBOL_CONTEXT_CALL, &symbol_type))
139 case SYMBOL_ABSOLUTE:
140 /* We can only use direct calls if we're sure that the target
141 function does not need $25 to be valid on entry. */
142 if (mips_use_pic_fn_addr_reg_p (op))
145 /* If -mlong-calls or if this function has an explicit long_call
146 attribute, we must use register addressing. The
147 SYMBOL_FLAG_LONG_CALL bit is set by mips_encode_section_info. */
148 return !(GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_LONG_CALL_P (op));
150 case SYMBOL_GOT_DISP:
151 /* Without explicit relocs, there is no special syntax for
152 loading the address of a call destination into a register.
153 Using "la $25,foo; jal $25" would prevent the lazy binding
154 of "foo", so keep the address of global symbols with the
156 return !TARGET_EXPLICIT_RELOCS;
163 (define_predicate "call_insn_operand"
164 (ior (match_operand 0 "const_call_insn_operand")
165 (match_operand 0 "register_operand")))
167 ;; A legitimate CONST_INT operand that takes more than one instruction
169 (define_predicate "splittable_const_int_operand"
170 (match_code "const_int")
172 /* When generating mips16 code, LEGITIMATE_CONSTANT_P rejects
173 CONST_INTs that can't be loaded using simple insns. */
177 /* Don't handle multi-word moves this way; we don't want to introduce
178 the individual word-mode moves until after reload. */
179 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
182 /* Otherwise check whether the constant can be loaded in a single
184 return !LUI_INT (op) && !SMALL_INT (op) && !SMALL_INT_UNSIGNED (op);
187 (define_predicate "move_operand"
188 (match_operand 0 "general_operand")
190 enum mips_symbol_type symbol_type;
192 /* The thinking here is as follows:
194 (1) The move expanders should split complex load sequences into
195 individual instructions. Those individual instructions can
196 then be optimized by all rtl passes.
198 (2) The target of pre-reload load sequences should not be used
199 to store temporary results. If the target register is only
200 assigned one value, reload can rematerialize that value
201 on demand, rather than spill it to the stack.
203 (3) If we allowed pre-reload passes like combine and cse to recreate
204 complex load sequences, we would want to be able to split the
205 sequences before reload as well, so that the pre-reload scheduler
206 can see the individual instructions. This falls foul of (2);
207 the splitter would be forced to reuse the target register for
208 intermediate results.
210 (4) We want to define complex load splitters for combine. These
211 splitters can request a temporary scratch register, which avoids
212 the problem in (2). They allow things like:
214 (set (reg T1) (high SYM))
215 (set (reg T2) (low (reg T1) SYM))
216 (set (reg X) (plus (reg T2) (const_int OFFSET)))
220 (set (reg T3) (high SYM+OFFSET))
221 (set (reg X) (lo_sum (reg T3) SYM+OFFSET))
223 if T2 is only used this once. */
224 switch (GET_CODE (op))
227 return !splittable_const_int_operand (op, mode);
234 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
235 && !mips_split_p[symbol_type]);
239 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
240 && !mips_split_hi_p[symbol_type]);
247 (define_predicate "consttable_operand"
248 (match_test "CONSTANT_P (op)"))
250 (define_predicate "symbolic_operand"
251 (match_code "const,symbol_ref,label_ref")
253 enum mips_symbol_type type;
254 return mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type);
257 (define_predicate "absolute_symbolic_operand"
258 (match_code "const,symbol_ref,label_ref")
260 enum mips_symbol_type type;
261 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
262 && type == SYMBOL_ABSOLUTE);
265 (define_predicate "force_to_mem_operand"
266 (match_code "const,symbol_ref,label_ref")
268 enum mips_symbol_type symbol_type;
269 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
270 && symbol_type == SYMBOL_FORCE_TO_MEM);
273 (define_predicate "got_disp_operand"
274 (match_code "const,symbol_ref,label_ref")
276 enum mips_symbol_type type;
277 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
278 && type == SYMBOL_GOT_DISP);
281 (define_predicate "got_page_ofst_operand"
282 (match_code "const,symbol_ref,label_ref")
284 enum mips_symbol_type type;
285 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
286 && type == SYMBOL_GOT_PAGE_OFST);
289 (define_predicate "symbol_ref_operand"
290 (match_code "symbol_ref"))
292 (define_predicate "stack_operand"
293 (and (match_code "mem")
294 (match_test "mips_stack_address_p (XEXP (op, 0), GET_MODE (op))")))
296 (define_predicate "macc_msac_operand"
297 (ior (and (match_code "plus") (match_test "ISA_HAS_MACC"))
298 (and (match_code "minus") (match_test "ISA_HAS_MSAC")))
300 rtx mult = XEXP (op, GET_CODE (op) == PLUS ? 0 : 1);
301 rtx accum = XEXP (op, GET_CODE (op) == PLUS ? 1 : 0);
302 return (GET_CODE (mult) == MULT
303 && REG_P (XEXP (mult, 0))
304 && REG_P (XEXP (mult, 1))
309 (define_predicate "equality_operator"
310 (match_code "eq,ne"))
312 (define_predicate "extend_operator"
313 (match_code "zero_extend,sign_extend"))
315 (define_predicate "trap_comparison_operator"
316 (match_code "eq,ne,lt,ltu,ge,geu"))
318 (define_predicate "order_operator"
319 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu"))
321 ;; For NE, cstore uses sltu instructions in which the first operand is $0.
322 ;; This isn't possible in mips16 code.
324 (define_predicate "mips_cstore_operator"
325 (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu")
326 (and (match_code "ne") (match_test "!TARGET_MIPS16"))))
328 (define_predicate "small_data_pattern"
329 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch")
330 (match_test "mips_small_data_pattern_p (op)")))