gcc/doc/arm-acle-intrinsics.texi

   1 @c Copyright (C) 2013-2014 Free Software Foundation, Inc.
   2 @c This is part of the GCC manual.
   3 @c For copying conditions, see the file gcc.texi.
   4
   5 @subsubsection CRC32 intrinsics
   6
   7 @itemize @bullet
   8 @item uint32_t __crc32b (uint32_t, uint8_t)
   9 @*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}}
  10 @end itemize
  11
  12
  13 @itemize @bullet
  14 @item uint32_t __crc32h (uint32_t, uint16_t)
  15 @*@emph{Form of expected instruction(s):} @code{crc32h @var{r0}, @var{r0}, @var{r0}}
  16 @end itemize
  17
  18
  19 @itemize @bullet
  20 @item uint32_t __crc32w (uint32_t, uint32_t)
  21 @*@emph{Form of expected instruction(s):} @code{crc32w @var{r0}, @var{r0}, @var{r0}}
  22 @end itemize
  23
  24
  25 @itemize @bullet
  26 @item uint32_t __crc32d (uint32_t, uint64_t)
  27 @*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}}
  28 instructions for AArch32. One @code{crc32w @var{w0}, @var{w0}, @var{x0}} instruction for
  29 AArch64.
  30 @end itemize
  31
  32 @itemize @bullet
  33 @item uint32_t __crc32cb (uint32_t, uint8_t)
  34 @*@emph{Form of expected instruction(s):} @code{crc32cb @var{r0}, @var{r0}, @var{r0}}
  35 @end itemize
  36
  37
  38 @itemize @bullet
  39 @item uint32_t __crc32ch (uint32_t, uint16_t)
  40 @*@emph{Form of expected instruction(s):} @code{crc32ch @var{r0}, @var{r0}, @var{r0}}
  41 @end itemize
  42
  43
  44 @itemize @bullet
  45 @item uint32_t __crc32cw (uint32_t, uint32_t)
  46 @*@emph{Form of expected instruction(s):} @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
  47 @end itemize
  48
  49
  50 @itemize @bullet
  51 @item uint32_t __crc32cd (uint32_t, uint64_t)
  52 @*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
  53 instructions for AArch32. One @code{crc32cw @var{w0}, @var{w0}, @var{x0}} instruction for
  54 AArch64.
  55 @end itemize