1 # Copyright
(C
) 1999-2014 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 if { [llength $
args] > 0 } {
45 set options
[list
"additional_flags=[lindex $args 0]"]
49 switch -glob
-- $contents
{
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default
{ set src $
{basename
}[pid
].c
}
64 set compile_type $type
66 assembly
{ set output $
{basename
}[pid
].s
}
67 object
{ set output $
{basename
}[pid
].o
}
68 executable
{ set output $
{basename
}[pid
].exe
}
70 set output $
{basename
}[pid
].s
71 lappend options
"additional_flags=-fdump-$type"
72 set compile_type assembly
78 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
81 set scan_output $output
82 # Don
't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
85 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
89 return [list $lines $scan_output
]
92 proc current_target_name
{ } {
94 if [info exists target_info
(target
,name)] {
95 set answer $target_info
(target
,name)
102 # Implement an effective
-target check
for property PROP by invoking
103 # the Tcl command
ARGS and seeing
if it returns true.
105 proc check_cached_effective_target
{ prop
args } {
108 set target
[current_target_name
]
109 if {![info exists et_cache
($prop
,target
)]
110 || $et_cache
($prop
,target
) != $target
} {
111 verbose
"check_cached_effective_target $prop: checking $target" 2
112 set et_cache
($prop
,target
) $target
113 set et_cache
($prop
,value
) [uplevel eval $
args]
115 set value $et_cache
($prop
,value
)
116 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
120 # Like check_compile
, but
delete the output file and
return true
if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache
{args} {
123 set result
[eval check_compile $
args]
124 set lines
[lindex $result
0]
125 set output
[lindex $result
1]
126 remote_file build
delete $output
127 return [string match
"" $lines]
130 # Like check_no_compiler_messages_nocache
, but
cache the result.
131 # PROP is the
property we
're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP
, otherwise they satisfy it
143 #
if they
do match regular expression PATTERN.
(PATTERN can start
144 # with something like
"[!]" if the regular expression needs to match
145 #
"!" as the first character.)
147 #
Delete the output file before returning. The other arguments are
148 # as
for check_compile.
149 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
152 set result
[eval
[list check_compile $basename
] $
args]
153 set lines
[lindex $result
0]
154 set output
[lindex $result
1]
157 if { [string match
"" $lines] } {
158 set chan
[open
"$output"]
159 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
160 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
164 remote_file build
delete $output
168 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
169 # PROP is the
property we
're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
198 remote_file build delete $output
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking
, and doubles as a prefix
for temporary
205 proc check_runtime
{prop
args} {
208 return [check_cached_effective_target $prop
{
209 eval
[list check_runtime_nocache $prop
] $
args
213 ###############################
214 # proc check_weak_available
{ }
215 ###############################
217 # weak symbols are only supported in some configs
/object formats
218 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
220 proc check_weak_available
{ } {
223 # All mips targets should support it
225 if { [ string first
"mips" $target_cpu ] >= 0 } {
229 # All AIX targets should support it
231 if { [istarget
*-*-aix
*] } {
235 # All solaris2 targets should support it
237 if { [istarget
*-*-solaris2
*] } {
241 # Windows targets Cygwin and MingW32 support it
243 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
247 # HP
-UX
10.X doesn
't support it
249 if { [istarget hppa*-*-hpux10*] } {
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
256 set objformat [gcc_target_object_format]
264 unknown { return -1 }
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
280 return [check_weak_available]
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
300 ###############################
301 # proc check_alias_available { }
302 ###############################
304 # Determine if the target toolchain supports the alias attribute.
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
311 proc check_alias_available { } {
312 global alias_available_saved
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
328 set lines [${tool}_target_compile $src $obj object ""]
330 remote_file build delete $obj
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
339 set objformat [gcc_target_object_format]
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
345 set alias_available_saved 0
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
352 set alias_available_saved -1
357 verbose "check_alias_available returning $alias_available_saved" 2
360 return $alias_available_saved
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
381 void f() __attribute__((ifunc("g")));
385 # Returns true if --gc-sections is supported on the target.
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc
-sections despite whatever
's
393 # advertised by ld's options.
394 if { [istarget alpha
*-*-*]
395 ||
[istarget ia64
-*-*] } {
396 set gc_sections_available_saved
0
400 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
402 if { [board_info target
exists ldflags
]
403 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved
0
408 # VxWorks kernel modules are relocatable objects linked with
-r
,
409 #
while RTP executables are linked with
-q
(--emit
-relocs
).
410 # Both of these options are incompatible with
--gc
-sections.
411 if { [istarget
*-*-vxworks
*] } {
412 set gc_sections_available_saved
0
416 # Check
if the
ld used by gcc supports
--gc
-sections.
417 set gcc_spec
[$
{tool
}_target_compile
"-dumpspecs" "" "none" ""]
418 regsub
".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
421 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved
1
424 set gc_sections_available_saved
0
427 return $gc_sections_available_saved
430 #
Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
433 proc check_effective_target_trampolines
{ } {
434 if [target_info
exists no_trampolines
] {
437 if { [istarget avr
-*-*]
438 ||
[istarget msp430
-*-*]
439 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
440 ||
[istarget hppa64
-hp
-hpux11.23
] } {
446 #
Return 1 if according to target_info struct and explicit target list
447 # target is supposed to keep null pointer checks. This could be due to
448 # use of option fno
-delete-null
-pointer
-checks or hardwired in target.
450 proc check_effective_target_keeps_null_pointer_checks
{ } {
451 if [target_info
exists keeps_null_pointer_checks
] {
454 if { [istarget avr
-*-*] } {
460 #
Return true
if profiling is supported
on the target.
462 proc check_profiling_available
{ test_what
} {
463 global profiling_available_saved
465 verbose
"Profiling argument is <$test_what>" 1
467 # These conditions depend
on the
argument so examine them before
468 # looking at the
cache variable.
470 # Tree profiling requires TLS runtime support.
471 if { $test_what
== "-fprofile-generate" } {
472 if { ![check_effective_target_tls_runtime
] } {
477 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
478 # vendor compiler. We cannot reliably predict the directory where the
479 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
480 # necessarily find mcrt1.o even if we have it.
481 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
485 # We don't yet support profiling
for MIPS16.
486 if { [istarget mips
*-*-*]
487 && ![check_effective_target_nomips16
]
488 && ($test_what
== "-p" || $test_what == "-pg") } {
492 # MinGW does not support
-p.
493 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
497 # cygwin does not support
-p.
498 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
502 # uClibc does not have gcrt1.o.
503 if { [check_effective_target_uclibc
]
504 && ($test_what
== "-p" || $test_what == "-pg") } {
508 # Now examine the
cache variable.
509 if {![info exists profiling_available_saved
]} {
510 # Some targets don
't have any implementation of __bb_init_func or are
511 # missing other needed machinery.
512 if { [istarget aarch64*-*-elf]
513 || [istarget am3*-*-linux*]
514 || [istarget arm*-*-eabi*]
515 || [istarget arm*-*-elf]
516 || [istarget arm*-*-symbianelf*]
517 || [istarget avr-*-*]
518 || [istarget bfin-*-*]
519 || [istarget cris-*-*]
520 || [istarget crisv32-*-*]
521 || [istarget fido-*-elf]
522 || [istarget h8300-*-*]
523 || [istarget lm32-*-*]
524 || [istarget m32c-*-elf]
525 || [istarget m68k-*-elf]
526 || [istarget m68k-*-uclinux*]
527 || [istarget mep-*-elf]
528 || [istarget mips*-*-elf*]
529 || [istarget mmix-*-*]
530 || [istarget mn10300-*-elf*]
531 || [istarget moxie-*-elf*]
532 || [istarget msp430-*-*]
533 || [istarget nds32*-*-elf]
534 || [istarget nios2-*-elf]
535 || [istarget picochip-*-*]
536 || [istarget powerpc-*-eabi*]
537 || [istarget powerpc-*-elf]
539 || [istarget tic6x-*-elf]
540 || [istarget xstormy16-*]
541 || [istarget xtensa*-*-elf]
542 || [istarget *-*-rtems*]
543 || [istarget *-*-vxworks*] } {
544 set profiling_available_saved 0
546 set profiling_available_saved 1
550 return $profiling_available_saved
553 # Check to see if a target is "freestanding". This is as per the definition
554 # in Section 4 of C99 standard. Effectively, it is a target which supports no
555 # extra headers or libraries other than what is considered essential.
556 proc check_effective_target_freestanding { } {
557 if { [istarget picochip-*-*] } then {
564 # Return 1 if target has packed layout of structure members by
565 # default, 0 otherwise. Note that this is slightly different than
566 # whether the target has "natural alignment": both attributes may be
569 proc check_effective_target_default_packed { } {
570 return [check_no_compiler_messages default_packed assembly {
571 struct x { char a; long b; } c;
572 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
576 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
577 # documentation, where the test also comes from.
579 proc check_effective_target_pcc_bitfield_type_matters { } {
580 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
581 # bitfields
, but let
's stick to the example code from the docs.
582 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
583 struct foo1 { char x; char :0; char y; };
584 struct foo2 { char x; int :0; char y; };
585 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
589 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
591 proc add_options_for_tls { flags } {
592 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
593 # libthread, so always pass -pthread for native TLS. Same for AIX.
594 # Need to duplicate native TLS check from
595 # check_effective_target_tls_native to avoid recursion.
596 if { ([istarget powerpc-ibm-aix*]) &&
597 [check_no_messages_and_pattern tls_native "!emutls" assembly {
599 int f (void) { return i; }
600 void g (int j) { i = j; }
602 return "$flags -pthread"
607 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
609 proc check_effective_target_tls {} {
610 return [check_no_compiler_messages tls assembly {
612 int f (void) { return i; }
613 void g (int j) { i = j; }
617 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
619 proc check_effective_target_tls_native {} {
620 # VxWorks uses emulated TLS machinery, but with non-standard helper
621 # functions, so we fail to automatically detect it.
622 if { [istarget *-*-vxworks*] } {
626 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
628 int f (void) { return i; }
629 void g (int j) { i = j; }
633 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
635 proc check_effective_target_tls_emulated {} {
636 # VxWorks uses emulated TLS machinery, but with non-standard helper
637 # functions, so we fail to automatically detect it.
638 if { [istarget *-*-vxworks*] } {
642 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
644 int f (void) { return i; }
645 void g (int j) { i = j; }
649 # Return 1 if TLS executables can run correctly, 0 otherwise.
651 proc check_effective_target_tls_runtime {} {
652 # MSP430 runtime does not have TLS support, but just
653 # running the test below is insufficient to show this.
654 if { [istarget msp430-*-*] } {
657 return [check_runtime tls_runtime {
658 __thread int thr = 0;
659 int main (void) { return thr; }
660 } [add_options_for_tls ""]]
663 # Return 1 if atomic compare-and-swap is supported on 'int'
665 proc check_effective_target_cas_char {} {
666 return [check_no_compiler_messages cas_char assembly {
667 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
673 proc check_effective_target_cas_int {} {
674 return [check_no_compiler_messages cas_int assembly {
675 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
677 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
685 # Return 1 if -ffunction-sections is supported, 0 otherwise.
687 proc check_effective_target_function_sections {} {
688 # Darwin has its own scheme and silently accepts -ffunction-sections.
689 if { [istarget *-*-darwin*] } {
693 return [check_no_compiler_messages functionsections assembly {
695 } "-ffunction-sections"]
698 # Return 1 if instruction scheduling is available, 0 otherwise.
700 proc check_effective_target_scheduling {} {
701 return [check_no_compiler_messages scheduling object {
703 } "-fschedule-insns"]
706 # Return 1 if trapping arithmetic is available, 0 otherwise.
708 proc check_effective_target_trapping {} {
709 return [check_no_compiler_messages trapping object {
710 add (int a, int b) { return a + b; }
714 # Return 1 if compilation with -fgraphite is error-free for trivial
717 proc check_effective_target_fgraphite {} {
718 return [check_no_compiler_messages fgraphite object {
723 # Return 1 if compilation with -fopenmp is error-free for trivial
726 proc check_effective_target_fopenmp {} {
727 return [check_no_compiler_messages fopenmp object {
732 # Return 1 if compilation with -fgnu-tm is error-free for trivial
735 proc check_effective_target_fgnu_tm {} {
736 return [check_no_compiler_messages fgnu_tm object {
741 # Return 1 if the target supports mmap, 0 otherwise.
743 proc check_effective_target_mmap {} {
744 return [check_function_available "mmap"]
747 # Return 1 if the target supports dlopen, 0 otherwise.
748 proc check_effective_target_dlopen {} {
749 return [check_no_compiler_messages dlopen executable {
751 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
752 } [add_options_for_dlopen ""]]
755 proc add_options_for_dlopen { flags } {
759 # Return 1 if the target supports clone, 0 otherwise.
760 proc check_effective_target_clone {} {
761 return [check_function_available "clone"]
764 # Return 1 if the target supports setrlimit, 0 otherwise.
765 proc check_effective_target_setrlimit {} {
766 # Darwin has non-posix compliant RLIMIT_AS
767 if { [istarget *-*-darwin*] } {
770 return [check_function_available "setrlimit"]
773 # Return 1 if the target supports swapcontext, 0 otherwise.
774 proc check_effective_target_swapcontext {} {
775 return [check_no_compiler_messages swapcontext executable {
776 #include <ucontext.h>
779 ucontext_t orig_context,child_context;
780 if (swapcontext(&child_context, &orig_context) < 0) { }
785 # Return 1 if compilation with -pthread is error-free for trivial
788 proc check_effective_target_pthread {} {
789 return [check_no_compiler_messages pthread object {
794 # Return 1 if compilation with -mpe-aligned-commons is error-free
795 # for trivial code, 0 otherwise.
797 proc check_effective_target_pe_aligned_commons {} {
798 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
799 return [check_no_compiler_messages pe_aligned_commons object {
801 } "-mpe-aligned-commons"]
806 # Return 1 if the target supports -static
807 proc check_effective_target_static {} {
808 return [check_no_compiler_messages static executable {
809 int main (void) { return 0; }
813 # Return 1 if the target supports -fstack-protector
814 proc check_effective_target_fstack_protector {} {
815 return [check_runtime fstack_protector {
816 int main (void) { return 0; }
817 } "-fstack-protector"]
820 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
821 # for trivial code, 0 otherwise.
823 proc check_effective_target_freorder {} {
824 return [check_no_compiler_messages freorder object {
826 } "-freorder-blocks-and-partition"]
829 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
830 # emitted, 0 otherwise. Whether a shared library can actually be built is
831 # out of scope for this test.
833 proc check_effective_target_fpic { } {
834 # Note that M68K has a multilib that supports -fpic but not
835 # -fPIC, so we need to check both. We test with a program that
836 # requires GOT references.
837 foreach arg {fpic fPIC} {
838 if [check_no_compiler_messages $arg object {
839 extern int foo (void); extern int bar;
840 int baz (void) { return foo () + bar; }
848 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
850 proc check_effective_target_pie { } {
851 if { [istarget *-*-darwin\[912\]*]
852 || [istarget *-*-linux*]
853 || [istarget *-*-gnu*] } {
859 # Return true if the target supports -mpaired-single (as used on MIPS).
861 proc check_effective_target_mpaired_single { } {
862 return [check_no_compiler_messages mpaired_single object {
867 # Return true if the target has access to FPU instructions.
869 proc check_effective_target_hard_float { } {
870 if { [istarget mips*-*-*] } {
871 return [check_no_compiler_messages hard_float assembly {
872 #if (defined __mips_soft_float || defined __mips16)
878 # This proc is actually checking the availabilty of FPU
879 # support for doubles, so on the RX we must fail if the
880 # 64-bit double multilib has been selected.
881 if { [istarget rx-*-*] } {
883 # return [check_no_compiler_messages hard_float assembly {
884 #if defined __RX_64_BIT_DOUBLES__
890 # The generic test equates hard_float with "no call for adding doubles".
891 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
892 double a (double b, double c) { return b + c; }
896 # Return true if the target is a 64-bit MIPS target.
898 proc check_effective_target_mips64 { } {
899 return [check_no_compiler_messages mips64 assembly {
906 # Return true if the target is a MIPS target that does not produce
909 proc check_effective_target_nomips16 { } {
910 return [check_no_compiler_messages nomips16 object {
914 /* A cheap way of testing for -mflip-mips16. */
915 void foo (void) { asm ("addiu $20,$20,1"); }
916 void bar (void) { asm ("addiu $20,$20,1"); }
921 # Add the options needed for MIPS16 function attributes. At the moment,
922 # we don't support MIPS16 PIC.
924 proc add_options_for_mips16_attribute
{ flags
} {
925 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
928 #
Return true
if we can force a
mode that allows MIPS16 code generation.
929 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
932 proc check_effective_target_mips16_attribute { } {
933 return [check_no_compiler_messages mips16_attribute assembly {
937 #if defined __mips_hard_float \
938 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
939 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
942 } [add_options_for_mips16_attribute ""]]
945 # Return 1 if the target supports long double larger than double when
946 # using the new ABI, 0 otherwise.
948 proc check_effective_target_mips_newabi_large_long_double { } {
949 return [check_no_compiler_messages mips_newabi_large_long_double object {
950 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
954 # Return true if the target is a MIPS target that has access
955 # to the LL and SC instructions.
957 proc check_effective_target_mips_llsc { } {
958 if { ![istarget mips*-*-*] } {
961 # Assume that these instructions are always implemented for
962 # non-elf* targets, via emulation if necessary.
963 if { ![istarget *-*-elf*] } {
966 # Otherwise assume LL/SC support for everything but MIPS I.
967 return [check_no_compiler_messages mips_llsc assembly {
974 # Return true if the target is a MIPS target that uses in-place relocations.
976 proc check_effective_target_mips_rel { } {
977 if { ![istarget mips*-*-*] } {
980 return [check_no_compiler_messages mips_rel object {
981 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
982 || (defined _ABI64 && _MIPS_SIM == _ABI64)
988 # Return true if the target is a MIPS target that uses the EABI.
990 proc check_effective_target_mips_eabi { } {
991 if { ![istarget mips*-*-*] } {
994 return [check_no_compiler_messages mips_eabi object {
1001 # Return 1 if the current multilib does not generate PIC by default.
1003 proc check_effective_target_nonpic { } {
1004 return [check_no_compiler_messages nonpic assembly {
1011 # Return 1 if the target does not use a status wrapper.
1013 proc check_effective_target_unwrapped { } {
1014 if { [target_info needs_status_wrapper] != "" \
1015 && [target_info needs_status_wrapper] != "0" } {
1021 # Return true if iconv is supported on the target. In particular IBM1047.
1023 proc check_iconv_available { test_what } {
1026 # If the tool configuration file has not set libiconv, try "-liconv"
1027 if { ![info exists libiconv] } {
1028 set libiconv "-liconv"
1030 set test_what [lindex $test_what 1]
1031 return [check_runtime_nocache $test_what [subst {
1037 cd = iconv_open ("$test_what", "UTF-8");
1038 if (cd == (iconv_t) -1)
1045 # Return true if Cilk Library is supported on the target.
1046 proc check_libcilkrts_available { } {
1047 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1051 int __cilkrts_set_param (const char *, const char *);
1053 int x = __cilkrts_set_param ("nworkers", "0");
1056 } "-fcilkplus -lcilkrts" ]
1059 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1061 proc check_ascii_locale_available { } {
1065 # Return true if named sections are supported on this target.
1067 proc check_named_sections_available { } {
1068 return [check_no_compiler_messages named_sections assembly {
1069 int __attribute__ ((section("whatever"))) foo;
1073 # Return true if the "naked" function attribute is supported on this target.
1075 proc check_effective_target_naked_functions { } {
1076 return [check_no_compiler_messages naked_functions assembly {
1077 void f() __attribute__((naked));
1081 # Return 1 if the target supports Fortran real kinds larger than real(8),
1084 # When the target name changes, replace the cached result.
1086 proc check_effective_target_fortran_large_real { } {
1087 return [check_no_compiler_messages fortran_large_real executable {
1089 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1096 # Return 1 if the target supports Fortran real kind real(16),
1097 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1098 # this checks for Real(16) only; the other returned real(10) if
1099 # both real(10) and real(16) are available.
1101 # When the target name changes, replace the cached result.
1103 proc check_effective_target_fortran_real_16 { } {
1104 return [check_no_compiler_messages fortran_real_16 executable {
1113 # Return 1 if the target supports Fortran's IEEE modules
,
1116 # When the target
name changes
, replace the cached result.
1118 proc check_effective_target_fortran_ieee
{ flags
} {
1119 return [check_no_compiler_messages fortran_ieee executable
{
1121 use
, intrinsic
:: ieee_features
1127 #
Return 1 if the target supports
SQRT for the
largest floating
-point
1128 # type.
(Some targets lack the libm support
for this FP type.
)
1129 #
On most targets
, this check effectively checks either whether sqrtl is
1130 # available or
on __float128 systems whether libquadmath is installed
,
1131 # which provides sqrtq.
1133 # When the target
name changes
, replace the cached result.
1135 proc check_effective_target_fortran_largest_fp_has_sqrt
{ } {
1136 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable
{
1138 use iso_fortran_env
, only
: real_kinds
1139 integer,parameter
:: maxFP
= real_kinds
(ubound
(real_kinds
,dim
=1))
1140 real
(kind
=maxFP
), volatile
:: x
1148 #
Return 1 if the target supports Fortran
integer kinds larger than
1149 #
integer(8), 0 otherwise.
1151 # When the target
name changes
, replace the cached result.
1153 proc check_effective_target_fortran_large_int
{ } {
1154 return [check_no_compiler_messages fortran_large_int executable
{
1156 integer,parameter
:: k
= selected_int_kind
(range
(0_8
) + 1)
1157 integer(kind
=k
) :: i
1162 #
Return 1 if the target supports Fortran
integer(16), 0 otherwise.
1164 # When the target
name changes
, replace the cached result.
1166 proc check_effective_target_fortran_integer_16
{ } {
1167 return [check_no_compiler_messages fortran_integer_16 executable
{
1174 #
Return 1 if we can statically link libgfortran
, 0 otherwise.
1176 # When the target
name changes
, replace the cached result.
1178 proc check_effective_target_static_libgfortran
{ } {
1179 return [check_no_compiler_messages static_libgfortran executable
{
1186 #
Return 1 if cilk
-plus is supported by the target
, 0 otherwise.
1188 proc check_effective_target_cilkplus
{ } {
1189 # Skip cilk
-plus tests
on int16 and size16 targets
for now.
1190 # The cilk
-plus tests are not generic enough to cover these
1191 # cases and would throw hundreds of FAILs.
1192 if { [check_effective_target_int16
]
1193 ||
![check_effective_target_size32plus
] } {
1197 # Skip AVR
, its RAM is too small and too many tests would fail.
1198 if { [istarget avr
-*-*] } {
1204 proc check_linker_plugin_available
{ } {
1205 return [check_no_compiler_messages_nocache linker_plugin executable
{
1206 int main
() { return 0; }
1207 } "-flto -fuse-linker-plugin"]
1210 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
1211 # otherwise.
Cache the result.
1213 proc check_750cl_hw_available
{ } {
1214 return [check_cached_effective_target
750cl_hw_available
{
1215 #
If this is not the right target
then we can skip the test.
1216 if { ![istarget powerpc
-*paired
*] } {
1219 check_runtime_nocache
750cl_hw_available
{
1223 asm volatile
("ps_mul v0,v0,v0");
1225 asm volatile
("ps_mul 0,0,0");
1234 #
Return 1 if the target OS supports running SSE executables
, 0
1235 # otherwise.
Cache the result.
1237 proc check_sse_os_support_available
{ } {
1238 return [check_cached_effective_target sse_os_support_available
{
1239 #
If this is not the right target
then we can skip the test.
1240 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1242 } elseif
{ [istarget i?
86-*-solaris2
*] } {
1243 # The Solaris
2 kernel doesn
't save and restore SSE registers
1244 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1245 check_runtime_nocache sse_os_support_available {
1248 asm volatile ("movaps %xmm0,%xmm0");
1258 # Return 1 if the target OS supports running AVX executables, 0
1259 # otherwise. Cache the result.
1261 proc check_avx_os_support_available { } {
1262 return [check_cached_effective_target avx_os_support_available {
1263 # If this is not the right target then we can skip the test.
1264 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1267 # Check that OS has AVX and SSE saving enabled.
1268 check_runtime_nocache avx_os_support_available {
1271 unsigned int eax, edx;
1273 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1274 return (eax & 6) != 6;
1281 # Return 1 if the target supports executing SSE instructions, 0
1282 # otherwise. Cache the result.
1284 proc check_sse_hw_available { } {
1285 return [check_cached_effective_target sse_hw_available {
1286 # If this is not the right target then we can skip the test.
1287 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1290 check_runtime_nocache sse_hw_available {
1294 unsigned int eax, ebx, ecx, edx;
1295 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1296 return !(edx & bit_SSE);
1304 # Return 1 if the target supports executing SSE2 instructions, 0
1305 # otherwise. Cache the result.
1307 proc check_sse2_hw_available { } {
1308 return [check_cached_effective_target sse2_hw_available {
1309 # If this is not the right target then we can skip the test.
1310 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1313 check_runtime_nocache sse2_hw_available {
1317 unsigned int eax, ebx, ecx, edx;
1318 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1319 return !(edx & bit_SSE2);
1327 # Return 1 if the target supports executing AVX instructions, 0
1328 # otherwise. Cache the result.
1330 proc check_avx_hw_available { } {
1331 return [check_cached_effective_target avx_hw_available {
1332 # If this is not the right target then we can skip the test.
1333 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1336 check_runtime_nocache avx_hw_available {
1340 unsigned int eax, ebx, ecx, edx;
1341 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1342 return ((ecx & (bit_AVX | bit_OSXSAVE))
1343 != (bit_AVX | bit_OSXSAVE));
1351 # Return 1 if the target supports running SSE executables, 0 otherwise.
1353 proc check_effective_target_sse_runtime { } {
1354 if { [check_effective_target_sse]
1355 && [check_sse_hw_available]
1356 && [check_sse_os_support_available] } {
1362 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1364 proc check_effective_target_sse2_runtime { } {
1365 if { [check_effective_target_sse2]
1366 && [check_sse2_hw_available]
1367 && [check_sse_os_support_available] } {
1373 # Return 1 if the target supports running AVX executables, 0 otherwise.
1375 proc check_effective_target_avx_runtime { } {
1376 if { [check_effective_target_avx]
1377 && [check_avx_hw_available]
1378 && [check_avx_os_support_available] } {
1384 # Return 1 if the target supports executing power8 vector instructions, 0
1385 # otherwise. Cache the result.
1387 proc check_p8vector_hw_available { } {
1388 return [check_cached_effective_target p8vector_hw_available {
1389 # Some simulators are known to not support VSX/power8 instructions.
1390 # For now, disable on Darwin
1391 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1394 set options "-mpower8-vector"
1395 check_runtime_nocache p8vector_hw_available {
1399 asm volatile ("xxlorc vs0,vs0,vs0");
1401 asm volatile ("xxlorc 0,0,0");
1410 # Return 1 if the target supports executing VSX instructions, 0
1411 # otherwise. Cache the result.
1413 proc check_vsx_hw_available { } {
1414 return [check_cached_effective_target vsx_hw_available {
1415 # Some simulators are known to not support VSX instructions.
1416 # For now, disable on Darwin
1417 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1421 check_runtime_nocache vsx_hw_available {
1425 asm volatile ("xxlor vs0,vs0,vs0");
1427 asm volatile ("xxlor 0,0,0");
1436 # Return 1 if the target supports executing AltiVec instructions, 0
1437 # otherwise. Cache the result.
1439 proc check_vmx_hw_available { } {
1440 return [check_cached_effective_target vmx_hw_available {
1441 # Some simulators are known to not support VMX instructions.
1442 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1445 # Most targets don't require special flags
for this test case
, but
1446 # Darwin does. Just to be sure
, make sure VSX is not enabled
for
1447 # the altivec tests.
1448 if { [istarget
*-*-darwin
*]
1449 ||
[istarget
*-*-aix
*] } {
1450 set options
"-maltivec -mno-vsx"
1452 set options
"-mno-vsx"
1454 check_runtime_nocache vmx_hw_available
{
1458 asm volatile
("vor v0,v0,v0");
1460 asm volatile
("vor 0,0,0");
1469 proc check_ppc_recip_hw_available
{ } {
1470 return [check_cached_effective_target ppc_recip_hw_available
{
1471 # Some simulators may not support FRE
/FRES
/FRSQRTE
/FRSQRTES
1472 #
For now
, disable
on Darwin
1473 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
1476 set options
"-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1477 check_runtime_nocache ppc_recip_hw_available
{
1478 volatile double d_recip
, d_rsqrt
, d_four
= 4.0;
1479 volatile float f_recip
, f_rsqrt
, f_four
= 4.0f
;
1482 asm volatile
("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1483 asm volatile
("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1484 asm volatile
("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1485 asm volatile
("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1493 #
Return 1 if the target supports executing AltiVec and Cell PPU
1494 # instructions
, 0 otherwise.
Cache the result.
1496 proc check_effective_target_cell_hw
{ } {
1497 return [check_cached_effective_target cell_hw_available
{
1498 # Some simulators are known to not support VMX and PPU instructions.
1499 if { [istarget powerpc
-*-eabi
*] } {
1502 # Most targets don
't require special flags for this test
1503 # case, but Darwin and AIX do.
1504 if { [istarget *-*-darwin*]
1505 || [istarget *-*-aix*] } {
1506 set options "-maltivec -mcpu=cell"
1508 set options "-mcpu=cell"
1510 check_runtime_nocache cell_hw_available {
1514 asm volatile ("vor v0,v0,v0");
1515 asm volatile ("lvlx v0,r0,r0");
1517 asm volatile ("vor 0,0,0");
1518 asm volatile ("lvlx 0,0,0");
1527 # Return 1 if the target supports executing 64-bit instructions, 0
1528 # otherwise. Cache the result.
1530 proc check_effective_target_powerpc64 { } {
1531 global powerpc64_available_saved
1534 if [info exists powerpc64_available_saved] {
1535 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1537 set powerpc64_available_saved 0
1539 # Some simulators are known to not support powerpc64 instructions.
1540 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1541 verbose "check_effective_target_powerpc64 returning 0" 2
1542 return $powerpc64_available_saved
1545 # Set up, compile, and execute a test program containing a 64-bit
1546 # instruction. Include the current process ID in the file
1547 # names to prevent conflicts with invocations for multiple
1552 set f [open $src "w"]
1553 puts $f "int main() {"
1554 puts $f "#ifdef __MACH__"
1555 puts $f " asm volatile (\"extsw r0,r0\");"
1557 puts $f " asm volatile (\"extsw 0,0\");"
1559 puts $f " return 0; }"
1562 set opts "additional_flags=-mcpu=G5"
1564 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1565 set lines [${tool}_target_compile $src $exe executable "$opts"]
1568 if [string match "" $lines] then {
1569 # No error message, compilation succeeded.
1570 set result [${tool}_load "./$exe" "" ""]
1571 set status [lindex $result 0]
1572 remote_file build delete $exe
1573 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1575 if { $status == "pass" } then {
1576 set powerpc64_available_saved 1
1579 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1583 return $powerpc64_available_saved
1586 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1587 # complex float arguments. This affects gfortran tests that call cabsf
1588 # in libm built by an earlier compiler. Return 1 if libm uses the same
1589 # argument passing as the compiler under test, 0 otherwise.
1591 # When the target name changes, replace the cached result.
1593 proc check_effective_target_broken_cplxf_arg { } {
1594 return [check_cached_effective_target broken_cplxf_arg {
1595 # Skip the work for targets known not to be affected.
1596 if { ![istarget powerpc64-*-linux*] } {
1598 } elseif { ![is-effective-target lp64] } {
1601 check_runtime_nocache broken_cplxf_arg {
1602 #include <complex.h>
1603 extern void abort (void);
1604 float fabsf (float);
1605 float cabsf (_Complex float);
1612 if (fabsf (f - 5.0) > 0.0001)
1621 # Return 1 is this is a TI C6X target supporting C67X instructions
1622 proc check_effective_target_ti_c67x { } {
1623 return [check_no_compiler_messages ti_c67x assembly {
1624 #if !defined(_TMS320C6700)
1630 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1631 proc check_effective_target_ti_c64xp { } {
1632 return [check_no_compiler_messages ti_c64xp assembly {
1633 #if !defined(_TMS320C6400_PLUS)
1640 proc check_alpha_max_hw_available { } {
1641 return [check_runtime alpha_max_hw_available {
1642 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1646 # Returns true iff the FUNCTION is available on the target system.
1647 # (This is essentially a Tcl implementation of Autoconf's
1650 proc check_function_available
{ function
} {
1651 return [check_no_compiler_messages $
{function
}_available \
1657 int main
() { $function
(); }
1661 # Returns true iff
"fork" is available on the target system.
1663 proc check_fork_available
{} {
1664 return [check_function_available
"fork"]
1667 # Returns true iff
"mkfifo" is available on the target system.
1669 proc check_mkfifo_available
{} {
1670 if { [istarget
*-*-cygwin
*] } {
1671 # Cygwin has mkfifo
, but support is incomplete.
1675 return [check_function_available
"mkfifo"]
1678 # Returns true iff
"__cxa_atexit" is used on the target system.
1680 proc check_cxa_atexit_available
{ } {
1681 return [check_cached_effective_target cxa_atexit_available
{
1682 if { [istarget hppa
*-*-hpux10
*] } {
1683 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
1685 } elseif { [istarget *-*-vxworks] } {
1686 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1689 check_runtime_nocache cxa_atexit_available
{
1692 static unsigned
int count;
1709 Y
() { f
(); count = 2; }
1718 int main
() { return 0; }
1724 proc check_effective_target_objc2
{ } {
1725 return [check_no_compiler_messages objc2 object
{
1734 proc check_effective_target_next_runtime
{ } {
1735 return [check_no_compiler_messages objc2 object
{
1736 #ifdef __NEXT_RUNTIME__
1744 #
Return 1 if we
're generating 32-bit code using default options, 0
1747 proc check_effective_target_ilp32 { } {
1748 return [check_no_compiler_messages ilp32 object {
1749 int dummy[sizeof (int) == 4
1750 && sizeof (void *) == 4
1751 && sizeof (long) == 4 ? 1 : -1];
1755 # Return 1 if we're generating ia32 code using default options
, 0
1758 proc check_effective_target_ia32
{ } {
1759 return [check_no_compiler_messages ia32 object
{
1760 int dummy
[sizeof
(int) == 4
1761 && sizeof
(void
*) == 4
1762 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
1766 #
Return 1 if we
're generating x32 code using default options, 0
1769 proc check_effective_target_x32 { } {
1770 return [check_no_compiler_messages x32 object {
1771 int dummy[sizeof (int) == 4
1772 && sizeof (void *) == 4
1773 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1777 # Return 1 if we're generating
32-bit integers using default
1778 # options
, 0 otherwise.
1780 proc check_effective_target_int32
{ } {
1781 return [check_no_compiler_messages int32 object
{
1782 int dummy
[sizeof
(int) == 4 ?
1 : -1];
1786 #
Return 1 if we
're generating 32-bit or larger integers using default
1787 # options, 0 otherwise.
1789 proc check_effective_target_int32plus { } {
1790 return [check_no_compiler_messages int32plus object {
1791 int dummy[sizeof (int) >= 4 ? 1 : -1];
1795 # Return 1 if we're generating
32-bit or larger pointers using default
1796 # options
, 0 otherwise.
1798 proc check_effective_target_ptr32plus
{ } {
1799 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
1800 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
1801 # cannot really hold a
32-bit address
, so we always
return false here.
1802 if { [istarget msp430
-*-*] } {
1806 return [check_no_compiler_messages ptr32plus object
{
1807 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
1811 #
Return 1 if we support
32-bit or larger array and structure sizes
1812 # using default options
, 0 otherwise.
1814 proc check_effective_target_size32plus
{ } {
1815 return [check_no_compiler_messages size32plus object
{
1820 # Returns
1 if we
're generating 16-bit or smaller integers with the
1821 # default options, 0 otherwise.
1823 proc check_effective_target_int16 { } {
1824 return [check_no_compiler_messages int16 object {
1825 int dummy[sizeof (int) < 4 ? 1 : -1];
1829 # Return 1 if we're generating
64-bit code using default options
, 0
1832 proc check_effective_target_lp64
{ } {
1833 return [check_no_compiler_messages lp64 object
{
1834 int dummy
[sizeof
(int) == 4
1835 && sizeof
(void
*) == 8
1836 && sizeof
(long
) == 8 ?
1 : -1];
1840 #
Return 1 if we
're generating 64-bit code using default llp64 options,
1843 proc check_effective_target_llp64 { } {
1844 return [check_no_compiler_messages llp64 object {
1845 int dummy[sizeof (int) == 4
1846 && sizeof (void *) == 8
1847 && sizeof (long long) == 8
1848 && sizeof (long) == 4 ? 1 : -1];
1852 # Return 1 if long and int have different sizes,
1855 proc check_effective_target_long_neq_int { } {
1856 return [check_no_compiler_messages long_ne_int object {
1857 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1861 # Return 1 if the target supports long double larger than double,
1864 proc check_effective_target_large_long_double { } {
1865 return [check_no_compiler_messages large_long_double object {
1866 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1870 # Return 1 if the target supports double larger than float,
1873 proc check_effective_target_large_double { } {
1874 return [check_no_compiler_messages large_double object {
1875 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1879 # Return 1 if the target supports long double of 128 bits,
1882 proc check_effective_target_longdouble128 { } {
1883 return [check_no_compiler_messages longdouble128 object {
1884 int dummy[sizeof(long double) == 16 ? 1 : -1];
1888 # Return 1 if the target supports double of 64 bits,
1891 proc check_effective_target_double64 { } {
1892 return [check_no_compiler_messages double64 object {
1893 int dummy[sizeof(double) == 8 ? 1 : -1];
1897 # Return 1 if the target supports double of at least 64 bits,
1900 proc check_effective_target_double64plus { } {
1901 return [check_no_compiler_messages double64plus object {
1902 int dummy[sizeof(double) >= 8 ? 1 : -1];
1906 # Return 1 if the target supports 'w
' suffix on floating constant
1909 proc check_effective_target_has_w_floating_suffix { } {
1911 if [check_effective_target_c++] {
1912 append opts "-std=gnu++03"
1914 return [check_no_compiler_messages w_fp_suffix object {
1919 # Return 1 if the target supports 'q
' suffix on floating constant
1922 proc check_effective_target_has_q_floating_suffix { } {
1924 if [check_effective_target_c++] {
1925 append opts "-std=gnu++03"
1927 return [check_no_compiler_messages q_fp_suffix object {
1931 # Return 1 if the target supports compiling fixed-point,
1934 proc check_effective_target_fixed_point { } {
1935 return [check_no_compiler_messages fixed_point object {
1936 _Sat _Fract x; _Sat _Accum y;
1940 # Return 1 if the target supports compiling decimal floating point,
1943 proc check_effective_target_dfp_nocache { } {
1944 verbose "check_effective_target_dfp_nocache: compiling source" 2
1945 set ret [check_no_compiler_messages_nocache dfp object {
1946 float x __attribute__((mode(DD)));
1948 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1952 proc check_effective_target_dfprt_nocache { } {
1953 return [check_runtime_nocache dfprt {
1954 typedef float d64 __attribute__((mode(DD)));
1955 d64 x = 1.2df, y = 2.3dd, z;
1956 int main () { z = x + y; return 0; }
1960 # Return 1 if the target supports compiling Decimal Floating Point,
1963 # This won't change
for different subtargets so
cache the result.
1965 proc check_effective_target_dfp
{ } {
1966 return [check_cached_effective_target dfp
{
1967 check_effective_target_dfp_nocache
1971 #
Return 1 if the target supports linking and executing Decimal Floating
1972 # Point
, 0 otherwise.
1974 # This won
't change for different subtargets so cache the result.
1976 proc check_effective_target_dfprt { } {
1977 return [check_cached_effective_target dfprt {
1978 check_effective_target_dfprt_nocache
1982 # Return 1 if the target supports executing DFP hardware instructions,
1983 # 0 otherwise. Cache the result.
1985 proc check_dfp_hw_available { } {
1986 return [check_cached_effective_target dfp_hw_available {
1987 # For now, disable on Darwin
1988 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1991 check_runtime_nocache dfp_hw_available {
1992 volatile _Decimal64 r;
1993 volatile _Decimal64 a = 4.0DD;
1994 volatile _Decimal64 b = 2.0DD;
1997 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
1998 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
1999 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2000 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2003 } "-mcpu=power6 -mhard-float"
2008 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2010 proc check_effective_target_ucn_nocache { } {
2011 # -std=c99 is only valid for C
2012 if [check_effective_target_c] {
2013 set ucnopts "-std=c99"
2015 append ucnopts " -fextended-identifiers"
2016 verbose "check_effective_target_ucn_nocache: compiling source" 2
2017 set ret [check_no_compiler_messages_nocache ucn object {
2020 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2024 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2026 # This won't change
for different subtargets
, so
cache the result.
2028 proc check_effective_target_ucn
{ } {
2029 return [check_cached_effective_target ucn
{
2030 check_effective_target_ucn_nocache
2034 #
Return 1 if the target needs a command line
argument to enable a SIMD
2037 proc check_effective_target_vect_cmdline_needed
{ } {
2038 global et_vect_cmdline_needed_saved
2039 global et_vect_cmdline_needed_target_name
2041 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2042 set et_vect_cmdline_needed_target_name
""
2045 #
If the target has changed since we
set the cached value
, clear it.
2046 set current_target
[current_target_name
]
2047 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2048 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2049 set et_vect_cmdline_needed_target_name $current_target
2050 if { [info exists et_vect_cmdline_needed_saved
] } {
2051 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
2052 unset et_vect_cmdline_needed_saved
2056 if [info exists et_vect_cmdline_needed_saved
] {
2057 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
2059 set et_vect_cmdline_needed_saved
1
2060 if { [istarget alpha
*-*-*]
2061 ||
[istarget ia64
-*-*]
2062 ||
(([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
2063 && ([check_effective_target_x32
]
2064 ||
[check_effective_target_lp64
]))
2065 ||
([istarget powerpc
*-*-*]
2066 && ([check_effective_target_powerpc_spe
]
2067 ||
[check_effective_target_powerpc_altivec
]))
2068 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
2069 ||
[istarget spu
-*-*]
2070 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
2071 ||
[istarget aarch64
*-*-*] } {
2072 set et_vect_cmdline_needed_saved
0
2076 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2077 return $et_vect_cmdline_needed_saved
2080 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
2082 # This won
't change for different subtargets so cache the result.
2084 proc check_effective_target_vect_int { } {
2085 global et_vect_int_saved
2087 if [info exists et_vect_int_saved] {
2088 verbose "check_effective_target_vect_int: using cached result" 2
2090 set et_vect_int_saved 0
2091 if { [istarget i?86-*-*]
2092 || ([istarget powerpc*-*-*]
2093 && ![istarget powerpc-*-linux*paired*])
2094 || [istarget spu-*-*]
2095 || [istarget x86_64-*-*]
2096 || [istarget sparc*-*-*]
2097 || [istarget alpha*-*-*]
2098 || [istarget ia64-*-*]
2099 || [istarget aarch64*-*-*]
2100 || [check_effective_target_arm32]
2101 || ([istarget mips*-*-*]
2102 && [check_effective_target_mips_loongson]) } {
2103 set et_vect_int_saved 1
2107 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2108 return $et_vect_int_saved
2111 # Return 1 if the target supports signed int->float conversion
2114 proc check_effective_target_vect_intfloat_cvt { } {
2115 global et_vect_intfloat_cvt_saved
2117 if [info exists et_vect_intfloat_cvt_saved] {
2118 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2120 set et_vect_intfloat_cvt_saved 0
2121 if { [istarget i?86-*-*]
2122 || ([istarget powerpc*-*-*]
2123 && ![istarget powerpc-*-linux*paired*])
2124 || [istarget x86_64-*-*]
2125 || ([istarget arm*-*-*]
2126 && [check_effective_target_arm_neon_ok])} {
2127 set et_vect_intfloat_cvt_saved 1
2131 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2132 return $et_vect_intfloat_cvt_saved
2135 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
2137 proc check_effective_target_int128
{ } {
2138 return [check_no_compiler_messages int128 object
{
2140 #ifndef __SIZEOF_INT128__
2149 #
Return 1 if the target supports unsigned
int->float conversion
2152 proc check_effective_target_vect_uintfloat_cvt
{ } {
2153 global et_vect_uintfloat_cvt_saved
2155 if [info exists et_vect_uintfloat_cvt_saved
] {
2156 verbose
"check_effective_target_vect_uintfloat_cvt: using cached result" 2
2158 set et_vect_uintfloat_cvt_saved
0
2159 if { [istarget i?
86-*-*]
2160 ||
([istarget powerpc
*-*-*]
2161 && ![istarget powerpc
-*-linux
*paired
*])
2162 ||
[istarget x86_64
-*-*]
2163 ||
[istarget aarch64
*-*-*]
2164 ||
([istarget arm
*-*-*]
2165 && [check_effective_target_arm_neon_ok
])} {
2166 set et_vect_uintfloat_cvt_saved
1
2170 verbose
"check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2171 return $et_vect_uintfloat_cvt_saved
2175 #
Return 1 if the target supports signed float
->int conversion
2178 proc check_effective_target_vect_floatint_cvt
{ } {
2179 global et_vect_floatint_cvt_saved
2181 if [info exists et_vect_floatint_cvt_saved
] {
2182 verbose
"check_effective_target_vect_floatint_cvt: using cached result" 2
2184 set et_vect_floatint_cvt_saved
0
2185 if { [istarget i?
86-*-*]
2186 ||
([istarget powerpc
*-*-*]
2187 && ![istarget powerpc
-*-linux
*paired
*])
2188 ||
[istarget x86_64
-*-*]
2189 ||
([istarget arm
*-*-*]
2190 && [check_effective_target_arm_neon_ok
])} {
2191 set et_vect_floatint_cvt_saved
1
2195 verbose
"check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2196 return $et_vect_floatint_cvt_saved
2199 #
Return 1 if the target supports unsigned float
->int conversion
2202 proc check_effective_target_vect_floatuint_cvt
{ } {
2203 global et_vect_floatuint_cvt_saved
2205 if [info exists et_vect_floatuint_cvt_saved
] {
2206 verbose
"check_effective_target_vect_floatuint_cvt: using cached result" 2
2208 set et_vect_floatuint_cvt_saved
0
2209 if { ([istarget powerpc
*-*-*]
2210 && ![istarget powerpc
-*-linux
*paired
*])
2211 ||
([istarget arm
*-*-*]
2212 && [check_effective_target_arm_neon_ok
])} {
2213 set et_vect_floatuint_cvt_saved
1
2217 verbose
"check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2218 return $et_vect_floatuint_cvt_saved
2221 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
2223 # This won
't change for different subtargets so cache the result.
2225 proc check_effective_target_vect_simd_clones { } {
2226 global et_vect_simd_clones_saved
2228 if [info exists et_vect_simd_clones_saved] {
2229 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2231 set et_vect_simd_clones_saved 0
2232 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2233 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2234 # avx2 clone. Only the right clone for the specified arch will be
2235 # chosen, but still we need to at least be able to assemble
2237 if { [check_effective_target_avx2] } {
2238 set et_vect_simd_clones_saved 1
2243 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2244 return $et_vect_simd_clones_saved
2247 # Return 1 if this is a AArch64 target supporting big endian
2248 proc check_effective_target_aarch64_big_endian { } {
2249 return [check_no_compiler_messages aarch64_big_endian assembly {
2250 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2256 # Return 1 if this is a AArch64 target supporting little endian
2257 proc check_effective_target_aarch64_little_endian { } {
2258 return [check_no_compiler_messages aarch64_little_endian assembly {
2259 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2265 # Return 1 if this is an arm target using 32-bit instructions
2266 proc check_effective_target_arm32 { } {
2267 return [check_no_compiler_messages arm32 assembly {
2268 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2274 # Return 1 if this is an arm target not using Thumb
2275 proc check_effective_target_arm_nothumb { } {
2276 return [check_no_compiler_messages arm_nothumb assembly {
2277 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2283 # Return 1 if this is a little-endian ARM target
2284 proc check_effective_target_arm_little_endian { } {
2285 return [check_no_compiler_messages arm_little_endian assembly {
2286 #if !defined(__arm__) || !defined(__ARMEL__)
2292 # Return 1 if this is an ARM target that only supports aligned vector accesses
2293 proc check_effective_target_arm_vect_no_misalign { } {
2294 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2295 #if !defined(__arm__) \
2296 || (defined(__ARMEL__) \
2297 && (!defined(__thumb__) || defined(__thumb2__)))
2304 # Return 1 if this is an ARM target supporting -mfpu=vfp
2305 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2308 proc check_effective_target_arm_vfp_ok { } {
2309 if { [check_effective_target_arm32] } {
2310 return [check_no_compiler_messages arm_vfp_ok object {
2312 } "-mfpu=vfp -mfloat-abi=softfp"]
2318 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2319 # -mfloat-abi=softfp.
2321 proc check_effective_target_arm_vfp3_ok { } {
2322 if { [check_effective_target_arm32] } {
2323 return [check_no_compiler_messages arm_vfp3_ok object {
2325 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2331 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2332 # -mfloat-abi=softfp.
2333 proc check_effective_target_arm_v8_vfp_ok {} {
2334 if { [check_effective_target_arm32] } {
2335 return [check_no_compiler_messages arm_v8_vfp_ok object {
2338 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2341 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2347 # Return 1 if this is an ARM target supporting -mfpu=vfp
2348 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2351 proc check_effective_target_arm_hard_vfp_ok { } {
2352 if { [check_effective_target_arm32]
2353 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2354 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2355 int main() { return 0;}
2356 } "-mfpu=vfp -mfloat-abi=hard"]
2362 # Return 1 if this is an ARM target that supports DSP multiply with
2363 # current multilib flags.
2365 proc check_effective_target_arm_dsp { } {
2366 return [check_no_compiler_messages arm_dsp assembly {
2367 #ifndef __ARM_FEATURE_DSP
2374 # Return 1 if this is an ARM target that supports unaligned word/halfword
2375 # load/store instructions.
2377 proc check_effective_target_arm_unaligned { } {
2378 return [check_no_compiler_messages arm_unaligned assembly {
2379 #ifndef __ARM_FEATURE_UNALIGNED
2380 #error no unaligned support
2386 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2387 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2388 # incompatible with these options. Also set et_arm_crypto_flags to the
2389 # best options to add.
2391 proc check_effective_target_arm_crypto_ok_nocache { } {
2392 global et_arm_crypto_flags
2393 set et_arm_crypto_flags ""
2394 if { [check_effective_target_arm32] } {
2395 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2396 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2397 #include "arm_neon.h"
2399 foo (uint8x16_t a, uint8x16_t b)
2401 return vaeseq_u8 (a, b);
2404 set et_arm_crypto_flags $flags
2413 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2415 proc check_effective_target_arm_crypto_ok { } {
2416 return [check_cached_effective_target arm_crypto_ok \
2417 check_effective_target_arm_crypto_ok_nocache]
2420 # Add options for crypto extensions.
2421 proc add_options_for_arm_crypto { flags } {
2422 if { ! [check_effective_target_arm_crypto_ok] } {
2425 global et_arm_crypto_flags
2426 return "$flags $et_arm_crypto_flags"
2429 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2430 # or -mfloat-abi=hard, but if one is already specified by the
2431 # multilib, use it. Similarly, if a -mfpu option already enables
2432 # NEON, do not add -mfpu=neon.
2434 proc add_options_for_arm_neon { flags } {
2435 if { ! [check_effective_target_arm_neon_ok] } {
2438 global et_arm_neon_flags
2439 return "$flags $et_arm_neon_flags"
2442 proc add_options_for_arm_v8_vfp { flags } {
2443 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2446 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2449 proc add_options_for_arm_v8_neon { flags } {
2450 if { ! [check_effective_target_arm_v8_neon_ok] } {
2453 global et_arm_v8_neon_flags
2454 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2457 proc add_options_for_arm_crc { flags } {
2458 if { ! [check_effective_target_arm_crc_ok] } {
2461 global et_arm_crc_flags
2462 return "$flags $et_arm_crc_flags"
2465 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2466 # or -mfloat-abi=hard, but if one is already specified by the
2467 # multilib, use it. Similarly, if a -mfpu option already enables
2468 # NEON, do not add -mfpu=neon.
2470 proc add_options_for_arm_neonv2 { flags } {
2471 if { ! [check_effective_target_arm_neonv2_ok] } {
2474 global et_arm_neonv2_flags
2475 return "$flags $et_arm_neonv2_flags"
2478 # Add the options needed for vfp3.
2479 proc add_options_for_arm_vfp3 { flags } {
2480 if { ! [check_effective_target_arm_vfp3_ok] } {
2483 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2486 # Return 1 if this is an ARM target supporting -mfpu=neon
2487 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2488 # incompatible with these options. Also set et_arm_neon_flags to the
2489 # best options to add.
2491 proc check_effective_target_arm_neon_ok_nocache { } {
2492 global et_arm_neon_flags
2493 set et_arm_neon_flags ""
2494 if { [check_effective_target_arm32] } {
2495 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2496 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2497 #include "arm_neon.h"
2500 set et_arm_neon_flags $flags
2509 proc check_effective_target_arm_neon_ok { } {
2510 return [check_cached_effective_target arm_neon_ok \
2511 check_effective_target_arm_neon_ok_nocache]
2514 proc check_effective_target_arm_crc_ok_nocache { } {
2515 global et_arm_crc_flags
2516 set et_arm_crc_flags "-march=armv8-a+crc"
2517 return [check_no_compiler_messages_nocache arm_crc_ok object {
2518 #if !defined (__ARM_FEATURE_CRC32)
2521 } "$et_arm_crc_flags"]
2524 proc check_effective_target_arm_crc_ok { } {
2525 return [check_cached_effective_target arm_crc_ok \
2526 check_effective_target_arm_crc_ok_nocache]
2529 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2530 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2531 # incompatible with these options. Also set et_arm_neon_flags to the
2532 # best options to add.
2534 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2535 global et_arm_neon_fp16_flags
2536 set et_arm_neon_fp16_flags ""
2537 if { [check_effective_target_arm32] } {
2538 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2539 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2540 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2541 #include "arm_neon.h"
2543 foo (float32x4_t arg)
2545 return vcvt_f16_f32 (arg);
2548 set et_arm_neon_fp16_flags $flags
2557 proc check_effective_target_arm_neon_fp16_ok { } {
2558 return [check_cached_effective_target arm_neon_fp16_ok \
2559 check_effective_target_arm_neon_fp16_ok_nocache]
2562 proc add_options_for_arm_neon_fp16 { flags } {
2563 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2566 global et_arm_neon_fp16_flags
2567 return "$flags $et_arm_neon_fp16_flags"
2570 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2571 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2572 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2573 # best options to add.
2575 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2576 global et_arm_v8_neon_flags
2577 set et_arm_v8_neon_flags ""
2578 if { [check_effective_target_arm32] } {
2579 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2580 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2581 #include "arm_neon.h"
2585 __asm__ volatile ("vrintn.f32 q0, q0");
2588 set et_arm_v8_neon_flags $flags
2597 proc check_effective_target_arm_v8_neon_ok { } {
2598 return [check_cached_effective_target arm_v8_neon_ok \
2599 check_effective_target_arm_v8_neon_ok_nocache]
2602 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2603 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2604 # incompatible with these options. Also set et_arm_neonv2_flags to the
2605 # best options to add.
2607 proc check_effective_target_arm_neonv2_ok_nocache { } {
2608 global et_arm_neonv2_flags
2609 set et_arm_neonv2_flags ""
2610 if { [check_effective_target_arm32] } {
2611 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2612 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2613 #include "arm_neon.h"
2615 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2617 return vfma_f32 (a, b, c);
2620 set et_arm_neonv2_flags $flags
2629 proc check_effective_target_arm_neonv2_ok { } {
2630 return [check_cached_effective_target arm_neonv2_ok \
2631 check_effective_target_arm_neonv2_ok_nocache]
2634 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2635 # or -mfloat-abi=hard, but if one is already specified by the
2638 proc add_options_for_arm_fp16 { flags } {
2639 if { ! [check_effective_target_arm_fp16_ok] } {
2642 global et_arm_fp16_flags
2643 return "$flags $et_arm_fp16_flags"
2646 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2647 # Skip multilibs that are incompatible with these options and set
2648 # et_arm_fp16_flags to the best options to add.
2650 proc check_effective_target_arm_fp16_ok_nocache { } {
2651 global et_arm_fp16_flags
2652 set et_arm_fp16_flags ""
2653 if { ! [check_effective_target_arm32] } {
2656 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2657 # Multilib flags would override -mfpu.
2660 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2661 # Must generate floating-point instructions.
2664 if [check_effective_target_arm_hf_eabi] {
2665 # Use existing float-abi and force an fpu which supports fp16
2666 set et_arm_fp16_flags "-mfpu=vfpv4"
2669 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2670 # The existing -mfpu value is OK; use it, but add softfp.
2671 set et_arm_fp16_flags "-mfloat-abi=softfp"
2674 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2675 # macro to check for this support.
2676 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2677 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2680 set et_arm_fp16_flags "$flags"
2687 proc check_effective_target_arm_fp16_ok { } {
2688 return [check_cached_effective_target arm_fp16_ok \
2689 check_effective_target_arm_fp16_ok_nocache]
2692 # Creates a series of routines that return 1 if the given architecture
2693 # can be selected and a routine to give the flags to select that architecture
2694 # Note: Extra flags may be added to disable options from newer compilers
2695 # (Thumb in particular - but others may be added in the future)
2696 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2697 # /* { dg-add-options arm_arch_v5 } */
2698 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2699 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2700 v4t "-march=armv4t" __ARM_ARCH_4T__
2701 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2702 v5t "-march=armv5t" __ARM_ARCH_5T__
2703 v5te "-march=armv5te" __ARM_ARCH_5TE__
2704 v6 "-march=armv6" __ARM_ARCH_6__
2705 v6k "-march=armv6k" __ARM_ARCH_6K__
2706 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2707 v6z "-march=armv6z" __ARM_ARCH_6Z__
2708 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2709 v7a "-march=armv7-a" __ARM_ARCH_7A__
2710 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2711 v7r "-march=armv7-r" __ARM_ARCH_7R__
2712 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2713 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2714 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2715 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2716 proc check_effective_target_arm_arch_FUNC_ok { } {
2717 if { [ string match "*-marm*" "FLAG" ] &&
2718 ![check_effective_target_arm_arm_ok] } {
2721 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2728 proc add_options_for_arm_arch_FUNC { flags } {
2729 return "$flags FLAG"
2732 proc check_effective_target_arm_arch_FUNC_multilib { } {
2733 return [check_runtime arm_arch_FUNC_multilib {
2739 } [add_options_for_arm_arch_FUNC ""]]
2744 # Return 1 if this is an ARM target where -marm causes ARM to be
2747 proc check_effective_target_arm_arm_ok { } {
2748 return [check_no_compiler_messages arm_arm_ok assembly {
2749 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2756 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2759 proc check_effective_target_arm_thumb1_ok { } {
2760 return [check_no_compiler_messages arm_thumb1_ok assembly {
2761 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2767 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2770 proc check_effective_target_arm_thumb2_ok { } {
2771 return [check_no_compiler_messages arm_thumb2_ok assembly {
2772 #if !defined(__thumb2__)
2778 # Return 1 if this is an ARM target where Thumb-1 is used without options
2779 # added by the test.
2781 proc check_effective_target_arm_thumb1 { } {
2782 return [check_no_compiler_messages arm_thumb1 assembly {
2783 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2790 # Return 1 if this is an ARM target where Thumb-2 is used without options
2791 # added by the test.
2793 proc check_effective_target_arm_thumb2 { } {
2794 return [check_no_compiler_messages arm_thumb2 assembly {
2795 #if !defined(__thumb2__)
2802 # Return 1 if this is an ARM target where conditional execution is available.
2804 proc check_effective_target_arm_cond_exec { } {
2805 return [check_no_compiler_messages arm_cond_exec assembly {
2806 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2813 # Return 1 if this is an ARM cortex-M profile cpu
2815 proc check_effective_target_arm_cortex_m { } {
2816 return [check_no_compiler_messages arm_cortex_m assembly {
2817 #if !defined(__ARM_ARCH_7M__) \
2818 && !defined (__ARM_ARCH_7EM__) \
2819 && !defined (__ARM_ARCH_6M__)
2826 # Return 1 if the target supports executing NEON instructions, 0
2827 # otherwise. Cache the result.
2829 proc check_effective_target_arm_neon_hw { } {
2830 return [check_runtime arm_neon_hw_available {
2834 long long a = 0, b = 1;
2835 asm ("vorr %P0, %P1, %P2"
2837 : "0" (a), "w" (b));
2840 } [add_options_for_arm_neon ""]]
2843 proc check_effective_target_arm_neonv2_hw { } {
2844 return [check_runtime arm_neon_hwv2_available {
2845 #include "arm_neon.h"
2849 float32x2_t a, b, c;
2850 asm ("vfma.f32 %P0, %P1, %P2"
2852 : "w" (b), "w" (c));
2855 } [add_options_for_arm_neonv2 ""]]
2858 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2861 proc check_effective_target_arm_v8_neon_hw { } {
2862 return [check_runtime arm_v8_neon_hw_available {
2863 #include "arm_neon.h"
2868 asm ("vrinta.f32 %P0, %P1"
2873 } [add_options_for_arm_v8_neon ""]]
2876 # Return 1 if this is a ARM target with NEON enabled.
2878 proc check_effective_target_arm_neon { } {
2879 if { [check_effective_target_arm32] } {
2880 return [check_no_compiler_messages arm_neon object {
2881 #ifndef __ARM_NEON__
2892 proc check_effective_target_arm_neonv2 { } {
2893 if { [check_effective_target_arm32] } {
2894 return [check_no_compiler_messages arm_neon object {
2895 #ifndef __ARM_NEON__
2898 #ifndef __ARM_FEATURE_FMA
2910 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2911 # the Loongson vector modes.
2913 proc check_effective_target_mips_loongson { } {
2914 return [check_no_compiler_messages loongson assembly {
2915 #if !defined(__mips_loongson_vector_rev)
2921 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
2924 proc check_effective_target_arm_eabi { } {
2925 return [check_no_compiler_messages arm_eabi object {
2926 #ifndef __ARM_EABI__
2934 # Return 1 if this is an ARM target that adheres to the hard-float variant of
2935 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
2937 proc check_effective_target_arm_hf_eabi { } {
2938 return [check_no_compiler_messages arm_hf_eabi object {
2939 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
2940 #error not hard-float EABI
2947 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2948 # Some multilibs may be incompatible with this option.
2950 proc check_effective_target_arm_iwmmxt_ok { } {
2951 if { [check_effective_target_arm32] } {
2952 return [check_no_compiler_messages arm_iwmmxt_ok object {
2960 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
2961 # for an ARM target.
2962 proc check_effective_target_arm_prefer_ldrd_strd { } {
2963 if { ![check_effective_target_arm32] } {
2967 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
2968 void foo (int *p) { p[0] = 1; p[1] = 0;}
2972 # Return 1 if this is a PowerPC target supporting -meabi.
2974 proc check_effective_target_powerpc_eabi_ok { } {
2975 if { [istarget powerpc*-*-*] } {
2976 return [check_no_compiler_messages powerpc_eabi_ok object {
2984 # Return 1 if this is a PowerPC target with floating-point registers.
2986 proc check_effective_target_powerpc_fprs { } {
2987 if { [istarget powerpc*-*-*]
2988 || [istarget rs6000-*-*] } {
2989 return [check_no_compiler_messages powerpc_fprs object {
3001 # Return 1 if this is a PowerPC target with hardware double-precision
3004 proc check_effective_target_powerpc_hard_double { } {
3005 if { [istarget powerpc*-*-*]
3006 || [istarget rs6000-*-*] } {
3007 return [check_no_compiler_messages powerpc_hard_double object {
3019 # Return 1 if this is a PowerPC target supporting -maltivec.
3021 proc check_effective_target_powerpc_altivec_ok { } {
3022 if { ([istarget powerpc*-*-*]
3023 && ![istarget powerpc-*-linux*paired*])
3024 || [istarget rs6000-*-*] } {
3025 # AltiVec is not supported on AIX before 5.3.
3026 if { [istarget powerpc*-*-aix4*]
3027 || [istarget powerpc*-*-aix5.1*]
3028 || [istarget powerpc*-*-aix5.2*] } {
3031 return [check_no_compiler_messages powerpc_altivec_ok object {
3039 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3041 proc check_effective_target_powerpc_p8vector_ok { } {
3042 if { ([istarget powerpc*-*-*]
3043 && ![istarget powerpc-*-linux*paired*])
3044 || [istarget rs6000-*-*] } {
3045 # AltiVec is not supported on AIX before 5.3.
3046 if { [istarget powerpc*-*-aix4*]
3047 || [istarget powerpc*-*-aix5.1*]
3048 || [istarget powerpc*-*-aix5.2*] } {
3051 return [check_no_compiler_messages powerpc_p8vector_ok object {
3054 asm volatile ("xxlorc vs0,vs0,vs0");
3056 asm volatile ("xxlorc 0,0,0");
3060 } "-mpower8-vector"]
3066 # Return 1 if this is a PowerPC target supporting -mvsx
3068 proc check_effective_target_powerpc_vsx_ok { } {
3069 if { ([istarget powerpc*-*-*]
3070 && ![istarget powerpc-*-linux*paired*])
3071 || [istarget rs6000-*-*] } {
3072 # VSX is not supported on AIX before 7.1.
3073 if { [istarget powerpc*-*-aix4*]
3074 || [istarget powerpc*-*-aix5*]
3075 || [istarget powerpc*-*-aix6*] } {
3078 return [check_no_compiler_messages powerpc_vsx_ok object {
3081 asm volatile ("xxlor vs0,vs0,vs0");
3083 asm volatile ("xxlor 0,0,0");
3093 # Return 1 if this is a PowerPC target supporting -mhtm
3095 proc check_effective_target_powerpc_htm_ok { } {
3096 if { ([istarget powerpc*-*-*]
3097 && ![istarget powerpc-*-linux*paired*])
3098 || [istarget rs6000-*-*] } {
3099 # HTM is not supported on AIX yet.
3100 if { [istarget powerpc*-*-aix*] } {
3103 return [check_no_compiler_messages powerpc_htm_ok object {
3105 asm volatile ("tbegin. 0");
3114 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3116 proc check_effective_target_powerpc_ppu_ok { } {
3117 if [check_effective_target_powerpc_altivec_ok] {
3118 return [check_no_compiler_messages cell_asm_available object {
3121 asm volatile ("lvlx v0,v0,v0");
3123 asm volatile ("lvlx 0,0,0");
3133 # Return 1 if this is a PowerPC target that supports SPU.
3135 proc check_effective_target_powerpc_spu { } {
3136 if { [istarget powerpc*-*-linux*] } {
3137 return [check_effective_target_powerpc_altivec_ok]
3143 # Return 1 if this is a PowerPC SPE target. The check includes options
3144 # specified by dg-options for this test, so don't
cache the result.
3146 proc check_effective_target_powerpc_spe_nocache
{ } {
3147 if { [istarget powerpc
*-*-*] } {
3148 return [check_no_compiler_messages_nocache powerpc_spe object
{
3154 } [current_compiler_flags
]]
3160 #
Return 1 if this is a PowerPC target with SPE enabled.
3162 proc check_effective_target_powerpc_spe
{ } {
3163 if { [istarget powerpc
*-*-*] } {
3164 return [check_no_compiler_messages powerpc_spe object
{
3176 #
Return 1 if this is a PowerPC target with Altivec enabled.
3178 proc check_effective_target_powerpc_altivec
{ } {
3179 if { [istarget powerpc
*-*-*] } {
3180 return [check_no_compiler_messages powerpc_altivec object
{
3192 #
Return 1 if this is a PowerPC
405 target. The check includes options
3193 # specified by dg
-options
for this test
, so don
't cache the result.
3195 proc check_effective_target_powerpc_405_nocache { } {
3196 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3197 return [check_no_compiler_messages_nocache powerpc_405 object {
3203 } [current_compiler_flags]]
3209 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3211 proc check_effective_target_powerpc_elfv2 { } {
3212 if { [istarget powerpc*-*-*] } {
3213 return [check_no_compiler_messages powerpc_elfv2 object {
3215 #error not ELF v2 ABI
3225 # Return 1 if this is a SPU target with a toolchain that
3226 # supports automatic overlay generation.
3228 proc check_effective_target_spu_auto_overlay { } {
3229 if { [istarget spu*-*-elf*] } {
3230 return [check_no_compiler_messages spu_auto_overlay executable {
3232 } "-Wl,--auto-overlay" ]
3238 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3239 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3240 # test environment appears to run executables on such a simulator.
3242 proc check_effective_target_ultrasparc_hw { } {
3243 return [check_runtime ultrasparc_hw {
3244 int main() { return 0; }
3245 } "-mcpu=ultrasparc"]
3248 # Return 1 if the test environment supports executing UltraSPARC VIS2
3249 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3251 proc check_effective_target_ultrasparc_vis2_hw { } {
3252 return [check_runtime ultrasparc_vis2_hw {
3253 int main() { __asm__(".word 0x81b00320"); return 0; }
3254 } "-mcpu=ultrasparc3"]
3257 # Return 1 if the test environment supports executing UltraSPARC VIS3
3258 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3260 proc check_effective_target_ultrasparc_vis3_hw { } {
3261 return [check_runtime ultrasparc_vis3_hw {
3262 int main() { __asm__(".word 0x81b00220"); return 0; }
3266 # Return 1 if this is a SPARC-V9 target.
3268 proc check_effective_target_sparc_v9 { } {
3269 if { [istarget sparc*-*-*] } {
3270 return [check_no_compiler_messages sparc_v9 object {
3272 asm volatile ("return %i7+8");
3281 # Return 1 if this is a SPARC target with VIS enabled.
3283 proc check_effective_target_sparc_vis { } {
3284 if { [istarget sparc*-*-*] } {
3285 return [check_no_compiler_messages sparc_vis object {
3297 # Return 1 if the target supports hardware vector shift operation.
3299 proc check_effective_target_vect_shift { } {
3300 global et_vect_shift_saved
3302 if [info exists et_vect_shift_saved] {
3303 verbose "check_effective_target_vect_shift: using cached result" 2
3305 set et_vect_shift_saved 0
3306 if { ([istarget powerpc*-*-*]
3307 && ![istarget powerpc-*-linux*paired*])
3308 || [istarget ia64-*-*]
3309 || [istarget i?86-*-*]
3310 || [istarget x86_64-*-*]
3311 || [istarget aarch64*-*-*]
3312 || [check_effective_target_arm32]
3313 || ([istarget mips*-*-*]
3314 && [check_effective_target_mips_loongson]) } {
3315 set et_vect_shift_saved 1
3319 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3320 return $et_vect_shift_saved
3323 # Return 1 if the target supports vector bswap operations.
3325 proc check_effective_target_vect_bswap { } {
3326 global et_vect_bswap_saved
3328 if [info exists et_vect_bswap_saved] {
3329 verbose "check_effective_target_vect_bswap: using cached result" 2
3331 set et_vect_bswap_saved 0
3332 if { [istarget aarch64*-*-*]
3333 || ([istarget arm*-*-*]
3334 && [check_effective_target_arm_neon])
3336 set et_vect_bswap_saved 1
3340 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3341 return $et_vect_bswap_saved
3344 # Return 1 if the target supports hardware vector shift operation for char.
3346 proc check_effective_target_vect_shift_char { } {
3347 global et_vect_shift_char_saved
3349 if [info exists et_vect_shift_char_saved] {
3350 verbose "check_effective_target_vect_shift_char: using cached result" 2
3352 set et_vect_shift_char_saved 0
3353 if { ([istarget powerpc*-*-*]
3354 && ![istarget powerpc-*-linux*paired*])
3355 || [check_effective_target_arm32] } {
3356 set et_vect_shift_char_saved 1
3360 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3361 return $et_vect_shift_char_saved
3364 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3366 # This can change for different subtargets so do not cache the result.
3368 proc check_effective_target_vect_long { } {
3369 if { [istarget i?86-*-*]
3370 || (([istarget powerpc*-*-*]
3371 && ![istarget powerpc-*-linux*paired*])
3372 && [check_effective_target_ilp32])
3373 || [istarget x86_64-*-*]
3374 || [check_effective_target_arm32]
3375 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3381 verbose "check_effective_target_vect_long: returning $answer" 2
3385 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3387 # This won't change
for different subtargets so
cache the result.
3389 proc check_effective_target_vect_float
{ } {
3390 global et_vect_float_saved
3392 if [info exists et_vect_float_saved
] {
3393 verbose
"check_effective_target_vect_float: using cached result" 2
3395 set et_vect_float_saved
0
3396 if { [istarget i?
86-*-*]
3397 ||
[istarget powerpc
*-*-*]
3398 ||
[istarget spu
-*-*]
3399 ||
[istarget mips
-sde
-elf
]
3400 ||
[istarget mipsisa64
*-*-*]
3401 ||
[istarget x86_64
-*-*]
3402 ||
[istarget ia64
-*-*]
3403 ||
[istarget aarch64
*-*-*]
3404 ||
[check_effective_target_arm32
] } {
3405 set et_vect_float_saved
1
3409 verbose
"check_effective_target_vect_float: returning $et_vect_float_saved" 2
3410 return $et_vect_float_saved
3413 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
3415 # This won
't change for different subtargets so cache the result.
3417 proc check_effective_target_vect_double { } {
3418 global et_vect_double_saved
3420 if [info exists et_vect_double_saved] {
3421 verbose "check_effective_target_vect_double: using cached result" 2
3423 set et_vect_double_saved 0
3424 if { [istarget i?86-*-*]
3425 || [istarget aarch64*-*-*]
3426 || [istarget x86_64-*-*] } {
3427 if { [check_no_compiler_messages vect_double assembly {
3428 #ifdef __tune_atom__
3429 # error No double vectorizer support.
3432 set et_vect_double_saved 1
3434 set et_vect_double_saved 0
3436 } elseif { [istarget spu-*-*] } {
3437 set et_vect_double_saved 1
3441 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3442 return $et_vect_double_saved
3445 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3447 # This won't change
for different subtargets so
cache the result.
3449 proc check_effective_target_vect_long_long
{ } {
3450 global et_vect_long_long_saved
3452 if [info exists et_vect_long_long_saved
] {
3453 verbose
"check_effective_target_vect_long_long: using cached result" 2
3455 set et_vect_long_long_saved
0
3456 if { [istarget i?
86-*-*]
3457 ||
[istarget x86_64
-*-*] } {
3458 set et_vect_long_long_saved
1
3462 verbose
"check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3463 return $et_vect_long_long_saved
3467 #
Return 1 if the target plus current options does not support a vector
3468 #
max instruction
on "int", 0 otherwise.
3470 # This won
't change for different subtargets so cache the result.
3472 proc check_effective_target_vect_no_int_max { } {
3473 global et_vect_no_int_max_saved
3475 if [info exists et_vect_no_int_max_saved] {
3476 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3478 set et_vect_no_int_max_saved 0
3479 if { [istarget sparc*-*-*]
3480 || [istarget spu-*-*]
3481 || [istarget alpha*-*-*]
3482 || ([istarget mips*-*-*]
3483 && [check_effective_target_mips_loongson]) } {
3484 set et_vect_no_int_max_saved 1
3487 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3488 return $et_vect_no_int_max_saved
3491 # Return 1 if the target plus current options does not support a vector
3492 # add instruction on "int", 0 otherwise.
3494 # This won't change
for different subtargets so
cache the result.
3496 proc check_effective_target_vect_no_int_add
{ } {
3497 global et_vect_no_int_add_saved
3499 if [info exists et_vect_no_int_add_saved
] {
3500 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
3502 set et_vect_no_int_add_saved
0
3503 # Alpha only supports vector add
on V8QI and V4HI.
3504 if { [istarget alpha
*-*-*] } {
3505 set et_vect_no_int_add_saved
1
3508 verbose
"check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3509 return $et_vect_no_int_add_saved
3512 #
Return 1 if the target plus current options does not support vector
3513 # bitwise instructions
, 0 otherwise.
3515 # This won
't change for different subtargets so cache the result.
3517 proc check_effective_target_vect_no_bitwise { } {
3518 global et_vect_no_bitwise_saved
3520 if [info exists et_vect_no_bitwise_saved] {
3521 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3523 set et_vect_no_bitwise_saved 0
3525 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3526 return $et_vect_no_bitwise_saved
3529 # Return 1 if the target plus current options supports vector permutation,
3532 # This won't change
for different subtargets so
cache the result.
3534 proc check_effective_target_vect_perm
{ } {
3537 if [info exists et_vect_perm_saved
] {
3538 verbose
"check_effective_target_vect_perm: using cached result" 2
3540 set et_vect_perm_saved
0
3541 if { [is
-effective
-target arm_neon_ok
]
3542 ||
[istarget aarch64
*-*-*]
3543 ||
[istarget powerpc
*-*-*]
3544 ||
[istarget spu
-*-*]
3545 ||
[istarget i?
86-*-*]
3546 ||
[istarget x86_64
-*-*]
3547 ||
([istarget mips
*-*-*]
3548 && [check_effective_target_mpaired_single
]) } {
3549 set et_vect_perm_saved
1
3552 verbose
"check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3553 return $et_vect_perm_saved
3556 #
Return 1 if the target plus current options supports vector permutation
3557 #
on byte
-sized elements
, 0 otherwise.
3559 # This won
't change for different subtargets so cache the result.
3561 proc check_effective_target_vect_perm_byte { } {
3562 global et_vect_perm_byte
3564 if [info exists et_vect_perm_byte_saved] {
3565 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3567 set et_vect_perm_byte_saved 0
3568 if { ([is-effective-target arm_neon_ok]
3569 && [is-effective-target arm_little_endian])
3570 || ([istarget aarch64*-*-*]
3571 && [is-effective-target aarch64_little_endian])
3572 || [istarget powerpc*-*-*]
3573 || [istarget spu-*-*] } {
3574 set et_vect_perm_byte_saved 1
3577 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3578 return $et_vect_perm_byte_saved
3581 # Return 1 if the target plus current options supports vector permutation
3582 # on short-sized elements, 0 otherwise.
3584 # This won't change
for different subtargets so
cache the result.
3586 proc check_effective_target_vect_perm_short
{ } {
3587 global et_vect_perm_short
3589 if [info exists et_vect_perm_short_saved
] {
3590 verbose
"check_effective_target_vect_perm_short: using cached result" 2
3592 set et_vect_perm_short_saved
0
3593 if { ([is
-effective
-target arm_neon_ok
]
3594 && [is
-effective
-target arm_little_endian
])
3595 ||
([istarget aarch64
*-*-*]
3596 && [is
-effective
-target aarch64_little_endian
])
3597 ||
[istarget powerpc
*-*-*]
3598 ||
[istarget spu
-*-*] } {
3599 set et_vect_perm_short_saved
1
3602 verbose
"check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3603 return $et_vect_perm_short_saved
3606 #
Return 1 if the target plus current options supports a vector
3607 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
3609 # This won
't change for different subtargets so cache the result.
3611 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3612 global et_vect_widen_sum_hi_to_si_pattern
3614 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3615 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3617 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3618 if { [istarget powerpc*-*-*]
3619 || [istarget ia64-*-*] } {
3620 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3623 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3624 return $et_vect_widen_sum_hi_to_si_pattern_saved
3627 # Return 1 if the target plus current options supports a vector
3628 # widening summation of *short* args into *int* result, 0 otherwise.
3629 # A target can also support this widening summation if it can support
3630 # promotion (unpacking) from shorts to ints.
3632 # This won't change
for different subtargets so
cache the result.
3634 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
3635 global et_vect_widen_sum_hi_to_si
3637 if [info exists et_vect_widen_sum_hi_to_si_saved
] {
3638 verbose
"check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3640 set et_vect_widen_sum_hi_to_si_saved
[check_effective_target_vect_unpack
]
3641 if { [istarget powerpc
*-*-*]
3642 ||
[istarget ia64
-*-*] } {
3643 set et_vect_widen_sum_hi_to_si_saved
1
3646 verbose
"check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3647 return $et_vect_widen_sum_hi_to_si_saved
3650 #
Return 1 if the target plus current options supports a vector
3651 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
3652 # A target can also support this widening summation
if it can support
3653 # promotion
(unpacking
) from chars to shorts.
3655 # This won
't change for different subtargets so cache the result.
3657 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3658 global et_vect_widen_sum_qi_to_hi
3660 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3661 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3663 set et_vect_widen_sum_qi_to_hi_saved 0
3664 if { [check_effective_target_vect_unpack]
3665 || [check_effective_target_arm_neon_ok]
3666 || [istarget ia64-*-*] } {
3667 set et_vect_widen_sum_qi_to_hi_saved 1
3670 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3671 return $et_vect_widen_sum_qi_to_hi_saved
3674 # Return 1 if the target plus current options supports a vector
3675 # widening summation of *char* args into *int* result, 0 otherwise.
3677 # This won't change
for different subtargets so
cache the result.
3679 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
3680 global et_vect_widen_sum_qi_to_si
3682 if [info exists et_vect_widen_sum_qi_to_si_saved
] {
3683 verbose
"check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3685 set et_vect_widen_sum_qi_to_si_saved
0
3686 if { [istarget powerpc
*-*-*] } {
3687 set et_vect_widen_sum_qi_to_si_saved
1
3690 verbose
"check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3691 return $et_vect_widen_sum_qi_to_si_saved
3694 #
Return 1 if the target plus current options supports a vector
3695 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3696 # A target can also support this widening multplication
if it can support
3697 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
3698 # multiplication of shorts
).
3700 # This won
't change for different subtargets so cache the result.
3703 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3704 global et_vect_widen_mult_qi_to_hi
3706 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3707 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3709 if { [check_effective_target_vect_unpack]
3710 && [check_effective_target_vect_short_mult] } {
3711 set et_vect_widen_mult_qi_to_hi_saved 1
3713 set et_vect_widen_mult_qi_to_hi_saved 0
3715 if { [istarget powerpc*-*-*]
3716 || [istarget aarch64*-*-*]
3717 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3718 set et_vect_widen_mult_qi_to_hi_saved 1
3721 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3722 return $et_vect_widen_mult_qi_to_hi_saved
3725 # Return 1 if the target plus current options supports a vector
3726 # widening multiplication of *short* args into *int* result, 0 otherwise.
3727 # A target can also support this widening multplication if it can support
3728 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3729 # multiplication of ints).
3731 # This won't change
for different subtargets so
cache the result.
3734 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
3735 global et_vect_widen_mult_hi_to_si
3737 if [info exists et_vect_widen_mult_hi_to_si_saved
] {
3738 verbose
"check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3740 if { [check_effective_target_vect_unpack
]
3741 && [check_effective_target_vect_int_mult
] } {
3742 set et_vect_widen_mult_hi_to_si_saved
1
3744 set et_vect_widen_mult_hi_to_si_saved
0
3746 if { [istarget powerpc
*-*-*]
3747 ||
[istarget spu
-*-*]
3748 ||
[istarget ia64
-*-*]
3749 ||
[istarget aarch64
*-*-*]
3750 ||
[istarget i?
86-*-*]
3751 ||
[istarget x86_64
-*-*]
3752 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3753 set et_vect_widen_mult_hi_to_si_saved
1
3756 verbose
"check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3757 return $et_vect_widen_mult_hi_to_si_saved
3760 #
Return 1 if the target plus current options supports a vector
3761 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3763 # This won
't change for different subtargets so cache the result.
3765 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3766 global et_vect_widen_mult_qi_to_hi_pattern
3768 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3769 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3771 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3772 if { [istarget powerpc*-*-*]
3773 || ([istarget arm*-*-*]
3774 && [check_effective_target_arm_neon_ok]
3775 && [check_effective_target_arm_little_endian]) } {
3776 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3779 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3780 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3783 # Return 1 if the target plus current options supports a vector
3784 # widening multiplication of *short* args into *int* result, 0 otherwise.
3786 # This won't change
for different subtargets so
cache the result.
3788 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
3789 global et_vect_widen_mult_hi_to_si_pattern
3791 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
] {
3792 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3794 set et_vect_widen_mult_hi_to_si_pattern_saved
0
3795 if { [istarget powerpc
*-*-*]
3796 ||
[istarget spu
-*-*]
3797 ||
[istarget ia64
-*-*]
3798 ||
[istarget i?
86-*-*]
3799 ||
[istarget x86_64
-*-*]
3800 ||
([istarget arm
*-*-*]
3801 && [check_effective_target_arm_neon_ok
]
3802 && [check_effective_target_arm_little_endian
]) } {
3803 set et_vect_widen_mult_hi_to_si_pattern_saved
1
3806 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3807 return $et_vect_widen_mult_hi_to_si_pattern_saved
3810 #
Return 1 if the target plus current options supports a vector
3811 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
3813 # This won
't change for different subtargets so cache the result.
3815 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
3816 global et_vect_widen_mult_si_to_di_pattern
3818 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
3819 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3821 set et_vect_widen_mult_si_to_di_pattern_saved 0
3822 if {[istarget ia64-*-*]
3823 || [istarget i?86-*-*]
3824 || [istarget x86_64-*-*] } {
3825 set et_vect_widen_mult_si_to_di_pattern_saved 1
3828 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3829 return $et_vect_widen_mult_si_to_di_pattern_saved
3832 # Return 1 if the target plus current options supports a vector
3833 # widening shift, 0 otherwise.
3835 # This won't change
for different subtargets so
cache the result.
3837 proc check_effective_target_vect_widen_shift
{ } {
3838 global et_vect_widen_shift_saved
3840 if [info exists et_vect_shift_saved
] {
3841 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
3843 set et_vect_widen_shift_saved
0
3844 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3845 set et_vect_widen_shift_saved
1
3848 verbose
"check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3849 return $et_vect_widen_shift_saved
3852 #
Return 1 if the target plus current options supports a vector
3853 # dot
-product of signed chars
, 0 otherwise.
3855 # This won
't change for different subtargets so cache the result.
3857 proc check_effective_target_vect_sdot_qi { } {
3858 global et_vect_sdot_qi
3860 if [info exists et_vect_sdot_qi_saved] {
3861 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3863 set et_vect_sdot_qi_saved 0
3864 if { [istarget ia64-*-*] } {
3865 set et_vect_udot_qi_saved 1
3868 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3869 return $et_vect_sdot_qi_saved
3872 # Return 1 if the target plus current options supports a vector
3873 # dot-product of unsigned chars, 0 otherwise.
3875 # This won't change
for different subtargets so
cache the result.
3877 proc check_effective_target_vect_udot_qi
{ } {
3878 global et_vect_udot_qi
3880 if [info exists et_vect_udot_qi_saved
] {
3881 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
3883 set et_vect_udot_qi_saved
0
3884 if { [istarget powerpc
*-*-*]
3885 ||
[istarget ia64
-*-*] } {
3886 set et_vect_udot_qi_saved
1
3889 verbose
"check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3890 return $et_vect_udot_qi_saved
3893 #
Return 1 if the target plus current options supports a vector
3894 # dot
-product of signed shorts
, 0 otherwise.
3896 # This won
't change for different subtargets so cache the result.
3898 proc check_effective_target_vect_sdot_hi { } {
3899 global et_vect_sdot_hi
3901 if [info exists et_vect_sdot_hi_saved] {
3902 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3904 set et_vect_sdot_hi_saved 0
3905 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3906 || [istarget ia64-*-*]
3907 || [istarget i?86-*-*]
3908 || [istarget x86_64-*-*] } {
3909 set et_vect_sdot_hi_saved 1
3912 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3913 return $et_vect_sdot_hi_saved
3916 # Return 1 if the target plus current options supports a vector
3917 # dot-product of unsigned shorts, 0 otherwise.
3919 # This won't change
for different subtargets so
cache the result.
3921 proc check_effective_target_vect_udot_hi
{ } {
3922 global et_vect_udot_hi
3924 if [info exists et_vect_udot_hi_saved
] {
3925 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
3927 set et_vect_udot_hi_saved
0
3928 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*]) } {
3929 set et_vect_udot_hi_saved
1
3932 verbose
"check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3933 return $et_vect_udot_hi_saved
3936 #
Return 1 if the target plus current options supports a vector
3937 # sad operation of unsigned chars
, 0 otherwise.
3939 # This won
't change for different subtargets so cache the result.
3941 proc check_effective_target_vect_usad_char { } {
3942 global et_vect_usad_char
3944 if [info exists et_vect_usad_char_saved] {
3945 verbose "check_effective_target_vect_usad_char: using cached result" 2
3947 set et_vect_usad_char_saved 0
3948 if { ([istarget i?86-*-*]
3949 || [istarget x86_64-*-*]) } {
3950 set et_vect_usad_char_saved 1
3953 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
3954 return $et_vect_usad_char_saved
3957 # Return 1 if the target plus current options supports a vector
3958 # demotion (packing) of shorts (to chars) and ints (to shorts)
3959 # using modulo arithmetic, 0 otherwise.
3961 # This won't change
for different subtargets so
cache the result.
3963 proc check_effective_target_vect_pack_trunc
{ } {
3964 global et_vect_pack_trunc
3966 if [info exists et_vect_pack_trunc_saved
] {
3967 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
3969 set et_vect_pack_trunc_saved
0
3970 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
3971 ||
[istarget i?
86-*-*]
3972 ||
[istarget x86_64
-*-*]
3973 ||
[istarget aarch64
*-*-*]
3974 ||
[istarget spu
-*-*]
3975 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
3976 && [check_effective_target_arm_little_endian
]) } {
3977 set et_vect_pack_trunc_saved
1
3980 verbose
"check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
3981 return $et_vect_pack_trunc_saved
3984 #
Return 1 if the target plus current options supports a vector
3985 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
3987 # This won
't change for different subtargets so cache the result.
3989 proc check_effective_target_vect_unpack { } {
3990 global et_vect_unpack
3992 if [info exists et_vect_unpack_saved] {
3993 verbose "check_effective_target_vect_unpack: using cached result" 2
3995 set et_vect_unpack_saved 0
3996 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
3997 || [istarget i?86-*-*]
3998 || [istarget x86_64-*-*]
3999 || [istarget spu-*-*]
4000 || [istarget ia64-*-*]
4001 || [istarget aarch64*-*-*]
4002 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4003 && [check_effective_target_arm_little_endian]) } {
4004 set et_vect_unpack_saved 1
4007 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4008 return $et_vect_unpack_saved
4011 # Return 1 if the target plus current options does not guarantee
4012 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4014 # This won't change
for different subtargets so
cache the result.
4016 proc check_effective_target_unaligned_stack
{ } {
4017 global et_unaligned_stack_saved
4019 if [info exists et_unaligned_stack_saved
] {
4020 verbose
"check_effective_target_unaligned_stack: using cached result" 2
4022 set et_unaligned_stack_saved
0
4024 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4025 return $et_unaligned_stack_saved
4028 #
Return 1 if the target plus current options does not support a vector
4029 # alignment mechanism
, 0 otherwise.
4031 # This won
't change for different subtargets so cache the result.
4033 proc check_effective_target_vect_no_align { } {
4034 global et_vect_no_align_saved
4036 if [info exists et_vect_no_align_saved] {
4037 verbose "check_effective_target_vect_no_align: using cached result" 2
4039 set et_vect_no_align_saved 0
4040 if { [istarget mipsisa64*-*-*]
4041 || [istarget mips-sde-elf]
4042 || [istarget sparc*-*-*]
4043 || [istarget ia64-*-*]
4044 || [check_effective_target_arm_vect_no_misalign]
4045 || ([istarget mips*-*-*]
4046 && [check_effective_target_mips_loongson]) } {
4047 set et_vect_no_align_saved 1
4050 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4051 return $et_vect_no_align_saved
4054 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4056 # This won't change
for different subtargets so
cache the result.
4058 proc check_effective_target_vect_hw_misalign
{ } {
4059 global et_vect_hw_misalign_saved
4061 if [info exists et_vect_hw_misalign_saved
] {
4062 verbose
"check_effective_target_vect_hw_misalign: using cached result" 2
4064 set et_vect_hw_misalign_saved
0
4065 if { ([istarget x86_64
-*-*]
4066 ||
[istarget aarch64
*-*-*]
4067 ||
[istarget i?
86-*-*]) } {
4068 set et_vect_hw_misalign_saved
1
4071 verbose
"check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4072 return $et_vect_hw_misalign_saved
4076 #
Return 1 if arrays are aligned to the vector alignment
4077 # boundary
, 0 otherwise.
4079 # This won
't change for different subtargets so cache the result.
4081 proc check_effective_target_vect_aligned_arrays { } {
4082 global et_vect_aligned_arrays
4084 if [info exists et_vect_aligned_arrays_saved] {
4085 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4087 set et_vect_aligned_arrays_saved 0
4088 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4089 if { ([is-effective-target lp64]
4090 && ( ![check_avx_available]
4091 || [check_prefer_avx128])) } {
4092 set et_vect_aligned_arrays_saved 1
4095 if [istarget spu-*-*] {
4096 set et_vect_aligned_arrays_saved 1
4099 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4100 return $et_vect_aligned_arrays_saved
4103 # Return 1 if types of size 32 bit or less are naturally aligned
4104 # (aligned to their type-size), 0 otherwise.
4106 # This won't change
for different subtargets so
cache the result.
4108 proc check_effective_target_natural_alignment_32
{ } {
4109 global et_natural_alignment_32
4111 if [info exists et_natural_alignment_32_saved
] {
4112 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
4114 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
4115 set et_natural_alignment_32_saved
1
4116 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
]) } {
4117 set et_natural_alignment_32_saved
0
4120 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4121 return $et_natural_alignment_32_saved
4124 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
4125 # type
-size
), 0 otherwise.
4127 # This won
't change for different subtargets so cache the result.
4129 proc check_effective_target_natural_alignment_64 { } {
4130 global et_natural_alignment_64
4132 if [info exists et_natural_alignment_64_saved] {
4133 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4135 set et_natural_alignment_64_saved 0
4136 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4137 || [istarget spu-*-*] } {
4138 set et_natural_alignment_64_saved 1
4141 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4142 return $et_natural_alignment_64_saved
4145 # Return 1 if all vector types are naturally aligned (aligned to their
4146 # type-size), 0 otherwise.
4148 # This won't change
for different subtargets so
cache the result.
4150 proc check_effective_target_vect_natural_alignment
{ } {
4151 global et_vect_natural_alignment
4153 if [info exists et_vect_natural_alignment_saved
] {
4154 verbose
"check_effective_target_vect_natural_alignment: using cached result" 2
4156 set et_vect_natural_alignment_saved
1
4157 if { [check_effective_target_arm_eabi
] } {
4158 set et_vect_natural_alignment_saved
0
4161 verbose
"check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4162 return $et_vect_natural_alignment_saved
4165 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
4167 # This won
't change for different subtargets so cache the result.
4169 proc check_effective_target_vector_alignment_reachable { } {
4170 global et_vector_alignment_reachable
4172 if [info exists et_vector_alignment_reachable_saved] {
4173 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4175 if { [check_effective_target_vect_aligned_arrays]
4176 || [check_effective_target_natural_alignment_32] } {
4177 set et_vector_alignment_reachable_saved 1
4179 set et_vector_alignment_reachable_saved 0
4182 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4183 return $et_vector_alignment_reachable_saved
4186 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4188 # This won't change
for different subtargets so
cache the result.
4190 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
4191 global et_vector_alignment_reachable_for_64bit
4193 if [info exists et_vector_alignment_reachable_for_64bit_saved
] {
4194 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4196 if { [check_effective_target_vect_aligned_arrays
]
4197 ||
[check_effective_target_natural_alignment_64
] } {
4198 set et_vector_alignment_reachable_for_64bit_saved
1
4200 set et_vector_alignment_reachable_for_64bit_saved
0
4203 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4204 return $et_vector_alignment_reachable_for_64bit_saved
4207 #
Return 1 if the target only requires element alignment
for vector accesses
4209 proc check_effective_target_vect_element_align
{ } {
4210 global et_vect_element_align
4212 if [info exists et_vect_element_align
] {
4213 verbose
"check_effective_target_vect_element_align: using cached result" 2
4215 set et_vect_element_align
0
4216 if { ([istarget arm
*-*-*]
4217 && ![check_effective_target_arm_vect_no_misalign
])
4218 ||
[check_effective_target_vect_hw_misalign
] } {
4219 set et_vect_element_align
1
4223 verbose
"check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4224 return $et_vect_element_align
4227 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
4229 proc check_effective_target_vect_condition
{ } {
4230 global et_vect_cond_saved
4232 if [info exists et_vect_cond_saved
] {
4233 verbose
"check_effective_target_vect_cond: using cached result" 2
4235 set et_vect_cond_saved
0
4236 if { [istarget aarch64
*-*-*]
4237 ||
[istarget powerpc
*-*-*]
4238 ||
[istarget ia64
-*-*]
4239 ||
[istarget i?
86-*-*]
4240 ||
[istarget spu
-*-*]
4241 ||
[istarget x86_64
-*-*]
4242 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
4243 set et_vect_cond_saved
1
4247 verbose
"check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4248 return $et_vect_cond_saved
4251 #
Return 1 if the target supports vector conditional operations where
4252 # the comparison has different type from the lhs
, 0 otherwise.
4254 proc check_effective_target_vect_cond_mixed
{ } {
4255 global et_vect_cond_mixed_saved
4257 if [info exists et_vect_cond_mixed_saved
] {
4258 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
4260 set et_vect_cond_mixed_saved
0
4261 if { [istarget i?
86-*-*]
4262 ||
[istarget x86_64
-*-*]
4263 ||
[istarget powerpc
*-*-*] } {
4264 set et_vect_cond_mixed_saved
1
4268 verbose
"check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4269 return $et_vect_cond_mixed_saved
4272 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
4274 proc check_effective_target_vect_char_mult
{ } {
4275 global et_vect_char_mult_saved
4277 if [info exists et_vect_char_mult_saved
] {
4278 verbose
"check_effective_target_vect_char_mult: using cached result" 2
4280 set et_vect_char_mult_saved
0
4281 if { [istarget aarch64
*-*-*]
4282 ||
[istarget ia64
-*-*]
4283 ||
[istarget i?
86-*-*]
4284 ||
[istarget x86_64
-*-*]
4285 ||
[check_effective_target_arm32
] } {
4286 set et_vect_char_mult_saved
1
4290 verbose
"check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4291 return $et_vect_char_mult_saved
4294 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
4296 proc check_effective_target_vect_short_mult
{ } {
4297 global et_vect_short_mult_saved
4299 if [info exists et_vect_short_mult_saved
] {
4300 verbose
"check_effective_target_vect_short_mult: using cached result" 2
4302 set et_vect_short_mult_saved
0
4303 if { [istarget ia64
-*-*]
4304 ||
[istarget spu
-*-*]
4305 ||
[istarget i?
86-*-*]
4306 ||
[istarget x86_64
-*-*]
4307 ||
[istarget powerpc
*-*-*]
4308 ||
[istarget aarch64
*-*-*]
4309 ||
[check_effective_target_arm32
]
4310 ||
([istarget mips
*-*-*]
4311 && [check_effective_target_mips_loongson
]) } {
4312 set et_vect_short_mult_saved
1
4316 verbose
"check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4317 return $et_vect_short_mult_saved
4320 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
4322 proc check_effective_target_vect_int_mult
{ } {
4323 global et_vect_int_mult_saved
4325 if [info exists et_vect_int_mult_saved
] {
4326 verbose
"check_effective_target_vect_int_mult: using cached result" 2
4328 set et_vect_int_mult_saved
0
4329 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
4330 ||
[istarget spu
-*-*]
4331 ||
[istarget i?
86-*-*]
4332 ||
[istarget x86_64
-*-*]
4333 ||
[istarget ia64
-*-*]
4334 ||
[istarget aarch64
*-*-*]
4335 ||
[check_effective_target_arm32
] } {
4336 set et_vect_int_mult_saved
1
4340 verbose
"check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4341 return $et_vect_int_mult_saved
4344 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
4346 proc check_effective_target_vect_extract_even_odd
{ } {
4347 global et_vect_extract_even_odd_saved
4349 if [info exists et_vect_extract_even_odd_saved
] {
4350 verbose
"check_effective_target_vect_extract_even_odd: using cached result" 2
4352 set et_vect_extract_even_odd_saved
0
4353 if { [istarget aarch64
*-*-*]
4354 ||
[istarget powerpc
*-*-*]
4355 ||
[is
-effective
-target arm_neon_ok
]
4356 ||
[istarget i?
86-*-*]
4357 ||
[istarget x86_64
-*-*]
4358 ||
[istarget ia64
-*-*]
4359 ||
[istarget spu
-*-*]
4360 ||
([istarget mips
*-*-*]
4361 && [check_effective_target_mpaired_single
]) } {
4362 set et_vect_extract_even_odd_saved
1
4366 verbose
"check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4367 return $et_vect_extract_even_odd_saved
4370 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
4372 proc check_effective_target_vect_interleave
{ } {
4373 global et_vect_interleave_saved
4375 if [info exists et_vect_interleave_saved
] {
4376 verbose
"check_effective_target_vect_interleave: using cached result" 2
4378 set et_vect_interleave_saved
0
4379 if { [istarget aarch64
*-*-*]
4380 ||
[istarget powerpc
*-*-*]
4381 ||
[is
-effective
-target arm_neon_ok
]
4382 ||
[istarget i?
86-*-*]
4383 ||
[istarget x86_64
-*-*]
4384 ||
[istarget ia64
-*-*]
4385 ||
[istarget spu
-*-*]
4386 ||
([istarget mips
*-*-*]
4387 && [check_effective_target_mpaired_single
]) } {
4388 set et_vect_interleave_saved
1
4392 verbose
"check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4393 return $et_vect_interleave_saved
4396 foreach N
{2 3 4 8} {
4397 eval
[string map
[list N $N
] {
4398 #
Return 1 if the target supports
2-vector interleaving
4399 proc check_effective_target_vect_stridedN
{ } {
4400 global et_vect_stridedN_saved
4402 if [info exists et_vect_stridedN_saved
] {
4403 verbose
"check_effective_target_vect_stridedN: using cached result" 2
4405 set et_vect_stridedN_saved
0
4407 && [check_effective_target_vect_interleave
]
4408 && [check_effective_target_vect_extract_even_odd
] } {
4409 set et_vect_stridedN_saved
1
4411 if { ([istarget arm
*-*-*]
4412 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
4413 set et_vect_stridedN_saved
1
4417 verbose
"check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4418 return $et_vect_stridedN_saved
4423 #
Return 1 if the target supports multiple vector sizes
4425 proc check_effective_target_vect_multiple_sizes
{ } {
4426 global et_vect_multiple_sizes_saved
4428 set et_vect_multiple_sizes_saved
0
4429 if { ([istarget aarch64
*-*-*]
4430 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])) } {
4431 set et_vect_multiple_sizes_saved
1
4433 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
4434 if { ([check_avx_available
] && ![check_prefer_avx128
]) } {
4435 set et_vect_multiple_sizes_saved
1
4439 verbose
"check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4440 return $et_vect_multiple_sizes_saved
4443 #
Return 1 if the target supports vectors of
64 bits.
4445 proc check_effective_target_vect64
{ } {
4446 global et_vect64_saved
4448 if [info exists et_vect64_saved
] {
4449 verbose
"check_effective_target_vect64: using cached result" 2
4451 set et_vect64_saved
0
4452 if { ([istarget arm
*-*-*]
4453 && [check_effective_target_arm_neon_ok
]
4454 && [check_effective_target_arm_little_endian
]) } {
4455 set et_vect64_saved
1
4459 verbose
"check_effective_target_vect64: returning $et_vect64_saved" 2
4460 return $et_vect64_saved
4463 #
Return 1 if the target supports vector copysignf calls.
4465 proc check_effective_target_vect_call_copysignf
{ } {
4466 global et_vect_call_copysignf_saved
4468 if [info exists et_vect_call_copysignf_saved
] {
4469 verbose
"check_effective_target_vect_call_copysignf: using cached result" 2
4471 set et_vect_call_copysignf_saved
0
4472 if { [istarget i?
86-*-*]
4473 ||
[istarget x86_64
-*-*]
4474 ||
[istarget powerpc
*-*-*] } {
4475 set et_vect_call_copysignf_saved
1
4479 verbose
"check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4480 return $et_vect_call_copysignf_saved
4483 #
Return 1 if the target supports vector sqrtf calls.
4485 proc check_effective_target_vect_call_sqrtf
{ } {
4486 global et_vect_call_sqrtf_saved
4488 if [info exists et_vect_call_sqrtf_saved
] {
4489 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
4491 set et_vect_call_sqrtf_saved
0
4492 if { [istarget aarch64
*-*-*]
4493 ||
[istarget i?
86-*-*]
4494 ||
[istarget x86_64
-*-*]
4495 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
]) } {
4496 set et_vect_call_sqrtf_saved
1
4500 verbose
"check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4501 return $et_vect_call_sqrtf_saved
4504 #
Return 1 if the target supports vector lrint calls.
4506 proc check_effective_target_vect_call_lrint
{ } {
4507 set et_vect_call_lrint
0
4508 if { ([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) && [check_effective_target_ilp32
] } {
4509 set et_vect_call_lrint
1
4512 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4513 return $et_vect_call_lrint
4516 #
Return 1 if the target supports vector btrunc calls.
4518 proc check_effective_target_vect_call_btrunc
{ } {
4519 global et_vect_call_btrunc_saved
4521 if [info exists et_vect_call_btrunc_saved
] {
4522 verbose
"check_effective_target_vect_call_btrunc: using cached result" 2
4524 set et_vect_call_btrunc_saved
0
4525 if { [istarget aarch64
*-*-*] } {
4526 set et_vect_call_btrunc_saved
1
4530 verbose
"check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4531 return $et_vect_call_btrunc_saved
4534 #
Return 1 if the target supports vector btruncf calls.
4536 proc check_effective_target_vect_call_btruncf
{ } {
4537 global et_vect_call_btruncf_saved
4539 if [info exists et_vect_call_btruncf_saved
] {
4540 verbose
"check_effective_target_vect_call_btruncf: using cached result" 2
4542 set et_vect_call_btruncf_saved
0
4543 if { [istarget aarch64
*-*-*] } {
4544 set et_vect_call_btruncf_saved
1
4548 verbose
"check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4549 return $et_vect_call_btruncf_saved
4552 #
Return 1 if the target supports vector ceil calls.
4554 proc check_effective_target_vect_call_ceil
{ } {
4555 global et_vect_call_ceil_saved
4557 if [info exists et_vect_call_ceil_saved
] {
4558 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
4560 set et_vect_call_ceil_saved
0
4561 if { [istarget aarch64
*-*-*] } {
4562 set et_vect_call_ceil_saved
1
4566 verbose
"check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4567 return $et_vect_call_ceil_saved
4570 #
Return 1 if the target supports vector ceilf calls.
4572 proc check_effective_target_vect_call_ceilf
{ } {
4573 global et_vect_call_ceilf_saved
4575 if [info exists et_vect_call_ceilf_saved
] {
4576 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
4578 set et_vect_call_ceilf_saved
0
4579 if { [istarget aarch64
*-*-*] } {
4580 set et_vect_call_ceilf_saved
1
4584 verbose
"check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4585 return $et_vect_call_ceilf_saved
4588 #
Return 1 if the target supports vector floor calls.
4590 proc check_effective_target_vect_call_floor
{ } {
4591 global et_vect_call_floor_saved
4593 if [info exists et_vect_call_floor_saved
] {
4594 verbose
"check_effective_target_vect_call_floor: using cached result" 2
4596 set et_vect_call_floor_saved
0
4597 if { [istarget aarch64
*-*-*] } {
4598 set et_vect_call_floor_saved
1
4602 verbose
"check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4603 return $et_vect_call_floor_saved
4606 #
Return 1 if the target supports vector floorf calls.
4608 proc check_effective_target_vect_call_floorf
{ } {
4609 global et_vect_call_floorf_saved
4611 if [info exists et_vect_call_floorf_saved
] {
4612 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
4614 set et_vect_call_floorf_saved
0
4615 if { [istarget aarch64
*-*-*] } {
4616 set et_vect_call_floorf_saved
1
4620 verbose
"check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4621 return $et_vect_call_floorf_saved
4624 #
Return 1 if the target supports vector lceil calls.
4626 proc check_effective_target_vect_call_lceil
{ } {
4627 global et_vect_call_lceil_saved
4629 if [info exists et_vect_call_lceil_saved
] {
4630 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
4632 set et_vect_call_lceil_saved
0
4633 if { [istarget aarch64
*-*-*] } {
4634 set et_vect_call_lceil_saved
1
4638 verbose
"check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4639 return $et_vect_call_lceil_saved
4642 #
Return 1 if the target supports vector lfloor calls.
4644 proc check_effective_target_vect_call_lfloor
{ } {
4645 global et_vect_call_lfloor_saved
4647 if [info exists et_vect_call_lfloor_saved
] {
4648 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
4650 set et_vect_call_lfloor_saved
0
4651 if { [istarget aarch64
*-*-*] } {
4652 set et_vect_call_lfloor_saved
1
4656 verbose
"check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4657 return $et_vect_call_lfloor_saved
4660 #
Return 1 if the target supports vector nearbyint calls.
4662 proc check_effective_target_vect_call_nearbyint
{ } {
4663 global et_vect_call_nearbyint_saved
4665 if [info exists et_vect_call_nearbyint_saved
] {
4666 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
4668 set et_vect_call_nearbyint_saved
0
4669 if { [istarget aarch64
*-*-*] } {
4670 set et_vect_call_nearbyint_saved
1
4674 verbose
"check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4675 return $et_vect_call_nearbyint_saved
4678 #
Return 1 if the target supports vector nearbyintf calls.
4680 proc check_effective_target_vect_call_nearbyintf
{ } {
4681 global et_vect_call_nearbyintf_saved
4683 if [info exists et_vect_call_nearbyintf_saved
] {
4684 verbose
"check_effective_target_vect_call_nearbyintf: using cached result" 2
4686 set et_vect_call_nearbyintf_saved
0
4687 if { [istarget aarch64
*-*-*] } {
4688 set et_vect_call_nearbyintf_saved
1
4692 verbose
"check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4693 return $et_vect_call_nearbyintf_saved
4696 #
Return 1 if the target supports vector
round calls.
4698 proc check_effective_target_vect_call_round
{ } {
4699 global et_vect_call_round_saved
4701 if [info exists et_vect_call_round_saved
] {
4702 verbose
"check_effective_target_vect_call_round: using cached result" 2
4704 set et_vect_call_round_saved
0
4705 if { [istarget aarch64
*-*-*] } {
4706 set et_vect_call_round_saved
1
4710 verbose
"check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4711 return $et_vect_call_round_saved
4714 #
Return 1 if the target supports vector roundf calls.
4716 proc check_effective_target_vect_call_roundf
{ } {
4717 global et_vect_call_roundf_saved
4719 if [info exists et_vect_call_roundf_saved
] {
4720 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
4722 set et_vect_call_roundf_saved
0
4723 if { [istarget aarch64
*-*-*] } {
4724 set et_vect_call_roundf_saved
1
4728 verbose
"check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4729 return $et_vect_call_roundf_saved
4732 #
Return 1 if the target supports section
-anchors
4734 proc check_effective_target_section_anchors
{ } {
4735 global et_section_anchors_saved
4737 if [info exists et_section_anchors_saved
] {
4738 verbose
"check_effective_target_section_anchors: using cached result" 2
4740 set et_section_anchors_saved
0
4741 if { [istarget powerpc
*-*-*]
4742 ||
[istarget arm
*-*-*] } {
4743 set et_section_anchors_saved
1
4747 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4748 return $et_section_anchors_saved
4751 #
Return 1 if the target supports atomic operations
on "int_128" values.
4753 proc check_effective_target_sync_int_128
{ } {
4754 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4755 && ![is
-effective
-target ia32
] } {
4762 #
Return 1 if the target supports atomic operations
on "int_128" values
4763 # and can
execute them.
4765 proc check_effective_target_sync_int_128_runtime
{ } {
4766 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4767 && ![is
-effective
-target ia32
] } {
4768 return [check_cached_effective_target sync_int_128_available
{
4769 check_runtime_nocache sync_int_128_available
{
4773 unsigned
int eax
, ebx
, ecx
, edx
;
4774 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4775 return !(ecx
& bit_CMPXCHG16B
);
4785 #
Return 1 if the target supports atomic operations
on "long long".
4787 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4789 proc check_effective_target_sync_long_long
{ } {
4790 if { [istarget x86_64
-*-*]
4791 ||
[istarget i?
86-*-*])
4792 ||
[istarget aarch64
*-*-*]
4793 ||
[istarget arm
*-*-*]
4794 ||
[istarget alpha
*-*-*]
4795 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
]) } {
4802 #
Return 1 if the target supports atomic operations
on "long long"
4803 # and can
execute them.
4805 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4807 proc check_effective_target_sync_long_long_runtime
{ } {
4808 if { [istarget x86_64
-*-*]
4809 ||
[istarget i?
86-*-*] } {
4810 return [check_cached_effective_target sync_long_long_available
{
4811 check_runtime_nocache sync_long_long_available
{
4815 unsigned
int eax
, ebx
, ecx
, edx
;
4816 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4817 return !(edx
& bit_CMPXCHG8B
);
4822 } elseif
{ [istarget aarch64
*-*-*] } {
4824 } elseif
{ [istarget arm
*-*-linux
-*] } {
4825 return [check_runtime sync_longlong_runtime
{
4831 if (sizeof
(long long
) != 8)
4834 /* Just check
for native
; checking
for kernel fallback is tricky.
*/
4835 asm volatile
("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4840 } elseif
{ [istarget alpha
*-*-*] } {
4842 } elseif
{ ([istarget sparc
*-*-*]
4843 && [check_effective_target_lp64
]
4844 && [check_effective_target_ultrasparc_hw
]) } {
4846 } elseif
{ [istarget powerpc
*-*-*] && [check_effective_target_lp64
] } {
4853 #
Return 1 if the target supports byte swap instructions.
4855 proc check_effective_target_bswap
{ } {
4856 global et_bswap_saved
4858 if [info exists et_bswap_saved
] {
4859 verbose
"check_effective_target_bswap: using cached result" 2
4861 set et_bswap_saved
0
4862 if { [istarget aarch64
-*-*]
4863 ||
[istarget alpha
*-*-*]
4864 ||
[istarget arm
*-*-*]
4865 ||
[istarget i?
86-*-*]
4866 ||
[istarget m68k
-*-*]
4867 ||
[istarget powerpc
*-*-*]
4868 ||
[istarget rs6000
-*-*]
4869 ||
[istarget s390
*-*-*]
4870 ||
[istarget x86_64
-*-*] } {
4871 set et_bswap_saved
1
4875 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
4876 return $et_bswap_saved
4879 #
Return 1 if the target supports
16-bit byte swap instructions.
4881 proc check_effective_target_bswap16
{ } {
4882 global et_bswap16_saved
4884 if [info exists et_bswap16_saved
] {
4885 verbose
"check_effective_target_bswap16: using cached result" 2
4887 set et_bswap16_saved
0
4888 if { [is
-effective
-target bswap
]
4889 && ![istarget alpha
*-*-*]
4890 && ![istarget i?
86-*-*]
4891 && ![istarget x86_64
-*-*] } {
4892 set et_bswap16_saved
1
4896 verbose
"check_effective_target_bswap16: returning $et_bswap16_saved" 2
4897 return $et_bswap16_saved
4900 #
Return 1 if the target supports
32-bit byte swap instructions.
4902 proc check_effective_target_bswap32
{ } {
4903 global et_bswap32_saved
4905 if [info exists et_bswap32_saved
] {
4906 verbose
"check_effective_target_bswap32: using cached result" 2
4908 set et_bswap32_saved
0
4909 if { [is
-effective
-target bswap
] } {
4910 set et_bswap32_saved
1
4914 verbose
"check_effective_target_bswap32: returning $et_bswap32_saved" 2
4915 return $et_bswap32_saved
4918 #
Return 1 if the target supports
64-bit byte swap instructions.
4920 proc check_effective_target_bswap64
{ } {
4921 global et_bswap64_saved
4923 if [info exists et_bswap64_saved
] {
4924 verbose
"check_effective_target_bswap64: using cached result" 2
4926 set et_bswap64_saved
0
4927 if { [is
-effective
-target bswap
]
4928 && [is
-effective
-target lp64
] } {
4929 set et_bswap64_saved
1
4933 verbose
"check_effective_target_bswap64: returning $et_bswap64_saved" 2
4934 return $et_bswap64_saved
4937 #
Return 1 if the target supports atomic operations
on "int" and "long".
4939 proc check_effective_target_sync_int_long
{ } {
4940 global et_sync_int_long_saved
4942 if [info exists et_sync_int_long_saved
] {
4943 verbose
"check_effective_target_sync_int_long: using cached result" 2
4945 set et_sync_int_long_saved
0
4946 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
4947 # load-reserved/store-conditional instructions.
4948 if { [istarget ia64-*-*]
4949 || [istarget i?86-*-*]
4950 || [istarget x86_64-*-*]
4951 || [istarget aarch64*-*-*]
4952 || [istarget alpha*-*-*]
4953 || [istarget arm*-*-linux-*]
4954 || [istarget bfin*-*linux*]
4955 || [istarget hppa*-*linux*]
4956 || [istarget s390*-*-*]
4957 || [istarget powerpc*-*-*]
4958 || [istarget crisv32-*-*] || [istarget cris-*-*]
4959 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4960 || [check_effective_target_mips_llsc] } {
4961 set et_sync_int_long_saved 1
4965 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
4966 return $et_sync_int_long_saved
4969 # Return 1 if the target supports atomic operations on "char" and "short".
4971 proc check_effective_target_sync_char_short { } {
4972 global et_sync_char_short_saved
4974 if [info exists et_sync_char_short_saved] {
4975 verbose "check_effective_target_sync_char_short: using cached result" 2
4977 set et_sync_char_short_saved 0
4978 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4979 #
load-reserved/store
-conditional instructions.
4980 if { [istarget aarch64
*-*-*]
4981 ||
[istarget ia64
-*-*]
4982 ||
[istarget i?
86-*-*]
4983 ||
[istarget x86_64
-*-*]
4984 ||
[istarget alpha
*-*-*]
4985 ||
[istarget arm
*-*-linux
-*]
4986 ||
[istarget hppa
*-*linux
*]
4987 ||
[istarget s390
*-*-*]
4988 ||
[istarget powerpc
*-*-*]
4989 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
4990 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
4991 ||
[check_effective_target_mips_llsc
] } {
4992 set et_sync_char_short_saved
1
4996 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
4997 return $et_sync_char_short_saved
5000 #
Return 1 if the target uses a ColdFire FPU.
5002 proc check_effective_target_coldfire_fpu
{ } {
5003 return [check_no_compiler_messages coldfire_fpu assembly
{
5010 #
Return true
if this is a uClibc target.
5012 proc check_effective_target_uclibc
{} {
5013 return [check_no_compiler_messages uclibc object
{
5014 #
include <features.h
>
5015 #
if !defined
(__UCLIBC__
)
5021 #
Return true
if this is a uclibc target and
if the uclibc feature
5022 # described by __$feature__ is not present.
5024 proc check_missing_uclibc_feature
{feature
} {
5025 return [check_no_compiler_messages $feature object
"
5026 #
include <features.h
>
5027 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
5033 #
Return true
if this is a Newlib target.
5035 proc check_effective_target_newlib
{} {
5036 return [check_no_compiler_messages newlib object
{
5041 #
Return true
if this is NOT a Bionic target.
5043 proc check_effective_target_non_bionic
{} {
5044 return [check_no_compiler_messages non_bionic object
{
5046 #
if defined
(__BIONIC__
)
5053 #
(a
) an error of a few ULP is expected in string to floating
-point
5054 # conversion functions
; and
5055 #
(b
) overflow is not always detected correctly by those functions.
5057 proc check_effective_target_lax_strtofp
{} {
5058 # By default
, assume that all uClibc targets suffer from this.
5059 return [check_effective_target_uclibc
]
5062 #
Return 1 if this is a target
for which wcsftime is a dummy
5063 # function that always returns
0.
5065 proc check_effective_target_dummy_wcsftime
{} {
5066 # By default
, assume that all uClibc targets suffer from this.
5067 return [check_effective_target_uclibc
]
5070 #
Return 1 if constructors with initialization priority arguments are
5071 # supposed
on this target.
5073 proc check_effective_target_init_priority
{} {
5074 return [check_no_compiler_messages init_priority assembly
"
5075 void f
() __attribute__
((constructor
(1000)));
5080 #
Return 1 if the target matches the effective target
'arg', 0 otherwise.
5081 # This can be used with
any check_
* proc that takes no
argument and
5082 # returns only
1 or
0. It could be used with check_
* procs that take
5083 # arguments with keywords that pass particular arguments.
5085 proc is
-effective
-target
{ arg } {
5087 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5088 set selected
[check_effective_target_$
{arg}]
5091 "vmx_hw" { set selected [check_vmx_hw_available] }
5092 "vsx_hw" { set selected [check_vsx_hw_available] }
5093 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5094 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5095 "dfp_hw" { set selected [check_dfp_hw_available] }
5096 "named_sections" { set selected [check_named_sections_available] }
5097 "gc_sections" { set selected [check_gc_sections_available] }
5098 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5099 default
{ error
"unknown effective target keyword `$arg'" }
5102 verbose
"is-effective-target: $arg $selected" 2
5106 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
5108 proc is
-effective
-target
-keyword
{ arg } {
5109 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5112 # These have different names
for their check_
* procs.
5114 "vmx_hw" { return 1 }
5115 "vsx_hw" { return 1 }
5116 "p8vector_hw" { return 1 }
5117 "ppc_recip_hw" { return 1 }
5118 "dfp_hw" { return 1 }
5119 "named_sections" { return 1 }
5120 "gc_sections" { return 1 }
5121 "cxa_atexit" { return 1 }
5122 default
{ return 0 }
5127 #
Return 1 if target default to short enums
5129 proc check_effective_target_short_enums
{ } {
5130 return [check_no_compiler_messages short_enums assembly
{
5132 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
5136 #
Return 1 if target supports merging string constants at link time.
5138 proc check_effective_target_string_merging
{ } {
5139 return [check_no_messages_and_pattern string_merging \
5140 "rodata\\.str" assembly {
5141 const char
*var
= "String";
5145 #
Return 1 if target has the basic signed and unsigned types in
5146 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
5147 # working
<stdint.h
> for all targets.
5149 proc check_effective_target_stdint_types
{ } {
5150 return [check_no_compiler_messages stdint_types assembly
{
5152 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
5153 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
5157 #
Return 1 if target has the basic signed and unsigned types in
5158 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
5159 # these types agree with those in the header, as some systems have
5160 # only <inttypes.h>.
5162 proc check_effective_target_inttypes_types { } {
5163 return [check_no_compiler_messages inttypes_types assembly {
5164 #include <inttypes.h>
5165 int8_t a; int16_t b; int32_t c; int64_t d;
5166 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5170 # Return 1 if programs are intended to be run on a simulator
5171 # (i.e. slowly) rather than hardware (i.e. fast).
5173 proc check_effective_target_simulator { } {
5175 # All "src/sim" simulators set this one.
5176 if [board_info target exists is_simulator] {
5177 return [board_info target is_simulator]
5180 # The "sid" simulators don't
set that one
, but at least they
set
5182 if [board_info target
exists slow_simulator
] {
5183 return [board_info target slow_simulator
]
5189 #
Return 1 if programs are intended to be run
on hardware rather than
5192 proc check_effective_target_hw
{ } {
5194 # All
"src/sim" simulators set this one.
5195 if [board_info target
exists is_simulator
] {
5196 if [board_info target is_simulator
] {
5203 # The
"sid" simulators don't set that one, but at least they set
5205 if [board_info target
exists slow_simulator
] {
5206 if [board_info target slow_simulator
] {
5216 #
Return 1 if the target is a VxWorks kernel.
5218 proc check_effective_target_vxworks_kernel
{ } {
5219 return [check_no_compiler_messages vxworks_kernel assembly
{
5220 #
if !defined __vxworks || defined __RTP__
5226 #
Return 1 if the target is a VxWorks RTP.
5228 proc check_effective_target_vxworks_rtp
{ } {
5229 return [check_no_compiler_messages vxworks_rtp assembly
{
5230 #
if !defined __vxworks ||
!defined __RTP__
5236 #
Return 1 if the target is expected to provide wide character support.
5238 proc check_effective_target_wchar
{ } {
5239 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
5242 return [check_no_compiler_messages wchar assembly
{
5247 #
Return 1 if the target has
<pthread.h
>.
5249 proc check_effective_target_pthread_h
{ } {
5250 return [check_no_compiler_messages pthread_h assembly
{
5251 #
include <pthread.h
>
5255 #
Return 1 if the target can truncate a file from a file
-descriptor
,
5256 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
5257 # chsize. We test
for a trivially functional truncation
; no stubs.
5258 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
5259 # different function to be used.
5261 proc check_effective_target_fd_truncate { } {
5263 #define _FILE_OFFSET_BITS 64
5269 FILE *f = fopen ("tst.tmp", "wb");
5271 const char t[] = "test writing more than ten characters";
5275 write (fd, t, sizeof (t) - 1);
5277 if (ftruncate (fd, 10) != 0)
5286 f = fopen ("tst.tmp", "rb");
5287 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5295 if { [check_runtime ftruncate $prog] } {
5299 regsub "ftruncate" $prog "chsize" prog
5300 return [check_runtime chsize $prog]
5303 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5305 proc add_options_for_c99_runtime { flags } {
5306 if { [istarget *-*-solaris2*] } {
5307 return "$flags -std=c99"
5309 if { [istarget powerpc-*-darwin*] } {
5310 return "$flags -mmacosx-version-min=10.3"
5315 # Add to FLAGS all the target-specific flags needed to enable
5316 # full IEEE compliance mode.
5318 proc add_options_for_ieee { flags } {
5319 if { [istarget alpha*-*-*]
5320 || [istarget sh*-*-*] } {
5321 return "$flags -mieee"
5323 if { [istarget rx-*-*] } {
5324 return "$flags -mnofpu"
5329 if {![info exists flags_to_postpone]} {
5330 set flags_to_postpone ""
5333 # Add to FLAGS the flags needed to enable functions to bind locally
5334 # when using pic/PIC passes in the testsuite.
5335 proc add_options_for_bind_pic_locally { flags } {
5336 global flags_to_postpone
5338 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
5339 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
5340 # order to make sure that the multilib_flags doesn't override this.
5342 if {[check_no_compiler_messages using_pic2 assembly
{
5347 set flags_to_postpone
"-fPIE"
5350 if {[check_no_compiler_messages using_pic1 assembly
{
5355 set flags_to_postpone
"-fpie"
5361 # Add to FLAGS the flags needed to enable
64-bit vectors.
5363 proc add_options_for_double_vectors
{ flags
} {
5364 if [is
-effective
-target arm_neon_ok
] {
5365 return "$flags -mvectorize-with-neon-double"
5371 #
Return 1 if the target provides a full C99 runtime.
5373 proc check_effective_target_c99_runtime
{ } {
5374 return [check_cached_effective_target c99_runtime
{
5377 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
5378 set contents
[read $file
]
5381 #ifndef HAVE_C99_RUNTIME
5385 check_no_compiler_messages_nocache c99_runtime assembly \
5386 $contents
[add_options_for_c99_runtime
""]
5390 #
Return 1 if target wchar_t is at least
4 bytes.
5392 proc check_effective_target_4byte_wchar_t
{ } {
5393 return [check_no_compiler_messages
4byte_wchar_t object
{
5394 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
5398 #
Return 1 if the target supports automatic stack alignment.
5400 proc check_effective_target_automatic_stack_alignment
{ } {
5401 # Ordinarily x86 supports automatic stack alignment ...
5402 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
5403 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
5404 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
5405 return [check_effective_target_ilp32];
5412 # Return true if we are compiling for AVX target.
5414 proc check_avx_available { } {
5415 if { [check_no_compiler_messages avx_available assembly {
5425 # Return true if 32- and 16-bytes vectors are available.
5427 proc check_effective_target_vect_sizes_32B_16B { } {
5428 if { [check_avx_available] && ![check_prefer_avx128] } {
5435 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5438 proc check_prefer_avx128 { } {
5439 if ![check_avx_available] {
5442 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5443 float a[1024],b[1024],c[1024];
5444 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5445 } "-O2 -ftree-vectorize"]
5449 # Return 1 if avx512f instructions can be compiled.
5451 proc check_effective_target_avx512f { } {
5452 return [check_no_compiler_messages avx512f object {
5453 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5455 __m512d _mm512_add (__m512d a)
5457 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5462 # Return 1 if avx instructions can be compiled.
5464 proc check_effective_target_avx { } {
5465 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5468 return [check_no_compiler_messages avx object {
5469 void _mm256_zeroall (void)
5471 __builtin_ia32_vzeroall ();
5476 # Return 1 if avx2 instructions can be compiled.
5477 proc check_effective_target_avx2 { } {
5478 return [check_no_compiler_messages avx2 object {
5479 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5481 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5483 return __builtin_ia32_andnotsi256 (__X, __Y);
5488 # Return 1 if sse instructions can be compiled.
5489 proc check_effective_target_sse { } {
5490 return [check_no_compiler_messages sse object {
5493 __builtin_ia32_stmxcsr ();
5499 # Return 1 if sse2 instructions can be compiled.
5500 proc check_effective_target_sse2 { } {
5501 return [check_no_compiler_messages sse2 object {
5502 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5504 __m128i _mm_srli_si128 (__m128i __A, int __N)
5506 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5511 # Return 1 if F16C instructions can be compiled.
5513 proc check_effective_target_f16c { } {
5514 return [check_no_compiler_messages f16c object {
5515 #include "immintrin.h"
5517 foo (unsigned short val)
5519 return _cvtsh_ss (val);
5524 # Return 1 if C wchar_t type is compatible with char16_t.
5526 proc check_effective_target_wchar_t_char16_t_compatible { } {
5527 return [check_no_compiler_messages wchar_t_char16_t object {
5529 __CHAR16_TYPE__ *p16 = &wc;
5530 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5534 # Return 1 if C wchar_t type is compatible with char32_t.
5536 proc check_effective_target_wchar_t_char32_t_compatible { } {
5537 return [check_no_compiler_messages wchar_t_char32_t object {
5539 __CHAR32_TYPE__ *p32 = &wc;
5540 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5544 # Return 1 if pow10 function exists.
5546 proc check_effective_target_pow10 { } {
5547 return [check_runtime pow10 {
5557 # Return 1 if current options generate DFP instructions, 0 otherwise.
5559 proc check_effective_target_hard_dfp {} {
5560 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5561 typedef float d64 __attribute__((mode(DD)));
5563 void foo (void) { z = x + y; }
5567 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5568 # for strchr etc. functions.
5570 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5571 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5574 #if !defined(__cplusplus) \
5575 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5576 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5577 ISO C++ correct string.h and wchar.h protos not supported.
5584 # Return 1 if GNU as is used.
5586 proc check_effective_target_gas { } {
5587 global use_gas_saved
5590 if {![info exists use_gas_saved]} {
5591 # Check if the as used by gcc is GNU as.
5592 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5593 # Provide /dev/null as input, otherwise gas times out reading from
5595 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5596 set as_output [lindex $status 1]
5597 if { [ string first "GNU" $as_output ] >= 0 } {
5603 return $use_gas_saved
5606 # Return 1 if GNU ld is used.
5608 proc check_effective_target_gld { } {
5609 global use_gld_saved
5612 if {![info exists use_gld_saved]} {
5613 # Check if the ld used by gcc is GNU ld.
5614 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5615 set status [remote_exec host "$gcc_ld" "--version"]
5616 set ld_output [lindex $status 1]
5617 if { [ string first "GNU" $ld_output ] >= 0 } {
5623 return $use_gld_saved
5626 # Return 1 if the compiler has been configure with link-time optimization
5629 proc check_effective_target_lto { } {
5631 return [info exists ENABLE_LTO]
5634 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5636 proc check_effective_target_maybe_x32 { } {
5637 return [check_no_compiler_messages maybe_x32 object {
5639 } "-mx32 -maddress-mode=short"]
5642 # Return 1 if this target supports the -fsplit-stack option, 0
5645 proc check_effective_target_split_stack {} {
5646 return [check_no_compiler_messages split_stack object {
5651 # Return 1 if this target supports the -masm=intel option, 0
5654 proc check_effective_target_masm_intel {} {
5655 return [check_no_compiler_messages masm_intel object {
5656 extern void abort (void);
5660 # Return 1 if the language for the compiler under test is C.
5662 proc check_effective_target_c { } {
5664 if [string match $tool "gcc"] {
5670 # Return 1 if the language for the compiler under test is C++.
5672 proc check_effective_target_c++ { } {
5674 if [string match $tool "g++"] {
5680 # Check whether the current active language standard supports the features
5681 # of C++11/C++1y by checking for the presence of one of the -std
5682 # flags. This assumes that the default for the compiler is C++98, and that
5683 # there will never be multiple -std= arguments on the command line.
5684 proc check_effective_target_c++11_only { } {
5685 if ![check_effective_target_c++] {
5688 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5690 proc check_effective_target_c++11 { } {
5691 if [check_effective_target_c++11_only] {
5694 return [check_effective_target_c++1y]
5696 proc check_effective_target_c++11_down { } {
5697 if ![check_effective_target_c++] {
5700 return ![check_effective_target_c++1y]
5703 proc check_effective_target_c++1y_only { } {
5704 if ![check_effective_target_c++] {
5707 return [check-flags { { } { } { -std=c++1y -std=gnu++1y -std=c++14 -std=gnu++14 } }]
5709 proc check_effective_target_c++1y { } {
5710 if [check_effective_target_c++1y_only] {
5713 return [check_effective_target_c++1z]
5715 proc check_effective_target_c++1y_down { } {
5716 if ![check_effective_target_c++] {
5719 return ![check_effective_target_c++1z]
5722 proc check_effective_target_c++98_only { } {
5723 if ![check_effective_target_c++] {
5726 return ![check_effective_target_c++11]
5729 proc check_effective_target_c++1z_only { } {
5730 if ![check_effective_target_c++] {
5733 return [check-flags { { } { } { -std=c++1z -std=gnu++1z } }]
5735 proc check_effective_target_c++1z { } {
5736 return [check_effective_target_c++1z_only]
5739 # Return 1 if expensive testcases should be run.
5741 proc check_effective_target_run_expensive_tests { } {
5742 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5748 # Returns 1 if "mempcpy" is available on the target system.
5750 proc check_effective_target_mempcpy {} {
5751 return [check_function_available "mempcpy"]
5754 # Check whether the vectorizer tests are supported by the target and
5755 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5756 # Set dg-do-what-default to either compile or run, depending on target
5757 # capabilities. Return 1 if vectorizer tests are supported by
5758 # target, 0 otherwise.
5760 proc check_vect_support_and_set_flags { } {
5761 global DEFAULT_VECTCFLAGS
5762 global dg-do-what-default
5764 if [istarget powerpc-*paired*] {
5765 lappend DEFAULT_VECTCFLAGS "-mpaired"
5766 if [check_750cl_hw_available] {
5767 set dg-do-what-default run
5769 set dg-do-what-default compile
5771 } elseif [istarget powerpc*-*-*] {
5772 # Skip targets not supporting -maltivec.
5773 if ![is-effective-target powerpc_altivec_ok] {
5777 lappend DEFAULT_VECTCFLAGS "-maltivec"
5778 if [check_p8vector_hw_available] {
5779 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5780 } elseif [check_vsx_hw_available] {
5781 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5784 if [check_vmx_hw_available] {
5785 set dg-do-what-default run
5787 if [is-effective-target ilp32] {
5788 # Specify a cpu that supports VMX for compile-only tests.
5789 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5791 set dg-do-what-default compile
5793 } elseif { [istarget spu-*-*] } {
5794 set dg-do-what-default run
5795 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5796 lappend DEFAULT_VECTCFLAGS "-msse2"
5797 if { [check_effective_target_sse2_runtime] } {
5798 set dg-do-what-default run
5800 set dg-do-what-default compile
5802 } elseif { [istarget mips*-*-*]
5803 && ([check_effective_target_mpaired_single]
5804 || [check_effective_target_mips_loongson])
5805 && [check_effective_target_nomips16] } {
5806 if { [check_effective_target_mpaired_single] } {
5807 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5809 set dg-do-what-default run
5810 } elseif [istarget sparc*-*-*] {
5811 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5812 if [check_effective_target_ultrasparc_hw] {
5813 set dg-do-what-default run
5815 set dg-do-what-default compile
5817 } elseif [istarget alpha*-*-*] {
5818 # Alpha's vectorization capabilities are extremely limited.
5819 # It
's more effort than its worth disabling all of the tests
5820 # that it cannot pass. But if you actually want to see what
5821 # does work, command out the return.
5824 lappend DEFAULT_VECTCFLAGS "-mmax"
5825 if [check_alpha_max_hw_available] {
5826 set dg-do-what-default run
5828 set dg-do-what-default compile
5830 } elseif [istarget ia64-*-*] {
5831 set dg-do-what-default run
5832 } elseif [is-effective-target arm_neon_ok] {
5833 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5834 # NEON does not support denormals, so is not used for vectorization by
5835 # default to avoid loss of precision. We must pass -ffast-math to test
5836 # vectorization of float operations.
5837 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5838 if [is-effective-target arm_neon_hw] {
5839 set dg-do-what-default run
5841 set dg-do-what-default compile
5843 } elseif [istarget "aarch64*-*-*"] {
5844 set dg-do-what-default run
5852 proc check_effective_target_non_strict_align {} {
5853 return [check_no_compiler_messages non_strict_align assembly {
5855 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5857 void foo(void) { z = (c *) y; }
5861 # Return 1 if the target has <ucontext.h>.
5863 proc check_effective_target_ucontext_h { } {
5864 return [check_no_compiler_messages ucontext_h assembly {
5865 #include <ucontext.h>
5869 proc check_effective_target_aarch64_tiny { } {
5870 if { [istarget aarch64*-*-*] } {
5871 return [check_no_compiler_messages aarch64_tiny object {
5872 #ifdef __AARCH64_CMODEL_TINY__
5875 #error target not AArch64 tiny code model
5883 proc check_effective_target_aarch64_small { } {
5884 if { [istarget aarch64*-*-*] } {
5885 return [check_no_compiler_messages aarch64_small object {
5886 #ifdef __AARCH64_CMODEL_SMALL__
5889 #error target not AArch64 small code model
5897 proc check_effective_target_aarch64_large { } {
5898 if { [istarget aarch64*-*-*] } {
5899 return [check_no_compiler_messages aarch64_large object {
5900 #ifdef __AARCH64_CMODEL_LARGE__
5903 #error target not AArch64 large code model
5911 # Return 1 if <fenv.h> is available with all the standard IEEE
5912 # exceptions and floating-point exceptions are raised by arithmetic
5913 # operations. (If the target requires special options for "inexact"
5914 # exceptions, those need to be specified in the testcases.)
5916 proc check_effective_target_fenv_exceptions {} {
5917 return [check_runtime fenv_exceptions {
5920 #ifndef FE_DIVBYZERO
5921 # error Missing FE_DIVBYZERO
5924 # error Missing FE_INEXACT
5927 # error Missing FE_INVALID
5930 # error Missing FE_OVERFLOW
5932 #ifndef FE_UNDERFLOW
5933 # error Missing FE_UNDERFLOW
5935 volatile float a = 0.0f, r;
5940 if (fetestexcept (FE_INVALID))
5945 } [add_options_for_ieee "-std=gnu99"]]
5948 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
5950 proc check_effective_target_logical_op_short_circuit {} {
5951 if { [istarget mips*-*-*]
5952 || [istarget arc*-*-*]
5953 || [istarget avr*-*-*]
5954 || [istarget crisv32-*-*] || [istarget cris-*-*]
5955 || [istarget mmix-*-*]
5956 || [istarget s390*-*-*]
5957 || [istarget powerpc*-*-*]
5958 || [check_effective_target_arm_cortex_m] } {
5964 # Record that dg-final test TEST requires convential compilation.
5966 proc force_conventional_output_for { test } {
5967 if { [info proc $test] == "" } {
5968 perror "$test does not exist"
5971 proc ${test}_required_options {} {
5972 global gcc_force_conventional_output
5973 return $gcc_force_conventional_output