gcc/testsuite/gcc.target/mips/loongson-shift-count-truncated-1.c

   1 /* Test case for SHIFT_COUNT_TRUNCATED on Loongson.  */
   2
   3 /* { dg-do run } */
   4 /* loongson.h does not handle or check for MIPS16ness.  There doesn't
   5    seem any good reason for it to, given that the Loongson processors
   6    do not support MIPS16.  */
   7 /* { dg-options "isa=loongson -mhard-float -mno-mips16" } */
   8 /* See PR 52155.  */
   9 /* { dg-options "isa=loongson -mhard-float -mno-mips16 -mlong64" { mips*-*-elf* && ilp32 } } */
  10
  11 #include "loongson.h"
  12 #include <assert.h>
  13
  14 typedef union { int32x2_t v; int32_t a[2]; } int32x2_encap_t;
  15
  16 void
  17 main1 (int shift)
  18 {
  19   int32x2_encap_t s;
  20   int32x2_encap_t r;
  21
  22   s.a[0] = 0xffffffff;
  23   s.a[1] = 0xffffffff;
  24   /* Loongson SIMD use low-order 7 bits to specify the shift amount.
  25      Thus V2SI << 0x40 == 0.  The below expression 'shift & 0x3f' will be
  26      mis-optimized as 'shift', if SHIFT_COUNT_TRUNCATED is nonzero.  */
  27   r.v = psllw_s (s.v, (shift & 0x3f));
  28   assert (r.a[0] == 0xffffffff);
  29   assert (r.a[1] == 0xffffffff);
  30 }
  31
  32 int
  33 main (void)
  34 {
  35   main1 (0x40);
  36   return 0;
  37 }